From 3a5319293c9210ea3c0c9d84604fa0720a96f0e8 Mon Sep 17 00:00:00 2001 From: Keith Whitwell Date: Wed, 20 Sep 2006 14:39:53 +0000 Subject: Broadwater seems to prefer this style of blitting. --- src/mesa/drivers/dri/i965/intel_blit.c | 5 +---- 1 file changed, 1 insertion(+), 4 deletions(-) (limited to 'src/mesa/drivers') diff --git a/src/mesa/drivers/dri/i965/intel_blit.c b/src/mesa/drivers/dri/i965/intel_blit.c index 2191dd585e..c57618b388 100644 --- a/src/mesa/drivers/dri/i965/intel_blit.c +++ b/src/mesa/drivers/dri/i965/intel_blit.c @@ -74,9 +74,6 @@ void intelCopyBuffer( const __DRIdrawablePrivate *dPriv, if (!rect) { - /* This is a really crappy way to do wait-for-vblank. I guess - * it sortof works in the single-application case. - */ UNLOCK_HARDWARE( intel ); driWaitForVBlank( dPriv, &intel->vbl_seq, intel->vblank_flags, & missed_target ); LOCK_HARDWARE( intel ); @@ -292,7 +289,7 @@ void intelEmitCopyBlit( struct intel_context *intel, /* Initial y values don't seem to work with negative pitches. If * we adjust the offsets manually (below), it seems to work fine. */ - if (0) { + if (1) { BEGIN_BATCH(8, INTEL_BATCH_NO_CLIPRECTS); OUT_BATCH( CMD ); OUT_BATCH( dst_pitch | BR13 ); -- cgit v1.2.3