From c5945c2d173b77ace00e6fc225097a6afddecfa3 Mon Sep 17 00:00:00 2001 From: Eric Anholt Date: Wed, 24 Sep 2008 15:10:45 -0700 Subject: intel: Fix clears to depth_stencil texture attachments. Broken by 0adfd1021035e90995a25ec5f20b736e55075d92, showed up as an assertion failure in a software fallback in the shadowtex demo when we failed to recognize the texture format. --- src/mesa/drivers/dri/intel/intel_fbo.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'src/mesa/drivers') diff --git a/src/mesa/drivers/dri/intel/intel_fbo.c b/src/mesa/drivers/dri/intel/intel_fbo.c index 3677dd41d9..fce5e36b9d 100644 --- a/src/mesa/drivers/dri/intel/intel_fbo.c +++ b/src/mesa/drivers/dri/intel/intel_fbo.c @@ -540,7 +540,7 @@ intel_update_wrapper(GLcontext *ctx, struct intel_renderbuffer *irb, irb->Base._ActualFormat = GL_DEPTH_COMPONENT16; irb->Base._BaseFormat = GL_DEPTH_COMPONENT; DBG("Render to DEPTH16 texture OK\n"); - } else if (texImage->TexFormat == &_mesa_texformat_z24_s8) { + } else if (texImage->TexFormat == &_mesa_texformat_s8_z24) { irb->Base._ActualFormat = GL_DEPTH24_STENCIL8_EXT; irb->Base._BaseFormat = GL_DEPTH_STENCIL_EXT; DBG("Render to DEPTH_STENCIL texture OK\n"); -- cgit v1.2.3 From 831bfb9053a6e1f065fc07f9f25ae0ea27053733 Mon Sep 17 00:00:00 2001 From: Sam Hocevar Date: Tue, 23 Sep 2008 17:56:19 +0200 Subject: i965: more meaningful message for unsupported opcodes. --- src/mesa/drivers/dri/i965/brw_vs_emit.c | 5 ++++- src/mesa/drivers/dri/i965/brw_wm_emit.c | 6 ++++-- 2 files changed, 8 insertions(+), 3 deletions(-) (limited to 'src/mesa/drivers') diff --git a/src/mesa/drivers/dri/i965/brw_vs_emit.c b/src/mesa/drivers/dri/i965/brw_vs_emit.c index 8759826e83..b0b0449f99 100644 --- a/src/mesa/drivers/dri/i965/brw_vs_emit.c +++ b/src/mesa/drivers/dri/i965/brw_vs_emit.c @@ -1155,7 +1155,10 @@ void brw_vs_emit(struct brw_vs_compile *c ) case OPCODE_ENDSUB: break; default: - _mesa_printf("Unsupport opcode %d in vertex shader\n", inst->Opcode); + _mesa_printf("Unsupported opcode %i (%s) in vertex shader\n", + inst->Opcode, inst->Opcode < MAX_OPCODE ? + _mesa_opcode_string(inst->Opcode) : + "unknown"); break; } diff --git a/src/mesa/drivers/dri/i965/brw_wm_emit.c b/src/mesa/drivers/dri/i965/brw_wm_emit.c index f1c14c98f9..58c78c4b2c 100644 --- a/src/mesa/drivers/dri/i965/brw_wm_emit.c +++ b/src/mesa/drivers/dri/i965/brw_wm_emit.c @@ -1302,8 +1302,10 @@ void brw_wm_emit( struct brw_wm_compile *c ) break; default: - _mesa_printf("unsupport opcode %d in fragment program\n", - inst->opcode); + _mesa_printf("Unsupported opcode %i (%s) in fragment shader\n", + inst->opcode, inst->opcode < MAX_OPCODE ? + _mesa_opcode_string(inst->opcode) : + "unknown"); } for (i = 0; i < 4; i++) -- cgit v1.2.3 From 561787e69759ed757edb897c027d2d94beac8d11 Mon Sep 17 00:00:00 2001 From: Sam Hocevar Date: Thu, 25 Sep 2008 10:49:05 +0200 Subject: i965: support for sin() and cos() in vertex shaders. --- src/mesa/drivers/dri/i965/brw_vs_emit.c | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'src/mesa/drivers') diff --git a/src/mesa/drivers/dri/i965/brw_vs_emit.c b/src/mesa/drivers/dri/i965/brw_vs_emit.c index b0b0449f99..9de05408ba 100644 --- a/src/mesa/drivers/dri/i965/brw_vs_emit.c +++ b/src/mesa/drivers/dri/i965/brw_vs_emit.c @@ -1024,6 +1024,9 @@ void brw_vs_emit(struct brw_vs_compile *c ) case OPCODE_ADD: brw_ADD(p, dst, args[0], args[1]); break; + case OPCODE_COS: + emit_math1(c, BRW_MATH_FUNCTION_COS, dst, args[0], BRW_MATH_PRECISION_FULL); + break; case OPCODE_DP3: brw_DP3(p, dst, args[0], args[1]); break; @@ -1089,6 +1092,9 @@ void brw_vs_emit(struct brw_vs_compile *c ) case OPCODE_SEQ: emit_seq(p, dst, args[0], args[1]); break; + case OPCODE_SIN: + emit_math1(c, BRW_MATH_FUNCTION_SIN, dst, args[0], BRW_MATH_PRECISION_FULL); + break; case OPCODE_SNE: emit_sne(p, dst, args[0], args[1]); break; -- cgit v1.2.3