From 5e9ac94cc44ef4f97063d7b696411b2a4be16f36 Mon Sep 17 00:00:00 2001 From: Eric Anholt Date: Mon, 23 Aug 2010 12:21:33 -0700 Subject: mesa: Add new ir_unop_any() expression operation. The previous any() implementation would generate arg0.x || arg0.y || arg0.z. Having an expression operation for this makes it easy for the backend to generate something easier (DPn + SNE for 915 FS, .any predication on 965 VS) --- src/mesa/program/ir_to_mesa.cpp | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) (limited to 'src/mesa') diff --git a/src/mesa/program/ir_to_mesa.cpp b/src/mesa/program/ir_to_mesa.cpp index 7a615f2d58..ea2560af3e 100644 --- a/src/mesa/program/ir_to_mesa.cpp +++ b/src/mesa/program/ir_to_mesa.cpp @@ -844,6 +844,26 @@ ir_to_mesa_visitor::visit(ir_expression *ir) ir_to_mesa_emit_op2(ir, OPCODE_SNE, result_dst, op[0], op[1]); } break; + + case ir_unop_any: + switch (ir->operands[0]->type->vector_elements) { + case 4: + ir_to_mesa_emit_op2(ir, OPCODE_DP4, result_dst, op[0], op[0]); + break; + case 3: + ir_to_mesa_emit_op2(ir, OPCODE_DP3, result_dst, op[0], op[0]); + break; + case 2: + ir_to_mesa_emit_op2(ir, OPCODE_DP2, result_dst, op[0], op[0]); + break; + default: + assert(!"unreached: ir_unop_any of non-bvec"); + break; + } + ir_to_mesa_emit_op2(ir, OPCODE_SNE, + result_dst, result_src, src_reg_for_float(0.0)); + break; + case ir_binop_logic_xor: ir_to_mesa_emit_op2(ir, OPCODE_SNE, result_dst, op[0], op[1]); break; -- cgit v1.2.3