From a53e8b7defd9c169a1a98d04d755d3f578292691 Mon Sep 17 00:00:00 2001 From: Alex Deucher Date: Mon, 26 Apr 2010 13:45:01 -0400 Subject: r600: avoid setting invalid bit on r7xx for blits --- src/mesa/drivers/dri/r600/r600_blit.c | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'src/mesa') diff --git a/src/mesa/drivers/dri/r600/r600_blit.c b/src/mesa/drivers/dri/r600/r600_blit.c index 244fdc4ffb..172f85eb26 100644 --- a/src/mesa/drivers/dri/r600/r600_blit.c +++ b/src/mesa/drivers/dri/r600/r600_blit.c @@ -344,6 +344,10 @@ set_render_target(context_t *context, struct radeon_bo *bo, gl_format mesa_forma return; } + /* must be 0 on r7xx */ + if (context->radeon.radeonScreen->chip_family >= CHIP_FAMILY_RV770) + CLEARbit(cb_color0_info, BLEND_FLOAT32_bit); + SETfield(cb_color0_info, format, CB_COLOR0_INFO__FORMAT_shift, CB_COLOR0_INFO__FORMAT_mask); SETfield(cb_color0_info, comp_swap, COMP_SWAP_shift, COMP_SWAP_mask); -- cgit v1.2.3