From 4550b0562d5b59890fccb0e7eb0dbef967d1ccf9 Mon Sep 17 00:00:00 2001 From: "Xiang, Haihao" Date: Fri, 7 Nov 2008 14:58:04 +0800 Subject: mesa: use _bfc0 instead of _col0 when building back face lighting. --- src/mesa/main/ffvertex_prog.c | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) (limited to 'src') diff --git a/src/mesa/main/ffvertex_prog.c b/src/mesa/main/ffvertex_prog.c index 308b4ef711..5155c01e41 100644 --- a/src/mesa/main/ffvertex_prog.c +++ b/src/mesa/main/ffvertex_prog.c @@ -1296,14 +1296,13 @@ static void build_lighting( struct tnl_program *p ) } else if (!p->state->material_shininess_is_zero) { emit_op1(p, OPCODE_LIT, lit, 0, dots); - emit_op2(p, OPCODE_ADD, _col0, 0, ambient, _col0); + emit_op2(p, OPCODE_ADD, _bfc0, 0, ambient, _bfc0); } else { emit_degenerate_lit(p, lit, dots); - emit_op2(p, OPCODE_ADD, _col0, 0, ambient, _col0); + emit_op2(p, OPCODE_ADD, _bfc0, 0, ambient, _bfc0); } - emit_op2(p, OPCODE_ADD, _bfc0, 0, ambient, _bfc0); emit_op3(p, OPCODE_MAD, res0, mask0, swizzle1(lit,Y), diffuse, _bfc0); emit_op3(p, OPCODE_MAD, res1, mask1, swizzle1(lit,Z), specular, _bfc1); -- cgit v1.2.3 From f6ead50827c03017e6b730313c361b39190da92f Mon Sep 17 00:00:00 2001 From: Brian Paul Date: Fri, 7 Nov 2008 08:51:31 -0700 Subject: mesa: added OPCODE_NRM3/NRM4 instructions for vector normalization. We may emit these instructions from GLSL instead of DP3/RCP/MUL. Also, implement SSG (set sign) instruction in the interpreter. --- src/mesa/shader/prog_execute.c | 41 ++++++++++++++++++++++++++++++++++++++ src/mesa/shader/prog_instruction.c | 2 ++ src/mesa/shader/prog_instruction.h | 2 ++ 3 files changed, 45 insertions(+) (limited to 'src') diff --git a/src/mesa/shader/prog_execute.c b/src/mesa/shader/prog_execute.c index d843761723..c0173d369e 100644 --- a/src/mesa/shader/prog_execute.c +++ b/src/mesa/shader/prog_execute.c @@ -1019,6 +1019,36 @@ _mesa_execute_program(GLcontext * ctx, break; case OPCODE_NOP: break; + case OPCODE_NRM3: /* 3-component normalization */ + { + GLfloat a[4], result[4]; + GLfloat tmp; + fetch_vector4(&inst->SrcReg[0], machine, a); + tmp = a[0] * a[0] + a[1] * a[1] + a[2] * a[2]; + if (tmp != 0.0F) + tmp = 1.0F / tmp; + result[0] = tmp * a[0]; + result[1] = tmp * a[1]; + result[2] = tmp * a[2]; + result[3] = 0.0; /* undefined, but prevent valgrind warnings */ + store_vector4(inst, machine, result); + } + break; + case OPCODE_NRM4: /* 4-component normalization */ + { + GLfloat a[4], result[4]; + GLfloat tmp; + fetch_vector4(&inst->SrcReg[0], machine, a); + tmp = a[0] * a[0] + a[1] * a[1] + a[2] * a[2] + a[3] * a[3]; + if (tmp != 0.0F) + tmp = 1.0F / tmp; + result[0] = tmp * a[0]; + result[1] = tmp * a[1]; + result[2] = tmp * a[2]; + result[3] = tmp * a[3]; + store_vector4(inst, machine, result); + } + break; case OPCODE_PK2H: /* pack two 16-bit floats in one 32-bit float */ { GLfloat a[4], result[4]; @@ -1277,6 +1307,17 @@ _mesa_execute_program(GLcontext * ctx, } } break; + case OPCODE_SSG: /* set sign (-1, 0 or +1) */ + { + GLfloat a[4], result[4]; + fetch_vector4(&inst->SrcReg[0], machine, a); + result[0] = (GLfloat) ((a[0] > 0.0F) - (a[0] < 0.0F)); + result[1] = (GLfloat) ((a[1] > 0.0F) - (a[1] < 0.0F)); + result[2] = (GLfloat) ((a[2] > 0.0F) - (a[2] < 0.0F)); + result[3] = (GLfloat) ((a[3] > 0.0F) - (a[3] < 0.0F)); + store_vector4(inst, machine, result); + } + break; case OPCODE_STR: /* set true, operands ignored */ { static const GLfloat result[4] = { 1.0F, 1.0F, 1.0F, 1.0F }; diff --git a/src/mesa/shader/prog_instruction.c b/src/mesa/shader/prog_instruction.c index 7e340ce454..d4f3bcb0e5 100644 --- a/src/mesa/shader/prog_instruction.c +++ b/src/mesa/shader/prog_instruction.c @@ -197,6 +197,8 @@ static const struct instruction_info InstInfo[MAX_OPCODE] = { { OPCODE_NOISE2, "NOISE2", 1, 1 }, { OPCODE_NOISE3, "NOISE3", 1, 1 }, { OPCODE_NOISE4, "NOISE4", 1, 1 }, + { OPCODE_NRM3, "NRM3", 1, 1 }, + { OPCODE_NRM4, "NRM4", 1, 1 }, { OPCODE_PK2H, "PK2H", 1, 1 }, { OPCODE_PK2US, "PK2US", 1, 1 }, { OPCODE_PK4B, "PK4B", 1, 1 }, diff --git a/src/mesa/shader/prog_instruction.h b/src/mesa/shader/prog_instruction.h index 16701e4ec9..3bcd0829a2 100644 --- a/src/mesa/shader/prog_instruction.h +++ b/src/mesa/shader/prog_instruction.h @@ -188,6 +188,8 @@ typedef enum prog_opcode { OPCODE_NOISE2, /* X */ OPCODE_NOISE3, /* X */ OPCODE_NOISE4, /* X */ + OPCODE_NRM3, /* */ + OPCODE_NRM4, /* */ OPCODE_PK2H, /* X */ OPCODE_PK2US, /* X */ OPCODE_PK4B, /* X */ -- cgit v1.2.3 From d93072782aa8b7a6bb060c77f3a61adb3b655d58 Mon Sep 17 00:00:00 2001 From: Brian Paul Date: Fri, 7 Nov 2008 09:06:09 -0700 Subject: mesa: include shader/prog_instruction.h Seems to fix a mysteriously missing build dependency. --- src/mesa/shader/slang/slang_ir.c | 1 + 1 file changed, 1 insertion(+) (limited to 'src') diff --git a/src/mesa/shader/slang/slang_ir.c b/src/mesa/shader/slang/slang_ir.c index 20498e8c66..711ee516b1 100644 --- a/src/mesa/shader/slang/slang_ir.c +++ b/src/mesa/shader/slang/slang_ir.c @@ -27,6 +27,7 @@ #include "main/context.h" #include "slang_ir.h" #include "slang_mem.h" +#include "shader/prog_instruction.h" #include "shader/prog_print.h" -- cgit v1.2.3 From 37eef7b474c5d9a7c566f9edf35c797c5a98d065 Mon Sep 17 00:00:00 2001 From: Brian Paul Date: Fri, 7 Nov 2008 09:33:55 -0700 Subject: mesa: added AND/OR/NOT/XOR instructions --- src/mesa/shader/prog_execute.c | 214 +++++++++++++++++++++++++++++++++---- src/mesa/shader/prog_instruction.c | 4 + src/mesa/shader/prog_instruction.h | 4 + 3 files changed, 199 insertions(+), 23 deletions(-) (limited to 'src') diff --git a/src/mesa/shader/prog_execute.c b/src/mesa/shader/prog_execute.c index c0173d369e..b47421d5a1 100644 --- a/src/mesa/shader/prog_execute.c +++ b/src/mesa/shader/prog_execute.c @@ -218,6 +218,37 @@ fetch_vector4(const struct prog_src_register *source, } +/** + * Fetch a 4-element uint vector from the given source register. + * Apply swizzling but not negation/abs. + */ +static void +fetch_vector4ui(const struct prog_src_register *source, + const struct gl_program_machine *machine, GLuint result[4]) +{ + const GLuint *src = (GLuint *) get_register_pointer(source, machine); + ASSERT(src); + + if (source->Swizzle == SWIZZLE_NOOP) { + /* no swizzling */ + COPY_4V(result, src); + } + else { + ASSERT(GET_SWZ(source->Swizzle, 0) <= 3); + ASSERT(GET_SWZ(source->Swizzle, 1) <= 3); + ASSERT(GET_SWZ(source->Swizzle, 2) <= 3); + ASSERT(GET_SWZ(source->Swizzle, 3) <= 3); + result[0] = src[GET_SWZ(source->Swizzle, 0)]; + result[1] = src[GET_SWZ(source->Swizzle, 1)]; + result[2] = src[GET_SWZ(source->Swizzle, 2)]; + result[3] = src[GET_SWZ(source->Swizzle, 3)]; + } + + /* Note: no NegateBase, Abs, NegateAbs here */ +} + + + /** * Fetch the derivative with respect to X or Y for the given register. * XXX this currently only works for fragment program input attribs. @@ -228,7 +259,8 @@ fetch_vector4_deriv(GLcontext * ctx, const struct gl_program_machine *machine, char xOrY, GLfloat result[4]) { - if (source->File == PROGRAM_INPUT && source->Index < (GLint)machine->NumDeriv) { + if (source->File == PROGRAM_INPUT && + source->Index < (GLint) machine->NumDeriv) { const GLint col = machine->CurElement; const GLfloat w = machine->Attribs[FRAG_ATTRIB_WPOS][col][3]; const GLfloat invQ = 1.0f / w; @@ -492,6 +524,89 @@ store_vector4(const struct prog_instruction *inst, } +/** + * Store 4 uints into a register. Observe the set-condition-code flags. + */ +static void +store_vector4ui(const struct prog_instruction *inst, + struct gl_program_machine *machine, const GLuint value[4]) +{ + const struct prog_dst_register *dest = &(inst->DstReg); + GLuint *dstReg; + GLuint dummyReg[4]; + GLuint writeMask = dest->WriteMask; + + switch (dest->File) { + case PROGRAM_OUTPUT: + ASSERT(dest->Index < MAX_PROGRAM_OUTPUTS); + dstReg = (GLuint *) machine->Outputs[dest->Index]; + break; + case PROGRAM_TEMPORARY: + ASSERT(dest->Index < MAX_PROGRAM_TEMPS); + dstReg = (GLuint *) machine->Temporaries[dest->Index]; + break; + case PROGRAM_WRITE_ONLY: + dstReg = dummyReg; + return; + default: + _mesa_problem(NULL, "bad register file in store_vector4(fp)"); + return; + } + + if (dest->CondMask != COND_TR) { + /* condition codes may turn off some writes */ + if (writeMask & WRITEMASK_X) { + if (!test_cc(machine->CondCodes[GET_SWZ(dest->CondSwizzle, 0)], + dest->CondMask)) + writeMask &= ~WRITEMASK_X; + } + if (writeMask & WRITEMASK_Y) { + if (!test_cc(machine->CondCodes[GET_SWZ(dest->CondSwizzle, 1)], + dest->CondMask)) + writeMask &= ~WRITEMASK_Y; + } + if (writeMask & WRITEMASK_Z) { + if (!test_cc(machine->CondCodes[GET_SWZ(dest->CondSwizzle, 2)], + dest->CondMask)) + writeMask &= ~WRITEMASK_Z; + } + if (writeMask & WRITEMASK_W) { + if (!test_cc(machine->CondCodes[GET_SWZ(dest->CondSwizzle, 3)], + dest->CondMask)) + writeMask &= ~WRITEMASK_W; + } + } + + if (writeMask & WRITEMASK_X) + dstReg[0] = value[0]; + if (writeMask & WRITEMASK_Y) + dstReg[1] = value[1]; + if (writeMask & WRITEMASK_Z) + dstReg[2] = value[2]; + if (writeMask & WRITEMASK_W) + dstReg[3] = value[3]; + + if (inst->CondUpdate) { + if (writeMask & WRITEMASK_X) + machine->CondCodes[0] = generate_cc(value[0]); + if (writeMask & WRITEMASK_Y) + machine->CondCodes[1] = generate_cc(value[1]); + if (writeMask & WRITEMASK_Z) + machine->CondCodes[2] = generate_cc(value[2]); + if (writeMask & WRITEMASK_W) + machine->CondCodes[3] = generate_cc(value[3]); +#if DEBUG_PROG + printf("CondCodes=(%s,%s,%s,%s) for:\n", + _mesa_condcode_string(machine->CondCodes[0]), + _mesa_condcode_string(machine->CondCodes[1]), + _mesa_condcode_string(machine->CondCodes[2]), + _mesa_condcode_string(machine->CondCodes[3])); +#endif + } +} + + + /** * Execute the given vertex/fragment program. * @@ -571,6 +686,18 @@ _mesa_execute_program(GLcontext * ctx, } } break; + case OPCODE_AND: /* bitwise AND */ + { + GLuint a[4], b[4], result[4]; + fetch_vector4ui(&inst->SrcReg[0], machine, a); + fetch_vector4ui(&inst->SrcReg[1], machine, b); + result[0] = a[0] & b[0]; + result[1] = a[1] & b[1]; + result[2] = a[2] & b[2]; + result[3] = a[3] & b[3]; + store_vector4ui(inst, machine, result); + } + break; case OPCODE_ARL: { GLfloat t[4]; @@ -1019,6 +1146,17 @@ _mesa_execute_program(GLcontext * ctx, break; case OPCODE_NOP: break; + case OPCODE_NOT: /* bitwise NOT */ + { + GLuint a[4], result[4]; + fetch_vector4ui(&inst->SrcReg[0], machine, a); + result[0] = ~a[0]; + result[1] = ~a[1]; + result[2] = ~a[2]; + result[3] = ~a[3]; + store_vector4ui(inst, machine, result); + } + break; case OPCODE_NRM3: /* 3-component normalization */ { GLfloat a[4], result[4]; @@ -1049,39 +1187,53 @@ _mesa_execute_program(GLcontext * ctx, store_vector4(inst, machine, result); } break; + case OPCODE_OR: /* bitwise OR */ + { + GLuint a[4], b[4], result[4]; + fetch_vector4ui(&inst->SrcReg[0], machine, a); + fetch_vector4ui(&inst->SrcReg[1], machine, b); + result[0] = a[0] | b[0]; + result[1] = a[1] | b[1]; + result[2] = a[2] | b[2]; + result[3] = a[3] | b[3]; + store_vector4ui(inst, machine, result); + } + break; case OPCODE_PK2H: /* pack two 16-bit floats in one 32-bit float */ { - GLfloat a[4], result[4]; + GLfloat a[4]; + GLuint result[4]; GLhalfNV hx, hy; - GLuint *rawResult = (GLuint *) result; - GLuint twoHalves; fetch_vector4(&inst->SrcReg[0], machine, a); hx = _mesa_float_to_half(a[0]); hy = _mesa_float_to_half(a[1]); - twoHalves = hx | (hy << 16); - rawResult[0] = rawResult[1] = rawResult[2] = rawResult[3] - = twoHalves; - store_vector4(inst, machine, result); + result[0] = + result[1] = + result[2] = + result[3] = hx | (hy << 16); + store_vector4ui(inst, machine, result); } break; case OPCODE_PK2US: /* pack two GLushorts into one 32-bit float */ { - GLfloat a[4], result[4]; - GLuint usx, usy, *rawResult = (GLuint *) result; + GLfloat a[4]; + GLuint result[4], usx, usy; fetch_vector4(&inst->SrcReg[0], machine, a); a[0] = CLAMP(a[0], 0.0F, 1.0F); a[1] = CLAMP(a[1], 0.0F, 1.0F); usx = IROUND(a[0] * 65535.0F); usy = IROUND(a[1] * 65535.0F); - rawResult[0] = rawResult[1] = rawResult[2] = rawResult[3] - = usx | (usy << 16); - store_vector4(inst, machine, result); + result[0] = + result[1] = + result[2] = + result[3] = usx | (usy << 16); + store_vector4ui(inst, machine, result); } break; case OPCODE_PK4B: /* pack four GLbytes into one 32-bit float */ { - GLfloat a[4], result[4]; - GLuint ubx, uby, ubz, ubw, *rawResult = (GLuint *) result; + GLfloat a[4]; + GLuint result[4], ubx, uby, ubz, ubw; fetch_vector4(&inst->SrcReg[0], machine, a); a[0] = CLAMP(a[0], -128.0F / 127.0F, 1.0F); a[1] = CLAMP(a[1], -128.0F / 127.0F, 1.0F); @@ -1091,15 +1243,17 @@ _mesa_execute_program(GLcontext * ctx, uby = IROUND(127.0F * a[1] + 128.0F); ubz = IROUND(127.0F * a[2] + 128.0F); ubw = IROUND(127.0F * a[3] + 128.0F); - rawResult[0] = rawResult[1] = rawResult[2] = rawResult[3] - = ubx | (uby << 8) | (ubz << 16) | (ubw << 24); - store_vector4(inst, machine, result); + result[0] = + result[1] = + result[2] = + result[3] = ubx | (uby << 8) | (ubz << 16) | (ubw << 24); + store_vector4ui(inst, machine, result); } break; case OPCODE_PK4UB: /* pack four GLubytes into one 32-bit float */ { - GLfloat a[4], result[4]; - GLuint ubx, uby, ubz, ubw, *rawResult = (GLuint *) result; + GLfloat a[4]; + GLuint result[4], ubx, uby, ubz, ubw; fetch_vector4(&inst->SrcReg[0], machine, a); a[0] = CLAMP(a[0], 0.0F, 1.0F); a[1] = CLAMP(a[1], 0.0F, 1.0F); @@ -1109,9 +1263,11 @@ _mesa_execute_program(GLcontext * ctx, uby = IROUND(255.0F * a[1]); ubz = IROUND(255.0F * a[2]); ubw = IROUND(255.0F * a[3]); - rawResult[0] = rawResult[1] = rawResult[2] = rawResult[3] - = ubx | (uby << 8) | (ubz << 16) | (ubw << 24); - store_vector4(inst, machine, result); + result[0] = + result[1] = + result[2] = + result[3] = ubx | (uby << 8) | (ubz << 16) | (ubw << 24); + store_vector4ui(inst, machine, result); } break; case OPCODE_POW: @@ -1516,6 +1672,18 @@ _mesa_execute_program(GLcontext * ctx, store_vector4(inst, machine, result); } break; + case OPCODE_XOR: /* bitwise XOR */ + { + GLuint a[4], b[4], result[4]; + fetch_vector4ui(&inst->SrcReg[0], machine, a); + fetch_vector4ui(&inst->SrcReg[1], machine, b); + result[0] = a[0] ^ b[0]; + result[1] = a[1] ^ b[1]; + result[2] = a[2] ^ b[2]; + result[3] = a[3] ^ b[3]; + store_vector4ui(inst, machine, result); + } + break; case OPCODE_XPD: /* cross product */ { GLfloat a[4], b[4], result[4]; diff --git a/src/mesa/shader/prog_instruction.c b/src/mesa/shader/prog_instruction.c index d4f3bcb0e5..ac9d9e1bb7 100644 --- a/src/mesa/shader/prog_instruction.c +++ b/src/mesa/shader/prog_instruction.c @@ -154,6 +154,7 @@ static const struct instruction_info InstInfo[MAX_OPCODE] = { { OPCODE_NOP, "NOP", 0, 0 }, { OPCODE_ABS, "ABS", 1, 1 }, { OPCODE_ADD, "ADD", 2, 1 }, + { OPCODE_AND, "AND", 2, 1 }, { OPCODE_ARA, "ARA", 1, 1 }, { OPCODE_ARL, "ARL", 1, 1 }, { OPCODE_ARL_NV, "ARL", 1, 1 }, @@ -193,10 +194,12 @@ static const struct instruction_info InstInfo[MAX_OPCODE] = { { OPCODE_MIN, "MIN", 2, 1 }, { OPCODE_MOV, "MOV", 1, 1 }, { OPCODE_MUL, "MUL", 2, 1 }, + { OPCODE_NOT, "NOT", 1, 1 }, { OPCODE_NOISE1, "NOISE1", 1, 1 }, { OPCODE_NOISE2, "NOISE2", 1, 1 }, { OPCODE_NOISE3, "NOISE3", 1, 1 }, { OPCODE_NOISE4, "NOISE4", 1, 1 }, + { OPCODE_OR, "OR", 2, 1 }, { OPCODE_NRM3, "NRM3", 1, 1 }, { OPCODE_NRM4, "NRM4", 1, 1 }, { OPCODE_PK2H, "PK2H", 1, 1 }, @@ -237,6 +240,7 @@ static const struct instruction_info InstInfo[MAX_OPCODE] = { { OPCODE_UP4B, "UP4B", 1, 1 }, { OPCODE_UP4UB, "UP4UB", 1, 1 }, { OPCODE_X2D, "X2D", 3, 1 }, + { OPCODE_XOR, "XOR", 2, 1 }, { OPCODE_XPD, "XPD", 2, 1 } }; diff --git a/src/mesa/shader/prog_instruction.h b/src/mesa/shader/prog_instruction.h index 3bcd0829a2..2cb2014cd4 100644 --- a/src/mesa/shader/prog_instruction.h +++ b/src/mesa/shader/prog_instruction.h @@ -145,6 +145,7 @@ typedef enum prog_opcode { OPCODE_NOP = 0, /* X */ OPCODE_ABS, /* X X 1.1 X */ OPCODE_ADD, /* X X X X X */ + OPCODE_AND, /* */ OPCODE_ARA, /* 2 */ OPCODE_ARL, /* X X */ OPCODE_ARL_NV, /* 2 */ @@ -188,8 +189,10 @@ typedef enum prog_opcode { OPCODE_NOISE2, /* X */ OPCODE_NOISE3, /* X */ OPCODE_NOISE4, /* X */ + OPCODE_NOT, /* */ OPCODE_NRM3, /* */ OPCODE_NRM4, /* */ + OPCODE_OR, /* */ OPCODE_PK2H, /* X */ OPCODE_PK2US, /* X */ OPCODE_PK4B, /* X */ @@ -228,6 +231,7 @@ typedef enum prog_opcode { OPCODE_UP4B, /* X */ OPCODE_UP4UB, /* X */ OPCODE_X2D, /* X */ + OPCODE_XOR, /* */ OPCODE_XPD, /* X X X */ MAX_OPCODE } gl_inst_opcode; -- cgit v1.2.3 From 65cb74ecc0287d766493fd3649295e2e1b20099b Mon Sep 17 00:00:00 2001 From: Brian Paul Date: Fri, 7 Nov 2008 09:41:00 -0700 Subject: mesa: added DP2, DP2A instructions --- src/mesa/shader/prog_execute.c | 30 ++++++++++++++++++++++++++++-- src/mesa/shader/prog_instruction.c | 2 ++ src/mesa/shader/prog_instruction.h | 2 ++ 3 files changed, 32 insertions(+), 2 deletions(-) (limited to 'src') diff --git a/src/mesa/shader/prog_execute.c b/src/mesa/shader/prog_execute.c index b47421d5a1..ef17ed128a 100644 --- a/src/mesa/shader/prog_execute.c +++ b/src/mesa/shader/prog_execute.c @@ -776,6 +776,33 @@ _mesa_execute_program(GLcontext * ctx, store_vector4(inst, machine, result); } break; + case OPCODE_DP2: + { + GLfloat a[4], b[4], result[4]; + fetch_vector4(&inst->SrcReg[0], machine, a); + fetch_vector4(&inst->SrcReg[1], machine, b); + result[0] = result[1] = result[2] = result[3] = DOT2(a, b); + store_vector4(inst, machine, result); + if (DEBUG_PROG) { + printf("DP2 %g = (%g %g) . (%g %g)\n", + result[0], a[0], a[1], b[0], b[1]); + } + } + break; + case OPCODE_DP2A: + { + GLfloat a[4], b[4], c, result[4]; + fetch_vector4(&inst->SrcReg[0], machine, a); + fetch_vector4(&inst->SrcReg[1], machine, b); + fetch_vector1(&inst->SrcReg[1], machine, &c); + result[0] = result[1] = result[2] = result[3] = DOT2(a, b) + c; + store_vector4(inst, machine, result); + if (DEBUG_PROG) { + printf("DP2A %g = (%g %g) . (%g %g) + %g\n", + result[0], a[0], a[1], b[0], b[1], c); + } + } + break; case OPCODE_DP3: { GLfloat a[4], b[4], result[4]; @@ -808,8 +835,7 @@ _mesa_execute_program(GLcontext * ctx, GLfloat a[4], b[4], result[4]; fetch_vector4(&inst->SrcReg[0], machine, a); fetch_vector4(&inst->SrcReg[1], machine, b); - result[0] = result[1] = result[2] = result[3] = - a[0] * b[0] + a[1] * b[1] + a[2] * b[2] + b[3]; + result[0] = result[1] = result[2] = result[3] = DOT3(a, b) + b[3]; store_vector4(inst, machine, result); } break; diff --git a/src/mesa/shader/prog_instruction.c b/src/mesa/shader/prog_instruction.c index ac9d9e1bb7..54df3fb2e1 100644 --- a/src/mesa/shader/prog_instruction.c +++ b/src/mesa/shader/prog_instruction.c @@ -169,6 +169,8 @@ static const struct instruction_info InstInfo[MAX_OPCODE] = { { OPCODE_COS, "COS", 1, 1 }, { OPCODE_DDX, "DDX", 1, 1 }, { OPCODE_DDY, "DDY", 1, 1 }, + { OPCODE_DP2, "DP2", 2, 1 }, + { OPCODE_DP2A, "DP2A", 3, 1 }, { OPCODE_DP3, "DP3", 2, 1 }, { OPCODE_DP4, "DP4", 2, 1 }, { OPCODE_DPH, "DPH", 2, 1 }, diff --git a/src/mesa/shader/prog_instruction.h b/src/mesa/shader/prog_instruction.h index 2cb2014cd4..855a80e242 100644 --- a/src/mesa/shader/prog_instruction.h +++ b/src/mesa/shader/prog_instruction.h @@ -160,6 +160,8 @@ typedef enum prog_opcode { OPCODE_COS, /* X 2 X X */ OPCODE_DDX, /* X X */ OPCODE_DDY, /* X X */ + OPCODE_DP2, /* 2 */ + OPCODE_DP2A, /* 2 */ OPCODE_DP3, /* X X X X X */ OPCODE_DP4, /* X X X X X */ OPCODE_DPH, /* X X 1.1 */ -- cgit v1.2.3 From a98a25c25ff1ec3be74cf9c5f027b85a297c3e78 Mon Sep 17 00:00:00 2001 From: Brian Paul Date: Fri, 7 Nov 2008 09:49:26 -0700 Subject: mesa: add GLSL support for DP2, NRM3, NRM4 instructions (not actually emitted yet though) --- src/mesa/shader/slang/slang_codegen.c | 3 +++ src/mesa/shader/slang/slang_emit.c | 8 +++++++- src/mesa/shader/slang/slang_ir.c | 7 +++++-- src/mesa/shader/slang/slang_ir.h | 3 +++ 4 files changed, 18 insertions(+), 3 deletions(-) (limited to 'src') diff --git a/src/mesa/shader/slang/slang_codegen.c b/src/mesa/shader/slang/slang_codegen.c index d83e3b01e6..ea35d67969 100644 --- a/src/mesa/shader/slang/slang_codegen.c +++ b/src/mesa/shader/slang/slang_codegen.c @@ -413,6 +413,9 @@ static slang_asm_info AsmInfo[] = { { "vec4_multiply", IR_MUL, 1, 2 }, { "vec4_dot", IR_DOT4, 1, 2 }, { "vec3_dot", IR_DOT3, 1, 2 }, + { "vec2_dot", IR_DOT2, 1, 2 }, + { "vec3_nrm", IR_NRM3, 1, 1 }, + { "vec4_nrm", IR_NRM4, 1, 1 }, { "vec3_cross", IR_CROSS, 1, 2 }, { "vec4_lrp", IR_LRP, 1, 3 }, { "vec4_min", IR_MIN, 1, 2 }, diff --git a/src/mesa/shader/slang/slang_emit.c b/src/mesa/shader/slang/slang_emit.c index 672ec4bd60..827760c917 100644 --- a/src/mesa/shader/slang/slang_emit.c +++ b/src/mesa/shader/slang/slang_emit.c @@ -488,6 +488,9 @@ instruction_annotation(gl_inst_opcode opcode, char *dstAnnot, case OPCODE_MUL: operator = "*"; break; + case OPCODE_DP2: + operator = "DP2"; + break; case OPCODE_DP3: operator = "DP3"; break; @@ -708,7 +711,7 @@ emit_compare(slang_emit_info *emitInfo, slang_ir_node *n) } else { assert(size == 2); - dotOp = OPCODE_DP3; + dotOp = OPCODE_DP3; /* XXX use OPCODE_DP2 eventually */ swizzle = MAKE_SWIZZLE4(SWIZZLE_X, SWIZZLE_Y, SWIZZLE_Y, SWIZZLE_Y); } @@ -1893,12 +1896,15 @@ emit(slang_emit_info *emitInfo, slang_ir_node *n) case IR_NOISE2: case IR_NOISE3: case IR_NOISE4: + case IR_NRM4: + case IR_NRM3: /* binary */ case IR_ADD: case IR_SUB: case IR_MUL: case IR_DOT4: case IR_DOT3: + case IR_DOT2: case IR_CROSS: case IR_MIN: case IR_MAX: diff --git a/src/mesa/shader/slang/slang_ir.c b/src/mesa/shader/slang/slang_ir.c index 711ee516b1..9d055bf354 100644 --- a/src/mesa/shader/slang/slang_ir.c +++ b/src/mesa/shader/slang/slang_ir.c @@ -37,8 +37,11 @@ static const slang_ir_info IrInfo[] = { { IR_SUB, "IR_SUB", OPCODE_SUB, 4, 2 }, { IR_MUL, "IR_MUL", OPCODE_MUL, 4, 2 }, { IR_DIV, "IR_DIV", OPCODE_NOP, 0, 2 }, /* XXX broke */ - { IR_DOT4, "IR_DOT_4", OPCODE_DP4, 1, 2 }, - { IR_DOT3, "IR_DOT_3", OPCODE_DP3, 1, 2 }, + { IR_DOT4, "IR_DOT4", OPCODE_DP4, 1, 2 }, + { IR_DOT3, "IR_DOT3", OPCODE_DP3, 1, 2 }, + { IR_DOT2, "IR_DOT2", OPCODE_DP2, 1, 2 }, + { IR_NRM4, "IR_NRM4", OPCODE_NRM4, 1, 1 }, + { IR_NRM3, "IR_NRM3", OPCODE_NRM3, 1, 1 }, { IR_CROSS, "IR_CROSS", OPCODE_XPD, 3, 2 }, { IR_LRP, "IR_LRP", OPCODE_LRP, 4, 3 }, { IR_MIN, "IR_MIN", OPCODE_MIN, 4, 2 }, diff --git a/src/mesa/shader/slang/slang_ir.h b/src/mesa/shader/slang/slang_ir.h index f64f9a93b7..ab0353c28a 100644 --- a/src/mesa/shader/slang/slang_ir.h +++ b/src/mesa/shader/slang/slang_ir.h @@ -83,6 +83,9 @@ typedef enum IR_DIV, IR_DOT4, IR_DOT3, + IR_DOT2, + IR_NRM4, + IR_NRM3, IR_CROSS, /* vec3 cross product */ IR_LRP, IR_CLAMP, -- cgit v1.2.3