From e92492295ba6a716b69adcd14e80adf6b5900132 Mon Sep 17 00:00:00 2001
From: Maciej Cencora <m.cencora@gmail.com>
Date: Sat, 7 Nov 2009 22:03:32 +0100
Subject: r300: remove unneeded includes

---
 src/mesa/drivers/dri/r300/r300_cmdbuf.c | 2 --
 src/mesa/drivers/dri/r300/r300_emit.h   | 1 -
 src/mesa/drivers/dri/r300/r300_render.c | 2 --
 3 files changed, 5 deletions(-)

(limited to 'src')

diff --git a/src/mesa/drivers/dri/r300/r300_cmdbuf.c b/src/mesa/drivers/dri/r300/r300_cmdbuf.c
index 1e2a54f634..8a56b9e63c 100644
--- a/src/mesa/drivers/dri/r300/r300_cmdbuf.c
+++ b/src/mesa/drivers/dri/r300/r300_cmdbuf.c
@@ -46,14 +46,12 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 
 #include "r300_context.h"
 #include "r300_ioctl.h"
-#include "radeon_reg.h"
 #include "r300_reg.h"
 #include "r300_cmdbuf.h"
 #include "r300_emit.h"
 #include "radeon_bocs_wrapper.h"
 #include "radeon_mipmap_tree.h"
 #include "r300_state.h"
-#include "radeon_reg.h"
 #include "radeon_queryobj.h"
 
 /** # of dwords reserved for additional instructions that may need to be written
diff --git a/src/mesa/drivers/dri/r300/r300_emit.h b/src/mesa/drivers/dri/r300/r300_emit.h
index 8e57e354d1..a456d8867c 100644
--- a/src/mesa/drivers/dri/r300/r300_emit.h
+++ b/src/mesa/drivers/dri/r300/r300_emit.h
@@ -42,7 +42,6 @@
 #include "main/glheader.h"
 #include "r300_context.h"
 #include "r300_cmdbuf.h"
-#include "radeon_reg.h"
 
 static INLINE uint32_t cmdpacket0(struct radeon_screen *rscrn,
                                   int reg, int count)
diff --git a/src/mesa/drivers/dri/r300/r300_render.c b/src/mesa/drivers/dri/r300/r300_render.c
index 3cd38753b8..4ae593cbe7 100644
--- a/src/mesa/drivers/dri/r300/r300_render.c
+++ b/src/mesa/drivers/dri/r300/r300_render.c
@@ -67,8 +67,6 @@ USE OR OTHER DEALINGS IN THE SOFTWARE.
 #include "vbo/vbo_split.h"
 #include "tnl/tnl.h"
 #include "tnl/t_vp_build.h"
-#include "radeon_reg.h"
-#include "radeon_macros.h"
 #include "r300_context.h"
 #include "r300_ioctl.h"
 #include "r300_state.h"
-- 
cgit v1.2.3


From 0aad2aee66392989777ee74078efda197f292ee7 Mon Sep 17 00:00:00 2001
From: Maciej Cencora <m.cencora@gmail.com>
Date: Sun, 8 Nov 2009 16:58:07 +0100
Subject: r300: add missing texformat

---
 src/mesa/drivers/dri/r300/r300_texstate.c | 1 +
 1 file changed, 1 insertion(+)

(limited to 'src')

diff --git a/src/mesa/drivers/dri/r300/r300_texstate.c b/src/mesa/drivers/dri/r300/r300_texstate.c
index 44ca24daf8..4699342994 100644
--- a/src/mesa/drivers/dri/r300/r300_texstate.c
+++ b/src/mesa/drivers/dri/r300/r300_texstate.c
@@ -83,6 +83,7 @@ static const struct tx_table {
 	_ASSIGN(ARGB8888, R300_EASY_TX_FORMAT(W, Z, Y, X, W8Z8Y8X8)),
 	_ASSIGN(ARGB8888_REV, R300_EASY_TX_FORMAT(X, Y, Z, W, W8Z8Y8X8)),
 #endif
+	_ASSIGN(XRGB8888, R300_EASY_TX_FORMAT(X, Y, Z, ONE, W8Z8Y8X8)),
 	_ASSIGN(RGB888, R300_EASY_TX_FORMAT(X, Y, Z, ONE, W8Z8Y8X8)),
 	_ASSIGN(RGB565, R300_EASY_TX_FORMAT(X, Y, Z, ONE, Z5Y6X5)),
 	_ASSIGN(RGB565_REV, R300_EASY_TX_FORMAT(X, Y, Z, ONE, Z5Y6X5)),
-- 
cgit v1.2.3


From 49876ab6a7f2b06177d7ac9651bd7a07956cbb25 Mon Sep 17 00:00:00 2001
From: Maciej Cencora <m.cencora@gmail.com>
Date: Mon, 9 Nov 2009 23:11:29 +0100
Subject: radeon: remove unnecessary call to radeonEmitState

fixes bo space accounting errors
---
 src/mesa/drivers/dri/radeon/radeon_common.c | 2 --
 1 file changed, 2 deletions(-)

(limited to 'src')

diff --git a/src/mesa/drivers/dri/radeon/radeon_common.c b/src/mesa/drivers/dri/radeon/radeon_common.c
index 097ab7cf61..420dce4ac9 100644
--- a/src/mesa/drivers/dri/radeon/radeon_common.c
+++ b/src/mesa/drivers/dri/radeon/radeon_common.c
@@ -1123,8 +1123,6 @@ void radeonFlush(GLcontext *ctx)
 	if (radeon->dma.flush)
 		radeon->dma.flush( ctx );
 
-	radeonEmitState(radeon);
-
 	if (radeon->cmdbuf.cs->cdw)
 		rcommonFlushCmdBuf(radeon, __FUNCTION__);
 
-- 
cgit v1.2.3


From 084f43c1502db1988ca53494ea590cf1351180ec Mon Sep 17 00:00:00 2001
From: Maciej Cencora <m.cencora@gmail.com>
Date: Wed, 11 Nov 2009 12:53:06 +0100
Subject: radeon: add radeon_bo_is_referenced_by_cs function

---
 src/mesa/drivers/dri/radeon/radeon_bo_drm.h | 13 +++++++++++++
 1 file changed, 13 insertions(+)

(limited to 'src')

diff --git a/src/mesa/drivers/dri/radeon/radeon_bo_drm.h b/src/mesa/drivers/dri/radeon/radeon_bo_drm.h
index 7141371633..46e30b905a 100644
--- a/src/mesa/drivers/dri/radeon/radeon_bo_drm.h
+++ b/src/mesa/drivers/dri/radeon/radeon_bo_drm.h
@@ -39,6 +39,7 @@
 #define RADEON_BO_FLAGS_MICRO_TILE  2
 
 struct radeon_bo_manager;
+struct radeon_cs;
 
 struct radeon_bo {
     uint32_t                    alignment;
@@ -74,6 +75,7 @@ struct radeon_bo_funcs {
     int (*bo_get_tiling)(struct radeon_bo *bo, uint32_t *tiling_flags,
 			  uint32_t *pitch);
     int (*bo_is_busy)(struct radeon_bo *bo, uint32_t *domain);
+    int (*bo_is_referenced_by_cs)(struct radeon_bo *bo, struct radeon_cs *cs);
 };
 
 struct radeon_bo_manager {
@@ -199,6 +201,15 @@ static inline int radeon_bo_is_static(struct radeon_bo *bo)
 	return 0;
 }
 
+static inline int _radeon_bo_is_referenced_by_cs(struct radeon_bo *bo,
+                                                 struct radeon_cs *cs,
+                                                 const char *file,
+                                                 const char *func,
+                                                 unsigned line)
+{
+    return bo->cref > 1;
+}
+
 #define radeon_bo_open(bom, h, s, a, d, f)\
     _radeon_bo_open(bom, h, s, a, d, f, __FILE__, __FUNCTION__, __LINE__)
 #define radeon_bo_ref(bo)\
@@ -215,5 +226,7 @@ static inline int radeon_bo_is_static(struct radeon_bo *bo)
     _radeon_bo_wait(bo, __FILE__, __func__, __LINE__)
 #define radeon_bo_is_busy(bo, domain) \
     _radeon_bo_is_busy(bo, domain, __FILE__, __func__, __LINE__)
+#define radeon_bo_is_referenced_by_cs(bo, cs) \
+    _radeon_bo_is_referenced_by_cs(bo, cs, __FILE__, __FUNCTION__, __LINE__)
 
 #endif
-- 
cgit v1.2.3


From f6d0993212fac0eb67827716be1ab4a292c8b4e5 Mon Sep 17 00:00:00 2001
From: Maciej Cencora <m.cencora@gmail.com>
Date: Wed, 11 Nov 2009 13:00:10 +0100
Subject: radeon: fix glBufferSubData

---
 src/mesa/drivers/dri/radeon/radeon_buffer_objects.c | 5 +++++
 1 file changed, 5 insertions(+)

(limited to 'src')

diff --git a/src/mesa/drivers/dri/radeon/radeon_buffer_objects.c b/src/mesa/drivers/dri/radeon/radeon_buffer_objects.c
index 8fac5c6c51..99d3ec7005 100644
--- a/src/mesa/drivers/dri/radeon/radeon_buffer_objects.c
+++ b/src/mesa/drivers/dri/radeon/radeon_buffer_objects.c
@@ -136,8 +136,13 @@ radeonBufferSubData(GLcontext * ctx,
                     const GLvoid * data,
                     struct gl_buffer_object *obj)
 {
+    radeonContextPtr radeon = RADEON_CONTEXT(ctx);
     struct radeon_buffer_object *radeon_obj = get_radeon_buffer_object(obj);
 
+    if (radeon_bo_is_referenced_by_cs(radeon_obj->bo, radeon->cmdbuf.cs)) {
+        radeon_firevertices(radeon);
+    }
+
     radeon_bo_map(radeon_obj->bo, GL_TRUE);
 
     _mesa_memcpy(radeon_obj->bo->ptr + offset, data, size);
-- 
cgit v1.2.3


From 286bf89e5a1fc931dbf523ded861b809859485e2 Mon Sep 17 00:00:00 2001
From: Maciej Cencora <m.cencora@gmail.com>
Date: Wed, 11 Nov 2009 13:06:19 +0100
Subject: radeon/r300: no need to flush the cmdbuf when changing scissors state
 in KMM mode

---
 src/mesa/drivers/dri/r300/r300_state.c      | 3 ++-
 src/mesa/drivers/dri/radeon/radeon_common.c | 4 +++-
 2 files changed, 5 insertions(+), 2 deletions(-)

(limited to 'src')

diff --git a/src/mesa/drivers/dri/r300/r300_state.c b/src/mesa/drivers/dri/r300/r300_state.c
index ac20c08e20..1fd32d497b 100644
--- a/src/mesa/drivers/dri/r300/r300_state.c
+++ b/src/mesa/drivers/dri/r300/r300_state.c
@@ -1741,7 +1741,8 @@ static void r300Enable(GLcontext * ctx, GLenum cap, GLboolean state)
 		r300SetPolygonOffsetState(ctx, state);
 		break;
 	case GL_SCISSOR_TEST:
-		radeon_firevertices(&rmesa->radeon);
+		if (!rmesa->radeon.radeonScreen->kernel_mm)
+			radeon_firevertices(&rmesa->radeon);
 		rmesa->radeon.state.scissor.enabled = state;
 		radeonUpdateScissor( ctx );
 		break;
diff --git a/src/mesa/drivers/dri/radeon/radeon_common.c b/src/mesa/drivers/dri/radeon/radeon_common.c
index 420dce4ac9..cb344f1d21 100644
--- a/src/mesa/drivers/dri/radeon/radeon_common.c
+++ b/src/mesa/drivers/dri/radeon/radeon_common.c
@@ -257,7 +257,9 @@ void radeonScissor(GLcontext* ctx, GLint x, GLint y, GLsizei w, GLsizei h)
 	radeonContextPtr radeon = RADEON_CONTEXT(ctx);
 	if (ctx->Scissor.Enabled) {
 		/* We don't pipeline cliprect changes */
-		radeon_firevertices(radeon);
+		if (!radeon->radeonScreen->kernel_mm) {
+			radeon_firevertices(radeon);
+		}
 		radeonUpdateScissor(ctx);
 	}
 }
-- 
cgit v1.2.3


From d3fa67c9b83b5736724ca57a0487857631e6c415 Mon Sep 17 00:00:00 2001
From: Maciej Cencora <m.cencora@gmail.com>
Date: Wed, 11 Nov 2009 13:50:06 +0100
Subject: radeon/r300: don't flush cmdbuf if not necessary

---
 src/mesa/drivers/dri/r300/r300_tex.c         |  6 +++++-
 src/mesa/drivers/dri/radeon/radeon_texture.c | 16 ++++++++++++++--
 2 files changed, 19 insertions(+), 3 deletions(-)

(limited to 'src')

diff --git a/src/mesa/drivers/dri/r300/r300_tex.c b/src/mesa/drivers/dri/r300/r300_tex.c
index 27b78a912f..427237d200 100644
--- a/src/mesa/drivers/dri/r300/r300_tex.c
+++ b/src/mesa/drivers/dri/r300/r300_tex.c
@@ -270,7 +270,11 @@ static void r300DeleteTexture(GLcontext * ctx, struct gl_texture_object *texObj)
 
 	if (rmesa) {
 		int i;
-		radeon_firevertices(&rmesa->radeon);
+		struct radeon_bo *bo;
+		bo = !t->mt ? t->bo : t->mt->bo;
+		if (bo && radeon_bo_is_referenced_by_cs(bo, rmesa->radeon.cmdbuf.cs)) {
+			radeon_firevertices(&rmesa->radeon);
+		}
 
 		for(i = 0; i < R300_MAX_TEXTURE_UNITS; ++i)
 			if (rmesa->hw.textures[i] == t)
diff --git a/src/mesa/drivers/dri/radeon/radeon_texture.c b/src/mesa/drivers/dri/radeon/radeon_texture.c
index baa99b752b..59bc8c34de 100644
--- a/src/mesa/drivers/dri/radeon/radeon_texture.c
+++ b/src/mesa/drivers/dri/radeon/radeon_texture.c
@@ -534,7 +534,13 @@ static void radeon_teximage(
 	GLuint texelBytes;
 	GLuint face = radeon_face_for_target(target);
 
-	radeon_firevertices(rmesa);
+	{
+		struct radeon_bo *bo;
+		bo = !image->mt ? image->bo : image->mt->bo;
+		if (bo && radeon_bo_is_referenced_by_cs(bo, rmesa->cmdbuf.cs)) {
+			radeon_firevertices(rmesa);
+		}
+	}
 
 	t->validated = GL_FALSE;
 
@@ -731,7 +737,13 @@ static void radeon_texsubimage(GLcontext* ctx, int dims, GLenum target, int leve
 	radeonTexObj* t = radeon_tex_obj(texObj);
 	radeon_texture_image* image = get_radeon_texture_image(texImage);
 
-	radeon_firevertices(rmesa);
+	{
+		struct radeon_bo *bo;
+		bo = !image->mt ? image->bo : image->mt->bo;
+		if (bo && radeon_bo_is_referenced_by_cs(bo, rmesa->cmdbuf.cs)) {
+			radeon_firevertices(rmesa);
+		}
+	}
 
 	t->validated = GL_FALSE;
 	if (compressed) {
-- 
cgit v1.2.3


From aa195611586cdfb21bb1707b12b16e461a92d42e Mon Sep 17 00:00:00 2001
From: Maciej Cencora <m.cencora@gmail.com>
Date: Wed, 11 Nov 2009 14:00:15 +0100
Subject: radeon: use radeon_bo_is_referenced_by_cs for query objects

---
 src/mesa/drivers/dri/radeon/radeon_common.c         |  3 ---
 src/mesa/drivers/dri/radeon/radeon_common_context.c |  1 -
 src/mesa/drivers/dri/radeon/radeon_common_context.h |  1 -
 src/mesa/drivers/dri/radeon/radeon_queryobj.c       | 21 +++------------------
 4 files changed, 3 insertions(+), 23 deletions(-)

(limited to 'src')

diff --git a/src/mesa/drivers/dri/radeon/radeon_common.c b/src/mesa/drivers/dri/radeon/radeon_common.c
index cb344f1d21..3b4366aa61 100644
--- a/src/mesa/drivers/dri/radeon/radeon_common.c
+++ b/src/mesa/drivers/dri/radeon/radeon_common.c
@@ -1147,9 +1147,6 @@ void radeonFlush(GLcontext *ctx)
 			}
 		}
 	}
-
-	make_empty_list(&radeon->query.not_flushed_head);
-
 }
 
 /* Make sure all commands have been sent to the hardware and have
diff --git a/src/mesa/drivers/dri/radeon/radeon_common_context.c b/src/mesa/drivers/dri/radeon/radeon_common_context.c
index fe99644907..2a38c4599c 100644
--- a/src/mesa/drivers/dri/radeon/radeon_common_context.c
+++ b/src/mesa/drivers/dri/radeon/radeon_common_context.c
@@ -265,7 +265,6 @@ GLboolean radeonInitContext(radeonContextPtr radeon,
 		radeon->texture_compressed_row_align = 64;
 	}
 
-	make_empty_list(&radeon->query.not_flushed_head);
 	radeon_init_dma(radeon);
 
 	return GL_TRUE;
diff --git a/src/mesa/drivers/dri/radeon/radeon_common_context.h b/src/mesa/drivers/dri/radeon/radeon_common_context.h
index 0309345393..5a0678b9d6 100644
--- a/src/mesa/drivers/dri/radeon/radeon_common_context.h
+++ b/src/mesa/drivers/dri/radeon/radeon_common_context.h
@@ -502,7 +502,6 @@ struct radeon_context {
 
    struct {
 	struct radeon_query_object *current;
-	struct radeon_query_object not_flushed_head;
 	struct radeon_state_atom queryobj;
    } query;
 
diff --git a/src/mesa/drivers/dri/radeon/radeon_queryobj.c b/src/mesa/drivers/dri/radeon/radeon_queryobj.c
index 6539c36268..b734f86eb3 100644
--- a/src/mesa/drivers/dri/radeon/radeon_queryobj.c
+++ b/src/mesa/drivers/dri/radeon/radeon_queryobj.c
@@ -31,20 +31,6 @@
 #include "main/imports.h"
 #include "main/simple_list.h"
 
-static int radeonQueryIsFlushed(GLcontext *ctx, struct gl_query_object *q)
-{
-	radeonContextPtr radeon = RADEON_CONTEXT(ctx);
-	struct radeon_query_object *tmp, *query = (struct radeon_query_object *)q;
-
-	foreach(tmp, &radeon->query.not_flushed_head) {
-		if (tmp == query) {
-			return 0;
-		}
-	}
-
-	return 1;
-}
-
 static void radeonQueryGetResult(GLcontext *ctx, struct gl_query_object *q)
 {
 	radeonContextPtr radeon = RADEON_CONTEXT(ctx);
@@ -120,10 +106,11 @@ static void radeonDeleteQuery(GLcontext *ctx, struct gl_query_object *q)
 
 static void radeonWaitQuery(GLcontext *ctx, struct gl_query_object *q)
 {
+	radeonContextPtr radeon = RADEON_CONTEXT(ctx);
 	struct radeon_query_object *query = (struct radeon_query_object *)q;
 
 	/* If the cmdbuf with packets for this query hasn't been flushed yet, do it now */
-	if (!radeonQueryIsFlushed(ctx, q))
+	if (radeon_bo_is_referenced_by_cs(query->bo, radeon->cmdbuf.cs))
 		ctx->Driver.Flush(ctx);
 
 	radeon_print(RADEON_STATE, RADEON_VERBOSE, "%s: query id %d, bo %p, offset %d\n", __FUNCTION__, q->Id, query->bo, query->curr_offset);
@@ -155,8 +142,6 @@ static void radeonBeginQuery(GLcontext *ctx, struct gl_query_object *q)
 
 	radeon->query.queryobj.dirty = GL_TRUE;
 	radeon->hw.is_dirty = GL_TRUE;
-	insert_at_tail(&radeon->query.not_flushed_head, query);
-
 }
 
 void radeonEmitQueryEnd(GLcontext *ctx)
@@ -204,7 +189,7 @@ static void radeonCheckQuery(GLcontext *ctx, struct gl_query_object *q)
 		uint32_t domain;
 
 		/* Need to perform a flush, as per ARB_occlusion_query spec */
-		if (!radeonQueryIsFlushed(ctx, q)) {
+		if (radeon_bo_is_referenced_by_cs(query->bo, radeon->cmdbuf.cs)) {
 			ctx->Driver.Flush(ctx);
 		}
 
-- 
cgit v1.2.3


From 6e5d473cc16ca2d001df213fc1d907f2943a95bb Mon Sep 17 00:00:00 2001
From: Maciej Cencora <m.cencora@gmail.com>
Date: Wed, 11 Nov 2009 18:55:49 +0100
Subject: r300: fix regression introduced in
 1d5a06a1f7812c055db1d724e40d21a0e3686dd1

Spotted by Dave Airlie
---
 src/mesa/drivers/dri/r300/r300_context.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

(limited to 'src')

diff --git a/src/mesa/drivers/dri/r300/r300_context.c b/src/mesa/drivers/dri/r300/r300_context.c
index 6f66e970e4..3ed49a85c5 100644
--- a/src/mesa/drivers/dri/r300/r300_context.c
+++ b/src/mesa/drivers/dri/r300/r300_context.c
@@ -439,7 +439,7 @@ static void r300InitGLExtensions(GLcontext *ctx)
 	if (r300->options.stencil_two_side_disabled)
 		_mesa_disable_extension(ctx, "GL_EXT_stencil_two_side");
 
-	if (r300->options.s3tc_force_enabled) {
+	if (ctx->Mesa_DXTn || r300->options.s3tc_force_enabled) {
 		_mesa_enable_extension(ctx, "GL_EXT_texture_compression_s3tc");
 		_mesa_enable_extension(ctx, "GL_S3_s3tc");
 	} else if (r300->options.s3tc_force_disabled) {
-- 
cgit v1.2.3


From 7628b06ba32e42f57a4fdb322bc32e3b411c1f18 Mon Sep 17 00:00:00 2001
From: Maciej Cencora <m.cencora@gmail.com>
Date: Sat, 14 Nov 2009 14:55:13 +0100
Subject: radeon: rework mipmap tree reference counting

---
 src/mesa/drivers/dri/r300/r300_tex.c             | 13 ++++--------
 src/mesa/drivers/dri/r300/r300_texstate.c        | 12 ++++--------
 src/mesa/drivers/dri/radeon/radeon_mipmap_tree.c | 12 ++++++++++--
 src/mesa/drivers/dri/radeon/radeon_mipmap_tree.h |  5 +++--
 src/mesa/drivers/dri/radeon/radeon_texture.c     | 25 +++++++++---------------
 5 files changed, 30 insertions(+), 37 deletions(-)

(limited to 'src')

diff --git a/src/mesa/drivers/dri/r300/r300_tex.c b/src/mesa/drivers/dri/r300/r300_tex.c
index 427237d200..7e94e93df2 100644
--- a/src/mesa/drivers/dri/r300/r300_tex.c
+++ b/src/mesa/drivers/dri/r300/r300_tex.c
@@ -228,11 +228,8 @@ static void r300TexParameter(GLcontext * ctx, GLenum target,
 		 * we just have to rely on loading the right subset of mipmap levels
 		 * to simulate a clamped LOD.
 		 */
-		if (t->mt) {
-			radeon_miptree_unreference(t->mt);
-			t->mt = 0;
-			t->validated = GL_FALSE;
-		}
+		radeon_miptree_unreference(&t->mt);
+		t->validated = GL_FALSE;
 		break;
 
 	case GL_DEPTH_TEXTURE_MODE:
@@ -286,10 +283,8 @@ static void r300DeleteTexture(GLcontext * ctx, struct gl_texture_object *texObj)
 		t->bo = NULL;
 	}
 
-	if (t->mt) {
-		radeon_miptree_unreference(t->mt);
-		t->mt = 0;
-	}
+	radeon_miptree_unreference(&t->mt);
+
 	_mesa_delete_texture_object(ctx, texObj);
 }
 
diff --git a/src/mesa/drivers/dri/r300/r300_texstate.c b/src/mesa/drivers/dri/r300/r300_texstate.c
index 4699342994..7b1adcf31d 100644
--- a/src/mesa/drivers/dri/r300/r300_texstate.c
+++ b/src/mesa/drivers/dri/r300/r300_texstate.c
@@ -438,14 +438,10 @@ void r300SetTexBuffer2(__DRIcontext *pDRICtx, GLint target, GLint glx_texture_fo
 		radeon_bo_unref(rImage->bo);
 		rImage->bo = NULL;
 	}
-	if (t->mt) {
-		radeon_miptree_unreference(t->mt);
-		t->mt = NULL;
-	}
-	if (rImage->mt) {
-		radeon_miptree_unreference(rImage->mt);
-		rImage->mt = NULL;
-	}
+
+	radeon_miptree_unreference(&t->mt);
+	radeon_miptree_unreference(&rImage->mt);
+
 	_mesa_init_teximage_fields(radeon->glCtx, target, texImage,
 				   rb->base.Width, rb->base.Height, 1, 0, rb->cpp);
 	texImage->RowStride = rb->pitch / rb->cpp;
diff --git a/src/mesa/drivers/dri/radeon/radeon_mipmap_tree.c b/src/mesa/drivers/dri/radeon/radeon_mipmap_tree.c
index dadc72f4c1..f635f58d6a 100644
--- a/src/mesa/drivers/dri/radeon/radeon_mipmap_tree.c
+++ b/src/mesa/drivers/dri/radeon/radeon_mipmap_tree.c
@@ -223,23 +223,31 @@ radeon_mipmap_tree* radeon_miptree_create(radeonContextPtr rmesa, radeonTexObj *
 	return mt;
 }
 
-void radeon_miptree_reference(radeon_mipmap_tree *mt)
+void radeon_miptree_reference(radeon_mipmap_tree *mt, radeon_mipmap_tree **ptr)
 {
+	assert(!*ptr);
+
 	mt->refcount++;
 	assert(mt->refcount > 0);
+
+	*ptr = mt;
 }
 
-void radeon_miptree_unreference(radeon_mipmap_tree *mt)
+void radeon_miptree_unreference(radeon_mipmap_tree **ptr)
 {
+	radeon_mipmap_tree *mt = *ptr;
 	if (!mt)
 		return;
 
 	assert(mt->refcount > 0);
+
 	mt->refcount--;
 	if (!mt->refcount) {
 		radeon_bo_unref(mt->bo);
 		free(mt);
 	}
+
+	*ptr = 0;
 }
 
 
diff --git a/src/mesa/drivers/dri/radeon/radeon_mipmap_tree.h b/src/mesa/drivers/dri/radeon/radeon_mipmap_tree.h
index db28252da3..57299ceafa 100644
--- a/src/mesa/drivers/dri/radeon/radeon_mipmap_tree.h
+++ b/src/mesa/drivers/dri/radeon/radeon_mipmap_tree.h
@@ -87,8 +87,9 @@ radeon_mipmap_tree* radeon_miptree_create(radeonContextPtr rmesa, radeonTexObj *
 		GLenum target, GLenum internal_format, GLuint firstLevel, GLuint lastLevel,
 		GLuint width0, GLuint height0, GLuint depth0,
 		GLuint bpp, GLuint tilebits, GLuint compressed);
-void radeon_miptree_reference(radeon_mipmap_tree *mt);
-void radeon_miptree_unreference(radeon_mipmap_tree *mt);
+
+void radeon_miptree_reference(radeon_mipmap_tree *mt, radeon_mipmap_tree **ptr);
+void radeon_miptree_unreference(radeon_mipmap_tree **ptr);
 
 GLboolean radeon_miptree_matches_image(radeon_mipmap_tree *mt,
 		struct gl_texture_image *texImage, GLuint face, GLuint level);
diff --git a/src/mesa/drivers/dri/radeon/radeon_texture.c b/src/mesa/drivers/dri/radeon/radeon_texture.c
index 59bc8c34de..607ce7864e 100644
--- a/src/mesa/drivers/dri/radeon/radeon_texture.c
+++ b/src/mesa/drivers/dri/radeon/radeon_texture.c
@@ -81,8 +81,7 @@ void radeonFreeTexImageData(GLcontext *ctx, struct gl_texture_image *timage)
 	radeon_texture_image* image = get_radeon_texture_image(timage);
 
 	if (image->mt) {
-		radeon_miptree_unreference(image->mt);
-		image->mt = 0;
+		radeon_miptree_unreference(&image->mt);
 		assert(!image->base.Data);
 	} else {
 		_mesa_free_texture_image_data(ctx, timage);
@@ -240,8 +239,7 @@ static void radeon_generate_mipmap(GLcontext *ctx, GLenum target,
 			image->mtlevel = i;
 			image->mtface = face;
 
-			radeon_miptree_unreference(image->mt);
-			image->mt = NULL;
+			radeon_miptree_unreference(&image->mt);
 		}
 	}
 	
@@ -571,18 +569,16 @@ static void radeon_teximage(
 	    t->mt->lastLevel == level &&
 	    t->mt->target != GL_TEXTURE_CUBE_MAP_ARB &&
 	    !radeon_miptree_matches_image(t->mt, texImage, face, level)) {
-	  radeon_miptree_unreference(t->mt);
-	  t->mt = NULL;
+	  radeon_miptree_unreference(&t->mt);
 	}
 
 	if (!t->mt)
 		radeon_try_alloc_miptree(rmesa, t, image, face, level);
 	if (t->mt && radeon_miptree_matches_image(t->mt, texImage, face, level)) {
 		radeon_mipmap_level *lvl;
-		image->mt = t->mt;
 		image->mtlevel = level - t->mt->firstLevel;
 		image->mtface = face;
-		radeon_miptree_reference(t->mt);
+		radeon_miptree_reference(t->mt, &image->mt);
 		lvl = &image->mt->levels[image->mtlevel];
 		dstRowStride = lvl->rowstride;
 	} else {
@@ -894,7 +890,7 @@ static void migrate_image_to_miptree(radeon_mipmap_tree *mt, radeon_texture_imag
 			dstlvl->size);
 		radeon_bo_unmap(image->mt->bo);
 
-		radeon_miptree_unreference(image->mt);
+		radeon_miptree_unreference(&image->mt);
 	} else {
 		uint32_t srcrowstride;
 		uint32_t height;
@@ -919,10 +915,9 @@ static void migrate_image_to_miptree(radeon_mipmap_tree *mt, radeon_texture_imag
 
 	radeon_bo_unmap(mt->bo);
 
-	image->mt = mt;
 	image->mtface = face;
 	image->mtlevel = level;
-	radeon_miptree_reference(image->mt);
+	radeon_miptree_reference(mt, &image->mt);
 }
 
 int radeon_validate_texture_miptree(GLcontext * ctx, struct gl_texture_object *texObj)
@@ -954,12 +949,10 @@ int radeon_validate_texture_miptree(GLcontext * ctx, struct gl_texture_object *t
 	if (baseimage->mt &&
 	    baseimage->mt != t->mt &&
 	    radeon_miptree_matches_texture(baseimage->mt, &t->base)) {
-		radeon_miptree_unreference(t->mt);
-		t->mt = baseimage->mt;
-		radeon_miptree_reference(t->mt);
+		radeon_miptree_unreference(&t->mt);
+		radeon_miptree_reference(baseimage->mt, &t->mt);
 	} else if (t->mt && !radeon_miptree_matches_texture(t->mt, &t->base)) {
-		radeon_miptree_unreference(t->mt);
-		t->mt = 0;
+		radeon_miptree_unreference(&t->mt);
 	}
 
 	if (!t->mt) {
-- 
cgit v1.2.3


From 9d0af686b27b82dce8ad1ee4c951098660807be6 Mon Sep 17 00:00:00 2001
From: Maciej Cencora <m.cencora@gmail.com>
Date: Sat, 14 Nov 2009 15:03:31 +0100
Subject: radeon: minor refactoring of texture code

Also properly set dstImageOffsets for TexSubImage case.
---
 src/mesa/drivers/dri/radeon/radeon_texture.c | 57 ++++++++++++++++++++++------
 1 file changed, 46 insertions(+), 11 deletions(-)

(limited to 'src')

diff --git a/src/mesa/drivers/dri/radeon/radeon_texture.c b/src/mesa/drivers/dri/radeon/radeon_texture.c
index 607ce7864e..8fc686581b 100644
--- a/src/mesa/drivers/dri/radeon/radeon_texture.c
+++ b/src/mesa/drivers/dri/radeon/radeon_texture.c
@@ -508,6 +508,27 @@ gl_format radeonChooseTextureFormat(GLcontext * ctx,
 	return MESA_FORMAT_NONE;		/* never get here */
 }
 
+static GLuint * allocate_image_offsets(GLcontext *ctx,
+	unsigned alignedWidth,
+	unsigned height,
+	unsigned depth)
+{
+	int i;
+	GLuint *offsets;
+
+	offsets = _mesa_malloc(depth * sizeof(GLuint)) ;
+	if (!offsets) {
+		_mesa_error(ctx, GL_OUT_OF_MEMORY, "glTex[Sub]Image");
+		return NULL;
+	}
+
+	for (i = 0; i < depth; ++i) {
+		offsets[i] = alignedWidth * height * i;
+	}
+
+	return offsets;
+}
+
 /**
  * All glTexImage calls go through this function.
  */
@@ -605,8 +626,8 @@ static void radeon_teximage(
 	}
 
 	if (pixels) {
-		radeon_teximage_map(image, GL_TRUE);
 		if (compressed) {
+			radeon_teximage_map(image, GL_TRUE);
 			if (image->mt) {
 				uint32_t srcRowStride, bytesPerRow, rows;
 				srcRowStride = _mesa_format_row_stride(texImage->TexFormat, width);
@@ -629,19 +650,17 @@ static void radeon_teximage(
 			}
 
 			if (dims == 3) {
-				int i;
-
-				dstImageOffsets = _mesa_malloc(depth * sizeof(GLuint)) ;
-				if (!dstImageOffsets)
-					_mesa_error(ctx, GL_OUT_OF_MEMORY, "glTexImage");
-
-				for (i = 0; i < depth; ++i) {
-					dstImageOffsets[i] = dstRowStride/_mesa_get_format_bytes(texImage->TexFormat) * height * i;
+				unsigned alignedWidth = dstRowStride/_mesa_get_format_bytes(texImage->TexFormat);
+				dstImageOffsets = allocate_image_offsets(ctx, alignedWidth, height, depth);
+				if (!dstImageOffsets) {
+					return;
 				}
 			} else {
 				dstImageOffsets = texImage->ImageOffsets;
 			}
 
+			radeon_teximage_map(image, GL_TRUE);
+
 			if (!_mesa_texstore(ctx, dims,
 					    texImage->_BaseFormat,
 					    texImage->TexFormat,
@@ -752,7 +771,7 @@ static void radeon_texsubimage(GLcontext* ctx, int dims, GLenum target, int leve
 
 	if (pixels) {
 		GLint dstRowStride;
-		radeon_teximage_map(image, GL_TRUE);
+		GLuint *dstImageOffsets;
 
 		if (image->mt) {
 			radeon_mipmap_level *lvl = &image->mt->levels[image->mtlevel];
@@ -761,6 +780,18 @@ static void radeon_texsubimage(GLcontext* ctx, int dims, GLenum target, int leve
 			dstRowStride = texImage->RowStride * _mesa_get_format_bytes(texImage->TexFormat);
 		}
 
+		if (dims == 3) {
+			unsigned alignedWidth = dstRowStride/_mesa_get_format_bytes(texImage->TexFormat);
+			dstImageOffsets = allocate_image_offsets(ctx, alignedWidth, height, depth);
+			if (!dstImageOffsets) {
+				return;
+			}
+		} else {
+			dstImageOffsets = texImage->ImageOffsets;
+		}
+
+		radeon_teximage_map(image, GL_TRUE);
+
 		if (compressed) {
 			uint32_t srcRowStride, bytesPerRow, rows;
 			GLubyte *img_start;
@@ -786,12 +817,16 @@ static void radeon_texsubimage(GLcontext* ctx, int dims, GLenum target, int leve
 					    texImage->TexFormat, texImage->Data,
 					    xoffset, yoffset, zoffset,
 					    dstRowStride,
-					    texImage->ImageOffsets,
+					    dstImageOffsets,
 					    width, height, depth,
 					    format, type, pixels, packing)) {
 				_mesa_error(ctx, GL_OUT_OF_MEMORY, "glTexSubImage");
 			}
 		}
+
+		if (dims == 3) {
+			_mesa_free(dstImageOffsets);
+		}
 	}
 
 	radeon_teximage_unmap(image);
-- 
cgit v1.2.3


From 8f88cf3938f0156d4df6fcc5fde2711d40b85d03 Mon Sep 17 00:00:00 2001
From: Maciej Cencora <m.cencora@gmail.com>
Date: Sat, 14 Nov 2009 15:15:42 +0100
Subject: radeon: more texture code refactoring

---
 src/mesa/drivers/dri/radeon/radeon_texture.c | 208 ++++++++++++---------------
 1 file changed, 92 insertions(+), 116 deletions(-)

(limited to 'src')

diff --git a/src/mesa/drivers/dri/radeon/radeon_texture.c b/src/mesa/drivers/dri/radeon/radeon_texture.c
index 8fc686581b..c093d1283d 100644
--- a/src/mesa/drivers/dri/radeon/radeon_texture.c
+++ b/src/mesa/drivers/dri/radeon/radeon_texture.c
@@ -529,6 +529,83 @@ static GLuint * allocate_image_offsets(GLcontext *ctx,
 	return offsets;
 }
 
+/**
+ * Update a subregion of the given texture image.
+ */
+static void radeon_store_teximage(GLcontext* ctx, int dims,
+		GLint xoffset, GLint yoffset, GLint zoffset,
+		GLsizei width, GLsizei height, GLsizei depth,
+		GLsizei imageSize,
+		GLenum format, GLenum type,
+		const GLvoid * pixels,
+		const struct gl_pixelstore_attrib *packing,
+		struct gl_texture_object *texObj,
+		struct gl_texture_image *texImage,
+		int compressed)
+{
+	radeon_texture_image* image = get_radeon_texture_image(texImage);
+
+	GLint dstRowStride;
+	GLuint *dstImageOffsets;
+
+	if (image->mt) {
+		radeon_mipmap_level *lvl = &image->mt->levels[image->mtlevel];
+		dstRowStride = lvl->rowstride;
+	} else {
+		dstRowStride = texImage->RowStride * _mesa_get_format_bytes(texImage->TexFormat);
+	}
+
+	if (dims == 3) {
+		unsigned alignedWidth = dstRowStride/_mesa_get_format_bytes(texImage->TexFormat);
+		dstImageOffsets = allocate_image_offsets(ctx, alignedWidth, height, depth);
+		if (!dstImageOffsets) {
+			return;
+		}
+	} else {
+		dstImageOffsets = texImage->ImageOffsets;
+	}
+
+	radeon_teximage_map(image, GL_TRUE);
+
+	if (compressed) {
+		uint32_t srcRowStride, bytesPerRow, rows;
+		GLubyte *img_start;
+		if (!image->mt) {
+			dstRowStride = _mesa_format_row_stride(texImage->TexFormat, texImage->Width);
+			img_start = _mesa_compressed_image_address(xoffset, yoffset, 0,
+									texImage->TexFormat,
+									texImage->Width, texImage->Data);
+		}
+		else {
+			uint32_t blocks_x = dstRowStride / (image->mt->bpp * 4);
+			img_start = texImage->Data + image->mt->bpp * 4 * (blocks_x * (yoffset / 4) + xoffset / 4);
+		}
+		srcRowStride = _mesa_format_row_stride(texImage->TexFormat, width);
+		bytesPerRow = srcRowStride;
+		rows = (height + 3) / 4;
+
+		copy_rows(img_start, dstRowStride,  pixels, srcRowStride, rows,  bytesPerRow);
+
+	}
+	else {
+		if (!_mesa_texstore(ctx, dims, texImage->_BaseFormat,
+					texImage->TexFormat, texImage->Data,
+					xoffset, yoffset, zoffset,
+					dstRowStride,
+					dstImageOffsets,
+					width, height, depth,
+					format, type, pixels, packing)) {
+			_mesa_error(ctx, GL_OUT_OF_MEMORY, "glTexSubImage");
+		}
+	}
+
+	if (dims == 3) {
+		_mesa_free(dstImageOffsets);
+	}
+
+	radeon_teximage_unmap(image);
+}
+
 /**
  * All glTexImage calls go through this function.
  */
@@ -626,63 +703,16 @@ static void radeon_teximage(
 	}
 
 	if (pixels) {
-		if (compressed) {
-			radeon_teximage_map(image, GL_TRUE);
-			if (image->mt) {
-				uint32_t srcRowStride, bytesPerRow, rows;
-				srcRowStride = _mesa_format_row_stride(texImage->TexFormat, width);
-				bytesPerRow = srcRowStride;
-				rows = (height + 3) / 4;
-				copy_rows(texImage->Data, image->mt->levels[level].rowstride,
-					  pixels, srcRowStride, rows, bytesPerRow);
-			} else {
-				memcpy(texImage->Data, pixels, imageSize);
-			}
-		} else {
-			GLuint dstRowStride;
-			GLuint *dstImageOffsets;
-
-			if (image->mt) {
-				radeon_mipmap_level *lvl = &image->mt->levels[image->mtlevel];
-				dstRowStride = lvl->rowstride;
-			} else {
-				dstRowStride = texImage->Width * _mesa_get_format_bytes(texImage->TexFormat);
-			}
-
-			if (dims == 3) {
-				unsigned alignedWidth = dstRowStride/_mesa_get_format_bytes(texImage->TexFormat);
-				dstImageOffsets = allocate_image_offsets(ctx, alignedWidth, height, depth);
-				if (!dstImageOffsets) {
-					return;
-				}
-			} else {
-				dstImageOffsets = texImage->ImageOffsets;
-			}
-
-			radeon_teximage_map(image, GL_TRUE);
-
-			if (!_mesa_texstore(ctx, dims,
-					    texImage->_BaseFormat,
-					    texImage->TexFormat,
-					    texImage->Data, 0, 0, 0, /* dstX/Y/Zoffset */
-					    dstRowStride,
-					    dstImageOffsets,
-					    width, height, depth,
-					    format, type, pixels, packing)) {
-				_mesa_error(ctx, GL_OUT_OF_MEMORY, "glTexImage");
-			}
-
-			if (dims == 3)
-				_mesa_free(dstImageOffsets);
-		}
+		radeon_store_teximage(ctx, dims,
+			0, 0, 0,
+			width, height, depth,
+			imageSize, format, type,
+			pixels, packing,
+			texObj, texImage,
+			compressed);
 	}
 
 	_mesa_unmap_teximage_pbo(ctx, packing);
-
-	if (pixels)
-	  radeon_teximage_unmap(image);
-
-
 }
 
 void radeonTexImage1D(GLcontext * ctx, GLenum target, GLint level,
@@ -735,7 +765,7 @@ void radeonTexImage3D(GLcontext * ctx, GLenum target, GLint level,
 }
 
 /**
- * Update a subregion of the given texture image.
+ * All glTexSubImage calls go through this function.
  */
 static void radeon_texsubimage(GLcontext* ctx, int dims, GLenum target, int level,
 		GLint xoffset, GLint yoffset, GLint zoffset,
@@ -770,70 +800,16 @@ static void radeon_texsubimage(GLcontext* ctx, int dims, GLenum target, int leve
 	}
 
 	if (pixels) {
-		GLint dstRowStride;
-		GLuint *dstImageOffsets;
-
-		if (image->mt) {
-			radeon_mipmap_level *lvl = &image->mt->levels[image->mtlevel];
-			dstRowStride = lvl->rowstride;
-		} else {
-			dstRowStride = texImage->RowStride * _mesa_get_format_bytes(texImage->TexFormat);
-		}
-
-		if (dims == 3) {
-			unsigned alignedWidth = dstRowStride/_mesa_get_format_bytes(texImage->TexFormat);
-			dstImageOffsets = allocate_image_offsets(ctx, alignedWidth, height, depth);
-			if (!dstImageOffsets) {
-				return;
-			}
-		} else {
-			dstImageOffsets = texImage->ImageOffsets;
-		}
-
-		radeon_teximage_map(image, GL_TRUE);
-
-		if (compressed) {
-			uint32_t srcRowStride, bytesPerRow, rows;
-			GLubyte *img_start;
-			if (!image->mt) {
-				dstRowStride = _mesa_format_row_stride(texImage->TexFormat, texImage->Width);
-				img_start = _mesa_compressed_image_address(xoffset, yoffset, 0,
-									   texImage->TexFormat,
-									   texImage->Width, texImage->Data);
-			}
-			else {
-				uint32_t blocks_x = dstRowStride / (image->mt->bpp * 4);
-				img_start = texImage->Data + image->mt->bpp * 4 * (blocks_x * (yoffset / 4) + xoffset / 4);
-			}
-			srcRowStride = _mesa_format_row_stride(texImage->TexFormat, width);
-			bytesPerRow = srcRowStride;
-			rows = (height + 3) / 4;
-
-			copy_rows(img_start, dstRowStride,  pixels, srcRowStride, rows,  bytesPerRow);
-			
-		}
-		else {
-			if (!_mesa_texstore(ctx, dims, texImage->_BaseFormat,
-					    texImage->TexFormat, texImage->Data,
-					    xoffset, yoffset, zoffset,
-					    dstRowStride,
-					    dstImageOffsets,
-					    width, height, depth,
-					    format, type, pixels, packing)) {
-				_mesa_error(ctx, GL_OUT_OF_MEMORY, "glTexSubImage");
-			}
-		}
-
-		if (dims == 3) {
-			_mesa_free(dstImageOffsets);
-		}
+		radeon_store_teximage(ctx, dims,
+			xoffset, yoffset, zoffset,
+			width, height, depth,
+			imageSize, format, type,
+			pixels, packing,
+			texObj, texImage,
+			compressed);
 	}
 
-	radeon_teximage_unmap(image);
-
 	_mesa_unmap_teximage_pbo(ctx, packing);
-
-
 }
 
 void radeonTexSubImage1D(GLcontext * ctx, GLenum target, GLint level,
-- 
cgit v1.2.3


From 23ec7c457483aae1e0d399e9b570f1860c27c780 Mon Sep 17 00:00:00 2001
From: Maciej Cencora <m.cencora@gmail.com>
Date: Sat, 14 Nov 2009 16:55:39 +0100
Subject: radeon: rework mipmap tree

---
 src/mesa/drivers/dri/r300/r300_cmdbuf.c            |   2 +-
 src/mesa/drivers/dri/r300/r300_tex.c               |   6 -
 src/mesa/drivers/dri/r300/r300_texstate.c          |   8 +-
 .../drivers/dri/radeon/radeon_common_context.h     |   4 +
 src/mesa/drivers/dri/radeon/radeon_mipmap_tree.c   | 474 ++++++++++++++-------
 src/mesa/drivers/dri/radeon/radeon_mipmap_tree.h   |  24 +-
 src/mesa/drivers/dri/radeon/radeon_texture.c       | 243 +++--------
 src/mesa/drivers/dri/radeon/radeon_texture.h       |   3 +-
 8 files changed, 400 insertions(+), 364 deletions(-)

(limited to 'src')

diff --git a/src/mesa/drivers/dri/r300/r300_cmdbuf.c b/src/mesa/drivers/dri/r300/r300_cmdbuf.c
index 8a56b9e63c..4b5ed2d410 100644
--- a/src/mesa/drivers/dri/r300/r300_cmdbuf.c
+++ b/src/mesa/drivers/dri/r300/r300_cmdbuf.c
@@ -169,7 +169,7 @@ static void emit_tex_offsets(GLcontext *ctx, struct radeon_state_atom * atom)
 		if (t && !t->image_override) {
 			BEGIN_BATCH_NO_AUTOSTATE(4);
 			OUT_BATCH_REGSEQ(R300_TX_OFFSET_0 + (i * 4), 1);
-			OUT_BATCH_RELOC(t->tile_bits, t->mt->bo, 0,
+			OUT_BATCH_RELOC(t->tile_bits, t->mt->bo, get_base_teximage_offset(t),
 					RADEON_GEM_DOMAIN_GTT|RADEON_GEM_DOMAIN_VRAM, 0, 0);
 			END_BATCH();
 		} else if (!t) {
diff --git a/src/mesa/drivers/dri/r300/r300_tex.c b/src/mesa/drivers/dri/r300/r300_tex.c
index 7e94e93df2..726b3ff98e 100644
--- a/src/mesa/drivers/dri/r300/r300_tex.c
+++ b/src/mesa/drivers/dri/r300/r300_tex.c
@@ -223,12 +223,6 @@ static void r300TexParameter(GLcontext * ctx, GLenum target,
 	case GL_TEXTURE_MAX_LEVEL:
 	case GL_TEXTURE_MIN_LOD:
 	case GL_TEXTURE_MAX_LOD:
-		/* This isn't the most efficient solution but there doesn't appear to
-		 * be a nice alternative.  Since there's no LOD clamping,
-		 * we just have to rely on loading the right subset of mipmap levels
-		 * to simulate a clamped LOD.
-		 */
-		radeon_miptree_unreference(&t->mt);
 		t->validated = GL_FALSE;
 		break;
 
diff --git a/src/mesa/drivers/dri/r300/r300_texstate.c b/src/mesa/drivers/dri/r300/r300_texstate.c
index 7b1adcf31d..e6f2c0c1a7 100644
--- a/src/mesa/drivers/dri/r300/r300_texstate.c
+++ b/src/mesa/drivers/dri/r300/r300_texstate.c
@@ -203,9 +203,7 @@ void r300SetDepthTexMode(struct gl_texture_object *tObj)
 static void setup_hardware_state(r300ContextPtr rmesa, radeonTexObj *t)
 {
 	const struct gl_texture_image *firstImage;
-	int firstlevel = t->mt ? t->mt->firstLevel : 0;
-	    
-	firstImage = t->base.Image[0][firstlevel];
+	firstImage = t->base.Image[0][t->minLod];
 
 	if (!t->image_override
 	    && VALID_FORMAT(firstImage->TexFormat)) {
@@ -228,7 +226,7 @@ static void setup_hardware_state(r300ContextPtr rmesa, radeonTexObj *t)
 	t->pp_txsize = (((R300_TX_WIDTHMASK_MASK & ((firstImage->Width - 1) << R300_TX_WIDTHMASK_SHIFT)))
 			| ((R300_TX_HEIGHTMASK_MASK & ((firstImage->Height - 1) << R300_TX_HEIGHTMASK_SHIFT)))
 			| ((R300_TX_DEPTHMASK_MASK & ((firstImage->DepthLog2) << R300_TX_DEPTHMASK_SHIFT)))
-			| ((R300_TX_MAX_MIP_LEVEL_MASK & ((t->mt->lastLevel - t->mt->firstLevel) << R300_TX_MAX_MIP_LEVEL_SHIFT))));
+			| ((R300_TX_MAX_MIP_LEVEL_MASK & ((t->maxLod - t->minLod) << R300_TX_MAX_MIP_LEVEL_SHIFT))));
 
 	t->tile_bits = 0;
 
@@ -239,7 +237,7 @@ static void setup_hardware_state(r300ContextPtr rmesa, radeonTexObj *t)
 
 
 	if (t->base.Target == GL_TEXTURE_RECTANGLE_NV) {
-		unsigned int align = (64 / t->mt->bpp) - 1;
+		unsigned int align = (64 / _mesa_get_format_bytes(firstImage->TexFormat)) - 1;
 		t->pp_txsize |= R300_TX_SIZE_TXPITCH_EN;
 		if (!t->image_override)
 			t->pp_txpitch = ((firstImage->Width + align) & ~align) - 1;
diff --git a/src/mesa/drivers/dri/radeon/radeon_common_context.h b/src/mesa/drivers/dri/radeon/radeon_common_context.h
index 5a0678b9d6..ded81fff29 100644
--- a/src/mesa/drivers/dri/radeon/radeon_common_context.h
+++ b/src/mesa/drivers/dri/radeon/radeon_common_context.h
@@ -208,6 +208,10 @@ struct radeon_tex_obj {
 	 * and so on.
 	 */
 	GLboolean validated;
+	/* Minimum LOD to be used during rendering */
+	unsigned minLod;
+	/* Miximum LOD to be used during rendering */
+	unsigned maxLod;
 
 	GLuint override_offset;
 	GLboolean image_override; /* Image overridden by GLX_EXT_tfp */
diff --git a/src/mesa/drivers/dri/radeon/radeon_mipmap_tree.c b/src/mesa/drivers/dri/radeon/radeon_mipmap_tree.c
index f635f58d6a..f01136b9d4 100644
--- a/src/mesa/drivers/dri/radeon/radeon_mipmap_tree.c
+++ b/src/mesa/drivers/dri/radeon/radeon_mipmap_tree.c
@@ -1,4 +1,5 @@
 /*
+ * Copyright (C) 2009 Maciej Cencora.
  * Copyright (C) 2008 Nicolai Haehnle.
  *
  * All Rights Reserved.
@@ -32,10 +33,14 @@
 
 #include "main/simple_list.h"
 #include "main/texcompress.h"
+#include "main/teximage.h"
+/* TODO: remove if texture completeness check is removed */
+#include "main/texobj.h"
+#include "radeon_texture.h"
 
 static GLuint radeon_compressed_texture_size(GLcontext *ctx,
 		GLsizei width, GLsizei height, GLsizei depth,
-		GLuint mesaFormat)
+		gl_format mesaFormat)
 {
 	GLuint size = _mesa_format_image_size(mesaFormat, width, height, depth);
 
@@ -55,29 +60,6 @@ static GLuint radeon_compressed_texture_size(GLcontext *ctx,
 	return size;
 }
 
-
-static int radeon_compressed_num_bytes(GLuint mesaFormat)
-{
-   int bytes = 0;
-   switch(mesaFormat) {
-     
-   case MESA_FORMAT_RGB_FXT1:
-   case MESA_FORMAT_RGBA_FXT1:
-   case MESA_FORMAT_RGB_DXT1:
-   case MESA_FORMAT_RGBA_DXT1:
-     bytes = 2;
-     break;
-     
-   case MESA_FORMAT_RGBA_DXT3:
-   case MESA_FORMAT_RGBA_DXT5:
-     bytes = 4;
-   default:
-     break;
-   }
-   
-   return bytes;
-}
-
 /**
  * Compute sizes and fill in offset and blit information for the given
  * image (determined by \p face and \p level).
@@ -92,25 +74,24 @@ static void compute_tex_image_offset(radeonContextPtr rmesa, radeon_mipmap_tree
 	uint32_t row_align;
 
 	/* Find image size in bytes */
-	if (mt->compressed) {
+	if (_mesa_is_format_compressed(mt->mesaFormat)) {
 		/* TODO: Is this correct? Need test cases for compressed textures! */
 		row_align = rmesa->texture_compressed_row_align - 1;
-		lvl->rowstride = (lvl->width * mt->bpp + row_align) & ~row_align;
-		lvl->size = radeon_compressed_texture_size(mt->radeon->glCtx,
-							   lvl->width, lvl->height, lvl->depth, mt->compressed);
+		lvl->rowstride = (_mesa_format_row_stride(mt->mesaFormat, lvl->width) + row_align) & ~row_align;
+		lvl->size = radeon_compressed_texture_size(rmesa->glCtx, lvl->width, lvl->height, lvl->depth, mt->mesaFormat);
 	} else if (mt->target == GL_TEXTURE_RECTANGLE_NV) {
 		row_align = rmesa->texture_rect_row_align - 1;
-		lvl->rowstride = (lvl->width * mt->bpp + row_align) & ~row_align;
+		lvl->rowstride = (_mesa_format_row_stride(mt->mesaFormat, lvl->width) + row_align) & ~row_align;
 		lvl->size = lvl->rowstride * lvl->height;
 	} else if (mt->tilebits & RADEON_TXO_MICRO_TILE) {
 		/* tile pattern is 16 bytes x2. mipmaps stay 32 byte aligned,
 		 * though the actual offset may be different (if texture is less than
 		 * 32 bytes width) to the untiled case */
-		lvl->rowstride = (lvl->width * mt->bpp * 2 + 31) & ~31;
+		lvl->rowstride = (_mesa_format_row_stride(mt->mesaFormat, lvl->width) * 2 + 31) & ~31;
 		lvl->size = lvl->rowstride * ((lvl->height + 1) / 2) * lvl->depth;
 	} else {
 		row_align = rmesa->texture_row_align - 1;
-		lvl->rowstride = (lvl->width * mt->bpp + row_align) & ~row_align;
+		lvl->rowstride = (_mesa_format_row_stride(mt->mesaFormat, lvl->width) + row_align) & ~row_align;
 		lvl->size = lvl->rowstride * lvl->height * lvl->depth;
 	}
 	assert(lvl->size > 0);
@@ -138,17 +119,15 @@ static GLuint minify(GLuint size, GLuint levels)
 static void calculate_miptree_layout_r100(radeonContextPtr rmesa, radeon_mipmap_tree *mt)
 {
 	GLuint curOffset;
-	GLuint numLevels;
 	GLuint i;
 	GLuint face;
 
-	numLevels = mt->lastLevel - mt->firstLevel + 1;
-	assert(numLevels <= rmesa->glCtx->Const.MaxTextureLevels);
+	assert(mt->numLevels <= rmesa->glCtx->Const.MaxTextureLevels);
 
 	curOffset = 0;
 	for(face = 0; face < mt->faces; face++) {
 
-		for(i = 0; i < numLevels; i++) {
+		for(i = 0; i < mt->numLevels; i++) {
 			mt->levels[i].width = minify(mt->width0, i);
 			mt->levels[i].height = minify(mt->height0, i);
 			mt->levels[i].depth = minify(mt->depth0, i);
@@ -163,14 +142,12 @@ static void calculate_miptree_layout_r100(radeonContextPtr rmesa, radeon_mipmap_
 static void calculate_miptree_layout_r300(radeonContextPtr rmesa, radeon_mipmap_tree *mt)
 {
 	GLuint curOffset;
-	GLuint numLevels;
 	GLuint i;
 
-	numLevels = mt->lastLevel - mt->firstLevel + 1;
-	assert(numLevels <= rmesa->glCtx->Const.MaxTextureLevels);
+	assert(mt->numLevels <= rmesa->glCtx->Const.MaxTextureLevels);
 
 	curOffset = 0;
-	for(i = 0; i < numLevels; i++) {
+	for(i = 0; i < mt->numLevels; i++) {
 		GLuint face;
 
 		mt->levels[i].width = minify(mt->width0, i);
@@ -188,27 +165,22 @@ static void calculate_miptree_layout_r300(radeonContextPtr rmesa, radeon_mipmap_
 /**
  * Create a new mipmap tree, calculate its layout and allocate memory.
  */
-radeon_mipmap_tree* radeon_miptree_create(radeonContextPtr rmesa, radeonTexObj *t,
-		GLenum target, GLenum internal_format, GLuint firstLevel, GLuint lastLevel,
-		GLuint width0, GLuint height0, GLuint depth0,
-		GLuint bpp, GLuint tilebits, GLuint compressed)
+static radeon_mipmap_tree* radeon_miptree_create(radeonContextPtr rmesa,
+		GLenum target, gl_format mesaFormat, GLuint baseLevel, GLuint numLevels,
+		GLuint width0, GLuint height0, GLuint depth0, GLuint tilebits)
 {
 	radeon_mipmap_tree *mt = CALLOC_STRUCT(_radeon_mipmap_tree);
 
-	mt->radeon = rmesa;
-	mt->internal_format = internal_format;
+	mt->mesaFormat = mesaFormat;
 	mt->refcount = 1;
-	mt->t = t;
 	mt->target = target;
 	mt->faces = (target == GL_TEXTURE_CUBE_MAP) ? 6 : 1;
-	mt->firstLevel = firstLevel;
-	mt->lastLevel = lastLevel;
+	mt->baseLevel = baseLevel;
+	mt->numLevels = numLevels;
 	mt->width0 = width0;
 	mt->height0 = height0;
 	mt->depth0 = depth0;
-	mt->bpp = compressed ? radeon_compressed_num_bytes(compressed) : bpp;
 	mt->tilebits = tilebits;
-	mt->compressed = compressed;
 
 	if (rmesa->radeonScreen->chip_family >= CHIP_FAMILY_R300)
 		calculate_miptree_layout_r300(rmesa, mt);
@@ -250,34 +222,16 @@ void radeon_miptree_unreference(radeon_mipmap_tree **ptr)
 	*ptr = 0;
 }
 
-
 /**
- * Calculate first and last mip levels for the given texture object,
- * where the dimensions are taken from the given texture image at
- * the given level.
- *
- * Note: level is the OpenGL level number, which is not necessarily the same
- * as the first level that is actually present.
- *
- * The base level image of the given texture face must be non-null,
- * or this will fail.
+ * Calculate min and max LOD for the given texture object.
+ * @param[in] tObj texture object whose LOD values to calculate
+ * @param[out] pminLod minimal LOD
+ * @param[out] pmaxLod maximal LOD
  */
-static void calculate_first_last_level(struct gl_texture_object *tObj,
-				       GLuint *pfirstLevel, GLuint *plastLevel,
-				       GLuint face, GLuint level)
+static void calculate_min_max_lod(struct gl_texture_object *tObj,
+				       unsigned *pminLod, unsigned *pmaxLod)
 {
-	const struct gl_texture_image * const baseImage =
-		tObj->Image[face][level];
-
-	assert(baseImage);
-	
-	/* These must be signed values.  MinLod and MaxLod can be negative numbers,
-	* and having firstLevel and lastLevel as signed prevents the need for
-	* extra sign checks.
-	*/
-	int   firstLevel;
-	int   lastLevel;
-
+	int minLod, maxLod;
 	/* Yes, this looks overly complicated, but it's all needed.
 	*/
 	switch (tObj->Target) {
@@ -288,55 +242,46 @@ static void calculate_first_last_level(struct gl_texture_object *tObj,
 		if (tObj->MinFilter == GL_NEAREST || tObj->MinFilter == GL_LINEAR) {
 			/* GL_NEAREST and GL_LINEAR only care about GL_TEXTURE_BASE_LEVEL.
 			*/
-			firstLevel = lastLevel = tObj->BaseLevel;
+			minLod = maxLod = tObj->BaseLevel;
 		} else {
-			firstLevel = tObj->BaseLevel + (GLint)(tObj->MinLod + 0.5);
-			firstLevel = MAX2(firstLevel, tObj->BaseLevel);
-			firstLevel = MIN2(firstLevel, level + baseImage->MaxLog2);
-			lastLevel = tObj->BaseLevel + (GLint)(tObj->MaxLod + 0.5);
-			lastLevel = MAX2(lastLevel, tObj->BaseLevel);
-			lastLevel = MIN2(lastLevel, level + baseImage->MaxLog2);
-			lastLevel = MIN2(lastLevel, tObj->MaxLevel);
-			lastLevel = MAX2(firstLevel, lastLevel); /* need at least one level */
+			minLod = tObj->BaseLevel + (GLint)(tObj->MinLod);
+			minLod = MAX2(minLod, tObj->BaseLevel);
+			minLod = MIN2(minLod, tObj->MaxLevel);
+			maxLod = tObj->BaseLevel + (GLint)(tObj->MaxLod + 0.5);
+			maxLod = MIN2(maxLod, tObj->MaxLevel);
+			maxLod = MIN2(maxLod, tObj->Image[0][minLod]->MaxLog2 + minLod);
+			maxLod = MAX2(maxLod, minLod); /* need at least one level */
 		}
 		break;
 	case GL_TEXTURE_RECTANGLE_NV:
 	case GL_TEXTURE_4D_SGIS:
-		firstLevel = lastLevel = 0;
+		minLod = maxLod = 0;
 		break;
 	default:
 		return;
 	}
 
 	/* save these values */
-	*pfirstLevel = firstLevel;
-	*plastLevel = lastLevel;
+	*pminLod = minLod;
+	*pmaxLod = maxLod;
 }
 
-
 /**
  * Checks whether the given miptree can hold the given texture image at the
  * given face and level.
  */
 GLboolean radeon_miptree_matches_image(radeon_mipmap_tree *mt,
-		struct gl_texture_image *texImage, GLuint face, GLuint level)
+		struct gl_texture_image *texImage, GLuint face, GLuint mtLevel)
 {
-	GLboolean isCompressed = _mesa_is_format_compressed(texImage->TexFormat);
 	radeon_mipmap_level *lvl;
 
-	if (face >= mt->faces || level < mt->firstLevel || level > mt->lastLevel)
-		return GL_FALSE;
-
-	if (texImage->InternalFormat != mt->internal_format ||
-	    isCompressed != mt->compressed)
+	if (face >= mt->faces || mtLevel > mt->numLevels)
 		return GL_FALSE;
 
-	if (!isCompressed &&
-	    !mt->compressed &&
-	    _mesa_get_format_bytes(texImage->TexFormat) != mt->bpp)
+	if (texImage->TexFormat != mt->mesaFormat)
 		return GL_FALSE;
 
-	lvl = &mt->levels[level - mt->firstLevel];
+	lvl = &mt->levels[mtLevel];
 	if (lvl->width != texImage->Width ||
 	    lvl->height != texImage->Height ||
 	    lvl->depth != texImage->Depth)
@@ -345,64 +290,72 @@ GLboolean radeon_miptree_matches_image(radeon_mipmap_tree *mt,
 	return GL_TRUE;
 }
 
-
 /**
  * Checks whether the given miptree has the right format to store the given texture object.
  */
-GLboolean radeon_miptree_matches_texture(radeon_mipmap_tree *mt, struct gl_texture_object *texObj)
+static GLboolean radeon_miptree_matches_texture(radeon_mipmap_tree *mt, struct gl_texture_object *texObj)
 {
 	struct gl_texture_image *firstImage;
-	GLuint compressed;
-	GLuint numfaces = 1;
-	GLuint firstLevel, lastLevel;
-	GLuint texelBytes;
-
-	calculate_first_last_level(texObj, &firstLevel, &lastLevel, 0, texObj->BaseLevel);
-	if (texObj->Target == GL_TEXTURE_CUBE_MAP)
-		numfaces = 6;
-
-	firstImage = texObj->Image[0][firstLevel];
-	compressed = _mesa_is_format_compressed(firstImage->TexFormat) ? firstImage->TexFormat : 0;
-	texelBytes = _mesa_get_format_bytes(firstImage->TexFormat);
-
-	return (mt->firstLevel == firstLevel &&
-	        mt->lastLevel == lastLevel &&
-	        mt->width0 == firstImage->Width &&
-	        mt->height0 == firstImage->Height &&
-	        mt->depth0 == firstImage->Depth &&
-	        mt->compressed == compressed &&
-	        (!mt->compressed ? (mt->bpp == texelBytes) : 1));
-}
+	unsigned numLevels;
+	radeon_mipmap_level *mtBaseLevel;
 
+	if (texObj->BaseLevel < mt->baseLevel)
+		return GL_FALSE;
+
+	mtBaseLevel = &mt->levels[texObj->BaseLevel - mt->baseLevel];
+	firstImage = texObj->Image[0][texObj->BaseLevel];
+	numLevels = MIN2(texObj->MaxLevel - texObj->BaseLevel + 1, firstImage->MaxLog2 + 1);
+
+	if (RADEON_DEBUG & RADEON_TEXTURE) {
+		fprintf(stderr, "Checking if miptree %p matches texObj %p\n", mt, texObj);
+		fprintf(stderr, "target %d vs %d\n", mt->target, texObj->Target);
+		fprintf(stderr, "format %d vs %d\n", mt->mesaFormat, firstImage->TexFormat);
+		fprintf(stderr, "numLevels %d vs %d\n", mt->numLevels, numLevels);
+		fprintf(stderr, "width0 %d vs %d\n", mtBaseLevel->width, firstImage->Width);
+		fprintf(stderr, "height0 %d vs %d\n", mtBaseLevel->height, firstImage->Height);
+		fprintf(stderr, "depth0 %d vs %d\n", mtBaseLevel->depth, firstImage->Depth);
+		if (mt->target == texObj->Target &&
+	        mt->mesaFormat == firstImage->TexFormat &&
+	        mt->numLevels >= numLevels &&
+	        mtBaseLevel->width == firstImage->Width &&
+	        mtBaseLevel->height == firstImage->Height &&
+	        mtBaseLevel->depth == firstImage->Depth) {
+			fprintf(stderr, "MATCHED\n");
+		} else {
+			fprintf(stderr, "NOT MATCHED\n");
+		}
+	}
+
+	return (mt->target == texObj->Target &&
+	        mt->mesaFormat == firstImage->TexFormat &&
+	        mt->numLevels >= numLevels &&
+	        mtBaseLevel->width == firstImage->Width &&
+	        mtBaseLevel->height == firstImage->Height &&
+	        mtBaseLevel->depth == firstImage->Depth);
+}
 
 /**
- * Try to allocate a mipmap tree for the given texture that will fit the
- * given image in the given position.
+ * Try to allocate a mipmap tree for the given texture object.
+ * @param[in] rmesa radeon context
+ * @param[in] t radeon texture object
  */
-void radeon_try_alloc_miptree(radeonContextPtr rmesa, radeonTexObj *t,
-		radeon_texture_image *image, GLuint face, GLuint level)
+void radeon_try_alloc_miptree(radeonContextPtr rmesa, radeonTexObj *t)
 {
-	GLuint compressed = _mesa_is_format_compressed(image->base.TexFormat) ? image->base.TexFormat : 0;
-	GLuint numfaces = 1;
-	GLuint firstLevel, lastLevel;
-	GLuint texelBytes;
+	struct gl_texture_object *texObj = &t->base;
+	struct gl_texture_image *texImg = texObj->Image[0][texObj->BaseLevel];
+	GLuint numLevels;
 
 	assert(!t->mt);
 
-	calculate_first_last_level(&t->base, &firstLevel, &lastLevel, face, level);
-	if (t->base.Target == GL_TEXTURE_CUBE_MAP)
-		numfaces = 6;
-
-	if (level != firstLevel || face >= numfaces)
+	if (!texImg)
 		return;
 
-	texelBytes = _mesa_get_format_bytes(image->base.TexFormat);
+	numLevels = MIN2(texObj->MaxLevel - texObj->BaseLevel + 1, texImg->MaxLog2 + 1);
 
-	t->mt = radeon_miptree_create(rmesa, t, t->base.Target,
-		image->base.InternalFormat,
-		firstLevel, lastLevel,
-		image->base.Width, image->base.Height, image->base.Depth,
-		texelBytes, t->tile_bits, compressed);
+	t->mt = radeon_miptree_create(rmesa, t->base.Target,
+		texImg->TexFormat, texObj->BaseLevel,
+		numLevels, texImg->Width, texImg->Height,
+		texImg->Depth, t->tile_bits);
 }
 
 /* Although we use the image_offset[] array to store relative offsets
@@ -414,21 +367,238 @@ void radeon_try_alloc_miptree(radeonContextPtr rmesa, radeonTexObj *t,
 void
 radeon_miptree_depth_offsets(radeon_mipmap_tree *mt, GLuint level, GLuint *offsets)
 {
-     if (mt->target != GL_TEXTURE_3D || mt->faces == 1)
-        offsets[0] = 0;
-     else {
-	int i;
-	for (i = 0; i < 6; i++)
-		offsets[i] = mt->levels[level].faces[i].offset;
-     }
+	if (mt->target != GL_TEXTURE_3D || mt->faces == 1) {
+		offsets[0] = 0;
+	} else {
+		int i;
+		for (i = 0; i < 6; i++) {
+			offsets[i] = mt->levels[level].faces[i].offset;
+		}
+	}
 }
 
 GLuint
 radeon_miptree_image_offset(radeon_mipmap_tree *mt,
 			    GLuint face, GLuint level)
 {
-   if (mt->target == GL_TEXTURE_CUBE_MAP_ARB)
-      return (mt->levels[level].faces[face].offset);
-   else
-      return mt->levels[level].faces[0].offset;
+	if (mt->target == GL_TEXTURE_CUBE_MAP_ARB)
+		return (mt->levels[level].faces[face].offset);
+	else
+		return mt->levels[level].faces[0].offset;
+}
+
+/**
+ * Convert radeon miptree texture level to GL texture level
+ * @param[in] tObj texture object whom level is to be converted
+ * @param[in] level radeon miptree texture level
+ * @return GL texture level
+ */
+unsigned radeon_miptree_level_to_gl_level(struct gl_texture_object *tObj, unsigned level)
+{
+	return level + tObj->BaseLevel;
+}
+
+/**
+ * Convert GL texture level to radeon miptree texture level
+ * @param[in] tObj texture object whom level is to be converted
+ * @param[in] level GL texture level
+ * @return radeon miptree texture level
+ */
+unsigned radeon_gl_level_to_miptree_level(struct gl_texture_object *tObj, unsigned level)
+{
+	return level - tObj->BaseLevel;
 }
+
+/**
+ * Ensure that the given image is stored in the given miptree from now on.
+ */
+static void migrate_image_to_miptree(radeon_mipmap_tree *mt,
+									 radeon_texture_image *image,
+									 int face, int mtLevel)
+{
+	radeon_mipmap_level *dstlvl = &mt->levels[mtLevel];
+	unsigned char *dest;
+
+	assert(image->mt != mt);
+	assert(dstlvl->width == image->base.Width);
+	assert(dstlvl->height == image->base.Height);
+	assert(dstlvl->depth == image->base.Depth);
+
+	radeon_bo_map(mt->bo, GL_TRUE);
+	dest = mt->bo->ptr + dstlvl->faces[face].offset;
+
+	if (image->mt) {
+		/* Format etc. should match, so we really just need a memcpy().
+		 * In fact, that memcpy() could be done by the hardware in many
+		 * cases, provided that we have a proper memory manager.
+		 */
+		assert(mt->mesaFormat == image->base.TexFormat);
+
+		radeon_mipmap_level *srclvl = &image->mt->levels[image->mtlevel];
+
+		assert(srclvl->size == dstlvl->size);
+		assert(srclvl->rowstride == dstlvl->rowstride);
+
+		radeon_bo_map(image->mt->bo, GL_FALSE);
+
+		memcpy(dest,
+			image->mt->bo->ptr + srclvl->faces[face].offset,
+			dstlvl->size);
+		radeon_bo_unmap(image->mt->bo);
+
+		radeon_miptree_unreference(&image->mt);
+	} else {
+		/* need to confirm this value is correct */
+		if (_mesa_is_format_compressed(image->base.TexFormat)) {
+			unsigned size = _mesa_format_image_size(image->base.TexFormat,
+													image->base.Width,
+													image->base.Height,
+													image->base.Depth);
+			memcpy(dest, image->base.Data, size);
+		} else {
+			uint32_t srcrowstride;
+			uint32_t height;
+
+			height = image->base.Height * image->base.Depth;
+			srcrowstride = image->base.Width * _mesa_get_format_bytes(image->base.TexFormat);
+			copy_rows(dest, dstlvl->rowstride, image->base.Data, srcrowstride,
+					height, srcrowstride);
+		}
+
+		_mesa_free_texmemory(image->base.Data);
+		image->base.Data = 0;
+	}
+
+	radeon_bo_unmap(mt->bo);
+
+	radeon_miptree_reference(mt, &image->mt);
+	image->mtface = face;
+	image->mtlevel = mtLevel;
+}
+
+/**
+ * Filter matching miptrees, and select one with the most of data.
+ * @param[in] texObj radeon texture object
+ * @param[in] firstLevel first texture level to check
+ * @param[in] lastLevel last texture level to check
+ */
+static radeon_mipmap_tree * get_biggest_matching_miptree(radeonTexObj *texObj,
+														 unsigned firstLevel,
+														 unsigned lastLevel)
+{
+	const unsigned numLevels = lastLevel - firstLevel;
+	unsigned *mtSizes = calloc(numLevels, sizeof(unsigned));
+	radeon_mipmap_tree **mts = calloc(numLevels, sizeof(radeon_mipmap_tree *));
+	unsigned mtCount = 0;
+	unsigned maxMtIndex = 0;
+
+	for (unsigned level = firstLevel; level <= lastLevel; ++level) {
+		radeon_texture_image *img = get_radeon_texture_image(texObj->base.Image[0][level]);
+		unsigned found = 0;
+		// TODO: why this hack??
+		if (!img)
+			break;
+
+		if (!img->mt || !radeon_miptree_matches_texture(img->mt, &texObj->base))
+			continue;
+
+		for (int i = 0; i < mtCount; ++i) {
+			if (mts[i] == img->mt) {
+				found = 1;
+				mtSizes[i] += img->mt->levels[img->mtlevel].size;
+				break;
+			}
+		}
+
+		if (!found) {
+			mtSizes[mtCount] += img->mt->levels[img->mtlevel].size;
+			mts[mtCount++] = img->mt;
+			mtCount++;
+		}
+	}
+
+	if (mtCount == 0) {
+		return NULL;
+	}
+
+	for (int i = 1; i < mtCount; ++i) {
+		if (mtSizes[i] > mtSizes[maxMtIndex]) {
+			maxMtIndex = i;
+		}
+	}
+
+	return mts[maxMtIndex];
+}
+
+/**
+ * Validate texture mipmap tree.
+ * If individual images are stored in different mipmap trees
+ * use the mipmap tree that has the most of the correct data.
+ */
+int radeon_validate_texture_miptree(GLcontext * ctx, struct gl_texture_object *texObj)
+{
+	radeonContextPtr rmesa = RADEON_CONTEXT(ctx);
+	radeonTexObj *t = radeon_tex_obj(texObj);
+
+	if (t->validated || t->image_override) {
+		return GL_TRUE;
+	}
+
+	if (texObj->Image[0][texObj->BaseLevel]->Border > 0)
+		return GL_FALSE;
+
+	/* TODO: is this really necessary? */
+	_mesa_test_texobj_completeness(rmesa->glCtx, texObj);
+	assert(texObj->_Complete);
+
+	calculate_min_max_lod(&t->base, &t->minLod, &t->maxLod);
+
+	if (RADEON_DEBUG & RADEON_TEXTURE)
+		fprintf(stderr, "%s: Validating texture %p now, minLod = %d, maxLod = %d\n",
+				__FUNCTION__, texObj ,t->minLod, t->maxLod);
+
+	radeon_mipmap_tree *dst_miptree;
+	dst_miptree = get_biggest_matching_miptree(t, t->minLod, t->maxLod);
+
+	if (!dst_miptree) {
+		radeon_miptree_unreference(&t->mt);
+		radeon_try_alloc_miptree(rmesa, t);
+		dst_miptree = t->mt;
+	}
+
+	const unsigned faces = texObj->Target == GL_TEXTURE_CUBE_MAP ? 6 : 1;
+	unsigned face, level;
+	radeon_texture_image *img;
+	/* Validate only the levels that will actually be used during rendering */
+	for (face = 0; face < faces; ++face) {
+		for (level = t->minLod; level <= t->maxLod; ++level) {
+			img = get_radeon_texture_image(texObj->Image[face][level]);
+
+			if (RADEON_DEBUG & RADEON_TEXTURE) {
+				fprintf(stderr, "Checking image level %d, face %d, mt %p ... ", level, face, img->mt);
+			}
+			
+			if (img->mt != dst_miptree) {
+				if (RADEON_DEBUG & RADEON_TEXTURE) {
+					fprintf(stderr, "MIGRATING\n");
+				}
+				migrate_image_to_miptree(dst_miptree, img, face, radeon_gl_level_to_miptree_level(texObj, level));
+			} else if (RADEON_DEBUG & RADEON_TEXTURE) {
+				fprintf(stderr, "OK\n");
+			}
+		}
+	}
+
+	t->validated = GL_TRUE;
+
+	return GL_TRUE;
+}
+
+uint32_t get_base_teximage_offset(radeonTexObj *texObj)
+{
+	if (!texObj->mt) {
+		return 0;
+	} else {
+		return radeon_miptree_image_offset(texObj->mt, 0, texObj->minLod);
+	}
+}
\ No newline at end of file
diff --git a/src/mesa/drivers/dri/radeon/radeon_mipmap_tree.h b/src/mesa/drivers/dri/radeon/radeon_mipmap_tree.h
index 57299ceafa..28b8485095 100644
--- a/src/mesa/drivers/dri/radeon/radeon_mipmap_tree.h
+++ b/src/mesa/drivers/dri/radeon/radeon_mipmap_tree.h
@@ -59,44 +59,38 @@ struct _radeon_mipmap_level {
  * changed.
  */
 struct _radeon_mipmap_tree {
-	radeonContextPtr radeon;
-	radeonTexObj *t;
 	struct radeon_bo *bo;
 	GLuint refcount;
 
 	GLuint totalsize; /** total size of the miptree, in bytes */
 
 	GLenum target; /** GL_TEXTURE_xxx */
-	GLenum internal_format;
+	GLenum mesaFormat; /** MESA_FORMAT_xxx */
 	GLuint faces; /** # of faces: 6 for cubemaps, 1 otherwise */
-	GLuint firstLevel; /** First mip level stored in this mipmap tree */
-	GLuint lastLevel; /** Last mip level stored in this mipmap tree */
+	GLuint baseLevel; /** gl_texture_object->baseLevel it was created for */
+	GLuint numLevels; /** Number of mip levels stored in this mipmap tree */
 
 	GLuint width0; /** Width of firstLevel image */
 	GLuint height0; /** Height of firstLevel image */
 	GLuint depth0; /** Depth of firstLevel image */
 
-	GLuint bpp; /** Bytes per texel */
 	GLuint tilebits; /** RADEON_TXO_xxx_TILE */
-	GLuint compressed; /** MESA_FORMAT_xxx indicating a compressed format, or 0 if uncompressed */
 
 	radeon_mipmap_level levels[RADEON_MIPTREE_MAX_TEXTURE_LEVELS];
 };
 
-radeon_mipmap_tree* radeon_miptree_create(radeonContextPtr rmesa, radeonTexObj *t,
-		GLenum target, GLenum internal_format, GLuint firstLevel, GLuint lastLevel,
-		GLuint width0, GLuint height0, GLuint depth0,
-		GLuint bpp, GLuint tilebits, GLuint compressed);
-
 void radeon_miptree_reference(radeon_mipmap_tree *mt, radeon_mipmap_tree **ptr);
 void radeon_miptree_unreference(radeon_mipmap_tree **ptr);
 
 GLboolean radeon_miptree_matches_image(radeon_mipmap_tree *mt,
 		struct gl_texture_image *texImage, GLuint face, GLuint level);
-GLboolean radeon_miptree_matches_texture(radeon_mipmap_tree *mt, struct gl_texture_object *texObj);
-void radeon_try_alloc_miptree(radeonContextPtr rmesa, radeonTexObj *t,
-			      radeon_texture_image *texImage, GLuint face, GLuint level);
+void radeon_try_alloc_miptree(radeonContextPtr rmesa, radeonTexObj *t);
 GLuint radeon_miptree_image_offset(radeon_mipmap_tree *mt,
 				   GLuint face, GLuint level);
 void radeon_miptree_depth_offsets(radeon_mipmap_tree *mt, GLuint level, GLuint *offsets);
+
+unsigned radeon_miptree_level_to_gl_level(struct gl_texture_object *tObj, unsigned level);
+unsigned radeon_gl_level_to_miptree_level(struct gl_texture_object *tObj, unsigned level);
+
+uint32_t get_base_teximage_offset(radeonTexObj *texObj);
 #endif /* __RADEON_MIPMAP_TREE_H_ */
diff --git a/src/mesa/drivers/dri/radeon/radeon_texture.c b/src/mesa/drivers/dri/radeon/radeon_texture.c
index c093d1283d..6f11f1fa4a 100644
--- a/src/mesa/drivers/dri/radeon/radeon_texture.c
+++ b/src/mesa/drivers/dri/radeon/radeon_texture.c
@@ -1,4 +1,5 @@
 /*
+ * Copyright (C) 2009 Maciej Cencora.
  * Copyright (C) 2008 Nicolai Haehnle.
  * Copyright (C) The Weather Channel, Inc.  2002.  All Rights Reserved.
  *
@@ -46,7 +47,7 @@
 #include "radeon_mipmap_tree.h"
 
 
-static void copy_rows(void* dst, GLuint dststride, const void* src, GLuint srcstride,
+void copy_rows(void* dst, GLuint dststride, const void* src, GLuint srcstride,
 	GLuint numrows, GLuint rowsize)
 {
 	assert(rowsize <= dststride);
@@ -107,7 +108,7 @@ static void teximage_set_map_data(radeon_texture_image *image)
 	lvl = &image->mt->levels[image->mtlevel];
 
 	image->base.Data = image->mt->bo->ptr + lvl->faces[image->mtface].offset;
-	image->base.RowStride = lvl->rowstride / image->mt->bpp;
+	image->base.RowStride = lvl->rowstride / _mesa_get_format_bytes(image->base.TexFormat);
 }
 
 
@@ -173,7 +174,7 @@ void radeonMapTexture(GLcontext *ctx, struct gl_texture_object *texObj)
 
 	radeon_bo_map(t->mt->bo, GL_FALSE);
 	for(face = 0; face < t->mt->faces; ++face) {
-		for(level = t->mt->firstLevel; level <= t->mt->lastLevel; ++level)
+		for(level = t->minLod; level <= t->maxLod; ++level)
 			teximage_set_map_data(get_radeon_texture_image(texObj->Image[face][level]));
 	}
 }
@@ -190,7 +191,7 @@ void radeonUnmapTexture(GLcontext *ctx, struct gl_texture_object *texObj)
 	  return;
 
 	for(face = 0; face < t->mt->faces; ++face) {
-		for(level = t->mt->firstLevel; level <= t->mt->lastLevel; ++level)
+		for(level = t->minLod; level <= t->maxLod; ++level)
 			texObj->Image[face][level]->Data = 0;
 	}
 	radeon_bo_unmap(t->mt->bo);
@@ -508,6 +509,31 @@ gl_format radeonChooseTextureFormat(GLcontext * ctx,
 	return MESA_FORMAT_NONE;		/* never get here */
 }
 
+static void teximage_assign_miptree(radeonContextPtr rmesa,
+	struct gl_texture_object *texObj,
+	struct gl_texture_image *texImage,
+	unsigned face,
+	unsigned level)
+{
+	radeonTexObj *t = radeon_tex_obj(texObj);
+	radeon_texture_image* image = get_radeon_texture_image(texImage);
+
+	/* Try using current miptree, or create new if there isn't any */
+	if (!t->mt || !radeon_miptree_matches_image(t->mt, texImage, face,
+					radeon_gl_level_to_miptree_level(texObj, level))) {
+		radeon_miptree_unreference(&t->mt);
+		radeon_try_alloc_miptree(rmesa, t);
+	}
+
+	/* Miptree alocation may have failed,
+	 * when there was no image for baselevel specified */
+	if (t->mt) {
+		image->mtface = face;
+		image->mtlevel = radeon_gl_level_to_miptree_level(texObj, level);
+		radeon_miptree_reference(t->mt, &image->mt);
+	}
+}
+
 static GLuint * allocate_image_offsets(GLcontext *ctx,
 	unsigned alignedWidth,
 	unsigned height,
@@ -543,16 +569,20 @@ static void radeon_store_teximage(GLcontext* ctx, int dims,
 		struct gl_texture_image *texImage,
 		int compressed)
 {
+	radeonTexObj *t = radeon_tex_obj(texObj);
 	radeon_texture_image* image = get_radeon_texture_image(texImage);
 
-	GLint dstRowStride;
+	GLuint dstRowStride;
 	GLuint *dstImageOffsets;
 
 	if (image->mt) {
-		radeon_mipmap_level *lvl = &image->mt->levels[image->mtlevel];
-		dstRowStride = lvl->rowstride;
+		dstRowStride = image->mt->levels[image->mtlevel].rowstride;
+	} else if (t->bo) {
+		/* TFP case */
+		/* TODO */
+		assert(0);
 	} else {
-		dstRowStride = texImage->RowStride * _mesa_get_format_bytes(texImage->TexFormat);
+		dstRowStride = _mesa_format_row_stride(texImage->TexFormat, width);
 	}
 
 	if (dims == 3) {
@@ -577,8 +607,10 @@ static void radeon_store_teximage(GLcontext* ctx, int dims,
 									texImage->Width, texImage->Data);
 		}
 		else {
-			uint32_t blocks_x = dstRowStride / (image->mt->bpp * 4);
-			img_start = texImage->Data + image->mt->bpp * 4 * (blocks_x * (yoffset / 4) + xoffset / 4);
+			uint32_t blocks_x, block_width, block_height;
+			_mesa_get_format_block_size(image->mt->mesaFormat, &block_width, &block_height);
+			blocks_x = dstRowStride / block_width;
+			img_start = texImage->Data + _mesa_get_format_bytes(image->mt->mesaFormat) * 4 * (blocks_x * (yoffset / 4) + xoffset / 4);
 		}
 		srcRowStride = _mesa_format_row_stride(texImage->TexFormat, width);
 		bytesPerRow = srcRowStride;
@@ -624,10 +656,8 @@ static void radeon_teximage(
 	radeonContextPtr rmesa = RADEON_CONTEXT(ctx);
 	radeonTexObj* t = radeon_tex_obj(texObj);
 	radeon_texture_image* image = get_radeon_texture_image(texImage);
-	GLuint dstRowStride;
 	GLint postConvWidth = width;
 	GLint postConvHeight = height;
-	GLuint texelBytes;
 	GLuint face = radeon_face_for_target(target);
 
 	{
@@ -645,51 +675,30 @@ static void radeon_teximage(
 						  &postConvHeight);
 	}
 
-	if (_mesa_is_format_compressed(texImage->TexFormat)) {
-		texelBytes = 0;
-	} else {
-		texelBytes = _mesa_get_format_bytes(texImage->TexFormat);
+	if (!_mesa_is_format_compressed(texImage->TexFormat)) {
+		GLuint texelBytes = _mesa_get_format_bytes(texImage->TexFormat);
 		/* Minimum pitch of 32 bytes */
 		if (postConvWidth * texelBytes < 32) {
-		  postConvWidth = 32 / texelBytes;
-		  texImage->RowStride = postConvWidth;
+			postConvWidth = 32 / texelBytes;
+			texImage->RowStride = postConvWidth;
 		}
-		if (!image->mt) {      
+		if (!image->mt) {
 			assert(texImage->RowStride == postConvWidth);
 		}
 	}
 
-	/* Allocate memory for image */
-	radeonFreeTexImageData(ctx, texImage); /* Mesa core only clears texImage->Data but not image->mt */
+	/* Mesa core only clears texImage->Data but not image->mt */
+	radeonFreeTexImageData(ctx, texImage);
 
-	if (t->mt &&
-	    t->mt->firstLevel == level &&
-	    t->mt->lastLevel == level &&
-	    t->mt->target != GL_TEXTURE_CUBE_MAP_ARB &&
-	    !radeon_miptree_matches_image(t->mt, texImage, face, level)) {
-	  radeon_miptree_unreference(&t->mt);
-	}
-
-	if (!t->mt)
-		radeon_try_alloc_miptree(rmesa, t, image, face, level);
-	if (t->mt && radeon_miptree_matches_image(t->mt, texImage, face, level)) {
-		radeon_mipmap_level *lvl;
-		image->mtlevel = level - t->mt->firstLevel;
-		image->mtface = face;
-		radeon_miptree_reference(t->mt, &image->mt);
-		lvl = &image->mt->levels[image->mtlevel];
-		dstRowStride = lvl->rowstride;
-	} else {
-		int size;
-		if (_mesa_is_format_compressed(texImage->TexFormat)) {
-			size = _mesa_format_image_size(texImage->TexFormat,
-						       texImage->Width,
-						       texImage->Height,
-						       texImage->Depth);
-		} else {
-			size = texImage->Width * texImage->Height * texImage->Depth * _mesa_get_format_bytes(texImage->TexFormat);
+	if (!t->bo) {
+		teximage_assign_miptree(rmesa, texObj, texImage, face, level);
+		if (!t->mt) {
+			int size = _mesa_format_image_size(texImage->TexFormat,
+								texImage->Width,
+								texImage->Height,
+								texImage->Depth);
+			texImage->Data = _mesa_alloc_texmemory(size);
 		}
-		texImage->Data = _mesa_alloc_texmemory(size);
 	}
 
 	/* Upload texture image; note that the spec allows pixels to be NULL */
@@ -793,10 +802,10 @@ static void radeon_texsubimage(GLcontext* ctx, int dims, GLenum target, int leve
 	t->validated = GL_FALSE;
 	if (compressed) {
 		pixels = _mesa_validate_pbo_compressed_teximage(
-			ctx, imageSize, pixels, packing, "glCompressedTexImage");
+			ctx, imageSize, pixels, packing, "glCompressedTexSubImage");
 	} else {
 		pixels = _mesa_validate_pbo_teximage(ctx, dims,
-			width, height, depth, format, type, pixels, packing, "glTexSubImage1D");
+			width, height, depth, format, type, pixels, packing, "glTexSubImage");
 	}
 
 	if (pixels) {
@@ -865,140 +874,6 @@ void radeonTexSubImage3D(GLcontext * ctx, GLenum target, GLint level,
 		format, type, pixels, packing, texObj, texImage, 0);
 }
 
-
-
-/**
- * Ensure that the given image is stored in the given miptree from now on.
- */
-static void migrate_image_to_miptree(radeon_mipmap_tree *mt, radeon_texture_image *image, int face, int level)
-{
-	radeon_mipmap_level *dstlvl = &mt->levels[level - mt->firstLevel];
-	unsigned char *dest;
-
-	assert(image->mt != mt);
-	assert(dstlvl->width == image->base.Width);
-	assert(dstlvl->height == image->base.Height);
-	assert(dstlvl->depth == image->base.Depth);
-
-
-	radeon_bo_map(mt->bo, GL_TRUE);
-	dest = mt->bo->ptr + dstlvl->faces[face].offset;
-
-	if (image->mt) {
-		/* Format etc. should match, so we really just need a memcpy().
-		 * In fact, that memcpy() could be done by the hardware in many
-		 * cases, provided that we have a proper memory manager.
-		 */
-		radeon_mipmap_level *srclvl = &image->mt->levels[image->mtlevel-image->mt->firstLevel];
-
-		assert(srclvl->size == dstlvl->size);
-		assert(srclvl->rowstride == dstlvl->rowstride);
-
-		radeon_bo_map(image->mt->bo, GL_FALSE);
-
-		memcpy(dest,
-			image->mt->bo->ptr + srclvl->faces[face].offset,
-			dstlvl->size);
-		radeon_bo_unmap(image->mt->bo);
-
-		radeon_miptree_unreference(&image->mt);
-	} else {
-		uint32_t srcrowstride;
-		uint32_t height;
-		/* need to confirm this value is correct */
-		if (mt->compressed) {
-			height = (image->base.Height + 3) / 4;
-			srcrowstride = _mesa_format_row_stride(image->base.TexFormat, image->base.Width);
-		} else {
-			height = image->base.Height * image->base.Depth;
-			srcrowstride = image->base.Width * _mesa_get_format_bytes(image->base.TexFormat);
-		}
-
-//		if (mt->tilebits)
-//			WARN_ONCE("%s: tiling not supported yet", __FUNCTION__);
-
-		copy_rows(dest, dstlvl->rowstride, image->base.Data, srcrowstride,
-			  height, srcrowstride);
-
-		_mesa_free_texmemory(image->base.Data);
-		image->base.Data = 0;
-	}
-
-	radeon_bo_unmap(mt->bo);
-
-	image->mtface = face;
-	image->mtlevel = level;
-	radeon_miptree_reference(mt, &image->mt);
-}
-
-int radeon_validate_texture_miptree(GLcontext * ctx, struct gl_texture_object *texObj)
-{
-	radeonContextPtr rmesa = RADEON_CONTEXT(ctx);
-	radeonTexObj *t = radeon_tex_obj(texObj);
-	radeon_texture_image *baseimage = get_radeon_texture_image(texObj->Image[0][texObj->BaseLevel]);
-	int face, level;
-
-	if (t->validated || t->image_override)
-		return GL_TRUE;
-
-	if (RADEON_DEBUG & RADEON_TEXTURE)
-		fprintf(stderr, "%s: Validating texture %p now\n", __FUNCTION__, texObj);
-
-	if (baseimage->base.Border > 0)
-		return GL_FALSE;
-
-	/* Ensure a matching miptree exists.
-	 *
-	 * Differing mipmap trees can result when the app uses TexImage to
-	 * change texture dimensions.
-	 *
-	 * Prefer to use base image's miptree if it
-	 * exists, since that most likely contains more valid data (remember
-	 * that the base level is usually significantly larger than the rest
-	 * of the miptree, so cubemaps are the only possible exception).
-	 */
-	if (baseimage->mt &&
-	    baseimage->mt != t->mt &&
-	    radeon_miptree_matches_texture(baseimage->mt, &t->base)) {
-		radeon_miptree_unreference(&t->mt);
-		radeon_miptree_reference(baseimage->mt, &t->mt);
-	} else if (t->mt && !radeon_miptree_matches_texture(t->mt, &t->base)) {
-		radeon_miptree_unreference(&t->mt);
-	}
-
-	if (!t->mt) {
-		if (RADEON_DEBUG & RADEON_TEXTURE)
-			fprintf(stderr, " Allocate new miptree\n");
-		radeon_try_alloc_miptree(rmesa, t, baseimage, 0, texObj->BaseLevel);
-		if (!t->mt) {
-			_mesa_problem(ctx, "radeon_validate_texture failed to alloc miptree");
-			return GL_FALSE;
-		}
-	}
-
-	/* Ensure all images are stored in the single main miptree */
-	for(face = 0; face < t->mt->faces; ++face) {
-		for(level = t->mt->firstLevel; level <= t->mt->lastLevel; ++level) {
-			radeon_texture_image *image = get_radeon_texture_image(texObj->Image[face][level]);
-			if (RADEON_DEBUG & RADEON_TEXTURE)
-				fprintf(stderr, " face %i, level %i... %p vs %p ", face, level, t->mt, image->mt);
-			if (t->mt == image->mt || (!image->mt && !image->base.Data)) {
-				if (RADEON_DEBUG & RADEON_TEXTURE)
-					fprintf(stderr, "OK\n");
-
-				continue;
-			}
-
-			if (RADEON_DEBUG & RADEON_TEXTURE)
-				fprintf(stderr, "migrating\n");
-			migrate_image_to_miptree(t->mt, image, face, level);
-		}
-	}
-
-	return GL_TRUE;
-}
-
-
 /**
  * Need to map texture image into memory before copying image data,
  * then unmap it.
diff --git a/src/mesa/drivers/dri/radeon/radeon_texture.h b/src/mesa/drivers/dri/radeon/radeon_texture.h
index 8995546d77..906daf12d0 100644
--- a/src/mesa/drivers/dri/radeon/radeon_texture.h
+++ b/src/mesa/drivers/dri/radeon/radeon_texture.h
@@ -33,7 +33,8 @@
 
 #include "main/formats.h"
 
-
+void copy_rows(void* dst, GLuint dststride, const void* src, GLuint srcstride,
+	GLuint numrows, GLuint rowsize);
 struct gl_texture_image *radeonNewTextureImage(GLcontext *ctx);
 void radeonFreeTexImageData(GLcontext *ctx, struct gl_texture_image *timage);
 
-- 
cgit v1.2.3


From ad83aeccdc54beecf25f217e2dd24c8edf6d6767 Mon Sep 17 00:00:00 2001
From: Maciej Cencora <m.cencora@gmail.com>
Date: Sat, 14 Nov 2009 18:11:16 +0100
Subject: radeon: return false on texture validation if texture isn't complete

---
 src/mesa/drivers/dri/radeon/radeon_mipmap_tree.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

(limited to 'src')

diff --git a/src/mesa/drivers/dri/radeon/radeon_mipmap_tree.c b/src/mesa/drivers/dri/radeon/radeon_mipmap_tree.c
index f01136b9d4..0497fa7db5 100644
--- a/src/mesa/drivers/dri/radeon/radeon_mipmap_tree.c
+++ b/src/mesa/drivers/dri/radeon/radeon_mipmap_tree.c
@@ -34,7 +34,6 @@
 #include "main/simple_list.h"
 #include "main/texcompress.h"
 #include "main/teximage.h"
-/* TODO: remove if texture completeness check is removed */
 #include "main/texobj.h"
 #include "radeon_texture.h"
 
@@ -547,9 +546,10 @@ int radeon_validate_texture_miptree(GLcontext * ctx, struct gl_texture_object *t
 	if (texObj->Image[0][texObj->BaseLevel]->Border > 0)
 		return GL_FALSE;
 
-	/* TODO: is this really necessary? */
 	_mesa_test_texobj_completeness(rmesa->glCtx, texObj);
-	assert(texObj->_Complete);
+	if (!texObj->_Complete) {
+		return GL_FALSE;
+	}
 
 	calculate_min_max_lod(&t->base, &t->minLod, &t->maxLod);
 
-- 
cgit v1.2.3


From 93eb2ab8c395f81e40fa298d78805bb2c777f891 Mon Sep 17 00:00:00 2001
From: Maciej Cencora <m.cencora@gmail.com>
Date: Tue, 17 Nov 2009 19:46:37 +0100
Subject: radeon: align for mipmap tree changes

---
 src/mesa/drivers/dri/radeon/radeon_state_init.c |  4 ++--
 src/mesa/drivers/dri/radeon/radeon_tex.c        | 18 +++---------------
 src/mesa/drivers/dri/radeon/radeon_texstate.c   | 22 +++++++++-------------
 3 files changed, 14 insertions(+), 30 deletions(-)

(limited to 'src')

diff --git a/src/mesa/drivers/dri/radeon/radeon_state_init.c b/src/mesa/drivers/dri/radeon/radeon_state_init.c
index 2d19220d8a..dd82888254 100644
--- a/src/mesa/drivers/dri/radeon/radeon_state_init.c
+++ b/src/mesa/drivers/dri/radeon/radeon_state_init.c
@@ -645,11 +645,11 @@ static void tex_emit_cs(GLcontext *ctx, struct radeon_state_atom *atom)
      OUT_BATCH(CP_PACKET0(RADEON_PP_TXOFFSET_0 + (24 * i), 0));
      if (t->mt && !t->image_override) {
         if ((ctx->Texture.Unit[i]._ReallyEnabled & TEXTURE_CUBE_BIT)) {
-            lvl = &t->mt->levels[0];
+            lvl = &t->mt->levels[t->minLod];
 	    OUT_BATCH_RELOC(lvl->faces[5].offset, t->mt->bo, lvl->faces[5].offset,
 			RADEON_GEM_DOMAIN_GTT|RADEON_GEM_DOMAIN_VRAM, 0, 0);
         } else {
-           OUT_BATCH_RELOC(t->tile_bits, t->mt->bo, 0,
+           OUT_BATCH_RELOC(t->tile_bits, t->mt->bo, get_base_teximage_offset(t),
 		     RADEON_GEM_DOMAIN_GTT|RADEON_GEM_DOMAIN_VRAM, 0, 0);
         }
       } else {
diff --git a/src/mesa/drivers/dri/radeon/radeon_tex.c b/src/mesa/drivers/dri/radeon/radeon_tex.c
index 60981aada2..749ab75f20 100644
--- a/src/mesa/drivers/dri/radeon/radeon_tex.c
+++ b/src/mesa/drivers/dri/radeon/radeon_tex.c
@@ -348,17 +348,7 @@ static void radeonTexParameter( GLcontext *ctx, GLenum target,
    case GL_TEXTURE_MAX_LEVEL:
    case GL_TEXTURE_MIN_LOD:
    case GL_TEXTURE_MAX_LOD:
-
-      /* This isn't the most efficient solution but there doesn't appear to
-       * be a nice alternative.  Since there's no LOD clamping,
-       * we just have to rely on loading the right subset of mipmap levels
-       * to simulate a clamped LOD.
-       */
-      if (t->mt) {
-         radeon_miptree_unreference(t->mt);
-	 t->mt = 0;
-	 t->validated = GL_FALSE;
-      }
+      t->validated = GL_FALSE;
       break;
 
    default:
@@ -388,10 +378,8 @@ static void radeonDeleteTexture( GLcontext *ctx,
      }
    }
 
-   if (t->mt) {
-      radeon_miptree_unreference(t->mt);
-      t->mt = 0;
-   }
+   radeon_miptree_unreference(&t->mt);
+
    /* Free mipmap images and the texture object itself */
    _mesa_delete_texture_object(ctx, texObj);
 }
diff --git a/src/mesa/drivers/dri/radeon/radeon_texstate.c b/src/mesa/drivers/dri/radeon/radeon_texstate.c
index 429977a8bc..4d9eb73d20 100644
--- a/src/mesa/drivers/dri/radeon/radeon_texstate.c
+++ b/src/mesa/drivers/dri/radeon/radeon_texstate.c
@@ -699,14 +699,10 @@ void radeonSetTexBuffer2(__DRIcontext *pDRICtx, GLint target, GLint glx_texture_
 		radeon_bo_unref(rImage->bo);
 		rImage->bo = NULL;
 	}
-	if (t->mt) {
-		radeon_miptree_unreference(t->mt);
-		t->mt = NULL;
-	}
-	if (rImage->mt) {
-		radeon_miptree_unreference(rImage->mt);
-		rImage->mt = NULL;
-	}
+
+	radeon_miptree_unreference(&t->mt);
+	radeon_miptree_unreference(&rImage->mt);
+
 	_mesa_init_teximage_fields(radeon->glCtx, target, texImage,
 				   rb->base.Width, rb->base.Height, 1, 0, rb->cpp);
 	texImage->RowStride = rb->pitch / rb->cpp;
@@ -1021,7 +1017,7 @@ static GLboolean setup_hardware_state(r100ContextPtr rmesa, radeonTexObj *t, int
 	return GL_TRUE;
    }
 
-   firstImage = t->base.Image[0][t->mt->firstLevel];   
+   firstImage = t->base.Image[0][t->minLod];
 
    if (firstImage->Border > 0) {
       fprintf(stderr, "%s: border\n", __FUNCTION__);
@@ -1049,9 +1045,9 @@ static GLboolean setup_hardware_state(r100ContextPtr rmesa, radeonTexObj *t, int
 	 return GL_FALSE;
       }
    }
-   
+
    t->pp_txfilter &= ~RADEON_MAX_MIP_LEVEL_MASK;
-   t->pp_txfilter |= (t->mt->lastLevel - t->mt->firstLevel) << RADEON_MAX_MIP_LEVEL_SHIFT;
+   t->pp_txfilter |= (t->maxLod - t->minLod) << RADEON_MAX_MIP_LEVEL_SHIFT;
 	
    t->pp_txformat &= ~(RADEON_TXFORMAT_WIDTH_MASK |
 		       RADEON_TXFORMAT_HEIGHT_MASK |
@@ -1060,9 +1056,9 @@ static GLboolean setup_hardware_state(r100ContextPtr rmesa, radeonTexObj *t, int
 		       RADEON_TXFORMAT_F5_HEIGHT_MASK);
    t->pp_txformat |= ((log2Width << RADEON_TXFORMAT_WIDTH_SHIFT) |
 		      (log2Height << RADEON_TXFORMAT_HEIGHT_SHIFT));
-   
+
    t->tile_bits = 0;
-   
+
    if (t->base.Target == GL_TEXTURE_CUBE_MAP) {
       ASSERT(log2Width == log2Height);
       t->pp_txformat |= ((log2Width << RADEON_TXFORMAT_F5_WIDTH_SHIFT) |
-- 
cgit v1.2.3


From afe84fa698eae3e035e967589f0a8d55f6a83698 Mon Sep 17 00:00:00 2001
From: Maciej Cencora <m.cencora@gmail.com>
Date: Tue, 17 Nov 2009 19:46:59 +0100
Subject: r200: align for mipmap tree changes

---
 src/mesa/drivers/dri/r200/r200_state_init.c |  2 +-
 src/mesa/drivers/dri/r200/r200_tex.c        | 21 +++++----------------
 src/mesa/drivers/dri/r200/r200_texstate.c   | 21 ++++++++-------------
 3 files changed, 14 insertions(+), 30 deletions(-)

(limited to 'src')

diff --git a/src/mesa/drivers/dri/r200/r200_state_init.c b/src/mesa/drivers/dri/r200/r200_state_init.c
index 68bfeea701..e53fd72290 100644
--- a/src/mesa/drivers/dri/r200/r200_state_init.c
+++ b/src/mesa/drivers/dri/r200/r200_state_init.c
@@ -640,7 +640,7 @@ static void tex_emit(GLcontext *ctx, struct radeon_state_atom *atom)
    OUT_BATCH_TABLE(atom->cmd, 10);
 
    if (t && t->mt && !t->image_override) {
-     OUT_BATCH_RELOC(t->tile_bits, t->mt->bo, 0,
+     OUT_BATCH_RELOC(t->tile_bits, t->mt->bo, get_base_teximage_offset(t),
 		  RADEON_GEM_DOMAIN_GTT|RADEON_GEM_DOMAIN_VRAM, 0, 0);
    } else if (!t) {
      /* workaround for old CS mechanism */
diff --git a/src/mesa/drivers/dri/r200/r200_tex.c b/src/mesa/drivers/dri/r200/r200_tex.c
index 5a21a8b9c5..a417721553 100644
--- a/src/mesa/drivers/dri/r200/r200_tex.c
+++ b/src/mesa/drivers/dri/r200/r200_tex.c
@@ -385,16 +385,7 @@ static void r200TexParameter( GLcontext *ctx, GLenum target,
    case GL_TEXTURE_MAX_LEVEL:
    case GL_TEXTURE_MIN_LOD:
    case GL_TEXTURE_MAX_LOD:
-      /* This isn't the most efficient solution but there doesn't appear to
-       * be a nice alternative.  Since there's no LOD clamping,
-       * we just have to rely on loading the right subset of mipmap levels
-       * to simulate a clamped LOD.
-       */
-      if (t->mt) {
-         radeon_miptree_unreference(t->mt);
-	 t->mt = 0;
-	 t->validated = GL_FALSE;
-      }
+      t->validated = GL_FALSE;
       break;
 
    default:
@@ -413,7 +404,7 @@ static void r200DeleteTexture(GLcontext * ctx, struct gl_texture_object *texObj)
 	      (void *)texObj,
 	      _mesa_lookup_enum_by_nr(texObj->Target));
    }
-   
+
    if (rmesa) {
       int i;
       radeon_firevertices(&rmesa->radeon);
@@ -425,11 +416,9 @@ static void r200DeleteTexture(GLcontext * ctx, struct gl_texture_object *texObj)
 	 }
       }      
    }
-   
-   if (t->mt) {
-      radeon_miptree_unreference(t->mt);
-      t->mt = 0;
-   }
+
+   radeon_miptree_unreference(&t->mt);
+
    _mesa_delete_texture_object(ctx, texObj);
 }
 
diff --git a/src/mesa/drivers/dri/r200/r200_texstate.c b/src/mesa/drivers/dri/r200/r200_texstate.c
index 7d0afa1add..7782404a79 100644
--- a/src/mesa/drivers/dri/r200/r200_texstate.c
+++ b/src/mesa/drivers/dri/r200/r200_texstate.c
@@ -824,14 +824,10 @@ void r200SetTexBuffer2(__DRIcontext *pDRICtx, GLint target, GLint glx_texture_fo
 		radeon_bo_unref(rImage->bo);
 		rImage->bo = NULL;
 	}
-	if (t->mt) {
-		radeon_miptree_unreference(t->mt);
-		t->mt = NULL;
-	}
-	if (rImage->mt) {
-		radeon_miptree_unreference(rImage->mt);
-		rImage->mt = NULL;
-	}
+
+	radeon_miptree_unreference(&t->mt);
+	radeon_miptree_unreference(&rImage->mt);
+
 	_mesa_init_teximage_fields(radeon->glCtx, target, texImage,
 				   rb->base.Width, rb->base.Height, 1, 0, rb->cpp);
 	texImage->RowStride = rb->pitch / rb->cpp;
@@ -1423,10 +1419,9 @@ void set_re_cntl_d3d( GLcontext *ctx, int unit, GLboolean use_d3d )
  */
 static void setup_hardware_state(r200ContextPtr rmesa, radeonTexObj *t)
 {
-   int firstlevel = t->mt ? t->mt->firstLevel : 0;
-   const struct gl_texture_image *firstImage = t->base.Image[0][firstlevel];
+   const struct gl_texture_image *firstImage = t->base.Image[0][t->minLod];
    GLint log2Width, log2Height, log2Depth, texelBytes;
-   
+
    if ( t->bo ) {
        return;
    }
@@ -1454,9 +1449,9 @@ static void setup_hardware_state(r200ContextPtr rmesa, radeonTexObj *t)
 	 return;
       }
    }
-   
+
    t->pp_txfilter &= ~R200_MAX_MIP_LEVEL_MASK;
-   t->pp_txfilter |= (t->mt->lastLevel - t->mt->firstLevel) << R200_MAX_MIP_LEVEL_SHIFT;
+   t->pp_txfilter |= (t->maxLod - t->minLod) << R200_MAX_MIP_LEVEL_SHIFT;
 	
    t->pp_txformat &= ~(R200_TXFORMAT_WIDTH_MASK |
 		       R200_TXFORMAT_HEIGHT_MASK |
-- 
cgit v1.2.3


From 70dca0c273d681d004b014dd8d4434be664cb202 Mon Sep 17 00:00:00 2001
From: Ian Romanick <ian.d.romanick@intel.com>
Date: Tue, 17 Nov 2009 22:53:06 -0800
Subject: AL1616: Fix cut-and-paste bug

One of the PACK_COLOR_88 cases was left over from copying
_mesa_texstore_al88 to _mesa_texstore_al1616.
---
 src/mesa/main/texstore.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

(limited to 'src')

diff --git a/src/mesa/main/texstore.c b/src/mesa/main/texstore.c
index abb4ed2663..5387eb1283 100644
--- a/src/mesa/main/texstore.c
+++ b/src/mesa/main/texstore.c
@@ -2198,8 +2198,8 @@ _mesa_texstore_al1616(TEXSTORE_PARAMS)
             if (dstFormat == MESA_FORMAT_AL1616) {
                for (col = 0; col < srcWidth; col++) {
                   /* src[0] is luminance, src[1] is alpha */
-                 dstUI[col] = PACK_COLOR_88( FLOAT_TO_USHORT(src[1]),
-                                             FLOAT_TO_USHORT(src[0]) );
+                 dstUI[col] = PACK_COLOR_1616( FLOAT_TO_USHORT(src[1]),
+					       FLOAT_TO_USHORT(src[0]) );
                  src += 2;
                }
             }
-- 
cgit v1.2.3


From 7118db870091d4c9c2465e79f361ff0ed36d1f90 Mon Sep 17 00:00:00 2001
From: Maciej Cencora <m.cencora@gmail.com>
Date: Wed, 18 Nov 2009 22:02:48 +0100
Subject: r600: align for mipmap tree changes

---
 src/mesa/drivers/dri/r600/r600_tex.c      | 17 +++-----------
 src/mesa/drivers/dri/r600/r600_texstate.c | 37 ++++++++++++-------------------
 src/mesa/drivers/dri/r600/r700_chip.c     | 10 ++++++---
 3 files changed, 24 insertions(+), 40 deletions(-)

(limited to 'src')

diff --git a/src/mesa/drivers/dri/r600/r600_tex.c b/src/mesa/drivers/dri/r600/r600_tex.c
index 20965bb3c8..9d83a64e22 100644
--- a/src/mesa/drivers/dri/r600/r600_tex.c
+++ b/src/mesa/drivers/dri/r600/r600_tex.c
@@ -312,16 +312,7 @@ static void r600TexParameter(GLcontext * ctx, GLenum target,
 	case GL_TEXTURE_MAX_LEVEL:
 	case GL_TEXTURE_MIN_LOD:
 	case GL_TEXTURE_MAX_LOD:
-		/* This isn't the most efficient solution but there doesn't appear to
-		 * be a nice alternative.  Since there's no LOD clamping,
-		 * we just have to rely on loading the right subset of mipmap levels
-		 * to simulate a clamped LOD.
-		 */
-		if (t->mt) {
-			radeon_miptree_unreference(t->mt);
-			t->mt = 0;
-			t->validated = GL_FALSE;
-		}
+		t->validated = GL_FALSE;
 		break;
 
 	case GL_DEPTH_TEXTURE_MODE:
@@ -369,10 +360,8 @@ static void r600DeleteTexture(GLcontext * ctx, struct gl_texture_object *texObj)
 		t->bo = NULL;
 	}
 
-	if (t->mt) {
-		radeon_miptree_unreference(t->mt);
-		t->mt = 0;
-	}
+	radeon_miptree_unreference(&t->mt);
+
 	_mesa_delete_texture_object(ctx, texObj);
 }
 
diff --git a/src/mesa/drivers/dri/r600/r600_texstate.c b/src/mesa/drivers/dri/r600/r600_texstate.c
index 27c8354923..4ec315b78c 100644
--- a/src/mesa/drivers/dri/r600/r600_texstate.c
+++ b/src/mesa/drivers/dri/r600/r600_texstate.c
@@ -649,7 +649,6 @@ static void setup_hardware_state(context_t *rmesa, struct gl_texture_object *tex
 {
 	radeonTexObj *t = radeon_tex_obj(texObj);
 	const struct gl_texture_image *firstImage;
-	int firstlevel = t->mt ? t->mt->firstLevel : 0;
 	GLuint uTexelPitch, row_align;
 
 	if (rmesa->radeon.radeonScreen->driScreen->dri2.enabled &&
@@ -657,7 +656,7 @@ static void setup_hardware_state(context_t *rmesa, struct gl_texture_object *tex
 	    t->bo)
 		return;
 
-	firstImage = t->base.Image[0][firstlevel];
+	firstImage = t->base.Image[0][t->minLod];
 
 	if (!t->image_override) {
 		if (!r600GetTexFormat(texObj, firstImage->TexFormat)) {
@@ -692,7 +691,8 @@ static void setup_hardware_state(context_t *rmesa, struct gl_texture_object *tex
 	}
 
 	row_align = rmesa->radeon.texture_row_align - 1;
-	uTexelPitch = ((firstImage->Width * t->mt->bpp + row_align) & ~row_align) / t->mt->bpp;
+	uTexelPitch = (_mesa_format_row_stride(firstImage->TexFormat, firstImage->Width) + row_align) & ~row_align;
+	uTexelPitch = uTexelPitch / _mesa_get_format_bytes(firstImage->TexFormat);
 	uTexelPitch = (uTexelPitch + R700_TEXEL_PITCH_ALIGNMENT_MASK)
 		& ~R700_TEXEL_PITCH_ALIGNMENT_MASK;
 
@@ -706,10 +706,10 @@ static void setup_hardware_state(context_t *rmesa, struct gl_texture_object *tex
 	SETfield(t->SQ_TEX_RESOURCE1, firstImage->Height - 1,
 		 TEX_HEIGHT_shift, TEX_HEIGHT_mask);
 
-	if ((t->mt->lastLevel - t->mt->firstLevel) > 0) {
-		t->SQ_TEX_RESOURCE3 = t->mt->levels[0].size / 256;
-		SETfield(t->SQ_TEX_RESOURCE4, t->mt->firstLevel, BASE_LEVEL_shift, BASE_LEVEL_mask);
-		SETfield(t->SQ_TEX_RESOURCE5, t->mt->lastLevel, LAST_LEVEL_shift, LAST_LEVEL_mask);
+	if ((t->maxLod - t->minLod) > 0) {
+		t->SQ_TEX_RESOURCE3 = t->mt->levels[t->minLod].size / 256;
+		SETfield(t->SQ_TEX_RESOURCE4, 0, BASE_LEVEL_shift, BASE_LEVEL_mask);
+		SETfield(t->SQ_TEX_RESOURCE5, t->maxLod - t->minLod, LAST_LEVEL_shift, LAST_LEVEL_mask);
 	}
 }
 
@@ -808,9 +808,8 @@ void r600SetTexOffset(__DRIcontext * pDRICtx, GLint texname,
 	struct gl_texture_object *tObj =
 	    _mesa_lookup_texture(rmesa->radeon.glCtx, texname);
 	radeonTexObjPtr t = radeon_tex_obj(tObj);
-	int firstlevel = t->mt ? t->mt->firstLevel : 0;
 	const struct gl_texture_image *firstImage;
-	uint32_t pitch_val, size, row_align, bpp;
+	uint32_t pitch_val, size, row_align;
 
 	if (!tObj)
 		return;
@@ -820,13 +819,9 @@ void r600SetTexOffset(__DRIcontext * pDRICtx, GLint texname,
 	if (!offset)
 		return;
 
-	bpp = depth / 8;
-	if (bpp == 3) 
-		bpp = 4;
-
-	firstImage = t->base.Image[0][firstlevel];
+	firstImage = t->base.Image[0][t->minLod];
 	row_align = rmesa->radeon.texture_row_align - 1;
-	size = ((firstImage->Width * bpp + row_align) & ~row_align) * firstImage->Height;
+	size = ((_mesa_format_row_stride(firstImage->TexFormat, firstImage->Width) + row_align) & ~row_align) * firstImage->Height;
 	if (t->bo) {
 		radeon_bo_unref(t->bo);
 		t->bo = NULL;
@@ -949,14 +944,10 @@ void r600SetTexBuffer2(__DRIcontext *pDRICtx, GLint target, GLint glx_texture_fo
 		radeon_bo_unref(rImage->bo);
 		rImage->bo = NULL;
 	}
-	if (t->mt) {
-		radeon_miptree_unreference(t->mt);
-		t->mt = NULL;
-	}
-	if (rImage->mt) {
-		radeon_miptree_unreference(rImage->mt);
-		rImage->mt = NULL;
-	}
+
+	radeon_miptree_unreference(&t->mt);
+	radeon_miptree_unreference(&rImage->mt);
+
 	_mesa_init_teximage_fields(radeon->glCtx, target, texImage,
 				   rb->base.Width, rb->base.Height, 1, 0, rb->cpp);
 	texImage->RowStride = rb->pitch / rb->cpp;
diff --git a/src/mesa/drivers/dri/r600/r700_chip.c b/src/mesa/drivers/dri/r600/r700_chip.c
index ec76fbcb6d..2b2b4d748f 100644
--- a/src/mesa/drivers/dri/r600/r700_chip.c
+++ b/src/mesa/drivers/dri/r600/r700_chip.c
@@ -54,11 +54,15 @@ static void r700SendTexState(GLcontext *ctx, struct radeon_state_atom *atom)
 	for (i = 0; i < R700_TEXTURE_NUMBERUNITS; i++) {
 		if (ctx->Texture.Unit[i]._ReallyEnabled) {
 			radeonTexObj *t = r700->textures[i];
+			uint32_t offset;
 			if (t) {
-				if (!t->image_override)
+				if (!t->image_override) {
 					bo = t->mt->bo;
-				else
+					offset = get_base_teximage_offset(t);
+				} else {
 					bo = t->bo;
+					offset = 0;
+				}
 				if (bo) {
 
 					r700SyncSurf(context, bo,
@@ -77,7 +81,7 @@ static void r700SendTexState(GLcontext *ctx, struct radeon_state_atom *atom)
 					R600_OUT_BATCH(r700->textures[i]->SQ_TEX_RESOURCE6);
 					R600_OUT_BATCH_RELOC(r700->textures[i]->SQ_TEX_RESOURCE2,
 							     bo,
-							     0,
+							     offset,
 							     RADEON_GEM_DOMAIN_GTT|RADEON_GEM_DOMAIN_VRAM, 0, 0);
 					R600_OUT_BATCH_RELOC(r700->textures[i]->SQ_TEX_RESOURCE3,
 							     bo,
-- 
cgit v1.2.3


From 3bf12c8bea667f5fff0b6f495820a27141f595a2 Mon Sep 17 00:00:00 2001
From: Maciej Cencora <m.cencora@gmail.com>
Date: Wed, 18 Nov 2009 22:19:25 +0100
Subject: r300: allow disabling s3tc support if libtxc_dxtn is available

---
 src/mesa/drivers/dri/r300/r300_context.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

(limited to 'src')

diff --git a/src/mesa/drivers/dri/r300/r300_context.c b/src/mesa/drivers/dri/r300/r300_context.c
index 3ed49a85c5..5f07b95634 100644
--- a/src/mesa/drivers/dri/r300/r300_context.c
+++ b/src/mesa/drivers/dri/r300/r300_context.c
@@ -439,11 +439,11 @@ static void r300InitGLExtensions(GLcontext *ctx)
 	if (r300->options.stencil_two_side_disabled)
 		_mesa_disable_extension(ctx, "GL_EXT_stencil_two_side");
 
-	if (ctx->Mesa_DXTn || r300->options.s3tc_force_enabled) {
+	if (r300->options.s3tc_force_disabled) {
+		_mesa_disable_extension(ctx, "GL_EXT_texture_compression_s3tc");
+	} else if (ctx->Mesa_DXTn || r300->options.s3tc_force_enabled) {
 		_mesa_enable_extension(ctx, "GL_EXT_texture_compression_s3tc");
 		_mesa_enable_extension(ctx, "GL_S3_s3tc");
-	} else if (r300->options.s3tc_force_disabled) {
-		_mesa_disable_extension(ctx, "GL_EXT_texture_compression_s3tc");
 	}
 
 	if (!r300->radeon.radeonScreen->drmSupportsOcclusionQueries) {
-- 
cgit v1.2.3


From e73553bff74a41f08cba9d52b5fec19f15ab3d48 Mon Sep 17 00:00:00 2001
From: Jakob Bornecrantz <jakob@vmware.com>
Date: Wed, 18 Nov 2009 19:51:57 +0000
Subject: st/xorg: Use the correct DRI2BufferPtr struct on 1.6.4 servers

---
 src/gallium/state_trackers/xorg/xorg_dri2.c | 25 ++++++++++++++++---------
 1 file changed, 16 insertions(+), 9 deletions(-)

(limited to 'src')

diff --git a/src/gallium/state_trackers/xorg/xorg_dri2.c b/src/gallium/state_trackers/xorg/xorg_dri2.c
index c41a7cd639..adc9531dbd 100644
--- a/src/gallium/state_trackers/xorg/xorg_dri2.c
+++ b/src/gallium/state_trackers/xorg/xorg_dri2.c
@@ -137,6 +137,11 @@ driDoCreateBuffer(DrawablePtr pDraw, DRI2BufferPtr buffer, unsigned int format)
     buffer->cpp = 4;
     buffer->driverPrivate = private;
     buffer->flags = 0; /* not tiled */
+#if defined(DRI2INFOREC_VERSION) && DRI2INFOREC_VERSION == 2
+    ((DRI2Buffer2Ptr)buffer)->format = 0;
+#elif defined(DRI2INFOREC_VERSION) && DRI2INFOREC_VERSION >= 3
+    buffer->format = 0;
+#endif
     private->tex = tex;
 
     return TRUE;
@@ -157,12 +162,12 @@ driDoDestroyBuffer(DrawablePtr pDraw, DRI2BufferPtr buffer)
     (*pScreen->DestroyPixmap)(private->pPixmap);
 }
 
-#if defined(DRI2INFOREC_VERSION) && DRI2INFOREC_VERSION > 2
+#if defined(DRI2INFOREC_VERSION) && DRI2INFOREC_VERSION >= 2
 
-static DRI2BufferPtr
+static DRI2Buffer2Ptr
 driCreateBuffer(DrawablePtr pDraw, unsigned int attachment, unsigned int format)
 {
-    DRI2BufferPtr buffer;
+    DRI2Buffer2Ptr buffer;
     BufferPrivatePtr private;
 
     buffer = xcalloc(1, sizeof *buffer);
@@ -177,7 +182,8 @@ driCreateBuffer(DrawablePtr pDraw, unsigned int attachment, unsigned int format)
     buffer->attachment = attachment;
     buffer->driverPrivate = private;
 
-    if (driDoCreateBuffer(pDraw, buffer, format))
+    /* So far it is safe to downcast a DRI2Buffer2Ptr to DRI2BufferPtr */
+    if (driDoCreateBuffer(pDraw, (DRI2BufferPtr)buffer, format))
 	return buffer;
 
     xfree(private);
@@ -187,15 +193,16 @@ fail:
 }
 
 static void
-driDestroyBuffer(DrawablePtr pDraw, DRI2BufferPtr buffer)
+driDestroyBuffer(DrawablePtr pDraw, DRI2Buffer2Ptr buffer)
 {
-    driDoDestroyBuffer(pDraw, buffer);
+    /* So far it is safe to downcast a DRI2Buffer2Ptr to DRI2BufferPtr */
+    driDoDestroyBuffer(pDraw, (DRI2BufferPtr)buffer);
 
     xfree(buffer->driverPrivate);
     xfree(buffer);
 }
 
-#else /* DRI2INFOREC_VERSION <= 2 */
+#else /* !defined(DRI2INFOREC_VERSION) || DRI2INFOREC_VERSION < 2 */
 
 static DRI2BufferPtr
 driCreateBuffers(DrawablePtr pDraw, unsigned int *attachments, int count)
@@ -245,7 +252,7 @@ driDestroyBuffers(DrawablePtr pDraw, DRI2BufferPtr buffers, int count)
     }
 }
 
-#endif /* DRI2INFOREC_VERSION */
+#endif /* defined(DRI2INFOREC_VERSION) && DRI2INFOREC_VERSION >= 2 */
 
 static void
 driCopyRegion(DrawablePtr pDraw, RegionPtr pRegion,
@@ -352,7 +359,7 @@ driScreenInit(ScreenPtr pScreen)
     dri2info.driverName = pScrn->driverName;
     dri2info.deviceName = "/dev/dri/card0"; /* FIXME */
 
-#if defined(DRI2INFOREC_VERSION) && DRI2INFOREC_VERSION > 2
+#if defined(DRI2INFOREC_VERSION) && DRI2INFOREC_VERSION >= 2
     dri2info.CreateBuffer = driCreateBuffer;
     dri2info.DestroyBuffer = driDestroyBuffer;
 #else
-- 
cgit v1.2.3


From 9ab3c70f6568d980c3910d7ea8a3032445eaf49f Mon Sep 17 00:00:00 2001
From: Jakob Bornecrantz <jakob@vmware.com>
Date: Wed, 18 Nov 2009 19:56:50 +0000
Subject: st/xorg: Make the #if more easier to read

---
 src/gallium/state_trackers/xorg/xorg_dri2.c | 22 ++++++++++++++--------
 1 file changed, 14 insertions(+), 8 deletions(-)

(limited to 'src')

diff --git a/src/gallium/state_trackers/xorg/xorg_dri2.c b/src/gallium/state_trackers/xorg/xorg_dri2.c
index adc9531dbd..bd4acf7f82 100644
--- a/src/gallium/state_trackers/xorg/xorg_dri2.c
+++ b/src/gallium/state_trackers/xorg/xorg_dri2.c
@@ -42,6 +42,12 @@
 
 #include "util/u_rect.h"
 
+/* Make all the #if cases in the code esier to read */
+/* XXX can it be set to 1? */
+#ifndef DRI2INFOREC_VERSION
+#define DRI2INFOREC_VERSION 0
+#endif
+
 typedef struct {
     PixmapPtr pPixmap;
     struct pipe_texture *tex;
@@ -79,7 +85,7 @@ driDoCreateBuffer(DrawablePtr pDraw, DRI2BufferPtr buffer, unsigned int format)
     case DRI2BufferFrontLeft:
 	break;
     case DRI2BufferStencil:
-#if defined(DRI2INFOREC_VERSION) && DRI2INFOREC_VERSION > 2
+#if DRI2INFOREC_VERSION >= 3
     case DRI2BufferDepthStencil:
 #else
     /* Works on old X servers because sanity checking is for the weak */
@@ -137,9 +143,9 @@ driDoCreateBuffer(DrawablePtr pDraw, DRI2BufferPtr buffer, unsigned int format)
     buffer->cpp = 4;
     buffer->driverPrivate = private;
     buffer->flags = 0; /* not tiled */
-#if defined(DRI2INFOREC_VERSION) && DRI2INFOREC_VERSION == 2
+#if DRI2INFOREC_VERSION == 2
     ((DRI2Buffer2Ptr)buffer)->format = 0;
-#elif defined(DRI2INFOREC_VERSION) && DRI2INFOREC_VERSION >= 3
+#elif DRI2INFOREC_VERSION >= 3
     buffer->format = 0;
 #endif
     private->tex = tex;
@@ -162,7 +168,7 @@ driDoDestroyBuffer(DrawablePtr pDraw, DRI2BufferPtr buffer)
     (*pScreen->DestroyPixmap)(private->pPixmap);
 }
 
-#if defined(DRI2INFOREC_VERSION) && DRI2INFOREC_VERSION >= 2
+#if DRI2INFOREC_VERSION >= 2
 
 static DRI2Buffer2Ptr
 driCreateBuffer(DrawablePtr pDraw, unsigned int attachment, unsigned int format)
@@ -202,7 +208,7 @@ driDestroyBuffer(DrawablePtr pDraw, DRI2Buffer2Ptr buffer)
     xfree(buffer);
 }
 
-#else /* !defined(DRI2INFOREC_VERSION) || DRI2INFOREC_VERSION < 2 */
+#else /* DRI2INFOREC_VERSION < 2 */
 
 static DRI2BufferPtr
 driCreateBuffers(DrawablePtr pDraw, unsigned int *attachments, int count)
@@ -252,7 +258,7 @@ driDestroyBuffers(DrawablePtr pDraw, DRI2BufferPtr buffers, int count)
     }
 }
 
-#endif /* defined(DRI2INFOREC_VERSION) && DRI2INFOREC_VERSION >= 2 */
+#endif /* DRI2INFOREC_VERSION >= 2 */
 
 static void
 driCopyRegion(DrawablePtr pDraw, RegionPtr pRegion,
@@ -349,7 +355,7 @@ driScreenInit(ScreenPtr pScreen)
     modesettingPtr ms = modesettingPTR(pScrn);
     DRI2InfoRec dri2info;
 
-#if defined(DRI2INFOREC_VERSION)
+#if DRI2INFORCE_VERSION >= 2
     dri2info.version = DRI2INFOREC_VERSION;
 #else
     dri2info.version = 1;
@@ -359,7 +365,7 @@ driScreenInit(ScreenPtr pScreen)
     dri2info.driverName = pScrn->driverName;
     dri2info.deviceName = "/dev/dri/card0"; /* FIXME */
 
-#if defined(DRI2INFOREC_VERSION) && DRI2INFOREC_VERSION >= 2
+#if DRI2INFOREC_VERSION >= 2
     dri2info.CreateBuffer = driCreateBuffer;
     dri2info.DestroyBuffer = driDestroyBuffer;
 #else
-- 
cgit v1.2.3


From e12c9a6f3af6ec10cbd2e5cd2a6b90056652a2c0 Mon Sep 17 00:00:00 2001
From: Jakob Bornecrantz <jakob@vmware.com>
Date: Wed, 18 Nov 2009 22:50:26 +0000
Subject: st/xorg: Init all functions and fix spelling

---
 src/gallium/state_trackers/xorg/xorg_dri2.c | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

(limited to 'src')

diff --git a/src/gallium/state_trackers/xorg/xorg_dri2.c b/src/gallium/state_trackers/xorg/xorg_dri2.c
index bd4acf7f82..aca889d6f8 100644
--- a/src/gallium/state_trackers/xorg/xorg_dri2.c
+++ b/src/gallium/state_trackers/xorg/xorg_dri2.c
@@ -355,7 +355,7 @@ driScreenInit(ScreenPtr pScreen)
     modesettingPtr ms = modesettingPTR(pScrn);
     DRI2InfoRec dri2info;
 
-#if DRI2INFORCE_VERSION >= 2
+#if DRI2INFOREC_VERSION >= 2
     dri2info.version = DRI2INFOREC_VERSION;
 #else
     dri2info.version = 1;
@@ -368,6 +368,8 @@ driScreenInit(ScreenPtr pScreen)
 #if DRI2INFOREC_VERSION >= 2
     dri2info.CreateBuffer = driCreateBuffer;
     dri2info.DestroyBuffer = driDestroyBuffer;
+    dri2info.CreateBuffers = NULL;
+    dri2info.DestroyBuffers = NULL;
 #else
     dri2info.CreateBuffers = driCreateBuffers;
     dri2info.DestroyBuffers = driDestroyBuffers;
-- 
cgit v1.2.3


From ea114345a6f19331628910745650cb64750b2bda Mon Sep 17 00:00:00 2001
From: Michel Dänzer <daenzer@vmware.com>
Date: Thu, 19 Nov 2009 10:38:08 +0100
Subject: st/xorg: Don't initialize non-existing fields.

---
 src/gallium/state_trackers/xorg/xorg_dri2.c | 2 --
 1 file changed, 2 deletions(-)

(limited to 'src')

diff --git a/src/gallium/state_trackers/xorg/xorg_dri2.c b/src/gallium/state_trackers/xorg/xorg_dri2.c
index aca889d6f8..660ea6a1ba 100644
--- a/src/gallium/state_trackers/xorg/xorg_dri2.c
+++ b/src/gallium/state_trackers/xorg/xorg_dri2.c
@@ -368,8 +368,6 @@ driScreenInit(ScreenPtr pScreen)
 #if DRI2INFOREC_VERSION >= 2
     dri2info.CreateBuffer = driCreateBuffer;
     dri2info.DestroyBuffer = driDestroyBuffer;
-    dri2info.CreateBuffers = NULL;
-    dri2info.DestroyBuffers = NULL;
 #else
     dri2info.CreateBuffers = driCreateBuffers;
     dri2info.DestroyBuffers = driDestroyBuffers;
-- 
cgit v1.2.3


From 10dbdee05694489edd03b353dfe133a17e65b469 Mon Sep 17 00:00:00 2001
From: Michel Dänzer <daenzer@vmware.com>
Date: Thu, 19 Nov 2009 10:54:49 +0100
Subject: st/xorg: Remove superfluous flushes from the EXA WaitMarker hook.
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

Thanks to Thomas Hellström for pointing this out.
---
 src/gallium/state_trackers/xorg/xorg_exa.c | 10 +---------
 1 file changed, 1 insertion(+), 9 deletions(-)

(limited to 'src')

diff --git a/src/gallium/state_trackers/xorg/xorg_exa.c b/src/gallium/state_trackers/xorg/xorg_exa.c
index 6fa274eb0a..29fc861748 100644
--- a/src/gallium/state_trackers/xorg/xorg_exa.c
+++ b/src/gallium/state_trackers/xorg/xorg_exa.c
@@ -170,15 +170,7 @@ xorg_exa_common_done(struct exa_context *exa)
 static void
 ExaWaitMarker(ScreenPtr pScreen, int marker)
 {
-   ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum];
-   modesettingPtr ms = modesettingPTR(pScrn);
-   struct exa_context *exa = ms->exa;
-
-#if 0
-   xorg_exa_flush(exa, PIPE_FLUSH_RENDER_CACHE, NULL);
-#else
-   xorg_exa_finish(exa);
-#endif
+   /* Nothing to do, handled in the PrepareAccess hook */
 }
 
 static int
-- 
cgit v1.2.3


From 012d0193cc9ad6fdc9829db0a6884a5a590dd4c5 Mon Sep 17 00:00:00 2001
From: Michel Dänzer <daenzer@vmware.com>
Date: Thu, 19 Nov 2009 17:25:05 +0100
Subject: st/xorg: Don't complain about convolution filter being 'unknown'.

Also add a newline to the complaint so it'll be a little less annoying if we
actually encounter an unknown filter value again.
---
 src/gallium/state_trackers/xorg/xorg_composite.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

(limited to 'src')

diff --git a/src/gallium/state_trackers/xorg/xorg_composite.c b/src/gallium/state_trackers/xorg/xorg_composite.c
index 733bd53fca..86a52077c3 100644
--- a/src/gallium/state_trackers/xorg/xorg_composite.c
+++ b/src/gallium/state_trackers/xorg/xorg_composite.c
@@ -152,7 +152,8 @@ render_filter_to_gallium(int xrender_filter, int *out_filter)
       *out_filter = PIPE_TEX_FILTER_LINEAR;
       break;
    default:
-      debug_printf("Unkown xrender filter");
+      debug_printf("Unkown xrender filter\n");
+   case PictFilterConvolution:
       *out_filter = PIPE_TEX_FILTER_NEAREST;
       return FALSE;
    }
-- 
cgit v1.2.3


From 34145fc3b739d21387e7df483ca902c8373ce319 Mon Sep 17 00:00:00 2001
From: Michel Dänzer <daenzer@vmware.com>
Date: Thu, 19 Nov 2009 17:30:32 +0100
Subject: st/xorg: Try harder to ensure a shared texture has valid contents
 right away.

---
 src/gallium/state_trackers/xorg/xorg_dri2.c | 3 +++
 1 file changed, 3 insertions(+)

(limited to 'src')

diff --git a/src/gallium/state_trackers/xorg/xorg_dri2.c b/src/gallium/state_trackers/xorg/xorg_dri2.c
index 660ea6a1ba..9a7c356860 100644
--- a/src/gallium/state_trackers/xorg/xorg_dri2.c
+++ b/src/gallium/state_trackers/xorg/xorg_dri2.c
@@ -127,9 +127,12 @@ driDoCreateBuffer(DrawablePtr pDraw, DRI2BufferPtr buffer, unsigned int format)
     }
 
     if (!tex) {
+	/* First call to make sure we have a pixmap private */
 	exaMoveInPixmap(private->pPixmap);
 	xorg_exa_set_shared_usage(private->pPixmap);
 	pScreen->ModifyPixmapHeader(private->pPixmap, 0, 0, 0, 0, 0, NULL);
+	/* Second call to make sure texture has valid contents */
+	exaMoveInPixmap(private->pPixmap);
 	tex = xorg_exa_get_texture(private->pPixmap);
     }
 
-- 
cgit v1.2.3


From 10c67f938194a3b99ce2717318c77d86abc54933 Mon Sep 17 00:00:00 2001
From: Michel Dänzer <daenzer@vmware.com>
Date: Thu, 19 Nov 2009 17:47:21 +0100
Subject: st/xorg: Miscellaneous XVideo fixes.

* Make sure the destination pixmap has a texture to render into.
* Fix damage reporting so the EXA migration code can do the right thing.
* Fix destination coordinates for redirected windows.
---
 src/gallium/state_trackers/xorg/xorg_xv.c | 14 +++++++++++---
 1 file changed, 11 insertions(+), 3 deletions(-)

(limited to 'src')

diff --git a/src/gallium/state_trackers/xorg/xorg_xv.c b/src/gallium/state_trackers/xorg/xorg_xv.c
index 2b935c0f73..7cc532b1c8 100644
--- a/src/gallium/state_trackers/xorg/xorg_xv.c
+++ b/src/gallium/state_trackers/xorg/xorg_xv.c
@@ -446,6 +446,11 @@ display_video(ScrnInfoPtr pScrn, struct xorg_xv_port_priv *pPriv, int id,
    int x, y, w, h;
    struct exa_pixmap_priv *dst = exaGetPixmapDriverPrivate(pPixmap);
 
+   if (!dst->tex) {
+	xorg_exa_set_shared_usage(pPixmap);
+	pScrn->pScreen->ModifyPixmapHeader(pPixmap, 0, 0, 0, 0, 0, NULL);
+   }
+
    if (!dst || !dst->tex)
       XORG_FALLBACK("Xv destination %s", !dst ? "!dst" : "!dst->tex");
 
@@ -469,6 +474,9 @@ display_video(ScrnInfoPtr pScrn, struct xorg_xv_port_priv *pPriv, int id,
    setup_vs_video_constants(pPriv->r, dst);
    setup_fs_video_constants(pPriv->r, hdtv);
 
+   exaMoveInPixmap(pPixmap);
+   DamageDamageRegion(&pPixmap->drawable, dstRegion);
+
    while (nbox--) {
       int box_x1 = pbox->x1;
       int box_y1 = pbox->y1;
@@ -476,8 +484,8 @@ display_video(ScrnInfoPtr pScrn, struct xorg_xv_port_priv *pPriv, int id,
       int box_y2 = pbox->y2;
       float diff_x = (float)src_w / (float)dst_w;
       float diff_y = (float)src_h / (float)dst_h;
-      int offset_x = box_x1 - dstX;
-      int offset_y = box_y1 - dstY;
+      int offset_x = box_x1 - dstX + pPixmap->screen_x;
+      int offset_y = box_y1 - dstY + pPixmap->screen_y;
       int offset_w;
       int offset_h;
 
@@ -495,7 +503,7 @@ display_video(ScrnInfoPtr pScrn, struct xorg_xv_port_priv *pPriv, int id,
 
       pbox++;
    }
-   DamageDamageRegion(&pPixmap->drawable, dstRegion);
+   DamageRegionProcessPending(&pPixmap->drawable);
 
    return TRUE;
 }
-- 
cgit v1.2.3


From 31ea323b4d432b557d7664187f17ccefc6d3947b Mon Sep 17 00:00:00 2001
From: Michel Dänzer <daenzer@vmware.com>
Date: Thu, 19 Nov 2009 17:52:55 +0100
Subject: st/xorg: Replace compile-time acceleration switch with Option
 "2DAccel".

This option can be used to disable 2D acceleration. DRI2 and XVideo blits will
still be accelerated, at least to some degree even with compositing.
---
 src/gallium/state_trackers/xorg/xorg_dri2.c    |  4 ++++
 src/gallium/state_trackers/xorg/xorg_driver.c  |  5 ++++-
 src/gallium/state_trackers/xorg/xorg_exa.c     | 24 ++++++++++++++----------
 src/gallium/state_trackers/xorg/xorg_exa.h     |  2 ++
 src/gallium/state_trackers/xorg/xorg_tracker.h |  2 +-
 5 files changed, 25 insertions(+), 12 deletions(-)

(limited to 'src')

diff --git a/src/gallium/state_trackers/xorg/xorg_dri2.c b/src/gallium/state_trackers/xorg/xorg_dri2.c
index 9a7c356860..ca3c712dcd 100644
--- a/src/gallium/state_trackers/xorg/xorg_dri2.c
+++ b/src/gallium/state_trackers/xorg/xorg_dri2.c
@@ -276,6 +276,7 @@ driCopyRegion(DrawablePtr pDraw, RegionPtr pRegion,
     PixmapPtr dst_pixmap;
     GCPtr gc;
     RegionPtr copy_clip;
+    Bool save_accel;
 
     /*
      * In driCreateBuffers we dewrap windows into the
@@ -341,8 +342,11 @@ driCopyRegion(DrawablePtr pDraw, RegionPtr pRegion,
 	}
     }
 
+    save_accel = ms->exa->accel;
+    ms->exa->accel = TRUE;
     (*gc->ops->CopyArea)(&src_pixmap->drawable, &dst_pixmap->drawable, gc,
 			 0, 0, pDraw->width, pDraw->height, 0, 0);
+    ms->exa->accel = save_accel;
 
     FreeScratchGC(gc);
 
diff --git a/src/gallium/state_trackers/xorg/xorg_driver.c b/src/gallium/state_trackers/xorg/xorg_driver.c
index 26cf2dd772..d949167adc 100644
--- a/src/gallium/state_trackers/xorg/xorg_driver.c
+++ b/src/gallium/state_trackers/xorg/xorg_driver.c
@@ -75,10 +75,12 @@ static Bool PreInit(ScrnInfoPtr pScrn, int flags);
 typedef enum
 {
     OPTION_SW_CURSOR,
+    OPTION_2D_ACCEL,
 } modesettingOpts;
 
 static const OptionInfoRec Options[] = {
     {OPTION_SW_CURSOR, "SWcursor", OPTV_BOOLEAN, {0}, FALSE},
+    {OPTION_2D_ACCEL, "2DAccel", OPTV_BOOLEAN, {0}, FALSE},
     {-1, NULL, OPTV_NONE, {0}, FALSE}
 };
 
@@ -609,7 +611,8 @@ ScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv)
 
     xf86SetBlackWhitePixels(pScreen);
 
-    ms->exa = xorg_exa_init(pScrn);
+    ms->exa = xorg_exa_init(pScrn, xf86ReturnOptValBool(ms->Options,
+                                                        OPTION_2D_ACCEL, TRUE));
     ms->debug_fallback = debug_get_bool_option("XORG_DEBUG_FALLBACK", TRUE);
 
     xorg_init_video(pScreen);
diff --git a/src/gallium/state_trackers/xorg/xorg_exa.c b/src/gallium/state_trackers/xorg/xorg_exa.c
index 29fc861748..3a51ad2d59 100644
--- a/src/gallium/state_trackers/xorg/xorg_exa.c
+++ b/src/gallium/state_trackers/xorg/xorg_exa.c
@@ -46,7 +46,6 @@
 #include "util/u_rect.h"
 
 #define DEBUG_PRINT 0
-#define ACCEL_ENABLED TRUE
 
 /*
  * Helper functions
@@ -376,7 +375,7 @@ ExaPrepareSolid(PixmapPtr pPixmap, int alu, Pixel planeMask, Pixel fg)
 	XORG_FALLBACK("format %s", pf_name(priv->tex->format));
     }
 
-    return ACCEL_ENABLED && xorg_solid_bind_state(exa, priv, fg);
+    return exa->accel && xorg_solid_bind_state(exa, priv, fg);
 }
 
 static void
@@ -435,7 +434,7 @@ ExaPrepareCopy(PixmapPtr pSrcPixmap, PixmapPtr pDstPixmap, int xdir,
     exa->copy.src = src_priv;
     exa->copy.dst = priv;
 
-    return ACCEL_ENABLED;
+    return exa->accel;
 }
 
 static void
@@ -564,7 +563,7 @@ ExaPrepareComposite(int op, PicturePtr pSrcPicture,
                        render_format_name(pMaskPicture->format));
    }
 
-   return ACCEL_ENABLED &&
+   return exa->accel &&
           xorg_composite_bind_state(exa, op, pSrcPicture, pMaskPicture,
                                     pDstPicture,
                                     pSrc ? exaGetPixmapDriverPrivate(pSrc) : NULL,
@@ -597,6 +596,9 @@ ExaCheckComposite(int op,
 		  PicturePtr pSrcPicture, PicturePtr pMaskPicture,
 		  PicturePtr pDstPicture)
 {
+   ScrnInfoPtr pScrn = xf86Screens[pDstPicture->pDrawable->pScreen->myNum];
+   modesettingPtr ms = modesettingPTR(pScrn);
+   struct exa_context *exa = ms->exa;
    boolean accelerated = xorg_composite_accelerated(op,
                                                     pSrcPicture,
                                                     pMaskPicture,
@@ -605,7 +607,7 @@ ExaCheckComposite(int op,
    debug_printf("ExaCheckComposite(%d, %p, %p, %p) = %d\n",
                 op, pSrcPicture, pMaskPicture, pDstPicture, accelerated);
 #endif
-   return ACCEL_ENABLED && accelerated;
+   return exa->accel && accelerated;
 }
 
 static void *
@@ -743,10 +745,11 @@ ExaModifyPixmapHeader(PixmapPtr pPixmap, int width, int height,
 			     bitsPerPixel, devKind, NULL);
 
     /* Deal with screen resize */
-    if (!priv->tex ||
-        (priv->tex->width[0] != width ||
-         priv->tex->height[0] != height ||
-         priv->tex_flags != priv->flags)) {
+    if ((exa->accel || priv->flags) &&
+        (!priv->tex ||
+         (priv->tex->width[0] != width ||
+          priv->tex->height[0] != height ||
+          priv->tex_flags != priv->flags))) {
 	struct pipe_texture *texture = NULL;
 	struct pipe_texture template;
 
@@ -861,7 +864,7 @@ xorg_exa_close(ScrnInfoPtr pScrn)
 }
 
 void *
-xorg_exa_init(ScrnInfoPtr pScrn)
+xorg_exa_init(ScrnInfoPtr pScrn, Bool accel)
 {
    modesettingPtr ms = modesettingPTR(pScrn);
    struct exa_context *exa;
@@ -926,6 +929,7 @@ xorg_exa_init(ScrnInfoPtr pScrn)
    ms->ctx = exa->pipe;
 
    exa->renderer = renderer_create(exa->pipe);
+   exa->accel = accel;
 
    return (void *)exa;
 
diff --git a/src/gallium/state_trackers/xorg/xorg_exa.h b/src/gallium/state_trackers/xorg/xorg_exa.h
index 7f4aebb9c3..15cc29d662 100644
--- a/src/gallium/state_trackers/xorg/xorg_exa.h
+++ b/src/gallium/state_trackers/xorg/xorg_exa.h
@@ -24,6 +24,8 @@ struct exa_context
    float solid_color[4];
    boolean has_solid_color;
 
+   boolean accel;
+
    /* float[9] projective matrix bound to pictures */
    struct {
       float    src[9];
diff --git a/src/gallium/state_trackers/xorg/xorg_tracker.h b/src/gallium/state_trackers/xorg/xorg_tracker.h
index 6130cf6621..20c9259c7b 100644
--- a/src/gallium/state_trackers/xorg/xorg_tracker.h
+++ b/src/gallium/state_trackers/xorg/xorg_tracker.h
@@ -131,7 +131,7 @@ xorg_exa_create_root_texture(ScrnInfoPtr pScrn,
 			     int depth, int bpp);
 
 void *
-xorg_exa_init(ScrnInfoPtr pScrn);
+xorg_exa_init(ScrnInfoPtr pScrn, Bool accel);
 
 void
 xorg_exa_close(ScrnInfoPtr pScrn);
-- 
cgit v1.2.3


From 367cfca808e74101689dd0acb247f3ec38fc4c7f Mon Sep 17 00:00:00 2001
From: Brian Paul <brianp@vmware.com>
Date: Thu, 19 Nov 2009 11:37:50 -0700
Subject: softpipe: add missing check in softpipe_is_texture_referenced()

Check if the named texture is referenced by the texture cache.
---
 src/gallium/drivers/softpipe/sp_context.c | 10 ++++++++--
 1 file changed, 8 insertions(+), 2 deletions(-)

(limited to 'src')

diff --git a/src/gallium/drivers/softpipe/sp_context.c b/src/gallium/drivers/softpipe/sp_context.c
index 94d000a5ac..d325499bf8 100644
--- a/src/gallium/drivers/softpipe/sp_context.c
+++ b/src/gallium/drivers/softpipe/sp_context.c
@@ -120,7 +120,7 @@ softpipe_destroy( struct pipe_context *pipe )
  * if (the texture is being used as a framebuffer surface)
  *    return PIPE_REFERENCED_FOR_WRITE
  * else if (the texture is a bound texture source)
- *    return PIPE_REFERENCED_FOR_READ  XXX not done yet
+ *    return PIPE_REFERENCED_FOR_READ
  * else
  *    return PIPE_UNREFERENCED
  */
@@ -132,6 +132,7 @@ softpipe_is_texture_referenced( struct pipe_context *pipe,
    struct softpipe_context *softpipe = softpipe_context( pipe );
    unsigned i;
 
+   /* check if any of the bound drawing surfaces are this texture */
    if (softpipe->dirty_render_cache) {
       for (i = 0; i < softpipe->framebuffer.nr_cbufs; i++) {
          if (softpipe->framebuffer.cbufs[i] && 
@@ -145,7 +146,12 @@ softpipe_is_texture_referenced( struct pipe_context *pipe,
       }
    }
    
-   /* FIXME: we also need to do the same for the texture cache */
+   /* check if any of the tex_cache textures are this texture */
+   for (i = 0; i < PIPE_MAX_SAMPLERS; i++) {
+      if (softpipe->tex_cache[i] &&
+          softpipe->tex_cache[i]->texture == texture)
+         return PIPE_REFERENCED_FOR_READ;
+   }
    
    return PIPE_UNREFERENCED;
 }
-- 
cgit v1.2.3


From 3f4016650099642f900fc169c078b1d78128899a Mon Sep 17 00:00:00 2001
From: Brian Paul <brianp@vmware.com>
Date: Thu, 19 Nov 2009 14:02:06 -0700
Subject: softpipe: whitespace/indentation fixes

---
 src/gallium/drivers/softpipe/sp_context.c | 8 +++-----
 1 file changed, 3 insertions(+), 5 deletions(-)

(limited to 'src')

diff --git a/src/gallium/drivers/softpipe/sp_context.c b/src/gallium/drivers/softpipe/sp_context.c
index d325499bf8..5f60139968 100644
--- a/src/gallium/drivers/softpipe/sp_context.c
+++ b/src/gallium/drivers/softpipe/sp_context.c
@@ -249,9 +249,9 @@ softpipe_create( struct pipe_screen *screen )
 
 
    /* setup quad rendering stages */
-      softpipe->quad.shade = sp_quad_shade_stage(softpipe);
-      softpipe->quad.depth_test = sp_quad_depth_test_stage(softpipe);
-      softpipe->quad.blend = sp_quad_blend_stage(softpipe);
+   softpipe->quad.shade = sp_quad_shade_stage(softpipe);
+   softpipe->quad.depth_test = sp_quad_depth_test_stage(softpipe);
+   softpipe->quad.blend = sp_quad_blend_stage(softpipe);
 
 
    /*
@@ -281,7 +281,6 @@ softpipe_create( struct pipe_screen *screen )
    draw_set_render(softpipe->draw, softpipe->vbuf_backend);
 
 
-
    /* plug in AA line/point stages */
    draw_install_aaline_stage(softpipe->draw, &softpipe->pipe);
    draw_install_aapoint_stage(softpipe->draw, &softpipe->pipe);
@@ -297,4 +296,3 @@ softpipe_create( struct pipe_screen *screen )
    softpipe_destroy(&softpipe->pipe);
    return NULL;
 }
-
-- 
cgit v1.2.3


From 273f4d6b5fe125bf0cba44c5ee8b25c76d3396c0 Mon Sep 17 00:00:00 2001
From: Brian Paul <brianp@vmware.com>
Date: Thu, 19 Nov 2009 14:10:57 -0700
Subject: st/mesa: remove pointless assertion

---
 src/mesa/state_tracker/st_cb_texture.c | 2 --
 1 file changed, 2 deletions(-)

(limited to 'src')

diff --git a/src/mesa/state_tracker/st_cb_texture.c b/src/mesa/state_tracker/st_cb_texture.c
index 9186db76e1..5283ece551 100644
--- a/src/mesa/state_tracker/st_cb_texture.c
+++ b/src/mesa/state_tracker/st_cb_texture.c
@@ -1724,8 +1724,6 @@ copy_image_data_to_texture(struct st_context *st,
       pipe_texture_reference(&stImage->pt, NULL);
    }
    else if (stImage->base.Data) {
-      assert(stImage->base.Data != NULL);
-
       /* More straightforward upload.  
        */
 
-- 
cgit v1.2.3


From 92863109af05acdb4ee5e42141c83ab0f18b7f88 Mon Sep 17 00:00:00 2001
From: Brian Paul <brianp@vmware.com>
Date: Thu, 19 Nov 2009 14:17:09 -0700
Subject: st/mesa: remove is_compressed_mesa_format()

---
 src/mesa/state_tracker/st_cb_texture.c | 23 ++---------------------
 1 file changed, 2 insertions(+), 21 deletions(-)

(limited to 'src')

diff --git a/src/mesa/state_tracker/st_cb_texture.c b/src/mesa/state_tracker/st_cb_texture.c
index 5283ece551..76b6bbeb4b 100644
--- a/src/mesa/state_tracker/st_cb_texture.c
+++ b/src/mesa/state_tracker/st_cb_texture.c
@@ -119,25 +119,6 @@ compressed_num_bytes(gl_format format)
 }
 
 
-static GLboolean
-is_compressed_mesa_format(gl_format format)
-{
-   switch (format) {
-   case MESA_FORMAT_RGB_DXT1:
-   case MESA_FORMAT_RGBA_DXT1:
-   case MESA_FORMAT_RGBA_DXT3:
-   case MESA_FORMAT_RGBA_DXT5:
-   case MESA_FORMAT_SRGB_DXT1:
-   case MESA_FORMAT_SRGBA_DXT1:
-   case MESA_FORMAT_SRGBA_DXT3:
-   case MESA_FORMAT_SRGBA_DXT5:
-      return GL_TRUE;
-   default:
-      return GL_FALSE;
-   }
-}
-
-
 /** called via ctx->Driver.NewTextureImage() */
 static struct gl_texture_image *
 st_NewTextureImage(GLcontext * ctx)
@@ -663,7 +644,7 @@ st_TexImage(GLcontext * ctx,
     */
    if (!compressed_src &&
        !ctx->Mesa_DXTn &&
-       is_compressed_mesa_format(texImage->TexFormat) &&
+       _mesa_is_format_compressed(texImage->TexFormat) &&
        screen->is_format_supported(screen,
                                    stImage->pt->format,
                                    stImage->pt->target,
@@ -1066,7 +1047,7 @@ st_TexSubimage(GLcontext *ctx, GLint dims, GLenum target, GLint level,
    /* See if we can do texture compression with a blit/render.
     */
    if (!ctx->Mesa_DXTn &&
-       is_compressed_mesa_format(texImage->TexFormat) &&
+       _mesa_is_format_compressed(texImage->TexFormat) &&
        screen->is_format_supported(screen,
                                    stImage->pt->format,
                                    stImage->pt->target,
-- 
cgit v1.2.3


From dc41d62250ce51f28e94f1d365836ac9f2ff8907 Mon Sep 17 00:00:00 2001
From: Brian Paul <brianp@vmware.com>
Date: Thu, 19 Nov 2009 14:35:38 -0700
Subject: st/mesa: get rid of compressed_num_bytes() code

---
 src/mesa/state_tracker/st_cb_texture.c | 40 ++++------------------------------
 1 file changed, 4 insertions(+), 36 deletions(-)

(limited to 'src')

diff --git a/src/mesa/state_tracker/st_cb_texture.c b/src/mesa/state_tracker/st_cb_texture.c
index 76b6bbeb4b..d4630a514f 100644
--- a/src/mesa/state_tracker/st_cb_texture.c
+++ b/src/mesa/state_tracker/st_cb_texture.c
@@ -93,32 +93,6 @@ gl_target_to_pipe(GLenum target)
 }
 
 
-/**
- * Return nominal bytes per texel for a compressed format, 0 for non-compressed
- * format.
- */
-static GLuint
-compressed_num_bytes(gl_format format)
-{
-   switch (format) {
-#if FEATURE_texture_fxt1
-   case MESA_FORMAT_RGB_FXT1:
-   case MESA_FORMAT_RGBA_FXT1:
-#endif
-#if FEATURE_texture_s3tc
-   case MESA_FORMAT_RGB_DXT1:
-   case MESA_FORMAT_RGBA_DXT1:
-      return 2;
-   case MESA_FORMAT_RGBA_DXT3:
-   case MESA_FORMAT_RGBA_DXT5:
-      return 4;
-#endif
-   default:
-      return 0;
-   }
-}
-
-
 /** called via ctx->Driver.NewTextureImage() */
 static struct gl_texture_image *
 st_NewTextureImage(GLcontext * ctx)
@@ -1743,7 +1717,7 @@ st_finalize_texture(GLcontext *ctx,
 {
    struct st_texture_object *stObj = st_texture_object(tObj);
    const GLuint nr_faces = (stObj->base.Target == GL_TEXTURE_CUBE_MAP) ? 6 : 1;
-   GLuint cpp, face;
+   GLuint blockSize, face;
    struct st_texture_image *firstImage;
 
    *needFlush = GL_FALSE;
@@ -1775,13 +1749,8 @@ st_finalize_texture(GLcontext *ctx,
       pipe_texture_reference(&stObj->pt, firstImage->pt);
    }
 
-   /* FIXME: determine format block instead of cpp */
-   if (_mesa_is_format_compressed(firstImage->base.TexFormat)) {
-      cpp = compressed_num_bytes(firstImage->base.TexFormat);
-   }
-   else {
-      cpp = _mesa_get_format_bytes(firstImage->base.TexFormat);
-   }
+   /* bytes per pixel block (blocks are usually 1x1) */
+   blockSize = _mesa_get_format_bytes(firstImage->base.TexFormat);
 
    /* If we already have a gallium texture, check that it matches the texture
     * object's format, target, size, num_levels, etc.
@@ -1795,8 +1764,7 @@ st_finalize_texture(GLcontext *ctx,
           stObj->pt->width[0] != firstImage->base.Width2 ||
           stObj->pt->height[0] != firstImage->base.Height2 ||
           stObj->pt->depth[0] != firstImage->base.Depth2 ||
-          /* Nominal bytes per pixel: */
-          stObj->pt->block.size / stObj->pt->block.width != cpp)
+          stObj->pt->block.size != blockSize)
       {
          pipe_texture_reference(&stObj->pt, NULL);
          ctx->st->dirty.st |= ST_NEW_FRAMEBUFFER;
-- 
cgit v1.2.3


From 2198497203ec427f836978098028abf3350e5e57 Mon Sep 17 00:00:00 2001
From: Brian Paul <brianp@vmware.com>
Date: Thu, 19 Nov 2009 15:17:56 -0700
Subject: vbo: added recursion check in vbo_exec_FlushVertices()

---
 src/mesa/vbo/vbo_exec_api.c | 18 +++++++++++++++++-
 1 file changed, 17 insertions(+), 1 deletion(-)

(limited to 'src')

diff --git a/src/mesa/vbo/vbo_exec_api.c b/src/mesa/vbo/vbo_exec_api.c
index f72d2d84f3..c90565eae8 100644
--- a/src/mesa/vbo/vbo_exec_api.c
+++ b/src/mesa/vbo/vbo_exec_api.c
@@ -867,15 +867,27 @@ void vbo_exec_FlushVertices_internal( GLcontext *ctx, GLboolean unmap )
 }
 
 
-
+/**
+ * \param flags  bitmask of FLUSH_STORED_VERTICES, FLUSH_UPDATE_CURRENT
+ */
 void vbo_exec_FlushVertices( GLcontext *ctx, GLuint flags )
 {
    struct vbo_exec_context *exec = &vbo_context(ctx)->exec;
 
+#ifdef DEBUG
+   /* debug check: make sure we don't get called recursively */
+   static GLuint callDepth = 0;
+   callDepth++;
+   assert(callDepth == 1);
+#endif
+
    if (0) _mesa_printf("%s\n", __FUNCTION__);
 
    if (exec->ctx->Driver.CurrentExecPrimitive != PRIM_OUTSIDE_BEGIN_END) {
       if (0) _mesa_printf("%s - inside begin/end\n", __FUNCTION__);
+#ifdef DEBUG
+      callDepth--;
+#endif
       return;
    }
 
@@ -889,6 +901,10 @@ void vbo_exec_FlushVertices( GLcontext *ctx, GLuint flags )
    }
 
    exec->ctx->Driver.NeedFlush &= ~flags;
+
+#ifdef DEBUG
+   callDepth--;
+#endif
 }
 
 
-- 
cgit v1.2.3


From 4e6c79ac166b71414f09e671aaad0e1d0d406e42 Mon Sep 17 00:00:00 2001
From: Brian Paul <brianp@vmware.com>
Date: Thu, 19 Nov 2009 15:18:17 -0700
Subject: st/mesa: replace st_flush() with pipe->flush()

We only need to flush the gallium driver in this case.
Fixes a recursive state validation bug.
---
 src/mesa/state_tracker/st_texture.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

(limited to 'src')

diff --git a/src/mesa/state_tracker/st_texture.c b/src/mesa/state_tracker/st_texture.c
index 3945822f66..10f1351283 100644
--- a/src/mesa/state_tracker/st_texture.c
+++ b/src/mesa/state_tracker/st_texture.c
@@ -588,5 +588,5 @@ st_teximage_flush_before_map(struct st_context *st,
 
    if (referenced && ((referenced & PIPE_REFERENCED_FOR_WRITE) ||
 		      (usage & PIPE_TRANSFER_WRITE)))
-      st_flush(st, PIPE_FLUSH_RENDER_CACHE, NULL);
+      st->pipe->flush(st->pipe, PIPE_FLUSH_RENDER_CACHE, NULL);
 }
-- 
cgit v1.2.3


From 8b808d50e2f4be57c3a245afea462540dab1484e Mon Sep 17 00:00:00 2001
From: Vinson Lee <vlee@vmware.com>
Date: Thu, 19 Nov 2009 14:38:39 -0800
Subject: st/xorg: Fix infinite loop in copy_packed_data.

---
 src/gallium/state_trackers/xorg/xorg_xv.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

(limited to 'src')

diff --git a/src/gallium/state_trackers/xorg/xorg_xv.c b/src/gallium/state_trackers/xorg/xorg_xv.c
index 7cc532b1c8..a1e74fad59 100644
--- a/src/gallium/state_trackers/xorg/xorg_xv.c
+++ b/src/gallium/state_trackers/xorg/xorg_xv.c
@@ -256,7 +256,7 @@ copy_packed_data(ScrnInfoPtr pScrn,
    switch (id) {
    case FOURCC_YV12: {
       for (i = 0; i < w; ++i) {
-         for (j = 0; i < h; ++j) {
+         for (j = 0; j < h; ++j) {
             /*XXX use src? */
             y1  = buf[j*w + i];
             u   = buf[(j/2) * (w/2) + i/2 + y_array_size];
-- 
cgit v1.2.3


From f8ea5318200c1ed839fc387b16a57c8d9969974b Mon Sep 17 00:00:00 2001
From: Dave Airlie <airlied@redhat.com>
Date: Fri, 20 Nov 2009 11:45:43 +1000
Subject: r100: fix texture_from_pixmap and compiz.

r100 state emission has separate rect and non-rect states,
if we are doing TFP for a TEXTURE_2D we shouldn't use the rect
states as they won't get emitted properly.

Signed-off-by: Dave Airlie <airlied@redhat.com>
---
 src/mesa/drivers/dri/radeon/radeon_texstate.c | 17 ++++++++++-------
 1 file changed, 10 insertions(+), 7 deletions(-)

(limited to 'src')

diff --git a/src/mesa/drivers/dri/radeon/radeon_texstate.c b/src/mesa/drivers/dri/radeon/radeon_texstate.c
index 4d9eb73d20..3cbe3b4725 100644
--- a/src/mesa/drivers/dri/radeon/radeon_texstate.c
+++ b/src/mesa/drivers/dri/radeon/radeon_texstate.c
@@ -714,8 +714,6 @@ void radeonSetTexBuffer2(__DRIcontext *pDRICtx, GLint target, GLint glx_texture_
 	t->tile_bits = 0;
 	t->image_override = GL_TRUE;
 	t->override_offset = 0;
-	t->pp_txpitch &= (1 << 13) -1;
-	pitch_val = rb->pitch;
 	switch (rb->cpp) {
 	case 4:
 		if (glx_texture_format == GLX_TEXTURE_FORMAT_RGB_EXT)
@@ -734,12 +732,17 @@ void radeonSetTexBuffer2(__DRIcontext *pDRICtx, GLint target, GLint glx_texture_
 		t->pp_txfilter |= tx_table[MESA_FORMAT_RGB565].filter;
 		break;
 	}
-        t->pp_txsize = ((rb->base.Width - 1) << RADEON_TEX_USIZE_SHIFT)
-		   | ((rb->base.Height - 1) << RADEON_TEX_VSIZE_SHIFT);
-        t->pp_txformat |= RADEON_TXFORMAT_NON_POWER2;
-	t->pp_txpitch = pitch_val;
-        t->pp_txpitch -= 32;
 
+	t->pp_txpitch &= (1 << 13) -1;
+	pitch_val = rb->pitch;
+
+        t->pp_txsize = ((rb->base.Width - 1) << RADEON_TEX_USIZE_SHIFT)
+		| ((rb->base.Height - 1) << RADEON_TEX_VSIZE_SHIFT);
+	if (target == GL_TEXTURE_RECTANGLE_NV) {
+		t->pp_txformat |= RADEON_TXFORMAT_NON_POWER2;
+		t->pp_txpitch = pitch_val;
+		t->pp_txpitch -= 32;
+	}
 	t->validated = GL_TRUE;
 	_mesa_unlock_texture(radeon->glCtx, texObj);
 	return;
-- 
cgit v1.2.3