From 3abc7b985ce0787c5103d1a86bd0ba07b127a82f Mon Sep 17 00:00:00 2001 From: José Fonseca Date: Sat, 13 Mar 2010 16:04:06 +0000 Subject: llvmpipe: Don't use texture transfer internally. Now that transfers are context objects their sideeffects must happen in order when used by the state tracker, but that synchronization must be bypassed when used inside the driver, or it would cause infinite recursion. --- src/gallium/drivers/llvmpipe/lp_rast.c | 14 +-- src/gallium/drivers/llvmpipe/lp_scene.c | 70 +++++-------- src/gallium/drivers/llvmpipe/lp_scene.h | 2 - src/gallium/drivers/llvmpipe/lp_texture.c | 158 ++++++++++++++++++------------ src/gallium/drivers/llvmpipe/lp_texture.h | 22 +++++ 5 files changed, 150 insertions(+), 116 deletions(-) (limited to 'src') diff --git a/src/gallium/drivers/llvmpipe/lp_rast.c b/src/gallium/drivers/llvmpipe/lp_rast.c index dd9a8e8856..81ea11a16b 100644 --- a/src/gallium/drivers/llvmpipe/lp_rast.c +++ b/src/gallium/drivers/llvmpipe/lp_rast.c @@ -62,18 +62,20 @@ lp_rast_begin( struct lp_rasterizer *rast, rast->state.write_color = write_color; for (i = 0; i < rast->state.nr_cbufs; i++) { + struct pipe_surface *cbuf = scene->fb.cbufs[i]; rast->cbuf[i].map = scene->cbuf_map[i]; - rast->cbuf[i].format = scene->cbuf_transfer[i]->texture->format; - rast->cbuf[i].width = scene->cbuf_transfer[i]->width; - rast->cbuf[i].height = scene->cbuf_transfer[i]->height; - rast->cbuf[i].stride = scene->cbuf_transfer[i]->stride; + rast->cbuf[i].format = cbuf->texture->format; + rast->cbuf[i].width = cbuf->width; + rast->cbuf[i].height = cbuf->height; + rast->cbuf[i].stride = llvmpipe_texture_stride(cbuf->texture, cbuf->level); } if (write_zstencil) { + struct pipe_surface *zsbuf = scene->fb.zsbuf; rast->zsbuf.map = scene->zsbuf_map; - rast->zsbuf.stride = scene->zsbuf_transfer->stride; + rast->zsbuf.stride = llvmpipe_texture_stride(zsbuf->texture, zsbuf->level); rast->zsbuf.blocksize = - util_format_get_blocksize(scene->zsbuf_transfer->texture->format); + util_format_get_blocksize(zsbuf->texture->format); } lp_scene_bin_iter_begin( scene ); diff --git a/src/gallium/drivers/llvmpipe/lp_scene.c b/src/gallium/drivers/llvmpipe/lp_scene.c index 505cb21503..681ce674d4 100644 --- a/src/gallium/drivers/llvmpipe/lp_scene.c +++ b/src/gallium/drivers/llvmpipe/lp_scene.c @@ -397,7 +397,6 @@ end: static boolean lp_scene_map_buffers( struct lp_scene *scene ) { - struct pipe_context *pipe = scene->pipe; struct pipe_surface *cbuf, *zsbuf; int i; @@ -409,20 +408,10 @@ lp_scene_map_buffers( struct lp_scene *scene ) for (i = 0; i < scene->fb.nr_cbufs; i++) { cbuf = scene->fb.cbufs[i]; if (cbuf) { - scene->cbuf_transfer[i] = pipe->get_tex_transfer(pipe, - cbuf->texture, - cbuf->face, - cbuf->level, - cbuf->zslice, - PIPE_TRANSFER_READ_WRITE, - 0, 0, - cbuf->width, - cbuf->height); - if (!scene->cbuf_transfer[i]) - goto fail; - - scene->cbuf_map[i] = pipe->transfer_map(pipe, - scene->cbuf_transfer[i]); + scene->cbuf_map[i] = llvmpipe_texture_map(cbuf->texture, + cbuf->face, + cbuf->level, + cbuf->zslice); if (!scene->cbuf_map[i]) goto fail; } @@ -432,20 +421,10 @@ lp_scene_map_buffers( struct lp_scene *scene ) */ zsbuf = scene->fb.zsbuf; if (zsbuf) { - scene->zsbuf_transfer = pipe->get_tex_transfer(pipe, - zsbuf->texture, - zsbuf->face, - zsbuf->level, - zsbuf->zslice, - PIPE_TRANSFER_READ_WRITE, - 0, 0, - zsbuf->width, - zsbuf->height); - if (!scene->zsbuf_transfer) - goto fail; - - scene->zsbuf_map = pipe->transfer_map(pipe, - scene->zsbuf_transfer); + scene->zsbuf_map = llvmpipe_texture_map(zsbuf->texture, + zsbuf->face, + zsbuf->level, + zsbuf->zslice); if (!scene->zsbuf_map) goto fail; } @@ -469,28 +448,27 @@ fail: static void lp_scene_unmap_buffers( struct lp_scene *scene ) { - struct pipe_context *pipe = scene->pipe; unsigned i; for (i = 0; i < scene->fb.nr_cbufs; i++) { - if (scene->cbuf_map[i]) - pipe->transfer_unmap(pipe, scene->cbuf_transfer[i]); - - if (scene->cbuf_transfer[i]) - pipe->tex_transfer_destroy(pipe, scene->cbuf_transfer[i]); - - scene->cbuf_transfer[i] = NULL; - scene->cbuf_map[i] = NULL; + if (scene->cbuf_map[i]) { + struct pipe_surface *cbuf = scene->fb.cbufs[i]; + llvmpipe_texture_unmap(cbuf->texture, + cbuf->face, + cbuf->level, + cbuf->zslice); + scene->cbuf_map[i] = NULL; + } } - if (scene->zsbuf_map) - pipe->transfer_unmap(pipe, scene->zsbuf_transfer); - - if (scene->zsbuf_transfer) - pipe->tex_transfer_destroy(pipe, scene->zsbuf_transfer); - - scene->zsbuf_transfer = NULL; - scene->zsbuf_map = NULL; + if (scene->zsbuf_map) { + struct pipe_surface *zsbuf = scene->fb.zsbuf; + llvmpipe_texture_unmap(zsbuf->texture, + zsbuf->face, + zsbuf->level, + zsbuf->zslice); + scene->zsbuf_map = NULL; + } util_unreference_framebuffer_state( &scene->fb ); } diff --git a/src/gallium/drivers/llvmpipe/lp_scene.h b/src/gallium/drivers/llvmpipe/lp_scene.h index 739ac22908..b602b1e8a0 100644 --- a/src/gallium/drivers/llvmpipe/lp_scene.h +++ b/src/gallium/drivers/llvmpipe/lp_scene.h @@ -114,8 +114,6 @@ struct texture_ref { */ struct lp_scene { struct pipe_context *pipe; - struct pipe_transfer *cbuf_transfer[PIPE_MAX_COLOR_BUFS]; - struct pipe_transfer *zsbuf_transfer; /* Scene's buffers are mapped at the time the scene is enqueued: */ diff --git a/src/gallium/drivers/llvmpipe/lp_texture.c b/src/gallium/drivers/llvmpipe/lp_texture.c index f2c6dbd088..f3f0cd7b47 100644 --- a/src/gallium/drivers/llvmpipe/lp_texture.c +++ b/src/gallium/drivers/llvmpipe/lp_texture.c @@ -40,6 +40,7 @@ #include "lp_context.h" #include "lp_screen.h" +#include "lp_flush.h" #include "lp_texture.h" #include "lp_tile_size.h" #include "state_tracker/sw_winsys.h" @@ -163,6 +164,92 @@ llvmpipe_texture_destroy(struct pipe_texture *pt) } +/** + * Map a texture. Without any synchronization. + */ +void * +llvmpipe_texture_map(struct pipe_texture *texture, + unsigned face, + unsigned level, + unsigned zslice) +{ + struct llvmpipe_texture *lpt = llvmpipe_texture(texture); + uint8_t *map; + + if (lpt->dt) { + /* display target */ + struct llvmpipe_screen *screen = llvmpipe_screen(texture->screen); + struct sw_winsys *winsys = screen->winsys; + const unsigned usage = PIPE_BUFFER_USAGE_CPU_READ_WRITE; + + assert(face == 0); + assert(level == 0); + assert(zslice == 0); + + /* FIXME: keep map count? */ + map = winsys->displaytarget_map(winsys, lpt->dt, usage); + } + else { + /* regular texture */ + unsigned offset; + unsigned stride; + + map = lpt->data; + + assert(level < LP_MAX_TEXTURE_2D_LEVELS); + + offset = lpt->level_offset[level]; + stride = lpt->stride[level]; + + /* XXX shouldn't that rather be + tex_height = align(u_minify(texture->height0, level), 2) + to account for alignment done in llvmpipe_texture_layout ? + */ + if (texture->target == PIPE_TEXTURE_CUBE) { + unsigned tex_height = u_minify(texture->height0, level); + offset += face * util_format_get_nblocksy(texture->format, tex_height) * stride; + } + else if (texture->target == PIPE_TEXTURE_3D) { + unsigned tex_height = u_minify(texture->height0, level); + offset += zslice * util_format_get_nblocksy(texture->format, tex_height) * stride; + } + else { + assert(face == 0); + assert(zslice == 0); + } + + map += offset; + } + + return map; +} + + +/** + * Unmap a texture. Without any synchronization. + */ +void +llvmpipe_texture_unmap(struct pipe_texture *texture, + unsigned face, + unsigned level, + unsigned zslice) +{ + struct llvmpipe_texture *lpt = llvmpipe_texture(texture); + + if (lpt->dt) { + /* display target */ + struct llvmpipe_screen *lp_screen = llvmpipe_screen(texture->screen); + struct sw_winsys *winsys = lp_screen->winsys; + + assert(face == 0); + assert(level == 0); + assert(zslice == 0); + + winsys->displaytarget_unmap(winsys, lpt->dt); + } +} + + static struct pipe_surface * llvmpipe_get_tex_surface(struct pipe_screen *screen, struct pipe_texture *pt, @@ -181,7 +268,6 @@ llvmpipe_get_tex_surface(struct pipe_screen *screen, ps->format = pt->format; ps->width = u_minify(pt->width0, level); ps->height = u_minify(pt->height0, level); - ps->offset = lpt->level_offset[level]; ps->usage = usage; /* Because we are llvmpipe, anything that the state tracker @@ -207,23 +293,6 @@ llvmpipe_get_tex_surface(struct pipe_screen *screen, ps->face = face; ps->level = level; ps->zslice = zslice; - - /* XXX shouldn't that rather be - tex_height = align(ps->height, 2); - to account for alignment done in llvmpipe_texture_layout ? - */ - if (pt->target == PIPE_TEXTURE_CUBE) { - unsigned tex_height = ps->height; - ps->offset += face * util_format_get_nblocksy(pt->format, tex_height) * lpt->stride[level]; - } - else if (pt->target == PIPE_TEXTURE_3D) { - unsigned tex_height = ps->height; - ps->offset += zslice * util_format_get_nblocksy(pt->format, tex_height) * lpt->stride[level]; - } - else { - assert(face == 0); - assert(zslice == 0); - } } return ps; } @@ -269,24 +338,6 @@ llvmpipe_get_tex_transfer(struct pipe_context *pipe, pt->level = level; pt->zslice = zslice; - lpt->offset = lptex->level_offset[level]; - - /* XXX shouldn't that rather be - tex_height = align(u_minify(texture->height0, level), 2) - to account for alignment done in llvmpipe_texture_layout ? - */ - if (texture->target == PIPE_TEXTURE_CUBE) { - unsigned tex_height = u_minify(texture->height0, level); - lpt->offset += face * util_format_get_nblocksy(texture->format, tex_height) * pt->stride; - } - else if (texture->target == PIPE_TEXTURE_3D) { - unsigned tex_height = u_minify(texture->height0, level); - lpt->offset += zslice * util_format_get_nblocksy(texture->format, tex_height) * pt->stride; - } - else { - assert(face == 0); - assert(zslice == 0); - } return pt; } return NULL; @@ -312,7 +363,7 @@ llvmpipe_transfer_map( struct pipe_context *pipe, struct pipe_transfer *transfer ) { struct llvmpipe_screen *screen = llvmpipe_screen(pipe->screen); - ubyte *map, *xfer_map; + ubyte *map; struct llvmpipe_texture *lpt; enum pipe_format format; @@ -320,34 +371,24 @@ llvmpipe_transfer_map( struct pipe_context *pipe, lpt = llvmpipe_texture(transfer->texture); format = lpt->base.format; - if (lpt->dt) { - /* display target */ - struct sw_winsys *winsys = screen->winsys; - map = winsys->displaytarget_map(winsys, lpt->dt, - pipe_transfer_buffer_flags(transfer)); - if (map == NULL) - return NULL; - } - else { - /* regular texture */ - map = lpt->data; - } + map = llvmpipe_texture_map(transfer->texture, + transfer->face, transfer->level, transfer->zslice); /* May want to different things here depending on read/write nature * of the map: */ - if (transfer->texture && (transfer->usage & PIPE_TRANSFER_WRITE)) { + if (transfer->usage & PIPE_TRANSFER_WRITE) { /* Do something to notify sharing contexts of a texture change. */ screen->timestamp++; } - xfer_map = map + llvmpipe_transfer(transfer)->offset + + map += transfer->y / util_format_get_blockheight(format) * transfer->stride + transfer->x / util_format_get_blockwidth(format) * util_format_get_blocksize(format); - /*printf("map = %p xfer map = %p\n", map, xfer_map);*/ - return xfer_map; + + return map; } @@ -355,17 +396,10 @@ static void llvmpipe_transfer_unmap(struct pipe_context *pipe, struct pipe_transfer *transfer) { - struct llvmpipe_screen *lp_screen = llvmpipe_screen(pipe->screen); - struct llvmpipe_texture *lpt; - assert(transfer->texture); - lpt = llvmpipe_texture(transfer->texture); - if (lpt->dt) { - /* display target */ - struct sw_winsys *winsys = lp_screen->winsys; - winsys->displaytarget_unmap(winsys, lpt->dt); - } + llvmpipe_texture_unmap(transfer->texture, + transfer->face, transfer->level, transfer->zslice); } diff --git a/src/gallium/drivers/llvmpipe/lp_texture.h b/src/gallium/drivers/llvmpipe/lp_texture.h index 94b667abf3..2350c26e4f 100644 --- a/src/gallium/drivers/llvmpipe/lp_texture.h +++ b/src/gallium/drivers/llvmpipe/lp_texture.h @@ -95,6 +95,28 @@ llvmpipe_transfer(struct pipe_transfer *pt) } +static INLINE unsigned +llvmpipe_texture_stride(struct pipe_texture *texture, + unsigned level) +{ + struct llvmpipe_texture *lpt = llvmpipe_texture(texture); + assert(level < LP_MAX_TEXTURE_2D_LEVELS); + return lpt->stride[level]; +} + + +void * +llvmpipe_texture_map(struct pipe_texture *texture, + unsigned face, + unsigned level, + unsigned zslice); + +void +llvmpipe_texture_unmap(struct pipe_texture *texture, + unsigned face, + unsigned level, + unsigned zslice); + extern void llvmpipe_init_screen_texture_funcs(struct pipe_screen *screen); -- cgit v1.2.3 From bf40c346637325862d6d9cdbc9838c5726abc0c0 Mon Sep 17 00:00:00 2001 From: José Fonseca Date: Sat, 13 Mar 2010 16:13:26 +0000 Subject: llvmpipe: Ensure the context is flushed before modifying textures. --- src/gallium/drivers/llvmpipe/lp_flush.c | 65 +++++++++++++++++++++++++++++++ src/gallium/drivers/llvmpipe/lp_flush.h | 12 ++++++ src/gallium/drivers/llvmpipe/lp_surface.c | 15 +++++++ src/gallium/drivers/llvmpipe/lp_texture.c | 10 +++++ 4 files changed, 102 insertions(+) (limited to 'src') diff --git a/src/gallium/drivers/llvmpipe/lp_flush.c b/src/gallium/drivers/llvmpipe/lp_flush.c index 1b4e889935..636d72a9bb 100644 --- a/src/gallium/drivers/llvmpipe/lp_flush.c +++ b/src/gallium/drivers/llvmpipe/lp_flush.c @@ -92,3 +92,68 @@ llvmpipe_flush( struct pipe_context *pipe, #endif } + +/** + * Flush context if necessary. + * + * TODO: move this logic to an auxiliary library? + * + * FIXME: We must implement DISCARD/DONTBLOCK/UNSYNCHRONIZED/etc for + * textures to avoid blocking. + */ +boolean +llvmpipe_flush_texture(struct pipe_context *pipe, + struct pipe_texture *texture, + unsigned face, + unsigned level, + unsigned flush_flags, + boolean read_only, + boolean cpu_access, + boolean do_not_flush) +{ + struct pipe_fence_handle *last_fence = NULL; + unsigned referenced; + + referenced = pipe->is_texture_referenced(pipe, texture, face, level); + + if ((referenced & PIPE_REFERENCED_FOR_WRITE) || + ((referenced & PIPE_REFERENCED_FOR_READ) && !read_only)) { + + if (do_not_flush) + return FALSE; + + /* + * TODO: The semantics of these flush flags are too obtuse. They should + * disappear and the pipe driver should just ensure that all visible + * side-effects happen when they need to happen. + */ + if (referenced & PIPE_REFERENCED_FOR_WRITE) + flush_flags |= PIPE_FLUSH_RENDER_CACHE; + + if (referenced & PIPE_REFERENCED_FOR_READ) + flush_flags |= PIPE_FLUSH_TEXTURE_CACHE; + + if (cpu_access) { + /* + * Flush and wait. + */ + + struct pipe_fence_handle *fence = NULL; + + pipe->flush(pipe, flush_flags, &fence); + + if (last_fence) { + pipe->screen->fence_finish(pipe->screen, fence, 0); + pipe->screen->fence_reference(pipe->screen, &fence, NULL); + } + } else { + /* + * Just flush. + */ + + pipe->flush(pipe, flush_flags, NULL); + } + } + + return TRUE; +} diff --git a/src/gallium/drivers/llvmpipe/lp_flush.h b/src/gallium/drivers/llvmpipe/lp_flush.h index 10b2b52583..e13f57ccec 100644 --- a/src/gallium/drivers/llvmpipe/lp_flush.h +++ b/src/gallium/drivers/llvmpipe/lp_flush.h @@ -28,10 +28,22 @@ #ifndef LP_FLUSH_H #define LP_FLUSH_H +#include "pipe/p_compiler.h" + struct pipe_context; struct pipe_fence_handle; void llvmpipe_flush(struct pipe_context *pipe, unsigned flags, struct pipe_fence_handle **fence); +boolean +llvmpipe_flush_texture(struct pipe_context *pipe, + struct pipe_texture *texture, + unsigned face, + unsigned level, + unsigned flush_flags, + boolean read_only, + boolean cpu_access, + boolean do_not_flush); + #endif diff --git a/src/gallium/drivers/llvmpipe/lp_surface.c b/src/gallium/drivers/llvmpipe/lp_surface.c index 6110b0a193..ca3d62c361 100644 --- a/src/gallium/drivers/llvmpipe/lp_surface.c +++ b/src/gallium/drivers/llvmpipe/lp_surface.c @@ -27,6 +27,7 @@ #include "util/u_rect.h" #include "lp_context.h" +#include "lp_flush.h" #include "lp_surface.h" @@ -36,6 +37,20 @@ lp_surface_copy(struct pipe_context *pipe, struct pipe_surface *src, unsigned srcx, unsigned srcy, unsigned width, unsigned height) { + llvmpipe_flush_texture(pipe, + dest->texture, dest->face, dest->level, + 0, /* flush_flags */ + FALSE, /* read_only */ + FALSE, /* cpu_access */ + FALSE); /* do_not_flush */ + + llvmpipe_flush_texture(pipe, + src->texture, src->face, src->level, + 0, /* flush_flags */ + TRUE, /* read_only */ + FALSE, /* cpu_access */ + FALSE); /* do_not_flush */ + util_surface_copy(pipe, FALSE, dest, destx, desty, src, srcx, srcy, diff --git a/src/gallium/drivers/llvmpipe/lp_texture.c b/src/gallium/drivers/llvmpipe/lp_texture.c index f3f0cd7b47..9a85a42897 100644 --- a/src/gallium/drivers/llvmpipe/lp_texture.c +++ b/src/gallium/drivers/llvmpipe/lp_texture.c @@ -371,6 +371,16 @@ llvmpipe_transfer_map( struct pipe_context *pipe, lpt = llvmpipe_texture(transfer->texture); format = lpt->base.format; + /* + * Transfers, like other pipe operations, must happen in order, so flush the + * context if necessary. + */ + llvmpipe_flush_texture(pipe, + transfer->texture, transfer->face, transfer->level, + 0, /* flush_flags */ + !(transfer->usage & PIPE_TRANSFER_WRITE), /* read_only */ + TRUE, /* cpu_access */ + FALSE); /* do_not_flush */ map = llvmpipe_texture_map(transfer->texture, transfer->face, transfer->level, transfer->zslice); -- cgit v1.2.3 From 1a8a230a61289392e8300901dfabd7911799cbc3 Mon Sep 17 00:00:00 2001 From: Maciej Cencora Date: Sat, 13 Mar 2010 16:46:19 +0100 Subject: radeon: fix glCopyTex(Sub)Image Fallback to swrast for software renderbuffers --- src/mesa/drivers/dri/radeon/radeon_tex_copy.c | 13 +++++++++++-- 1 file changed, 11 insertions(+), 2 deletions(-) (limited to 'src') diff --git a/src/mesa/drivers/dri/radeon/radeon_tex_copy.c b/src/mesa/drivers/dri/radeon/radeon_tex_copy.c index e57d77e7ef..fb6f2e56af 100644 --- a/src/mesa/drivers/dri/radeon/radeon_tex_copy.c +++ b/src/mesa/drivers/dri/radeon/radeon_tex_copy.c @@ -59,18 +59,27 @@ do_copy_texsubimage(GLcontext *ctx, } if (_mesa_get_format_bits(timg->base.TexFormat, GL_DEPTH_BITS) > 0) { - rrb = radeon_renderbuffer(ctx->ReadBuffer->_DepthBuffer); + if (ctx->ReadBuffer->_DepthBuffer && ctx->ReadBuffer->_DepthBuffer->Wrapped) { + rrb = radeon_renderbuffer(ctx->ReadBuffer->_DepthBuffer->Wrapped); + } else { + rrb = radeon_renderbuffer(ctx->ReadBuffer->_DepthBuffer); + } flip_y = ctx->ReadBuffer->Attachment[BUFFER_DEPTH].Type == GL_NONE; } else { rrb = radeon_renderbuffer(ctx->ReadBuffer->_ColorReadBuffer); flip_y = ctx->ReadBuffer->Attachment[BUFFER_COLOR0].Type == GL_NONE; } + // This is software renderbuffer, fallback to swrast + if (!rrb) { + return GL_FALSE; + } + if (!timg->mt) { radeon_validate_texture_miptree(ctx, &tobj->base); } - assert(rrb && rrb->bo); + assert(rrb->bo); assert(timg->mt); assert(timg->mt->bo); assert(timg->base.Width >= dstx + width); -- cgit v1.2.3 From aba40bd4345e36fb56817673369b275f0e9a9c43 Mon Sep 17 00:00:00 2001 From: Maciej Cencora Date: Sat, 13 Mar 2010 17:27:51 +0100 Subject: radeon: fix gl format to mesa format mapping and add GL_BGRA formats --- src/mesa/drivers/dri/radeon/radeon_pixel_read.c | 25 ++++++++++++++++++------- 1 file changed, 18 insertions(+), 7 deletions(-) (limited to 'src') diff --git a/src/mesa/drivers/dri/radeon/radeon_pixel_read.c b/src/mesa/drivers/dri/radeon/radeon_pixel_read.c index b180c1d9a5..dadb8002c7 100644 --- a/src/mesa/drivers/dri/radeon/radeon_pixel_read.c +++ b/src/mesa/drivers/dri/radeon/radeon_pixel_read.c @@ -50,22 +50,33 @@ static gl_format gl_format_and_type_to_mesa_format(GLenum format, GLenum type) break; case GL_RGBA: switch (type) { - case GL_UNSIGNED_BYTE: - return MESA_FORMAT_RGBA8888_REV; case GL_FLOAT: return MESA_FORMAT_RGBA_FLOAT32; + case GL_UNSIGNED_SHORT_5_5_5_1: + return MESA_FORMAT_RGBA5551; + case GL_UNSIGNED_INT_8_8_8_8: + return MESA_FORMAT_RGBA8888; + case GL_UNSIGNED_BYTE: + case GL_UNSIGNED_INT_8_8_8_8_REV: + return MESA_FORMAT_RGBA8888_REV; + } + break; + case GL_BGRA: + switch (type) { case GL_UNSIGNED_SHORT_4_4_4_4: - return MESA_FORMAT_ARGB4444; + return MESA_FORMAT_ARGB4444_REV; case GL_UNSIGNED_SHORT_4_4_4_4_REV: return MESA_FORMAT_ARGB4444; case GL_UNSIGNED_SHORT_5_5_5_1: - return MESA_FORMAT_RGBA5551; - case GL_UNSIGNED_SHORT_1_5_5_5_REV: return MESA_FORMAT_ARGB1555_REV; + case GL_UNSIGNED_SHORT_1_5_5_5_REV: + return MESA_FORMAT_ARGB1555; case GL_UNSIGNED_INT_8_8_8_8: - return MESA_FORMAT_ARGB8888; - case GL_UNSIGNED_INT_8_8_8_8_REV: return MESA_FORMAT_ARGB8888_REV; + case GL_UNSIGNED_BYTE: + case GL_UNSIGNED_INT_8_8_8_8_REV: + return MESA_FORMAT_ARGB8888; + } break; } -- cgit v1.2.3 From 18ecf41835059d4506402641833e7911d7de3ec4 Mon Sep 17 00:00:00 2001 From: Maciej Cencora Date: Sat, 13 Mar 2010 17:28:33 +0100 Subject: r300: blits for small dst pitch work just fine --- src/mesa/drivers/dri/r300/r300_blit.c | 6 ------ 1 file changed, 6 deletions(-) (limited to 'src') diff --git a/src/mesa/drivers/dri/r300/r300_blit.c b/src/mesa/drivers/dri/r300/r300_blit.c index d870c7f852..fa60628a5e 100644 --- a/src/mesa/drivers/dri/r300/r300_blit.c +++ b/src/mesa/drivers/dri/r300/r300_blit.c @@ -582,12 +582,6 @@ unsigned r300_blit(GLcontext *ctx, if (dst_pitch % 2 > 0) ++dst_pitch; - /* Rendering to small buffer doesn't work. - * Looks like a hw limitation. - */ - if (dst_pitch < 32) - return 0; - /* Need to clamp the region size to make sure * we don't read outside of the source buffer * or write outside of the destination buffer. -- cgit v1.2.3 From abc847c20da92e52f29da40c6dd014f5caf46d8b Mon Sep 17 00:00:00 2001 From: Maciej Cencora Date: Sat, 13 Mar 2010 17:33:48 +0100 Subject: radeon: add some debuging info for glCopyTex(Sub)Image --- src/mesa/drivers/dri/radeon/radeon_tex_copy.c | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) (limited to 'src') diff --git a/src/mesa/drivers/dri/radeon/radeon_tex_copy.c b/src/mesa/drivers/dri/radeon/radeon_tex_copy.c index fb6f2e56af..29fd31ac23 100644 --- a/src/mesa/drivers/dri/radeon/radeon_tex_copy.c +++ b/src/mesa/drivers/dri/radeon/radeon_tex_copy.c @@ -28,6 +28,7 @@ #include "radeon_common.h" #include "radeon_texture.h" +#include "main/enums.h" #include "main/image.h" #include "main/teximage.h" #include "main/texstate.h" @@ -183,6 +184,10 @@ radeonCopyTexImage2D(GLcontext *ctx, GLenum target, GLint level, return; fail: + radeon_print(RADEON_FALLBACKS, RADEON_NORMAL, + "Falling back to sw for glCopyTexImage2D (internalFormat %s, border %d)\n", + _mesa_lookup_enum_by_nr(internalFormat), border); + _mesa_meta_CopyTexImage2D(ctx, target, level, internalFormat, x, y, width, height, border); } @@ -201,7 +206,8 @@ radeonCopyTexSubImage2D(GLcontext *ctx, GLenum target, GLint level, radeon_tex_obj(texObj), (radeon_texture_image *)texImage, xoffset, yoffset, x, y, width, height)) { - //DEBUG_FALLBACKS + radeon_print(RADEON_FALLBACKS, RADEON_NORMAL, + "Falling back to sw for glCopyTexSubImage2D\n"); _mesa_meta_CopyTexSubImage2D(ctx, target, level, xoffset, yoffset, x, y, width, height); -- cgit v1.2.3 From e31bca139f720396d1a1639b46d37aee4fd9736e Mon Sep 17 00:00:00 2001 From: Marek Olšák Date: Sat, 13 Mar 2010 04:43:46 +0100 Subject: r300g: fix up function names --- src/gallium/drivers/r300/r300_emit.c | 2 +- src/gallium/drivers/r300/r300_emit.h | 3 +-- 2 files changed, 2 insertions(+), 3 deletions(-) (limited to 'src') diff --git a/src/gallium/drivers/r300/r300_emit.c b/src/gallium/drivers/r300/r300_emit.c index 55e9217fd3..f8242625fe 100644 --- a/src/gallium/drivers/r300/r300_emit.c +++ b/src/gallium/drivers/r300/r300_emit.c @@ -448,7 +448,7 @@ void r300_emit_fb_state(struct r300_context* r300, unsigned size, void* state) END_CS; } -static void r300_emit_query_start(struct r300_context *r300) +void r300_emit_query_start(struct r300_context *r300) { struct r300_capabilities *caps = r300_screen(r300->context.screen)->caps; struct r300_query *query = r300->query_current; diff --git a/src/gallium/drivers/r300/r300_emit.h b/src/gallium/drivers/r300/r300_emit.h index 449e640a88..7db2fc6a1a 100644 --- a/src/gallium/drivers/r300/r300_emit.h +++ b/src/gallium/drivers/r300/r300_emit.h @@ -57,8 +57,7 @@ void r500_emit_fs_constant_buffer(struct r300_context* r300, void r300_emit_fb_state(struct r300_context* r300, unsigned size, void* state); -void r300_emit_query_begin(struct r300_context* r300, - struct r300_query* query); +void r300_emit_query_start(struct r300_context* r300); void r300_emit_query_end(struct r300_context* r300); -- cgit v1.2.3 From bcec6d851ce6ec2d948f03e5a1adfb5871e4e627 Mon Sep 17 00:00:00 2001 From: Marek Olšák Date: Sat, 13 Mar 2010 06:07:33 +0100 Subject: r300g: refrain from using immediate mode if it causes slowdown E.g. when mapping buffers could flush CS or cause waiting for a busy buffer. The side effect of this is it also fixes progs/demos/arbocclude however a separate fix should be proposed to address this issue in other cases it might occur. --- src/gallium/drivers/r300/r300_render.c | 33 ++++++++++++++++++++-- src/gallium/winsys/drm/radeon/core/radeon_buffer.c | 14 +++++++++ src/gallium/winsys/drm/radeon/core/radeon_winsys.h | 3 ++ 3 files changed, 48 insertions(+), 2 deletions(-) (limited to 'src') diff --git a/src/gallium/drivers/r300/r300_render.c b/src/gallium/drivers/r300/r300_render.c index ccf39876a5..971e7f3521 100644 --- a/src/gallium/drivers/r300/r300_render.c +++ b/src/gallium/drivers/r300/r300_render.c @@ -131,9 +131,38 @@ static boolean r300_reserve_cs_space(struct r300_context *r300, } static boolean immd_is_good_idea(struct r300_context *r300, - unsigned count) + unsigned count) { - return count <= 4; + struct pipe_vertex_element* velem; + struct pipe_vertex_buffer* vbuf; + boolean checked[PIPE_MAX_ATTRIBS] = {0}; + unsigned vertex_element_count = r300->velems->count; + unsigned i, vbi; + + if (count > 4) { + return FALSE; + } + + /* We shouldn't map buffers referenced by CS, busy buffers, + * and ones placed in VRAM. */ + /* XXX Check for VRAM buffers. */ + for (i = 0; i < vertex_element_count; i++) { + velem = &r300->velems->velem[i]; + vbi = velem->vertex_buffer_index; + + if (!checked[vbi]) { + vbuf = &r300->vertex_buffer[vbi]; + + if (r300->winsys->is_buffer_referenced(r300->winsys, + vbuf->buffer)) { + /* It's a very bad idea to map it... */ + return FALSE; + } + checked[vbi] = TRUE; + } + } + + return TRUE; } static void r300_emit_draw_arrays_immediate(struct r300_context *r300, diff --git a/src/gallium/winsys/drm/radeon/core/radeon_buffer.c b/src/gallium/winsys/drm/radeon/core/radeon_buffer.c index daa032af6f..25b58b2926 100644 --- a/src/gallium/winsys/drm/radeon/core/radeon_buffer.c +++ b/src/gallium/winsys/drm/radeon/core/radeon_buffer.c @@ -213,6 +213,18 @@ static void radeon_buffer_unmap(struct pipe_winsys *ws, } } +static boolean radeon_is_buffer_referenced(struct radeon_winsys *ws, + struct pipe_buffer *buffer) +{ + struct radeon_pipe_buffer *radeon_buffer = + (struct radeon_pipe_buffer*)buffer; + uint32_t domain; + + /* Referenced by CS or HW. */ + return radeon_bo_is_referenced_by_cs(radeon_buffer->bo, ws->priv->cs) || + radeon_bo_is_busy(radeon_buffer->bo, &domain); +} + static void radeon_buffer_set_tiling(struct radeon_winsys *ws, struct pipe_buffer *buffer, uint32_t pitch, @@ -370,5 +382,7 @@ struct radeon_winsys* radeon_pipe_winsys(int fd) radeon_ws->buffer_from_handle = radeon_buffer_from_handle; radeon_ws->buffer_get_handle = radeon_buffer_get_handle; + radeon_ws->is_buffer_referenced = radeon_is_buffer_referenced; + return radeon_ws; } diff --git a/src/gallium/winsys/drm/radeon/core/radeon_winsys.h b/src/gallium/winsys/drm/radeon/core/radeon_winsys.h index 37eeb45979..887a381cc4 100644 --- a/src/gallium/winsys/drm/radeon/core/radeon_winsys.h +++ b/src/gallium/winsys/drm/radeon/core/radeon_winsys.h @@ -118,6 +118,9 @@ struct radeon_winsys { uint32_t pitch, boolean microtiled, boolean macrotiled); + + boolean (*is_buffer_referenced)(struct radeon_winsys *winsys, + struct pipe_buffer *buffer); }; #endif -- cgit v1.2.3 From d5749fb6fc9b7bb3c8a8b1632eee6db28678b3ba Mon Sep 17 00:00:00 2001 From: Marek Olšák Date: Sat, 13 Mar 2010 16:24:50 +0100 Subject: r300g: fix anisotropic filtering, fix macrotiling Two bug fixes at the same time. :) --- src/gallium/drivers/r300/r300_state.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'src') diff --git a/src/gallium/drivers/r300/r300_state.c b/src/gallium/drivers/r300/r300_state.c index ced6c810ec..bcd75a4225 100644 --- a/src/gallium/drivers/r300/r300_state.c +++ b/src/gallium/drivers/r300/r300_state.c @@ -864,6 +864,8 @@ static void* state->min_mip_filter, state->max_anisotropy > 0); + sampler->filter0 |= r300_anisotropy(state->max_anisotropy); + /* Unfortunately, r300-r500 don't support floating-point mipmap lods. */ /* We must pass these to the merge function to clamp them properly. */ sampler->min_lod = MAX2((unsigned)state->min_lod, 0); @@ -873,8 +875,6 @@ static void* sampler->filter1 |= lod_bias << R300_LOD_BIAS_SHIFT; - sampler->filter1 |= r300_anisotropy(state->max_anisotropy); - util_pack_color(state->border_color, PIPE_FORMAT_B8G8R8A8_UNORM, &uc); sampler->border_color = uc.ui; -- cgit v1.2.3 From 3996e493693d5aa048fed1c2fd6db4027cb47df4 Mon Sep 17 00:00:00 2001 From: Marek Olšák Date: Sat, 13 Mar 2010 17:38:43 +0100 Subject: r300g: add high quality anisotropic filtering for R5xx (disabled by default) Oh look, an undocumented feature. It's a nice tool for benchmarking texturing. --- src/gallium/drivers/r300/r300_debug.c | 1 + src/gallium/drivers/r300/r300_reg.h | 4 ++++ src/gallium/drivers/r300/r300_screen.h | 1 + src/gallium/drivers/r300/r300_state.c | 9 +++++++++ src/gallium/drivers/r300/r300_state_inlines.h | 12 ++++++++++++ 5 files changed, 27 insertions(+) (limited to 'src') diff --git a/src/gallium/drivers/r300/r300_debug.c b/src/gallium/drivers/r300/r300_debug.c index b881730848..d6177577c8 100644 --- a/src/gallium/drivers/r300/r300_debug.c +++ b/src/gallium/drivers/r300/r300_debug.c @@ -37,6 +37,7 @@ static struct debug_option debug_options[] = { { "draw", DBG_DRAW, "Draw and emit" }, { "tex", DBG_TEX, "Textures" }, { "fall", DBG_FALL, "Fallbacks" }, + { "anisohq", DBG_ANISOHQ, "High quality anisotropic filtering (for benchmarking purposes only!)" }, { "all", ~0, "Convenience option that enables all debug flags" }, diff --git a/src/gallium/drivers/r300/r300_reg.h b/src/gallium/drivers/r300/r300_reg.h index c67cc86871..1c2b252887 100644 --- a/src/gallium/drivers/r300/r300_reg.h +++ b/src/gallium/drivers/r300/r300_reg.h @@ -1500,6 +1500,10 @@ USE OR OTHER DEALINGS IN THE SOFTWARE. # define R300_ANISO_THRESHOLD_MASK (7<<17) # define R500_MACRO_SWITCH (1<<22) +# define R500_TX_MAX_ANISO(x) ((x) << 23) +# define R500_TX_MAX_ANISO_MASK (63 << 23) +# define R500_TX_ANISO_HIGH_QUALITY (1 << 30) + # define R500_BORDER_FIX (1<<31) #define R300_TX_FORMAT0_0 0x4480 diff --git a/src/gallium/drivers/r300/r300_screen.h b/src/gallium/drivers/r300/r300_screen.h index 484bde6a6b..71310b2692 100644 --- a/src/gallium/drivers/r300/r300_screen.h +++ b/src/gallium/drivers/r300/r300_screen.h @@ -77,6 +77,7 @@ struct pipe_screen* r300_create_screen(struct radeon_winsys* radeon_winsys); #define DBG_DRAW 0x0000010 #define DBG_TEX 0x0000020 #define DBG_FALL 0x0000040 +#define DBG_ANISOHQ 0x0000080 /*@}*/ static INLINE boolean SCREEN_DBG_ON(struct r300_screen * screen, unsigned flags) diff --git a/src/gallium/drivers/r300/r300_state.c b/src/gallium/drivers/r300/r300_state.c index bcd75a4225..3098145dfb 100644 --- a/src/gallium/drivers/r300/r300_state.c +++ b/src/gallium/drivers/r300/r300_state.c @@ -849,6 +849,7 @@ static void* { struct r300_context* r300 = r300_context(pipe); struct r300_sampler_state* sampler = CALLOC_STRUCT(r300_sampler_state); + boolean is_r500 = r300_screen(pipe->screen)->caps->is_r500; int lod_bias; union util_color uc; @@ -875,6 +876,14 @@ static void* sampler->filter1 |= lod_bias << R300_LOD_BIAS_SHIFT; + /* This is very high quality anisotropic filtering for R5xx. + * It's good for benchmarking the performance of texturing but + * in practice we don't want to slow down the driver because it's + * a pretty good performance killer. Feel free to play with it. */ + if (DBG_ON(r300, DBG_ANISOHQ) && is_r500) { + sampler->filter1 |= r500_anisotropy(state->max_anisotropy); + } + util_pack_color(state->border_color, PIPE_FORMAT_B8G8R8A8_UNORM, &uc); sampler->border_color = uc.ui; diff --git a/src/gallium/drivers/r300/r300_state_inlines.h b/src/gallium/drivers/r300/r300_state_inlines.h index a32924ed0a..8485d4f8f9 100644 --- a/src/gallium/drivers/r300/r300_state_inlines.h +++ b/src/gallium/drivers/r300/r300_state_inlines.h @@ -327,6 +327,18 @@ static INLINE uint32_t r300_anisotropy(unsigned max_aniso) } } +static INLINE uint32_t r500_anisotropy(unsigned max_aniso) +{ + if (!max_aniso) { + return 0; + } + max_aniso -= 1; + + // Map the range [0, 15] to [0, 63]. + return R500_TX_MAX_ANISO(MIN2((unsigned)(max_aniso*4.2001), 63)) | + R500_TX_ANISO_HIGH_QUALITY;; +} + /* Non-CSO state. (For now.) */ static INLINE uint32_t r300_translate_gb_pipes(int pipe_count) -- cgit v1.2.3 From 392d37609d85f42bf5fbcecbc285857e8ed265e5 Mon Sep 17 00:00:00 2001 From: José Fonseca Date: Sat, 13 Mar 2010 19:11:08 +0000 Subject: llvmpipe: Switch to PIPE_TEX_MIPFILTER_NONE when texture has no mipmaps. --- src/gallium/auxiliary/gallivm/lp_bld_sample.c | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) (limited to 'src') diff --git a/src/gallium/auxiliary/gallivm/lp_bld_sample.c b/src/gallium/auxiliary/gallivm/lp_bld_sample.c index 543fd5fea3..2f74aa5e00 100644 --- a/src/gallium/auxiliary/gallivm/lp_bld_sample.c +++ b/src/gallium/auxiliary/gallivm/lp_bld_sample.c @@ -84,8 +84,12 @@ lp_sampler_static_state(struct lp_sampler_static_state *state, state->wrap_t = sampler->wrap_t; state->wrap_r = sampler->wrap_r; state->min_img_filter = sampler->min_img_filter; - state->min_mip_filter = sampler->min_mip_filter; state->mag_img_filter = sampler->mag_img_filter; + if (texture->last_level) { + state->min_mip_filter = sampler->min_mip_filter; + } else { + state->min_mip_filter = PIPE_TEX_MIPFILTER_NONE; + } state->compare_mode = sampler->compare_mode; if (sampler->compare_mode != PIPE_TEX_COMPARE_NONE) { -- cgit v1.2.3 From de4ee20578a79e024b0de83c40648112f42c994e Mon Sep 17 00:00:00 2001 From: Dan Nicholson Date: Sat, 13 Mar 2010 11:56:59 -0800 Subject: gallium: Respect user's CFLAGS for including X headers This can break on systems that don't have a system X installation. Signed-off-by: Dan Nicholson --- src/gallium/state_trackers/glx/xlib/Makefile | 3 ++- src/gallium/winsys/xlib/Makefile | 3 ++- 2 files changed, 4 insertions(+), 2 deletions(-) (limited to 'src') diff --git a/src/gallium/state_trackers/glx/xlib/Makefile b/src/gallium/state_trackers/glx/xlib/Makefile index 7b2adc62c3..8c7cc524df 100644 --- a/src/gallium/state_trackers/glx/xlib/Makefile +++ b/src/gallium/state_trackers/glx/xlib/Makefile @@ -5,7 +5,8 @@ LIBNAME = xlib LIBRARY_INCLUDES = \ -I$(TOP)/include \ - -I$(TOP)/src/mesa + -I$(TOP)/src/mesa \ + $(X_CFLAGS) C_SOURCES = \ glx_api.c \ diff --git a/src/gallium/winsys/xlib/Makefile b/src/gallium/winsys/xlib/Makefile index 68542b488d..18357a4112 100644 --- a/src/gallium/winsys/xlib/Makefile +++ b/src/gallium/winsys/xlib/Makefile @@ -6,7 +6,8 @@ LIBNAME = ws_xlib LIBRARY_INCLUDES = \ -I$(TOP)/src/gallium/include \ -I$(TOP)/src/gallium/drivers \ - -I$(TOP)/src/gallium/auxiliary + -I$(TOP)/src/gallium/auxiliary \ + $(X_CFLAGS) C_SOURCES = \ xlib_sw_winsys.c -- cgit v1.2.3 From 2615bba182bf6ec4b406d31e714be78b9161ce8b Mon Sep 17 00:00:00 2001 From: Vinson Lee Date: Sat, 13 Mar 2010 18:05:39 -0800 Subject: softpipe: Remove unnecessary header. --- src/gallium/drivers/softpipe/sp_texture.c | 1 - 1 file changed, 1 deletion(-) (limited to 'src') diff --git a/src/gallium/drivers/softpipe/sp_texture.c b/src/gallium/drivers/softpipe/sp_texture.c index da8529c154..2aff6118f4 100644 --- a/src/gallium/drivers/softpipe/sp_texture.c +++ b/src/gallium/drivers/softpipe/sp_texture.c @@ -36,7 +36,6 @@ #include "util/u_format.h" #include "util/u_math.h" #include "util/u_memory.h" -#include "util/u_simple_screen.h" #include "sp_context.h" #include "sp_texture.h" -- cgit v1.2.3 From 6e4b05637fa08020a9142b2391166d2c62b54896 Mon Sep 17 00:00:00 2001 From: Marek Olšák Date: Sun, 14 Mar 2010 14:32:50 +0100 Subject: r300g: remove pipe_context from r300_screen --- src/gallium/drivers/r300/r300_context.c | 4 ---- src/gallium/drivers/r300/r300_screen.h | 4 ---- 2 files changed, 8 deletions(-) (limited to 'src') diff --git a/src/gallium/drivers/r300/r300_context.c b/src/gallium/drivers/r300/r300_context.c index 8606c0004e..ed24fb54ab 100644 --- a/src/gallium/drivers/r300/r300_context.c +++ b/src/gallium/drivers/r300/r300_context.c @@ -162,8 +162,6 @@ struct pipe_context* r300_create_context(struct pipe_screen* screen, if (!r300) return NULL; - r300screen->ctx = (struct pipe_context*)r300; - r300->winsys = radeon_winsys; r300->context.winsys = (struct pipe_winsys*)radeon_winsys; @@ -212,8 +210,6 @@ struct pipe_context* r300_create_context(struct pipe_screen* screen, r300_init_transfer_functions(r300); - /* r300_init_surface_functions(r300); */ - r300_init_state_functions(r300); r300->invariant_state.dirty = TRUE; diff --git a/src/gallium/drivers/r300/r300_screen.h b/src/gallium/drivers/r300/r300_screen.h index 71310b2692..abc1303e12 100644 --- a/src/gallium/drivers/r300/r300_screen.h +++ b/src/gallium/drivers/r300/r300_screen.h @@ -38,10 +38,6 @@ struct r300_screen { struct radeon_winsys* radeon_winsys; - /* XXX This hack will be removed once texture transfers become part of - * pipe_context. */ - struct pipe_context* ctx; - /* Chipset capabilities */ struct r300_capabilities* caps; -- cgit v1.2.3 From 6c8e5151f14bc642e3995a42ad0f90f407c04d5c Mon Sep 17 00:00:00 2001 From: George Sapountzis Date: Thu, 11 Mar 2010 18:04:02 +0200 Subject: glapi: organize arch-specific code by arch --- src/mesa/glapi/glapi_entrypoint.c | 69 ++++++++++++++++++++++++++++----------- 1 file changed, 50 insertions(+), 19 deletions(-) (limited to 'src') diff --git a/src/mesa/glapi/glapi_entrypoint.c b/src/mesa/glapi/glapi_entrypoint.c index 5e6e5995f2..7fffd2986f 100644 --- a/src/mesa/glapi/glapi_entrypoint.c +++ b/src/mesa/glapi/glapi_entrypoint.c @@ -65,7 +65,7 @@ get_entrypoint_address(GLuint functionOffset) #endif -#if defined(PTHREADS) || defined(GLX_USE_TLS) +#if defined(USE_X86_ASM) /** * Perform platform-specific GL API entry-point fixups. @@ -73,7 +73,7 @@ get_entrypoint_address(GLuint functionOffset) static void init_glapi_relocs( void ) { -#if defined(USE_X86_ASM) && defined(GLX_USE_TLS) && !defined(GLX_X86_READONLY_TEXT) +#if defined(GLX_USE_TLS) && !defined(GLX_X86_READONLY_TEXT) extern unsigned long _x86_get_dispatch(void); char run_time_patch[] = { 0x65, 0xa1, 0, 0, 0, 0 /* movl %gs:0,%eax */ @@ -88,8 +88,16 @@ init_glapi_relocs( void ) curr_func += DISPATCH_FUNCTION_SIZE; } #endif -#ifdef USE_SPARC_ASM - extern void __glapi_sparc_icache_flush(unsigned int *); +} + +#elif defined(USE_SPARC_ASM) + +extern void __glapi_sparc_icache_flush(unsigned int *); + +static void +init_glapi_relocs( void ) +{ +#if defined(PTHREADS) || defined(GLX_USE_TLS) static const unsigned int template[] = { #ifdef GLX_USE_TLS 0x05000000, /* sethi %hi(_glapi_tls_Dispatch), %g2 */ @@ -155,7 +163,7 @@ init_glapi_relocs( void ) int idx; #endif -#if defined(GLX_USE_TLS) +#ifdef GLX_USE_TLS code[0] = template[0] | (dispatch >> 10); code[1] = template[1]; __glapi_sparc_icache_flush(&code[0]); @@ -215,24 +223,25 @@ init_glapi_relocs( void ) #endif } +#else + +static void +init_glapi_relocs( void ) { } + +#endif /* USE_*_ASM */ + + void init_glapi_relocs_once( void ) { +#if defined(PTHREADS) || defined(GLX_USE_TLS) static pthread_once_t once_control = PTHREAD_ONCE_INIT; pthread_once( & once_control, init_glapi_relocs ); +#endif } -#else -void -init_glapi_relocs_once( void ) { } - -#endif /* defined(PTHREADS) || defined(GLX_USE_TLS) */ - - -#ifdef USE_SPARC_ASM -extern void __glapi_sparc_icache_flush(unsigned int *); -#endif +#if defined(USE_X86_ASM) /** * Generate a dispatch function (entrypoint) which jumps through @@ -242,7 +251,6 @@ extern void __glapi_sparc_icache_flush(unsigned int *); _glapi_proc generate_entrypoint(GLuint functionOffset) { -#if defined(USE_X86_ASM) /* 32 is chosen as something of a magic offset. For x86, the dispatch * at offset 32 is the first one where the offset in the * "jmp OFFSET*4(%eax)" can't be encoded in a single byte. @@ -258,8 +266,13 @@ generate_entrypoint(GLuint functionOffset) } return (_glapi_proc) code; +} + #elif defined(USE_SPARC_ASM) +_glapi_proc +generate_entrypoint(GLuint functionOffset) +{ #if defined(PTHREADS) || defined(GLX_USE_TLS) static const unsigned int template[] = { 0x07000000, /* sethi %hi(0), %g3 */ @@ -287,13 +300,21 @@ generate_entrypoint(GLuint functionOffset) } return (_glapi_proc) code; #endif +} #else + +_glapi_proc +generate_entrypoint(GLuint functionOffset) +{ (void) functionOffset; return NULL; -#endif /* USE_*_ASM */ } +#endif /* USE_*_ASM */ + + +#if defined(USE_X86_ASM) /** * This function inserts a new dispatch offset into the assembly language @@ -302,7 +323,6 @@ generate_entrypoint(GLuint functionOffset) void fill_in_entrypoint_offset(_glapi_proc entrypoint, GLuint offset) { -#if defined(USE_X86_ASM) GLubyte * const code = (GLubyte *) entrypoint; #if DISPATCH_FUNCTION_SIZE == 32 @@ -315,17 +335,28 @@ fill_in_entrypoint_offset(_glapi_proc entrypoint, GLuint offset) #else # error Invalid DISPATCH_FUNCTION_SIZE! #endif +} #elif defined(USE_SPARC_ASM) + +void +fill_in_entrypoint_offset(_glapi_proc entrypoint, GLuint offset) +{ unsigned int *code = (unsigned int *) entrypoint; + code[0] &= ~0x3fffff; code[0] |= (offset * sizeof(void *)) & 0x3fffff; __glapi_sparc_icache_flush(&code[0]); +} + #else +void +fill_in_entrypoint_offset(_glapi_proc entrypoint, GLuint offset) +{ /* an unimplemented architecture */ (void) entrypoint; (void) offset; +} #endif /* USE_*_ASM */ -} -- cgit v1.2.3 From 0ed0114de9f057e928124bada7289a4496a6d35f Mon Sep 17 00:00:00 2001 From: George Sapountzis Date: Thu, 11 Mar 2010 18:04:02 +0200 Subject: glapi: organize arch-specific code by arch (2) --- src/mesa/glapi/glapi_entrypoint.c | 154 ++++++++++++++++++-------------------- 1 file changed, 73 insertions(+), 81 deletions(-) (limited to 'src') diff --git a/src/mesa/glapi/glapi_entrypoint.c b/src/mesa/glapi/glapi_entrypoint.c index 7fffd2986f..9bc3878354 100644 --- a/src/mesa/glapi/glapi_entrypoint.c +++ b/src/mesa/glapi/glapi_entrypoint.c @@ -90,6 +90,55 @@ init_glapi_relocs( void ) #endif } + +/** + * Generate a dispatch function (entrypoint) which jumps through + * the given slot number (offset) in the current dispatch table. + * We need assembly language in order to accomplish this. + */ +_glapi_proc +generate_entrypoint(GLuint functionOffset) +{ + /* 32 is chosen as something of a magic offset. For x86, the dispatch + * at offset 32 is the first one where the offset in the + * "jmp OFFSET*4(%eax)" can't be encoded in a single byte. + */ + const GLubyte * const template_func = gl_dispatch_functions_start + + (DISPATCH_FUNCTION_SIZE * 32); + GLubyte * const code = (GLubyte *) malloc(DISPATCH_FUNCTION_SIZE); + + + if ( code != NULL ) { + (void) memcpy(code, template_func, DISPATCH_FUNCTION_SIZE); + fill_in_entrypoint_offset( (_glapi_proc) code, functionOffset ); + } + + return (_glapi_proc) code; +} + + +/** + * This function inserts a new dispatch offset into the assembly language + * stub that was generated with the preceeding function. + */ +void +fill_in_entrypoint_offset(_glapi_proc entrypoint, GLuint offset) +{ + GLubyte * const code = (GLubyte *) entrypoint; + +#if DISPATCH_FUNCTION_SIZE == 32 + *((unsigned int *)(code + 11)) = 4 * offset; + *((unsigned int *)(code + 22)) = 4 * offset; +#elif DISPATCH_FUNCTION_SIZE == 16 && defined( GLX_USE_TLS ) + *((unsigned int *)(code + 8)) = 4 * offset; +#elif DISPATCH_FUNCTION_SIZE == 16 + *((unsigned int *)(code + 7)) = 4 * offset; +#else +# error Invalid DISPATCH_FUNCTION_SIZE! +#endif +} + + #elif defined(USE_SPARC_ASM) extern void __glapi_sparc_icache_flush(unsigned int *); @@ -223,52 +272,6 @@ init_glapi_relocs( void ) #endif } -#else - -static void -init_glapi_relocs( void ) { } - -#endif /* USE_*_ASM */ - - -void -init_glapi_relocs_once( void ) -{ -#if defined(PTHREADS) || defined(GLX_USE_TLS) - static pthread_once_t once_control = PTHREAD_ONCE_INIT; - pthread_once( & once_control, init_glapi_relocs ); -#endif -} - - -#if defined(USE_X86_ASM) - -/** - * Generate a dispatch function (entrypoint) which jumps through - * the given slot number (offset) in the current dispatch table. - * We need assembly language in order to accomplish this. - */ -_glapi_proc -generate_entrypoint(GLuint functionOffset) -{ - /* 32 is chosen as something of a magic offset. For x86, the dispatch - * at offset 32 is the first one where the offset in the - * "jmp OFFSET*4(%eax)" can't be encoded in a single byte. - */ - const GLubyte * const template_func = gl_dispatch_functions_start - + (DISPATCH_FUNCTION_SIZE * 32); - GLubyte * const code = (GLubyte *) malloc(DISPATCH_FUNCTION_SIZE); - - - if ( code != NULL ) { - (void) memcpy(code, template_func, DISPATCH_FUNCTION_SIZE); - fill_in_entrypoint_offset( (_glapi_proc) code, functionOffset ); - } - - return (_glapi_proc) code; -} - -#elif defined(USE_SPARC_ASM) _glapi_proc generate_entrypoint(GLuint functionOffset) @@ -302,54 +305,33 @@ generate_entrypoint(GLuint functionOffset) #endif } -#else -_glapi_proc -generate_entrypoint(GLuint functionOffset) +void +fill_in_entrypoint_offset(_glapi_proc entrypoint, GLuint offset) { - (void) functionOffset; - return NULL; -} + unsigned int *code = (unsigned int *) entrypoint; -#endif /* USE_*_ASM */ + code[0] &= ~0x3fffff; + code[0] |= (offset * sizeof(void *)) & 0x3fffff; + __glapi_sparc_icache_flush(&code[0]); +} -#if defined(USE_X86_ASM) +#else /* USE_*_ASM */ -/** - * This function inserts a new dispatch offset into the assembly language - * stub that was generated with the preceeding function. - */ -void -fill_in_entrypoint_offset(_glapi_proc entrypoint, GLuint offset) +static void +init_glapi_relocs( void ) { - GLubyte * const code = (GLubyte *) entrypoint; - -#if DISPATCH_FUNCTION_SIZE == 32 - *((unsigned int *)(code + 11)) = 4 * offset; - *((unsigned int *)(code + 22)) = 4 * offset; -#elif DISPATCH_FUNCTION_SIZE == 16 && defined( GLX_USE_TLS ) - *((unsigned int *)(code + 8)) = 4 * offset; -#elif DISPATCH_FUNCTION_SIZE == 16 - *((unsigned int *)(code + 7)) = 4 * offset; -#else -# error Invalid DISPATCH_FUNCTION_SIZE! -#endif } -#elif defined(USE_SPARC_ASM) -void -fill_in_entrypoint_offset(_glapi_proc entrypoint, GLuint offset) +_glapi_proc +generate_entrypoint(GLuint functionOffset) { - unsigned int *code = (unsigned int *) entrypoint; - - code[0] &= ~0x3fffff; - code[0] |= (offset * sizeof(void *)) & 0x3fffff; - __glapi_sparc_icache_flush(&code[0]); + (void) functionOffset; + return NULL; } -#else void fill_in_entrypoint_offset(_glapi_proc entrypoint, GLuint offset) @@ -360,3 +342,13 @@ fill_in_entrypoint_offset(_glapi_proc entrypoint, GLuint offset) } #endif /* USE_*_ASM */ + + +void +init_glapi_relocs_once( void ) +{ +#if defined(PTHREADS) || defined(GLX_USE_TLS) + static pthread_once_t once_control = PTHREAD_ONCE_INIT; + pthread_once( & once_control, init_glapi_relocs ); +#endif +} -- cgit v1.2.3 From 9a649c8eaa38b5f8f5a89c2571ed66a6f51daeba Mon Sep 17 00:00:00 2001 From: George Sapountzis Date: Thu, 11 Mar 2010 18:04:03 +0200 Subject: glapi: more organize code by arch It seems that x86-64 with tls will fail to compile or load due to a missining gl_dispatch_functions_start symbol. Not changing though, since this is how it used to be and cannot test. --- src/mesa/glapi/glapi_priv.h | 14 ++++++++++---- 1 file changed, 10 insertions(+), 4 deletions(-) (limited to 'src') diff --git a/src/mesa/glapi/glapi_priv.h b/src/mesa/glapi/glapi_priv.h index 7cd81ee8dc..a8516f71a3 100644 --- a/src/mesa/glapi/glapi_priv.h +++ b/src/mesa/glapi/glapi_priv.h @@ -52,15 +52,21 @@ extern _glapi_proc get_entrypoint_address(GLuint functionOffset); -#if defined(USE_X64_64_ASM) && defined(GLX_USE_TLS) -# define DISPATCH_FUNCTION_SIZE 16 -#elif defined(USE_X86_ASM) -# if defined(THREADS) && !defined(GLX_USE_TLS) +#if defined(USE_X86_ASM) +# if defined(GLX_USE_TLS) +# define DISPATCH_FUNCTION_SIZE 16 +# elif defined(THREADS) # define DISPATCH_FUNCTION_SIZE 32 # else # define DISPATCH_FUNCTION_SIZE 16 # endif #endif +#if defined(USE_X64_64_ASM) +# if defined(GLX_USE_TLS) +# define DISPATCH_FUNCTION_SIZE 16 +# endif +#endif + #endif -- cgit v1.2.3 From 8fd7ee1815dd5880f94f13d88225d7be6f549ae6 Mon Sep 17 00:00:00 2001 From: George Sapountzis Date: Thu, 11 Mar 2010 18:04:03 +0200 Subject: glapi: this one should be by THREAD --- src/mesa/glapi/glapi_entrypoint.c | 10 ++++------ 1 file changed, 4 insertions(+), 6 deletions(-) (limited to 'src') diff --git a/src/mesa/glapi/glapi_entrypoint.c b/src/mesa/glapi/glapi_entrypoint.c index 9bc3878354..3256867b16 100644 --- a/src/mesa/glapi/glapi_entrypoint.c +++ b/src/mesa/glapi/glapi_entrypoint.c @@ -126,15 +126,13 @@ fill_in_entrypoint_offset(_glapi_proc entrypoint, GLuint offset) { GLubyte * const code = (GLubyte *) entrypoint; -#if DISPATCH_FUNCTION_SIZE == 32 +#if defined(GLX_USE_TLS) + *((unsigned int *)(code + 8)) = 4 * offset; +#elif defined(THREADS) *((unsigned int *)(code + 11)) = 4 * offset; *((unsigned int *)(code + 22)) = 4 * offset; -#elif DISPATCH_FUNCTION_SIZE == 16 && defined( GLX_USE_TLS ) - *((unsigned int *)(code + 8)) = 4 * offset; -#elif DISPATCH_FUNCTION_SIZE == 16 - *((unsigned int *)(code + 7)) = 4 * offset; #else -# error Invalid DISPATCH_FUNCTION_SIZE! + *((unsigned int *)(code + 7)) = 4 * offset; #endif } -- cgit v1.2.3 From 41eab95b3bc29a4fe6fd08b7f1f80cef5bdc097f Mon Sep 17 00:00:00 2001 From: George Sapountzis Date: Thu, 11 Mar 2010 18:04:03 +0200 Subject: glapi: exec_malloc for dispatch stubs --- src/mesa/SConscript | 1 + src/mesa/glapi/glapi_entrypoint.c | 4 +- src/mesa/glapi/glapi_execmem.c | 127 ++++++++++++++++++++++++++++++++++++++ src/mesa/glapi/glapi_getproc.c | 6 -- src/mesa/glapi/glapi_priv.h | 25 ++++++++ src/mesa/sources.mak | 1 + 6 files changed, 156 insertions(+), 8 deletions(-) create mode 100644 src/mesa/glapi/glapi_execmem.c (limited to 'src') diff --git a/src/mesa/SConscript b/src/mesa/SConscript index e80ec5ee88..86da6f58bd 100644 --- a/src/mesa/SConscript +++ b/src/mesa/SConscript @@ -250,6 +250,7 @@ if env['platform'] != 'winddk': 'glapi/glapi.c', 'glapi/glapi_dispatch.c', 'glapi/glapi_entrypoint.c', + 'glapi/glapi_execmem.c', 'glapi/glapi_getproc.c', 'glapi/glapi_nop.c', 'glapi/glthread.c', diff --git a/src/mesa/glapi/glapi_entrypoint.c b/src/mesa/glapi/glapi_entrypoint.c index 3256867b16..c4f43f66a1 100644 --- a/src/mesa/glapi/glapi_entrypoint.c +++ b/src/mesa/glapi/glapi_entrypoint.c @@ -105,7 +105,7 @@ generate_entrypoint(GLuint functionOffset) */ const GLubyte * const template_func = gl_dispatch_functions_start + (DISPATCH_FUNCTION_SIZE * 32); - GLubyte * const code = (GLubyte *) malloc(DISPATCH_FUNCTION_SIZE); + GLubyte * const code = (GLubyte *) _glapi_exec_malloc(DISPATCH_FUNCTION_SIZE); if ( code != NULL ) { @@ -288,7 +288,7 @@ generate_entrypoint(GLuint functionOffset) extern unsigned int __glapi_sparc_pthread_stub; unsigned long call_dest = (unsigned long ) &__glapi_sparc_pthread_stub; #endif - unsigned int *code = (unsigned int *) malloc(sizeof(template)); + unsigned int *code = (unsigned int *) _glapi_exec_malloc(sizeof(template)); if (code) { code[0] = template[0] | (functionOffset & 0x3fffff); code[1] = template[1]; diff --git a/src/mesa/glapi/glapi_execmem.c b/src/mesa/glapi/glapi_execmem.c new file mode 100644 index 0000000000..6a1fac597f --- /dev/null +++ b/src/mesa/glapi/glapi_execmem.c @@ -0,0 +1,127 @@ +/* + * Mesa 3-D graphics library + * Version: 6.5 + * + * Copyright (C) 1999-2005 Brian Paul All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included + * in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * BRIAN PAUL BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN + * AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + */ + + +/** + * \file glapi_execmem.c + * + * Function for allocating executable memory for dispatch stubs. + * + * Copied from main/execmem.c and simplified for dispatch stubs. + */ + + +#ifdef HAVE_DIX_CONFIG_H +#include +#include "glapi/mesa.h" +#else +#include "main/compiler.h" +#endif + +#include "glapi/glthread.h" + + +#if defined(__linux__) || defined(__OpenBSD__) || defined(_NetBSD__) || defined(__sun) + +#include +#include + +#ifdef MESA_SELINUX +#include +#endif + + +#ifndef MAP_ANONYMOUS +#define MAP_ANONYMOUS MAP_ANON +#endif + + +#define EXEC_MAP_SIZE (4*1024) + +_glthread_DECLARE_STATIC_MUTEX(exec_mutex); + +static unsigned int head = 0; + +static unsigned char *exec_mem = NULL; + + +/* + * Dispatch stubs are of fixed size and never freed. Thus, we do not need to + * overlay a heap, we just mmap a page and manage through an index. + */ + +static int +init_map(void) +{ +#ifdef MESA_SELINUX + if (is_selinux_enabled()) { + if (!security_get_boolean_active("allow_execmem") || + !security_get_boolean_pending("allow_execmem")) + return 0; + } +#endif + + if (!exec_mem) + exec_mem = mmap(NULL, EXEC_MAP_SIZE, PROT_EXEC | PROT_READ | PROT_WRITE, + MAP_PRIVATE | MAP_ANONYMOUS, -1, 0); + + return (exec_mem != MAP_FAILED); +} + + +void * +_glapi_exec_malloc(unsigned int size) +{ + void *addr = NULL; + + _glthread_LOCK_MUTEX(exec_mutex); + + if (!init_map()) + goto bail; + + /* free space check, assumes no integer overflow */ + if (head + size > EXEC_MAP_SIZE) + goto bail; + + /* allocation, assumes proper addr and size alignement */ + addr = exec_mem + head; + head += size; + +bail: + _glthread_UNLOCK_MUTEX(exec_mutex); + + return addr; +} + + +#else + +void * +_glapi_exec_malloc(unsigned int size) +{ + return malloc(size); +} + + +#endif diff --git a/src/mesa/glapi/glapi_getproc.c b/src/mesa/glapi/glapi_getproc.c index 295657875d..c73e8dd3b0 100644 --- a/src/mesa/glapi/glapi_getproc.c +++ b/src/mesa/glapi/glapi_getproc.c @@ -200,12 +200,6 @@ struct _glapi_function { }; -/* - * Number of extension functions which we can dynamically add at runtime. - */ -#define MAX_EXTENSION_FUNCS 300 - - static struct _glapi_function ExtEntryTable[MAX_EXTENSION_FUNCS]; static GLuint NumExtEntryPoints = 0; diff --git a/src/mesa/glapi/glapi_priv.h b/src/mesa/glapi/glapi_priv.h index a8516f71a3..0e2de460f2 100644 --- a/src/mesa/glapi/glapi_priv.h +++ b/src/mesa/glapi/glapi_priv.h @@ -28,6 +28,9 @@ #include "glthread.h" + +/* getproc */ + extern void _glapi_check_table_not_null(const struct _glapi_table *table); @@ -36,6 +39,14 @@ extern void _glapi_check_table(const struct _glapi_table *table); +/* execmem */ + +extern void * +_glapi_exec_malloc(GLuint size); + + +/* entrypoint */ + extern void init_glapi_relocs_once(void); @@ -52,6 +63,9 @@ extern _glapi_proc get_entrypoint_address(GLuint functionOffset); +/** + * Size (in bytes) of dispatch function (entrypoint). + */ #if defined(USE_X86_ASM) # if defined(GLX_USE_TLS) # define DISPATCH_FUNCTION_SIZE 16 @@ -69,4 +83,15 @@ get_entrypoint_address(GLuint functionOffset); #endif +/** + * Number of extension functions which we can dynamically add at runtime. + * + * Number of extension functions is also subject to the size of backing exec + * mem we allocate. For the common case of dispatch stubs with size 16 bytes, + * the two limits will be hit simultaneously. For larger dispatch function + * sizes, MAX_EXTENSION_FUNCS is effectively reduced. + */ +#define MAX_EXTENSION_FUNCS 256 + + #endif diff --git a/src/mesa/sources.mak b/src/mesa/sources.mak index 74885548e5..d59e24de1f 100644 --- a/src/mesa/sources.mak +++ b/src/mesa/sources.mak @@ -89,6 +89,7 @@ GLAPI_SOURCES = \ glapi/glapi.c \ glapi/glapi_dispatch.c \ glapi/glapi_entrypoint.c \ + glapi/glapi_execmem.c \ glapi/glapi_getproc.c \ glapi/glapi_nop.c \ glapi/glthread.c -- cgit v1.2.3 From 08cddfe2912ec6f8cb2a54dfa5ae12f755e549f8 Mon Sep 17 00:00:00 2001 From: Vinson Lee Date: Sun, 14 Mar 2010 15:38:04 -0700 Subject: svga: Remove unnecessary header. --- src/gallium/drivers/svga/svga_screen_texture.c | 2 -- 1 file changed, 2 deletions(-) (limited to 'src') diff --git a/src/gallium/drivers/svga/svga_screen_texture.c b/src/gallium/drivers/svga/svga_screen_texture.c index 107e4a3962..4a058eda88 100644 --- a/src/gallium/drivers/svga/svga_screen_texture.c +++ b/src/gallium/drivers/svga/svga_screen_texture.c @@ -41,8 +41,6 @@ #include "svga_debug.h" #include "svga_screen_buffer.h" -#include - /* XXX: This isn't a real hardware flag, but just a hack for kernel to * know about primary surfaces. Find a better way to accomplish this. -- cgit v1.2.3 From 725d77a6b535672a6fde89935913ca18a882f892 Mon Sep 17 00:00:00 2001 From: Vinson Lee Date: Sun, 14 Mar 2010 15:47:05 -0700 Subject: trace: Remove unnecessary headers. --- src/gallium/drivers/trace/tr_drm.c | 3 --- 1 file changed, 3 deletions(-) (limited to 'src') diff --git a/src/gallium/drivers/trace/tr_drm.c b/src/gallium/drivers/trace/tr_drm.c index 906b3262e4..eaa47df406 100644 --- a/src/gallium/drivers/trace/tr_drm.c +++ b/src/gallium/drivers/trace/tr_drm.c @@ -30,9 +30,6 @@ #include "util/u_memory.h" #include "tr_drm.h" #include "tr_screen.h" -#include "tr_context.h" -#include "tr_buffer.h" -#include "tr_texture.h" #include "tr_public.h" struct trace_drm_api -- cgit v1.2.3 From 06ebc46e65d7dea6f146db85150021814d2439bf Mon Sep 17 00:00:00 2001 From: George Sapountzis Date: Sun, 14 Mar 2010 11:36:45 +0200 Subject: dri: add dri_sw.c helper This is dri_util.c stripped from the drm-specific bits and will be used for both classic and gallium swrast_dri.so --- src/mesa/drivers/dri/common/dri_sw.c | 267 +++++++++++++++++++++++++++++++++++ src/mesa/drivers/dri/common/dri_sw.h | 115 +++++++++++++++ 2 files changed, 382 insertions(+) create mode 100644 src/mesa/drivers/dri/common/dri_sw.c create mode 100644 src/mesa/drivers/dri/common/dri_sw.h (limited to 'src') diff --git a/src/mesa/drivers/dri/common/dri_sw.c b/src/mesa/drivers/dri/common/dri_sw.c new file mode 100644 index 0000000000..4b87a7f32f --- /dev/null +++ b/src/mesa/drivers/dri/common/dri_sw.c @@ -0,0 +1,267 @@ +/* + * Copyright 1998-1999 Precision Insight, Inc., Cedar Park, Texas. + * All Rights Reserved. + * Copyright 2010 George Sapountzis + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included + * in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * BRIAN PAUL BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN + * AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + */ + +/** + * \file dri_sw.c + * + * DRISW utility functions, i.e. dri_util.c stripped from drm-specific bits. + */ + +#include "dri_sw.h" +#include "utils.h" + + +/** + * Screen functions + */ + +static void +setupLoaderExtensions(__DRIscreen *psp, + const __DRIextension **extensions) +{ + int i; + + for (i = 0; extensions[i]; i++) { + if (strcmp(extensions[i]->name, __DRI_SWRAST_LOADER) == 0) + psp->swrast_loader = (__DRIswrastLoaderExtension *) extensions[i]; + } +} + +static __DRIscreen * +driCreateNewScreen(int scrn, const __DRIextension **extensions, + const __DRIconfig ***driver_configs, void *data) +{ + static const __DRIextension *emptyExtensionList[] = { NULL }; + __DRIscreen *psp; + + (void) data; + + psp = CALLOC_STRUCT(__DRIscreenRec); + if (!psp) + return NULL; + + setupLoaderExtensions(psp, extensions); + + psp->extensions = emptyExtensionList; + psp->myNum = scrn; + + *driver_configs = driDriverAPI.InitScreen(psp); + + if (*driver_configs == NULL) { + FREE(psp); + return NULL; + } + + return psp; +} + +static void driDestroyScreen(__DRIscreen *psp) +{ + if (psp) { + driDriverAPI.DestroyScreen(psp); + + FREE(psp); + } +} + +static const __DRIextension **driGetExtensions(__DRIscreen *psp) +{ + return psp->extensions; +} + + +/** + * Context functions + */ + +static __DRIcontext * +driCreateNewContext(__DRIscreen *psp, const __DRIconfig *config, + __DRIcontext *shared, void *data) +{ + __DRIcontext *pcp; + void * const shareCtx = (shared != NULL) ? &shared->Base : NULL; + + pcp = CALLOC_STRUCT(__DRIcontextRec); + if (!pcp) + return NULL; + + pcp->loaderPrivate = data; + + pcp->driScreenPriv = psp; + pcp->driDrawablePriv = NULL; + pcp->driReadablePriv = NULL; + + if (!driDriverAPI.CreateContext(&config->modes, pcp, shareCtx)) { + FREE(pcp); + return NULL; + } + + return pcp; +} + +static void +driDestroyContext(__DRIcontext *pcp) +{ + if (pcp) { + driDriverAPI.DestroyContext(pcp); + FREE(pcp); + } +} + +static int +driCopyContext(__DRIcontext *dst, __DRIcontext *src, unsigned long mask) +{ + return GL_FALSE; +} + +static void dri_get_drawable(__DRIdrawable *pdp); +static void dri_put_drawable(__DRIdrawable *pdp); + +static int driBindContext(__DRIcontext *pcp, + __DRIdrawable *pdp, + __DRIdrawable *prp) +{ + /* Bind the drawable to the context */ + if (pcp) { + pcp->driDrawablePriv = pdp; + pcp->driReadablePriv = prp; + if (pdp) { + dri_get_drawable(pdp); + } + if ( prp && pdp != prp ) { + dri_get_drawable(prp); + } + } + + return driDriverAPI.MakeCurrent(pcp, pdp, prp); +} + +static int driUnbindContext(__DRIcontext *pcp) +{ + __DRIdrawable *pdp; + __DRIdrawable *prp; + + if (pcp == NULL) + return GL_FALSE; + + pdp = pcp->driDrawablePriv; + prp = pcp->driReadablePriv; + + /* already unbound */ + if (!pdp && !prp) + return GL_TRUE; + + driDriverAPI.UnbindContext(pcp); + + dri_put_drawable(pdp); + + if (prp != pdp) { + dri_put_drawable(prp); + } + + pcp->driDrawablePriv = NULL; + pcp->driReadablePriv = NULL; + + return GL_TRUE; +} + + +/** + * Drawable functions + */ + +static void dri_get_drawable(__DRIdrawable *pdp) +{ + pdp->refcount++; +} + +static void dri_put_drawable(__DRIdrawable *pdp) +{ + if (pdp) { + pdp->refcount--; + if (pdp->refcount) + return; + + driDriverAPI.DestroyBuffer(pdp); + + FREE(pdp); + } +} + +static __DRIdrawable * +driCreateNewDrawable(__DRIscreen *psp, + const __DRIconfig *config, void *data) +{ + __DRIdrawable *pdp; + + pdp = CALLOC_STRUCT(__DRIdrawableRec); + if (!pdp) + return NULL; + + pdp->loaderPrivate = data; + + pdp->driScreenPriv = psp; + + dri_get_drawable(pdp); + + if (!driDriverAPI.CreateBuffer(psp, pdp, &config->modes, GL_FALSE)) { + FREE(pdp); + return NULL; + } + + return pdp; +} + +static void +driDestroyDrawable(__DRIdrawable *pdp) +{ + dri_put_drawable(pdp); +} + +static void driSwapBuffers(__DRIdrawable *pdp) +{ + driDriverAPI.SwapBuffers(pdp); +} + +const __DRIcoreExtension driCoreExtension = { + { __DRI_CORE, __DRI_CORE_VERSION }, + NULL, /* driCreateNewScreen */ + driDestroyScreen, + driGetExtensions, + driGetConfigAttrib, + driIndexConfigAttrib, + NULL, /* driCreateNewDrawable */ + driDestroyDrawable, + driSwapBuffers, + driCreateNewContext, + driCopyContext, + driDestroyContext, + driBindContext, + driUnbindContext +}; + +const __DRIswrastExtension driSWRastExtension = { + { __DRI_SWRAST, __DRI_SWRAST_VERSION }, + driCreateNewScreen, + driCreateNewDrawable +}; diff --git a/src/mesa/drivers/dri/common/dri_sw.h b/src/mesa/drivers/dri/common/dri_sw.h new file mode 100644 index 0000000000..b7257b14a2 --- /dev/null +++ b/src/mesa/drivers/dri/common/dri_sw.h @@ -0,0 +1,115 @@ +/* + * Copyright 1998-1999 Precision Insight, Inc., Cedar Park, Texas. + * All Rights Reserved. + * Copyright 2010 George Sapountzis + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included + * in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * BRIAN PAUL BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN + * AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + */ + + +#ifndef _DRI_SW_H +#define _DRI_SW_H + +#include +#include +#include "main/mtypes.h" + + +/** + * Extensions + */ +extern const __DRIcoreExtension driCoreExtension; +extern const __DRIswrastExtension driSWRastExtension; + + +/** + * Data types + */ +struct __DRIscreenRec { + int myNum; + + int fd; + + void *private; + + const __DRIextension **extensions; + + const __DRIswrastLoaderExtension *swrast_loader; +}; + +struct __DRIcontextRec { + + GLcontext Base; + + void *loaderPrivate; + + __DRIdrawable *driDrawablePriv; + + __DRIdrawable *driReadablePriv; + + __DRIscreen *driScreenPriv; +}; + +struct __DRIdrawableRec { + + GLframebuffer Base; + + void *loaderPrivate; + + __DRIscreen *driScreenPriv; + + int refcount; + + /* scratch row for optimized front-buffer rendering */ + char *row; +}; + + +/** + * Driver callback functions + */ +struct __DriverAPIRec { + const __DRIconfig **(*InitScreen) (__DRIscreen * priv); + + void (*DestroyScreen)(__DRIscreen *driScrnPriv); + + GLboolean (*CreateContext)(const __GLcontextModes *glVis, + __DRIcontext *driContextPriv, + void *sharedContextPrivate); + + void (*DestroyContext)(__DRIcontext *driContextPriv); + + GLboolean (*CreateBuffer)(__DRIscreen *driScrnPriv, + __DRIdrawable *driDrawPriv, + const __GLcontextModes *glVis, + GLboolean pixmapBuffer); + + void (*DestroyBuffer)(__DRIdrawable *driDrawPriv); + + void (*SwapBuffers)(__DRIdrawable *driDrawPriv); + + GLboolean (*MakeCurrent)(__DRIcontext *driContextPriv, + __DRIdrawable *driDrawPriv, + __DRIdrawable *driReadPriv); + + GLboolean (*UnbindContext)(__DRIcontext *driContextPriv); +}; + +extern const struct __DriverAPIRec driDriverAPI; + +#endif /* _DRI_SW_H */ -- cgit v1.2.3 From 6e376485c10896229f7bfaf5b0cce9c8b67f61b1 Mon Sep 17 00:00:00 2001 From: George Sapountzis Date: Sun, 14 Mar 2010 11:36:45 +0200 Subject: dri/swrast: port to dri_sw --- src/mesa/drivers/dri/swrast/Makefile | 3 +- src/mesa/drivers/dri/swrast/swrast.c | 249 ++++++++++++------------------ src/mesa/drivers/dri/swrast/swrast_priv.h | 28 +--- 3 files changed, 100 insertions(+), 180 deletions(-) (limited to 'src') diff --git a/src/mesa/drivers/dri/swrast/Makefile b/src/mesa/drivers/dri/swrast/Makefile index 771169c1ff..cc59eefdb2 100644 --- a/src/mesa/drivers/dri/swrast/Makefile +++ b/src/mesa/drivers/dri/swrast/Makefile @@ -17,7 +17,8 @@ ASM_SOURCES = SWRAST_COMMON_SOURCES = \ ../../common/driverfuncs.c \ - ../common/utils.c + ../common/utils.c \ + ../common/dri_sw.c include ../Makefile.template diff --git a/src/mesa/drivers/dri/swrast/swrast.c b/src/mesa/drivers/dri/swrast/swrast.c index 03c672ecf1..8c858ab2da 100644 --- a/src/mesa/drivers/dri/swrast/swrast.c +++ b/src/mesa/drivers/dri/swrast/swrast.c @@ -54,17 +54,9 @@ * Screen and config-related functions */ -static void -setupLoaderExtensions(__DRIscreen *psp, - const __DRIextension **extensions) -{ - int i; - - for (i = 0; extensions[i]; i++) { - if (strcmp(extensions[i]->name, __DRI_SWRAST_LOADER) == 0) - psp->swrast_loader = (__DRIswrastLoaderExtension *) extensions[i]; - } -} +static const __DRIextension *dri_screen_extensions[] = { + NULL +}; static __DRIconfig ** swrastFillInModes(__DRIscreen *psp, @@ -143,26 +135,14 @@ swrastFillInModes(__DRIscreen *psp, return configs; } -static __DRIscreen * -driCreateNewScreen(int scrn, const __DRIextension **extensions, - const __DRIconfig ***driver_configs, void *data) +static const __DRIconfig ** +dri_init_screen(__DRIscreen * psp) { - static const __DRIextension *emptyExtensionList[] = { NULL }; - __DRIscreen *psp; __DRIconfig **configs8, **configs16, **configs24, **configs32; - (void) data; - TRACE; - psp = calloc(1, sizeof(*psp)); - if (!psp) - return NULL; - - setupLoaderExtensions(psp, extensions); - - psp->num = scrn; - psp->extensions = emptyExtensionList; + psp->extensions = dri_screen_extensions; configs8 = swrastFillInModes(psp, 8, 8, 0, 1); configs16 = swrastFillInModes(psp, 16, 16, 0, 1); @@ -171,28 +151,15 @@ driCreateNewScreen(int scrn, const __DRIextension **extensions, configs16 = driConcatConfigs(configs8, configs16); configs24 = driConcatConfigs(configs16, configs24); - *driver_configs = (const __DRIconfig **) - driConcatConfigs(configs24, configs32); - - driInitExtensions( NULL, NULL, GL_FALSE ); - - return psp; -} - -static void driDestroyScreen(__DRIscreen *psp) -{ - TRACE; + configs32 = driConcatConfigs(configs24, configs32); - if (psp) { - free(psp); - } + return (const __DRIconfig **)configs32; } -static const __DRIextension **driGetExtensions(__DRIscreen *psp) +static void +dri_destroy_screen(__DRIscreen * sPriv) { TRACE; - - return psp->extensions; } @@ -336,94 +303,95 @@ swrast_new_renderbuffer(const GLvisual *visual, GLboolean front) return xrb; } -static __DRIdrawable * -driCreateNewDrawable(__DRIscreen *screen, - const __DRIconfig *config, void *data) +static GLboolean +dri_create_buffer(__DRIscreen * sPriv, + __DRIdrawable * dPriv, + const __GLcontextModes * visual, GLboolean isPixmap) { - __DRIdrawable *buf; + GLframebuffer *fb; struct swrast_renderbuffer *frontrb, *backrb; TRACE; - buf = calloc(1, sizeof *buf); - if (!buf) - return NULL; - - buf->loaderPrivate = data; + fb = &dPriv->Base; - buf->driScreenPriv = screen; - - buf->row = malloc(MAX_WIDTH * 4); + dPriv->row = malloc(MAX_WIDTH * 4); /* basic framebuffer setup */ - _mesa_initialize_window_framebuffer(&buf->Base, &config->modes); + _mesa_initialize_window_framebuffer(fb, visual); /* add front renderbuffer */ - frontrb = swrast_new_renderbuffer(&config->modes, GL_TRUE); - _mesa_add_renderbuffer(&buf->Base, BUFFER_FRONT_LEFT, &frontrb->Base); + frontrb = swrast_new_renderbuffer(visual, GL_TRUE); + _mesa_add_renderbuffer(fb, BUFFER_FRONT_LEFT, &frontrb->Base); /* add back renderbuffer */ - if (config->modes.doubleBufferMode) { - backrb = swrast_new_renderbuffer(&config->modes, GL_FALSE); - _mesa_add_renderbuffer(&buf->Base, BUFFER_BACK_LEFT, &backrb->Base); + if (visual->doubleBufferMode) { + backrb = swrast_new_renderbuffer(visual, GL_FALSE); + _mesa_add_renderbuffer(fb, BUFFER_BACK_LEFT, &backrb->Base); } /* add software renderbuffers */ - _mesa_add_soft_renderbuffers(&buf->Base, + _mesa_add_soft_renderbuffers(fb, GL_FALSE, /* color */ - config->modes.haveDepthBuffer, - config->modes.haveStencilBuffer, - config->modes.haveAccumBuffer, + visual->haveDepthBuffer, + visual->haveStencilBuffer, + visual->haveAccumBuffer, GL_FALSE, /* alpha */ GL_FALSE /* aux bufs */); - return buf; + return GL_TRUE; } static void -driDestroyDrawable(__DRIdrawable *buf) +dri_destroy_buffer(__DRIdrawable * dPriv) { TRACE; - if (buf) { - struct gl_framebuffer *fb = &buf->Base; + if (dPriv) { + GLframebuffer *fb; + + free(dPriv->row); - free(buf->row); + fb = &dPriv->Base; fb->DeletePending = GL_TRUE; _mesa_reference_framebuffer(&fb, NULL); } } -static void driSwapBuffers(__DRIdrawable *buf) +static void +dri_swap_buffers(__DRIdrawable * dPriv) { - GET_CURRENT_CONTEXT(ctx); + __DRIscreen *sPriv = dPriv->driScreenPriv; - struct swrast_renderbuffer *frontrb = - swrast_renderbuffer(buf->Base.Attachment[BUFFER_FRONT_LEFT].Renderbuffer); - struct swrast_renderbuffer *backrb = - swrast_renderbuffer(buf->Base.Attachment[BUFFER_BACK_LEFT].Renderbuffer); + GET_CURRENT_CONTEXT(ctx); - __DRIscreen *screen = buf->driScreenPriv; + GLframebuffer *fb; + struct swrast_renderbuffer *frontrb, *backrb; TRACE; + fb = &dPriv->Base; + + frontrb = swrast_renderbuffer(fb->Attachment[BUFFER_FRONT_LEFT].Renderbuffer); + backrb = swrast_renderbuffer(fb->Attachment[BUFFER_BACK_LEFT].Renderbuffer); + /* check for signle-buffered */ if (backrb == NULL) return; /* check if swapping currently bound buffer */ - if (ctx && ctx->DrawBuffer == &(buf->Base)) { + if (ctx && ctx->DrawBuffer == fb) { /* flush pending rendering */ _mesa_notifySwapBuffers(ctx); } - screen->swrast_loader->putImage(buf, __DRI_SWRAST_IMAGE_OP_SWAP, - 0, 0, - frontrb->Base.Width, - frontrb->Base.Height, - backrb->Base.Data, - buf->loaderPrivate); + sPriv->swrast_loader->putImage(dPriv, __DRI_SWRAST_IMAGE_OP_SWAP, + 0, 0, + frontrb->Base.Width, + frontrb->Base.Height, + backrb->Base.Data, + dPriv->loaderPrivate); } @@ -434,13 +402,13 @@ static void driSwapBuffers(__DRIdrawable *buf) static void get_window_size( GLframebuffer *fb, GLsizei *w, GLsizei *h ) { - __DRIdrawable *buf = swrast_drawable(fb); - __DRIscreen *screen = buf->driScreenPriv; + __DRIdrawable *dPriv = swrast_drawable(fb); + __DRIscreen *sPriv = dPriv->driScreenPriv; int x, y; - screen->swrast_loader->getDrawableInfo(buf, - &x, &y, w, h, - buf->loaderPrivate); + sPriv->swrast_loader->getDrawableInfo(dPriv, + &x, &y, w, h, + dPriv->loaderPrivate); } static void @@ -502,36 +470,28 @@ swrast_init_driver_functions(struct dd_function_table *driver) * Context-related functions. */ -static __DRIcontext * -driCreateNewContext(__DRIscreen *screen, const __DRIconfig *config, - __DRIcontext *shared, void *data) +static GLboolean +dri_create_context(const __GLcontextModes * visual, + __DRIcontext * cPriv, void *sharedContextPrivate) { - __DRIcontext *ctx; GLcontext *mesaCtx; + GLcontext *sharedCtx; struct dd_function_table functions; TRACE; - ctx = calloc(1, sizeof *ctx); - if (!ctx) - return NULL; - - ctx->loaderPrivate = data; - - ctx->driScreenPriv = screen; - /* build table of device driver functions */ _mesa_init_driver_functions(&functions); swrast_init_driver_functions(&functions); - if (!_mesa_initialize_context(&ctx->Base, &config->modes, - shared ? &shared->Base : NULL, - &functions, (void *) ctx)) { - free(ctx); - return NULL; + sharedCtx = sharedContextPrivate; + + /* basic context setup */ + if (!_mesa_initialize_context(&cPriv->Base, visual, sharedCtx, &functions, (void *) cPriv)) { + return GL_FALSE; } - mesaCtx = &ctx->Base; + mesaCtx = &cPriv->Base; /* do bounds checking to prevent segfaults and server crashes! */ mesaCtx->Const.CheckArrayBounds = GL_TRUE; @@ -558,17 +518,20 @@ driCreateNewContext(__DRIscreen *screen, const __DRIconfig *config, _mesa_meta_init(mesaCtx); - return ctx; + driInitExtensions( mesaCtx, NULL, GL_FALSE ); + + return GL_TRUE; } static void -driDestroyContext(__DRIcontext *ctx) +dri_destroy_context(__DRIcontext * cPriv) { GLcontext *mesaCtx; TRACE; - if (ctx) { - mesaCtx = &ctx->Base; + if (cPriv) { + mesaCtx = &cPriv->Base; + _mesa_meta_free(mesaCtx); _swsetup_DestroyContext( mesaCtx ); _swrast_DestroyContext( mesaCtx ); @@ -578,31 +541,23 @@ driDestroyContext(__DRIcontext *ctx) } } -static int -driCopyContext(__DRIcontext *dst, __DRIcontext *src, unsigned long mask) -{ - TRACE; - - _mesa_copy_context(&src->Base, &dst->Base, mask); - return GL_TRUE; -} - -static int driBindContext(__DRIcontext *ctx, - __DRIdrawable *draw, - __DRIdrawable *read) +static GLboolean +dri_make_current(__DRIcontext * cPriv, + __DRIdrawable * driDrawPriv, + __DRIdrawable * driReadPriv) { GLcontext *mesaCtx; GLframebuffer *mesaDraw; GLframebuffer *mesaRead; TRACE; - if (ctx) { - if (!draw || !read) + if (cPriv) { + if (!driDrawPriv || !driReadPriv) return GL_FALSE; - mesaCtx = &ctx->Base; - mesaDraw = &draw->Base; - mesaRead = &read->Base; + mesaCtx = &cPriv->Base; + mesaDraw = &driDrawPriv->Base; + mesaRead = &driReadPriv->Base; /* check for same context and buffer */ if (mesaCtx == _mesa_get_current_context() @@ -614,7 +569,7 @@ static int driBindContext(__DRIcontext *ctx, _glapi_check_multithread(); swrast_check_and_update_window_size(mesaCtx, mesaDraw); - if (read != draw) + if (mesaRead != mesaDraw) swrast_check_and_update_window_size(mesaCtx, mesaRead); _mesa_make_current( mesaCtx, @@ -629,35 +584,25 @@ static int driBindContext(__DRIcontext *ctx, return GL_TRUE; } -static int driUnbindContext(__DRIcontext *ctx) +static GLboolean +dri_unbind_context(__DRIcontext * cPriv) { TRACE; - (void) ctx; + (void) cPriv; return GL_TRUE; } -static const __DRIcoreExtension driCoreExtension = { - { __DRI_CORE, __DRI_CORE_VERSION }, - NULL, /* driCreateNewScreen */ - driDestroyScreen, - driGetExtensions, - driGetConfigAttrib, - driIndexConfigAttrib, - NULL, /* driCreateNewDrawable */ - driDestroyDrawable, - driSwapBuffers, - driCreateNewContext, - driCopyContext, - driDestroyContext, - driBindContext, - driUnbindContext -}; - -static const __DRIswrastExtension driSWRastExtension = { - { __DRI_SWRAST, __DRI_SWRAST_VERSION }, - driCreateNewScreen, - driCreateNewDrawable +const struct __DriverAPIRec driDriverAPI = { + .InitScreen = dri_init_screen, + .DestroyScreen = dri_destroy_screen, + .CreateContext = dri_create_context, + .DestroyContext = dri_destroy_context, + .CreateBuffer = dri_create_buffer, + .DestroyBuffer = dri_destroy_buffer, + .SwapBuffers = dri_swap_buffers, + .MakeCurrent = dri_make_current, + .UnbindContext = dri_unbind_context, }; /* This is the table of extensions that the loader will dlsym() for. */ diff --git a/src/mesa/drivers/dri/swrast/swrast_priv.h b/src/mesa/drivers/dri/swrast/swrast_priv.h index 4722007f95..c83c64b487 100644 --- a/src/mesa/drivers/dri/swrast/swrast_priv.h +++ b/src/mesa/drivers/dri/swrast/swrast_priv.h @@ -34,6 +34,7 @@ #include #include #include "main/mtypes.h" +#include "dri_sw.h" /** @@ -58,33 +59,6 @@ /** * Data types */ -struct __DRIscreenRec { - int num; - - const __DRIextension **extensions; - - const __DRIswrastLoaderExtension *swrast_loader; -}; - -struct __DRIcontextRec { - GLcontext Base; - - void *loaderPrivate; - - __DRIscreen *driScreenPriv; -}; - -struct __DRIdrawableRec { - GLframebuffer Base; - - void *loaderPrivate; - - __DRIscreen *driScreenPriv; - - /* scratch row for optimized front-buffer rendering */ - char *row; -}; - struct swrast_renderbuffer { struct gl_renderbuffer Base; -- cgit v1.2.3 From cf8a1caa231b748d3ba7c776ab076ad3de99e963 Mon Sep 17 00:00:00 2001 From: George Sapountzis Date: Sun, 14 Mar 2010 11:36:45 +0200 Subject: dri/swrast: port to dri_sw (context) --- src/mesa/drivers/dri/common/dri_sw.c | 2 +- src/mesa/drivers/dri/common/dri_sw.h | 2 +- src/mesa/drivers/dri/swrast/swrast.c | 41 ++++++++++++++++++++------- src/mesa/drivers/dri/swrast/swrast_priv.h | 27 ++++++++++++++---- src/mesa/drivers/dri/swrast/swrast_spantemp.h | 8 +++--- 5 files changed, 58 insertions(+), 22 deletions(-) (limited to 'src') diff --git a/src/mesa/drivers/dri/common/dri_sw.c b/src/mesa/drivers/dri/common/dri_sw.c index 4b87a7f32f..b7f9036f47 100644 --- a/src/mesa/drivers/dri/common/dri_sw.c +++ b/src/mesa/drivers/dri/common/dri_sw.c @@ -99,7 +99,7 @@ driCreateNewContext(__DRIscreen *psp, const __DRIconfig *config, __DRIcontext *shared, void *data) { __DRIcontext *pcp; - void * const shareCtx = (shared != NULL) ? &shared->Base : NULL; + void * const shareCtx = (shared != NULL) ? shared->driverPrivate : NULL; pcp = CALLOC_STRUCT(__DRIcontextRec); if (!pcp) diff --git a/src/mesa/drivers/dri/common/dri_sw.h b/src/mesa/drivers/dri/common/dri_sw.h index b7257b14a2..93e9624654 100644 --- a/src/mesa/drivers/dri/common/dri_sw.h +++ b/src/mesa/drivers/dri/common/dri_sw.h @@ -54,7 +54,7 @@ struct __DRIscreenRec { struct __DRIcontextRec { - GLcontext Base; + void *driverPrivate; void *loaderPrivate; diff --git a/src/mesa/drivers/dri/swrast/swrast.c b/src/mesa/drivers/dri/swrast/swrast.c index 8c858ab2da..8273439fef 100644 --- a/src/mesa/drivers/dri/swrast/swrast.c +++ b/src/mesa/drivers/dri/swrast/swrast.c @@ -474,25 +474,36 @@ static GLboolean dri_create_context(const __GLcontextModes * visual, __DRIcontext * cPriv, void *sharedContextPrivate) { - GLcontext *mesaCtx; - GLcontext *sharedCtx; + struct dri_context *ctx = NULL; + struct dri_context *share = (struct dri_context *)sharedContextPrivate; + GLcontext *mesaCtx = NULL; + GLcontext *sharedCtx = NULL; struct dd_function_table functions; TRACE; + ctx = CALLOC_STRUCT(dri_context); + if (ctx == NULL) + goto context_fail; + + cPriv->driverPrivate = ctx; + ctx->cPriv = cPriv; + /* build table of device driver functions */ _mesa_init_driver_functions(&functions); swrast_init_driver_functions(&functions); - sharedCtx = sharedContextPrivate; + if (share) { + sharedCtx = &share->Base; + } + + mesaCtx = &ctx->Base; /* basic context setup */ - if (!_mesa_initialize_context(&cPriv->Base, visual, sharedCtx, &functions, (void *) cPriv)) { - return GL_FALSE; + if (!_mesa_initialize_context(mesaCtx, visual, sharedCtx, &functions, (void *) cPriv)) { + goto context_fail; } - mesaCtx = &cPriv->Base; - /* do bounds checking to prevent segfaults and server crashes! */ mesaCtx->Const.CheckArrayBounds = GL_TRUE; @@ -521,16 +532,24 @@ dri_create_context(const __GLcontextModes * visual, driInitExtensions( mesaCtx, NULL, GL_FALSE ); return GL_TRUE; + +context_fail: + + FREE(ctx); + + return GL_FALSE; } static void dri_destroy_context(__DRIcontext * cPriv) { - GLcontext *mesaCtx; TRACE; if (cPriv) { - mesaCtx = &cPriv->Base; + struct dri_context *ctx = dri_context(cPriv); + GLcontext *mesaCtx; + + mesaCtx = &ctx->Base; _mesa_meta_free(mesaCtx); _swsetup_DestroyContext( mesaCtx ); @@ -552,10 +571,12 @@ dri_make_current(__DRIcontext * cPriv, TRACE; if (cPriv) { + struct dri_context *ctx = dri_context(cPriv); + if (!driDrawPriv || !driReadPriv) return GL_FALSE; - mesaCtx = &cPriv->Base; + mesaCtx = &ctx->Base; mesaDraw = &driDrawPriv->Base; mesaRead = &driReadPriv->Base; diff --git a/src/mesa/drivers/dri/swrast/swrast_priv.h b/src/mesa/drivers/dri/swrast/swrast_priv.h index c83c64b487..130598bbd8 100644 --- a/src/mesa/drivers/dri/swrast/swrast_priv.h +++ b/src/mesa/drivers/dri/swrast/swrast_priv.h @@ -59,6 +59,27 @@ /** * Data types */ +struct dri_context +{ + /* mesa */ + GLcontext Base; + + /* dri */ + __DRIcontext *cPriv; +}; + +static INLINE struct dri_context * +dri_context(__DRIcontext * driContextPriv) +{ + return (struct dri_context *)driContextPriv->driverPrivate; +} + +static INLINE struct dri_context * +swrast_context(GLcontext *ctx) +{ + return (struct dri_context *) ctx; +} + struct swrast_renderbuffer { struct gl_renderbuffer Base; @@ -68,12 +89,6 @@ struct swrast_renderbuffer { GLuint bpp; }; -static INLINE __DRIcontext * -swrast_context(GLcontext *ctx) -{ - return (__DRIcontext *) ctx; -} - static INLINE __DRIdrawable * swrast_drawable(GLframebuffer *fb) { diff --git a/src/mesa/drivers/dri/swrast/swrast_spantemp.h b/src/mesa/drivers/dri/swrast/swrast_spantemp.h index 879a0c12e7..c73b785683 100644 --- a/src/mesa/drivers/dri/swrast/swrast_spantemp.h +++ b/src/mesa/drivers/dri/swrast/swrast_spantemp.h @@ -39,7 +39,7 @@ static INLINE void PUT_PIXEL( GLcontext *glCtx, GLint x, GLint y, GLubyte *p ) { - __DRIcontext *ctx = swrast_context(glCtx); + __DRIcontext *ctx = swrast_context(glCtx)->cPriv; __DRIdrawable *draw = swrast_drawable(glCtx->DrawBuffer); __DRIscreen *screen = ctx->driScreenPriv; @@ -53,7 +53,7 @@ PUT_PIXEL( GLcontext *glCtx, GLint x, GLint y, GLubyte *p ) static INLINE void GET_PIXEL( GLcontext *glCtx, GLint x, GLint y, GLubyte *p ) { - __DRIcontext *ctx = swrast_context(glCtx); + __DRIcontext *ctx = swrast_context(glCtx)->cPriv; __DRIdrawable *read = swrast_drawable(glCtx->ReadBuffer); __DRIscreen *screen = ctx->driScreenPriv; @@ -65,7 +65,7 @@ GET_PIXEL( GLcontext *glCtx, GLint x, GLint y, GLubyte *p ) static INLINE void PUT_ROW( GLcontext *glCtx, GLint x, GLint y, GLuint n, char *row ) { - __DRIcontext *ctx = swrast_context(glCtx); + __DRIcontext *ctx = swrast_context(glCtx)->cPriv; __DRIdrawable *draw = swrast_drawable(glCtx->DrawBuffer); __DRIscreen *screen = ctx->driScreenPriv; @@ -78,7 +78,7 @@ PUT_ROW( GLcontext *glCtx, GLint x, GLint y, GLuint n, char *row ) static INLINE void GET_ROW( GLcontext *glCtx, GLint x, GLint y, GLuint n, char *row ) { - __DRIcontext *ctx = swrast_context(glCtx); + __DRIcontext *ctx = swrast_context(glCtx)->cPriv; __DRIdrawable *read = swrast_drawable(glCtx->ReadBuffer); __DRIscreen *screen = ctx->driScreenPriv; -- cgit v1.2.3 From c1bde793598bcb5d5f8744c290a66ea6586eb29f Mon Sep 17 00:00:00 2001 From: George Sapountzis Date: Sun, 14 Mar 2010 11:36:46 +0200 Subject: dri/swrast: port to dri_sw (drawable) --- src/mesa/drivers/dri/common/dri_sw.h | 5 +--- src/mesa/drivers/dri/swrast/swrast.c | 39 +++++++++++++++++++++------ src/mesa/drivers/dri/swrast/swrast_priv.h | 30 ++++++++++++++++----- src/mesa/drivers/dri/swrast/swrast_spantemp.h | 8 +++--- 4 files changed, 60 insertions(+), 22 deletions(-) (limited to 'src') diff --git a/src/mesa/drivers/dri/common/dri_sw.h b/src/mesa/drivers/dri/common/dri_sw.h index 93e9624654..89369a9d00 100644 --- a/src/mesa/drivers/dri/common/dri_sw.h +++ b/src/mesa/drivers/dri/common/dri_sw.h @@ -67,16 +67,13 @@ struct __DRIcontextRec { struct __DRIdrawableRec { - GLframebuffer Base; + void *driverPrivate; void *loaderPrivate; __DRIscreen *driScreenPriv; int refcount; - - /* scratch row for optimized front-buffer rendering */ - char *row; }; diff --git a/src/mesa/drivers/dri/swrast/swrast.c b/src/mesa/drivers/dri/swrast/swrast.c index 8273439fef..4450e470c6 100644 --- a/src/mesa/drivers/dri/swrast/swrast.c +++ b/src/mesa/drivers/dri/swrast/swrast.c @@ -308,14 +308,24 @@ dri_create_buffer(__DRIscreen * sPriv, __DRIdrawable * dPriv, const __GLcontextModes * visual, GLboolean isPixmap) { + struct dri_drawable *drawable = NULL; GLframebuffer *fb; struct swrast_renderbuffer *frontrb, *backrb; TRACE; - fb = &dPriv->Base; + drawable = CALLOC_STRUCT(dri_drawable); + if (drawable == NULL) + goto drawable_fail; - dPriv->row = malloc(MAX_WIDTH * 4); + dPriv->driverPrivate = drawable; + drawable->dPriv = dPriv; + + drawable->row = malloc(MAX_WIDTH * 4); + if (drawable->row == NULL) + goto drawable_fail; + + fb = &drawable->Base; /* basic framebuffer setup */ _mesa_initialize_window_framebuffer(fb, visual); @@ -340,6 +350,15 @@ dri_create_buffer(__DRIscreen * sPriv, GL_FALSE /* aux bufs */); return GL_TRUE; + +drawable_fail: + + if (drawable) + free(drawable->row); + + FREE(drawable); + + return GL_FALSE; } static void @@ -348,11 +367,12 @@ dri_destroy_buffer(__DRIdrawable * dPriv) TRACE; if (dPriv) { + struct dri_drawable *drawable = dri_drawable(dPriv); GLframebuffer *fb; - free(dPriv->row); + free(drawable->row); - fb = &dPriv->Base; + fb = &drawable->Base; fb->DeletePending = GL_TRUE; _mesa_reference_framebuffer(&fb, NULL); @@ -366,12 +386,13 @@ dri_swap_buffers(__DRIdrawable * dPriv) GET_CURRENT_CONTEXT(ctx); + struct dri_drawable *drawable = dri_drawable(dPriv); GLframebuffer *fb; struct swrast_renderbuffer *frontrb, *backrb; TRACE; - fb = &dPriv->Base; + fb = &drawable->Base; frontrb = swrast_renderbuffer(fb->Attachment[BUFFER_FRONT_LEFT].Renderbuffer); backrb = swrast_renderbuffer(fb->Attachment[BUFFER_BACK_LEFT].Renderbuffer); @@ -402,7 +423,7 @@ dri_swap_buffers(__DRIdrawable * dPriv) static void get_window_size( GLframebuffer *fb, GLsizei *w, GLsizei *h ) { - __DRIdrawable *dPriv = swrast_drawable(fb); + __DRIdrawable *dPriv = swrast_drawable(fb)->dPriv; __DRIscreen *sPriv = dPriv->driScreenPriv; int x, y; @@ -572,13 +593,15 @@ dri_make_current(__DRIcontext * cPriv, if (cPriv) { struct dri_context *ctx = dri_context(cPriv); + struct dri_drawable *draw = dri_drawable(driDrawPriv); + struct dri_drawable *read = dri_drawable(driReadPriv); if (!driDrawPriv || !driReadPriv) return GL_FALSE; mesaCtx = &ctx->Base; - mesaDraw = &driDrawPriv->Base; - mesaRead = &driReadPriv->Base; + mesaDraw = &draw->Base; + mesaRead = &read->Base; /* check for same context and buffer */ if (mesaCtx == _mesa_get_current_context() diff --git a/src/mesa/drivers/dri/swrast/swrast_priv.h b/src/mesa/drivers/dri/swrast/swrast_priv.h index 130598bbd8..8e87f644c3 100644 --- a/src/mesa/drivers/dri/swrast/swrast_priv.h +++ b/src/mesa/drivers/dri/swrast/swrast_priv.h @@ -80,6 +80,30 @@ swrast_context(GLcontext *ctx) return (struct dri_context *) ctx; } +struct dri_drawable +{ + /* mesa */ + GLframebuffer Base; + + /* dri */ + __DRIdrawable *dPriv; + + /* scratch row for optimized front-buffer rendering */ + char *row; +}; + +static INLINE struct dri_drawable * +dri_drawable(__DRIdrawable * driDrawPriv) +{ + return (struct dri_drawable *)driDrawPriv->driverPrivate; +} + +static INLINE struct dri_drawable * +swrast_drawable(GLframebuffer *fb) +{ + return (struct dri_drawable *) fb; +} + struct swrast_renderbuffer { struct gl_renderbuffer Base; @@ -89,12 +113,6 @@ struct swrast_renderbuffer { GLuint bpp; }; -static INLINE __DRIdrawable * -swrast_drawable(GLframebuffer *fb) -{ - return (__DRIdrawable *) fb; -} - static INLINE struct swrast_renderbuffer * swrast_renderbuffer(struct gl_renderbuffer *rb) { diff --git a/src/mesa/drivers/dri/swrast/swrast_spantemp.h b/src/mesa/drivers/dri/swrast/swrast_spantemp.h index c73b785683..079726ae4a 100644 --- a/src/mesa/drivers/dri/swrast/swrast_spantemp.h +++ b/src/mesa/drivers/dri/swrast/swrast_spantemp.h @@ -40,7 +40,7 @@ static INLINE void PUT_PIXEL( GLcontext *glCtx, GLint x, GLint y, GLubyte *p ) { __DRIcontext *ctx = swrast_context(glCtx)->cPriv; - __DRIdrawable *draw = swrast_drawable(glCtx->DrawBuffer); + __DRIdrawable *draw = swrast_drawable(glCtx->DrawBuffer)->dPriv; __DRIscreen *screen = ctx->driScreenPriv; @@ -54,7 +54,7 @@ static INLINE void GET_PIXEL( GLcontext *glCtx, GLint x, GLint y, GLubyte *p ) { __DRIcontext *ctx = swrast_context(glCtx)->cPriv; - __DRIdrawable *read = swrast_drawable(glCtx->ReadBuffer); + __DRIdrawable *read = swrast_drawable(glCtx->ReadBuffer)->dPriv; __DRIscreen *screen = ctx->driScreenPriv; @@ -66,7 +66,7 @@ static INLINE void PUT_ROW( GLcontext *glCtx, GLint x, GLint y, GLuint n, char *row ) { __DRIcontext *ctx = swrast_context(glCtx)->cPriv; - __DRIdrawable *draw = swrast_drawable(glCtx->DrawBuffer); + __DRIdrawable *draw = swrast_drawable(glCtx->DrawBuffer)->dPriv; __DRIscreen *screen = ctx->driScreenPriv; @@ -79,7 +79,7 @@ static INLINE void GET_ROW( GLcontext *glCtx, GLint x, GLint y, GLuint n, char *row ) { __DRIcontext *ctx = swrast_context(glCtx)->cPriv; - __DRIdrawable *read = swrast_drawable(glCtx->ReadBuffer); + __DRIdrawable *read = swrast_drawable(glCtx->ReadBuffer)->dPriv; __DRIscreen *screen = ctx->driScreenPriv; -- cgit v1.2.3 From e60693efda7826bf26ffb9993c6dfba3b8c8a812 Mon Sep 17 00:00:00 2001 From: George Sapountzis Date: Sun, 14 Mar 2010 11:36:46 +0200 Subject: dri/swrast: update copyright email --- src/mesa/drivers/dri/swrast/swrast.c | 2 +- src/mesa/drivers/dri/swrast/swrast_priv.h | 6 +----- src/mesa/drivers/dri/swrast/swrast_span.c | 6 +----- 3 files changed, 3 insertions(+), 11 deletions(-) (limited to 'src') diff --git a/src/mesa/drivers/dri/swrast/swrast.c b/src/mesa/drivers/dri/swrast/swrast.c index 4450e470c6..e9ca99a86f 100644 --- a/src/mesa/drivers/dri/swrast/swrast.c +++ b/src/mesa/drivers/dri/swrast/swrast.c @@ -1,5 +1,5 @@ /* - * Copyright (C) 2008 George Sapountzis + * Copyright 2008, 2010 George Sapountzis * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), diff --git a/src/mesa/drivers/dri/swrast/swrast_priv.h b/src/mesa/drivers/dri/swrast/swrast_priv.h index 8e87f644c3..57bd439425 100644 --- a/src/mesa/drivers/dri/swrast/swrast_priv.h +++ b/src/mesa/drivers/dri/swrast/swrast_priv.h @@ -3,6 +3,7 @@ * Version: 7.1 * * Copyright (C) 1999-2008 Brian Paul All Rights Reserved. + * Copyright 2008, 2010 George Sapountzis * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -22,11 +23,6 @@ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. */ -/* - * Authors: - * George Sapountzis - */ - #ifndef _SWRAST_PRIV_H #define _SWRAST_PRIV_H diff --git a/src/mesa/drivers/dri/swrast/swrast_span.c b/src/mesa/drivers/dri/swrast/swrast_span.c index 5290dc82b9..c5681e34a9 100644 --- a/src/mesa/drivers/dri/swrast/swrast_span.c +++ b/src/mesa/drivers/dri/swrast/swrast_span.c @@ -3,6 +3,7 @@ * Version: 7.1 * * Copyright (C) 1999-2008 Brian Paul All Rights Reserved. + * Copyright 2008, 2010 George Sapountzis * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -22,11 +23,6 @@ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. */ -/* - * Authors: - * George Sapountzis - */ - #include "swrast_priv.h" #define YFLIP(_xrb, Y) ((_xrb)->Base.Height - (Y) - 1) -- cgit v1.2.3 From e557c2e14f1481abff75af912feb5dce79a65ab8 Mon Sep 17 00:00:00 2001 From: George Sapountzis Date: Sun, 14 Mar 2010 11:36:46 +0200 Subject: dri/swrast: drop mtypes.h from dri_sw --- src/mesa/drivers/dri/common/dri_sw.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'src') diff --git a/src/mesa/drivers/dri/common/dri_sw.h b/src/mesa/drivers/dri/common/dri_sw.h index 89369a9d00..e353e26b34 100644 --- a/src/mesa/drivers/dri/common/dri_sw.h +++ b/src/mesa/drivers/dri/common/dri_sw.h @@ -26,8 +26,8 @@ #define _DRI_SW_H #include +#include #include -#include "main/mtypes.h" /** -- cgit v1.2.3 From 7a62c60ca960b3a5b27b598a0c2036f38933c8fb Mon Sep 17 00:00:00 2001 From: George Sapountzis Date: Sun, 14 Mar 2010 11:36:46 +0200 Subject: dri/swrast: add comment in case it's not clear --- src/mesa/drivers/dri/swrast/swrast_priv.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'src') diff --git a/src/mesa/drivers/dri/swrast/swrast_priv.h b/src/mesa/drivers/dri/swrast/swrast_priv.h index 57bd439425..77670d89a5 100644 --- a/src/mesa/drivers/dri/swrast/swrast_priv.h +++ b/src/mesa/drivers/dri/swrast/swrast_priv.h @@ -57,7 +57,7 @@ */ struct dri_context { - /* mesa */ + /* mesa, base class, must be first */ GLcontext Base; /* dri */ @@ -78,7 +78,7 @@ swrast_context(GLcontext *ctx) struct dri_drawable { - /* mesa */ + /* mesa, base class, must be first */ GLframebuffer Base; /* dri */ -- cgit v1.2.3 From 631a1a9ac8b97dec172205e13e33ef51f28bb1c0 Mon Sep 17 00:00:00 2001 From: George Sapountzis Date: Sun, 14 Mar 2010 11:36:47 +0200 Subject: dri/common: mv __driUtilMessage to utils.c allows to link with xmlconfig without dri_util, and has nothing drm-specific. --- src/mesa/drivers/dri/common/dri_util.c | 22 ---------------------- src/mesa/drivers/dri/common/dri_util.h | 4 ---- src/mesa/drivers/dri/common/utils.c | 28 ++++++++++++++++++++++++---- src/mesa/drivers/dri/common/utils.h | 3 +++ src/mesa/drivers/dri/common/xmlconfig.c | 2 +- src/mesa/drivers/dri/mach64/mach64_context.c | 1 + 6 files changed, 29 insertions(+), 31 deletions(-) (limited to 'src') diff --git a/src/mesa/drivers/dri/common/dri_util.c b/src/mesa/drivers/dri/common/dri_util.c index 75c98825b7..badbb5ff82 100644 --- a/src/mesa/drivers/dri/common/dri_util.c +++ b/src/mesa/drivers/dri/common/dri_util.c @@ -47,28 +47,6 @@ const __DRIextension driReadDrawableExtension = { __DRI_READ_DRAWABLE, __DRI_READ_DRAWABLE_VERSION }; -/** - * Print message to \c stderr if the \c LIBGL_DEBUG environment variable - * is set. - * - * Is called from the drivers. - * - * \param f \c printf like format string. - */ -void -__driUtilMessage(const char *f, ...) -{ - va_list args; - - if (getenv("LIBGL_DEBUG")) { - fprintf(stderr, "libGL: "); - va_start(args, f); - vfprintf(stderr, f, args); - va_end(args); - fprintf(stderr, "\n"); - } -} - GLint driIntersectArea( drm_clip_rect_t rect1, drm_clip_rect_t rect2 ) { diff --git a/src/mesa/drivers/dri/common/dri_util.h b/src/mesa/drivers/dri/common/dri_util.h index 99c0f1e442..f63583cebc 100644 --- a/src/mesa/drivers/dri/common/dri_util.h +++ b/src/mesa/drivers/dri/common/dri_util.h @@ -551,10 +551,6 @@ struct __DRIscreenRec { drmLock *lock; }; -extern void -__driUtilMessage(const char *f, ...); - - extern void __driUtilUpdateDrawableInfo(__DRIdrawable *pdp); diff --git a/src/mesa/drivers/dri/common/utils.c b/src/mesa/drivers/dri/common/utils.c index b85b364c57..0dd879abc9 100644 --- a/src/mesa/drivers/dri/common/utils.c +++ b/src/mesa/drivers/dri/common/utils.c @@ -37,6 +37,29 @@ #include "utils.h" +/** + * Print message to \c stderr if the \c LIBGL_DEBUG environment variable + * is set. + * + * Is called from the drivers. + * + * \param f \c printf like format string. + */ +void +__driUtilMessage(const char *f, ...) +{ + va_list args; + + if (getenv("LIBGL_DEBUG")) { + fprintf(stderr, "libGL: "); + va_start(args, f); + vfprintf(stderr, f, args); + va_end(args); + fprintf(stderr, "\n"); + } +} + + unsigned driParseDebugString( const char * debug, const struct dri_debug_control * control ) @@ -230,9 +253,6 @@ void driInitSingleExtension( GLcontext * ctx, /** * Utility function used by drivers to test the verions of other components. * - * If one of the version requirements is not met, a message is logged using - * \c __driUtilMessage. - * * \param driver_name Name of the driver. Used in error messages. * \param driActual Actual DRI version supplied __driCreateNewScreen. * \param driExpected Minimum DRI version required by the driver. @@ -244,7 +264,7 @@ void driInitSingleExtension( GLcontext * ctx, * \returns \c GL_TRUE if all version requirements are met. Otherwise, * \c GL_FALSE is returned. * - * \sa __driCreateNewScreen, driCheckDriDdxDrmVersions2, __driUtilMessage + * \sa __driCreateNewScreen, driCheckDriDdxDrmVersions2 * * \todo * Now that the old \c driCheckDriDdxDrmVersions function is gone, this diff --git a/src/mesa/drivers/dri/common/utils.h b/src/mesa/drivers/dri/common/utils.h index 02ca3feb73..de6070c398 100644 --- a/src/mesa/drivers/dri/common/utils.h +++ b/src/mesa/drivers/dri/common/utils.h @@ -69,6 +69,9 @@ struct __DRIutilversionRec2 { int patch; /**< Patch-level. */ }; +extern void +__driUtilMessage(const char *f, ...); + extern unsigned driParseDebugString( const char * debug, const struct dri_debug_control * control ); diff --git a/src/mesa/drivers/dri/common/xmlconfig.c b/src/mesa/drivers/dri/common/xmlconfig.c index 477259ea7e..de4500a39b 100644 --- a/src/mesa/drivers/dri/common/xmlconfig.c +++ b/src/mesa/drivers/dri/common/xmlconfig.c @@ -36,7 +36,7 @@ #include #include #include "main/imports.h" -#include "dri_util.h" +#include "utils.h" #include "xmlconfig.h" #undef GET_PROGRAM_NAME diff --git a/src/mesa/drivers/dri/mach64/mach64_context.c b/src/mesa/drivers/dri/mach64/mach64_context.c index 77e7e53ce0..73b1e08d4b 100644 --- a/src/mesa/drivers/dri/mach64/mach64_context.c +++ b/src/mesa/drivers/dri/mach64/mach64_context.c @@ -31,6 +31,7 @@ #include "main/glheader.h" #include "main/context.h" +#include "main/extensions.h" #include "main/simple_list.h" #include "main/imports.h" -- cgit v1.2.3 From 883aa5974bcf31f19294cb40b0c4df43bb550820 Mon Sep 17 00:00:00 2001 From: Vinson Lee Date: Sun, 14 Mar 2010 16:43:01 -0700 Subject: r300g: Remove unnecessary headers. --- src/gallium/drivers/r300/r300_screen.c | 1 - src/gallium/drivers/r300/r300_vs.c | 2 -- 2 files changed, 3 deletions(-) (limited to 'src') diff --git a/src/gallium/drivers/r300/r300_screen.c b/src/gallium/drivers/r300/r300_screen.c index 64d1909a38..b6282fccd7 100644 --- a/src/gallium/drivers/r300/r300_screen.c +++ b/src/gallium/drivers/r300/r300_screen.c @@ -29,7 +29,6 @@ #include "r300_texture.h" #include "radeon_winsys.h" -#include "r300_winsys.h" /* Return the identifier behind whom the brave coders responsible for this * amalgamation of code, sweat, and duct tape, routinely obscure their names. diff --git a/src/gallium/drivers/r300/r300_vs.c b/src/gallium/drivers/r300/r300_vs.c index 379939ac75..bd6b95dccb 100644 --- a/src/gallium/drivers/r300/r300_vs.c +++ b/src/gallium/drivers/r300/r300_vs.c @@ -34,8 +34,6 @@ #include "radeon_compiler.h" -#include "util/u_math.h" - /* Convert info about VS output semantics into r300_shader_semantics. */ static void r300_shader_read_vs_outputs( struct tgsi_shader_info* info, -- cgit v1.2.3 From 5f71414fc941f0d390c03633f1a53534807cfca6 Mon Sep 17 00:00:00 2001 From: Luca Barbieri Date: Sat, 20 Feb 2010 17:43:31 +0100 Subject: nv40: use NV34TCL_ constants where available It was decided to just use the NV34TCL_ constants for constants common between nv30 and nv40, and deprecate the NV40TCL_ versions. This patch changes the nv40 driver to use NV34TCL_ constants for common functionality. This reduces differences between nv30 and nv40 to ease further unification. --- src/gallium/drivers/nv40/nv40_draw.c | 40 ++++---- src/gallium/drivers/nv40/nv40_fragprog.c | 8 +- src/gallium/drivers/nv40/nv40_fragtex.c | 30 +++--- src/gallium/drivers/nv40/nv40_query.c | 10 +- src/gallium/drivers/nv40/nv40_screen.c | 14 +-- src/gallium/drivers/nv40/nv40_state.c | 122 ++++++++++++------------- src/gallium/drivers/nv40/nv40_state_blend.c | 2 +- src/gallium/drivers/nv40/nv40_state_fb.c | 36 ++++---- src/gallium/drivers/nv40/nv40_state_scissor.c | 2 +- src/gallium/drivers/nv40/nv40_state_stipple.c | 6 +- src/gallium/drivers/nv40/nv40_state_viewport.c | 2 +- src/gallium/drivers/nv40/nv40_state_zsa.c | 4 +- src/gallium/drivers/nv40/nv40_vbo.c | 74 +++++++-------- src/gallium/drivers/nv40/nv40_vertprog.c | 22 ++--- 14 files changed, 186 insertions(+), 186 deletions(-) (limited to 'src') diff --git a/src/gallium/drivers/nv40/nv40_draw.c b/src/gallium/drivers/nv40/nv40_draw.c index 48bd84d16c..849f24fe40 100644 --- a/src/gallium/drivers/nv40/nv40_draw.c +++ b/src/gallium/drivers/nv40/nv40_draw.c @@ -44,29 +44,29 @@ nv40_render_vertex(struct nv40_context *nv40, const struct vertex_header *v) case EMIT_OMIT: break; case EMIT_1F: - BEGIN_RING(chan, curie, NV40TCL_VTX_ATTR_1F(hw), 1); + BEGIN_RING(chan, curie, NV34TCL_VTX_ATTR_1F(hw), 1); OUT_RING (chan, fui(v->data[idx][0])); break; case EMIT_2F: - BEGIN_RING(chan, curie, NV40TCL_VTX_ATTR_2F_X(hw), 2); + BEGIN_RING(chan, curie, NV34TCL_VTX_ATTR_2F_X(hw), 2); OUT_RING (chan, fui(v->data[idx][0])); OUT_RING (chan, fui(v->data[idx][1])); break; case EMIT_3F: - BEGIN_RING(chan, curie, NV40TCL_VTX_ATTR_3F_X(hw), 3); + BEGIN_RING(chan, curie, NV34TCL_VTX_ATTR_3F_X(hw), 3); OUT_RING (chan, fui(v->data[idx][0])); OUT_RING (chan, fui(v->data[idx][1])); OUT_RING (chan, fui(v->data[idx][2])); break; case EMIT_4F: - BEGIN_RING(chan, curie, NV40TCL_VTX_ATTR_4F_X(hw), 4); + BEGIN_RING(chan, curie, NV34TCL_VTX_ATTR_4F_X(hw), 4); OUT_RING (chan, fui(v->data[idx][0])); OUT_RING (chan, fui(v->data[idx][1])); OUT_RING (chan, fui(v->data[idx][2])); OUT_RING (chan, fui(v->data[idx][3])); break; case EMIT_4UB: - BEGIN_RING(chan, curie, NV40TCL_VTX_ATTR_4UB(hw), 1); + BEGIN_RING(chan, curie, NV34TCL_VTX_ATTR_4UB(hw), 1); OUT_RING (chan, pack_ub4(float_to_ubyte(v->data[idx][0]), float_to_ubyte(v->data[idx][1]), float_to_ubyte(v->data[idx][2]), @@ -93,7 +93,7 @@ nv40_render_prim(struct draw_stage *stage, struct prim_header *prim, /* Ensure there's room for 4xfloat32 + potentially 3 begin/end */ if (AVAIL_RING(chan) < ((count * 20) + 6)) { - if (rs->prim != NV40TCL_BEGIN_END_STOP) { + if (rs->prim != NV34TCL_VERTEX_BEGIN_END_STOP) { NOUVEAU_ERR("AIII, missed flush\n"); assert(0); } @@ -103,12 +103,12 @@ nv40_render_prim(struct draw_stage *stage, struct prim_header *prim, /* Switch primitive modes if necessary */ if (rs->prim != mode) { - if (rs->prim != NV40TCL_BEGIN_END_STOP) { - BEGIN_RING(chan, curie, NV40TCL_BEGIN_END, 1); - OUT_RING (chan, NV40TCL_BEGIN_END_STOP); + if (rs->prim != NV34TCL_VERTEX_BEGIN_END_STOP) { + BEGIN_RING(chan, curie, NV34TCL_VERTEX_BEGIN_END, 1); + OUT_RING (chan, NV34TCL_VERTEX_BEGIN_END_STOP); } - BEGIN_RING(chan, curie, NV40TCL_BEGIN_END, 1); + BEGIN_RING(chan, curie, NV34TCL_VERTEX_BEGIN_END, 1); OUT_RING (chan, mode); rs->prim = mode; } @@ -121,28 +121,28 @@ nv40_render_prim(struct draw_stage *stage, struct prim_header *prim, * off the primitive now. */ if (AVAIL_RING(chan) < ((count * 20) + 6)) { - BEGIN_RING(chan, curie, NV40TCL_BEGIN_END, 1); - OUT_RING (chan, NV40TCL_BEGIN_END_STOP); - rs->prim = NV40TCL_BEGIN_END_STOP; + BEGIN_RING(chan, curie, NV34TCL_VERTEX_BEGIN_END, 1); + OUT_RING (chan, NV34TCL_VERTEX_BEGIN_END_STOP); + rs->prim = NV34TCL_VERTEX_BEGIN_END_STOP; } } static void nv40_render_point(struct draw_stage *draw, struct prim_header *prim) { - nv40_render_prim(draw, prim, NV40TCL_BEGIN_END_POINTS, 1); + nv40_render_prim(draw, prim, NV34TCL_VERTEX_BEGIN_END_POINTS, 1); } static void nv40_render_line(struct draw_stage *draw, struct prim_header *prim) { - nv40_render_prim(draw, prim, NV40TCL_BEGIN_END_LINES, 2); + nv40_render_prim(draw, prim, NV34TCL_VERTEX_BEGIN_END_LINES, 2); } static void nv40_render_tri(struct draw_stage *draw, struct prim_header *prim) { - nv40_render_prim(draw, prim, NV40TCL_BEGIN_END_TRIANGLES, 3); + nv40_render_prim(draw, prim, NV34TCL_VERTEX_BEGIN_END_TRIANGLES, 3); } static void @@ -154,10 +154,10 @@ nv40_render_flush(struct draw_stage *draw, unsigned flags) struct nouveau_channel *chan = screen->base.channel; struct nouveau_grobj *curie = screen->curie; - if (rs->prim != NV40TCL_BEGIN_END_STOP) { - BEGIN_RING(chan, curie, NV40TCL_BEGIN_END, 1); - OUT_RING (chan, NV40TCL_BEGIN_END_STOP); - rs->prim = NV40TCL_BEGIN_END_STOP; + if (rs->prim != NV34TCL_VERTEX_BEGIN_END_STOP) { + BEGIN_RING(chan, curie, NV34TCL_VERTEX_BEGIN_END, 1); + OUT_RING (chan, NV34TCL_VERTEX_BEGIN_END_STOP); + rs->prim = NV34TCL_VERTEX_BEGIN_END_STOP; } } diff --git a/src/gallium/drivers/nv40/nv40_fragprog.c b/src/gallium/drivers/nv40/nv40_fragprog.c index dc24f9b08a..d881fea6f5 100644 --- a/src/gallium/drivers/nv40/nv40_fragprog.c +++ b/src/gallium/drivers/nv40/nv40_fragprog.c @@ -920,12 +920,12 @@ nv40_fragprog_validate(struct nv40_context *nv40) nv40_fragprog_upload(nv40, fp); so = so_new(2, 2, 1); - so_method(so, nv40->screen->curie, NV40TCL_FP_ADDRESS, 1); + so_method(so, nv40->screen->curie, NV34TCL_FP_ACTIVE_PROGRAM, 1); so_reloc (so, nouveau_bo(fp->buffer), 0, NOUVEAU_BO_VRAM | NOUVEAU_BO_GART | NOUVEAU_BO_RD | NOUVEAU_BO_LOW | - NOUVEAU_BO_OR, NV40TCL_FP_ADDRESS_DMA0, - NV40TCL_FP_ADDRESS_DMA1); - so_method(so, nv40->screen->curie, NV40TCL_FP_CONTROL, 1); + NOUVEAU_BO_OR, NV34TCL_FP_ACTIVE_PROGRAM_DMA0, + NV34TCL_FP_ACTIVE_PROGRAM_DMA1); + so_method(so, nv40->screen->curie, NV34TCL_FP_CONTROL, 1); so_data (so, fp->fp_control); so_ref(so, &fp->so); so_ref(NULL, &so); diff --git a/src/gallium/drivers/nv40/nv40_fragtex.c b/src/gallium/drivers/nv40/nv40_fragtex.c index b60118922a..44bf4333bd 100644 --- a/src/gallium/drivers/nv40/nv40_fragtex.c +++ b/src/gallium/drivers/nv40/nv40_fragtex.c @@ -7,12 +7,12 @@ TRUE, \ PIPE_FORMAT_##m, \ NV40TCL_TEX_FORMAT_FORMAT_##tf, \ - (NV40TCL_TEX_SWIZZLE_S0_X_##ts0x | NV40TCL_TEX_SWIZZLE_S0_Y_##ts0y | \ - NV40TCL_TEX_SWIZZLE_S0_Z_##ts0z | NV40TCL_TEX_SWIZZLE_S0_W_##ts0w | \ - NV40TCL_TEX_SWIZZLE_S1_X_##ts1x | NV40TCL_TEX_SWIZZLE_S1_Y_##ts1y | \ - NV40TCL_TEX_SWIZZLE_S1_Z_##ts1z | NV40TCL_TEX_SWIZZLE_S1_W_##ts1w), \ - ((NV40TCL_TEX_FILTER_SIGNED_RED*sx) | (NV40TCL_TEX_FILTER_SIGNED_GREEN*sy) | \ - (NV40TCL_TEX_FILTER_SIGNED_BLUE*sz) | (NV40TCL_TEX_FILTER_SIGNED_ALPHA*sw)) \ + (NV34TCL_TX_SWIZZLE_S0_X_##ts0x | NV34TCL_TX_SWIZZLE_S0_Y_##ts0y | \ + NV34TCL_TX_SWIZZLE_S0_Z_##ts0z | NV34TCL_TX_SWIZZLE_S0_W_##ts0w | \ + NV34TCL_TX_SWIZZLE_S1_X_##ts1x | NV34TCL_TX_SWIZZLE_S1_Y_##ts1y | \ + NV34TCL_TX_SWIZZLE_S1_Z_##ts1z | NV34TCL_TX_SWIZZLE_S1_W_##ts1w), \ + ((NV34TCL_TX_FILTER_SIGNED_RED*sx) | (NV34TCL_TX_FILTER_SIGNED_GREEN*sy) | \ + (NV34TCL_TX_FILTER_SIGNED_BLUE*sz) | (NV34TCL_TX_FILTER_SIGNED_ALPHA*sw)) \ } struct nv40_texture_format { @@ -81,20 +81,20 @@ nv40_fragtex_build(struct nv40_context *nv40, int unit) txf |= ((pt->last_level + 1) << NV40TCL_TEX_FORMAT_MIPMAP_COUNT_SHIFT); if (1) /* XXX */ - txf |= NV40TCL_TEX_FORMAT_NO_BORDER; + txf |= NV34TCL_TX_FORMAT_NO_BORDER; switch (pt->target) { case PIPE_TEXTURE_CUBE: - txf |= NV40TCL_TEX_FORMAT_CUBIC; + txf |= NV34TCL_TX_FORMAT_CUBIC; /* fall-through */ case PIPE_TEXTURE_2D: - txf |= NV40TCL_TEX_FORMAT_DIMS_2D; + txf |= NV34TCL_TX_FORMAT_DIMS_2D; break; case PIPE_TEXTURE_3D: - txf |= NV40TCL_TEX_FORMAT_DIMS_3D; + txf |= NV34TCL_TX_FORMAT_DIMS_3D; break; case PIPE_TEXTURE_1D: - txf |= NV40TCL_TEX_FORMAT_DIMS_1D; + txf |= NV34TCL_TX_FORMAT_DIMS_1D; break; default: NOUVEAU_ERR("Unknown target %d\n", pt->target); @@ -111,15 +111,15 @@ nv40_fragtex_build(struct nv40_context *nv40, int unit) txs = tf->swizzle; so = so_new(2, 9, 2); - so_method(so, nv40->screen->curie, NV40TCL_TEX_OFFSET(unit), 8); + so_method(so, nv40->screen->curie, NV34TCL_TX_OFFSET(unit), 8); so_reloc (so, bo, 0, tex_flags | NOUVEAU_BO_LOW, 0, 0); so_reloc (so, bo, txf, tex_flags | NOUVEAU_BO_OR, - NV40TCL_TEX_FORMAT_DMA0, NV40TCL_TEX_FORMAT_DMA1); + NV34TCL_TX_FORMAT_DMA0, NV34TCL_TX_FORMAT_DMA1); so_data (so, ps->wrap); so_data (so, NV40TCL_TEX_ENABLE_ENABLE | ps->en); so_data (so, txs); so_data (so, ps->filt | tf->sign | 0x2000 /*voodoo*/); - so_data (so, (pt->width0 << NV40TCL_TEX_SIZE0_W_SHIFT) | + so_data (so, (pt->width0 << NV34TCL_TX_NPOT_SIZE_W_SHIFT) | pt->height0); so_data (so, ps->bcol); so_method(so, nv40->screen->curie, NV40TCL_TEX_SIZE1(unit), 1); @@ -142,7 +142,7 @@ nv40_fragtex_validate(struct nv40_context *nv40) samplers &= ~(1 << unit); so = so_new(1, 1, 0); - so_method(so, nv40->screen->curie, NV40TCL_TEX_ENABLE(unit), 1); + so_method(so, nv40->screen->curie, NV34TCL_TX_ENABLE(unit), 1); so_data (so, 0); so_ref(so, &nv40->state.hw[NV40_STATE_FRAGTEX0 + unit]); state->dirty |= (1ULL << (NV40_STATE_FRAGTEX0 + unit)); diff --git a/src/gallium/drivers/nv40/nv40_query.c b/src/gallium/drivers/nv40/nv40_query.c index 8ed4a67dd0..45c5468537 100644 --- a/src/gallium/drivers/nv40/nv40_query.c +++ b/src/gallium/drivers/nv40/nv40_query.c @@ -60,9 +60,9 @@ nv40_query_begin(struct pipe_context *pipe, struct pipe_query *pq) assert(0); nouveau_notifier_reset(nv40->screen->query, q->object->start); - BEGIN_RING(chan, curie, NV40TCL_QUERY_RESET, 1); + BEGIN_RING(chan, curie, NV34TCL_QUERY_RESET, 1); OUT_RING (chan, 1); - BEGIN_RING(chan, curie, NV40TCL_QUERY_UNK17CC, 1); + BEGIN_RING(chan, curie, NV34TCL_QUERY_UNK17CC, 1); OUT_RING (chan, 1); q->ready = FALSE; @@ -77,9 +77,9 @@ nv40_query_end(struct pipe_context *pipe, struct pipe_query *pq) struct nouveau_channel *chan = screen->base.channel; struct nouveau_grobj *curie = screen->curie; - BEGIN_RING(chan, curie, NV40TCL_QUERY_GET, 1); - OUT_RING (chan, (0x01 << NV40TCL_QUERY_GET_UNK24_SHIFT) | - ((q->object->start * 32) << NV40TCL_QUERY_GET_OFFSET_SHIFT)); + BEGIN_RING(chan, curie, NV34TCL_QUERY_GET, 1); + OUT_RING (chan, (0x01 << NV34TCL_QUERY_GET_UNK24_SHIFT) | + ((q->object->start * 32) << NV34TCL_QUERY_GET_OFFSET_SHIFT)); FIRE_RING(chan); } diff --git a/src/gallium/drivers/nv40/nv40_screen.c b/src/gallium/drivers/nv40/nv40_screen.c index dbcc33d8d9..9c49e2b6ec 100644 --- a/src/gallium/drivers/nv40/nv40_screen.c +++ b/src/gallium/drivers/nv40/nv40_screen.c @@ -264,23 +264,23 @@ nv40_screen_create(struct pipe_winsys *ws, struct nouveau_device *dev) /* Static curie initialisation */ so = so_new(16, 25, 0); - so_method(so, screen->curie, NV40TCL_DMA_NOTIFY, 1); + so_method(so, screen->curie, NV34TCL_DMA_NOTIFY, 1); so_data (so, screen->sync->handle); - so_method(so, screen->curie, NV40TCL_DMA_TEXTURE0, 2); + so_method(so, screen->curie, NV34TCL_DMA_TEXTURE0, 2); so_data (so, chan->vram->handle); so_data (so, chan->gart->handle); - so_method(so, screen->curie, NV40TCL_DMA_COLOR1, 1); + so_method(so, screen->curie, NV34TCL_DMA_COLOR1, 1); so_data (so, chan->vram->handle); - so_method(so, screen->curie, NV40TCL_DMA_COLOR0, 2); + so_method(so, screen->curie, NV34TCL_DMA_COLOR0, 2); so_data (so, chan->vram->handle); so_data (so, chan->vram->handle); - so_method(so, screen->curie, NV40TCL_DMA_VTXBUF0, 2); + so_method(so, screen->curie, NV34TCL_DMA_VTXBUF0, 2); so_data (so, chan->vram->handle); so_data (so, chan->gart->handle); - so_method(so, screen->curie, NV40TCL_DMA_FENCE, 2); + so_method(so, screen->curie, NV34TCL_DMA_FENCE, 2); so_data (so, 0); so_data (so, screen->query->handle); - so_method(so, screen->curie, NV40TCL_DMA_UNK01AC, 2); + so_method(so, screen->curie, NV34TCL_DMA_IN_MEMORY7, 2); so_data (so, chan->vram->handle); so_data (so, chan->vram->handle); so_method(so, screen->curie, NV40TCL_DMA_COLOR2, 2); diff --git a/src/gallium/drivers/nv40/nv40_state.c b/src/gallium/drivers/nv40/nv40_state.c index ee471e6ce4..3db000a219 100644 --- a/src/gallium/drivers/nv40/nv40_state.c +++ b/src/gallium/drivers/nv40/nv40_state.c @@ -19,7 +19,7 @@ nv40_blend_state_create(struct pipe_context *pipe, struct nouveau_stateobj *so = so_new(5, 8, 0); if (cso->rt[0].blend_enable) { - so_method(so, curie, NV40TCL_BLEND_ENABLE, 3); + so_method(so, curie, NV34TCL_BLEND_FUNC_ENABLE, 3); so_data (so, 1); so_data (so, (nvgl_blend_func(cso->rt[0].alpha_src_factor) << 16) | nvgl_blend_func(cso->rt[0].rgb_src_factor)); @@ -29,26 +29,26 @@ nv40_blend_state_create(struct pipe_context *pipe, so_data (so, nvgl_blend_eqn(cso->rt[0].alpha_func) << 16 | nvgl_blend_eqn(cso->rt[0].rgb_func)); } else { - so_method(so, curie, NV40TCL_BLEND_ENABLE, 1); + so_method(so, curie, NV34TCL_BLEND_FUNC_ENABLE, 1); so_data (so, 0); } - so_method(so, curie, NV40TCL_COLOR_MASK, 1); + so_method(so, curie, NV34TCL_COLOR_MASK, 1); so_data (so, (((cso->rt[0].colormask & PIPE_MASK_A) ? (0x01 << 24) : 0) | ((cso->rt[0].colormask & PIPE_MASK_R) ? (0x01 << 16) : 0) | ((cso->rt[0].colormask & PIPE_MASK_G) ? (0x01 << 8) : 0) | ((cso->rt[0].colormask & PIPE_MASK_B) ? (0x01 << 0) : 0))); if (cso->logicop_enable) { - so_method(so, curie, NV40TCL_COLOR_LOGIC_OP_ENABLE, 2); + so_method(so, curie, NV34TCL_COLOR_LOGIC_OP_ENABLE, 2); so_data (so, 1); so_data (so, nvgl_logicop_func(cso->logicop_func)); } else { - so_method(so, curie, NV40TCL_COLOR_LOGIC_OP_ENABLE, 1); + so_method(so, curie, NV34TCL_COLOR_LOGIC_OP_ENABLE, 1); so_data (so, 0); } - so_method(so, curie, NV40TCL_DITHER_ENABLE, 1); + so_method(so, curie, NV34TCL_DITHER_ENABLE, 1); so_data (so, cso->dither ? 1 : 0); so_ref(so, &bso->so); @@ -82,19 +82,19 @@ wrap_mode(unsigned wrap) { switch (wrap) { case PIPE_TEX_WRAP_REPEAT: - ret = NV40TCL_TEX_WRAP_S_REPEAT; + ret = NV34TCL_TX_WRAP_S_REPEAT; break; case PIPE_TEX_WRAP_MIRROR_REPEAT: - ret = NV40TCL_TEX_WRAP_S_MIRRORED_REPEAT; + ret = NV34TCL_TX_WRAP_S_MIRRORED_REPEAT; break; case PIPE_TEX_WRAP_CLAMP_TO_EDGE: - ret = NV40TCL_TEX_WRAP_S_CLAMP_TO_EDGE; + ret = NV34TCL_TX_WRAP_S_CLAMP_TO_EDGE; break; case PIPE_TEX_WRAP_CLAMP_TO_BORDER: - ret = NV40TCL_TEX_WRAP_S_CLAMP_TO_BORDER; + ret = NV34TCL_TX_WRAP_S_CLAMP_TO_BORDER; break; case PIPE_TEX_WRAP_CLAMP: - ret = NV40TCL_TEX_WRAP_S_CLAMP; + ret = NV34TCL_TX_WRAP_S_CLAMP; break; case PIPE_TEX_WRAP_MIRROR_CLAMP_TO_EDGE: ret = NV40TCL_TEX_WRAP_S_MIRROR_CLAMP_TO_EDGE; @@ -107,11 +107,11 @@ wrap_mode(unsigned wrap) { break; default: NOUVEAU_ERR("unknown wrap mode: %d\n", wrap); - ret = NV40TCL_TEX_WRAP_S_REPEAT; + ret = NV34TCL_TX_WRAP_S_REPEAT; break; } - return ret >> NV40TCL_TEX_WRAP_S_SHIFT; + return ret >> NV34TCL_TX_WRAP_S_SHIFT; } static void * @@ -127,9 +127,9 @@ nv40_sampler_state_create(struct pipe_context *pipe, if (!cso->normalized_coords) ps->fmt |= NV40TCL_TEX_FORMAT_RECT; - ps->wrap = ((wrap_mode(cso->wrap_s) << NV40TCL_TEX_WRAP_S_SHIFT) | - (wrap_mode(cso->wrap_t) << NV40TCL_TEX_WRAP_T_SHIFT) | - (wrap_mode(cso->wrap_r) << NV40TCL_TEX_WRAP_R_SHIFT)); + ps->wrap = ((wrap_mode(cso->wrap_s) << NV34TCL_TX_WRAP_S_SHIFT) | + (wrap_mode(cso->wrap_t) << NV34TCL_TX_WRAP_T_SHIFT) | + (wrap_mode(cso->wrap_r) << NV34TCL_TX_WRAP_R_SHIFT)); ps->en = 0; if (cso->max_anisotropy >= 2) { @@ -160,11 +160,11 @@ nv40_sampler_state_create(struct pipe_context *pipe, switch (cso->mag_img_filter) { case PIPE_TEX_FILTER_LINEAR: - filter |= NV40TCL_TEX_FILTER_MAG_LINEAR; + filter |= NV34TCL_TX_FILTER_MAGNIFY_LINEAR; break; case PIPE_TEX_FILTER_NEAREST: default: - filter |= NV40TCL_TEX_FILTER_MAG_NEAREST; + filter |= NV34TCL_TX_FILTER_MAGNIFY_NEAREST; break; } @@ -172,14 +172,14 @@ nv40_sampler_state_create(struct pipe_context *pipe, case PIPE_TEX_FILTER_LINEAR: switch (cso->min_mip_filter) { case PIPE_TEX_MIPFILTER_NEAREST: - filter |= NV40TCL_TEX_FILTER_MIN_LINEAR_MIPMAP_NEAREST; + filter |= NV34TCL_TX_FILTER_MINIFY_LINEAR_MIPMAP_NEAREST; break; case PIPE_TEX_MIPFILTER_LINEAR: - filter |= NV40TCL_TEX_FILTER_MIN_LINEAR_MIPMAP_LINEAR; + filter |= NV34TCL_TX_FILTER_MINIFY_LINEAR_MIPMAP_LINEAR; break; case PIPE_TEX_MIPFILTER_NONE: default: - filter |= NV40TCL_TEX_FILTER_MIN_LINEAR; + filter |= NV34TCL_TX_FILTER_MINIFY_LINEAR; break; } break; @@ -187,14 +187,14 @@ nv40_sampler_state_create(struct pipe_context *pipe, default: switch (cso->min_mip_filter) { case PIPE_TEX_MIPFILTER_NEAREST: - filter |= NV40TCL_TEX_FILTER_MIN_NEAREST_MIPMAP_NEAREST; + filter |= NV34TCL_TX_FILTER_MINIFY_NEAREST_MIPMAP_NEAREST; break; case PIPE_TEX_MIPFILTER_LINEAR: - filter |= NV40TCL_TEX_FILTER_MIN_NEAREST_MIPMAP_LINEAR; + filter |= NV34TCL_TX_FILTER_MINIFY_NEAREST_MIPMAP_LINEAR; break; case PIPE_TEX_MIPFILTER_NONE: default: - filter |= NV40TCL_TEX_FILTER_MIN_NEAREST; + filter |= NV34TCL_TX_FILTER_MINIFY_NEAREST; break; } break; @@ -219,28 +219,28 @@ nv40_sampler_state_create(struct pipe_context *pipe, if (cso->compare_mode == PIPE_TEX_COMPARE_R_TO_TEXTURE) { switch (cso->compare_func) { case PIPE_FUNC_NEVER: - ps->wrap |= NV40TCL_TEX_WRAP_RCOMP_NEVER; + ps->wrap |= NV34TCL_TX_WRAP_RCOMP_NEVER; break; case PIPE_FUNC_GREATER: - ps->wrap |= NV40TCL_TEX_WRAP_RCOMP_GREATER; + ps->wrap |= NV34TCL_TX_WRAP_RCOMP_GREATER; break; case PIPE_FUNC_EQUAL: - ps->wrap |= NV40TCL_TEX_WRAP_RCOMP_EQUAL; + ps->wrap |= NV34TCL_TX_WRAP_RCOMP_EQUAL; break; case PIPE_FUNC_GEQUAL: - ps->wrap |= NV40TCL_TEX_WRAP_RCOMP_GEQUAL; + ps->wrap |= NV34TCL_TX_WRAP_RCOMP_GEQUAL; break; case PIPE_FUNC_LESS: - ps->wrap |= NV40TCL_TEX_WRAP_RCOMP_LESS; + ps->wrap |= NV34TCL_TX_WRAP_RCOMP_LESS; break; case PIPE_FUNC_NOTEQUAL: - ps->wrap |= NV40TCL_TEX_WRAP_RCOMP_NOTEQUAL; + ps->wrap |= NV34TCL_TX_WRAP_RCOMP_NOTEQUAL; break; case PIPE_FUNC_LEQUAL: - ps->wrap |= NV40TCL_TEX_WRAP_RCOMP_LEQUAL; + ps->wrap |= NV34TCL_TX_WRAP_RCOMP_LEQUAL; break; case PIPE_FUNC_ALWAYS: - ps->wrap |= NV40TCL_TEX_WRAP_RCOMP_ALWAYS; + ps->wrap |= NV34TCL_TX_WRAP_RCOMP_ALWAYS; break; default: break; @@ -319,66 +319,66 @@ nv40_rasterizer_state_create(struct pipe_context *pipe, * multisample */ - so_method(so, curie, NV40TCL_SHADE_MODEL, 1); - so_data (so, cso->flatshade ? NV40TCL_SHADE_MODEL_FLAT : - NV40TCL_SHADE_MODEL_SMOOTH); + so_method(so, curie, NV34TCL_SHADE_MODEL, 1); + so_data (so, cso->flatshade ? NV34TCL_SHADE_MODEL_FLAT : + NV34TCL_SHADE_MODEL_SMOOTH); - so_method(so, curie, NV40TCL_LINE_WIDTH, 2); + so_method(so, curie, NV34TCL_LINE_WIDTH, 2); so_data (so, (unsigned char)(cso->line_width * 8.0) & 0xff); so_data (so, cso->line_smooth ? 1 : 0); - so_method(so, curie, NV40TCL_LINE_STIPPLE_ENABLE, 2); + so_method(so, curie, NV34TCL_LINE_STIPPLE_ENABLE, 2); so_data (so, cso->line_stipple_enable ? 1 : 0); so_data (so, (cso->line_stipple_pattern << 16) | cso->line_stipple_factor); - so_method(so, curie, NV40TCL_POINT_SIZE, 1); + so_method(so, curie, NV34TCL_POINT_SIZE, 1); so_data (so, fui(cso->point_size)); - so_method(so, curie, NV40TCL_POLYGON_MODE_FRONT, 6); + so_method(so, curie, NV34TCL_POLYGON_MODE_FRONT, 6); if (cso->front_winding == PIPE_WINDING_CCW) { so_data(so, nvgl_polygon_mode(cso->fill_ccw)); so_data(so, nvgl_polygon_mode(cso->fill_cw)); switch (cso->cull_mode) { case PIPE_WINDING_CCW: - so_data(so, NV40TCL_CULL_FACE_FRONT); + so_data(so, NV34TCL_CULL_FACE_FRONT); break; case PIPE_WINDING_CW: - so_data(so, NV40TCL_CULL_FACE_BACK); + so_data(so, NV34TCL_CULL_FACE_BACK); break; case PIPE_WINDING_BOTH: - so_data(so, NV40TCL_CULL_FACE_FRONT_AND_BACK); + so_data(so, NV34TCL_CULL_FACE_FRONT_AND_BACK); break; default: - so_data(so, NV40TCL_CULL_FACE_BACK); + so_data(so, NV34TCL_CULL_FACE_BACK); break; } - so_data(so, NV40TCL_FRONT_FACE_CCW); + so_data(so, NV34TCL_FRONT_FACE_CCW); } else { so_data(so, nvgl_polygon_mode(cso->fill_cw)); so_data(so, nvgl_polygon_mode(cso->fill_ccw)); switch (cso->cull_mode) { case PIPE_WINDING_CCW: - so_data(so, NV40TCL_CULL_FACE_BACK); + so_data(so, NV34TCL_CULL_FACE_BACK); break; case PIPE_WINDING_CW: - so_data(so, NV40TCL_CULL_FACE_FRONT); + so_data(so, NV34TCL_CULL_FACE_FRONT); break; case PIPE_WINDING_BOTH: - so_data(so, NV40TCL_CULL_FACE_FRONT_AND_BACK); + so_data(so, NV34TCL_CULL_FACE_FRONT_AND_BACK); break; default: - so_data(so, NV40TCL_CULL_FACE_BACK); + so_data(so, NV34TCL_CULL_FACE_BACK); break; } - so_data(so, NV40TCL_FRONT_FACE_CW); + so_data(so, NV34TCL_FRONT_FACE_CW); } so_data(so, cso->poly_smooth ? 1 : 0); so_data(so, (cso->cull_mode != PIPE_WINDING_NONE) ? 1 : 0); - so_method(so, curie, NV40TCL_POLYGON_STIPPLE_ENABLE, 1); + so_method(so, curie, NV34TCL_POLYGON_STIPPLE_ENABLE, 1); so_data (so, cso->poly_stipple_enable ? 1 : 0); - so_method(so, curie, NV40TCL_POLYGON_OFFSET_POINT_ENABLE, 3); + so_method(so, curie, NV34TCL_POLYGON_OFFSET_POINT_ENABLE, 3); if ((cso->offset_cw && cso->fill_cw == PIPE_POLYGON_MODE_POINT) || (cso->offset_ccw && cso->fill_ccw == PIPE_POLYGON_MODE_POINT)) so_data(so, 1); @@ -395,12 +395,12 @@ nv40_rasterizer_state_create(struct pipe_context *pipe, else so_data(so, 0); if (cso->offset_cw || cso->offset_ccw) { - so_method(so, curie, NV40TCL_POLYGON_OFFSET_FACTOR, 2); + so_method(so, curie, NV34TCL_POLYGON_OFFSET_FACTOR, 2); so_data (so, fui(cso->offset_scale)); so_data (so, fui(cso->offset_units * 2)); } - so_method(so, curie, NV40TCL_POINT_SPRITE, 1); + so_method(so, curie, NV34TCL_POINT_SPRITE, 1); if (cso->point_quad_rasterization) { unsigned psctl = (1 << 0), i; @@ -448,43 +448,43 @@ nv40_depth_stencil_alpha_state_create(struct pipe_context *pipe, struct nouveau_stateobj *so = so_new(6, 20, 0); struct nouveau_grobj *curie = nv40->screen->curie; - so_method(so, curie, NV40TCL_DEPTH_FUNC, 3); + so_method(so, curie, NV34TCL_DEPTH_FUNC, 3); so_data (so, nvgl_comparison_op(cso->depth.func)); so_data (so, cso->depth.writemask ? 1 : 0); so_data (so, cso->depth.enabled ? 1 : 0); - so_method(so, curie, NV40TCL_ALPHA_TEST_ENABLE, 3); + so_method(so, curie, NV34TCL_ALPHA_FUNC_ENABLE, 3); so_data (so, cso->alpha.enabled ? 1 : 0); so_data (so, nvgl_comparison_op(cso->alpha.func)); so_data (so, float_to_ubyte(cso->alpha.ref_value)); if (cso->stencil[0].enabled) { - so_method(so, curie, NV40TCL_STENCIL_FRONT_ENABLE, 3); + so_method(so, curie, NV34TCL_STENCIL_FRONT_ENABLE, 3); so_data (so, cso->stencil[0].enabled ? 1 : 0); so_data (so, cso->stencil[0].writemask); so_data (so, nvgl_comparison_op(cso->stencil[0].func)); - so_method(so, curie, NV40TCL_STENCIL_FRONT_FUNC_MASK, 4); + so_method(so, curie, NV34TCL_STENCIL_FRONT_FUNC_MASK, 4); so_data (so, cso->stencil[0].valuemask); so_data (so, nvgl_stencil_op(cso->stencil[0].fail_op)); so_data (so, nvgl_stencil_op(cso->stencil[0].zfail_op)); so_data (so, nvgl_stencil_op(cso->stencil[0].zpass_op)); } else { - so_method(so, curie, NV40TCL_STENCIL_FRONT_ENABLE, 1); + so_method(so, curie, NV34TCL_STENCIL_FRONT_ENABLE, 1); so_data (so, 0); } if (cso->stencil[1].enabled) { - so_method(so, curie, NV40TCL_STENCIL_BACK_ENABLE, 3); + so_method(so, curie, NV34TCL_STENCIL_BACK_ENABLE, 3); so_data (so, cso->stencil[1].enabled ? 1 : 0); so_data (so, cso->stencil[1].writemask); so_data (so, nvgl_comparison_op(cso->stencil[1].func)); - so_method(so, curie, NV40TCL_STENCIL_BACK_FUNC_MASK, 4); + so_method(so, curie, NV34TCL_STENCIL_BACK_FUNC_MASK, 4); so_data (so, cso->stencil[1].valuemask); so_data (so, nvgl_stencil_op(cso->stencil[1].fail_op)); so_data (so, nvgl_stencil_op(cso->stencil[1].zfail_op)); so_data (so, nvgl_stencil_op(cso->stencil[1].zpass_op)); } else { - so_method(so, curie, NV40TCL_STENCIL_BACK_ENABLE, 1); + so_method(so, curie, NV34TCL_STENCIL_BACK_ENABLE, 1); so_data (so, 0); } diff --git a/src/gallium/drivers/nv40/nv40_state_blend.c b/src/gallium/drivers/nv40/nv40_state_blend.c index 3ff00a37f6..9da13123ab 100644 --- a/src/gallium/drivers/nv40/nv40_state_blend.c +++ b/src/gallium/drivers/nv40/nv40_state_blend.c @@ -21,7 +21,7 @@ nv40_state_blend_colour_validate(struct nv40_context *nv40) struct nouveau_stateobj *so = so_new(1, 1, 0); struct pipe_blend_color *bcol = &nv40->blend_colour; - so_method(so, nv40->screen->curie, NV40TCL_BLEND_COLOR, 1); + so_method(so, nv40->screen->curie, NV34TCL_BLEND_COLOR, 1); so_data (so, ((float_to_ubyte(bcol->color[3]) << 24) | (float_to_ubyte(bcol->color[0]) << 16) | (float_to_ubyte(bcol->color[1]) << 8) | diff --git a/src/gallium/drivers/nv40/nv40_state_fb.c b/src/gallium/drivers/nv40/nv40_state_fb.c index fd3fdfddc0..93e91b9e3b 100644 --- a/src/gallium/drivers/nv40/nv40_state_fb.c +++ b/src/gallium/drivers/nv40/nv40_state_fb.c @@ -49,23 +49,23 @@ nv40_state_framebuffer_validate(struct nv40_context *nv40) for (i = 1; i < fb->nr_cbufs; i++) assert(!(rt[i]->base.texture->tex_usage & NOUVEAU_TEXTURE_USAGE_LINEAR)); - rt_format = NV40TCL_RT_FORMAT_TYPE_SWIZZLED | - log2i(fb->width) << NV40TCL_RT_FORMAT_LOG2_WIDTH_SHIFT | - log2i(fb->height) << NV40TCL_RT_FORMAT_LOG2_HEIGHT_SHIFT; + rt_format = NV34TCL_RT_FORMAT_TYPE_SWIZZLED | + log2i(fb->width) << NV34TCL_RT_FORMAT_LOG2_WIDTH_SHIFT | + log2i(fb->height) << NV34TCL_RT_FORMAT_LOG2_HEIGHT_SHIFT; } else - rt_format = NV40TCL_RT_FORMAT_TYPE_LINEAR; + rt_format = NV34TCL_RT_FORMAT_TYPE_LINEAR; switch (colour_format) { case PIPE_FORMAT_B8G8R8X8_UNORM: - rt_format |= NV40TCL_RT_FORMAT_COLOR_X8R8G8B8; + rt_format |= NV34TCL_RT_FORMAT_COLOR_X8R8G8B8; break; case PIPE_FORMAT_B8G8R8A8_UNORM: case 0: - rt_format |= NV40TCL_RT_FORMAT_COLOR_A8R8G8B8; + rt_format |= NV34TCL_RT_FORMAT_COLOR_A8R8G8B8; break; case PIPE_FORMAT_B5G6R5_UNORM: - rt_format |= NV40TCL_RT_FORMAT_COLOR_R5G6B5; + rt_format |= NV34TCL_RT_FORMAT_COLOR_R5G6B5; break; default: assert(0); @@ -73,23 +73,23 @@ nv40_state_framebuffer_validate(struct nv40_context *nv40) switch (zeta_format) { case PIPE_FORMAT_Z16_UNORM: - rt_format |= NV40TCL_RT_FORMAT_ZETA_Z16; + rt_format |= NV34TCL_RT_FORMAT_ZETA_Z16; break; case PIPE_FORMAT_S8Z24_UNORM: case PIPE_FORMAT_X8Z24_UNORM: case 0: - rt_format |= NV40TCL_RT_FORMAT_ZETA_Z24S8; + rt_format |= NV34TCL_RT_FORMAT_ZETA_Z24S8; break; default: assert(0); } if (rt_enable & NV40TCL_RT_ENABLE_COLOR0) { - so_method(so, curie, NV40TCL_DMA_COLOR0, 1); + so_method(so, curie, NV34TCL_DMA_COLOR0, 1); so_reloc (so, nv40_surface_buffer(&rt[0]->base), 0, rt_flags | NOUVEAU_BO_OR, chan->vram->handle, chan->gart->handle); - so_method(so, curie, NV40TCL_COLOR0_PITCH, 2); + so_method(so, curie, NV34TCL_COLOR0_PITCH, 2); so_data (so, rt[0]->pitch); so_reloc (so, nv40_surface_buffer(&rt[0]->base), rt[0]->base.offset, rt_flags | NOUVEAU_BO_LOW, @@ -97,11 +97,11 @@ nv40_state_framebuffer_validate(struct nv40_context *nv40) } if (rt_enable & NV40TCL_RT_ENABLE_COLOR1) { - so_method(so, curie, NV40TCL_DMA_COLOR1, 1); + so_method(so, curie, NV34TCL_DMA_COLOR1, 1); so_reloc (so, nv40_surface_buffer(&rt[1]->base), 0, rt_flags | NOUVEAU_BO_OR, chan->vram->handle, chan->gart->handle); - so_method(so, curie, NV40TCL_COLOR1_OFFSET, 2); + so_method(so, curie, NV34TCL_COLOR1_OFFSET, 2); so_reloc (so, nv40_surface_buffer(&rt[1]->base), rt[1]->base.offset, rt_flags | NOUVEAU_BO_LOW, 0, 0); @@ -135,11 +135,11 @@ nv40_state_framebuffer_validate(struct nv40_context *nv40) } if (zeta_format) { - so_method(so, curie, NV40TCL_DMA_ZETA, 1); + so_method(so, curie, NV34TCL_DMA_ZETA, 1); so_reloc (so, nv40_surface_buffer(&zeta->base), 0, rt_flags | NOUVEAU_BO_OR, chan->vram->handle, chan->gart->handle); - so_method(so, curie, NV40TCL_ZETA_OFFSET, 1); + so_method(so, curie, NV34TCL_ZETA_OFFSET, 1); so_reloc (so, nv40_surface_buffer(&zeta->base), zeta->base.offset, rt_flags | NOUVEAU_BO_LOW, 0, 0); so_method(so, curie, NV40TCL_ZETA_PITCH, 1); @@ -148,14 +148,14 @@ nv40_state_framebuffer_validate(struct nv40_context *nv40) so_method(so, curie, NV40TCL_RT_ENABLE, 1); so_data (so, rt_enable); - so_method(so, curie, NV40TCL_RT_HORIZ, 3); + so_method(so, curie, NV34TCL_RT_HORIZ, 3); so_data (so, (w << 16) | 0); so_data (so, (h << 16) | 0); so_data (so, rt_format); - so_method(so, curie, NV40TCL_VIEWPORT_HORIZ, 2); + so_method(so, curie, NV34TCL_VIEWPORT_HORIZ, 2); so_data (so, (w << 16) | 0); so_data (so, (h << 16) | 0); - so_method(so, curie, NV40TCL_VIEWPORT_CLIP_HORIZ(0), 2); + so_method(so, curie, NV34TCL_VIEWPORT_CLIP_HORIZ(0), 2); so_data (so, ((w - 1) << 16) | 0); so_data (so, ((h - 1) << 16) | 0); so_method(so, curie, 0x1d88, 1); diff --git a/src/gallium/drivers/nv40/nv40_state_scissor.c b/src/gallium/drivers/nv40/nv40_state_scissor.c index 753a505e93..91bff4849c 100644 --- a/src/gallium/drivers/nv40/nv40_state_scissor.c +++ b/src/gallium/drivers/nv40/nv40_state_scissor.c @@ -13,7 +13,7 @@ nv40_state_scissor_validate(struct nv40_context *nv40) nv40->state.scissor_enabled = rast->scissor; so = so_new(1, 2, 0); - so_method(so, nv40->screen->curie, NV40TCL_SCISSOR_HORIZ, 2); + so_method(so, nv40->screen->curie, NV34TCL_SCISSOR_HORIZ, 2); if (nv40->state.scissor_enabled) { so_data (so, ((s->maxx - s->minx) << 16) | s->minx); so_data (so, ((s->maxy - s->miny) << 16) | s->miny); diff --git a/src/gallium/drivers/nv40/nv40_state_stipple.c b/src/gallium/drivers/nv40/nv40_state_stipple.c index 2b371ebfec..ed8643b9c1 100644 --- a/src/gallium/drivers/nv40/nv40_state_stipple.c +++ b/src/gallium/drivers/nv40/nv40_state_stipple.c @@ -15,14 +15,14 @@ nv40_state_stipple_validate(struct nv40_context *nv40) unsigned i; so = so_new(2, 33, 0); - so_method(so, curie, NV40TCL_POLYGON_STIPPLE_ENABLE, 1); + so_method(so, curie, NV34TCL_POLYGON_STIPPLE_ENABLE, 1); so_data (so, 1); - so_method(so, curie, NV40TCL_POLYGON_STIPPLE_PATTERN(0), 32); + so_method(so, curie, NV34TCL_POLYGON_STIPPLE_PATTERN(0), 32); for (i = 0; i < 32; i++) so_data(so, nv40->stipple[i]); } else { so = so_new(1, 1, 0); - so_method(so, curie, NV40TCL_POLYGON_STIPPLE_ENABLE, 1); + so_method(so, curie, NV34TCL_POLYGON_STIPPLE_ENABLE, 1); so_data (so, 0); } diff --git a/src/gallium/drivers/nv40/nv40_state_viewport.c b/src/gallium/drivers/nv40/nv40_state_viewport.c index 3aacb00f99..3a5ea0e480 100644 --- a/src/gallium/drivers/nv40/nv40_state_viewport.c +++ b/src/gallium/drivers/nv40/nv40_state_viewport.c @@ -12,7 +12,7 @@ nv40_state_viewport_validate(struct nv40_context *nv40) so = so_new(2, 9, 0); so_method(so, nv40->screen->curie, - NV40TCL_VIEWPORT_TRANSLATE_X, 8); + NV34TCL_VIEWPORT_TRANSLATE_X, 8); so_data (so, fui(vpt->translate[0])); so_data (so, fui(vpt->translate[1])); so_data (so, fui(vpt->translate[2])); diff --git a/src/gallium/drivers/nv40/nv40_state_zsa.c b/src/gallium/drivers/nv40/nv40_state_zsa.c index 9cbe7da6db..bf68c60ace 100644 --- a/src/gallium/drivers/nv40/nv40_state_zsa.c +++ b/src/gallium/drivers/nv40/nv40_state_zsa.c @@ -22,9 +22,9 @@ nv40_state_sr_validate(struct nv40_context *nv40) struct nouveau_stateobj *so = so_new(2, 2, 0); struct pipe_stencil_ref *sr = &nv40->stencil_ref; - so_method(so, nv40->screen->curie, NV40TCL_STENCIL_FRONT_FUNC_REF, 1); + so_method(so, nv40->screen->curie, NV34TCL_STENCIL_FRONT_FUNC_REF, 1); so_data (so, sr->ref_value[0]); - so_method(so, nv40->screen->curie, NV40TCL_STENCIL_BACK_FUNC_REF, 1); + so_method(so, nv40->screen->curie, NV34TCL_STENCIL_BACK_FUNC_REF, 1); so_data (so, sr->ref_value[1]); so_ref(so, &nv40->state.hw[NV40_STATE_SR]); diff --git a/src/gallium/drivers/nv40/nv40_vbo.c b/src/gallium/drivers/nv40/nv40_vbo.c index fabdf4bf23..a2f06ead86 100644 --- a/src/gallium/drivers/nv40/nv40_vbo.c +++ b/src/gallium/drivers/nv40/nv40_vbo.c @@ -20,19 +20,19 @@ nv40_vbo_format_to_hw(enum pipe_format pipe, unsigned *fmt, unsigned *ncomp) case PIPE_FORMAT_R32G32_FLOAT: case PIPE_FORMAT_R32G32B32_FLOAT: case PIPE_FORMAT_R32G32B32A32_FLOAT: - *fmt = NV40TCL_VTXFMT_TYPE_FLOAT; + *fmt = NV34TCL_VTXFMT_TYPE_FLOAT; break; case PIPE_FORMAT_R8_UNORM: case PIPE_FORMAT_R8G8_UNORM: case PIPE_FORMAT_R8G8B8_UNORM: case PIPE_FORMAT_R8G8B8A8_UNORM: - *fmt = NV40TCL_VTXFMT_TYPE_UBYTE; + *fmt = NV34TCL_VTXFMT_TYPE_UBYTE; break; case PIPE_FORMAT_R16_SSCALED: case PIPE_FORMAT_R16G16_SSCALED: case PIPE_FORMAT_R16G16B16_SSCALED: case PIPE_FORMAT_R16G16B16A16_SSCALED: - *fmt = NV40TCL_VTXFMT_TYPE_USHORT; + *fmt = NV34TCL_VTXFMT_TYPE_USHORT; break; default: NOUVEAU_ERR("Unknown format %s\n", util_format_name(pipe)); @@ -86,10 +86,10 @@ nv40_vbo_set_idxbuf(struct nv40_context *nv40, struct pipe_buffer *ib, switch (ib_size) { case 2: - type = NV40TCL_IDXBUF_FORMAT_TYPE_U16; + type = NV34TCL_IDXBUF_FORMAT_TYPE_U16; break; case 4: - type = NV40TCL_IDXBUF_FORMAT_TYPE_U32; + type = NV34TCL_IDXBUF_FORMAT_TYPE_U32; break; default: return FALSE; @@ -122,31 +122,31 @@ nv40_vbo_static_attrib(struct nv40_context *nv40, struct nouveau_stateobj *so, map += vb->buffer_offset + ve->src_offset; switch (type) { - case NV40TCL_VTXFMT_TYPE_FLOAT: + case NV34TCL_VTXFMT_TYPE_FLOAT: { float *v = map; switch (ncomp) { case 4: - so_method(so, curie, NV40TCL_VTX_ATTR_4F_X(attrib), 4); + so_method(so, curie, NV34TCL_VTX_ATTR_4F_X(attrib), 4); so_data (so, fui(v[0])); so_data (so, fui(v[1])); so_data (so, fui(v[2])); so_data (so, fui(v[3])); break; case 3: - so_method(so, curie, NV40TCL_VTX_ATTR_3F_X(attrib), 3); + so_method(so, curie, NV34TCL_VTX_ATTR_3F_X(attrib), 3); so_data (so, fui(v[0])); so_data (so, fui(v[1])); so_data (so, fui(v[2])); break; case 2: - so_method(so, curie, NV40TCL_VTX_ATTR_2F_X(attrib), 2); + so_method(so, curie, NV34TCL_VTX_ATTR_2F_X(attrib), 2); so_data (so, fui(v[0])); so_data (so, fui(v[1])); break; case 1: - so_method(so, curie, NV40TCL_VTX_ATTR_1F(attrib), 1); + so_method(so, curie, NV34TCL_VTX_ATTR_1F(attrib), 1); so_data (so, fui(v[0])); break; default: @@ -194,12 +194,12 @@ nv40_draw_arrays(struct pipe_context *pipe, continue; } - BEGIN_RING(chan, curie, NV40TCL_BEGIN_END, 1); + BEGIN_RING(chan, curie, NV34TCL_VERTEX_BEGIN_END, 1); OUT_RING (chan, nvgl_primitive(mode)); nr = (vc & 0xff); if (nr) { - BEGIN_RING(chan, curie, NV40TCL_VB_VERTEX_BATCH, 1); + BEGIN_RING(chan, curie, NV34TCL_VB_VERTEX_BATCH, 1); OUT_RING (chan, ((nr - 1) << 24) | start); start += nr; } @@ -210,14 +210,14 @@ nv40_draw_arrays(struct pipe_context *pipe, nr -= push; - BEGIN_RING_NI(chan, curie, NV40TCL_VB_VERTEX_BATCH, push); + BEGIN_RING_NI(chan, curie, NV34TCL_VB_VERTEX_BATCH, push); while (push--) { OUT_RING(chan, ((0x100 - 1) << 24) | start); start += 0x100; } } - BEGIN_RING(chan, curie, NV40TCL_BEGIN_END, 1); + BEGIN_RING(chan, curie, NV34TCL_VERTEX_BEGIN_END, 1); OUT_RING (chan, 0); count -= vc; @@ -249,11 +249,11 @@ nv40_draw_elements_u08(struct nv40_context *nv40, void *ib, } count -= vc; - BEGIN_RING(chan, curie, NV40TCL_BEGIN_END, 1); + BEGIN_RING(chan, curie, NV34TCL_VERTEX_BEGIN_END, 1); OUT_RING (chan, nvgl_primitive(mode)); if (vc & 1) { - BEGIN_RING(chan, curie, NV40TCL_VB_ELEMENT_U32, 1); + BEGIN_RING(chan, curie, NV34TCL_VB_ELEMENT_U32, 1); OUT_RING (chan, elts[0]); elts++; vc--; } @@ -263,7 +263,7 @@ nv40_draw_elements_u08(struct nv40_context *nv40, void *ib, push = MIN2(vc, 2047 * 2); - BEGIN_RING_NI(chan, curie, NV40TCL_VB_ELEMENT_U16, push >> 1); + BEGIN_RING_NI(chan, curie, NV34TCL_VB_ELEMENT_U16, push >> 1); for (i = 0; i < push; i+=2) OUT_RING(chan, (elts[i+1] << 16) | elts[i]); @@ -271,7 +271,7 @@ nv40_draw_elements_u08(struct nv40_context *nv40, void *ib, elts += push; } - BEGIN_RING(chan, curie, NV40TCL_BEGIN_END, 1); + BEGIN_RING(chan, curie, NV34TCL_VERTEX_BEGIN_END, 1); OUT_RING (chan, 0); start = restart; @@ -300,11 +300,11 @@ nv40_draw_elements_u16(struct nv40_context *nv40, void *ib, } count -= vc; - BEGIN_RING(chan, curie, NV40TCL_BEGIN_END, 1); + BEGIN_RING(chan, curie, NV34TCL_VERTEX_BEGIN_END, 1); OUT_RING (chan, nvgl_primitive(mode)); if (vc & 1) { - BEGIN_RING(chan, curie, NV40TCL_VB_ELEMENT_U32, 1); + BEGIN_RING(chan, curie, NV34TCL_VB_ELEMENT_U32, 1); OUT_RING (chan, elts[0]); elts++; vc--; } @@ -314,7 +314,7 @@ nv40_draw_elements_u16(struct nv40_context *nv40, void *ib, push = MIN2(vc, 2047 * 2); - BEGIN_RING_NI(chan, curie, NV40TCL_VB_ELEMENT_U16, push >> 1); + BEGIN_RING_NI(chan, curie, NV34TCL_VB_ELEMENT_U16, push >> 1); for (i = 0; i < push; i+=2) OUT_RING(chan, (elts[i+1] << 16) | elts[i]); @@ -322,7 +322,7 @@ nv40_draw_elements_u16(struct nv40_context *nv40, void *ib, elts += push; } - BEGIN_RING(chan, curie, NV40TCL_BEGIN_END, 1); + BEGIN_RING(chan, curie, NV34TCL_VERTEX_BEGIN_END, 1); OUT_RING (chan, 0); start = restart; @@ -351,20 +351,20 @@ nv40_draw_elements_u32(struct nv40_context *nv40, void *ib, } count -= vc; - BEGIN_RING(chan, curie, NV40TCL_BEGIN_END, 1); + BEGIN_RING(chan, curie, NV34TCL_VERTEX_BEGIN_END, 1); OUT_RING (chan, nvgl_primitive(mode)); while (vc) { push = MIN2(vc, 2047); - BEGIN_RING_NI(chan, curie, NV40TCL_VB_ELEMENT_U32, push); + BEGIN_RING_NI(chan, curie, NV34TCL_VB_ELEMENT_U32, push); OUT_RINGp (chan, elts, push); vc -= push; elts += push; } - BEGIN_RING(chan, curie, NV40TCL_BEGIN_END, 1); + BEGIN_RING(chan, curie, NV34TCL_VERTEX_BEGIN_END, 1); OUT_RING (chan, 0); start = restart; @@ -426,12 +426,12 @@ nv40_draw_elements_vbo(struct pipe_context *pipe, continue; } - BEGIN_RING(chan, curie, NV40TCL_BEGIN_END, 1); + BEGIN_RING(chan, curie, NV34TCL_VERTEX_BEGIN_END, 1); OUT_RING (chan, nvgl_primitive(mode)); nr = (vc & 0xff); if (nr) { - BEGIN_RING(chan, curie, NV40TCL_VB_INDEX_BATCH, 1); + BEGIN_RING(chan, curie, NV34TCL_VB_INDEX_BATCH, 1); OUT_RING (chan, ((nr - 1) << 24) | start); start += nr; } @@ -442,14 +442,14 @@ nv40_draw_elements_vbo(struct pipe_context *pipe, nr -= push; - BEGIN_RING_NI(chan, curie, NV40TCL_VB_INDEX_BATCH, push); + BEGIN_RING_NI(chan, curie, NV34TCL_VB_INDEX_BATCH, push); while (push--) { OUT_RING(chan, ((0x100 - 1) << 24) | start); start += 0x100; } } - BEGIN_RING(chan, curie, NV40TCL_BEGIN_END, 1); + BEGIN_RING(chan, curie, NV34TCL_VERTEX_BEGIN_END, 1); OUT_RING (chan, 0); count -= vc; @@ -493,9 +493,9 @@ nv40_vbo_validate(struct nv40_context *nv40) int hw; vtxbuf = so_new(3, 17, 18); - so_method(vtxbuf, curie, NV40TCL_VTXBUF_ADDRESS(0), nv40->vtxelt->num_elements); + so_method(vtxbuf, curie, NV34TCL_VTXBUF_ADDRESS(0), nv40->vtxelt->num_elements); vtxfmt = so_new(1, 16, 0); - so_method(vtxfmt, curie, NV40TCL_VTXFMT(0), nv40->vtxelt->num_elements); + so_method(vtxfmt, curie, NV34TCL_VTXFMT(0), nv40->vtxelt->num_elements); for (hw = 0; hw < nv40->vtxelt->num_elements; hw++) { struct pipe_vertex_element *ve; @@ -511,7 +511,7 @@ nv40_vbo_validate(struct nv40_context *nv40) if (nv40_vbo_static_attrib(nv40, sattr, hw, ve, vb)) { so_data(vtxbuf, 0); - so_data(vtxfmt, NV40TCL_VTXFMT_TYPE_FLOAT); + so_data(vtxfmt, NV34TCL_VTXFMT_TYPE_FLOAT); continue; } } @@ -526,18 +526,18 @@ nv40_vbo_validate(struct nv40_context *nv40) so_reloc(vtxbuf, nouveau_bo(vb->buffer), vb->buffer_offset + ve->src_offset, vb_flags | NOUVEAU_BO_LOW | NOUVEAU_BO_OR, - 0, NV40TCL_VTXBUF_ADDRESS_DMA1); - so_data (vtxfmt, ((vb->stride << NV40TCL_VTXFMT_STRIDE_SHIFT) | - (ncomp << NV40TCL_VTXFMT_SIZE_SHIFT) | type)); + 0, NV34TCL_VTXBUF_ADDRESS_DMA1); + so_data (vtxfmt, ((vb->stride << NV34TCL_VTXFMT_STRIDE_SHIFT) | + (ncomp << NV34TCL_VTXFMT_SIZE_SHIFT) | type)); } if (ib) { struct nouveau_bo *bo = nouveau_bo(ib); - so_method(vtxbuf, curie, NV40TCL_IDXBUF_ADDRESS, 2); + so_method(vtxbuf, curie, NV34TCL_IDXBUF_ADDRESS, 2); so_reloc (vtxbuf, bo, 0, vb_flags | NOUVEAU_BO_LOW, 0, 0); so_reloc (vtxbuf, bo, ib_format, vb_flags | NOUVEAU_BO_OR, - 0, NV40TCL_IDXBUF_FORMAT_DMA1); + 0, NV34TCL_IDXBUF_FORMAT_DMA1); } so_method(vtxbuf, curie, 0x1710, 1); diff --git a/src/gallium/drivers/nv40/nv40_vertprog.c b/src/gallium/drivers/nv40/nv40_vertprog.c index c93c5d127c..2abda14f31 100644 --- a/src/gallium/drivers/nv40/nv40_vertprog.c +++ b/src/gallium/drivers/nv40/nv40_vertprog.c @@ -207,32 +207,32 @@ emit_dst(struct nv40_vpc *vpc, uint32_t *hw, int slot, struct nv40_sreg dst) case NV40_VP_INST_DEST_TC(7): vp->or |= (1 << 21); break; case NV40_VP_INST_DEST_CLIP(0): vp->or |= (1 << 6); - vp->clip_ctrl |= NV40TCL_CLIP_PLANE_ENABLE_PLANE0; + vp->clip_ctrl |= NV34TCL_VP_CLIP_PLANES_ENABLE_PLANE0; dst.index = NV40_VP_INST_DEST_FOGC; break; case NV40_VP_INST_DEST_CLIP(1): vp->or |= (1 << 7); - vp->clip_ctrl |= NV40TCL_CLIP_PLANE_ENABLE_PLANE1; + vp->clip_ctrl |= NV34TCL_VP_CLIP_PLANES_ENABLE_PLANE1; dst.index = NV40_VP_INST_DEST_FOGC; break; case NV40_VP_INST_DEST_CLIP(2): vp->or |= (1 << 8); - vp->clip_ctrl |= NV40TCL_CLIP_PLANE_ENABLE_PLANE2; + vp->clip_ctrl |= NV34TCL_VP_CLIP_PLANES_ENABLE_PLANE2; dst.index = NV40_VP_INST_DEST_FOGC; break; case NV40_VP_INST_DEST_CLIP(3): vp->or |= (1 << 9); - vp->clip_ctrl |= NV40TCL_CLIP_PLANE_ENABLE_PLANE3; + vp->clip_ctrl |= NV34TCL_VP_CLIP_PLANES_ENABLE_PLANE3; dst.index = NV40_VP_INST_DEST_PSZ; break; case NV40_VP_INST_DEST_CLIP(4): vp->or |= (1 << 10); - vp->clip_ctrl |= NV40TCL_CLIP_PLANE_ENABLE_PLANE4; + vp->clip_ctrl |= NV34TCL_VP_CLIP_PLANES_ENABLE_PLANE4; dst.index = NV40_VP_INST_DEST_PSZ; break; case NV40_VP_INST_DEST_CLIP(5): vp->or |= (1 << 11); - vp->clip_ctrl |= NV40TCL_CLIP_PLANE_ENABLE_PLANE5; + vp->clip_ctrl |= NV34TCL_VP_CLIP_PLANES_ENABLE_PLANE5; dst.index = NV40_VP_INST_DEST_PSZ; break; default: @@ -887,12 +887,12 @@ check_gpu_resources: } so = so_new(3, 4, 0); - so_method(so, curie, NV40TCL_VP_START_FROM_ID, 1); + so_method(so, curie, NV34TCL_VP_START_FROM_ID, 1); so_data (so, vp->exec->start); so_method(so, curie, NV40TCL_VP_ATTRIB_EN, 2); so_data (so, vp->ir); so_data (so, vp->or); - so_method(so, curie, NV40TCL_CLIP_PLANE_ENABLE, 1); + so_method(so, curie, NV34TCL_VP_CLIP_PLANES_ENABLE, 1); so_data (so, vp->clip_ctrl); so_ref(so, &vp->so); so_ref(NULL, &so); @@ -976,7 +976,7 @@ check_gpu_resources: 4 * sizeof(float)); } - BEGIN_RING(chan, curie, NV40TCL_VP_UPLOAD_CONST_ID, 5); + BEGIN_RING(chan, curie, NV34TCL_VP_UPLOAD_CONST_ID, 5); OUT_RING (chan, i + vp->data->start); OUT_RINGp (chan, (uint32_t *)vpd->value, 4); } @@ -995,10 +995,10 @@ check_gpu_resources: NOUVEAU_MSG("VP %d: 0x%08x\n", i, vp->insns[i].data[3]); } #endif - BEGIN_RING(chan, curie, NV40TCL_VP_UPLOAD_FROM_ID, 1); + BEGIN_RING(chan, curie, NV34TCL_VP_UPLOAD_FROM_ID, 1); OUT_RING (chan, vp->exec->start); for (i = 0; i < vp->nr_insns; i++) { - BEGIN_RING(chan, curie, NV40TCL_VP_UPLOAD_INST(0), 4); + BEGIN_RING(chan, curie, NV34TCL_VP_UPLOAD_INST(0), 4); OUT_RINGp (chan, vp->insns[i].data, 4); } } -- cgit v1.2.3 From 1771d8f8f4256773de1883a033081f9cc4cddf00 Mon Sep 17 00:00:00 2001 From: Luca Barbieri Date: Sat, 20 Feb 2010 18:18:48 +0100 Subject: nv30: remove unused on_hw field and constant fp_reg_control field This makes nv30_state.h equivalent to nv40_state.h --- src/gallium/drivers/nv30/nv30_fragprog.c | 4 +--- src/gallium/drivers/nv30/nv30_state.h | 2 -- 2 files changed, 1 insertion(+), 5 deletions(-) (limited to 'src') diff --git a/src/gallium/drivers/nv30/nv30_fragprog.c b/src/gallium/drivers/nv30/nv30_fragprog.c index 2c432c6dfa..74bf68012a 100644 --- a/src/gallium/drivers/nv30/nv30_fragprog.c +++ b/src/gallium/drivers/nv30/nv30_fragprog.c @@ -759,7 +759,6 @@ nv30_fragprog_translate(struct nv30_context *nv30, } fp->fp_control |= (fpc->num_regs-1)/2; - fp->fp_reg_control = (1<<16)|0x4; /* Terminate final instruction */ fp->insn[fpc->inst_offset] |= 0x00000001; @@ -773,7 +772,6 @@ nv30_fragprog_translate(struct nv30_context *nv30, fp->insn[fpc->inst_offset + 3] = 0x00000000; fp->translated = TRUE; - fp->on_hw = FALSE; out_err: tgsi_parse_free(&parse); FREE(fpc); @@ -846,7 +844,7 @@ nv30_fragprog_validate(struct nv30_context *nv30) so_method(so, nv30->screen->rankine, NV34TCL_FP_CONTROL, 1); so_data (so, fp->fp_control); so_method(so, nv30->screen->rankine, NV34TCL_FP_REG_CONTROL, 1); - so_data (so, fp->fp_reg_control); + so_data (so, (1<<16)|0x4); so_method(so, nv30->screen->rankine, NV34TCL_TX_UNITS_ENABLE, 1); so_data (so, fp->samplers); so_ref(so, &fp->so); diff --git a/src/gallium/drivers/nv30/nv30_state.h b/src/gallium/drivers/nv30/nv30_state.h index 66c26360cb..b1c7f84a0a 100644 --- a/src/gallium/drivers/nv30/nv30_state.h +++ b/src/gallium/drivers/nv30/nv30_state.h @@ -54,7 +54,6 @@ struct nv30_fragment_program { struct tgsi_shader_info info; boolean translated; - boolean on_hw; unsigned samplers; uint32_t *insn; @@ -66,7 +65,6 @@ struct nv30_fragment_program { struct pipe_buffer *buffer; uint32_t fp_control; - uint32_t fp_reg_control; struct nouveau_stateobj *so; }; -- cgit v1.2.3 From d673c92810636dcc6de33d3618d494ce9f5717c1 Mon Sep 17 00:00:00 2001 From: Luca Barbieri Date: Sat, 20 Feb 2010 18:34:00 +0100 Subject: nouveau: s/rankine/eng3d/g; s/curie/eng3d/g Result of running: perl -i -p -e 's/rankine/eng3d/g; s/curie/eng3d/g;' nv[34]0/*.[ch] This will allow to more easily unify nv30 and nv40. --- src/gallium/drivers/nv30/nv30_context.c | 6 +-- src/gallium/drivers/nv30/nv30_fragprog.c | 8 +-- src/gallium/drivers/nv30/nv30_fragtex.c | 4 +- src/gallium/drivers/nv30/nv30_query.c | 10 ++-- src/gallium/drivers/nv30/nv30_screen.c | 66 ++++++++++++------------- src/gallium/drivers/nv30/nv30_screen.h | 2 +- src/gallium/drivers/nv30/nv30_state.c | 54 ++++++++++---------- src/gallium/drivers/nv30/nv30_state_blend.c | 2 +- src/gallium/drivers/nv30/nv30_state_fb.c | 26 +++++----- src/gallium/drivers/nv30/nv30_state_scissor.c | 2 +- src/gallium/drivers/nv30/nv30_state_stipple.c | 8 +-- src/gallium/drivers/nv30/nv30_state_viewport.c | 6 +-- src/gallium/drivers/nv30/nv30_state_zsa.c | 4 +- src/gallium/drivers/nv30/nv30_vbo.c | 68 +++++++++++++------------- src/gallium/drivers/nv30/nv30_vertprog.c | 10 ++-- src/gallium/drivers/nv40/nv40_context.c | 6 +-- src/gallium/drivers/nv40/nv40_draw.c | 24 ++++----- src/gallium/drivers/nv40/nv40_fragprog.c | 4 +- src/gallium/drivers/nv40/nv40_fragtex.c | 6 +-- src/gallium/drivers/nv40/nv40_query.c | 10 ++-- src/gallium/drivers/nv40/nv40_screen.c | 50 +++++++++---------- src/gallium/drivers/nv40/nv40_screen.h | 2 +- src/gallium/drivers/nv40/nv40_state.c | 54 ++++++++++---------- src/gallium/drivers/nv40/nv40_state_blend.c | 2 +- src/gallium/drivers/nv40/nv40_state_emit.c | 6 +-- src/gallium/drivers/nv40/nv40_state_fb.c | 38 +++++++------- src/gallium/drivers/nv40/nv40_state_scissor.c | 2 +- src/gallium/drivers/nv40/nv40_state_stipple.c | 8 +-- src/gallium/drivers/nv40/nv40_state_viewport.c | 4 +- src/gallium/drivers/nv40/nv40_state_zsa.c | 4 +- src/gallium/drivers/nv40/nv40_vbo.c | 68 +++++++++++++------------- src/gallium/drivers/nv40/nv40_vertprog.c | 14 +++--- 32 files changed, 289 insertions(+), 289 deletions(-) (limited to 'src') diff --git a/src/gallium/drivers/nv30/nv30_context.c b/src/gallium/drivers/nv30/nv30_context.c index 825c167b01..be6407805b 100644 --- a/src/gallium/drivers/nv30/nv30_context.c +++ b/src/gallium/drivers/nv30/nv30_context.c @@ -11,12 +11,12 @@ nv30_flush(struct pipe_context *pipe, unsigned flags, struct nv30_context *nv30 = nv30_context(pipe); struct nv30_screen *screen = nv30->screen; struct nouveau_channel *chan = screen->base.channel; - struct nouveau_grobj *rankine = screen->rankine; + struct nouveau_grobj *eng3d = screen->eng3d; if (flags & PIPE_FLUSH_TEXTURE_CACHE) { - BEGIN_RING(chan, rankine, 0x1fd8, 1); + BEGIN_RING(chan, eng3d, 0x1fd8, 1); OUT_RING (chan, 2); - BEGIN_RING(chan, rankine, 0x1fd8, 1); + BEGIN_RING(chan, eng3d, 0x1fd8, 1); OUT_RING (chan, 1); } diff --git a/src/gallium/drivers/nv30/nv30_fragprog.c b/src/gallium/drivers/nv30/nv30_fragprog.c index 74bf68012a..4c96e6d733 100644 --- a/src/gallium/drivers/nv30/nv30_fragprog.c +++ b/src/gallium/drivers/nv30/nv30_fragprog.c @@ -836,16 +836,16 @@ nv30_fragprog_validate(struct nv30_context *nv30) nv30_fragprog_upload(nv30, fp); so = so_new(4, 4, 1); - so_method(so, nv30->screen->rankine, NV34TCL_FP_ACTIVE_PROGRAM, 1); + so_method(so, nv30->screen->eng3d, NV34TCL_FP_ACTIVE_PROGRAM, 1); so_reloc (so, nouveau_bo(fp->buffer), 0, NOUVEAU_BO_VRAM | NOUVEAU_BO_GART | NOUVEAU_BO_RD | NOUVEAU_BO_LOW | NOUVEAU_BO_OR, NV34TCL_FP_ACTIVE_PROGRAM_DMA0, NV34TCL_FP_ACTIVE_PROGRAM_DMA1); - so_method(so, nv30->screen->rankine, NV34TCL_FP_CONTROL, 1); + so_method(so, nv30->screen->eng3d, NV34TCL_FP_CONTROL, 1); so_data (so, fp->fp_control); - so_method(so, nv30->screen->rankine, NV34TCL_FP_REG_CONTROL, 1); + so_method(so, nv30->screen->eng3d, NV34TCL_FP_REG_CONTROL, 1); so_data (so, (1<<16)|0x4); - so_method(so, nv30->screen->rankine, NV34TCL_TX_UNITS_ENABLE, 1); + so_method(so, nv30->screen->eng3d, NV34TCL_TX_UNITS_ENABLE, 1); so_data (so, fp->samplers); so_ref(so, &fp->so); so_ref(NULL, &so); diff --git a/src/gallium/drivers/nv30/nv30_fragtex.c b/src/gallium/drivers/nv30/nv30_fragtex.c index f7d98f3f20..63b5015ed4 100644 --- a/src/gallium/drivers/nv30/nv30_fragtex.c +++ b/src/gallium/drivers/nv30/nv30_fragtex.c @@ -101,7 +101,7 @@ nv30_fragtex_build(struct nv30_context *nv30, int unit) txs = tf->swizzle; so = so_new(1, 8, 2); - so_method(so, nv30->screen->rankine, NV34TCL_TX_OFFSET(unit), 8); + so_method(so, nv30->screen->eng3d, NV34TCL_TX_OFFSET(unit), 8); so_reloc (so, bo, 0, tex_flags | NOUVEAU_BO_LOW, 0, 0); so_reloc (so, bo, txf, tex_flags | NOUVEAU_BO_OR, NV34TCL_TX_FORMAT_DMA0, NV34TCL_TX_FORMAT_DMA1); @@ -130,7 +130,7 @@ nv30_fragtex_validate(struct nv30_context *nv30) samplers &= ~(1 << unit); so = so_new(1, 1, 0); - so_method(so, nv30->screen->rankine, NV34TCL_TX_ENABLE(unit), 1); + so_method(so, nv30->screen->eng3d, NV34TCL_TX_ENABLE(unit), 1); so_data (so, 0); so_ref(so, &nv30->state.hw[NV30_STATE_FRAGTEX0 + unit]); so_ref(NULL, &so); diff --git a/src/gallium/drivers/nv30/nv30_query.c b/src/gallium/drivers/nv30/nv30_query.c index e27e9ccbf6..21a5e8ad7c 100644 --- a/src/gallium/drivers/nv30/nv30_query.c +++ b/src/gallium/drivers/nv30/nv30_query.c @@ -43,7 +43,7 @@ nv30_query_begin(struct pipe_context *pipe, struct pipe_query *pq) struct nv30_query *q = nv30_query(pq); struct nv30_screen *screen = nv30->screen; struct nouveau_channel *chan = screen->base.channel; - struct nouveau_grobj *rankine = screen->rankine; + struct nouveau_grobj *eng3d = screen->eng3d; assert(q->type == PIPE_QUERY_OCCLUSION_COUNTER); @@ -60,9 +60,9 @@ nv30_query_begin(struct pipe_context *pipe, struct pipe_query *pq) assert(0); nouveau_notifier_reset(nv30->screen->query, q->object->start); - BEGIN_RING(chan, rankine, NV34TCL_QUERY_RESET, 1); + BEGIN_RING(chan, eng3d, NV34TCL_QUERY_RESET, 1); OUT_RING (chan, 1); - BEGIN_RING(chan, rankine, NV34TCL_QUERY_UNK17CC, 1); + BEGIN_RING(chan, eng3d, NV34TCL_QUERY_UNK17CC, 1); OUT_RING (chan, 1); q->ready = FALSE; @@ -74,10 +74,10 @@ nv30_query_end(struct pipe_context *pipe, struct pipe_query *pq) struct nv30_context *nv30 = nv30_context(pipe); struct nv30_screen *screen = nv30->screen; struct nouveau_channel *chan = screen->base.channel; - struct nouveau_grobj *rankine = screen->rankine; + struct nouveau_grobj *eng3d = screen->eng3d; struct nv30_query *q = nv30_query(pq); - BEGIN_RING(chan, rankine, NV34TCL_QUERY_GET, 1); + BEGIN_RING(chan, eng3d, NV34TCL_QUERY_GET, 1); OUT_RING (chan, (0x01 << NV34TCL_QUERY_GET_UNK24_SHIFT) | ((q->object->start * 32) << NV34TCL_QUERY_GET_OFFSET_SHIFT)); FIRE_RING(chan); diff --git a/src/gallium/drivers/nv30/nv30_screen.c b/src/gallium/drivers/nv30/nv30_screen.c index db24335b7c..40193f2795 100644 --- a/src/gallium/drivers/nv30/nv30_screen.c +++ b/src/gallium/drivers/nv30/nv30_screen.c @@ -177,7 +177,7 @@ nv30_screen_destroy(struct pipe_screen *pscreen) nouveau_resource_destroy(&screen->query_heap); nouveau_notifier_free(&screen->query); nouveau_notifier_free(&screen->sync); - nouveau_grobj_free(&screen->rankine); + nouveau_grobj_free(&screen->eng3d); nv04_surface_2d_takedown(&screen->eng2d); nouveau_screen_fini(&screen->base); @@ -192,7 +192,7 @@ nv30_screen_create(struct pipe_winsys *ws, struct nouveau_device *dev) struct nouveau_channel *chan; struct pipe_screen *pscreen; struct nouveau_stateobj *so; - unsigned rankine_class = 0; + unsigned eng3d_class = 0; int ret, i; if (!screen) @@ -219,25 +219,25 @@ nv30_screen_create(struct pipe_winsys *ws, struct nouveau_device *dev) switch (dev->chipset & 0xf0) { case 0x30: if (NV30TCL_CHIPSET_3X_MASK & (1 << (dev->chipset & 0x0f))) - rankine_class = 0x0397; + eng3d_class = 0x0397; else if (NV34TCL_CHIPSET_3X_MASK & (1 << (dev->chipset & 0x0f))) - rankine_class = 0x0697; + eng3d_class = 0x0697; else if (NV35TCL_CHIPSET_3X_MASK & (1 << (dev->chipset & 0x0f))) - rankine_class = 0x0497; + eng3d_class = 0x0497; break; default: break; } - if (!rankine_class) { + if (!eng3d_class) { NOUVEAU_ERR("Unknown nv3x chipset: nv%02x\n", dev->chipset); return NULL; } - ret = nouveau_grobj_alloc(chan, 0xbeef3097, rankine_class, - &screen->rankine); + ret = nouveau_grobj_alloc(chan, 0xbeef3097, eng3d_class, + &screen->eng3d); if (ret) { NOUVEAU_ERR("Error creating 3D object: %d\n", ret); return FALSE; @@ -277,80 +277,80 @@ nv30_screen_create(struct pipe_winsys *ws, struct nouveau_device *dev) return NULL; } - /* Static rankine initialisation */ + /* Static eng3d initialisation */ so = so_new(36, 60, 0); - so_method(so, screen->rankine, NV34TCL_DMA_NOTIFY, 1); + so_method(so, screen->eng3d, NV34TCL_DMA_NOTIFY, 1); so_data (so, screen->sync->handle); - so_method(so, screen->rankine, NV34TCL_DMA_TEXTURE0, 2); + so_method(so, screen->eng3d, NV34TCL_DMA_TEXTURE0, 2); so_data (so, chan->vram->handle); so_data (so, chan->gart->handle); - so_method(so, screen->rankine, NV34TCL_DMA_COLOR1, 1); + so_method(so, screen->eng3d, NV34TCL_DMA_COLOR1, 1); so_data (so, chan->vram->handle); - so_method(so, screen->rankine, NV34TCL_DMA_COLOR0, 2); + so_method(so, screen->eng3d, NV34TCL_DMA_COLOR0, 2); so_data (so, chan->vram->handle); so_data (so, chan->vram->handle); - so_method(so, screen->rankine, NV34TCL_DMA_VTXBUF0, 2); + so_method(so, screen->eng3d, NV34TCL_DMA_VTXBUF0, 2); so_data (so, chan->vram->handle); so_data (so, chan->gart->handle); -/* so_method(so, screen->rankine, NV34TCL_DMA_FENCE, 2); +/* so_method(so, screen->eng3d, NV34TCL_DMA_FENCE, 2); so_data (so, 0); so_data (so, screen->query->handle);*/ - so_method(so, screen->rankine, NV34TCL_DMA_IN_MEMORY7, 1); + so_method(so, screen->eng3d, NV34TCL_DMA_IN_MEMORY7, 1); so_data (so, chan->vram->handle); - so_method(so, screen->rankine, NV34TCL_DMA_IN_MEMORY8, 1); + so_method(so, screen->eng3d, NV34TCL_DMA_IN_MEMORY8, 1); so_data (so, chan->vram->handle); for (i=1; i<8; i++) { - so_method(so, screen->rankine, NV34TCL_VIEWPORT_CLIP_HORIZ(i), 1); + so_method(so, screen->eng3d, NV34TCL_VIEWPORT_CLIP_HORIZ(i), 1); so_data (so, 0); - so_method(so, screen->rankine, NV34TCL_VIEWPORT_CLIP_VERT(i), 1); + so_method(so, screen->eng3d, NV34TCL_VIEWPORT_CLIP_VERT(i), 1); so_data (so, 0); } - so_method(so, screen->rankine, 0x220, 1); + so_method(so, screen->eng3d, 0x220, 1); so_data (so, 1); - so_method(so, screen->rankine, 0x03b0, 1); + so_method(so, screen->eng3d, 0x03b0, 1); so_data (so, 0x00100000); - so_method(so, screen->rankine, 0x1454, 1); + so_method(so, screen->eng3d, 0x1454, 1); so_data (so, 0); - so_method(so, screen->rankine, 0x1d80, 1); + so_method(so, screen->eng3d, 0x1d80, 1); so_data (so, 3); - so_method(so, screen->rankine, 0x1450, 1); + so_method(so, screen->eng3d, 0x1450, 1); so_data (so, 0x00030004); /* NEW */ - so_method(so, screen->rankine, 0x1e98, 1); + so_method(so, screen->eng3d, 0x1e98, 1); so_data (so, 0); - so_method(so, screen->rankine, 0x17e0, 3); + so_method(so, screen->eng3d, 0x17e0, 3); so_data (so, fui(0.0)); so_data (so, fui(0.0)); so_data (so, fui(1.0)); - so_method(so, screen->rankine, 0x1f80, 16); + so_method(so, screen->eng3d, 0x1f80, 16); for (i=0; i<16; i++) { so_data (so, (i==8) ? 0x0000ffff : 0); } - so_method(so, screen->rankine, 0x120, 3); + so_method(so, screen->eng3d, 0x120, 3); so_data (so, 0); so_data (so, 1); so_data (so, 2); - so_method(so, screen->rankine, 0x1d88, 1); + so_method(so, screen->eng3d, 0x1d88, 1); so_data (so, 0x00001200); - so_method(so, screen->rankine, NV34TCL_RC_ENABLE, 1); + so_method(so, screen->eng3d, NV34TCL_RC_ENABLE, 1); so_data (so, 0); - so_method(so, screen->rankine, NV34TCL_DEPTH_RANGE_NEAR, 2); + so_method(so, screen->eng3d, NV34TCL_DEPTH_RANGE_NEAR, 2); so_data (so, fui(0.0)); so_data (so, fui(1.0)); - so_method(so, screen->rankine, NV34TCL_MULTISAMPLE_CONTROL, 1); + so_method(so, screen->eng3d, NV34TCL_MULTISAMPLE_CONTROL, 1); so_data (so, 0xffff0000); /* enables use of vp rather than fixed-function somehow */ - so_method(so, screen->rankine, 0x1e94, 1); + so_method(so, screen->eng3d, 0x1e94, 1); so_data (so, 0x13); so_emit(chan, so); diff --git a/src/gallium/drivers/nv30/nv30_screen.h b/src/gallium/drivers/nv30/nv30_screen.h index b7856cdf00..69a94593f9 100644 --- a/src/gallium/drivers/nv30/nv30_screen.h +++ b/src/gallium/drivers/nv30/nv30_screen.h @@ -14,7 +14,7 @@ struct nv30_screen { /* HW graphics objects */ struct nv04_surface_2d *eng2d; - struct nouveau_grobj *rankine; + struct nouveau_grobj *eng3d; struct nouveau_notifier *sync; /* Query object resources */ diff --git a/src/gallium/drivers/nv30/nv30_state.c b/src/gallium/drivers/nv30/nv30_state.c index 24b15a63ac..330448000b 100644 --- a/src/gallium/drivers/nv30/nv30_state.c +++ b/src/gallium/drivers/nv30/nv30_state.c @@ -12,12 +12,12 @@ nv30_blend_state_create(struct pipe_context *pipe, const struct pipe_blend_state *cso) { struct nv30_context *nv30 = nv30_context(pipe); - struct nouveau_grobj *rankine = nv30->screen->rankine; + struct nouveau_grobj *eng3d = nv30->screen->eng3d; struct nv30_blend_state *bso = CALLOC(1, sizeof(*bso)); struct nouveau_stateobj *so = so_new(5, 8, 0); if (cso->rt[0].blend_enable) { - so_method(so, rankine, NV34TCL_BLEND_FUNC_ENABLE, 3); + so_method(so, eng3d, NV34TCL_BLEND_FUNC_ENABLE, 3); so_data (so, 1); so_data (so, (nvgl_blend_func(cso->rt[0].alpha_src_factor) << 16) | nvgl_blend_func(cso->rt[0].rgb_src_factor)); @@ -25,29 +25,29 @@ nv30_blend_state_create(struct pipe_context *pipe, nvgl_blend_func(cso->rt[0].rgb_dst_factor)); /* FIXME: Gallium assumes GL_EXT_blend_func_separate. It is not the case for NV30 */ - so_method(so, rankine, NV34TCL_BLEND_EQUATION, 1); + so_method(so, eng3d, NV34TCL_BLEND_EQUATION, 1); so_data (so, nvgl_blend_eqn(cso->rt[0].rgb_func)); } else { - so_method(so, rankine, NV34TCL_BLEND_FUNC_ENABLE, 1); + so_method(so, eng3d, NV34TCL_BLEND_FUNC_ENABLE, 1); so_data (so, 0); } - so_method(so, rankine, NV34TCL_COLOR_MASK, 1); + so_method(so, eng3d, NV34TCL_COLOR_MASK, 1); so_data (so, (((cso->rt[0].colormask & PIPE_MASK_A) ? (0x01 << 24) : 0) | ((cso->rt[0].colormask & PIPE_MASK_R) ? (0x01 << 16) : 0) | ((cso->rt[0].colormask & PIPE_MASK_G) ? (0x01 << 8) : 0) | ((cso->rt[0].colormask & PIPE_MASK_B) ? (0x01 << 0) : 0))); if (cso->logicop_enable) { - so_method(so, rankine, NV34TCL_COLOR_LOGIC_OP_ENABLE, 2); + so_method(so, eng3d, NV34TCL_COLOR_LOGIC_OP_ENABLE, 2); so_data (so, 1); so_data (so, nvgl_logicop_func(cso->logicop_func)); } else { - so_method(so, rankine, NV34TCL_COLOR_LOGIC_OP_ENABLE, 1); + so_method(so, eng3d, NV34TCL_COLOR_LOGIC_OP_ENABLE, 1); so_data (so, 0); } - so_method(so, rankine, NV34TCL_DITHER_ENABLE, 1); + so_method(so, eng3d, NV34TCL_DITHER_ENABLE, 1); so_data (so, cso->dither ? 1 : 0); so_ref(so, &bso->so); @@ -301,7 +301,7 @@ nv30_rasterizer_state_create(struct pipe_context *pipe, struct nv30_context *nv30 = nv30_context(pipe); struct nv30_rasterizer_state *rsso = CALLOC(1, sizeof(*rsso)); struct nouveau_stateobj *so = so_new(9, 19, 0); - struct nouveau_grobj *rankine = nv30->screen->rankine; + struct nouveau_grobj *eng3d = nv30->screen->eng3d; /*XXX: ignored: * light_twoside @@ -309,22 +309,22 @@ nv30_rasterizer_state_create(struct pipe_context *pipe, * multisample */ - so_method(so, rankine, NV34TCL_SHADE_MODEL, 1); + so_method(so, eng3d, NV34TCL_SHADE_MODEL, 1); so_data (so, cso->flatshade ? NV34TCL_SHADE_MODEL_FLAT : NV34TCL_SHADE_MODEL_SMOOTH); - so_method(so, rankine, NV34TCL_LINE_WIDTH, 2); + so_method(so, eng3d, NV34TCL_LINE_WIDTH, 2); so_data (so, (unsigned char)(cso->line_width * 8.0) & 0xff); so_data (so, cso->line_smooth ? 1 : 0); - so_method(so, rankine, NV34TCL_LINE_STIPPLE_ENABLE, 2); + so_method(so, eng3d, NV34TCL_LINE_STIPPLE_ENABLE, 2); so_data (so, cso->line_stipple_enable ? 1 : 0); so_data (so, (cso->line_stipple_pattern << 16) | cso->line_stipple_factor); - so_method(so, rankine, NV34TCL_POINT_SIZE, 1); + so_method(so, eng3d, NV34TCL_POINT_SIZE, 1); so_data (so, fui(cso->point_size)); - so_method(so, rankine, NV34TCL_POLYGON_MODE_FRONT, 6); + so_method(so, eng3d, NV34TCL_POLYGON_MODE_FRONT, 6); if (cso->front_winding == PIPE_WINDING_CCW) { so_data(so, nvgl_polygon_mode(cso->fill_ccw)); so_data(so, nvgl_polygon_mode(cso->fill_cw)); @@ -365,10 +365,10 @@ nv30_rasterizer_state_create(struct pipe_context *pipe, so_data(so, cso->poly_smooth ? 1 : 0); so_data(so, (cso->cull_mode != PIPE_WINDING_NONE) ? 1 : 0); - so_method(so, rankine, NV34TCL_POLYGON_STIPPLE_ENABLE, 1); + so_method(so, eng3d, NV34TCL_POLYGON_STIPPLE_ENABLE, 1); so_data (so, cso->poly_stipple_enable ? 1 : 0); - so_method(so, rankine, NV34TCL_POLYGON_OFFSET_POINT_ENABLE, 3); + so_method(so, eng3d, NV34TCL_POLYGON_OFFSET_POINT_ENABLE, 3); if ((cso->offset_cw && cso->fill_cw == PIPE_POLYGON_MODE_POINT) || (cso->offset_ccw && cso->fill_ccw == PIPE_POLYGON_MODE_POINT)) so_data(so, 1); @@ -385,12 +385,12 @@ nv30_rasterizer_state_create(struct pipe_context *pipe, else so_data(so, 0); if (cso->offset_cw || cso->offset_ccw) { - so_method(so, rankine, NV34TCL_POLYGON_OFFSET_FACTOR, 2); + so_method(so, eng3d, NV34TCL_POLYGON_OFFSET_FACTOR, 2); so_data (so, fui(cso->offset_scale)); so_data (so, fui(cso->offset_units * 2)); } - so_method(so, rankine, NV34TCL_POINT_SPRITE, 1); + so_method(so, eng3d, NV34TCL_POINT_SPRITE, 1); if (cso->point_quad_rasterization) { unsigned psctl = (1 << 0), i; @@ -436,45 +436,45 @@ nv30_depth_stencil_alpha_state_create(struct pipe_context *pipe, struct nv30_context *nv30 = nv30_context(pipe); struct nv30_zsa_state *zsaso = CALLOC(1, sizeof(*zsaso)); struct nouveau_stateobj *so = so_new(6, 20, 0); - struct nouveau_grobj *rankine = nv30->screen->rankine; + struct nouveau_grobj *eng3d = nv30->screen->eng3d; - so_method(so, rankine, NV34TCL_DEPTH_FUNC, 3); + so_method(so, eng3d, NV34TCL_DEPTH_FUNC, 3); so_data (so, nvgl_comparison_op(cso->depth.func)); so_data (so, cso->depth.writemask ? 1 : 0); so_data (so, cso->depth.enabled ? 1 : 0); - so_method(so, rankine, NV34TCL_ALPHA_FUNC_ENABLE, 3); + so_method(so, eng3d, NV34TCL_ALPHA_FUNC_ENABLE, 3); so_data (so, cso->alpha.enabled ? 1 : 0); so_data (so, nvgl_comparison_op(cso->alpha.func)); so_data (so, float_to_ubyte(cso->alpha.ref_value)); if (cso->stencil[0].enabled) { - so_method(so, rankine, NV34TCL_STENCIL_FRONT_ENABLE, 3); + so_method(so, eng3d, NV34TCL_STENCIL_FRONT_ENABLE, 3); so_data (so, cso->stencil[0].enabled ? 1 : 0); so_data (so, cso->stencil[0].writemask); so_data (so, nvgl_comparison_op(cso->stencil[0].func)); - so_method(so, rankine, NV34TCL_STENCIL_FRONT_FUNC_MASK, 4); + so_method(so, eng3d, NV34TCL_STENCIL_FRONT_FUNC_MASK, 4); so_data (so, cso->stencil[0].valuemask); so_data (so, nvgl_stencil_op(cso->stencil[0].fail_op)); so_data (so, nvgl_stencil_op(cso->stencil[0].zfail_op)); so_data (so, nvgl_stencil_op(cso->stencil[0].zpass_op)); } else { - so_method(so, rankine, NV34TCL_STENCIL_FRONT_ENABLE, 1); + so_method(so, eng3d, NV34TCL_STENCIL_FRONT_ENABLE, 1); so_data (so, 0); } if (cso->stencil[1].enabled) { - so_method(so, rankine, NV34TCL_STENCIL_BACK_ENABLE, 3); + so_method(so, eng3d, NV34TCL_STENCIL_BACK_ENABLE, 3); so_data (so, cso->stencil[1].enabled ? 1 : 0); so_data (so, cso->stencil[1].writemask); so_data (so, nvgl_comparison_op(cso->stencil[1].func)); - so_method(so, rankine, NV34TCL_STENCIL_BACK_FUNC_MASK, 4); + so_method(so, eng3d, NV34TCL_STENCIL_BACK_FUNC_MASK, 4); so_data (so, cso->stencil[1].valuemask); so_data (so, nvgl_stencil_op(cso->stencil[1].fail_op)); so_data (so, nvgl_stencil_op(cso->stencil[1].zfail_op)); so_data (so, nvgl_stencil_op(cso->stencil[1].zpass_op)); } else { - so_method(so, rankine, NV34TCL_STENCIL_BACK_ENABLE, 1); + so_method(so, eng3d, NV34TCL_STENCIL_BACK_ENABLE, 1); so_data (so, 0); } diff --git a/src/gallium/drivers/nv30/nv30_state_blend.c b/src/gallium/drivers/nv30/nv30_state_blend.c index c36d58c040..eb0199cf65 100644 --- a/src/gallium/drivers/nv30/nv30_state_blend.c +++ b/src/gallium/drivers/nv30/nv30_state_blend.c @@ -21,7 +21,7 @@ nv30_state_blend_colour_validate(struct nv30_context *nv30) struct nouveau_stateobj *so = so_new(1, 1, 0); struct pipe_blend_color *bcol = &nv30->blend_colour; - so_method(so, nv30->screen->rankine, NV34TCL_BLEND_COLOR, 1); + so_method(so, nv30->screen->eng3d, NV34TCL_BLEND_COLOR, 1); so_data (so, ((float_to_ubyte(bcol->color[3]) << 24) | (float_to_ubyte(bcol->color[0]) << 16) | (float_to_ubyte(bcol->color[1]) << 8) | diff --git a/src/gallium/drivers/nv30/nv30_state_fb.c b/src/gallium/drivers/nv30/nv30_state_fb.c index f7fe9833c7..23d17c0c60 100644 --- a/src/gallium/drivers/nv30/nv30_state_fb.c +++ b/src/gallium/drivers/nv30/nv30_state_fb.c @@ -6,7 +6,7 @@ nv30_state_framebuffer_validate(struct nv30_context *nv30) { struct pipe_framebuffer_state *fb = &nv30->framebuffer; struct nouveau_channel *chan = nv30->screen->base.channel; - struct nouveau_grobj *rankine = nv30->screen->rankine; + struct nouveau_grobj *eng3d = nv30->screen->eng3d; struct nv04_surface *rt[2], *zeta = NULL; uint32_t rt_enable = 0, rt_format = 0; int i, colour_format = 0, zeta_format = 0, depth_only = 0; @@ -110,10 +110,10 @@ nv30_state_framebuffer_validate(struct nv30_context *nv30) } nv30mt = (struct nv30_miptree *) rt0->base.texture; - so_method(so, rankine, NV34TCL_DMA_COLOR0, 1); + so_method(so, eng3d, NV34TCL_DMA_COLOR0, 1); so_reloc (so, nouveau_bo(nv30mt->buffer), 0, rt_flags | NOUVEAU_BO_OR, chan->vram->handle, chan->gart->handle); - so_method(so, rankine, NV34TCL_COLOR0_PITCH, 2); + so_method(so, eng3d, NV34TCL_COLOR0_PITCH, 2); so_data (so, pitch); so_reloc (so, nouveau_bo(nv30mt->buffer), rt0->base.offset, rt_flags | NOUVEAU_BO_LOW, 0, 0); @@ -121,10 +121,10 @@ nv30_state_framebuffer_validate(struct nv30_context *nv30) if (rt_enable & NV34TCL_RT_ENABLE_COLOR1) { nv30mt = (struct nv30_miptree *)rt[1]->base.texture; - so_method(so, rankine, NV34TCL_DMA_COLOR1, 1); + so_method(so, eng3d, NV34TCL_DMA_COLOR1, 1); so_reloc (so, nouveau_bo(nv30mt->buffer), 0, rt_flags | NOUVEAU_BO_OR, chan->vram->handle, chan->gart->handle); - so_method(so, rankine, NV34TCL_COLOR1_OFFSET, 2); + so_method(so, eng3d, NV34TCL_COLOR1_OFFSET, 2); so_reloc (so, nouveau_bo(nv30mt->buffer), rt[1]->base.offset, rt_flags | NOUVEAU_BO_LOW, 0, 0); so_data (so, rt[1]->pitch); @@ -132,31 +132,31 @@ nv30_state_framebuffer_validate(struct nv30_context *nv30) if (zeta_format) { nv30mt = (struct nv30_miptree *)zeta->base.texture; - so_method(so, rankine, NV34TCL_DMA_ZETA, 1); + so_method(so, eng3d, NV34TCL_DMA_ZETA, 1); so_reloc (so, nouveau_bo(nv30mt->buffer), 0, rt_flags | NOUVEAU_BO_OR, chan->vram->handle, chan->gart->handle); - so_method(so, rankine, NV34TCL_ZETA_OFFSET, 1); + so_method(so, eng3d, NV34TCL_ZETA_OFFSET, 1); so_reloc (so, nouveau_bo(nv30mt->buffer), zeta->base.offset, rt_flags | NOUVEAU_BO_LOW, 0, 0); /* TODO: allocate LMA depth buffer */ } - so_method(so, rankine, NV34TCL_RT_ENABLE, 1); + so_method(so, eng3d, NV34TCL_RT_ENABLE, 1); so_data (so, rt_enable); - so_method(so, rankine, NV34TCL_RT_HORIZ, 3); + so_method(so, eng3d, NV34TCL_RT_HORIZ, 3); so_data (so, (w << 16) | 0); so_data (so, (h << 16) | 0); so_data (so, rt_format); - so_method(so, rankine, NV34TCL_VIEWPORT_HORIZ, 2); + so_method(so, eng3d, NV34TCL_VIEWPORT_HORIZ, 2); so_data (so, (w << 16) | 0); so_data (so, (h << 16) | 0); - so_method(so, rankine, NV34TCL_VIEWPORT_CLIP_HORIZ(0), 2); + so_method(so, eng3d, NV34TCL_VIEWPORT_CLIP_HORIZ(0), 2); so_data (so, ((w - 1) << 16) | 0); so_data (so, ((h - 1) << 16) | 0); - so_method(so, rankine, 0x1d88, 1); + so_method(so, eng3d, 0x1d88, 1); so_data (so, (1 << 12) | h); /* Wonder why this is needed, context should all be set to zero on init */ - so_method(so, rankine, NV34TCL_VIEWPORT_TX_ORIGIN, 1); + so_method(so, eng3d, NV34TCL_VIEWPORT_TX_ORIGIN, 1); so_data (so, 0); so_ref(so, &nv30->state.hw[NV30_STATE_FB]); diff --git a/src/gallium/drivers/nv30/nv30_state_scissor.c b/src/gallium/drivers/nv30/nv30_state_scissor.c index ba61a9e24a..f58bb0161e 100644 --- a/src/gallium/drivers/nv30/nv30_state_scissor.c +++ b/src/gallium/drivers/nv30/nv30_state_scissor.c @@ -13,7 +13,7 @@ nv30_state_scissor_validate(struct nv30_context *nv30) nv30->state.scissor_enabled = rast->scissor; so = so_new(1, 2, 0); - so_method(so, nv30->screen->rankine, NV34TCL_SCISSOR_HORIZ, 2); + so_method(so, nv30->screen->eng3d, NV34TCL_SCISSOR_HORIZ, 2); if (nv30->state.scissor_enabled) { so_data (so, ((s->maxx - s->minx) << 16) | s->minx); so_data (so, ((s->maxy - s->miny) << 16) | s->miny); diff --git a/src/gallium/drivers/nv30/nv30_state_stipple.c b/src/gallium/drivers/nv30/nv30_state_stipple.c index ed520a4f43..46a6975438 100644 --- a/src/gallium/drivers/nv30/nv30_state_stipple.c +++ b/src/gallium/drivers/nv30/nv30_state_stipple.c @@ -4,7 +4,7 @@ static boolean nv30_state_stipple_validate(struct nv30_context *nv30) { struct pipe_rasterizer_state *rast = &nv30->rasterizer->pipe; - struct nouveau_grobj *rankine = nv30->screen->rankine; + struct nouveau_grobj *eng3d = nv30->screen->eng3d; struct nouveau_stateobj *so; if (nv30->state.hw[NV30_STATE_STIPPLE] && @@ -15,14 +15,14 @@ nv30_state_stipple_validate(struct nv30_context *nv30) unsigned i; so = so_new(2, 33, 0); - so_method(so, rankine, NV34TCL_POLYGON_STIPPLE_ENABLE, 1); + so_method(so, eng3d, NV34TCL_POLYGON_STIPPLE_ENABLE, 1); so_data (so, 1); - so_method(so, rankine, NV34TCL_POLYGON_STIPPLE_PATTERN(0), 32); + so_method(so, eng3d, NV34TCL_POLYGON_STIPPLE_PATTERN(0), 32); for (i = 0; i < 32; i++) so_data(so, nv30->stipple[i]); } else { so = so_new(1, 1, 0); - so_method(so, rankine, NV34TCL_POLYGON_STIPPLE_ENABLE, 1); + so_method(so, eng3d, NV34TCL_POLYGON_STIPPLE_ENABLE, 1); so_data (so, 0); } diff --git a/src/gallium/drivers/nv30/nv30_state_viewport.c b/src/gallium/drivers/nv30/nv30_state_viewport.c index 6fccd6b60e..66fc112f3c 100644 --- a/src/gallium/drivers/nv30/nv30_state_viewport.c +++ b/src/gallium/drivers/nv30/nv30_state_viewport.c @@ -11,7 +11,7 @@ nv30_state_viewport_validate(struct nv30_context *nv30) return FALSE; so = so_new(3, 10, 0); - so_method(so, nv30->screen->rankine, + so_method(so, nv30->screen->eng3d, NV34TCL_VIEWPORT_TRANSLATE_X, 8); so_data (so, fui(vpt->translate[0])); so_data (so, fui(vpt->translate[1])); @@ -21,11 +21,11 @@ nv30_state_viewport_validate(struct nv30_context *nv30) so_data (so, fui(vpt->scale[1])); so_data (so, fui(vpt->scale[2])); so_data (so, fui(vpt->scale[3])); -/* so_method(so, nv30->screen->rankine, 0x1d78, 1); +/* so_method(so, nv30->screen->eng3d, 0x1d78, 1); so_data (so, 1); */ /* TODO/FIXME: never saw value 0x0110 in renouveau dumps, only 0x0001 */ - so_method(so, nv30->screen->rankine, 0x1d78, 1); + so_method(so, nv30->screen->eng3d, 0x1d78, 1); so_data (so, 1); so_ref(so, &nv30->state.hw[NV30_STATE_VIEWPORT]); diff --git a/src/gallium/drivers/nv30/nv30_state_zsa.c b/src/gallium/drivers/nv30/nv30_state_zsa.c index 88cd74f180..b0aac8ee46 100644 --- a/src/gallium/drivers/nv30/nv30_state_zsa.c +++ b/src/gallium/drivers/nv30/nv30_state_zsa.c @@ -22,9 +22,9 @@ nv30_state_sr_validate(struct nv30_context *nv30) struct nouveau_stateobj *so = so_new(2, 2, 0); struct pipe_stencil_ref *sr = &nv30->stencil_ref; - so_method(so, nv30->screen->rankine, NV34TCL_STENCIL_FRONT_FUNC_REF, 1); + so_method(so, nv30->screen->eng3d, NV34TCL_STENCIL_FRONT_FUNC_REF, 1); so_data (so, sr->ref_value[0]); - so_method(so, nv30->screen->rankine, NV34TCL_STENCIL_BACK_FUNC_REF, 1); + so_method(so, nv30->screen->eng3d, NV34TCL_STENCIL_BACK_FUNC_REF, 1); so_data (so, sr->ref_value[1]); so_ref(so, &nv30->state.hw[NV30_STATE_SR]); diff --git a/src/gallium/drivers/nv30/nv30_vbo.c b/src/gallium/drivers/nv30/nv30_vbo.c index f3856bb5a5..c7f119e90a 100644 --- a/src/gallium/drivers/nv30/nv30_vbo.c +++ b/src/gallium/drivers/nv30/nv30_vbo.c @@ -111,7 +111,7 @@ nv30_vbo_static_attrib(struct nv30_context *nv30, struct nouveau_stateobj *so, struct pipe_vertex_buffer *vb) { struct pipe_screen *pscreen = nv30->pipe.screen; - struct nouveau_grobj *rankine = nv30->screen->rankine; + struct nouveau_grobj *eng3d = nv30->screen->eng3d; unsigned type, ncomp; void *map; @@ -128,25 +128,25 @@ nv30_vbo_static_attrib(struct nv30_context *nv30, struct nouveau_stateobj *so, switch (ncomp) { case 4: - so_method(so, rankine, NV34TCL_VTX_ATTR_4F_X(attrib), 4); + so_method(so, eng3d, NV34TCL_VTX_ATTR_4F_X(attrib), 4); so_data (so, fui(v[0])); so_data (so, fui(v[1])); so_data (so, fui(v[2])); so_data (so, fui(v[3])); break; case 3: - so_method(so, rankine, NV34TCL_VTX_ATTR_3F_X(attrib), 3); + so_method(so, eng3d, NV34TCL_VTX_ATTR_3F_X(attrib), 3); so_data (so, fui(v[0])); so_data (so, fui(v[1])); so_data (so, fui(v[2])); break; case 2: - so_method(so, rankine, NV34TCL_VTX_ATTR_2F_X(attrib), 2); + so_method(so, eng3d, NV34TCL_VTX_ATTR_2F_X(attrib), 2); so_data (so, fui(v[0])); so_data (so, fui(v[1])); break; case 1: - so_method(so, rankine, NV34TCL_VTX_ATTR_1F(attrib), 1); + so_method(so, eng3d, NV34TCL_VTX_ATTR_1F(attrib), 1); so_data (so, fui(v[0])); break; default: @@ -171,7 +171,7 @@ nv30_draw_arrays(struct pipe_context *pipe, struct nv30_context *nv30 = nv30_context(pipe); struct nv30_screen *screen = nv30->screen; struct nouveau_channel *chan = screen->base.channel; - struct nouveau_grobj *rankine = screen->rankine; + struct nouveau_grobj *eng3d = screen->eng3d; unsigned restart = 0; nv30_vbo_set_idxbuf(nv30, NULL, 0); @@ -193,12 +193,12 @@ nv30_draw_arrays(struct pipe_context *pipe, continue; } - BEGIN_RING(chan, rankine, NV34TCL_VERTEX_BEGIN_END, 1); + BEGIN_RING(chan, eng3d, NV34TCL_VERTEX_BEGIN_END, 1); OUT_RING (chan, nvgl_primitive(mode)); nr = (vc & 0xff); if (nr) { - BEGIN_RING(chan, rankine, NV34TCL_VB_VERTEX_BATCH, 1); + BEGIN_RING(chan, eng3d, NV34TCL_VB_VERTEX_BATCH, 1); OUT_RING (chan, ((nr - 1) << 24) | start); start += nr; } @@ -209,14 +209,14 @@ nv30_draw_arrays(struct pipe_context *pipe, nr -= push; - BEGIN_RING_NI(chan, rankine, NV34TCL_VB_VERTEX_BATCH, push); + BEGIN_RING_NI(chan, eng3d, NV34TCL_VB_VERTEX_BATCH, push); while (push--) { OUT_RING(chan, ((0x100 - 1) << 24) | start); start += 0x100; } } - BEGIN_RING(chan, rankine, NV34TCL_VERTEX_BEGIN_END, 1); + BEGIN_RING(chan, eng3d, NV34TCL_VERTEX_BEGIN_END, 1); OUT_RING (chan, 0); count -= vc; @@ -232,7 +232,7 @@ nv30_draw_elements_u08(struct nv30_context *nv30, void *ib, { struct nv30_screen *screen = nv30->screen; struct nouveau_channel *chan = screen->base.channel; - struct nouveau_grobj *rankine = screen->rankine; + struct nouveau_grobj *eng3d = screen->eng3d; while (count) { uint8_t *elts = (uint8_t *)ib + start; @@ -248,11 +248,11 @@ nv30_draw_elements_u08(struct nv30_context *nv30, void *ib, } count -= vc; - BEGIN_RING(chan, rankine, NV34TCL_VERTEX_BEGIN_END, 1); + BEGIN_RING(chan, eng3d, NV34TCL_VERTEX_BEGIN_END, 1); OUT_RING (chan, nvgl_primitive(mode)); if (vc & 1) { - BEGIN_RING(chan, rankine, NV34TCL_VB_ELEMENT_U32, 1); + BEGIN_RING(chan, eng3d, NV34TCL_VB_ELEMENT_U32, 1); OUT_RING (chan, elts[0]); elts++; vc--; } @@ -262,7 +262,7 @@ nv30_draw_elements_u08(struct nv30_context *nv30, void *ib, push = MIN2(vc, 2047 * 2); - BEGIN_RING_NI(chan, rankine, NV34TCL_VB_ELEMENT_U16, push >> 1); + BEGIN_RING_NI(chan, eng3d, NV34TCL_VB_ELEMENT_U16, push >> 1); for (i = 0; i < push; i+=2) OUT_RING(chan, (elts[i+1] << 16) | elts[i]); @@ -270,7 +270,7 @@ nv30_draw_elements_u08(struct nv30_context *nv30, void *ib, elts += push; } - BEGIN_RING(chan, rankine, NV34TCL_VERTEX_BEGIN_END, 1); + BEGIN_RING(chan, eng3d, NV34TCL_VERTEX_BEGIN_END, 1); OUT_RING (chan, 0); start = restart; @@ -283,7 +283,7 @@ nv30_draw_elements_u16(struct nv30_context *nv30, void *ib, { struct nv30_screen *screen = nv30->screen; struct nouveau_channel *chan = screen->base.channel; - struct nouveau_grobj *rankine = screen->rankine; + struct nouveau_grobj *eng3d = screen->eng3d; while (count) { uint16_t *elts = (uint16_t *)ib + start; @@ -299,11 +299,11 @@ nv30_draw_elements_u16(struct nv30_context *nv30, void *ib, } count -= vc; - BEGIN_RING(chan, rankine, NV34TCL_VERTEX_BEGIN_END, 1); + BEGIN_RING(chan, eng3d, NV34TCL_VERTEX_BEGIN_END, 1); OUT_RING (chan, nvgl_primitive(mode)); if (vc & 1) { - BEGIN_RING(chan, rankine, NV34TCL_VB_ELEMENT_U32, 1); + BEGIN_RING(chan, eng3d, NV34TCL_VB_ELEMENT_U32, 1); OUT_RING (chan, elts[0]); elts++; vc--; } @@ -313,7 +313,7 @@ nv30_draw_elements_u16(struct nv30_context *nv30, void *ib, push = MIN2(vc, 2047 * 2); - BEGIN_RING_NI(chan, rankine, NV34TCL_VB_ELEMENT_U16, push >> 1); + BEGIN_RING_NI(chan, eng3d, NV34TCL_VB_ELEMENT_U16, push >> 1); for (i = 0; i < push; i+=2) OUT_RING(chan, (elts[i+1] << 16) | elts[i]); @@ -321,7 +321,7 @@ nv30_draw_elements_u16(struct nv30_context *nv30, void *ib, elts += push; } - BEGIN_RING(chan, rankine, NV34TCL_VERTEX_BEGIN_END, 1); + BEGIN_RING(chan, eng3d, NV34TCL_VERTEX_BEGIN_END, 1); OUT_RING (chan, 0); start = restart; @@ -334,7 +334,7 @@ nv30_draw_elements_u32(struct nv30_context *nv30, void *ib, { struct nv30_screen *screen = nv30->screen; struct nouveau_channel *chan = screen->base.channel; - struct nouveau_grobj *rankine = screen->rankine; + struct nouveau_grobj *eng3d = screen->eng3d; while (count) { uint32_t *elts = (uint32_t *)ib + start; @@ -350,20 +350,20 @@ nv30_draw_elements_u32(struct nv30_context *nv30, void *ib, } count -= vc; - BEGIN_RING(chan, rankine, NV34TCL_VERTEX_BEGIN_END, 1); + BEGIN_RING(chan, eng3d, NV34TCL_VERTEX_BEGIN_END, 1); OUT_RING (chan, nvgl_primitive(mode)); while (vc) { push = MIN2(vc, 2047); - BEGIN_RING_NI(chan, rankine, NV34TCL_VB_ELEMENT_U32, push); + BEGIN_RING_NI(chan, eng3d, NV34TCL_VB_ELEMENT_U32, push); OUT_RINGp (chan, elts, push); vc -= push; elts += push; } - BEGIN_RING(chan, rankine, NV34TCL_VERTEX_BEGIN_END, 1); + BEGIN_RING(chan, eng3d, NV34TCL_VERTEX_BEGIN_END, 1); OUT_RING (chan, 0); start = restart; @@ -410,7 +410,7 @@ nv30_draw_elements_vbo(struct pipe_context *pipe, struct nv30_context *nv30 = nv30_context(pipe); struct nv30_screen *screen = nv30->screen; struct nouveau_channel *chan = screen->base.channel; - struct nouveau_grobj *rankine = screen->rankine; + struct nouveau_grobj *eng3d = screen->eng3d; unsigned restart = 0; while (count) { @@ -425,12 +425,12 @@ nv30_draw_elements_vbo(struct pipe_context *pipe, continue; } - BEGIN_RING(chan, rankine, NV34TCL_VERTEX_BEGIN_END, 1); + BEGIN_RING(chan, eng3d, NV34TCL_VERTEX_BEGIN_END, 1); OUT_RING (chan, nvgl_primitive(mode)); nr = (vc & 0xff); if (nr) { - BEGIN_RING(chan, rankine, NV34TCL_VB_INDEX_BATCH, 1); + BEGIN_RING(chan, eng3d, NV34TCL_VB_INDEX_BATCH, 1); OUT_RING (chan, ((nr - 1) << 24) | start); start += nr; } @@ -441,14 +441,14 @@ nv30_draw_elements_vbo(struct pipe_context *pipe, nr -= push; - BEGIN_RING_NI(chan, rankine, NV34TCL_VB_INDEX_BATCH, push); + BEGIN_RING_NI(chan, eng3d, NV34TCL_VB_INDEX_BATCH, push); while (push--) { OUT_RING(chan, ((0x100 - 1) << 24) | start); start += 0x100; } } - BEGIN_RING(chan, rankine, NV34TCL_VERTEX_BEGIN_END, 1); + BEGIN_RING(chan, eng3d, NV34TCL_VERTEX_BEGIN_END, 1); OUT_RING (chan, 0); count -= vc; @@ -485,16 +485,16 @@ static boolean nv30_vbo_validate(struct nv30_context *nv30) { struct nouveau_stateobj *vtxbuf, *vtxfmt, *sattr = NULL; - struct nouveau_grobj *rankine = nv30->screen->rankine; + struct nouveau_grobj *eng3d = nv30->screen->eng3d; struct pipe_buffer *ib = nv30->idxbuf; unsigned ib_format = nv30->idxbuf_format; unsigned vb_flags = NOUVEAU_BO_VRAM | NOUVEAU_BO_GART | NOUVEAU_BO_RD; int hw; vtxbuf = so_new(3, 17, 18); - so_method(vtxbuf, rankine, NV34TCL_VTXBUF_ADDRESS(0), nv30->vtxelt->num_elements); + so_method(vtxbuf, eng3d, NV34TCL_VTXBUF_ADDRESS(0), nv30->vtxelt->num_elements); vtxfmt = so_new(1, 16, 0); - so_method(vtxfmt, rankine, NV34TCL_VTXFMT(0), nv30->vtxelt->num_elements); + so_method(vtxfmt, eng3d, NV34TCL_VTXFMT(0), nv30->vtxelt->num_elements); for (hw = 0; hw < nv30->vtxelt->num_elements; hw++) { struct pipe_vertex_element *ve; @@ -532,13 +532,13 @@ nv30_vbo_validate(struct nv30_context *nv30) if (ib) { struct nouveau_bo *bo = nouveau_bo(ib); - so_method(vtxbuf, rankine, NV34TCL_IDXBUF_ADDRESS, 2); + so_method(vtxbuf, eng3d, NV34TCL_IDXBUF_ADDRESS, 2); so_reloc (vtxbuf, bo, 0, vb_flags | NOUVEAU_BO_LOW, 0, 0); so_reloc (vtxbuf, bo, ib_format, vb_flags | NOUVEAU_BO_OR, 0, NV34TCL_IDXBUF_FORMAT_DMA1); } - so_method(vtxbuf, rankine, 0x1710, 1); + so_method(vtxbuf, eng3d, 0x1710, 1); so_data (vtxbuf, 0); so_ref(vtxbuf, &nv30->state.hw[NV30_STATE_VTXBUF]); diff --git a/src/gallium/drivers/nv30/nv30_vertprog.c b/src/gallium/drivers/nv30/nv30_vertprog.c index 809be3712d..f0cecba4c4 100644 --- a/src/gallium/drivers/nv30/nv30_vertprog.c +++ b/src/gallium/drivers/nv30/nv30_vertprog.c @@ -652,7 +652,7 @@ nv30_vertprog_validate(struct nv30_context *nv30) struct pipe_screen *pscreen = nv30->pipe.screen; struct nv30_screen *screen = nv30->screen; struct nouveau_channel *chan = screen->base.channel; - struct nouveau_grobj *rankine = screen->rankine; + struct nouveau_grobj *eng3d = screen->eng3d; struct nv30_vertex_program *vp; struct pipe_buffer *constbuf; boolean upload_code = FALSE, upload_data = FALSE; @@ -687,7 +687,7 @@ nv30_vertprog_validate(struct nv30_context *nv30) } so = so_new(1, 1, 0); - so_method(so, rankine, NV34TCL_VP_START_FROM_ID, 1); + so_method(so, eng3d, NV34TCL_VP_START_FROM_ID, 1); so_data (so, vp->exec->start); so_ref(so, &vp->so); so_ref(NULL, &so); @@ -772,7 +772,7 @@ nv30_vertprog_validate(struct nv30_context *nv30) 4 * sizeof(float)); } - BEGIN_RING(chan, rankine, NV34TCL_VP_UPLOAD_CONST_ID, 5); + BEGIN_RING(chan, eng3d, NV34TCL_VP_UPLOAD_CONST_ID, 5); OUT_RING (chan, i + vp->data->start); OUT_RINGp (chan, (uint32_t *)vpd->value, 4); } @@ -790,10 +790,10 @@ nv30_vertprog_validate(struct nv30_context *nv30) vp->insns[i].data[2], vp->insns[i].data[3]); } #endif - BEGIN_RING(chan, rankine, NV34TCL_VP_UPLOAD_FROM_ID, 1); + BEGIN_RING(chan, eng3d, NV34TCL_VP_UPLOAD_FROM_ID, 1); OUT_RING (chan, vp->exec->start); for (i = 0; i < vp->nr_insns; i++) { - BEGIN_RING(chan, rankine, NV34TCL_VP_UPLOAD_INST(0), 4); + BEGIN_RING(chan, eng3d, NV34TCL_VP_UPLOAD_INST(0), 4); OUT_RINGp (chan, vp->insns[i].data, 4); } } diff --git a/src/gallium/drivers/nv40/nv40_context.c b/src/gallium/drivers/nv40/nv40_context.c index e828f17643..da35676fd5 100644 --- a/src/gallium/drivers/nv40/nv40_context.c +++ b/src/gallium/drivers/nv40/nv40_context.c @@ -11,12 +11,12 @@ nv40_flush(struct pipe_context *pipe, unsigned flags, struct nv40_context *nv40 = nv40_context(pipe); struct nv40_screen *screen = nv40->screen; struct nouveau_channel *chan = screen->base.channel; - struct nouveau_grobj *curie = screen->curie; + struct nouveau_grobj *eng3d = screen->eng3d; if (flags & PIPE_FLUSH_TEXTURE_CACHE) { - BEGIN_RING(chan, curie, 0x1fd8, 1); + BEGIN_RING(chan, eng3d, 0x1fd8, 1); OUT_RING (chan, 2); - BEGIN_RING(chan, curie, 0x1fd8, 1); + BEGIN_RING(chan, eng3d, 0x1fd8, 1); OUT_RING (chan, 1); } diff --git a/src/gallium/drivers/nv40/nv40_draw.c b/src/gallium/drivers/nv40/nv40_draw.c index 849f24fe40..05d237d1bb 100644 --- a/src/gallium/drivers/nv40/nv40_draw.c +++ b/src/gallium/drivers/nv40/nv40_draw.c @@ -33,7 +33,7 @@ nv40_render_vertex(struct nv40_context *nv40, const struct vertex_header *v) { struct nv40_screen *screen = nv40->screen; struct nouveau_channel *chan = screen->base.channel; - struct nouveau_grobj *curie = screen->curie; + struct nouveau_grobj *eng3d = screen->eng3d; unsigned i; for (i = 0; i < nv40->swtnl.nr_attribs; i++) { @@ -44,29 +44,29 @@ nv40_render_vertex(struct nv40_context *nv40, const struct vertex_header *v) case EMIT_OMIT: break; case EMIT_1F: - BEGIN_RING(chan, curie, NV34TCL_VTX_ATTR_1F(hw), 1); + BEGIN_RING(chan, eng3d, NV34TCL_VTX_ATTR_1F(hw), 1); OUT_RING (chan, fui(v->data[idx][0])); break; case EMIT_2F: - BEGIN_RING(chan, curie, NV34TCL_VTX_ATTR_2F_X(hw), 2); + BEGIN_RING(chan, eng3d, NV34TCL_VTX_ATTR_2F_X(hw), 2); OUT_RING (chan, fui(v->data[idx][0])); OUT_RING (chan, fui(v->data[idx][1])); break; case EMIT_3F: - BEGIN_RING(chan, curie, NV34TCL_VTX_ATTR_3F_X(hw), 3); + BEGIN_RING(chan, eng3d, NV34TCL_VTX_ATTR_3F_X(hw), 3); OUT_RING (chan, fui(v->data[idx][0])); OUT_RING (chan, fui(v->data[idx][1])); OUT_RING (chan, fui(v->data[idx][2])); break; case EMIT_4F: - BEGIN_RING(chan, curie, NV34TCL_VTX_ATTR_4F_X(hw), 4); + BEGIN_RING(chan, eng3d, NV34TCL_VTX_ATTR_4F_X(hw), 4); OUT_RING (chan, fui(v->data[idx][0])); OUT_RING (chan, fui(v->data[idx][1])); OUT_RING (chan, fui(v->data[idx][2])); OUT_RING (chan, fui(v->data[idx][3])); break; case EMIT_4UB: - BEGIN_RING(chan, curie, NV34TCL_VTX_ATTR_4UB(hw), 1); + BEGIN_RING(chan, eng3d, NV34TCL_VTX_ATTR_4UB(hw), 1); OUT_RING (chan, pack_ub4(float_to_ubyte(v->data[idx][0]), float_to_ubyte(v->data[idx][1]), float_to_ubyte(v->data[idx][2]), @@ -88,7 +88,7 @@ nv40_render_prim(struct draw_stage *stage, struct prim_header *prim, struct nv40_screen *screen = nv40->screen; struct nouveau_channel *chan = screen->base.channel; - struct nouveau_grobj *curie = screen->curie; + struct nouveau_grobj *eng3d = screen->eng3d; unsigned i; /* Ensure there's room for 4xfloat32 + potentially 3 begin/end */ @@ -104,11 +104,11 @@ nv40_render_prim(struct draw_stage *stage, struct prim_header *prim, /* Switch primitive modes if necessary */ if (rs->prim != mode) { if (rs->prim != NV34TCL_VERTEX_BEGIN_END_STOP) { - BEGIN_RING(chan, curie, NV34TCL_VERTEX_BEGIN_END, 1); + BEGIN_RING(chan, eng3d, NV34TCL_VERTEX_BEGIN_END, 1); OUT_RING (chan, NV34TCL_VERTEX_BEGIN_END_STOP); } - BEGIN_RING(chan, curie, NV34TCL_VERTEX_BEGIN_END, 1); + BEGIN_RING(chan, eng3d, NV34TCL_VERTEX_BEGIN_END, 1); OUT_RING (chan, mode); rs->prim = mode; } @@ -121,7 +121,7 @@ nv40_render_prim(struct draw_stage *stage, struct prim_header *prim, * off the primitive now. */ if (AVAIL_RING(chan) < ((count * 20) + 6)) { - BEGIN_RING(chan, curie, NV34TCL_VERTEX_BEGIN_END, 1); + BEGIN_RING(chan, eng3d, NV34TCL_VERTEX_BEGIN_END, 1); OUT_RING (chan, NV34TCL_VERTEX_BEGIN_END_STOP); rs->prim = NV34TCL_VERTEX_BEGIN_END_STOP; } @@ -152,10 +152,10 @@ nv40_render_flush(struct draw_stage *draw, unsigned flags) struct nv40_context *nv40 = rs->nv40; struct nv40_screen *screen = nv40->screen; struct nouveau_channel *chan = screen->base.channel; - struct nouveau_grobj *curie = screen->curie; + struct nouveau_grobj *eng3d = screen->eng3d; if (rs->prim != NV34TCL_VERTEX_BEGIN_END_STOP) { - BEGIN_RING(chan, curie, NV34TCL_VERTEX_BEGIN_END, 1); + BEGIN_RING(chan, eng3d, NV34TCL_VERTEX_BEGIN_END, 1); OUT_RING (chan, NV34TCL_VERTEX_BEGIN_END_STOP); rs->prim = NV34TCL_VERTEX_BEGIN_END_STOP; } diff --git a/src/gallium/drivers/nv40/nv40_fragprog.c b/src/gallium/drivers/nv40/nv40_fragprog.c index d881fea6f5..3d08828bea 100644 --- a/src/gallium/drivers/nv40/nv40_fragprog.c +++ b/src/gallium/drivers/nv40/nv40_fragprog.c @@ -920,12 +920,12 @@ nv40_fragprog_validate(struct nv40_context *nv40) nv40_fragprog_upload(nv40, fp); so = so_new(2, 2, 1); - so_method(so, nv40->screen->curie, NV34TCL_FP_ACTIVE_PROGRAM, 1); + so_method(so, nv40->screen->eng3d, NV34TCL_FP_ACTIVE_PROGRAM, 1); so_reloc (so, nouveau_bo(fp->buffer), 0, NOUVEAU_BO_VRAM | NOUVEAU_BO_GART | NOUVEAU_BO_RD | NOUVEAU_BO_LOW | NOUVEAU_BO_OR, NV34TCL_FP_ACTIVE_PROGRAM_DMA0, NV34TCL_FP_ACTIVE_PROGRAM_DMA1); - so_method(so, nv40->screen->curie, NV34TCL_FP_CONTROL, 1); + so_method(so, nv40->screen->eng3d, NV34TCL_FP_CONTROL, 1); so_data (so, fp->fp_control); so_ref(so, &fp->so); so_ref(NULL, &so); diff --git a/src/gallium/drivers/nv40/nv40_fragtex.c b/src/gallium/drivers/nv40/nv40_fragtex.c index 44bf4333bd..4c26f3cb12 100644 --- a/src/gallium/drivers/nv40/nv40_fragtex.c +++ b/src/gallium/drivers/nv40/nv40_fragtex.c @@ -111,7 +111,7 @@ nv40_fragtex_build(struct nv40_context *nv40, int unit) txs = tf->swizzle; so = so_new(2, 9, 2); - so_method(so, nv40->screen->curie, NV34TCL_TX_OFFSET(unit), 8); + so_method(so, nv40->screen->eng3d, NV34TCL_TX_OFFSET(unit), 8); so_reloc (so, bo, 0, tex_flags | NOUVEAU_BO_LOW, 0, 0); so_reloc (so, bo, txf, tex_flags | NOUVEAU_BO_OR, NV34TCL_TX_FORMAT_DMA0, NV34TCL_TX_FORMAT_DMA1); @@ -122,7 +122,7 @@ nv40_fragtex_build(struct nv40_context *nv40, int unit) so_data (so, (pt->width0 << NV34TCL_TX_NPOT_SIZE_W_SHIFT) | pt->height0); so_data (so, ps->bcol); - so_method(so, nv40->screen->curie, NV40TCL_TEX_SIZE1(unit), 1); + so_method(so, nv40->screen->eng3d, NV40TCL_TEX_SIZE1(unit), 1); so_data (so, (pt->depth0 << NV40TCL_TEX_SIZE1_DEPTH_SHIFT) | txp); return so; @@ -142,7 +142,7 @@ nv40_fragtex_validate(struct nv40_context *nv40) samplers &= ~(1 << unit); so = so_new(1, 1, 0); - so_method(so, nv40->screen->curie, NV34TCL_TX_ENABLE(unit), 1); + so_method(so, nv40->screen->eng3d, NV34TCL_TX_ENABLE(unit), 1); so_data (so, 0); so_ref(so, &nv40->state.hw[NV40_STATE_FRAGTEX0 + unit]); state->dirty |= (1ULL << (NV40_STATE_FRAGTEX0 + unit)); diff --git a/src/gallium/drivers/nv40/nv40_query.c b/src/gallium/drivers/nv40/nv40_query.c index 45c5468537..899a8dc0b2 100644 --- a/src/gallium/drivers/nv40/nv40_query.c +++ b/src/gallium/drivers/nv40/nv40_query.c @@ -43,7 +43,7 @@ nv40_query_begin(struct pipe_context *pipe, struct pipe_query *pq) struct nv40_query *q = nv40_query(pq); struct nv40_screen *screen = nv40->screen; struct nouveau_channel *chan = screen->base.channel; - struct nouveau_grobj *curie = screen->curie; + struct nouveau_grobj *eng3d = screen->eng3d; assert(q->type == PIPE_QUERY_OCCLUSION_COUNTER); @@ -60,9 +60,9 @@ nv40_query_begin(struct pipe_context *pipe, struct pipe_query *pq) assert(0); nouveau_notifier_reset(nv40->screen->query, q->object->start); - BEGIN_RING(chan, curie, NV34TCL_QUERY_RESET, 1); + BEGIN_RING(chan, eng3d, NV34TCL_QUERY_RESET, 1); OUT_RING (chan, 1); - BEGIN_RING(chan, curie, NV34TCL_QUERY_UNK17CC, 1); + BEGIN_RING(chan, eng3d, NV34TCL_QUERY_UNK17CC, 1); OUT_RING (chan, 1); q->ready = FALSE; @@ -75,9 +75,9 @@ nv40_query_end(struct pipe_context *pipe, struct pipe_query *pq) struct nv40_query *q = nv40_query(pq); struct nv40_screen *screen = nv40->screen; struct nouveau_channel *chan = screen->base.channel; - struct nouveau_grobj *curie = screen->curie; + struct nouveau_grobj *eng3d = screen->eng3d; - BEGIN_RING(chan, curie, NV34TCL_QUERY_GET, 1); + BEGIN_RING(chan, eng3d, NV34TCL_QUERY_GET, 1); OUT_RING (chan, (0x01 << NV34TCL_QUERY_GET_UNK24_SHIFT) | ((q->object->start * 32) << NV34TCL_QUERY_GET_OFFSET_SHIFT)); FIRE_RING(chan); diff --git a/src/gallium/drivers/nv40/nv40_screen.c b/src/gallium/drivers/nv40/nv40_screen.c index 9c49e2b6ec..3c901c1c53 100644 --- a/src/gallium/drivers/nv40/nv40_screen.c +++ b/src/gallium/drivers/nv40/nv40_screen.c @@ -49,7 +49,7 @@ nv40_screen_get_param(struct pipe_screen *pscreen, int param) case NOUVEAU_CAP_HW_VTXBUF: return 1; case NOUVEAU_CAP_HW_IDXBUF: - if (screen->curie->grclass == NV40TCL) + if (screen->eng3d->grclass == NV40TCL) return 1; return 0; case PIPE_CAP_INDEP_BLEND_ENABLE: @@ -164,7 +164,7 @@ nv40_screen_destroy(struct pipe_screen *pscreen) nouveau_resource_destroy(&screen->query_heap); nouveau_notifier_free(&screen->query); nouveau_notifier_free(&screen->sync); - nouveau_grobj_free(&screen->curie); + nouveau_grobj_free(&screen->eng3d); nv04_surface_2d_takedown(&screen->eng2d); nouveau_screen_fini(&screen->base); @@ -179,7 +179,7 @@ nv40_screen_create(struct pipe_winsys *ws, struct nouveau_device *dev) struct nouveau_channel *chan; struct pipe_screen *pscreen; struct nouveau_stateobj *so; - unsigned curie_class = 0; + unsigned eng3d_class = 0; int ret; if (!screen) @@ -206,23 +206,23 @@ nv40_screen_create(struct pipe_winsys *ws, struct nouveau_device *dev) switch (dev->chipset & 0xf0) { case 0x40: if (NV4X_GRCLASS4097_CHIPSETS & (1 << (dev->chipset & 0x0f))) - curie_class = NV40TCL; + eng3d_class = NV40TCL; else if (NV4X_GRCLASS4497_CHIPSETS & (1 << (dev->chipset & 0x0f))) - curie_class = NV44TCL; + eng3d_class = NV44TCL; break; case 0x60: if (NV6X_GRCLASS4497_CHIPSETS & (1 << (dev->chipset & 0x0f))) - curie_class = NV44TCL; + eng3d_class = NV44TCL; break; } - if (!curie_class) { + if (!eng3d_class) { NOUVEAU_ERR("Unknown nv4x chipset: nv%02x\n", dev->chipset); return NULL; } - ret = nouveau_grobj_alloc(chan, 0xbeef3097, curie_class, &screen->curie); + ret = nouveau_grobj_alloc(chan, 0xbeef3097, eng3d_class, &screen->eng3d); if (ret) { NOUVEAU_ERR("Error creating 3D object: %d\n", ret); return FALSE; @@ -262,52 +262,52 @@ nv40_screen_create(struct pipe_winsys *ws, struct nouveau_device *dev) return NULL; } - /* Static curie initialisation */ + /* Static eng3d initialisation */ so = so_new(16, 25, 0); - so_method(so, screen->curie, NV34TCL_DMA_NOTIFY, 1); + so_method(so, screen->eng3d, NV34TCL_DMA_NOTIFY, 1); so_data (so, screen->sync->handle); - so_method(so, screen->curie, NV34TCL_DMA_TEXTURE0, 2); + so_method(so, screen->eng3d, NV34TCL_DMA_TEXTURE0, 2); so_data (so, chan->vram->handle); so_data (so, chan->gart->handle); - so_method(so, screen->curie, NV34TCL_DMA_COLOR1, 1); + so_method(so, screen->eng3d, NV34TCL_DMA_COLOR1, 1); so_data (so, chan->vram->handle); - so_method(so, screen->curie, NV34TCL_DMA_COLOR0, 2); + so_method(so, screen->eng3d, NV34TCL_DMA_COLOR0, 2); so_data (so, chan->vram->handle); so_data (so, chan->vram->handle); - so_method(so, screen->curie, NV34TCL_DMA_VTXBUF0, 2); + so_method(so, screen->eng3d, NV34TCL_DMA_VTXBUF0, 2); so_data (so, chan->vram->handle); so_data (so, chan->gart->handle); - so_method(so, screen->curie, NV34TCL_DMA_FENCE, 2); + so_method(so, screen->eng3d, NV34TCL_DMA_FENCE, 2); so_data (so, 0); so_data (so, screen->query->handle); - so_method(so, screen->curie, NV34TCL_DMA_IN_MEMORY7, 2); + so_method(so, screen->eng3d, NV34TCL_DMA_IN_MEMORY7, 2); so_data (so, chan->vram->handle); so_data (so, chan->vram->handle); - so_method(so, screen->curie, NV40TCL_DMA_COLOR2, 2); + so_method(so, screen->eng3d, NV40TCL_DMA_COLOR2, 2); so_data (so, chan->vram->handle); so_data (so, chan->vram->handle); - so_method(so, screen->curie, 0x1ea4, 3); + so_method(so, screen->eng3d, 0x1ea4, 3); so_data (so, 0x00000010); so_data (so, 0x01000100); so_data (so, 0xff800006); /* vtxprog output routing */ - so_method(so, screen->curie, 0x1fc4, 1); + so_method(so, screen->eng3d, 0x1fc4, 1); so_data (so, 0x06144321); - so_method(so, screen->curie, 0x1fc8, 2); + so_method(so, screen->eng3d, 0x1fc8, 2); so_data (so, 0xedcba987); so_data (so, 0x00000021); - so_method(so, screen->curie, 0x1fd0, 1); + so_method(so, screen->eng3d, 0x1fd0, 1); so_data (so, 0x00171615); - so_method(so, screen->curie, 0x1fd4, 1); + so_method(so, screen->eng3d, 0x1fd4, 1); so_data (so, 0x001b1a19); - so_method(so, screen->curie, 0x1ef8, 1); + so_method(so, screen->eng3d, 0x1ef8, 1); so_data (so, 0x0020ffff); - so_method(so, screen->curie, 0x1d64, 1); + so_method(so, screen->eng3d, 0x1d64, 1); so_data (so, 0x00d30000); - so_method(so, screen->curie, 0x1e94, 1); + so_method(so, screen->eng3d, 0x1e94, 1); so_data (so, 0x00000001); so_emit(chan, so); diff --git a/src/gallium/drivers/nv40/nv40_screen.h b/src/gallium/drivers/nv40/nv40_screen.h index 2765ab764a..ad0ee63da6 100644 --- a/src/gallium/drivers/nv40/nv40_screen.h +++ b/src/gallium/drivers/nv40/nv40_screen.h @@ -13,7 +13,7 @@ struct nv40_screen { /* HW graphics objects */ struct nv04_surface_2d *eng2d; - struct nouveau_grobj *curie; + struct nouveau_grobj *eng3d; struct nouveau_notifier *sync; /* Query object resources */ diff --git a/src/gallium/drivers/nv40/nv40_state.c b/src/gallium/drivers/nv40/nv40_state.c index 3db000a219..e8076e059b 100644 --- a/src/gallium/drivers/nv40/nv40_state.c +++ b/src/gallium/drivers/nv40/nv40_state.c @@ -14,41 +14,41 @@ nv40_blend_state_create(struct pipe_context *pipe, const struct pipe_blend_state *cso) { struct nv40_context *nv40 = nv40_context(pipe); - struct nouveau_grobj *curie = nv40->screen->curie; + struct nouveau_grobj *eng3d = nv40->screen->eng3d; struct nv40_blend_state *bso = CALLOC(1, sizeof(*bso)); struct nouveau_stateobj *so = so_new(5, 8, 0); if (cso->rt[0].blend_enable) { - so_method(so, curie, NV34TCL_BLEND_FUNC_ENABLE, 3); + so_method(so, eng3d, NV34TCL_BLEND_FUNC_ENABLE, 3); so_data (so, 1); so_data (so, (nvgl_blend_func(cso->rt[0].alpha_src_factor) << 16) | nvgl_blend_func(cso->rt[0].rgb_src_factor)); so_data (so, nvgl_blend_func(cso->rt[0].alpha_dst_factor) << 16 | nvgl_blend_func(cso->rt[0].rgb_dst_factor)); - so_method(so, curie, NV40TCL_BLEND_EQUATION, 1); + so_method(so, eng3d, NV40TCL_BLEND_EQUATION, 1); so_data (so, nvgl_blend_eqn(cso->rt[0].alpha_func) << 16 | nvgl_blend_eqn(cso->rt[0].rgb_func)); } else { - so_method(so, curie, NV34TCL_BLEND_FUNC_ENABLE, 1); + so_method(so, eng3d, NV34TCL_BLEND_FUNC_ENABLE, 1); so_data (so, 0); } - so_method(so, curie, NV34TCL_COLOR_MASK, 1); + so_method(so, eng3d, NV34TCL_COLOR_MASK, 1); so_data (so, (((cso->rt[0].colormask & PIPE_MASK_A) ? (0x01 << 24) : 0) | ((cso->rt[0].colormask & PIPE_MASK_R) ? (0x01 << 16) : 0) | ((cso->rt[0].colormask & PIPE_MASK_G) ? (0x01 << 8) : 0) | ((cso->rt[0].colormask & PIPE_MASK_B) ? (0x01 << 0) : 0))); if (cso->logicop_enable) { - so_method(so, curie, NV34TCL_COLOR_LOGIC_OP_ENABLE, 2); + so_method(so, eng3d, NV34TCL_COLOR_LOGIC_OP_ENABLE, 2); so_data (so, 1); so_data (so, nvgl_logicop_func(cso->logicop_func)); } else { - so_method(so, curie, NV34TCL_COLOR_LOGIC_OP_ENABLE, 1); + so_method(so, eng3d, NV34TCL_COLOR_LOGIC_OP_ENABLE, 1); so_data (so, 0); } - so_method(so, curie, NV34TCL_DITHER_ENABLE, 1); + so_method(so, eng3d, NV34TCL_DITHER_ENABLE, 1); so_data (so, cso->dither ? 1 : 0); so_ref(so, &bso->so); @@ -311,7 +311,7 @@ nv40_rasterizer_state_create(struct pipe_context *pipe, struct nv40_context *nv40 = nv40_context(pipe); struct nv40_rasterizer_state *rsso = CALLOC(1, sizeof(*rsso)); struct nouveau_stateobj *so = so_new(9, 19, 0); - struct nouveau_grobj *curie = nv40->screen->curie; + struct nouveau_grobj *eng3d = nv40->screen->eng3d; /*XXX: ignored: * light_twoside @@ -319,22 +319,22 @@ nv40_rasterizer_state_create(struct pipe_context *pipe, * multisample */ - so_method(so, curie, NV34TCL_SHADE_MODEL, 1); + so_method(so, eng3d, NV34TCL_SHADE_MODEL, 1); so_data (so, cso->flatshade ? NV34TCL_SHADE_MODEL_FLAT : NV34TCL_SHADE_MODEL_SMOOTH); - so_method(so, curie, NV34TCL_LINE_WIDTH, 2); + so_method(so, eng3d, NV34TCL_LINE_WIDTH, 2); so_data (so, (unsigned char)(cso->line_width * 8.0) & 0xff); so_data (so, cso->line_smooth ? 1 : 0); - so_method(so, curie, NV34TCL_LINE_STIPPLE_ENABLE, 2); + so_method(so, eng3d, NV34TCL_LINE_STIPPLE_ENABLE, 2); so_data (so, cso->line_stipple_enable ? 1 : 0); so_data (so, (cso->line_stipple_pattern << 16) | cso->line_stipple_factor); - so_method(so, curie, NV34TCL_POINT_SIZE, 1); + so_method(so, eng3d, NV34TCL_POINT_SIZE, 1); so_data (so, fui(cso->point_size)); - so_method(so, curie, NV34TCL_POLYGON_MODE_FRONT, 6); + so_method(so, eng3d, NV34TCL_POLYGON_MODE_FRONT, 6); if (cso->front_winding == PIPE_WINDING_CCW) { so_data(so, nvgl_polygon_mode(cso->fill_ccw)); so_data(so, nvgl_polygon_mode(cso->fill_cw)); @@ -375,10 +375,10 @@ nv40_rasterizer_state_create(struct pipe_context *pipe, so_data(so, cso->poly_smooth ? 1 : 0); so_data(so, (cso->cull_mode != PIPE_WINDING_NONE) ? 1 : 0); - so_method(so, curie, NV34TCL_POLYGON_STIPPLE_ENABLE, 1); + so_method(so, eng3d, NV34TCL_POLYGON_STIPPLE_ENABLE, 1); so_data (so, cso->poly_stipple_enable ? 1 : 0); - so_method(so, curie, NV34TCL_POLYGON_OFFSET_POINT_ENABLE, 3); + so_method(so, eng3d, NV34TCL_POLYGON_OFFSET_POINT_ENABLE, 3); if ((cso->offset_cw && cso->fill_cw == PIPE_POLYGON_MODE_POINT) || (cso->offset_ccw && cso->fill_ccw == PIPE_POLYGON_MODE_POINT)) so_data(so, 1); @@ -395,12 +395,12 @@ nv40_rasterizer_state_create(struct pipe_context *pipe, else so_data(so, 0); if (cso->offset_cw || cso->offset_ccw) { - so_method(so, curie, NV34TCL_POLYGON_OFFSET_FACTOR, 2); + so_method(so, eng3d, NV34TCL_POLYGON_OFFSET_FACTOR, 2); so_data (so, fui(cso->offset_scale)); so_data (so, fui(cso->offset_units * 2)); } - so_method(so, curie, NV34TCL_POINT_SPRITE, 1); + so_method(so, eng3d, NV34TCL_POINT_SPRITE, 1); if (cso->point_quad_rasterization) { unsigned psctl = (1 << 0), i; @@ -446,45 +446,45 @@ nv40_depth_stencil_alpha_state_create(struct pipe_context *pipe, struct nv40_context *nv40 = nv40_context(pipe); struct nv40_zsa_state *zsaso = CALLOC(1, sizeof(*zsaso)); struct nouveau_stateobj *so = so_new(6, 20, 0); - struct nouveau_grobj *curie = nv40->screen->curie; + struct nouveau_grobj *eng3d = nv40->screen->eng3d; - so_method(so, curie, NV34TCL_DEPTH_FUNC, 3); + so_method(so, eng3d, NV34TCL_DEPTH_FUNC, 3); so_data (so, nvgl_comparison_op(cso->depth.func)); so_data (so, cso->depth.writemask ? 1 : 0); so_data (so, cso->depth.enabled ? 1 : 0); - so_method(so, curie, NV34TCL_ALPHA_FUNC_ENABLE, 3); + so_method(so, eng3d, NV34TCL_ALPHA_FUNC_ENABLE, 3); so_data (so, cso->alpha.enabled ? 1 : 0); so_data (so, nvgl_comparison_op(cso->alpha.func)); so_data (so, float_to_ubyte(cso->alpha.ref_value)); if (cso->stencil[0].enabled) { - so_method(so, curie, NV34TCL_STENCIL_FRONT_ENABLE, 3); + so_method(so, eng3d, NV34TCL_STENCIL_FRONT_ENABLE, 3); so_data (so, cso->stencil[0].enabled ? 1 : 0); so_data (so, cso->stencil[0].writemask); so_data (so, nvgl_comparison_op(cso->stencil[0].func)); - so_method(so, curie, NV34TCL_STENCIL_FRONT_FUNC_MASK, 4); + so_method(so, eng3d, NV34TCL_STENCIL_FRONT_FUNC_MASK, 4); so_data (so, cso->stencil[0].valuemask); so_data (so, nvgl_stencil_op(cso->stencil[0].fail_op)); so_data (so, nvgl_stencil_op(cso->stencil[0].zfail_op)); so_data (so, nvgl_stencil_op(cso->stencil[0].zpass_op)); } else { - so_method(so, curie, NV34TCL_STENCIL_FRONT_ENABLE, 1); + so_method(so, eng3d, NV34TCL_STENCIL_FRONT_ENABLE, 1); so_data (so, 0); } if (cso->stencil[1].enabled) { - so_method(so, curie, NV34TCL_STENCIL_BACK_ENABLE, 3); + so_method(so, eng3d, NV34TCL_STENCIL_BACK_ENABLE, 3); so_data (so, cso->stencil[1].enabled ? 1 : 0); so_data (so, cso->stencil[1].writemask); so_data (so, nvgl_comparison_op(cso->stencil[1].func)); - so_method(so, curie, NV34TCL_STENCIL_BACK_FUNC_MASK, 4); + so_method(so, eng3d, NV34TCL_STENCIL_BACK_FUNC_MASK, 4); so_data (so, cso->stencil[1].valuemask); so_data (so, nvgl_stencil_op(cso->stencil[1].fail_op)); so_data (so, nvgl_stencil_op(cso->stencil[1].zfail_op)); so_data (so, nvgl_stencil_op(cso->stencil[1].zpass_op)); } else { - so_method(so, curie, NV34TCL_STENCIL_BACK_ENABLE, 1); + so_method(so, eng3d, NV34TCL_STENCIL_BACK_ENABLE, 1); so_data (so, 0); } diff --git a/src/gallium/drivers/nv40/nv40_state_blend.c b/src/gallium/drivers/nv40/nv40_state_blend.c index 9da13123ab..83202ec23c 100644 --- a/src/gallium/drivers/nv40/nv40_state_blend.c +++ b/src/gallium/drivers/nv40/nv40_state_blend.c @@ -21,7 +21,7 @@ nv40_state_blend_colour_validate(struct nv40_context *nv40) struct nouveau_stateobj *so = so_new(1, 1, 0); struct pipe_blend_color *bcol = &nv40->blend_colour; - so_method(so, nv40->screen->curie, NV34TCL_BLEND_COLOR, 1); + so_method(so, nv40->screen->eng3d, NV34TCL_BLEND_COLOR, 1); so_data (so, ((float_to_ubyte(bcol->color[3]) << 24) | (float_to_ubyte(bcol->color[0]) << 16) | (float_to_ubyte(bcol->color[1]) << 8) | diff --git a/src/gallium/drivers/nv40/nv40_state_emit.c b/src/gallium/drivers/nv40/nv40_state_emit.c index 297d71f4fa..6ad7a8d4fd 100644 --- a/src/gallium/drivers/nv40/nv40_state_emit.c +++ b/src/gallium/drivers/nv40/nv40_state_emit.c @@ -59,7 +59,7 @@ nv40_state_emit(struct nv40_context *nv40) struct nv40_state *state = &nv40->state; struct nv40_screen *screen = nv40->screen; struct nouveau_channel *chan = screen->base.channel; - struct nouveau_grobj *curie = screen->curie; + struct nouveau_grobj *eng3d = screen->eng3d; unsigned i; uint64_t states; @@ -85,9 +85,9 @@ nv40_state_emit(struct nv40_context *nv40) if (state->dirty & ((1ULL << NV40_STATE_FRAGPROG) | (1ULL << NV40_STATE_FRAGTEX0))) { - BEGIN_RING(chan, curie, NV40TCL_TEX_CACHE_CTL, 1); + BEGIN_RING(chan, eng3d, NV40TCL_TEX_CACHE_CTL, 1); OUT_RING (chan, 2); - BEGIN_RING(chan, curie, NV40TCL_TEX_CACHE_CTL, 1); + BEGIN_RING(chan, eng3d, NV40TCL_TEX_CACHE_CTL, 1); OUT_RING (chan, 1); } diff --git a/src/gallium/drivers/nv40/nv40_state_fb.c b/src/gallium/drivers/nv40/nv40_state_fb.c index 93e91b9e3b..207b70923e 100644 --- a/src/gallium/drivers/nv40/nv40_state_fb.c +++ b/src/gallium/drivers/nv40/nv40_state_fb.c @@ -14,7 +14,7 @@ static boolean nv40_state_framebuffer_validate(struct nv40_context *nv40) { struct nouveau_channel *chan = nv40->screen->base.channel; - struct nouveau_grobj *curie = nv40->screen->curie; + struct nouveau_grobj *eng3d = nv40->screen->eng3d; struct pipe_framebuffer_state *fb = &nv40->framebuffer; struct nv04_surface *rt[4], *zeta; uint32_t rt_enable, rt_format; @@ -85,11 +85,11 @@ nv40_state_framebuffer_validate(struct nv40_context *nv40) } if (rt_enable & NV40TCL_RT_ENABLE_COLOR0) { - so_method(so, curie, NV34TCL_DMA_COLOR0, 1); + so_method(so, eng3d, NV34TCL_DMA_COLOR0, 1); so_reloc (so, nv40_surface_buffer(&rt[0]->base), 0, rt_flags | NOUVEAU_BO_OR, chan->vram->handle, chan->gart->handle); - so_method(so, curie, NV34TCL_COLOR0_PITCH, 2); + so_method(so, eng3d, NV34TCL_COLOR0_PITCH, 2); so_data (so, rt[0]->pitch); so_reloc (so, nv40_surface_buffer(&rt[0]->base), rt[0]->base.offset, rt_flags | NOUVEAU_BO_LOW, @@ -97,11 +97,11 @@ nv40_state_framebuffer_validate(struct nv40_context *nv40) } if (rt_enable & NV40TCL_RT_ENABLE_COLOR1) { - so_method(so, curie, NV34TCL_DMA_COLOR1, 1); + so_method(so, eng3d, NV34TCL_DMA_COLOR1, 1); so_reloc (so, nv40_surface_buffer(&rt[1]->base), 0, rt_flags | NOUVEAU_BO_OR, chan->vram->handle, chan->gart->handle); - so_method(so, curie, NV34TCL_COLOR1_OFFSET, 2); + so_method(so, eng3d, NV34TCL_COLOR1_OFFSET, 2); so_reloc (so, nv40_surface_buffer(&rt[1]->base), rt[1]->base.offset, rt_flags | NOUVEAU_BO_LOW, 0, 0); @@ -109,56 +109,56 @@ nv40_state_framebuffer_validate(struct nv40_context *nv40) } if (rt_enable & NV40TCL_RT_ENABLE_COLOR2) { - so_method(so, curie, NV40TCL_DMA_COLOR2, 1); + so_method(so, eng3d, NV40TCL_DMA_COLOR2, 1); so_reloc (so, nv40_surface_buffer(&rt[2]->base), 0, rt_flags | NOUVEAU_BO_OR, chan->vram->handle, chan->gart->handle); - so_method(so, curie, NV40TCL_COLOR2_OFFSET, 1); + so_method(so, eng3d, NV40TCL_COLOR2_OFFSET, 1); so_reloc (so, nv40_surface_buffer(&rt[2]->base), rt[2]->base.offset, rt_flags | NOUVEAU_BO_LOW, 0, 0); - so_method(so, curie, NV40TCL_COLOR2_PITCH, 1); + so_method(so, eng3d, NV40TCL_COLOR2_PITCH, 1); so_data (so, rt[2]->pitch); } if (rt_enable & NV40TCL_RT_ENABLE_COLOR3) { - so_method(so, curie, NV40TCL_DMA_COLOR3, 1); + so_method(so, eng3d, NV40TCL_DMA_COLOR3, 1); so_reloc (so, nv40_surface_buffer(&rt[3]->base), 0, rt_flags | NOUVEAU_BO_OR, chan->vram->handle, chan->gart->handle); - so_method(so, curie, NV40TCL_COLOR3_OFFSET, 1); + so_method(so, eng3d, NV40TCL_COLOR3_OFFSET, 1); so_reloc (so, nv40_surface_buffer(&rt[3]->base), rt[3]->base.offset, rt_flags | NOUVEAU_BO_LOW, 0, 0); - so_method(so, curie, NV40TCL_COLOR3_PITCH, 1); + so_method(so, eng3d, NV40TCL_COLOR3_PITCH, 1); so_data (so, rt[3]->pitch); } if (zeta_format) { - so_method(so, curie, NV34TCL_DMA_ZETA, 1); + so_method(so, eng3d, NV34TCL_DMA_ZETA, 1); so_reloc (so, nv40_surface_buffer(&zeta->base), 0, rt_flags | NOUVEAU_BO_OR, chan->vram->handle, chan->gart->handle); - so_method(so, curie, NV34TCL_ZETA_OFFSET, 1); + so_method(so, eng3d, NV34TCL_ZETA_OFFSET, 1); so_reloc (so, nv40_surface_buffer(&zeta->base), zeta->base.offset, rt_flags | NOUVEAU_BO_LOW, 0, 0); - so_method(so, curie, NV40TCL_ZETA_PITCH, 1); + so_method(so, eng3d, NV40TCL_ZETA_PITCH, 1); so_data (so, zeta->pitch); } - so_method(so, curie, NV40TCL_RT_ENABLE, 1); + so_method(so, eng3d, NV40TCL_RT_ENABLE, 1); so_data (so, rt_enable); - so_method(so, curie, NV34TCL_RT_HORIZ, 3); + so_method(so, eng3d, NV34TCL_RT_HORIZ, 3); so_data (so, (w << 16) | 0); so_data (so, (h << 16) | 0); so_data (so, rt_format); - so_method(so, curie, NV34TCL_VIEWPORT_HORIZ, 2); + so_method(so, eng3d, NV34TCL_VIEWPORT_HORIZ, 2); so_data (so, (w << 16) | 0); so_data (so, (h << 16) | 0); - so_method(so, curie, NV34TCL_VIEWPORT_CLIP_HORIZ(0), 2); + so_method(so, eng3d, NV34TCL_VIEWPORT_CLIP_HORIZ(0), 2); so_data (so, ((w - 1) << 16) | 0); so_data (so, ((h - 1) << 16) | 0); - so_method(so, curie, 0x1d88, 1); + so_method(so, eng3d, 0x1d88, 1); so_data (so, (1 << 12) | h); so_ref(so, &nv40->state.hw[NV40_STATE_FB]); diff --git a/src/gallium/drivers/nv40/nv40_state_scissor.c b/src/gallium/drivers/nv40/nv40_state_scissor.c index 91bff4849c..dcb068d059 100644 --- a/src/gallium/drivers/nv40/nv40_state_scissor.c +++ b/src/gallium/drivers/nv40/nv40_state_scissor.c @@ -13,7 +13,7 @@ nv40_state_scissor_validate(struct nv40_context *nv40) nv40->state.scissor_enabled = rast->scissor; so = so_new(1, 2, 0); - so_method(so, nv40->screen->curie, NV34TCL_SCISSOR_HORIZ, 2); + so_method(so, nv40->screen->eng3d, NV34TCL_SCISSOR_HORIZ, 2); if (nv40->state.scissor_enabled) { so_data (so, ((s->maxx - s->minx) << 16) | s->minx); so_data (so, ((s->maxy - s->miny) << 16) | s->miny); diff --git a/src/gallium/drivers/nv40/nv40_state_stipple.c b/src/gallium/drivers/nv40/nv40_state_stipple.c index ed8643b9c1..4514618772 100644 --- a/src/gallium/drivers/nv40/nv40_state_stipple.c +++ b/src/gallium/drivers/nv40/nv40_state_stipple.c @@ -4,7 +4,7 @@ static boolean nv40_state_stipple_validate(struct nv40_context *nv40) { struct pipe_rasterizer_state *rast = &nv40->rasterizer->pipe; - struct nouveau_grobj *curie = nv40->screen->curie; + struct nouveau_grobj *eng3d = nv40->screen->eng3d; struct nouveau_stateobj *so; if (nv40->state.hw[NV40_STATE_STIPPLE] && @@ -15,14 +15,14 @@ nv40_state_stipple_validate(struct nv40_context *nv40) unsigned i; so = so_new(2, 33, 0); - so_method(so, curie, NV34TCL_POLYGON_STIPPLE_ENABLE, 1); + so_method(so, eng3d, NV34TCL_POLYGON_STIPPLE_ENABLE, 1); so_data (so, 1); - so_method(so, curie, NV34TCL_POLYGON_STIPPLE_PATTERN(0), 32); + so_method(so, eng3d, NV34TCL_POLYGON_STIPPLE_PATTERN(0), 32); for (i = 0; i < 32; i++) so_data(so, nv40->stipple[i]); } else { so = so_new(1, 1, 0); - so_method(so, curie, NV34TCL_POLYGON_STIPPLE_ENABLE, 1); + so_method(so, eng3d, NV34TCL_POLYGON_STIPPLE_ENABLE, 1); so_data (so, 0); } diff --git a/src/gallium/drivers/nv40/nv40_state_viewport.c b/src/gallium/drivers/nv40/nv40_state_viewport.c index 3a5ea0e480..43cf6e5a0a 100644 --- a/src/gallium/drivers/nv40/nv40_state_viewport.c +++ b/src/gallium/drivers/nv40/nv40_state_viewport.c @@ -11,7 +11,7 @@ nv40_state_viewport_validate(struct nv40_context *nv40) return FALSE; so = so_new(2, 9, 0); - so_method(so, nv40->screen->curie, + so_method(so, nv40->screen->eng3d, NV34TCL_VIEWPORT_TRANSLATE_X, 8); so_data (so, fui(vpt->translate[0])); so_data (so, fui(vpt->translate[1])); @@ -21,7 +21,7 @@ nv40_state_viewport_validate(struct nv40_context *nv40) so_data (so, fui(vpt->scale[1])); so_data (so, fui(vpt->scale[2])); so_data (so, fui(vpt->scale[3])); - so_method(so, nv40->screen->curie, 0x1d78, 1); + so_method(so, nv40->screen->eng3d, 0x1d78, 1); so_data (so, 1); so_ref(so, &nv40->state.hw[NV40_STATE_VIEWPORT]); diff --git a/src/gallium/drivers/nv40/nv40_state_zsa.c b/src/gallium/drivers/nv40/nv40_state_zsa.c index bf68c60ace..cb56948a1b 100644 --- a/src/gallium/drivers/nv40/nv40_state_zsa.c +++ b/src/gallium/drivers/nv40/nv40_state_zsa.c @@ -22,9 +22,9 @@ nv40_state_sr_validate(struct nv40_context *nv40) struct nouveau_stateobj *so = so_new(2, 2, 0); struct pipe_stencil_ref *sr = &nv40->stencil_ref; - so_method(so, nv40->screen->curie, NV34TCL_STENCIL_FRONT_FUNC_REF, 1); + so_method(so, nv40->screen->eng3d, NV34TCL_STENCIL_FRONT_FUNC_REF, 1); so_data (so, sr->ref_value[0]); - so_method(so, nv40->screen->curie, NV34TCL_STENCIL_BACK_FUNC_REF, 1); + so_method(so, nv40->screen->eng3d, NV34TCL_STENCIL_BACK_FUNC_REF, 1); so_data (so, sr->ref_value[1]); so_ref(so, &nv40->state.hw[NV40_STATE_SR]); diff --git a/src/gallium/drivers/nv40/nv40_vbo.c b/src/gallium/drivers/nv40/nv40_vbo.c index a2f06ead86..b77c9e924b 100644 --- a/src/gallium/drivers/nv40/nv40_vbo.c +++ b/src/gallium/drivers/nv40/nv40_vbo.c @@ -111,7 +111,7 @@ nv40_vbo_static_attrib(struct nv40_context *nv40, struct nouveau_stateobj *so, struct pipe_vertex_buffer *vb) { struct pipe_screen *pscreen = nv40->pipe.screen; - struct nouveau_grobj *curie = nv40->screen->curie; + struct nouveau_grobj *eng3d = nv40->screen->eng3d; unsigned type, ncomp; void *map; @@ -128,25 +128,25 @@ nv40_vbo_static_attrib(struct nv40_context *nv40, struct nouveau_stateobj *so, switch (ncomp) { case 4: - so_method(so, curie, NV34TCL_VTX_ATTR_4F_X(attrib), 4); + so_method(so, eng3d, NV34TCL_VTX_ATTR_4F_X(attrib), 4); so_data (so, fui(v[0])); so_data (so, fui(v[1])); so_data (so, fui(v[2])); so_data (so, fui(v[3])); break; case 3: - so_method(so, curie, NV34TCL_VTX_ATTR_3F_X(attrib), 3); + so_method(so, eng3d, NV34TCL_VTX_ATTR_3F_X(attrib), 3); so_data (so, fui(v[0])); so_data (so, fui(v[1])); so_data (so, fui(v[2])); break; case 2: - so_method(so, curie, NV34TCL_VTX_ATTR_2F_X(attrib), 2); + so_method(so, eng3d, NV34TCL_VTX_ATTR_2F_X(attrib), 2); so_data (so, fui(v[0])); so_data (so, fui(v[1])); break; case 1: - so_method(so, curie, NV34TCL_VTX_ATTR_1F(attrib), 1); + so_method(so, eng3d, NV34TCL_VTX_ATTR_1F(attrib), 1); so_data (so, fui(v[0])); break; default: @@ -172,7 +172,7 @@ nv40_draw_arrays(struct pipe_context *pipe, struct nv40_context *nv40 = nv40_context(pipe); struct nv40_screen *screen = nv40->screen; struct nouveau_channel *chan = screen->base.channel; - struct nouveau_grobj *curie = screen->curie; + struct nouveau_grobj *eng3d = screen->eng3d; unsigned restart; nv40_vbo_set_idxbuf(nv40, NULL, 0); @@ -194,12 +194,12 @@ nv40_draw_arrays(struct pipe_context *pipe, continue; } - BEGIN_RING(chan, curie, NV34TCL_VERTEX_BEGIN_END, 1); + BEGIN_RING(chan, eng3d, NV34TCL_VERTEX_BEGIN_END, 1); OUT_RING (chan, nvgl_primitive(mode)); nr = (vc & 0xff); if (nr) { - BEGIN_RING(chan, curie, NV34TCL_VB_VERTEX_BATCH, 1); + BEGIN_RING(chan, eng3d, NV34TCL_VB_VERTEX_BATCH, 1); OUT_RING (chan, ((nr - 1) << 24) | start); start += nr; } @@ -210,14 +210,14 @@ nv40_draw_arrays(struct pipe_context *pipe, nr -= push; - BEGIN_RING_NI(chan, curie, NV34TCL_VB_VERTEX_BATCH, push); + BEGIN_RING_NI(chan, eng3d, NV34TCL_VB_VERTEX_BATCH, push); while (push--) { OUT_RING(chan, ((0x100 - 1) << 24) | start); start += 0x100; } } - BEGIN_RING(chan, curie, NV34TCL_VERTEX_BEGIN_END, 1); + BEGIN_RING(chan, eng3d, NV34TCL_VERTEX_BEGIN_END, 1); OUT_RING (chan, 0); count -= vc; @@ -233,7 +233,7 @@ nv40_draw_elements_u08(struct nv40_context *nv40, void *ib, { struct nv40_screen *screen = nv40->screen; struct nouveau_channel *chan = screen->base.channel; - struct nouveau_grobj *curie = screen->curie; + struct nouveau_grobj *eng3d = screen->eng3d; while (count) { uint8_t *elts = (uint8_t *)ib + start; @@ -249,11 +249,11 @@ nv40_draw_elements_u08(struct nv40_context *nv40, void *ib, } count -= vc; - BEGIN_RING(chan, curie, NV34TCL_VERTEX_BEGIN_END, 1); + BEGIN_RING(chan, eng3d, NV34TCL_VERTEX_BEGIN_END, 1); OUT_RING (chan, nvgl_primitive(mode)); if (vc & 1) { - BEGIN_RING(chan, curie, NV34TCL_VB_ELEMENT_U32, 1); + BEGIN_RING(chan, eng3d, NV34TCL_VB_ELEMENT_U32, 1); OUT_RING (chan, elts[0]); elts++; vc--; } @@ -263,7 +263,7 @@ nv40_draw_elements_u08(struct nv40_context *nv40, void *ib, push = MIN2(vc, 2047 * 2); - BEGIN_RING_NI(chan, curie, NV34TCL_VB_ELEMENT_U16, push >> 1); + BEGIN_RING_NI(chan, eng3d, NV34TCL_VB_ELEMENT_U16, push >> 1); for (i = 0; i < push; i+=2) OUT_RING(chan, (elts[i+1] << 16) | elts[i]); @@ -271,7 +271,7 @@ nv40_draw_elements_u08(struct nv40_context *nv40, void *ib, elts += push; } - BEGIN_RING(chan, curie, NV34TCL_VERTEX_BEGIN_END, 1); + BEGIN_RING(chan, eng3d, NV34TCL_VERTEX_BEGIN_END, 1); OUT_RING (chan, 0); start = restart; @@ -284,7 +284,7 @@ nv40_draw_elements_u16(struct nv40_context *nv40, void *ib, { struct nv40_screen *screen = nv40->screen; struct nouveau_channel *chan = screen->base.channel; - struct nouveau_grobj *curie = screen->curie; + struct nouveau_grobj *eng3d = screen->eng3d; while (count) { uint16_t *elts = (uint16_t *)ib + start; @@ -300,11 +300,11 @@ nv40_draw_elements_u16(struct nv40_context *nv40, void *ib, } count -= vc; - BEGIN_RING(chan, curie, NV34TCL_VERTEX_BEGIN_END, 1); + BEGIN_RING(chan, eng3d, NV34TCL_VERTEX_BEGIN_END, 1); OUT_RING (chan, nvgl_primitive(mode)); if (vc & 1) { - BEGIN_RING(chan, curie, NV34TCL_VB_ELEMENT_U32, 1); + BEGIN_RING(chan, eng3d, NV34TCL_VB_ELEMENT_U32, 1); OUT_RING (chan, elts[0]); elts++; vc--; } @@ -314,7 +314,7 @@ nv40_draw_elements_u16(struct nv40_context *nv40, void *ib, push = MIN2(vc, 2047 * 2); - BEGIN_RING_NI(chan, curie, NV34TCL_VB_ELEMENT_U16, push >> 1); + BEGIN_RING_NI(chan, eng3d, NV34TCL_VB_ELEMENT_U16, push >> 1); for (i = 0; i < push; i+=2) OUT_RING(chan, (elts[i+1] << 16) | elts[i]); @@ -322,7 +322,7 @@ nv40_draw_elements_u16(struct nv40_context *nv40, void *ib, elts += push; } - BEGIN_RING(chan, curie, NV34TCL_VERTEX_BEGIN_END, 1); + BEGIN_RING(chan, eng3d, NV34TCL_VERTEX_BEGIN_END, 1); OUT_RING (chan, 0); start = restart; @@ -335,7 +335,7 @@ nv40_draw_elements_u32(struct nv40_context *nv40, void *ib, { struct nv40_screen *screen = nv40->screen; struct nouveau_channel *chan = screen->base.channel; - struct nouveau_grobj *curie = screen->curie; + struct nouveau_grobj *eng3d = screen->eng3d; while (count) { uint32_t *elts = (uint32_t *)ib + start; @@ -351,20 +351,20 @@ nv40_draw_elements_u32(struct nv40_context *nv40, void *ib, } count -= vc; - BEGIN_RING(chan, curie, NV34TCL_VERTEX_BEGIN_END, 1); + BEGIN_RING(chan, eng3d, NV34TCL_VERTEX_BEGIN_END, 1); OUT_RING (chan, nvgl_primitive(mode)); while (vc) { push = MIN2(vc, 2047); - BEGIN_RING_NI(chan, curie, NV34TCL_VB_ELEMENT_U32, push); + BEGIN_RING_NI(chan, eng3d, NV34TCL_VB_ELEMENT_U32, push); OUT_RINGp (chan, elts, push); vc -= push; elts += push; } - BEGIN_RING(chan, curie, NV34TCL_VERTEX_BEGIN_END, 1); + BEGIN_RING(chan, eng3d, NV34TCL_VERTEX_BEGIN_END, 1); OUT_RING (chan, 0); start = restart; @@ -411,7 +411,7 @@ nv40_draw_elements_vbo(struct pipe_context *pipe, struct nv40_context *nv40 = nv40_context(pipe); struct nv40_screen *screen = nv40->screen; struct nouveau_channel *chan = screen->base.channel; - struct nouveau_grobj *curie = screen->curie; + struct nouveau_grobj *eng3d = screen->eng3d; unsigned restart; while (count) { @@ -426,12 +426,12 @@ nv40_draw_elements_vbo(struct pipe_context *pipe, continue; } - BEGIN_RING(chan, curie, NV34TCL_VERTEX_BEGIN_END, 1); + BEGIN_RING(chan, eng3d, NV34TCL_VERTEX_BEGIN_END, 1); OUT_RING (chan, nvgl_primitive(mode)); nr = (vc & 0xff); if (nr) { - BEGIN_RING(chan, curie, NV34TCL_VB_INDEX_BATCH, 1); + BEGIN_RING(chan, eng3d, NV34TCL_VB_INDEX_BATCH, 1); OUT_RING (chan, ((nr - 1) << 24) | start); start += nr; } @@ -442,14 +442,14 @@ nv40_draw_elements_vbo(struct pipe_context *pipe, nr -= push; - BEGIN_RING_NI(chan, curie, NV34TCL_VB_INDEX_BATCH, push); + BEGIN_RING_NI(chan, eng3d, NV34TCL_VB_INDEX_BATCH, push); while (push--) { OUT_RING(chan, ((0x100 - 1) << 24) | start); start += 0x100; } } - BEGIN_RING(chan, curie, NV34TCL_VERTEX_BEGIN_END, 1); + BEGIN_RING(chan, eng3d, NV34TCL_VERTEX_BEGIN_END, 1); OUT_RING (chan, 0); count -= vc; @@ -486,16 +486,16 @@ static boolean nv40_vbo_validate(struct nv40_context *nv40) { struct nouveau_stateobj *vtxbuf, *vtxfmt, *sattr = NULL; - struct nouveau_grobj *curie = nv40->screen->curie; + struct nouveau_grobj *eng3d = nv40->screen->eng3d; struct pipe_buffer *ib = nv40->idxbuf; unsigned ib_format = nv40->idxbuf_format; unsigned vb_flags = NOUVEAU_BO_VRAM | NOUVEAU_BO_GART | NOUVEAU_BO_RD; int hw; vtxbuf = so_new(3, 17, 18); - so_method(vtxbuf, curie, NV34TCL_VTXBUF_ADDRESS(0), nv40->vtxelt->num_elements); + so_method(vtxbuf, eng3d, NV34TCL_VTXBUF_ADDRESS(0), nv40->vtxelt->num_elements); vtxfmt = so_new(1, 16, 0); - so_method(vtxfmt, curie, NV34TCL_VTXFMT(0), nv40->vtxelt->num_elements); + so_method(vtxfmt, eng3d, NV34TCL_VTXFMT(0), nv40->vtxelt->num_elements); for (hw = 0; hw < nv40->vtxelt->num_elements; hw++) { struct pipe_vertex_element *ve; @@ -534,13 +534,13 @@ nv40_vbo_validate(struct nv40_context *nv40) if (ib) { struct nouveau_bo *bo = nouveau_bo(ib); - so_method(vtxbuf, curie, NV34TCL_IDXBUF_ADDRESS, 2); + so_method(vtxbuf, eng3d, NV34TCL_IDXBUF_ADDRESS, 2); so_reloc (vtxbuf, bo, 0, vb_flags | NOUVEAU_BO_LOW, 0, 0); so_reloc (vtxbuf, bo, ib_format, vb_flags | NOUVEAU_BO_OR, 0, NV34TCL_IDXBUF_FORMAT_DMA1); } - so_method(vtxbuf, curie, 0x1710, 1); + so_method(vtxbuf, eng3d, 0x1710, 1); so_data (vtxbuf, 0); so_ref(vtxbuf, &nv40->state.hw[NV40_STATE_VTXBUF]); diff --git a/src/gallium/drivers/nv40/nv40_vertprog.c b/src/gallium/drivers/nv40/nv40_vertprog.c index 2abda14f31..96f2743429 100644 --- a/src/gallium/drivers/nv40/nv40_vertprog.c +++ b/src/gallium/drivers/nv40/nv40_vertprog.c @@ -836,7 +836,7 @@ nv40_vertprog_validate(struct nv40_context *nv40) struct pipe_screen *pscreen = nv40->pipe.screen; struct nv40_screen *screen = nv40->screen; struct nouveau_channel *chan = screen->base.channel; - struct nouveau_grobj *curie = screen->curie; + struct nouveau_grobj *eng3d = screen->eng3d; struct nv40_vertex_program *vp; struct pipe_buffer *constbuf; boolean upload_code = FALSE, upload_data = FALSE; @@ -887,12 +887,12 @@ check_gpu_resources: } so = so_new(3, 4, 0); - so_method(so, curie, NV34TCL_VP_START_FROM_ID, 1); + so_method(so, eng3d, NV34TCL_VP_START_FROM_ID, 1); so_data (so, vp->exec->start); - so_method(so, curie, NV40TCL_VP_ATTRIB_EN, 2); + so_method(so, eng3d, NV40TCL_VP_ATTRIB_EN, 2); so_data (so, vp->ir); so_data (so, vp->or); - so_method(so, curie, NV34TCL_VP_CLIP_PLANES_ENABLE, 1); + so_method(so, eng3d, NV34TCL_VP_CLIP_PLANES_ENABLE, 1); so_data (so, vp->clip_ctrl); so_ref(so, &vp->so); so_ref(NULL, &so); @@ -976,7 +976,7 @@ check_gpu_resources: 4 * sizeof(float)); } - BEGIN_RING(chan, curie, NV34TCL_VP_UPLOAD_CONST_ID, 5); + BEGIN_RING(chan, eng3d, NV34TCL_VP_UPLOAD_CONST_ID, 5); OUT_RING (chan, i + vp->data->start); OUT_RINGp (chan, (uint32_t *)vpd->value, 4); } @@ -995,10 +995,10 @@ check_gpu_resources: NOUVEAU_MSG("VP %d: 0x%08x\n", i, vp->insns[i].data[3]); } #endif - BEGIN_RING(chan, curie, NV34TCL_VP_UPLOAD_FROM_ID, 1); + BEGIN_RING(chan, eng3d, NV34TCL_VP_UPLOAD_FROM_ID, 1); OUT_RING (chan, vp->exec->start); for (i = 0; i < vp->nr_insns; i++) { - BEGIN_RING(chan, curie, NV34TCL_VP_UPLOAD_INST(0), 4); + BEGIN_RING(chan, eng3d, NV34TCL_VP_UPLOAD_INST(0), 4); OUT_RINGp (chan, vp->insns[i].data, 4); } } -- cgit v1.2.3 From b8e56d4cddbd9c491b940e3ce5974c526802c752 Mon Sep 17 00:00:00 2001 From: Luca Barbieri Date: Sat, 20 Feb 2010 18:37:43 +0100 Subject: nv30, nv40: unify all structures and headers, except shaders This patch unifies nv[34]0_screen.h, nv[34]0_context.h and nv[34]0_state.h The unified files are put in a new "nvfx" directory. nv30_context.h and nv40_context.h still exist to hold the function prototypes and include nvfx_context.h nv[34]0_screen.h and nv[34]0_state.h are deleted, replaced by the unified versions. nv40 includes some extra fields for swtnl and user clip planes support. These fields will be unused on nv30 until that functionality gets added to it too (by unification with nv40). --- src/gallium/drivers/nv30/Makefile | 2 + src/gallium/drivers/nv30/nv30_clear.c | 2 +- src/gallium/drivers/nv30/nv30_context.c | 78 +++---- src/gallium/drivers/nv30/nv30_context.h | 215 +++---------------- src/gallium/drivers/nv30/nv30_draw.c | 8 +- src/gallium/drivers/nv30/nv30_fragprog.c | 66 +++--- src/gallium/drivers/nv30/nv30_fragtex.c | 34 +-- src/gallium/drivers/nv30/nv30_miptree.c | 18 +- src/gallium/drivers/nv30/nv30_query.c | 32 +-- src/gallium/drivers/nv30/nv30_screen.c | 10 +- src/gallium/drivers/nv30/nv30_screen.h | 38 ---- src/gallium/drivers/nv30/nv30_state.c | 254 +++++++++++----------- src/gallium/drivers/nv30/nv30_state.h | 86 -------- src/gallium/drivers/nv30/nv30_state_blend.c | 24 +-- src/gallium/drivers/nv30/nv30_state_emit.c | 75 ++++--- src/gallium/drivers/nv30/nv30_state_fb.c | 24 +-- src/gallium/drivers/nv30/nv30_state_rasterizer.c | 12 +- src/gallium/drivers/nv30/nv30_state_scissor.c | 24 +-- src/gallium/drivers/nv30/nv30_state_stipple.c | 20 +- src/gallium/drivers/nv30/nv30_state_viewport.c | 22 +- src/gallium/drivers/nv30/nv30_state_zsa.c | 28 +-- src/gallium/drivers/nv30/nv30_surface.c | 14 +- src/gallium/drivers/nv30/nv30_transfer.c | 26 +-- src/gallium/drivers/nv30/nv30_vbo.c | 112 +++++----- src/gallium/drivers/nv30/nv30_vertprog.c | 60 +++--- src/gallium/drivers/nv40/Makefile | 2 + src/gallium/drivers/nv40/nv40_clear.c | 2 +- src/gallium/drivers/nv40/nv40_context.c | 78 +++---- src/gallium/drivers/nv40/nv40_context.h | 235 +++----------------- src/gallium/drivers/nv40/nv40_draw.c | 116 +++++----- src/gallium/drivers/nv40/nv40_fragprog.c | 62 +++--- src/gallium/drivers/nv40/nv40_fragtex.c | 36 ++-- src/gallium/drivers/nv40/nv40_miptree.c | 18 +- src/gallium/drivers/nv40/nv40_query.c | 32 +-- src/gallium/drivers/nv40/nv40_screen.c | 12 +- src/gallium/drivers/nv40/nv40_screen.h | 37 ---- src/gallium/drivers/nv40/nv40_state.c | 262 +++++++++++------------ src/gallium/drivers/nv40/nv40_state.h | 91 -------- src/gallium/drivers/nv40/nv40_state_blend.c | 24 +-- src/gallium/drivers/nv40/nv40_state_emit.c | 126 +++++------ src/gallium/drivers/nv40/nv40_state_fb.c | 18 +- src/gallium/drivers/nv40/nv40_state_rasterizer.c | 12 +- src/gallium/drivers/nv40/nv40_state_scissor.c | 24 +-- src/gallium/drivers/nv40/nv40_state_stipple.c | 20 +- src/gallium/drivers/nv40/nv40_state_viewport.c | 20 +- src/gallium/drivers/nv40/nv40_state_zsa.c | 28 +-- src/gallium/drivers/nv40/nv40_surface.c | 14 +- src/gallium/drivers/nv40/nv40_transfer.c | 26 +-- src/gallium/drivers/nv40/nv40_vbo.c | 112 +++++----- src/gallium/drivers/nv40/nv40_vertprog.c | 84 ++++---- src/gallium/drivers/nvfx/nvfx_context.h | 182 ++++++++++++++++ src/gallium/drivers/nvfx/nvfx_screen.h | 37 ++++ src/gallium/drivers/nvfx/nvfx_state.h | 91 ++++++++ 53 files changed, 1404 insertions(+), 1681 deletions(-) delete mode 100644 src/gallium/drivers/nv30/nv30_screen.h delete mode 100644 src/gallium/drivers/nv30/nv30_state.h delete mode 100644 src/gallium/drivers/nv40/nv40_screen.h delete mode 100644 src/gallium/drivers/nv40/nv40_state.h create mode 100644 src/gallium/drivers/nvfx/nvfx_context.h create mode 100644 src/gallium/drivers/nvfx/nvfx_screen.h create mode 100644 src/gallium/drivers/nvfx/nvfx_state.h (limited to 'src') diff --git a/src/gallium/drivers/nv30/Makefile b/src/gallium/drivers/nv30/Makefile index 364c80d8f3..ed02075d13 100644 --- a/src/gallium/drivers/nv30/Makefile +++ b/src/gallium/drivers/nv30/Makefile @@ -26,4 +26,6 @@ C_SOURCES = \ nv30_vbo.c \ nv30_vertprog.c +LIBRARY_INCLUDES = -I$(TOP)/src/gallium/drivers/nvfx + include ../../Makefile.template diff --git a/src/gallium/drivers/nv30/nv30_clear.c b/src/gallium/drivers/nv30/nv30_clear.c index c4ba926664..e7ba73de7c 100644 --- a/src/gallium/drivers/nv30/nv30_clear.c +++ b/src/gallium/drivers/nv30/nv30_clear.c @@ -9,6 +9,6 @@ void nv30_clear(struct pipe_context *pipe, unsigned buffers, const float *rgba, double depth, unsigned stencil) { - util_clear(pipe, &nv30_context(pipe)->framebuffer, buffers, rgba, depth, + util_clear(pipe, &nvfx_context(pipe)->framebuffer, buffers, rgba, depth, stencil); } diff --git a/src/gallium/drivers/nv30/nv30_context.c b/src/gallium/drivers/nv30/nv30_context.c index be6407805b..628b50d8dc 100644 --- a/src/gallium/drivers/nv30/nv30_context.c +++ b/src/gallium/drivers/nv30/nv30_context.c @@ -2,14 +2,14 @@ #include "pipe/p_defines.h" #include "nv30_context.h" -#include "nv30_screen.h" +#include "nvfx_screen.h" static void nv30_flush(struct pipe_context *pipe, unsigned flags, struct pipe_fence_handle **fence) { - struct nv30_context *nv30 = nv30_context(pipe); - struct nv30_screen *screen = nv30->screen; + struct nvfx_context *nvfx = nvfx_context(pipe); + struct nvfx_screen *screen = nvfx->screen; struct nouveau_channel *chan = screen->base.channel; struct nouveau_grobj *eng3d = screen->eng3d; @@ -28,61 +28,61 @@ nv30_flush(struct pipe_context *pipe, unsigned flags, static void nv30_destroy(struct pipe_context *pipe) { - struct nv30_context *nv30 = nv30_context(pipe); + struct nvfx_context *nvfx = nvfx_context(pipe); unsigned i; - for (i = 0; i < NV30_STATE_MAX; i++) { - if (nv30->state.hw[i]) - so_ref(NULL, &nv30->state.hw[i]); + for (i = 0; i < NVFX_STATE_MAX; i++) { + if (nvfx->state.hw[i]) + so_ref(NULL, &nvfx->state.hw[i]); } - if (nv30->draw) - draw_destroy(nv30->draw); - FREE(nv30); + if (nvfx->draw) + draw_destroy(nvfx->draw); + FREE(nvfx); } struct pipe_context * nv30_create(struct pipe_screen *pscreen, void *priv) { - struct nv30_screen *screen = nv30_screen(pscreen); + struct nvfx_screen *screen = nvfx_screen(pscreen); struct pipe_winsys *ws = pscreen->winsys; - struct nv30_context *nv30; + struct nvfx_context *nvfx; struct nouveau_winsys *nvws = screen->nvws; - nv30 = CALLOC(1, sizeof(struct nv30_context)); - if (!nv30) + nvfx = CALLOC(1, sizeof(struct nvfx_context)); + if (!nvfx) return NULL; - nv30->screen = screen; + nvfx->screen = screen; - nv30->nvws = nvws; + nvfx->nvws = nvws; - nv30->pipe.winsys = ws; - nv30->pipe.screen = pscreen; - nv30->pipe.priv = priv; - nv30->pipe.destroy = nv30_destroy; - nv30->pipe.draw_arrays = nv30_draw_arrays; - nv30->pipe.draw_elements = nv30_draw_elements; - nv30->pipe.clear = nv30_clear; - nv30->pipe.flush = nv30_flush; + nvfx->pipe.winsys = ws; + nvfx->pipe.screen = pscreen; + nvfx->pipe.priv = priv; + nvfx->pipe.destroy = nv30_destroy; + nvfx->pipe.draw_arrays = nv30_draw_arrays; + nvfx->pipe.draw_elements = nv30_draw_elements; + nvfx->pipe.clear = nv30_clear; + nvfx->pipe.flush = nv30_flush; - nv30->pipe.is_texture_referenced = nouveau_is_texture_referenced; - nv30->pipe.is_buffer_referenced = nouveau_is_buffer_referenced; + nvfx->pipe.is_texture_referenced = nouveau_is_texture_referenced; + nvfx->pipe.is_buffer_referenced = nouveau_is_buffer_referenced; - screen->base.channel->user_private = nv30; + screen->base.channel->user_private = nvfx; screen->base.channel->flush_notify = nv30_state_flush_notify; - nv30_init_query_functions(nv30); - nv30_init_surface_functions(nv30); - nv30_init_state_functions(nv30); - nv30_init_transfer_functions(nv30); + nv30_init_query_functions(nvfx); + nv30_init_surface_functions(nvfx); + nv30_init_state_functions(nvfx); + nv30_init_transfer_functions(nvfx); /* Create, configure, and install fallback swtnl path */ - nv30->draw = draw_create(); - draw_wide_point_threshold(nv30->draw, 9999999.0); - draw_wide_line_threshold(nv30->draw, 9999999.0); - draw_enable_line_stipple(nv30->draw, FALSE); - draw_enable_point_sprites(nv30->draw, FALSE); - draw_set_rasterize_stage(nv30->draw, nv30_draw_render_stage(nv30)); - - return &nv30->pipe; + nvfx->draw = draw_create(); + draw_wide_point_threshold(nvfx->draw, 9999999.0); + draw_wide_line_threshold(nvfx->draw, 9999999.0); + draw_enable_line_stipple(nvfx->draw, FALSE); + draw_enable_point_sprites(nvfx->draw, FALSE); + draw_set_rasterize_stage(nvfx->draw, nv30_draw_render_stage(nvfx)); + + return &nvfx->pipe; } diff --git a/src/gallium/drivers/nv30/nv30_context.h b/src/gallium/drivers/nv30/nv30_context.h index 4a164f3b1f..2fc148cded 100644 --- a/src/gallium/drivers/nv30/nv30_context.h +++ b/src/gallium/drivers/nv30/nv30_context.h @@ -1,207 +1,46 @@ #ifndef __NV30_CONTEXT_H__ #define __NV30_CONTEXT_H__ -#include +#include "nvfx_context.h" -#include "pipe/p_context.h" -#include "pipe/p_defines.h" -#include "pipe/p_state.h" -#include "pipe/p_compiler.h" - -#include "util/u_memory.h" -#include "util/u_math.h" -#include "util/u_inlines.h" - -#include "draw/draw_vertex.h" - -#include "nouveau/nouveau_winsys.h" -#include "nouveau/nouveau_gldefs.h" -#include "nouveau/nouveau_context.h" -#include "nouveau/nouveau_stateobj.h" - -#include "nv30_state.h" - -#define NOUVEAU_ERR(fmt, args...) \ - fprintf(stderr, "%s:%d - "fmt, __func__, __LINE__, ##args); -#define NOUVEAU_MSG(fmt, args...) \ - fprintf(stderr, "nouveau: "fmt, ##args); - -enum nv30_state_index { - NV30_STATE_FB = 0, - NV30_STATE_VIEWPORT = 1, - NV30_STATE_BLEND = 2, - NV30_STATE_RAST = 3, - NV30_STATE_ZSA = 4, - NV30_STATE_BCOL = 5, - NV30_STATE_CLIP = 6, - NV30_STATE_SCISSOR = 7, - NV30_STATE_STIPPLE = 8, - NV30_STATE_FRAGPROG = 9, - NV30_STATE_VERTPROG = 10, - NV30_STATE_FRAGTEX0 = 11, - NV30_STATE_FRAGTEX1 = 12, - NV30_STATE_FRAGTEX2 = 13, - NV30_STATE_FRAGTEX3 = 14, - NV30_STATE_FRAGTEX4 = 15, - NV30_STATE_FRAGTEX5 = 16, - NV30_STATE_FRAGTEX6 = 17, - NV30_STATE_FRAGTEX7 = 18, - NV30_STATE_FRAGTEX8 = 19, - NV30_STATE_FRAGTEX9 = 20, - NV30_STATE_FRAGTEX10 = 21, - NV30_STATE_FRAGTEX11 = 22, - NV30_STATE_FRAGTEX12 = 23, - NV30_STATE_FRAGTEX13 = 24, - NV30_STATE_FRAGTEX14 = 25, - NV30_STATE_FRAGTEX15 = 26, - NV30_STATE_VERTTEX0 = 27, - NV30_STATE_VERTTEX1 = 28, - NV30_STATE_VERTTEX2 = 29, - NV30_STATE_VERTTEX3 = 30, - NV30_STATE_VTXBUF = 31, - NV30_STATE_VTXFMT = 32, - NV30_STATE_VTXATTR = 33, - NV30_STATE_SR = 34, - NV30_STATE_MAX = 35 -}; - -#include "nv30_screen.h" - -#define NV30_NEW_BLEND (1 << 0) -#define NV30_NEW_RAST (1 << 1) -#define NV30_NEW_ZSA (1 << 2) -#define NV30_NEW_SAMPLER (1 << 3) -#define NV30_NEW_FB (1 << 4) -#define NV30_NEW_STIPPLE (1 << 5) -#define NV30_NEW_SCISSOR (1 << 6) -#define NV30_NEW_VIEWPORT (1 << 7) -#define NV30_NEW_BCOL (1 << 8) -#define NV30_NEW_VERTPROG (1 << 9) -#define NV30_NEW_FRAGPROG (1 << 10) -#define NV30_NEW_ARRAYS (1 << 11) -#define NV30_NEW_UCP (1 << 12) -#define NV30_NEW_SR (1 << 13) - -struct nv30_rasterizer_state { - struct pipe_rasterizer_state pipe; - struct nouveau_stateobj *so; -}; - -struct nv30_zsa_state { - struct pipe_depth_stencil_alpha_state pipe; - struct nouveau_stateobj *so; -}; - -struct nv30_blend_state { - struct pipe_blend_state pipe; - struct nouveau_stateobj *so; -}; - - -struct nv30_state { - unsigned scissor_enabled; - unsigned stipple_enabled; - unsigned fp_samplers; - - uint64_t dirty; - struct nouveau_stateobj *hw[NV30_STATE_MAX]; -}; - -struct nv30_vtxelt_state { - struct pipe_vertex_element pipe[16]; - unsigned num_elements; -}; - -struct nv30_context { - struct pipe_context pipe; - - struct nouveau_winsys *nvws; - struct nv30_screen *screen; - - struct draw_context *draw; - - /* HW state derived from pipe states */ - struct nv30_state state; - - /* Context state */ - unsigned dirty; - struct pipe_scissor_state scissor; - unsigned stipple[32]; - struct nv30_vertex_program *vertprog; - struct nv30_fragment_program *fragprog; - struct pipe_buffer *constbuf[PIPE_SHADER_TYPES]; - unsigned constbuf_nr[PIPE_SHADER_TYPES]; - struct nv30_rasterizer_state *rasterizer; - struct nv30_zsa_state *zsa; - struct nv30_blend_state *blend; - struct pipe_blend_color blend_colour; - struct pipe_stencil_ref stencil_ref; - struct pipe_viewport_state viewport; - struct pipe_framebuffer_state framebuffer; - struct pipe_buffer *idxbuf; - unsigned idxbuf_format; - struct nv30_sampler_state *tex_sampler[PIPE_MAX_SAMPLERS]; - struct nv30_miptree *tex_miptree[PIPE_MAX_SAMPLERS]; - unsigned nr_samplers; - unsigned nr_textures; - unsigned dirty_samplers; - struct pipe_vertex_buffer vtxbuf[PIPE_MAX_ATTRIBS]; - unsigned vtxbuf_nr; - struct nv30_vtxelt_state *vtxelt; -}; - -static INLINE struct nv30_context * -nv30_context(struct pipe_context *pipe) -{ - return (struct nv30_context *)pipe; -} - -struct nv30_state_entry { - boolean (*validate)(struct nv30_context *nv30); - struct { - unsigned pipe; - unsigned hw; - } dirty; -}; - -extern void nv30_init_state_functions(struct nv30_context *nv30); -extern void nv30_init_surface_functions(struct nv30_context *nv30); -extern void nv30_init_query_functions(struct nv30_context *nv30); -extern void nv30_init_transfer_functions(struct nv30_context *nv30); +extern void nv30_init_state_functions(struct nvfx_context *nvfx); +extern void nv30_init_surface_functions(struct nvfx_context *nvfx); +extern void nv30_init_query_functions(struct nvfx_context *nvfx); +extern void nv30_init_transfer_functions(struct nvfx_context *nvfx); extern void nv30_screen_init_miptree_functions(struct pipe_screen *pscreen); /* nv30_draw.c */ -extern struct draw_stage *nv30_draw_render_stage(struct nv30_context *nv30); +extern struct draw_stage *nv30_draw_render_stage(struct nvfx_context *nvfx); /* nv30_vertprog.c */ -extern void nv30_vertprog_destroy(struct nv30_context *, - struct nv30_vertex_program *); +extern void nv30_vertprog_destroy(struct nvfx_context *, + struct nvfx_vertex_program *); /* nv30_fragprog.c */ -extern void nv30_fragprog_destroy(struct nv30_context *, - struct nv30_fragment_program *); +extern void nv30_fragprog_destroy(struct nvfx_context *, + struct nvfx_fragment_program *); /* nv30_fragtex.c */ -extern void nv30_fragtex_bind(struct nv30_context *); +extern void nv30_fragtex_bind(struct nvfx_context *); /* nv30_state.c and friends */ -extern boolean nv30_state_validate(struct nv30_context *nv30); -extern void nv30_state_emit(struct nv30_context *nv30); +extern boolean nv30_state_validate(struct nvfx_context *nvfx); +extern void nv30_state_emit(struct nvfx_context *nvfx); extern void nv30_state_flush_notify(struct nouveau_channel *chan); -extern struct nv30_state_entry nv30_state_rasterizer; -extern struct nv30_state_entry nv30_state_scissor; -extern struct nv30_state_entry nv30_state_stipple; -extern struct nv30_state_entry nv30_state_fragprog; -extern struct nv30_state_entry nv30_state_vertprog; -extern struct nv30_state_entry nv30_state_blend; -extern struct nv30_state_entry nv30_state_blend_colour; -extern struct nv30_state_entry nv30_state_zsa; -extern struct nv30_state_entry nv30_state_viewport; -extern struct nv30_state_entry nv30_state_framebuffer; -extern struct nv30_state_entry nv30_state_fragtex; -extern struct nv30_state_entry nv30_state_vbo; -extern struct nv30_state_entry nv30_state_sr; +extern struct nvfx_state_entry nv30_state_rasterizer; +extern struct nvfx_state_entry nv30_state_scissor; +extern struct nvfx_state_entry nv30_state_stipple; +extern struct nvfx_state_entry nv30_state_fragprog; +extern struct nvfx_state_entry nv30_state_vertprog; +extern struct nvfx_state_entry nv30_state_blend; +extern struct nvfx_state_entry nv30_state_blend_colour; +extern struct nvfx_state_entry nv30_state_zsa; +extern struct nvfx_state_entry nv30_state_viewport; +extern struct nvfx_state_entry nv30_state_framebuffer; +extern struct nvfx_state_entry nv30_state_fragtex; +extern struct nvfx_state_entry nv30_state_vbo; +extern struct nvfx_state_entry nv30_state_sr; /* nv30_vbo.c */ extern void nv30_draw_arrays(struct pipe_context *, unsigned mode, @@ -216,7 +55,7 @@ extern void nv30_draw_elements(struct pipe_context *pipe, extern void nv30_clear(struct pipe_context *pipe, unsigned buffers, const float *rgba, double depth, unsigned stencil); -/* nv30_context.c */ +/* nvfx_context.c */ struct pipe_context * nv30_create(struct pipe_screen *pscreen, void *priv); diff --git a/src/gallium/drivers/nv30/nv30_draw.c b/src/gallium/drivers/nv30/nv30_draw.c index 74fc138c05..5d22e78abf 100644 --- a/src/gallium/drivers/nv30/nv30_draw.c +++ b/src/gallium/drivers/nv30/nv30_draw.c @@ -4,7 +4,7 @@ struct nv30_draw_stage { struct draw_stage draw; - struct nv30_context *nv30; + struct nvfx_context *nvfx; }; static void @@ -43,12 +43,12 @@ nv30_draw_destroy(struct draw_stage *draw) } struct draw_stage * -nv30_draw_render_stage(struct nv30_context *nv30) +nv30_draw_render_stage(struct nvfx_context *nvfx) { struct nv30_draw_stage *nv30draw = CALLOC_STRUCT(nv30_draw_stage); - nv30draw->nv30 = nv30; - nv30draw->draw.draw = nv30->draw; + nv30draw->nvfx = nvfx; + nv30draw->draw.draw = nvfx->draw; nv30draw->draw.point = nv30_draw_point; nv30draw->draw.line = nv30_draw_line; nv30draw->draw.tri = nv30_draw_tri; diff --git a/src/gallium/drivers/nv30/nv30_fragprog.c b/src/gallium/drivers/nv30/nv30_fragprog.c index 4c96e6d733..ae246ffd64 100644 --- a/src/gallium/drivers/nv30/nv30_fragprog.c +++ b/src/gallium/drivers/nv30/nv30_fragprog.c @@ -31,7 +31,7 @@ #define MAX_CONSTS 128 #define MAX_IMM 32 struct nv30_fpc { - struct nv30_fragment_program *fp; + struct nvfx_fragment_program *fp; uint attrib_map[PIPE_MAX_SHADER_INPUTS]; @@ -89,7 +89,7 @@ constant(struct nv30_fpc *fpc, int pipe, float vals[4]) static void grow_insns(struct nv30_fpc *fpc, int size) { - struct nv30_fragment_program *fp = fpc->fp; + struct nvfx_fragment_program *fp = fpc->fp; fp->insn_len += size; fp->insn = realloc(fp->insn, sizeof(uint32_t) * fp->insn_len); @@ -98,7 +98,7 @@ grow_insns(struct nv30_fpc *fpc, int size) static void emit_src(struct nv30_fpc *fpc, int pos, struct nv30_sreg src) { - struct nv30_fragment_program *fp = fpc->fp; + struct nvfx_fragment_program *fp = fpc->fp; uint32_t *hw = &fp->insn[fpc->inst_offset]; uint32_t sr = 0; @@ -118,7 +118,7 @@ emit_src(struct nv30_fpc *fpc, int pos, struct nv30_sreg src) grow_insns(fpc, 4); hw = &fp->insn[fpc->inst_offset]; if (fpc->consts[src.index].pipe >= 0) { - struct nv30_fragment_program_data *fpd; + struct nvfx_fragment_program_data *fpd; fp->consts = realloc(fp->consts, ++fp->nr_consts * sizeof(*fpd)); @@ -158,7 +158,7 @@ emit_src(struct nv30_fpc *fpc, int pos, struct nv30_sreg src) static void emit_dst(struct nv30_fpc *fpc, struct nv30_sreg dst) { - struct nv30_fragment_program *fp = fpc->fp; + struct nvfx_fragment_program *fp = fpc->fp; uint32_t *hw = &fp->insn[fpc->inst_offset]; switch (dst.type) { @@ -188,7 +188,7 @@ nv30_fp_arith(struct nv30_fpc *fpc, int sat, int op, struct nv30_sreg dst, int mask, struct nv30_sreg s0, struct nv30_sreg s1, struct nv30_sreg s2) { - struct nv30_fragment_program *fp = fpc->fp; + struct nvfx_fragment_program *fp = fpc->fp; uint32_t *hw; fpc->inst_offset = fp->insn_len; @@ -224,7 +224,7 @@ nv30_fp_tex(struct nv30_fpc *fpc, int sat, int op, int unit, struct nv30_sreg dst, int mask, struct nv30_sreg s0, struct nv30_sreg s1, struct nv30_sreg s2) { - struct nv30_fragment_program *fp = fpc->fp; + struct nvfx_fragment_program *fp = fpc->fp; nv30_fp_arith(fpc, sat, op, dst, mask, s0, s1, s2); @@ -718,8 +718,8 @@ out_err: } static void -nv30_fragprog_translate(struct nv30_context *nv30, - struct nv30_fragment_program *fp) +nv30_fragprog_translate(struct nvfx_context *nvfx, + struct nvfx_fragment_program *fp) { struct tgsi_parse_context parse; struct nv30_fpc *fpc = NULL; @@ -778,10 +778,10 @@ out_err: } static void -nv30_fragprog_upload(struct nv30_context *nv30, - struct nv30_fragment_program *fp) +nv30_fragprog_upload(struct nvfx_context *nvfx, + struct nvfx_fragment_program *fp) { - struct pipe_screen *pscreen = nv30->pipe.screen; + struct pipe_screen *pscreen = nvfx->pipe.screen; const uint32_t le = 1; uint32_t *map; int i; @@ -812,12 +812,12 @@ nv30_fragprog_upload(struct nv30_context *nv30, } static boolean -nv30_fragprog_validate(struct nv30_context *nv30) +nv30_fragprog_validate(struct nvfx_context *nvfx) { - struct nv30_fragment_program *fp = nv30->fragprog; + struct nvfx_fragment_program *fp = nvfx->fragprog; struct pipe_buffer *constbuf = - nv30->constbuf[PIPE_SHADER_FRAGMENT]; - struct pipe_screen *pscreen = nv30->pipe.screen; + nvfx->constbuf[PIPE_SHADER_FRAGMENT]; + struct pipe_screen *pscreen = nvfx->pipe.screen; struct nouveau_stateobj *so; boolean new_consts = FALSE; int i; @@ -825,27 +825,27 @@ nv30_fragprog_validate(struct nv30_context *nv30) if (fp->translated) goto update_constants; - /*nv30->fallback_swrast &= ~NV30_NEW_FRAGPROG;*/ - nv30_fragprog_translate(nv30, fp); + /*nvfx->fallback_swrast &= ~NVFX_NEW_FRAGPROG;*/ + nv30_fragprog_translate(nvfx, fp); if (!fp->translated) { - /*nv30->fallback_swrast |= NV30_NEW_FRAGPROG;*/ + /*nvfx->fallback_swrast |= NVFX_NEW_FRAGPROG;*/ return FALSE; } fp->buffer = pscreen->buffer_create(pscreen, 0x100, 0, fp->insn_len * 4); - nv30_fragprog_upload(nv30, fp); + nv30_fragprog_upload(nvfx, fp); so = so_new(4, 4, 1); - so_method(so, nv30->screen->eng3d, NV34TCL_FP_ACTIVE_PROGRAM, 1); + so_method(so, nvfx->screen->eng3d, NV34TCL_FP_ACTIVE_PROGRAM, 1); so_reloc (so, nouveau_bo(fp->buffer), 0, NOUVEAU_BO_VRAM | NOUVEAU_BO_GART | NOUVEAU_BO_RD | NOUVEAU_BO_LOW | NOUVEAU_BO_OR, NV34TCL_FP_ACTIVE_PROGRAM_DMA0, NV34TCL_FP_ACTIVE_PROGRAM_DMA1); - so_method(so, nv30->screen->eng3d, NV34TCL_FP_CONTROL, 1); + so_method(so, nvfx->screen->eng3d, NV34TCL_FP_CONTROL, 1); so_data (so, fp->fp_control); - so_method(so, nv30->screen->eng3d, NV34TCL_FP_REG_CONTROL, 1); + so_method(so, nvfx->screen->eng3d, NV34TCL_FP_REG_CONTROL, 1); so_data (so, (1<<16)|0x4); - so_method(so, nv30->screen->eng3d, NV34TCL_TX_UNITS_ENABLE, 1); + so_method(so, nvfx->screen->eng3d, NV34TCL_TX_UNITS_ENABLE, 1); so_data (so, fp->samplers); so_ref(so, &fp->so); so_ref(NULL, &so); @@ -857,7 +857,7 @@ update_constants: map = pipe_buffer_map(pscreen, constbuf, PIPE_BUFFER_USAGE_CPU_READ); for (i = 0; i < fp->nr_consts; i++) { - struct nv30_fragment_program_data *fpd = &fp->consts[i]; + struct nvfx_fragment_program_data *fpd = &fp->consts[i]; uint32_t *p = &fp->insn[fpd->offset]; uint32_t *cb = (uint32_t *)&map[fpd->index * 4]; @@ -869,11 +869,11 @@ update_constants: pipe_buffer_unmap(pscreen, constbuf); if (new_consts) - nv30_fragprog_upload(nv30, fp); + nv30_fragprog_upload(nvfx, fp); } - if (new_consts || fp->so != nv30->state.hw[NV30_STATE_FRAGPROG]) { - so_ref(fp->so, &nv30->state.hw[NV30_STATE_FRAGPROG]); + if (new_consts || fp->so != nvfx->state.hw[NVFX_STATE_FRAGPROG]) { + so_ref(fp->so, &nvfx->state.hw[NVFX_STATE_FRAGPROG]); return TRUE; } @@ -881,8 +881,8 @@ update_constants: } void -nv30_fragprog_destroy(struct nv30_context *nv30, - struct nv30_fragment_program *fp) +nv30_fragprog_destroy(struct nvfx_context *nvfx, + struct nvfx_fragment_program *fp) { if (fp->buffer) pipe_buffer_reference(&fp->buffer, NULL); @@ -894,10 +894,10 @@ nv30_fragprog_destroy(struct nv30_context *nv30, FREE(fp->insn); } -struct nv30_state_entry nv30_state_fragprog = { +struct nvfx_state_entry nv30_state_fragprog = { .validate = nv30_fragprog_validate, .dirty = { - .pipe = NV30_NEW_FRAGPROG, - .hw = NV30_STATE_FRAGPROG + .pipe = NVFX_NEW_FRAGPROG, + .hw = NVFX_STATE_FRAGPROG } }; diff --git a/src/gallium/drivers/nv30/nv30_fragtex.c b/src/gallium/drivers/nv30/nv30_fragtex.c index 63b5015ed4..34e7dd5444 100644 --- a/src/gallium/drivers/nv30/nv30_fragtex.c +++ b/src/gallium/drivers/nv30/nv30_fragtex.c @@ -58,10 +58,10 @@ nv30_fragtex_format(uint pipe_format) static struct nouveau_stateobj * -nv30_fragtex_build(struct nv30_context *nv30, int unit) +nv30_fragtex_build(struct nvfx_context *nvfx, int unit) { - struct nv30_sampler_state *ps = nv30->tex_sampler[unit]; - struct nv30_miptree *nv30mt = nv30->tex_miptree[unit]; + struct nvfx_sampler_state *ps = nvfx->tex_sampler[unit]; + struct nvfx_miptree *nv30mt = nvfx->tex_miptree[unit]; struct pipe_texture *pt = &nv30mt->base; struct nouveau_bo *bo = nouveau_bo(nv30mt->buffer); struct nv30_texture_format *tf; @@ -101,7 +101,7 @@ nv30_fragtex_build(struct nv30_context *nv30, int unit) txs = tf->swizzle; so = so_new(1, 8, 2); - so_method(so, nv30->screen->eng3d, NV34TCL_TX_OFFSET(unit), 8); + so_method(so, nvfx->screen->eng3d, NV34TCL_TX_OFFSET(unit), 8); so_reloc (so, bo, 0, tex_flags | NOUVEAU_BO_LOW, 0, 0); so_reloc (so, bo, txf, tex_flags | NOUVEAU_BO_OR, NV34TCL_TX_FORMAT_DMA0, NV34TCL_TX_FORMAT_DMA1); @@ -117,10 +117,10 @@ nv30_fragtex_build(struct nv30_context *nv30, int unit) } static boolean -nv30_fragtex_validate(struct nv30_context *nv30) +nv30_fragtex_validate(struct nvfx_context *nvfx) { - struct nv30_fragment_program *fp = nv30->fragprog; - struct nv30_state *state = &nv30->state; + struct nvfx_fragment_program *fp = nvfx->fragprog; + struct nvfx_state *state = &nvfx->state; struct nouveau_stateobj *so; unsigned samplers, unit; @@ -130,32 +130,32 @@ nv30_fragtex_validate(struct nv30_context *nv30) samplers &= ~(1 << unit); so = so_new(1, 1, 0); - so_method(so, nv30->screen->eng3d, NV34TCL_TX_ENABLE(unit), 1); + so_method(so, nvfx->screen->eng3d, NV34TCL_TX_ENABLE(unit), 1); so_data (so, 0); - so_ref(so, &nv30->state.hw[NV30_STATE_FRAGTEX0 + unit]); + so_ref(so, &nvfx->state.hw[NVFX_STATE_FRAGTEX0 + unit]); so_ref(NULL, &so); - state->dirty |= (1ULL << (NV30_STATE_FRAGTEX0 + unit)); + state->dirty |= (1ULL << (NVFX_STATE_FRAGTEX0 + unit)); } - samplers = nv30->dirty_samplers & fp->samplers; + samplers = nvfx->dirty_samplers & fp->samplers; while (samplers) { unit = ffs(samplers) - 1; samplers &= ~(1 << unit); - so = nv30_fragtex_build(nv30, unit); - so_ref(so, &nv30->state.hw[NV30_STATE_FRAGTEX0 + unit]); + so = nv30_fragtex_build(nvfx, unit); + so_ref(so, &nvfx->state.hw[NVFX_STATE_FRAGTEX0 + unit]); so_ref(NULL, &so); - state->dirty |= (1ULL << (NV30_STATE_FRAGTEX0 + unit)); + state->dirty |= (1ULL << (NVFX_STATE_FRAGTEX0 + unit)); } - nv30->state.fp_samplers = fp->samplers; + nvfx->state.fp_samplers = fp->samplers; return FALSE; } -struct nv30_state_entry nv30_state_fragtex = { +struct nvfx_state_entry nv30_state_fragtex = { .validate = nv30_fragtex_validate, .dirty = { - .pipe = NV30_NEW_SAMPLER | NV30_NEW_FRAGPROG, + .pipe = NVFX_NEW_SAMPLER | NVFX_NEW_FRAGPROG, .hw = 0 } }; diff --git a/src/gallium/drivers/nv30/nv30_miptree.c b/src/gallium/drivers/nv30/nv30_miptree.c index bfa27b632f..ada355a444 100644 --- a/src/gallium/drivers/nv30/nv30_miptree.c +++ b/src/gallium/drivers/nv30/nv30_miptree.c @@ -8,7 +8,7 @@ #include "../nouveau/nv04_surface_2d.h" static void -nv30_miptree_layout(struct nv30_miptree *nv30mt) +nv30_miptree_layout(struct nvfx_miptree *nv30mt) { struct pipe_texture *pt = &nv30mt->base; uint width = pt->width0; @@ -62,11 +62,11 @@ nv30_miptree_layout(struct nv30_miptree *nv30mt) static struct pipe_texture * nv30_miptree_create(struct pipe_screen *pscreen, const struct pipe_texture *pt) { - struct nv30_miptree *mt; + struct nvfx_miptree *mt; unsigned buf_usage = PIPE_BUFFER_USAGE_PIXEL | NOUVEAU_BUFFER_USAGE_TEXTURE; - mt = MALLOC(sizeof(struct nv30_miptree)); + mt = MALLOC(sizeof(struct nvfx_miptree)); if (!mt) return NULL; mt->base = *pt; @@ -132,14 +132,14 @@ static struct pipe_texture * nv30_miptree_blanket(struct pipe_screen *pscreen, const struct pipe_texture *pt, const unsigned *stride, struct pipe_buffer *pb) { - struct nv30_miptree *mt; + struct nvfx_miptree *mt; /* Only supports 2D, non-mipmapped textures for the moment */ if (pt->target != PIPE_TEXTURE_2D || pt->last_level != 0 || pt->depth0 != 1) return NULL; - mt = CALLOC_STRUCT(nv30_miptree); + mt = CALLOC_STRUCT(nvfx_miptree); if (!mt) return NULL; @@ -160,7 +160,7 @@ nv30_miptree_blanket(struct pipe_screen *pscreen, const struct pipe_texture *pt, static void nv30_miptree_destroy(struct pipe_texture *pt) { - struct nv30_miptree *mt = (struct nv30_miptree *)pt; + struct nvfx_miptree *mt = (struct nvfx_miptree *)pt; int l; pipe_buffer_reference(&mt->buffer, NULL); @@ -177,7 +177,7 @@ nv30_miptree_surface_new(struct pipe_screen *pscreen, struct pipe_texture *pt, unsigned face, unsigned level, unsigned zslice, unsigned flags) { - struct nv30_miptree *nv30mt = (struct nv30_miptree *)pt; + struct nvfx_miptree *nv30mt = (struct nvfx_miptree *)pt; struct nv04_surface *ns; ns = CALLOC_STRUCT(nv04_surface); @@ -207,7 +207,7 @@ nv30_miptree_surface_new(struct pipe_screen *pscreen, struct pipe_texture *pt, * Note that ns->pitch is always a multiple of 64 for linear surfaces and swizzled surfaces are POT, so * ns->pitch & 63 is equivalent to (ns->pitch < 64 && swizzled)*/ if((ns->pitch & 63) && (ns->base.usage & (PIPE_BUFFER_USAGE_GPU_WRITE | NOUVEAU_BUFFER_USAGE_NO_RENDER)) == PIPE_BUFFER_USAGE_GPU_WRITE) - return &nv04_surface_wrap_for_render(pscreen, ((struct nv30_screen*)pscreen)->eng2d, ns)->base; + return &nv04_surface_wrap_for_render(pscreen, ((struct nvfx_screen*)pscreen)->eng2d, ns)->base; return &ns->base; } @@ -218,7 +218,7 @@ nv30_miptree_surface_del(struct pipe_surface *ps) struct nv04_surface* ns = (struct nv04_surface*)ps; if(ns->backing) { - struct nv30_screen* screen = (struct nv30_screen*)ps->texture->screen; + struct nvfx_screen* screen = (struct nvfx_screen*)ps->texture->screen; if(ns->backing->base.usage & PIPE_BUFFER_USAGE_GPU_WRITE) screen->eng2d->copy(screen->eng2d, &ns->backing->base, 0, 0, ps, 0, 0, ns->base.width, ns->base.height); nv30_miptree_surface_del(&ns->backing->base); diff --git a/src/gallium/drivers/nv30/nv30_query.c b/src/gallium/drivers/nv30/nv30_query.c index 21a5e8ad7c..53b11a8943 100644 --- a/src/gallium/drivers/nv30/nv30_query.c +++ b/src/gallium/drivers/nv30/nv30_query.c @@ -39,9 +39,9 @@ nv30_query_destroy(struct pipe_context *pipe, struct pipe_query *pq) static void nv30_query_begin(struct pipe_context *pipe, struct pipe_query *pq) { - struct nv30_context *nv30 = nv30_context(pipe); + struct nvfx_context *nvfx = nvfx_context(pipe); struct nv30_query *q = nv30_query(pq); - struct nv30_screen *screen = nv30->screen; + struct nvfx_screen *screen = nvfx->screen; struct nouveau_channel *chan = screen->base.channel; struct nouveau_grobj *eng3d = screen->eng3d; @@ -56,9 +56,9 @@ nv30_query_begin(struct pipe_context *pipe, struct pipe_query *pq) pipe->get_query_result(pipe, pq, 1, &tmp); } - if (nouveau_resource_alloc(nv30->screen->query_heap, 1, NULL, &q->object)) + if (nouveau_resource_alloc(nvfx->screen->query_heap, 1, NULL, &q->object)) assert(0); - nouveau_notifier_reset(nv30->screen->query, q->object->start); + nouveau_notifier_reset(nvfx->screen->query, q->object->start); BEGIN_RING(chan, eng3d, NV34TCL_QUERY_RESET, 1); OUT_RING (chan, 1); @@ -71,8 +71,8 @@ nv30_query_begin(struct pipe_context *pipe, struct pipe_query *pq) static void nv30_query_end(struct pipe_context *pipe, struct pipe_query *pq) { - struct nv30_context *nv30 = nv30_context(pipe); - struct nv30_screen *screen = nv30->screen; + struct nvfx_context *nvfx = nvfx_context(pipe); + struct nvfx_screen *screen = nvfx->screen; struct nouveau_channel *chan = screen->base.channel; struct nouveau_grobj *eng3d = screen->eng3d; struct nv30_query *q = nv30_query(pq); @@ -87,7 +87,7 @@ static boolean nv30_query_result(struct pipe_context *pipe, struct pipe_query *pq, boolean wait, uint64_t *result) { - struct nv30_context *nv30 = nv30_context(pipe); + struct nvfx_context *nvfx = nvfx_context(pipe); struct nv30_query *q = nv30_query(pq); assert(q->object && q->type == PIPE_QUERY_OCCLUSION_COUNTER); @@ -95,18 +95,18 @@ nv30_query_result(struct pipe_context *pipe, struct pipe_query *pq, if (!q->ready) { unsigned status; - status = nouveau_notifier_status(nv30->screen->query, + status = nouveau_notifier_status(nvfx->screen->query, q->object->start); if (status != NV_NOTIFY_STATE_STATUS_COMPLETED) { if (wait == FALSE) return FALSE; - nouveau_notifier_wait_status(nv30->screen->query, + nouveau_notifier_wait_status(nvfx->screen->query, q->object->start, NV_NOTIFY_STATE_STATUS_COMPLETED, 0); } - q->result = nouveau_notifier_return_val(nv30->screen->query, + q->result = nouveau_notifier_return_val(nvfx->screen->query, q->object->start); q->ready = TRUE; nouveau_resource_free(&q->object); @@ -117,11 +117,11 @@ nv30_query_result(struct pipe_context *pipe, struct pipe_query *pq, } void -nv30_init_query_functions(struct nv30_context *nv30) +nv30_init_query_functions(struct nvfx_context *nvfx) { - nv30->pipe.create_query = nv30_query_create; - nv30->pipe.destroy_query = nv30_query_destroy; - nv30->pipe.begin_query = nv30_query_begin; - nv30->pipe.end_query = nv30_query_end; - nv30->pipe.get_query_result = nv30_query_result; + nvfx->pipe.create_query = nv30_query_create; + nvfx->pipe.destroy_query = nv30_query_destroy; + nvfx->pipe.begin_query = nv30_query_begin; + nvfx->pipe.end_query = nv30_query_end; + nvfx->pipe.get_query_result = nv30_query_result; } diff --git a/src/gallium/drivers/nv30/nv30_screen.c b/src/gallium/drivers/nv30/nv30_screen.c index 40193f2795..305dfa8386 100644 --- a/src/gallium/drivers/nv30/nv30_screen.c +++ b/src/gallium/drivers/nv30/nv30_screen.c @@ -4,7 +4,7 @@ #include "nouveau/nouveau_screen.h" #include "nv30_context.h" -#include "nv30_screen.h" +#include "nvfx_screen.h" #define NV30TCL_CHIPSET_3X_MASK 0x00000003 #define NV34TCL_CHIPSET_3X_MASK 0x00000010 @@ -156,7 +156,7 @@ nv30_screen_surface_format_supported(struct pipe_screen *pscreen, static struct pipe_buffer * nv30_surface_buffer(struct pipe_surface *surf) { - struct nv30_miptree *mt = (struct nv30_miptree *)surf->texture; + struct nvfx_miptree *mt = (struct nvfx_miptree *)surf->texture; return mt->buffer; } @@ -164,10 +164,10 @@ nv30_surface_buffer(struct pipe_surface *surf) static void nv30_screen_destroy(struct pipe_screen *pscreen) { - struct nv30_screen *screen = nv30_screen(pscreen); + struct nvfx_screen *screen = nvfx_screen(pscreen); unsigned i; - for (i = 0; i < NV30_STATE_MAX; i++) { + for (i = 0; i < NVFX_STATE_MAX; i++) { if (screen->state[i]) so_ref(NULL, &screen->state[i]); } @@ -188,7 +188,7 @@ nv30_screen_destroy(struct pipe_screen *pscreen) struct pipe_screen * nv30_screen_create(struct pipe_winsys *ws, struct nouveau_device *dev) { - struct nv30_screen *screen = CALLOC_STRUCT(nv30_screen); + struct nvfx_screen *screen = CALLOC_STRUCT(nvfx_screen); struct nouveau_channel *chan; struct pipe_screen *pscreen; struct nouveau_stateobj *so; diff --git a/src/gallium/drivers/nv30/nv30_screen.h b/src/gallium/drivers/nv30/nv30_screen.h deleted file mode 100644 index 69a94593f9..0000000000 --- a/src/gallium/drivers/nv30/nv30_screen.h +++ /dev/null @@ -1,38 +0,0 @@ -#ifndef __NV30_SCREEN_H__ -#define __NV30_SCREEN_H__ - -#include "nouveau/nouveau_screen.h" - -#include "nouveau/nv04_surface_2d.h" - -struct nv30_screen { - struct nouveau_screen base; - - struct nouveau_winsys *nvws; - - struct nv30_context *cur_ctx; - - /* HW graphics objects */ - struct nv04_surface_2d *eng2d; - struct nouveau_grobj *eng3d; - struct nouveau_notifier *sync; - - /* Query object resources */ - struct nouveau_notifier *query; - struct nouveau_resource *query_heap; - - /* Vtxprog resources */ - struct nouveau_resource *vp_exec_heap; - struct nouveau_resource *vp_data_heap; - - /* Current 3D state of channel */ - struct nouveau_stateobj *state[NV30_STATE_MAX]; -}; - -static INLINE struct nv30_screen * -nv30_screen(struct pipe_screen *screen) -{ - return (struct nv30_screen *)screen; -} - -#endif diff --git a/src/gallium/drivers/nv30/nv30_state.c b/src/gallium/drivers/nv30/nv30_state.c index 330448000b..5263f894f2 100644 --- a/src/gallium/drivers/nv30/nv30_state.c +++ b/src/gallium/drivers/nv30/nv30_state.c @@ -5,15 +5,15 @@ #include "tgsi/tgsi_parse.h" #include "nv30_context.h" -#include "nv30_state.h" +#include "nvfx_state.h" static void * nv30_blend_state_create(struct pipe_context *pipe, const struct pipe_blend_state *cso) { - struct nv30_context *nv30 = nv30_context(pipe); - struct nouveau_grobj *eng3d = nv30->screen->eng3d; - struct nv30_blend_state *bso = CALLOC(1, sizeof(*bso)); + struct nvfx_context *nvfx = nvfx_context(pipe); + struct nouveau_grobj *eng3d = nvfx->screen->eng3d; + struct nvfx_blend_state *bso = CALLOC(1, sizeof(*bso)); struct nouveau_stateobj *so = so_new(5, 8, 0); if (cso->rt[0].blend_enable) { @@ -59,16 +59,16 @@ nv30_blend_state_create(struct pipe_context *pipe, static void nv30_blend_state_bind(struct pipe_context *pipe, void *hwcso) { - struct nv30_context *nv30 = nv30_context(pipe); + struct nvfx_context *nvfx = nvfx_context(pipe); - nv30->blend = hwcso; - nv30->dirty |= NV30_NEW_BLEND; + nvfx->blend = hwcso; + nvfx->dirty |= NVFX_NEW_BLEND; } static void nv30_blend_state_delete(struct pipe_context *pipe, void *hwcso) { - struct nv30_blend_state *bso = hwcso; + struct nvfx_blend_state *bso = hwcso; so_ref(NULL, &bso->so); FREE(bso); @@ -117,10 +117,10 @@ static void * nv30_sampler_state_create(struct pipe_context *pipe, const struct pipe_sampler_state *cso) { - struct nv30_sampler_state *ps; + struct nvfx_sampler_state *ps; uint32_t filter = 0; - ps = MALLOC(sizeof(struct nv30_sampler_state)); + ps = MALLOC(sizeof(struct nvfx_sampler_state)); ps->fmt = 0; /* TODO: Not all RECTs formats have this bit set, bits 15-8 of format @@ -248,21 +248,21 @@ nv30_sampler_state_create(struct pipe_context *pipe, static void nv30_sampler_state_bind(struct pipe_context *pipe, unsigned nr, void **sampler) { - struct nv30_context *nv30 = nv30_context(pipe); + struct nvfx_context *nvfx = nvfx_context(pipe); unsigned unit; for (unit = 0; unit < nr; unit++) { - nv30->tex_sampler[unit] = sampler[unit]; - nv30->dirty_samplers |= (1 << unit); + nvfx->tex_sampler[unit] = sampler[unit]; + nvfx->dirty_samplers |= (1 << unit); } - for (unit = nr; unit < nv30->nr_samplers; unit++) { - nv30->tex_sampler[unit] = NULL; - nv30->dirty_samplers |= (1 << unit); + for (unit = nr; unit < nvfx->nr_samplers; unit++) { + nvfx->tex_sampler[unit] = NULL; + nvfx->dirty_samplers |= (1 << unit); } - nv30->nr_samplers = nr; - nv30->dirty |= NV30_NEW_SAMPLER; + nvfx->nr_samplers = nr; + nvfx->dirty |= NVFX_NEW_SAMPLER; } static void @@ -275,33 +275,33 @@ static void nv30_set_sampler_texture(struct pipe_context *pipe, unsigned nr, struct pipe_texture **miptree) { - struct nv30_context *nv30 = nv30_context(pipe); + struct nvfx_context *nvfx = nvfx_context(pipe); unsigned unit; for (unit = 0; unit < nr; unit++) { pipe_texture_reference((struct pipe_texture **) - &nv30->tex_miptree[unit], miptree[unit]); - nv30->dirty_samplers |= (1 << unit); + &nvfx->tex_miptree[unit], miptree[unit]); + nvfx->dirty_samplers |= (1 << unit); } - for (unit = nr; unit < nv30->nr_textures; unit++) { + for (unit = nr; unit < nvfx->nr_textures; unit++) { pipe_texture_reference((struct pipe_texture **) - &nv30->tex_miptree[unit], NULL); - nv30->dirty_samplers |= (1 << unit); + &nvfx->tex_miptree[unit], NULL); + nvfx->dirty_samplers |= (1 << unit); } - nv30->nr_textures = nr; - nv30->dirty |= NV30_NEW_SAMPLER; + nvfx->nr_textures = nr; + nvfx->dirty |= NVFX_NEW_SAMPLER; } static void * nv30_rasterizer_state_create(struct pipe_context *pipe, const struct pipe_rasterizer_state *cso) { - struct nv30_context *nv30 = nv30_context(pipe); - struct nv30_rasterizer_state *rsso = CALLOC(1, sizeof(*rsso)); + struct nvfx_context *nvfx = nvfx_context(pipe); + struct nvfx_rasterizer_state *rsso = CALLOC(1, sizeof(*rsso)); struct nouveau_stateobj *so = so_new(9, 19, 0); - struct nouveau_grobj *eng3d = nv30->screen->eng3d; + struct nouveau_grobj *eng3d = nvfx->screen->eng3d; /*XXX: ignored: * light_twoside @@ -413,17 +413,17 @@ nv30_rasterizer_state_create(struct pipe_context *pipe, static void nv30_rasterizer_state_bind(struct pipe_context *pipe, void *hwcso) { - struct nv30_context *nv30 = nv30_context(pipe); + struct nvfx_context *nvfx = nvfx_context(pipe); - nv30->rasterizer = hwcso; - nv30->dirty |= NV30_NEW_RAST; - /*nv30->draw_dirty |= NV30_NEW_RAST;*/ + nvfx->rasterizer = hwcso; + nvfx->dirty |= NVFX_NEW_RAST; + /*nvfx->draw_dirty |= NVFX_NEW_RAST;*/ } static void nv30_rasterizer_state_delete(struct pipe_context *pipe, void *hwcso) { - struct nv30_rasterizer_state *rsso = hwcso; + struct nvfx_rasterizer_state *rsso = hwcso; so_ref(NULL, &rsso->so); FREE(rsso); @@ -433,10 +433,10 @@ static void * nv30_depth_stencil_alpha_state_create(struct pipe_context *pipe, const struct pipe_depth_stencil_alpha_state *cso) { - struct nv30_context *nv30 = nv30_context(pipe); - struct nv30_zsa_state *zsaso = CALLOC(1, sizeof(*zsaso)); + struct nvfx_context *nvfx = nvfx_context(pipe); + struct nvfx_zsa_state *zsaso = CALLOC(1, sizeof(*zsaso)); struct nouveau_stateobj *so = so_new(6, 20, 0); - struct nouveau_grobj *eng3d = nv30->screen->eng3d; + struct nouveau_grobj *eng3d = nvfx->screen->eng3d; so_method(so, eng3d, NV34TCL_DEPTH_FUNC, 3); so_data (so, nvgl_comparison_op(cso->depth.func)); @@ -487,16 +487,16 @@ nv30_depth_stencil_alpha_state_create(struct pipe_context *pipe, static void nv30_depth_stencil_alpha_state_bind(struct pipe_context *pipe, void *hwcso) { - struct nv30_context *nv30 = nv30_context(pipe); + struct nvfx_context *nvfx = nvfx_context(pipe); - nv30->zsa = hwcso; - nv30->dirty |= NV30_NEW_ZSA; + nvfx->zsa = hwcso; + nvfx->dirty |= NVFX_NEW_ZSA; } static void nv30_depth_stencil_alpha_state_delete(struct pipe_context *pipe, void *hwcso) { - struct nv30_zsa_state *zsaso = hwcso; + struct nvfx_zsa_state *zsaso = hwcso; so_ref(NULL, &zsaso->so); FREE(zsaso); @@ -506,12 +506,12 @@ static void * nv30_vp_state_create(struct pipe_context *pipe, const struct pipe_shader_state *cso) { - /*struct nv30_context *nv30 = nv30_context(pipe);*/ - struct nv30_vertex_program *vp; + /*struct nvfx_context *nvfx = nvfx_context(pipe);*/ + struct nvfx_vertex_program *vp; - vp = CALLOC(1, sizeof(struct nv30_vertex_program)); + vp = CALLOC(1, sizeof(struct nvfx_vertex_program)); vp->pipe.tokens = tgsi_dup_tokens(cso->tokens); - /*vp->draw = draw_create_vertex_shader(nv30->draw, &vp->pipe);*/ + /*vp->draw = draw_create_vertex_shader(nvfx->draw, &vp->pipe);*/ return (void *)vp; } @@ -519,21 +519,21 @@ nv30_vp_state_create(struct pipe_context *pipe, static void nv30_vp_state_bind(struct pipe_context *pipe, void *hwcso) { - struct nv30_context *nv30 = nv30_context(pipe); + struct nvfx_context *nvfx = nvfx_context(pipe); - nv30->vertprog = hwcso; - nv30->dirty |= NV30_NEW_VERTPROG; - /*nv30->draw_dirty |= NV30_NEW_VERTPROG;*/ + nvfx->vertprog = hwcso; + nvfx->dirty |= NVFX_NEW_VERTPROG; + /*nvfx->draw_dirty |= NVFX_NEW_VERTPROG;*/ } static void nv30_vp_state_delete(struct pipe_context *pipe, void *hwcso) { - struct nv30_context *nv30 = nv30_context(pipe); - struct nv30_vertex_program *vp = hwcso; + struct nvfx_context *nvfx = nvfx_context(pipe); + struct nvfx_vertex_program *vp = hwcso; - /*draw_delete_vertex_shader(nv30->draw, vp->draw);*/ - nv30_vertprog_destroy(nv30, vp); + /*draw_delete_vertex_shader(nvfx->draw, vp->draw);*/ + nv30_vertprog_destroy(nvfx, vp); FREE((void*)vp->pipe.tokens); FREE(vp); } @@ -542,9 +542,9 @@ static void * nv30_fp_state_create(struct pipe_context *pipe, const struct pipe_shader_state *cso) { - struct nv30_fragment_program *fp; + struct nvfx_fragment_program *fp; - fp = CALLOC(1, sizeof(struct nv30_fragment_program)); + fp = CALLOC(1, sizeof(struct nvfx_fragment_program)); fp->pipe.tokens = tgsi_dup_tokens(cso->tokens); tgsi_scan_shader(fp->pipe.tokens, &fp->info); @@ -555,19 +555,19 @@ nv30_fp_state_create(struct pipe_context *pipe, static void nv30_fp_state_bind(struct pipe_context *pipe, void *hwcso) { - struct nv30_context *nv30 = nv30_context(pipe); + struct nvfx_context *nvfx = nvfx_context(pipe); - nv30->fragprog = hwcso; - nv30->dirty |= NV30_NEW_FRAGPROG; + nvfx->fragprog = hwcso; + nvfx->dirty |= NVFX_NEW_FRAGPROG; } static void nv30_fp_state_delete(struct pipe_context *pipe, void *hwcso) { - struct nv30_context *nv30 = nv30_context(pipe); - struct nv30_fragment_program *fp = hwcso; + struct nvfx_context *nvfx = nvfx_context(pipe); + struct nvfx_fragment_program *fp = hwcso; - nv30_fragprog_destroy(nv30, fp); + nv30_fragprog_destroy(nvfx, fp); FREE((void*)fp->pipe.tokens); FREE(fp); } @@ -576,20 +576,20 @@ static void nv30_set_blend_color(struct pipe_context *pipe, const struct pipe_blend_color *bcol) { - struct nv30_context *nv30 = nv30_context(pipe); + struct nvfx_context *nvfx = nvfx_context(pipe); - nv30->blend_colour = *bcol; - nv30->dirty |= NV30_NEW_BCOL; + nvfx->blend_colour = *bcol; + nvfx->dirty |= NVFX_NEW_BCOL; } static void nv30_set_stencil_ref(struct pipe_context *pipe, const struct pipe_stencil_ref *sr) { - struct nv30_context *nv30 = nv30_context(pipe); + struct nvfx_context *nvfx = nvfx_context(pipe); - nv30->stencil_ref = *sr; - nv30->dirty |= NV30_NEW_SR; + nvfx->stencil_ref = *sr; + nvfx->dirty |= NVFX_NEW_SR; } static void @@ -602,16 +602,16 @@ static void nv30_set_constant_buffer(struct pipe_context *pipe, uint shader, uint index, struct pipe_buffer *buf ) { - struct nv30_context *nv30 = nv30_context(pipe); + struct nvfx_context *nvfx = nvfx_context(pipe); - nv30->constbuf[shader] = buf; - nv30->constbuf_nr[shader] = buf->size / (4 * sizeof(float)); + nvfx->constbuf[shader] = buf; + nvfx->constbuf_nr[shader] = buf->size / (4 * sizeof(float)); if (shader == PIPE_SHADER_VERTEX) { - nv30->dirty |= NV30_NEW_VERTPROG; + nvfx->dirty |= NVFX_NEW_VERTPROG; } else if (shader == PIPE_SHADER_FRAGMENT) { - nv30->dirty |= NV30_NEW_FRAGPROG; + nvfx->dirty |= NVFX_NEW_FRAGPROG; } } @@ -619,54 +619,54 @@ static void nv30_set_framebuffer_state(struct pipe_context *pipe, const struct pipe_framebuffer_state *fb) { - struct nv30_context *nv30 = nv30_context(pipe); + struct nvfx_context *nvfx = nvfx_context(pipe); - nv30->framebuffer = *fb; - nv30->dirty |= NV30_NEW_FB; + nvfx->framebuffer = *fb; + nvfx->dirty |= NVFX_NEW_FB; } static void nv30_set_polygon_stipple(struct pipe_context *pipe, const struct pipe_poly_stipple *stipple) { - struct nv30_context *nv30 = nv30_context(pipe); + struct nvfx_context *nvfx = nvfx_context(pipe); - memcpy(nv30->stipple, stipple->stipple, 4 * 32); - nv30->dirty |= NV30_NEW_STIPPLE; + memcpy(nvfx->stipple, stipple->stipple, 4 * 32); + nvfx->dirty |= NVFX_NEW_STIPPLE; } static void nv30_set_scissor_state(struct pipe_context *pipe, const struct pipe_scissor_state *s) { - struct nv30_context *nv30 = nv30_context(pipe); + struct nvfx_context *nvfx = nvfx_context(pipe); - nv30->scissor = *s; - nv30->dirty |= NV30_NEW_SCISSOR; + nvfx->scissor = *s; + nvfx->dirty |= NVFX_NEW_SCISSOR; } static void nv30_set_viewport_state(struct pipe_context *pipe, const struct pipe_viewport_state *vpt) { - struct nv30_context *nv30 = nv30_context(pipe); + struct nvfx_context *nvfx = nvfx_context(pipe); - nv30->viewport = *vpt; - nv30->dirty |= NV30_NEW_VIEWPORT; - /*nv30->draw_dirty |= NV30_NEW_VIEWPORT;*/ + nvfx->viewport = *vpt; + nvfx->dirty |= NVFX_NEW_VIEWPORT; + /*nvfx->draw_dirty |= NVFX_NEW_VIEWPORT;*/ } static void nv30_set_vertex_buffers(struct pipe_context *pipe, unsigned count, const struct pipe_vertex_buffer *vb) { - struct nv30_context *nv30 = nv30_context(pipe); + struct nvfx_context *nvfx = nvfx_context(pipe); - memcpy(nv30->vtxbuf, vb, sizeof(*vb) * count); - nv30->vtxbuf_nr = count; + memcpy(nvfx->vtxbuf, vb, sizeof(*vb) * count); + nvfx->vtxbuf_nr = count; - nv30->dirty |= NV30_NEW_ARRAYS; - /*nv30->draw_dirty |= NV30_NEW_ARRAYS;*/ + nvfx->dirty |= NVFX_NEW_ARRAYS; + /*nvfx->draw_dirty |= NVFX_NEW_ARRAYS;*/ } static void * @@ -674,7 +674,7 @@ nv30_vtxelts_state_create(struct pipe_context *pipe, unsigned num_elements, const struct pipe_vertex_element *elements) { - struct nv30_vtxelt_state *cso = CALLOC_STRUCT(nv30_vtxelt_state); + struct nvfx_vtxelt_state *cso = CALLOC_STRUCT(nvfx_vtxelt_state); assert(num_elements < 16); /* not doing fallbacks yet */ cso->num_elements = num_elements; @@ -694,57 +694,57 @@ nv30_vtxelts_state_delete(struct pipe_context *pipe, void *hwcso) static void nv30_vtxelts_state_bind(struct pipe_context *pipe, void *hwcso) { - struct nv30_context *nv30 = nv30_context(pipe); + struct nvfx_context *nvfx = nvfx_context(pipe); - nv30->vtxelt = hwcso; - nv30->dirty |= NV30_NEW_ARRAYS; - /*nv30->draw_dirty |= NV30_NEW_ARRAYS;*/ + nvfx->vtxelt = hwcso; + nvfx->dirty |= NVFX_NEW_ARRAYS; + /*nvfx->draw_dirty |= NVFX_NEW_ARRAYS;*/ } void -nv30_init_state_functions(struct nv30_context *nv30) +nv30_init_state_functions(struct nvfx_context *nvfx) { - nv30->pipe.create_blend_state = nv30_blend_state_create; - nv30->pipe.bind_blend_state = nv30_blend_state_bind; - nv30->pipe.delete_blend_state = nv30_blend_state_delete; + nvfx->pipe.create_blend_state = nv30_blend_state_create; + nvfx->pipe.bind_blend_state = nv30_blend_state_bind; + nvfx->pipe.delete_blend_state = nv30_blend_state_delete; - nv30->pipe.create_sampler_state = nv30_sampler_state_create; - nv30->pipe.bind_fragment_sampler_states = nv30_sampler_state_bind; - nv30->pipe.delete_sampler_state = nv30_sampler_state_delete; - nv30->pipe.set_fragment_sampler_textures = nv30_set_sampler_texture; + nvfx->pipe.create_sampler_state = nv30_sampler_state_create; + nvfx->pipe.bind_fragment_sampler_states = nv30_sampler_state_bind; + nvfx->pipe.delete_sampler_state = nv30_sampler_state_delete; + nvfx->pipe.set_fragment_sampler_textures = nv30_set_sampler_texture; - nv30->pipe.create_rasterizer_state = nv30_rasterizer_state_create; - nv30->pipe.bind_rasterizer_state = nv30_rasterizer_state_bind; - nv30->pipe.delete_rasterizer_state = nv30_rasterizer_state_delete; + nvfx->pipe.create_rasterizer_state = nv30_rasterizer_state_create; + nvfx->pipe.bind_rasterizer_state = nv30_rasterizer_state_bind; + nvfx->pipe.delete_rasterizer_state = nv30_rasterizer_state_delete; - nv30->pipe.create_depth_stencil_alpha_state = + nvfx->pipe.create_depth_stencil_alpha_state = nv30_depth_stencil_alpha_state_create; - nv30->pipe.bind_depth_stencil_alpha_state = + nvfx->pipe.bind_depth_stencil_alpha_state = nv30_depth_stencil_alpha_state_bind; - nv30->pipe.delete_depth_stencil_alpha_state = + nvfx->pipe.delete_depth_stencil_alpha_state = nv30_depth_stencil_alpha_state_delete; - nv30->pipe.create_vs_state = nv30_vp_state_create; - nv30->pipe.bind_vs_state = nv30_vp_state_bind; - nv30->pipe.delete_vs_state = nv30_vp_state_delete; + nvfx->pipe.create_vs_state = nv30_vp_state_create; + nvfx->pipe.bind_vs_state = nv30_vp_state_bind; + nvfx->pipe.delete_vs_state = nv30_vp_state_delete; - nv30->pipe.create_fs_state = nv30_fp_state_create; - nv30->pipe.bind_fs_state = nv30_fp_state_bind; - nv30->pipe.delete_fs_state = nv30_fp_state_delete; + nvfx->pipe.create_fs_state = nv30_fp_state_create; + nvfx->pipe.bind_fs_state = nv30_fp_state_bind; + nvfx->pipe.delete_fs_state = nv30_fp_state_delete; - nv30->pipe.set_blend_color = nv30_set_blend_color; - nv30->pipe.set_stencil_ref = nv30_set_stencil_ref; - nv30->pipe.set_clip_state = nv30_set_clip_state; - nv30->pipe.set_constant_buffer = nv30_set_constant_buffer; - nv30->pipe.set_framebuffer_state = nv30_set_framebuffer_state; - nv30->pipe.set_polygon_stipple = nv30_set_polygon_stipple; - nv30->pipe.set_scissor_state = nv30_set_scissor_state; - nv30->pipe.set_viewport_state = nv30_set_viewport_state; + nvfx->pipe.set_blend_color = nv30_set_blend_color; + nvfx->pipe.set_stencil_ref = nv30_set_stencil_ref; + nvfx->pipe.set_clip_state = nv30_set_clip_state; + nvfx->pipe.set_constant_buffer = nv30_set_constant_buffer; + nvfx->pipe.set_framebuffer_state = nv30_set_framebuffer_state; + nvfx->pipe.set_polygon_stipple = nv30_set_polygon_stipple; + nvfx->pipe.set_scissor_state = nv30_set_scissor_state; + nvfx->pipe.set_viewport_state = nv30_set_viewport_state; - nv30->pipe.create_vertex_elements_state = nv30_vtxelts_state_create; - nv30->pipe.delete_vertex_elements_state = nv30_vtxelts_state_delete; - nv30->pipe.bind_vertex_elements_state = nv30_vtxelts_state_bind; + nvfx->pipe.create_vertex_elements_state = nv30_vtxelts_state_create; + nvfx->pipe.delete_vertex_elements_state = nv30_vtxelts_state_delete; + nvfx->pipe.bind_vertex_elements_state = nv30_vtxelts_state_bind; - nv30->pipe.set_vertex_buffers = nv30_set_vertex_buffers; + nvfx->pipe.set_vertex_buffers = nv30_set_vertex_buffers; } diff --git a/src/gallium/drivers/nv30/nv30_state.h b/src/gallium/drivers/nv30/nv30_state.h deleted file mode 100644 index b1c7f84a0a..0000000000 --- a/src/gallium/drivers/nv30/nv30_state.h +++ /dev/null @@ -1,86 +0,0 @@ -#ifndef __NV30_STATE_H__ -#define __NV30_STATE_H__ - -#include "pipe/p_state.h" -#include "tgsi/tgsi_scan.h" - -struct nv30_sampler_state { - uint32_t fmt; - uint32_t wrap; - uint32_t en; - uint32_t filt; - uint32_t bcol; -}; - -struct nv30_vertex_program_exec { - uint32_t data[4]; - boolean has_branch_offset; - int const_index; -}; - -struct nv30_vertex_program_data { - int index; /* immediates == -1 */ - float value[4]; -}; - -struct nv30_vertex_program { - struct pipe_shader_state pipe; - - boolean translated; - - struct nv30_vertex_program_exec *insns; - unsigned nr_insns; - struct nv30_vertex_program_data *consts; - unsigned nr_consts; - - struct nouveau_resource *exec; - unsigned exec_start; - struct nouveau_resource *data; - unsigned data_start; - unsigned data_start_min; - - uint32_t ir; - uint32_t or; - struct nouveau_stateobj *so; -}; - -struct nv30_fragment_program_data { - unsigned offset; - unsigned index; -}; - -struct nv30_fragment_program { - struct pipe_shader_state pipe; - struct tgsi_shader_info info; - - boolean translated; - unsigned samplers; - - uint32_t *insn; - int insn_len; - - struct nv30_fragment_program_data *consts; - unsigned nr_consts; - - struct pipe_buffer *buffer; - - uint32_t fp_control; - struct nouveau_stateobj *so; -}; - -#define NV30_MAX_TEXTURE_LEVELS 16 - -struct nv30_miptree { - struct pipe_texture base; - struct nouveau_bo *bo; - - struct pipe_buffer *buffer; - uint total_size; - - struct { - uint pitch; - uint *image_offset; - } level[NV30_MAX_TEXTURE_LEVELS]; -}; - -#endif diff --git a/src/gallium/drivers/nv30/nv30_state_blend.c b/src/gallium/drivers/nv30/nv30_state_blend.c index eb0199cf65..de368e5bd7 100644 --- a/src/gallium/drivers/nv30/nv30_state_blend.c +++ b/src/gallium/drivers/nv30/nv30_state_blend.c @@ -1,41 +1,41 @@ #include "nv30_context.h" static boolean -nv30_state_blend_validate(struct nv30_context *nv30) +nv30_state_blend_validate(struct nvfx_context *nvfx) { - so_ref(nv30->blend->so, &nv30->state.hw[NV30_STATE_BLEND]); + so_ref(nvfx->blend->so, &nvfx->state.hw[NVFX_STATE_BLEND]); return TRUE; } -struct nv30_state_entry nv30_state_blend = { +struct nvfx_state_entry nv30_state_blend = { .validate = nv30_state_blend_validate, .dirty = { - .pipe = NV30_NEW_BLEND, - .hw = NV30_STATE_BLEND + .pipe = NVFX_NEW_BLEND, + .hw = NVFX_STATE_BLEND } }; static boolean -nv30_state_blend_colour_validate(struct nv30_context *nv30) +nv30_state_blend_colour_validate(struct nvfx_context *nvfx) { struct nouveau_stateobj *so = so_new(1, 1, 0); - struct pipe_blend_color *bcol = &nv30->blend_colour; + struct pipe_blend_color *bcol = &nvfx->blend_colour; - so_method(so, nv30->screen->eng3d, NV34TCL_BLEND_COLOR, 1); + so_method(so, nvfx->screen->eng3d, NV34TCL_BLEND_COLOR, 1); so_data (so, ((float_to_ubyte(bcol->color[3]) << 24) | (float_to_ubyte(bcol->color[0]) << 16) | (float_to_ubyte(bcol->color[1]) << 8) | (float_to_ubyte(bcol->color[2]) << 0))); - so_ref(so, &nv30->state.hw[NV30_STATE_BCOL]); + so_ref(so, &nvfx->state.hw[NVFX_STATE_BCOL]); so_ref(NULL, &so); return TRUE; } -struct nv30_state_entry nv30_state_blend_colour = { +struct nvfx_state_entry nv30_state_blend_colour = { .validate = nv30_state_blend_colour_validate, .dirty = { - .pipe = NV30_NEW_BCOL, - .hw = NV30_STATE_BCOL + .pipe = NVFX_NEW_BCOL, + .hw = NVFX_STATE_BCOL } }; diff --git a/src/gallium/drivers/nv30/nv30_state_emit.c b/src/gallium/drivers/nv30/nv30_state_emit.c index deefe7fd8d..6df93618da 100644 --- a/src/gallium/drivers/nv30/nv30_state_emit.c +++ b/src/gallium/drivers/nv30/nv30_state_emit.c @@ -1,7 +1,7 @@ #include "nv30_context.h" -#include "nv30_state.h" +#include "nvfx_state.h" -static struct nv30_state_entry *render_states[] = { +static struct nvfx_state_entry *render_states[] = { &nv30_state_framebuffer, &nv30_state_rasterizer, &nv30_state_scissor, @@ -19,49 +19,48 @@ static struct nv30_state_entry *render_states[] = { }; static void -nv30_state_do_validate(struct nv30_context *nv30, - struct nv30_state_entry **states) +nv30_state_do_validate(struct nvfx_context *nvfx, + struct nvfx_state_entry **states) { while (*states) { - struct nv30_state_entry *e = *states; + struct nvfx_state_entry *e = *states; - if (nv30->dirty & e->dirty.pipe) { - if (e->validate(nv30)) { - nv30->state.dirty |= (1ULL << e->dirty.hw); - } + if (nvfx->dirty & e->dirty.pipe) { + if (e->validate(nvfx)) + nvfx->state.dirty |= (1ULL << e->dirty.hw); } states++; } - nv30->dirty = 0; + nvfx->dirty = 0; } void -nv30_state_emit(struct nv30_context *nv30) +nv30_state_emit(struct nvfx_context *nvfx) { - struct nouveau_channel *chan = nv30->screen->base.channel; - struct nv30_state *state = &nv30->state; - struct nv30_screen *screen = nv30->screen; + struct nouveau_channel *chan = nvfx->screen->base.channel; + struct nvfx_state *state = &nvfx->state; + struct nvfx_screen *screen = nvfx->screen; unsigned i; uint64_t states; /* XXX: racy! */ - if (nv30 != screen->cur_ctx) { - for (i = 0; i < NV30_STATE_MAX; i++) { + if (nvfx != screen->cur_ctx) { + for (i = 0; i < NVFX_STATE_MAX; i++) { if (state->hw[i] && screen->state[i] != state->hw[i]) state->dirty |= (1ULL << i); } - screen->cur_ctx = nv30; + screen->cur_ctx = nvfx; } for (i = 0, states = state->dirty; states; i++) { if (!(states & (1ULL << i))) continue; - so_ref (state->hw[i], &nv30->screen->state[i]); + so_ref (state->hw[i], &nvfx->screen->state[i]); if (state->hw[i]) - so_emit(chan, nv30->screen->state[i]); + so_emit(chan, nvfx->screen->state[i]); states &= ~(1ULL << i); } @@ -71,48 +70,48 @@ nv30_state_emit(struct nv30_context *nv30) void nv30_state_flush_notify(struct nouveau_channel *chan) { - struct nv30_context *nv30 = chan->user_private; - struct nv30_state *state = &nv30->state; + struct nvfx_context *nvfx = chan->user_private; + struct nvfx_state *state = &nvfx->state; unsigned i, samplers; - so_emit_reloc_markers(chan, state->hw[NV30_STATE_FB]); + so_emit_reloc_markers(chan, state->hw[NVFX_STATE_FB]); for (i = 0, samplers = state->fp_samplers; i < 16 && samplers; i++) { if (!(samplers & (1 << i))) continue; so_emit_reloc_markers(chan, - state->hw[NV30_STATE_FRAGTEX0+i]); + state->hw[NVFX_STATE_FRAGTEX0+i]); samplers &= ~(1ULL << i); } - so_emit_reloc_markers(chan, state->hw[NV30_STATE_FRAGPROG]); - if (state->hw[NV30_STATE_VTXBUF] /*&& nv30->render_mode == HW*/) - so_emit_reloc_markers(chan, state->hw[NV30_STATE_VTXBUF]); + so_emit_reloc_markers(chan, state->hw[NVFX_STATE_FRAGPROG]); + if (state->hw[NVFX_STATE_VTXBUF] /*&& nvfx->render_mode == HW*/) + so_emit_reloc_markers(chan, state->hw[NVFX_STATE_VTXBUF]); } boolean -nv30_state_validate(struct nv30_context *nv30) +nv30_state_validate(struct nvfx_context *nvfx) { #if 0 - boolean was_sw = nv30->fallback_swtnl ? TRUE : FALSE; + boolean was_sw = nvfx->fallback_swtnl ? TRUE : FALSE; - if (nv30->render_mode != HW) { + if (nvfx->render_mode != HW) { /* Don't even bother trying to go back to hw if none * of the states that caused swtnl previously have changed. */ - if ((nv30->fallback_swtnl & nv30->dirty) - != nv30->fallback_swtnl) + if ((nvfx->fallback_swtnl & nvfx->dirty) + != nvfx->fallback_swtnl) return FALSE; /* Attempt to go to hwtnl again */ - nv30->pipe.flush(&nv30->pipe, 0, NULL); - nv30->dirty |= (NV30_NEW_VIEWPORT | - NV30_NEW_VERTPROG | - NV30_NEW_ARRAYS); - nv30->render_mode = HW; + nvfx->pipe.flush(&nvfx->pipe, 0, NULL); + nvfx->dirty |= (NVFX_NEW_VIEWPORT | + NVFX_NEW_VERTPROG | + NVFX_NEW_ARRAYS); + nvfx->render_mode = HW; } #endif - nv30_state_do_validate(nv30, render_states); + nv30_state_do_validate(nvfx, render_states); #if 0 - if (nv30->fallback_swtnl || nv30->fallback_swrast) + if (nvfx->fallback_swtnl || nvfx->fallback_swrast) return FALSE; if (was_sw) diff --git a/src/gallium/drivers/nv30/nv30_state_fb.c b/src/gallium/drivers/nv30/nv30_state_fb.c index 23d17c0c60..e9e215dcce 100644 --- a/src/gallium/drivers/nv30/nv30_state_fb.c +++ b/src/gallium/drivers/nv30/nv30_state_fb.c @@ -2,11 +2,11 @@ #include "nouveau/nouveau_util.h" static boolean -nv30_state_framebuffer_validate(struct nv30_context *nv30) +nv30_state_framebuffer_validate(struct nvfx_context *nvfx) { - struct pipe_framebuffer_state *fb = &nv30->framebuffer; - struct nouveau_channel *chan = nv30->screen->base.channel; - struct nouveau_grobj *eng3d = nv30->screen->eng3d; + struct pipe_framebuffer_state *fb = &nvfx->framebuffer; + struct nouveau_channel *chan = nvfx->screen->base.channel; + struct nouveau_grobj *eng3d = nvfx->screen->eng3d; struct nv04_surface *rt[2], *zeta = NULL; uint32_t rt_enable = 0, rt_format = 0; int i, colour_format = 0, zeta_format = 0, depth_only = 0; @@ -14,7 +14,7 @@ nv30_state_framebuffer_validate(struct nv30_context *nv30) unsigned rt_flags = NOUVEAU_BO_RDWR | NOUVEAU_BO_VRAM; unsigned w = fb->width; unsigned h = fb->height; - struct nv30_miptree *nv30mt; + struct nvfx_miptree *nv30mt; int colour_bits = 32, zeta_bits = 32; for (i = 0; i < fb->nr_cbufs; i++) { @@ -109,7 +109,7 @@ nv30_state_framebuffer_validate(struct nv30_context *nv30) pitch |= (pitch << 16); } - nv30mt = (struct nv30_miptree *) rt0->base.texture; + nv30mt = (struct nvfx_miptree *) rt0->base.texture; so_method(so, eng3d, NV34TCL_DMA_COLOR0, 1); so_reloc (so, nouveau_bo(nv30mt->buffer), 0, rt_flags | NOUVEAU_BO_OR, chan->vram->handle, chan->gart->handle); @@ -120,7 +120,7 @@ nv30_state_framebuffer_validate(struct nv30_context *nv30) } if (rt_enable & NV34TCL_RT_ENABLE_COLOR1) { - nv30mt = (struct nv30_miptree *)rt[1]->base.texture; + nv30mt = (struct nvfx_miptree *)rt[1]->base.texture; so_method(so, eng3d, NV34TCL_DMA_COLOR1, 1); so_reloc (so, nouveau_bo(nv30mt->buffer), 0, rt_flags | NOUVEAU_BO_OR, chan->vram->handle, chan->gart->handle); @@ -131,7 +131,7 @@ nv30_state_framebuffer_validate(struct nv30_context *nv30) } if (zeta_format) { - nv30mt = (struct nv30_miptree *)zeta->base.texture; + nv30mt = (struct nvfx_miptree *)zeta->base.texture; so_method(so, eng3d, NV34TCL_DMA_ZETA, 1); so_reloc (so, nouveau_bo(nv30mt->buffer), 0, rt_flags | NOUVEAU_BO_OR, chan->vram->handle, chan->gart->handle); @@ -159,15 +159,15 @@ nv30_state_framebuffer_validate(struct nv30_context *nv30) so_method(so, eng3d, NV34TCL_VIEWPORT_TX_ORIGIN, 1); so_data (so, 0); - so_ref(so, &nv30->state.hw[NV30_STATE_FB]); + so_ref(so, &nvfx->state.hw[NVFX_STATE_FB]); so_ref(NULL, &so); return TRUE; } -struct nv30_state_entry nv30_state_framebuffer = { +struct nvfx_state_entry nv30_state_framebuffer = { .validate = nv30_state_framebuffer_validate, .dirty = { - .pipe = NV30_NEW_FB, - .hw = NV30_STATE_FB + .pipe = NVFX_NEW_FB, + .hw = NVFX_STATE_FB } }; diff --git a/src/gallium/drivers/nv30/nv30_state_rasterizer.c b/src/gallium/drivers/nv30/nv30_state_rasterizer.c index 6d1b60e043..1a83da5204 100644 --- a/src/gallium/drivers/nv30/nv30_state_rasterizer.c +++ b/src/gallium/drivers/nv30/nv30_state_rasterizer.c @@ -1,17 +1,17 @@ #include "nv30_context.h" static boolean -nv30_state_rasterizer_validate(struct nv30_context *nv30) +nv30_state_rasterizer_validate(struct nvfx_context *nvfx) { - so_ref(nv30->rasterizer->so, - &nv30->state.hw[NV30_STATE_RAST]); + so_ref(nvfx->rasterizer->so, + &nvfx->state.hw[NVFX_STATE_RAST]); return TRUE; } -struct nv30_state_entry nv30_state_rasterizer = { +struct nvfx_state_entry nv30_state_rasterizer = { .validate = nv30_state_rasterizer_validate, .dirty = { - .pipe = NV30_NEW_RAST, - .hw = NV30_STATE_RAST + .pipe = NVFX_NEW_RAST, + .hw = NVFX_STATE_RAST } }; diff --git a/src/gallium/drivers/nv30/nv30_state_scissor.c b/src/gallium/drivers/nv30/nv30_state_scissor.c index f58bb0161e..e91680e2d1 100644 --- a/src/gallium/drivers/nv30/nv30_state_scissor.c +++ b/src/gallium/drivers/nv30/nv30_state_scissor.c @@ -1,20 +1,20 @@ #include "nv30_context.h" static boolean -nv30_state_scissor_validate(struct nv30_context *nv30) +nv30_state_scissor_validate(struct nvfx_context *nvfx) { - struct pipe_rasterizer_state *rast = &nv30->rasterizer->pipe; - struct pipe_scissor_state *s = &nv30->scissor; + struct pipe_rasterizer_state *rast = &nvfx->rasterizer->pipe; + struct pipe_scissor_state *s = &nvfx->scissor; struct nouveau_stateobj *so; - if (nv30->state.hw[NV30_STATE_SCISSOR] && - (rast->scissor == 0 && nv30->state.scissor_enabled == 0)) + if (nvfx->state.hw[NVFX_STATE_SCISSOR] && + (rast->scissor == 0 && nvfx->state.scissor_enabled == 0)) return FALSE; - nv30->state.scissor_enabled = rast->scissor; + nvfx->state.scissor_enabled = rast->scissor; so = so_new(1, 2, 0); - so_method(so, nv30->screen->eng3d, NV34TCL_SCISSOR_HORIZ, 2); - if (nv30->state.scissor_enabled) { + so_method(so, nvfx->screen->eng3d, NV34TCL_SCISSOR_HORIZ, 2); + if (nvfx->state.scissor_enabled) { so_data (so, ((s->maxx - s->minx) << 16) | s->minx); so_data (so, ((s->maxy - s->miny) << 16) | s->miny); } else { @@ -22,15 +22,15 @@ nv30_state_scissor_validate(struct nv30_context *nv30) so_data (so, 4096 << 16); } - so_ref(so, &nv30->state.hw[NV30_STATE_SCISSOR]); + so_ref(so, &nvfx->state.hw[NVFX_STATE_SCISSOR]); so_ref(NULL, &so); return TRUE; } -struct nv30_state_entry nv30_state_scissor = { +struct nvfx_state_entry nv30_state_scissor = { .validate = nv30_state_scissor_validate, .dirty = { - .pipe = NV30_NEW_SCISSOR | NV30_NEW_RAST, - .hw = NV30_STATE_SCISSOR + .pipe = NVFX_NEW_SCISSOR | NVFX_NEW_RAST, + .hw = NVFX_STATE_SCISSOR } }; diff --git a/src/gallium/drivers/nv30/nv30_state_stipple.c b/src/gallium/drivers/nv30/nv30_state_stipple.c index 46a6975438..eceb0c57f9 100644 --- a/src/gallium/drivers/nv30/nv30_state_stipple.c +++ b/src/gallium/drivers/nv30/nv30_state_stipple.c @@ -1,14 +1,14 @@ #include "nv30_context.h" static boolean -nv30_state_stipple_validate(struct nv30_context *nv30) +nv30_state_stipple_validate(struct nvfx_context *nvfx) { - struct pipe_rasterizer_state *rast = &nv30->rasterizer->pipe; - struct nouveau_grobj *eng3d = nv30->screen->eng3d; + struct pipe_rasterizer_state *rast = &nvfx->rasterizer->pipe; + struct nouveau_grobj *eng3d = nvfx->screen->eng3d; struct nouveau_stateobj *so; - if (nv30->state.hw[NV30_STATE_STIPPLE] && - (rast->poly_stipple_enable == 0 && nv30->state.stipple_enabled == 0)) + if (nvfx->state.hw[NVFX_STATE_STIPPLE] && + (rast->poly_stipple_enable == 0 && nvfx->state.stipple_enabled == 0)) return FALSE; if (rast->poly_stipple_enable) { @@ -19,22 +19,22 @@ nv30_state_stipple_validate(struct nv30_context *nv30) so_data (so, 1); so_method(so, eng3d, NV34TCL_POLYGON_STIPPLE_PATTERN(0), 32); for (i = 0; i < 32; i++) - so_data(so, nv30->stipple[i]); + so_data(so, nvfx->stipple[i]); } else { so = so_new(1, 1, 0); so_method(so, eng3d, NV34TCL_POLYGON_STIPPLE_ENABLE, 1); so_data (so, 0); } - so_ref(so, &nv30->state.hw[NV30_STATE_STIPPLE]); + so_ref(so, &nvfx->state.hw[NVFX_STATE_STIPPLE]); so_ref(NULL, &so); return TRUE; } -struct nv30_state_entry nv30_state_stipple = { +struct nvfx_state_entry nv30_state_stipple = { .validate = nv30_state_stipple_validate, .dirty = { - .pipe = NV30_NEW_STIPPLE | NV30_NEW_RAST, - .hw = NV30_STATE_STIPPLE, + .pipe = NVFX_NEW_STIPPLE | NVFX_NEW_RAST, + .hw = NVFX_STATE_STIPPLE, } }; diff --git a/src/gallium/drivers/nv30/nv30_state_viewport.c b/src/gallium/drivers/nv30/nv30_state_viewport.c index 66fc112f3c..2e9d5b14c7 100644 --- a/src/gallium/drivers/nv30/nv30_state_viewport.c +++ b/src/gallium/drivers/nv30/nv30_state_viewport.c @@ -1,17 +1,17 @@ #include "nv30_context.h" static boolean -nv30_state_viewport_validate(struct nv30_context *nv30) +nv30_state_viewport_validate(struct nvfx_context *nvfx) { - struct pipe_viewport_state *vpt = &nv30->viewport; + struct pipe_viewport_state *vpt = &nvfx->viewport; struct nouveau_stateobj *so; - if (nv30->state.hw[NV30_STATE_VIEWPORT] && - !(nv30->dirty & NV30_NEW_VIEWPORT)) + if (nvfx->state.hw[NVFX_STATE_VIEWPORT] && + !(nvfx->dirty & NVFX_NEW_VIEWPORT)) return FALSE; so = so_new(3, 10, 0); - so_method(so, nv30->screen->eng3d, + so_method(so, nvfx->screen->eng3d, NV34TCL_VIEWPORT_TRANSLATE_X, 8); so_data (so, fui(vpt->translate[0])); so_data (so, fui(vpt->translate[1])); @@ -21,22 +21,22 @@ nv30_state_viewport_validate(struct nv30_context *nv30) so_data (so, fui(vpt->scale[1])); so_data (so, fui(vpt->scale[2])); so_data (so, fui(vpt->scale[3])); -/* so_method(so, nv30->screen->eng3d, 0x1d78, 1); +/* so_method(so, nvfx->screen->eng3d, 0x1d78, 1); so_data (so, 1); */ /* TODO/FIXME: never saw value 0x0110 in renouveau dumps, only 0x0001 */ - so_method(so, nv30->screen->eng3d, 0x1d78, 1); + so_method(so, nvfx->screen->eng3d, 0x1d78, 1); so_data (so, 1); - so_ref(so, &nv30->state.hw[NV30_STATE_VIEWPORT]); + so_ref(so, &nvfx->state.hw[NVFX_STATE_VIEWPORT]); so_ref(NULL, &so); return TRUE; } -struct nv30_state_entry nv30_state_viewport = { +struct nvfx_state_entry nv30_state_viewport = { .validate = nv30_state_viewport_validate, .dirty = { - .pipe = NV30_NEW_VIEWPORT | NV30_NEW_RAST, - .hw = NV30_STATE_VIEWPORT + .pipe = NVFX_NEW_VIEWPORT | NVFX_NEW_RAST, + .hw = NVFX_STATE_VIEWPORT } }; diff --git a/src/gallium/drivers/nv30/nv30_state_zsa.c b/src/gallium/drivers/nv30/nv30_state_zsa.c index b0aac8ee46..0832408edf 100644 --- a/src/gallium/drivers/nv30/nv30_state_zsa.c +++ b/src/gallium/drivers/nv30/nv30_state_zsa.c @@ -1,41 +1,41 @@ #include "nv30_context.h" static boolean -nv30_state_zsa_validate(struct nv30_context *nv30) +nv30_state_zsa_validate(struct nvfx_context *nvfx) { - so_ref(nv30->zsa->so, - &nv30->state.hw[NV30_STATE_ZSA]); + so_ref(nvfx->zsa->so, + &nvfx->state.hw[NVFX_STATE_ZSA]); return TRUE; } -struct nv30_state_entry nv30_state_zsa = { +struct nvfx_state_entry nv30_state_zsa = { .validate = nv30_state_zsa_validate, .dirty = { - .pipe = NV30_NEW_ZSA, - .hw = NV30_STATE_ZSA + .pipe = NVFX_NEW_ZSA, + .hw = NVFX_STATE_ZSA } }; static boolean -nv30_state_sr_validate(struct nv30_context *nv30) +nv30_state_sr_validate(struct nvfx_context *nvfx) { struct nouveau_stateobj *so = so_new(2, 2, 0); - struct pipe_stencil_ref *sr = &nv30->stencil_ref; + struct pipe_stencil_ref *sr = &nvfx->stencil_ref; - so_method(so, nv30->screen->eng3d, NV34TCL_STENCIL_FRONT_FUNC_REF, 1); + so_method(so, nvfx->screen->eng3d, NV34TCL_STENCIL_FRONT_FUNC_REF, 1); so_data (so, sr->ref_value[0]); - so_method(so, nv30->screen->eng3d, NV34TCL_STENCIL_BACK_FUNC_REF, 1); + so_method(so, nvfx->screen->eng3d, NV34TCL_STENCIL_BACK_FUNC_REF, 1); so_data (so, sr->ref_value[1]); - so_ref(so, &nv30->state.hw[NV30_STATE_SR]); + so_ref(so, &nvfx->state.hw[NVFX_STATE_SR]); so_ref(NULL, &so); return TRUE; } -struct nv30_state_entry nv30_state_sr = { +struct nvfx_state_entry nv30_state_sr = { .validate = nv30_state_sr_validate, .dirty = { - .pipe = NV30_NEW_SR, - .hw = NV30_STATE_SR + .pipe = NVFX_NEW_SR, + .hw = NVFX_STATE_SR } }; diff --git a/src/gallium/drivers/nv30/nv30_surface.c b/src/gallium/drivers/nv30/nv30_surface.c index bc18e577ee..613a9fa492 100644 --- a/src/gallium/drivers/nv30/nv30_surface.c +++ b/src/gallium/drivers/nv30/nv30_surface.c @@ -37,8 +37,8 @@ nv30_surface_copy(struct pipe_context *pipe, struct pipe_surface *src, unsigned srcx, unsigned srcy, unsigned width, unsigned height) { - struct nv30_context *nv30 = nv30_context(pipe); - struct nv04_surface_2d *eng2d = nv30->screen->eng2d; + struct nvfx_context *nvfx = nvfx_context(pipe); + struct nv04_surface_2d *eng2d = nvfx->screen->eng2d; eng2d->copy(eng2d, dest, destx, desty, src, srcx, srcy, width, height); } @@ -48,15 +48,15 @@ nv30_surface_fill(struct pipe_context *pipe, struct pipe_surface *dest, unsigned destx, unsigned desty, unsigned width, unsigned height, unsigned value) { - struct nv30_context *nv30 = nv30_context(pipe); - struct nv04_surface_2d *eng2d = nv30->screen->eng2d; + struct nvfx_context *nvfx = nvfx_context(pipe); + struct nv04_surface_2d *eng2d = nvfx->screen->eng2d; eng2d->fill(eng2d, dest, destx, desty, width, height, value); } void -nv30_init_surface_functions(struct nv30_context *nv30) +nv30_init_surface_functions(struct nvfx_context *nvfx) { - nv30->pipe.surface_copy = nv30_surface_copy; - nv30->pipe.surface_fill = nv30_surface_fill; + nvfx->pipe.surface_copy = nv30_surface_copy; + nvfx->pipe.surface_fill = nv30_surface_fill; } diff --git a/src/gallium/drivers/nv30/nv30_transfer.c b/src/gallium/drivers/nv30/nv30_transfer.c index cfc109bb74..3d71df52b9 100644 --- a/src/gallium/drivers/nv30/nv30_transfer.c +++ b/src/gallium/drivers/nv30/nv30_transfer.c @@ -6,8 +6,8 @@ #include "util/u_math.h" #include "nouveau/nouveau_winsys.h" #include "nv30_context.h" -#include "nv30_screen.h" -#include "nv30_state.h" +#include "nvfx_screen.h" +#include "nvfx_state.h" struct nv30_transfer { struct pipe_transfer base; @@ -39,7 +39,7 @@ nv30_transfer_new(struct pipe_context *pcontext, struct pipe_texture *pt, unsigned x, unsigned y, unsigned w, unsigned h) { struct pipe_screen *pscreen = pcontext->screen; - struct nv30_miptree *mt = (struct nv30_miptree *)pt; + struct nvfx_miptree *mt = (struct nvfx_miptree *)pt; struct nv30_transfer *tx; struct pipe_texture tx_tex_template, *tx_tex; @@ -81,7 +81,7 @@ nv30_transfer_new(struct pipe_context *pcontext, struct pipe_texture *pt, return NULL; } - tx->base.stride = ((struct nv30_miptree*)tx_tex)->level[0].pitch; + tx->base.stride = ((struct nvfx_miptree*)tx_tex)->level[0].pitch; tx->surface = pscreen->get_tex_surface(pscreen, tx_tex, 0, 0, 0, @@ -97,7 +97,7 @@ nv30_transfer_new(struct pipe_context *pcontext, struct pipe_texture *pt, } if (usage & PIPE_TRANSFER_READ) { - struct nv30_screen *nvscreen = nv30_screen(pscreen); + struct nvfx_screen *nvscreen = nvfx_screen(pscreen); struct pipe_surface *src; src = pscreen->get_tex_surface(pscreen, pt, @@ -125,7 +125,7 @@ nv30_transfer_del(struct pipe_context *pcontext, if (!tx->direct && (ptx->usage & PIPE_TRANSFER_WRITE)) { struct pipe_screen *pscreen = pcontext->screen; - struct nv30_screen *nvscreen = nv30_screen(pscreen); + struct nvfx_screen *nvscreen = nvfx_screen(pscreen); struct pipe_surface *dst; dst = pscreen->get_tex_surface(pscreen, ptx->texture, @@ -152,7 +152,7 @@ nv30_transfer_map(struct pipe_context *pcontext, struct pipe_transfer *ptx) struct pipe_screen *pscreen = pcontext->screen; struct nv30_transfer *tx = (struct nv30_transfer *)ptx; struct nv04_surface *ns = (struct nv04_surface *)tx->surface; - struct nv30_miptree *mt = (struct nv30_miptree *)tx->surface->texture; + struct nvfx_miptree *mt = (struct nvfx_miptree *)tx->surface->texture; void *map = pipe_buffer_map(pscreen, mt->buffer, pipe_transfer_buffer_flags(ptx)); @@ -167,16 +167,16 @@ nv30_transfer_unmap(struct pipe_context *pcontext, struct pipe_transfer *ptx) { struct pipe_screen *pscreen = pcontext->screen; struct nv30_transfer *tx = (struct nv30_transfer *)ptx; - struct nv30_miptree *mt = (struct nv30_miptree *)tx->surface->texture; + struct nvfx_miptree *mt = (struct nvfx_miptree *)tx->surface->texture; pipe_buffer_unmap(pscreen, mt->buffer); } void -nv30_init_transfer_functions(struct nv30_context *nv30) +nv30_init_transfer_functions(struct nvfx_context *nvfx) { - nv30->pipe.get_tex_transfer = nv30_transfer_new; - nv30->pipe.tex_transfer_destroy = nv30_transfer_del; - nv30->pipe.transfer_map = nv30_transfer_map; - nv30->pipe.transfer_unmap = nv30_transfer_unmap; + nvfx->pipe.get_tex_transfer = nv30_transfer_new; + nvfx->pipe.tex_transfer_destroy = nv30_transfer_del; + nvfx->pipe.transfer_map = nv30_transfer_map; + nvfx->pipe.transfer_unmap = nv30_transfer_unmap; } diff --git a/src/gallium/drivers/nv30/nv30_vbo.c b/src/gallium/drivers/nv30/nv30_vbo.c index c7f119e90a..119fa59890 100644 --- a/src/gallium/drivers/nv30/nv30_vbo.c +++ b/src/gallium/drivers/nv30/nv30_vbo.c @@ -4,7 +4,7 @@ #include "util/u_format.h" #include "nv30_context.h" -#include "nv30_state.h" +#include "nvfx_state.h" #include "nouveau/nouveau_channel.h" #include "nouveau/nouveau_pushbuf.h" @@ -69,15 +69,15 @@ nv30_vbo_format_to_hw(enum pipe_format pipe, unsigned *fmt, unsigned *ncomp) } static boolean -nv30_vbo_set_idxbuf(struct nv30_context *nv30, struct pipe_buffer *ib, +nv30_vbo_set_idxbuf(struct nvfx_context *nvfx, struct pipe_buffer *ib, unsigned ib_size) { - struct pipe_screen *pscreen = &nv30->screen->base.base; + struct pipe_screen *pscreen = &nvfx->screen->base.base; unsigned type; if (!ib) { - nv30->idxbuf = NULL; - nv30->idxbuf_format = 0xdeadbeef; + nvfx->idxbuf = NULL; + nvfx->idxbuf_format = 0xdeadbeef; return FALSE; } @@ -95,23 +95,23 @@ nv30_vbo_set_idxbuf(struct nv30_context *nv30, struct pipe_buffer *ib, return FALSE; } - if (ib != nv30->idxbuf || - type != nv30->idxbuf_format) { - nv30->dirty |= NV30_NEW_ARRAYS; - nv30->idxbuf = ib; - nv30->idxbuf_format = type; + if (ib != nvfx->idxbuf || + type != nvfx->idxbuf_format) { + nvfx->dirty |= NVFX_NEW_ARRAYS; + nvfx->idxbuf = ib; + nvfx->idxbuf_format = type; } return TRUE; } static boolean -nv30_vbo_static_attrib(struct nv30_context *nv30, struct nouveau_stateobj *so, +nv30_vbo_static_attrib(struct nvfx_context *nvfx, struct nouveau_stateobj *so, int attrib, struct pipe_vertex_element *ve, struct pipe_vertex_buffer *vb) { - struct pipe_screen *pscreen = nv30->pipe.screen; - struct nouveau_grobj *eng3d = nv30->screen->eng3d; + struct pipe_screen *pscreen = nvfx->pipe.screen; + struct nouveau_grobj *eng3d = nvfx->screen->eng3d; unsigned type, ncomp; void *map; @@ -168,14 +168,14 @@ void nv30_draw_arrays(struct pipe_context *pipe, unsigned mode, unsigned start, unsigned count) { - struct nv30_context *nv30 = nv30_context(pipe); - struct nv30_screen *screen = nv30->screen; + struct nvfx_context *nvfx = nvfx_context(pipe); + struct nvfx_screen *screen = nvfx->screen; struct nouveau_channel *chan = screen->base.channel; struct nouveau_grobj *eng3d = screen->eng3d; unsigned restart = 0; - nv30_vbo_set_idxbuf(nv30, NULL, 0); - if (FORCE_SWTNL || !nv30_state_validate(nv30)) { + nv30_vbo_set_idxbuf(nvfx, NULL, 0); + if (FORCE_SWTNL || !nv30_state_validate(nvfx)) { /*return nv30_draw_elements_swtnl(pipe, NULL, 0, mode, start, count);*/ return; @@ -184,7 +184,7 @@ nv30_draw_arrays(struct pipe_context *pipe, while (count) { unsigned vc, nr; - nv30_state_emit(nv30); + nv30_state_emit(nvfx); vc = nouveau_vbuf_split(AVAIL_RING(chan), 6, 256, mode, start, count, &restart); @@ -227,10 +227,10 @@ nv30_draw_arrays(struct pipe_context *pipe, } static INLINE void -nv30_draw_elements_u08(struct nv30_context *nv30, void *ib, +nv30_draw_elements_u08(struct nvfx_context *nvfx, void *ib, unsigned mode, unsigned start, unsigned count) { - struct nv30_screen *screen = nv30->screen; + struct nvfx_screen *screen = nvfx->screen; struct nouveau_channel *chan = screen->base.channel; struct nouveau_grobj *eng3d = screen->eng3d; @@ -238,7 +238,7 @@ nv30_draw_elements_u08(struct nv30_context *nv30, void *ib, uint8_t *elts = (uint8_t *)ib + start; unsigned vc, push, restart = 0; - nv30_state_emit(nv30); + nv30_state_emit(nvfx); vc = nouveau_vbuf_split(AVAIL_RING(chan), 6, 2, mode, start, count, &restart); @@ -278,10 +278,10 @@ nv30_draw_elements_u08(struct nv30_context *nv30, void *ib, } static INLINE void -nv30_draw_elements_u16(struct nv30_context *nv30, void *ib, +nv30_draw_elements_u16(struct nvfx_context *nvfx, void *ib, unsigned mode, unsigned start, unsigned count) { - struct nv30_screen *screen = nv30->screen; + struct nvfx_screen *screen = nvfx->screen; struct nouveau_channel *chan = screen->base.channel; struct nouveau_grobj *eng3d = screen->eng3d; @@ -289,7 +289,7 @@ nv30_draw_elements_u16(struct nv30_context *nv30, void *ib, uint16_t *elts = (uint16_t *)ib + start; unsigned vc, push, restart = 0; - nv30_state_emit(nv30); + nv30_state_emit(nvfx); vc = nouveau_vbuf_split(AVAIL_RING(chan), 6, 2, mode, start, count, &restart); @@ -329,10 +329,10 @@ nv30_draw_elements_u16(struct nv30_context *nv30, void *ib, } static INLINE void -nv30_draw_elements_u32(struct nv30_context *nv30, void *ib, +nv30_draw_elements_u32(struct nvfx_context *nvfx, void *ib, unsigned mode, unsigned start, unsigned count) { - struct nv30_screen *screen = nv30->screen; + struct nvfx_screen *screen = nvfx->screen; struct nouveau_channel *chan = screen->base.channel; struct nouveau_grobj *eng3d = screen->eng3d; @@ -340,7 +340,7 @@ nv30_draw_elements_u32(struct nv30_context *nv30, void *ib, uint32_t *elts = (uint32_t *)ib + start; unsigned vc, push, restart = 0; - nv30_state_emit(nv30); + nv30_state_emit(nvfx); vc = nouveau_vbuf_split(AVAIL_RING(chan), 5, 1, mode, start, count, &restart); @@ -375,7 +375,7 @@ nv30_draw_elements_inline(struct pipe_context *pipe, struct pipe_buffer *ib, unsigned ib_size, unsigned mode, unsigned start, unsigned count) { - struct nv30_context *nv30 = nv30_context(pipe); + struct nvfx_context *nvfx = nvfx_context(pipe); struct pipe_screen *pscreen = pipe->screen; void *map; @@ -387,13 +387,13 @@ nv30_draw_elements_inline(struct pipe_context *pipe, switch (ib_size) { case 1: - nv30_draw_elements_u08(nv30, map, mode, start, count); + nv30_draw_elements_u08(nvfx, map, mode, start, count); break; case 2: - nv30_draw_elements_u16(nv30, map, mode, start, count); + nv30_draw_elements_u16(nvfx, map, mode, start, count); break; case 4: - nv30_draw_elements_u32(nv30, map, mode, start, count); + nv30_draw_elements_u32(nvfx, map, mode, start, count); break; default: NOUVEAU_ERR("invalid idxbuf fmt %d\n", ib_size); @@ -407,8 +407,8 @@ static void nv30_draw_elements_vbo(struct pipe_context *pipe, unsigned mode, unsigned start, unsigned count) { - struct nv30_context *nv30 = nv30_context(pipe); - struct nv30_screen *screen = nv30->screen; + struct nvfx_context *nvfx = nvfx_context(pipe); + struct nvfx_screen *screen = nvfx->screen; struct nouveau_channel *chan = screen->base.channel; struct nouveau_grobj *eng3d = screen->eng3d; unsigned restart = 0; @@ -416,7 +416,7 @@ nv30_draw_elements_vbo(struct pipe_context *pipe, while (count) { unsigned nr, vc; - nv30_state_emit(nv30); + nv30_state_emit(nvfx); vc = nouveau_vbuf_split(AVAIL_RING(chan), 6, 256, mode, start, count, &restart); @@ -461,11 +461,11 @@ nv30_draw_elements(struct pipe_context *pipe, struct pipe_buffer *indexBuffer, unsigned indexSize, unsigned mode, unsigned start, unsigned count) { - struct nv30_context *nv30 = nv30_context(pipe); + struct nvfx_context *nvfx = nvfx_context(pipe); boolean idxbuf; - idxbuf = nv30_vbo_set_idxbuf(nv30, indexBuffer, indexSize); - if (FORCE_SWTNL || !nv30_state_validate(nv30)) { + idxbuf = nv30_vbo_set_idxbuf(nvfx, indexBuffer, indexSize); + if (FORCE_SWTNL || !nv30_state_validate(nvfx)) { /*return nv30_draw_elements_swtnl(pipe, NULL, 0, mode, start, count);*/ return; @@ -482,33 +482,33 @@ nv30_draw_elements(struct pipe_context *pipe, } static boolean -nv30_vbo_validate(struct nv30_context *nv30) +nv30_vbo_validate(struct nvfx_context *nvfx) { struct nouveau_stateobj *vtxbuf, *vtxfmt, *sattr = NULL; - struct nouveau_grobj *eng3d = nv30->screen->eng3d; - struct pipe_buffer *ib = nv30->idxbuf; - unsigned ib_format = nv30->idxbuf_format; + struct nouveau_grobj *eng3d = nvfx->screen->eng3d; + struct pipe_buffer *ib = nvfx->idxbuf; + unsigned ib_format = nvfx->idxbuf_format; unsigned vb_flags = NOUVEAU_BO_VRAM | NOUVEAU_BO_GART | NOUVEAU_BO_RD; int hw; vtxbuf = so_new(3, 17, 18); - so_method(vtxbuf, eng3d, NV34TCL_VTXBUF_ADDRESS(0), nv30->vtxelt->num_elements); + so_method(vtxbuf, eng3d, NV34TCL_VTXBUF_ADDRESS(0), nvfx->vtxelt->num_elements); vtxfmt = so_new(1, 16, 0); - so_method(vtxfmt, eng3d, NV34TCL_VTXFMT(0), nv30->vtxelt->num_elements); + so_method(vtxfmt, eng3d, NV34TCL_VTXFMT(0), nvfx->vtxelt->num_elements); - for (hw = 0; hw < nv30->vtxelt->num_elements; hw++) { + for (hw = 0; hw < nvfx->vtxelt->num_elements; hw++) { struct pipe_vertex_element *ve; struct pipe_vertex_buffer *vb; unsigned type, ncomp; - ve = &nv30->vtxelt->pipe[hw]; - vb = &nv30->vtxbuf[ve->vertex_buffer_index]; + ve = &nvfx->vtxelt->pipe[hw]; + vb = &nvfx->vtxbuf[ve->vertex_buffer_index]; if (!vb->stride) { if (!sattr) sattr = so_new(16, 16 * 4, 0); - if (nv30_vbo_static_attrib(nv30, sattr, hw, ve, vb)) { + if (nv30_vbo_static_attrib(nvfx, sattr, hw, ve, vb)) { so_data(vtxbuf, 0); so_data(vtxfmt, NV34TCL_VTXFMT_TYPE_FLOAT); continue; @@ -516,7 +516,7 @@ nv30_vbo_validate(struct nv30_context *nv30) } if (nv30_vbo_format_to_hw(ve->src_format, &type, &ncomp)) { - /*nv30->fallback_swtnl |= NV30_NEW_ARRAYS;*/ + /*nvfx->fallback_swtnl |= NVFX_NEW_ARRAYS;*/ so_ref(NULL, &vtxbuf); so_ref(NULL, &vtxfmt); return FALSE; @@ -541,22 +541,22 @@ nv30_vbo_validate(struct nv30_context *nv30) so_method(vtxbuf, eng3d, 0x1710, 1); so_data (vtxbuf, 0); - so_ref(vtxbuf, &nv30->state.hw[NV30_STATE_VTXBUF]); + so_ref(vtxbuf, &nvfx->state.hw[NVFX_STATE_VTXBUF]); so_ref(NULL, &vtxbuf); - nv30->state.dirty |= (1ULL << NV30_STATE_VTXBUF); - so_ref(vtxfmt, &nv30->state.hw[NV30_STATE_VTXFMT]); + nvfx->state.dirty |= (1ULL << NVFX_STATE_VTXBUF); + so_ref(vtxfmt, &nvfx->state.hw[NVFX_STATE_VTXFMT]); so_ref(NULL, &vtxfmt); - nv30->state.dirty |= (1ULL << NV30_STATE_VTXFMT); - so_ref(sattr, &nv30->state.hw[NV30_STATE_VTXATTR]); + nvfx->state.dirty |= (1ULL << NVFX_STATE_VTXFMT); + so_ref(sattr, &nvfx->state.hw[NVFX_STATE_VTXATTR]); so_ref(NULL, &sattr); - nv30->state.dirty |= (1ULL << NV30_STATE_VTXATTR); + nvfx->state.dirty |= (1ULL << NVFX_STATE_VTXATTR); return FALSE; } -struct nv30_state_entry nv30_state_vbo = { +struct nvfx_state_entry nv30_state_vbo = { .validate = nv30_vbo_validate, .dirty = { - .pipe = NV30_NEW_ARRAYS, + .pipe = NVFX_NEW_ARRAYS, .hw = 0, } }; diff --git a/src/gallium/drivers/nv30/nv30_vertprog.c b/src/gallium/drivers/nv30/nv30_vertprog.c index f0cecba4c4..cf910e34b1 100644 --- a/src/gallium/drivers/nv30/nv30_vertprog.c +++ b/src/gallium/drivers/nv30/nv30_vertprog.c @@ -8,7 +8,7 @@ #include "tgsi/tgsi_dump.h" #include "nv30_context.h" -#include "nv30_state.h" +#include "nvfx_state.h" /* TODO (at least...): * 1. Indexed consts + ARL @@ -40,9 +40,9 @@ #define abs(s) nv30_sr_abs((s)) struct nv30_vpc { - struct nv30_vertex_program *vp; + struct nvfx_vertex_program *vp; - struct nv30_vertex_program_exec *vpi; + struct nvfx_vertex_program_exec *vpi; unsigned output_map[PIPE_MAX_SHADER_OUTPUTS]; @@ -66,8 +66,8 @@ temp(struct nv30_vpc *vpc) static struct nv30_sreg constant(struct nv30_vpc *vpc, int pipe, float x, float y, float z, float w) { - struct nv30_vertex_program *vp = vpc->vp; - struct nv30_vertex_program_data *vpd; + struct nvfx_vertex_program *vp = vpc->vp; + struct nvfx_vertex_program_data *vpd; int idx; if (pipe >= 0) { @@ -95,7 +95,7 @@ constant(struct nv30_vpc *vpc, int pipe, float x, float y, float z, float w) static void emit_src(struct nv30_vpc *vpc, uint32_t *hw, int pos, struct nv30_sreg src) { - struct nv30_vertex_program *vp = vpc->vp; + struct nvfx_vertex_program *vp = vpc->vp; uint32_t sr = 0; switch (src.type) { @@ -166,7 +166,7 @@ emit_src(struct nv30_vpc *vpc, uint32_t *hw, int pos, struct nv30_sreg src) static void emit_dst(struct nv30_vpc *vpc, uint32_t *hw, int slot, struct nv30_sreg dst) { - struct nv30_vertex_program *vp = vpc->vp; + struct nvfx_vertex_program *vp = vpc->vp; switch (dst.type) { case NV30SR_TEMP: @@ -211,7 +211,7 @@ nv30_vp_arith(struct nv30_vpc *vpc, int slot, int op, struct nv30_sreg s0, struct nv30_sreg s1, struct nv30_sreg s2) { - struct nv30_vertex_program *vp = vpc->vp; + struct nvfx_vertex_program *vp = vpc->vp; uint32_t *hw; vp->insns = realloc(vp->insns, ++vp->nr_insns * sizeof(*vpc->vpi)); @@ -572,8 +572,8 @@ nv30_vertprog_prepare(struct nv30_vpc *vpc) } static void -nv30_vertprog_translate(struct nv30_context *nv30, - struct nv30_vertex_program *vp) +nv30_vertprog_translate(struct nvfx_context *nvfx, + struct nvfx_vertex_program *vp) { struct tgsi_parse_context parse; struct nv30_vpc *vpc = NULL; @@ -647,36 +647,36 @@ out_err: } static boolean -nv30_vertprog_validate(struct nv30_context *nv30) +nv30_vertprog_validate(struct nvfx_context *nvfx) { - struct pipe_screen *pscreen = nv30->pipe.screen; - struct nv30_screen *screen = nv30->screen; + struct pipe_screen *pscreen = nvfx->pipe.screen; + struct nvfx_screen *screen = nvfx->screen; struct nouveau_channel *chan = screen->base.channel; struct nouveau_grobj *eng3d = screen->eng3d; - struct nv30_vertex_program *vp; + struct nvfx_vertex_program *vp; struct pipe_buffer *constbuf; boolean upload_code = FALSE, upload_data = FALSE; int i; - vp = nv30->vertprog; - constbuf = nv30->constbuf[PIPE_SHADER_VERTEX]; + vp = nvfx->vertprog; + constbuf = nvfx->constbuf[PIPE_SHADER_VERTEX]; /* Translate TGSI shader into hw bytecode */ if (!vp->translated) { - nv30_vertprog_translate(nv30, vp); + nv30_vertprog_translate(nvfx, vp); if (!vp->translated) return FALSE; } /* Allocate hw vtxprog exec slots */ if (!vp->exec) { - struct nouveau_resource *heap = nv30->screen->vp_exec_heap; + struct nouveau_resource *heap = nvfx->screen->vp_exec_heap; struct nouveau_stateobj *so; uint vplen = vp->nr_insns; if (nouveau_resource_alloc(heap, vplen, vp, &vp->exec)) { while (heap->next && heap->size < vplen) { - struct nv30_vertex_program *evict; + struct nvfx_vertex_program *evict; evict = heap->next->priv; nouveau_resource_free(&evict->exec); @@ -697,11 +697,11 @@ nv30_vertprog_validate(struct nv30_context *nv30) /* Allocate hw vtxprog const slots */ if (vp->nr_consts && !vp->data) { - struct nouveau_resource *heap = nv30->screen->vp_data_heap; + struct nouveau_resource *heap = nvfx->screen->vp_data_heap; if (nouveau_resource_alloc(heap, vp->nr_consts, vp, &vp->data)) { while (heap->next && heap->size < vp->nr_consts) { - struct nv30_vertex_program *evict; + struct nvfx_vertex_program *evict; evict = heap->next->priv; nouveau_resource_free(&evict->data); @@ -725,7 +725,7 @@ nv30_vertprog_validate(struct nv30_context *nv30) */ if (vp->exec_start != vp->exec->start) { for (i = 0; i < vp->nr_insns; i++) { - struct nv30_vertex_program_exec *vpi = &vp->insns[i]; + struct nvfx_vertex_program_exec *vpi = &vp->insns[i]; if (vpi->has_branch_offset) { assert(0); @@ -737,7 +737,7 @@ nv30_vertprog_validate(struct nv30_context *nv30) if (vp->nr_consts && vp->data_start != vp->data->start) { for (i = 0; i < vp->nr_insns; i++) { - struct nv30_vertex_program_exec *vpi = &vp->insns[i]; + struct nvfx_vertex_program_exec *vpi = &vp->insns[i]; if (vpi->const_index >= 0) { vpi->data[1] &= ~NV30_VP_INST_CONST_SRC_MASK; @@ -761,7 +761,7 @@ nv30_vertprog_validate(struct nv30_context *nv30) } for (i = 0; i < vp->nr_consts; i++) { - struct nv30_vertex_program_data *vpd = &vp->consts[i]; + struct nvfx_vertex_program_data *vpd = &vp->consts[i]; if (vpd->index >= 0) { if (!upload_data && @@ -798,8 +798,8 @@ nv30_vertprog_validate(struct nv30_context *nv30) } } - if (vp->so != nv30->state.hw[NV30_STATE_VERTPROG]) { - so_ref(vp->so, &nv30->state.hw[NV30_STATE_VERTPROG]); + if (vp->so != nvfx->state.hw[NVFX_STATE_VERTPROG]) { + so_ref(vp->so, &nvfx->state.hw[NVFX_STATE_VERTPROG]); return TRUE; } @@ -807,7 +807,7 @@ nv30_vertprog_validate(struct nv30_context *nv30) } void -nv30_vertprog_destroy(struct nv30_context *nv30, struct nv30_vertex_program *vp) +nv30_vertprog_destroy(struct nvfx_context *nvfx, struct nvfx_vertex_program *vp) { vp->translated = FALSE; @@ -833,10 +833,10 @@ nv30_vertprog_destroy(struct nv30_context *nv30, struct nv30_vertex_program *vp) so_ref(NULL, &vp->so); } -struct nv30_state_entry nv30_state_vertprog = { +struct nvfx_state_entry nv30_state_vertprog = { .validate = nv30_vertprog_validate, .dirty = { - .pipe = NV30_NEW_VERTPROG /*| NV30_NEW_UCP*/, - .hw = NV30_STATE_VERTPROG, + .pipe = NVFX_NEW_VERTPROG /*| NVFX_NEW_UCP*/, + .hw = NVFX_STATE_VERTPROG, } }; diff --git a/src/gallium/drivers/nv40/Makefile b/src/gallium/drivers/nv40/Makefile index 0ecae2b491..50e5e72b4e 100644 --- a/src/gallium/drivers/nv40/Makefile +++ b/src/gallium/drivers/nv40/Makefile @@ -26,4 +26,6 @@ C_SOURCES = \ nv40_vbo.c \ nv40_vertprog.c +LIBRARY_INCLUDES = -I$(TOP)/src/gallium/drivers/nvfx + include ../../Makefile.template diff --git a/src/gallium/drivers/nv40/nv40_clear.c b/src/gallium/drivers/nv40/nv40_clear.c index ddf13addf3..79de90434d 100644 --- a/src/gallium/drivers/nv40/nv40_clear.c +++ b/src/gallium/drivers/nv40/nv40_clear.c @@ -9,6 +9,6 @@ void nv40_clear(struct pipe_context *pipe, unsigned buffers, const float *rgba, double depth, unsigned stencil) { - util_clear(pipe, &nv40_context(pipe)->framebuffer, buffers, rgba, depth, + util_clear(pipe, &nvfx_context(pipe)->framebuffer, buffers, rgba, depth, stencil); } diff --git a/src/gallium/drivers/nv40/nv40_context.c b/src/gallium/drivers/nv40/nv40_context.c index da35676fd5..721b513438 100644 --- a/src/gallium/drivers/nv40/nv40_context.c +++ b/src/gallium/drivers/nv40/nv40_context.c @@ -2,14 +2,14 @@ #include "pipe/p_defines.h" #include "nv40_context.h" -#include "nv40_screen.h" +#include "nvfx_screen.h" static void nv40_flush(struct pipe_context *pipe, unsigned flags, struct pipe_fence_handle **fence) { - struct nv40_context *nv40 = nv40_context(pipe); - struct nv40_screen *screen = nv40->screen; + struct nvfx_context *nvfx = nvfx_context(pipe); + struct nvfx_screen *screen = nvfx->screen; struct nouveau_channel *chan = screen->base.channel; struct nouveau_grobj *eng3d = screen->eng3d; @@ -28,61 +28,61 @@ nv40_flush(struct pipe_context *pipe, unsigned flags, static void nv40_destroy(struct pipe_context *pipe) { - struct nv40_context *nv40 = nv40_context(pipe); + struct nvfx_context *nvfx = nvfx_context(pipe); unsigned i; - for (i = 0; i < NV40_STATE_MAX; i++) { - if (nv40->state.hw[i]) - so_ref(NULL, &nv40->state.hw[i]); + for (i = 0; i < NVFX_STATE_MAX; i++) { + if (nvfx->state.hw[i]) + so_ref(NULL, &nvfx->state.hw[i]); } - if (nv40->draw) - draw_destroy(nv40->draw); - FREE(nv40); + if (nvfx->draw) + draw_destroy(nvfx->draw); + FREE(nvfx); } struct pipe_context * nv40_create(struct pipe_screen *pscreen, void *priv) { - struct nv40_screen *screen = nv40_screen(pscreen); + struct nvfx_screen *screen = nvfx_screen(pscreen); struct pipe_winsys *ws = pscreen->winsys; - struct nv40_context *nv40; + struct nvfx_context *nvfx; struct nouveau_winsys *nvws = screen->nvws; - nv40 = CALLOC(1, sizeof(struct nv40_context)); - if (!nv40) + nvfx = CALLOC(1, sizeof(struct nvfx_context)); + if (!nvfx) return NULL; - nv40->screen = screen; + nvfx->screen = screen; - nv40->nvws = nvws; + nvfx->nvws = nvws; - nv40->pipe.winsys = ws; - nv40->pipe.priv = priv; - nv40->pipe.screen = pscreen; - nv40->pipe.destroy = nv40_destroy; - nv40->pipe.draw_arrays = nv40_draw_arrays; - nv40->pipe.draw_elements = nv40_draw_elements; - nv40->pipe.clear = nv40_clear; - nv40->pipe.flush = nv40_flush; + nvfx->pipe.winsys = ws; + nvfx->pipe.priv = priv; + nvfx->pipe.screen = pscreen; + nvfx->pipe.destroy = nv40_destroy; + nvfx->pipe.draw_arrays = nv40_draw_arrays; + nvfx->pipe.draw_elements = nv40_draw_elements; + nvfx->pipe.clear = nv40_clear; + nvfx->pipe.flush = nv40_flush; - nv40->pipe.is_texture_referenced = nouveau_is_texture_referenced; - nv40->pipe.is_buffer_referenced = nouveau_is_buffer_referenced; + nvfx->pipe.is_texture_referenced = nouveau_is_texture_referenced; + nvfx->pipe.is_buffer_referenced = nouveau_is_buffer_referenced; - screen->base.channel->user_private = nv40; + screen->base.channel->user_private = nvfx; screen->base.channel->flush_notify = nv40_state_flush_notify; - nv40_init_query_functions(nv40); - nv40_init_surface_functions(nv40); - nv40_init_state_functions(nv40); - nv40_init_transfer_functions(nv40); + nv40_init_query_functions(nvfx); + nv40_init_surface_functions(nvfx); + nv40_init_state_functions(nvfx); + nv40_init_transfer_functions(nvfx); /* Create, configure, and install fallback swtnl path */ - nv40->draw = draw_create(); - draw_wide_point_threshold(nv40->draw, 9999999.0); - draw_wide_line_threshold(nv40->draw, 9999999.0); - draw_enable_line_stipple(nv40->draw, FALSE); - draw_enable_point_sprites(nv40->draw, FALSE); - draw_set_rasterize_stage(nv40->draw, nv40_draw_render_stage(nv40)); - - return &nv40->pipe; + nvfx->draw = draw_create(); + draw_wide_point_threshold(nvfx->draw, 9999999.0); + draw_wide_line_threshold(nvfx->draw, 9999999.0); + draw_enable_line_stipple(nvfx->draw, FALSE); + draw_enable_point_sprites(nvfx->draw, FALSE); + draw_set_rasterize_stage(nvfx->draw, nv40_draw_render_stage(nvfx)); + + return &nvfx->pipe; } diff --git a/src/gallium/drivers/nv40/nv40_context.h b/src/gallium/drivers/nv40/nv40_context.h index cb5d9e2d9d..7227c4a438 100644 --- a/src/gallium/drivers/nv40/nv40_context.h +++ b/src/gallium/drivers/nv40/nv40_context.h @@ -1,229 +1,52 @@ #ifndef __NV40_CONTEXT_H__ #define __NV40_CONTEXT_H__ -#include +#include "nvfx_context.h" -#include "pipe/p_context.h" -#include "pipe/p_defines.h" -#include "pipe/p_state.h" -#include "pipe/p_compiler.h" - -#include "util/u_memory.h" -#include "util/u_math.h" -#include "util/u_inlines.h" - -#include "draw/draw_vertex.h" - -#include "nouveau/nouveau_winsys.h" -#include "nouveau/nouveau_gldefs.h" -#include "nouveau/nouveau_context.h" -#include "nouveau/nouveau_stateobj.h" - -#include "nv40_state.h" - -#define NOUVEAU_ERR(fmt, args...) \ - fprintf(stderr, "%s:%d - "fmt, __func__, __LINE__, ##args); -#define NOUVEAU_MSG(fmt, args...) \ - fprintf(stderr, "nouveau: "fmt, ##args); - -enum nv40_state_index { - NV40_STATE_FB = 0, - NV40_STATE_VIEWPORT = 1, - NV40_STATE_BLEND = 2, - NV40_STATE_RAST = 3, - NV40_STATE_ZSA = 4, - NV40_STATE_BCOL = 5, - NV40_STATE_CLIP = 6, - NV40_STATE_SCISSOR = 7, - NV40_STATE_STIPPLE = 8, - NV40_STATE_FRAGPROG = 9, - NV40_STATE_VERTPROG = 10, - NV40_STATE_FRAGTEX0 = 11, - NV40_STATE_FRAGTEX1 = 12, - NV40_STATE_FRAGTEX2 = 13, - NV40_STATE_FRAGTEX3 = 14, - NV40_STATE_FRAGTEX4 = 15, - NV40_STATE_FRAGTEX5 = 16, - NV40_STATE_FRAGTEX6 = 17, - NV40_STATE_FRAGTEX7 = 18, - NV40_STATE_FRAGTEX8 = 19, - NV40_STATE_FRAGTEX9 = 20, - NV40_STATE_FRAGTEX10 = 21, - NV40_STATE_FRAGTEX11 = 22, - NV40_STATE_FRAGTEX12 = 23, - NV40_STATE_FRAGTEX13 = 24, - NV40_STATE_FRAGTEX14 = 25, - NV40_STATE_FRAGTEX15 = 26, - NV40_STATE_VERTTEX0 = 27, - NV40_STATE_VERTTEX1 = 28, - NV40_STATE_VERTTEX2 = 29, - NV40_STATE_VERTTEX3 = 30, - NV40_STATE_VTXBUF = 31, - NV40_STATE_VTXFMT = 32, - NV40_STATE_VTXATTR = 33, - NV40_STATE_SR = 34, - NV40_STATE_MAX = 35 -}; - -#include "nv40_screen.h" - -#define NV40_NEW_BLEND (1 << 0) -#define NV40_NEW_RAST (1 << 1) -#define NV40_NEW_ZSA (1 << 2) -#define NV40_NEW_SAMPLER (1 << 3) -#define NV40_NEW_FB (1 << 4) -#define NV40_NEW_STIPPLE (1 << 5) -#define NV40_NEW_SCISSOR (1 << 6) -#define NV40_NEW_VIEWPORT (1 << 7) -#define NV40_NEW_BCOL (1 << 8) -#define NV40_NEW_VERTPROG (1 << 9) -#define NV40_NEW_FRAGPROG (1 << 10) -#define NV40_NEW_ARRAYS (1 << 11) -#define NV40_NEW_UCP (1 << 12) -#define NV40_NEW_SR (1 << 13) - -struct nv40_rasterizer_state { - struct pipe_rasterizer_state pipe; - struct nouveau_stateobj *so; -}; - -struct nv40_zsa_state { - struct pipe_depth_stencil_alpha_state pipe; - struct nouveau_stateobj *so; -}; - -struct nv40_blend_state { - struct pipe_blend_state pipe; - struct nouveau_stateobj *so; -}; - - -struct nv40_state { - unsigned scissor_enabled; - unsigned stipple_enabled; - unsigned fp_samplers; - - uint64_t dirty; - struct nouveau_stateobj *hw[NV40_STATE_MAX]; -}; - - -struct nv40_vtxelt_state { - struct pipe_vertex_element pipe[16]; - unsigned num_elements; -}; - -struct nv40_context { - struct pipe_context pipe; - - struct nouveau_winsys *nvws; - struct nv40_screen *screen; - - struct draw_context *draw; - - /* HW state derived from pipe states */ - struct nv40_state state; - struct { - struct nv40_vertex_program *vertprog; - - unsigned nr_attribs; - unsigned hw[PIPE_MAX_SHADER_INPUTS]; - unsigned draw[PIPE_MAX_SHADER_INPUTS]; - unsigned emit[PIPE_MAX_SHADER_INPUTS]; - } swtnl; - - enum { - HW, SWTNL, SWRAST - } render_mode; - unsigned fallback_swtnl; - unsigned fallback_swrast; - - /* Context state */ - unsigned dirty, draw_dirty; - struct pipe_scissor_state scissor; - unsigned stipple[32]; - struct pipe_clip_state clip; - struct nv40_vertex_program *vertprog; - struct nv40_fragment_program *fragprog; - struct pipe_buffer *constbuf[PIPE_SHADER_TYPES]; - unsigned constbuf_nr[PIPE_SHADER_TYPES]; - struct nv40_rasterizer_state *rasterizer; - struct nv40_zsa_state *zsa; - struct nv40_blend_state *blend; - struct pipe_blend_color blend_colour; - struct pipe_stencil_ref stencil_ref; - struct pipe_viewport_state viewport; - struct pipe_framebuffer_state framebuffer; - struct pipe_buffer *idxbuf; - unsigned idxbuf_format; - struct nv40_sampler_state *tex_sampler[PIPE_MAX_SAMPLERS]; - struct nv40_miptree *tex_miptree[PIPE_MAX_SAMPLERS]; - unsigned nr_samplers; - unsigned nr_textures; - unsigned dirty_samplers; - struct pipe_vertex_buffer vtxbuf[PIPE_MAX_ATTRIBS]; - unsigned vtxbuf_nr; - struct nv40_vtxelt_state *vtxelt; -}; - -static INLINE struct nv40_context * -nv40_context(struct pipe_context *pipe) -{ - return (struct nv40_context *)pipe; -} - -struct nv40_state_entry { - boolean (*validate)(struct nv40_context *nv40); - struct { - unsigned pipe; - unsigned hw; - } dirty; -}; - -extern void nv40_init_state_functions(struct nv40_context *nv40); -extern void nv40_init_surface_functions(struct nv40_context *nv40); -extern void nv40_init_query_functions(struct nv40_context *nv40); -extern void nv40_init_transfer_functions(struct nv40_context *nv40); +extern void nv40_init_state_functions(struct nvfx_context *nvfx); +extern void nv40_init_surface_functions(struct nvfx_context *nvfx); +extern void nv40_init_query_functions(struct nvfx_context *nvfx); +extern void nv40_init_transfer_functions(struct nvfx_context *nvfx); extern void nv40_screen_init_miptree_functions(struct pipe_screen *pscreen); /* nv40_draw.c */ -extern struct draw_stage *nv40_draw_render_stage(struct nv40_context *nv40); +extern struct draw_stage *nv40_draw_render_stage(struct nvfx_context *nvfx); extern void nv40_draw_elements_swtnl(struct pipe_context *pipe, struct pipe_buffer *idxbuf, unsigned ib_size, unsigned mode, unsigned start, unsigned count); /* nv40_vertprog.c */ -extern void nv40_vertprog_destroy(struct nv40_context *, - struct nv40_vertex_program *); +extern void nv40_vertprog_destroy(struct nvfx_context *, + struct nvfx_vertex_program *); /* nv40_fragprog.c */ -extern void nv40_fragprog_destroy(struct nv40_context *, - struct nv40_fragment_program *); +extern void nv40_fragprog_destroy(struct nvfx_context *, + struct nvfx_fragment_program *); /* nv40_fragtex.c */ -extern void nv40_fragtex_bind(struct nv40_context *); +extern void nv40_fragtex_bind(struct nvfx_context *); /* nv40_state.c and friends */ -extern boolean nv40_state_validate(struct nv40_context *nv40); -extern boolean nv40_state_validate_swtnl(struct nv40_context *nv40); -extern void nv40_state_emit(struct nv40_context *nv40); +extern boolean nv40_state_validate(struct nvfx_context *nvfx); +extern boolean nv40_state_validate_swtnl(struct nvfx_context *nvfx); +extern void nv40_state_emit(struct nvfx_context *nvfx); extern void nv40_state_flush_notify(struct nouveau_channel *chan); -extern struct nv40_state_entry nv40_state_rasterizer; -extern struct nv40_state_entry nv40_state_scissor; -extern struct nv40_state_entry nv40_state_stipple; -extern struct nv40_state_entry nv40_state_fragprog; -extern struct nv40_state_entry nv40_state_vertprog; -extern struct nv40_state_entry nv40_state_blend; -extern struct nv40_state_entry nv40_state_blend_colour; -extern struct nv40_state_entry nv40_state_zsa; -extern struct nv40_state_entry nv40_state_viewport; -extern struct nv40_state_entry nv40_state_framebuffer; -extern struct nv40_state_entry nv40_state_fragtex; -extern struct nv40_state_entry nv40_state_vbo; -extern struct nv40_state_entry nv40_state_vtxfmt; -extern struct nv40_state_entry nv40_state_sr; +extern struct nvfx_state_entry nv40_state_rasterizer; +extern struct nvfx_state_entry nv40_state_scissor; +extern struct nvfx_state_entry nv40_state_stipple; +extern struct nvfx_state_entry nv40_state_fragprog; +extern struct nvfx_state_entry nv40_state_vertprog; +extern struct nvfx_state_entry nv40_state_blend; +extern struct nvfx_state_entry nv40_state_blend_colour; +extern struct nvfx_state_entry nv40_state_zsa; +extern struct nvfx_state_entry nv40_state_viewport; +extern struct nvfx_state_entry nv40_state_framebuffer; +extern struct nvfx_state_entry nv40_state_fragtex; +extern struct nvfx_state_entry nv40_state_vbo; +extern struct nvfx_state_entry nv40_state_vtxfmt; +extern struct nvfx_state_entry nv40_state_sr; /* nv40_vbo.c */ extern void nv40_draw_arrays(struct pipe_context *, unsigned mode, @@ -238,7 +61,7 @@ extern void nv40_draw_elements(struct pipe_context *pipe, extern void nv40_clear(struct pipe_context *pipe, unsigned buffers, const float *rgba, double depth, unsigned stencil); -/* nv40_context.c */ +/* nvfx_context.c */ struct pipe_context * nv40_create(struct pipe_screen *pscreen, void *priv); diff --git a/src/gallium/drivers/nv40/nv40_draw.c b/src/gallium/drivers/nv40/nv40_draw.c index 05d237d1bb..cce1c64621 100644 --- a/src/gallium/drivers/nv40/nv40_draw.c +++ b/src/gallium/drivers/nv40/nv40_draw.c @@ -18,7 +18,7 @@ struct nv40_render_stage { struct draw_stage stage; - struct nv40_context *nv40; + struct nvfx_context *nvfx; unsigned prim; }; @@ -29,18 +29,18 @@ nv40_render_stage(struct draw_stage *stage) } static INLINE void -nv40_render_vertex(struct nv40_context *nv40, const struct vertex_header *v) +nv40_render_vertex(struct nvfx_context *nvfx, const struct vertex_header *v) { - struct nv40_screen *screen = nv40->screen; + struct nvfx_screen *screen = nvfx->screen; struct nouveau_channel *chan = screen->base.channel; struct nouveau_grobj *eng3d = screen->eng3d; unsigned i; - for (i = 0; i < nv40->swtnl.nr_attribs; i++) { - unsigned idx = nv40->swtnl.draw[i]; - unsigned hw = nv40->swtnl.hw[i]; + for (i = 0; i < nvfx->swtnl.nr_attribs; i++) { + unsigned idx = nvfx->swtnl.draw[i]; + unsigned hw = nvfx->swtnl.hw[i]; - switch (nv40->swtnl.emit[i]) { + switch (nvfx->swtnl.emit[i]) { case EMIT_OMIT: break; case EMIT_1F: @@ -84,9 +84,9 @@ nv40_render_prim(struct draw_stage *stage, struct prim_header *prim, unsigned mode, unsigned count) { struct nv40_render_stage *rs = nv40_render_stage(stage); - struct nv40_context *nv40 = rs->nv40; + struct nvfx_context *nvfx = rs->nvfx; - struct nv40_screen *screen = nv40->screen; + struct nvfx_screen *screen = nvfx->screen; struct nouveau_channel *chan = screen->base.channel; struct nouveau_grobj *eng3d = screen->eng3d; unsigned i; @@ -98,7 +98,7 @@ nv40_render_prim(struct draw_stage *stage, struct prim_header *prim, assert(0); } FIRE_RING(chan); - nv40_state_emit(nv40); + nv40_state_emit(nvfx); } /* Switch primitive modes if necessary */ @@ -115,7 +115,7 @@ nv40_render_prim(struct draw_stage *stage, struct prim_header *prim, /* Emit vertex data */ for (i = 0; i < count; i++) - nv40_render_vertex(nv40, prim->v[i]); + nv40_render_vertex(nvfx, prim->v[i]); /* If it's likely we'll need to empty the push buffer soon, finish * off the primitive now. @@ -149,8 +149,8 @@ static void nv40_render_flush(struct draw_stage *draw, unsigned flags) { struct nv40_render_stage *rs = nv40_render_stage(draw); - struct nv40_context *nv40 = rs->nv40; - struct nv40_screen *screen = nv40->screen; + struct nvfx_context *nvfx = rs->nvfx; + struct nvfx_screen *screen = nvfx->screen; struct nouveau_channel *chan = screen->base.channel; struct nouveau_grobj *eng3d = screen->eng3d; @@ -173,13 +173,13 @@ nv40_render_destroy(struct draw_stage *draw) } static INLINE void -emit_mov(struct nv40_vertex_program *vp, +emit_mov(struct nvfx_vertex_program *vp, unsigned dst, unsigned src, unsigned vor, unsigned mask) { - struct nv40_vertex_program_exec *inst; + struct nvfx_vertex_program_exec *inst; vp->insns = realloc(vp->insns, - sizeof(struct nv40_vertex_program_exec) * + sizeof(struct nvfx_vertex_program_exec) * ++vp->nr_insns); inst = &vp->insns[vp->nr_insns - 1]; @@ -195,10 +195,10 @@ emit_mov(struct nv40_vertex_program *vp, vp->or |= (1 << vor); } -static struct nv40_vertex_program * -create_drawvp(struct nv40_context *nv40) +static struct nvfx_vertex_program * +create_drawvp(struct nvfx_context *nvfx) { - struct nv40_vertex_program *vp = CALLOC_STRUCT(nv40_vertex_program); + struct nvfx_vertex_program *vp = CALLOC_STRUCT(nvfx_vertex_program); unsigned i; emit_mov(vp, NV40_VP_INST_DEST_POS, 0, ~0, 0xf); @@ -216,15 +216,15 @@ create_drawvp(struct nv40_context *nv40) } struct draw_stage * -nv40_draw_render_stage(struct nv40_context *nv40) +nv40_draw_render_stage(struct nvfx_context *nvfx) { struct nv40_render_stage *render = CALLOC_STRUCT(nv40_render_stage); - if (!nv40->swtnl.vertprog) - nv40->swtnl.vertprog = create_drawvp(nv40); + if (!nvfx->swtnl.vertprog) + nvfx->swtnl.vertprog = create_drawvp(nvfx); - render->nv40 = nv40; - render->stage.draw = nv40->draw; + render->nvfx = nvfx; + render->stage.draw = nvfx->draw; render->stage.point = nv40_render_point; render->stage.line = nv40_render_line; render->stage.tri = nv40_render_tri; @@ -240,71 +240,71 @@ nv40_draw_elements_swtnl(struct pipe_context *pipe, struct pipe_buffer *idxbuf, unsigned idxbuf_size, unsigned mode, unsigned start, unsigned count) { - struct nv40_context *nv40 = nv40_context(pipe); + struct nvfx_context *nvfx = nvfx_context(pipe); struct pipe_screen *pscreen = pipe->screen; unsigned i; void *map; - if (!nv40_state_validate_swtnl(nv40)) + if (!nv40_state_validate_swtnl(nvfx)) return; - nv40->state.dirty &= ~(1ULL << NV40_STATE_VTXBUF); - nv40_state_emit(nv40); + nvfx->state.dirty &= ~(1ULL << NVFX_STATE_VTXBUF); + nv40_state_emit(nvfx); - for (i = 0; i < nv40->vtxbuf_nr; i++) { - map = pipe_buffer_map(pscreen, nv40->vtxbuf[i].buffer, + for (i = 0; i < nvfx->vtxbuf_nr; i++) { + map = pipe_buffer_map(pscreen, nvfx->vtxbuf[i].buffer, PIPE_BUFFER_USAGE_CPU_READ); - draw_set_mapped_vertex_buffer(nv40->draw, i, map); + draw_set_mapped_vertex_buffer(nvfx->draw, i, map); } if (idxbuf) { map = pipe_buffer_map(pscreen, idxbuf, PIPE_BUFFER_USAGE_CPU_READ); - draw_set_mapped_element_buffer(nv40->draw, idxbuf_size, map); + draw_set_mapped_element_buffer(nvfx->draw, idxbuf_size, map); } else { - draw_set_mapped_element_buffer(nv40->draw, 0, NULL); + draw_set_mapped_element_buffer(nvfx->draw, 0, NULL); } - if (nv40->constbuf[PIPE_SHADER_VERTEX]) { - const unsigned nr = nv40->constbuf_nr[PIPE_SHADER_VERTEX]; + if (nvfx->constbuf[PIPE_SHADER_VERTEX]) { + const unsigned nr = nvfx->constbuf_nr[PIPE_SHADER_VERTEX]; map = pipe_buffer_map(pscreen, - nv40->constbuf[PIPE_SHADER_VERTEX], + nvfx->constbuf[PIPE_SHADER_VERTEX], PIPE_BUFFER_USAGE_CPU_READ); - draw_set_mapped_constant_buffer(nv40->draw, PIPE_SHADER_VERTEX, 0, + draw_set_mapped_constant_buffer(nvfx->draw, PIPE_SHADER_VERTEX, 0, map, nr); } - draw_arrays(nv40->draw, mode, start, count); + draw_arrays(nvfx->draw, mode, start, count); - for (i = 0; i < nv40->vtxbuf_nr; i++) - pipe_buffer_unmap(pscreen, nv40->vtxbuf[i].buffer); + for (i = 0; i < nvfx->vtxbuf_nr; i++) + pipe_buffer_unmap(pscreen, nvfx->vtxbuf[i].buffer); if (idxbuf) pipe_buffer_unmap(pscreen, idxbuf); - if (nv40->constbuf[PIPE_SHADER_VERTEX]) - pipe_buffer_unmap(pscreen, nv40->constbuf[PIPE_SHADER_VERTEX]); + if (nvfx->constbuf[PIPE_SHADER_VERTEX]) + pipe_buffer_unmap(pscreen, nvfx->constbuf[PIPE_SHADER_VERTEX]); - draw_flush(nv40->draw); + draw_flush(nvfx->draw); pipe->flush(pipe, 0, NULL); } static INLINE void -emit_attrib(struct nv40_context *nv40, unsigned hw, unsigned emit, +emit_attrib(struct nvfx_context *nvfx, unsigned hw, unsigned emit, unsigned semantic, unsigned index) { - unsigned draw_out = draw_find_shader_output(nv40->draw, semantic, index); - unsigned a = nv40->swtnl.nr_attribs++; + unsigned draw_out = draw_find_shader_output(nvfx->draw, semantic, index); + unsigned a = nvfx->swtnl.nr_attribs++; - nv40->swtnl.hw[a] = hw; - nv40->swtnl.emit[a] = emit; - nv40->swtnl.draw[a] = draw_out; + nvfx->swtnl.hw[a] = hw; + nvfx->swtnl.emit[a] = emit; + nvfx->swtnl.draw[a] = draw_out; } static boolean -nv40_state_vtxfmt_validate(struct nv40_context *nv40) +nv40_state_vtxfmt_validate(struct nvfx_context *nvfx) { - struct nv40_fragment_program *fp = nv40->fragprog; + struct nvfx_fragment_program *fp = nvfx->fragprog; unsigned colour = 0, texcoords = 0, fog = 0, i; /* Determine needed fragprog inputs */ @@ -326,34 +326,34 @@ nv40_state_vtxfmt_validate(struct nv40_context *nv40) } } - nv40->swtnl.nr_attribs = 0; + nvfx->swtnl.nr_attribs = 0; /* Map draw vtxprog output to hw attribute IDs */ for (i = 0; i < 2; i++) { if (!(colour & (1 << i))) continue; - emit_attrib(nv40, 3 + i, EMIT_4UB, TGSI_SEMANTIC_COLOR, i); + emit_attrib(nvfx, 3 + i, EMIT_4UB, TGSI_SEMANTIC_COLOR, i); } for (i = 0; i < 8; i++) { if (!(texcoords & (1 << i))) continue; - emit_attrib(nv40, 8 + i, EMIT_4F, TGSI_SEMANTIC_GENERIC, i); + emit_attrib(nvfx, 8 + i, EMIT_4F, TGSI_SEMANTIC_GENERIC, i); } if (fog) { - emit_attrib(nv40, 5, EMIT_1F, TGSI_SEMANTIC_FOG, 0); + emit_attrib(nvfx, 5, EMIT_1F, TGSI_SEMANTIC_FOG, 0); } - emit_attrib(nv40, 0, EMIT_3F, TGSI_SEMANTIC_POSITION, 0); + emit_attrib(nvfx, 0, EMIT_3F, TGSI_SEMANTIC_POSITION, 0); return FALSE; } -struct nv40_state_entry nv40_state_vtxfmt = { +struct nvfx_state_entry nv40_state_vtxfmt = { .validate = nv40_state_vtxfmt_validate, .dirty = { - .pipe = NV40_NEW_ARRAYS | NV40_NEW_FRAGPROG, + .pipe = NVFX_NEW_ARRAYS | NVFX_NEW_FRAGPROG, .hw = 0 } }; diff --git a/src/gallium/drivers/nv40/nv40_fragprog.c b/src/gallium/drivers/nv40/nv40_fragprog.c index 3d08828bea..2a0ab0cf31 100644 --- a/src/gallium/drivers/nv40/nv40_fragprog.c +++ b/src/gallium/drivers/nv40/nv40_fragprog.c @@ -30,7 +30,7 @@ #define MAX_CONSTS 128 #define MAX_IMM 32 struct nv40_fpc { - struct nv40_fragment_program *fp; + struct nvfx_fragment_program *fp; uint attrib_map[PIPE_MAX_SHADER_INPUTS]; @@ -102,7 +102,7 @@ constant(struct nv40_fpc *fpc, int pipe, float vals[4]) static void grow_insns(struct nv40_fpc *fpc, int size) { - struct nv40_fragment_program *fp = fpc->fp; + struct nvfx_fragment_program *fp = fpc->fp; fp->insn_len += size; fp->insn = realloc(fp->insn, sizeof(uint32_t) * fp->insn_len); @@ -111,7 +111,7 @@ grow_insns(struct nv40_fpc *fpc, int size) static void emit_src(struct nv40_fpc *fpc, int pos, struct nv40_sreg src) { - struct nv40_fragment_program *fp = fpc->fp; + struct nvfx_fragment_program *fp = fpc->fp; uint32_t *hw = &fp->insn[fpc->inst_offset]; uint32_t sr = 0; @@ -135,7 +135,7 @@ emit_src(struct nv40_fpc *fpc, int pos, struct nv40_sreg src) hw = &fp->insn[fpc->inst_offset]; if (fpc->consts[src.index].pipe >= 0) { - struct nv40_fragment_program_data *fpd; + struct nvfx_fragment_program_data *fpd; fp->consts = realloc(fp->consts, ++fp->nr_consts * sizeof(*fpd)); @@ -175,7 +175,7 @@ emit_src(struct nv40_fpc *fpc, int pos, struct nv40_sreg src) static void emit_dst(struct nv40_fpc *fpc, struct nv40_sreg dst) { - struct nv40_fragment_program *fp = fpc->fp; + struct nvfx_fragment_program *fp = fpc->fp; uint32_t *hw = &fp->insn[fpc->inst_offset]; switch (dst.type) { @@ -205,7 +205,7 @@ nv40_fp_arith(struct nv40_fpc *fpc, int sat, int op, struct nv40_sreg dst, int mask, struct nv40_sreg s0, struct nv40_sreg s1, struct nv40_sreg s2) { - struct nv40_fragment_program *fp = fpc->fp; + struct nvfx_fragment_program *fp = fpc->fp; uint32_t *hw; fpc->inst_offset = fp->insn_len; @@ -242,7 +242,7 @@ nv40_fp_tex(struct nv40_fpc *fpc, int sat, int op, int unit, struct nv40_sreg dst, int mask, struct nv40_sreg s0, struct nv40_sreg s1, struct nv40_sreg s2) { - struct nv40_fragment_program *fp = fpc->fp; + struct nvfx_fragment_program *fp = fpc->fp; nv40_fp_arith(fpc, sat, op, dst, mask, s0, s1, s2); @@ -803,8 +803,8 @@ out_err: } static void -nv40_fragprog_translate(struct nv40_context *nv40, - struct nv40_fragment_program *fp) +nv40_fragprog_translate(struct nvfx_context *nvfx, + struct nvfx_fragment_program *fp) { struct tgsi_parse_context parse; struct nv40_fpc *fpc = NULL; @@ -862,10 +862,10 @@ out_err: } static void -nv40_fragprog_upload(struct nv40_context *nv40, - struct nv40_fragment_program *fp) +nv40_fragprog_upload(struct nvfx_context *nvfx, + struct nvfx_fragment_program *fp) { - struct pipe_screen *pscreen = nv40->pipe.screen; + struct pipe_screen *pscreen = nvfx->pipe.screen; const uint32_t le = 1; uint32_t *map; int i; @@ -896,12 +896,12 @@ nv40_fragprog_upload(struct nv40_context *nv40, } static boolean -nv40_fragprog_validate(struct nv40_context *nv40) +nv40_fragprog_validate(struct nvfx_context *nvfx) { - struct nv40_fragment_program *fp = nv40->fragprog; + struct nvfx_fragment_program *fp = nvfx->fragprog; struct pipe_buffer *constbuf = - nv40->constbuf[PIPE_SHADER_FRAGMENT]; - struct pipe_screen *pscreen = nv40->pipe.screen; + nvfx->constbuf[PIPE_SHADER_FRAGMENT]; + struct pipe_screen *pscreen = nvfx->pipe.screen; struct nouveau_stateobj *so; boolean new_consts = FALSE; int i; @@ -909,23 +909,23 @@ nv40_fragprog_validate(struct nv40_context *nv40) if (fp->translated) goto update_constants; - nv40->fallback_swrast &= ~NV40_NEW_FRAGPROG; - nv40_fragprog_translate(nv40, fp); + nvfx->fallback_swrast &= ~NVFX_NEW_FRAGPROG; + nv40_fragprog_translate(nvfx, fp); if (!fp->translated) { - nv40->fallback_swrast |= NV40_NEW_FRAGPROG; + nvfx->fallback_swrast |= NVFX_NEW_FRAGPROG; return FALSE; } fp->buffer = pscreen->buffer_create(pscreen, 0x100, 0, fp->insn_len * 4); - nv40_fragprog_upload(nv40, fp); + nv40_fragprog_upload(nvfx, fp); so = so_new(2, 2, 1); - so_method(so, nv40->screen->eng3d, NV34TCL_FP_ACTIVE_PROGRAM, 1); + so_method(so, nvfx->screen->eng3d, NV34TCL_FP_ACTIVE_PROGRAM, 1); so_reloc (so, nouveau_bo(fp->buffer), 0, NOUVEAU_BO_VRAM | NOUVEAU_BO_GART | NOUVEAU_BO_RD | NOUVEAU_BO_LOW | NOUVEAU_BO_OR, NV34TCL_FP_ACTIVE_PROGRAM_DMA0, NV34TCL_FP_ACTIVE_PROGRAM_DMA1); - so_method(so, nv40->screen->eng3d, NV34TCL_FP_CONTROL, 1); + so_method(so, nvfx->screen->eng3d, NV34TCL_FP_CONTROL, 1); so_data (so, fp->fp_control); so_ref(so, &fp->so); so_ref(NULL, &so); @@ -937,7 +937,7 @@ update_constants: map = pipe_buffer_map(pscreen, constbuf, PIPE_BUFFER_USAGE_CPU_READ); for (i = 0; i < fp->nr_consts; i++) { - struct nv40_fragment_program_data *fpd = &fp->consts[i]; + struct nvfx_fragment_program_data *fpd = &fp->consts[i]; uint32_t *p = &fp->insn[fpd->offset]; uint32_t *cb = (uint32_t *)&map[fpd->index * 4]; @@ -949,11 +949,11 @@ update_constants: pipe_buffer_unmap(pscreen, constbuf); if (new_consts) - nv40_fragprog_upload(nv40, fp); + nv40_fragprog_upload(nvfx, fp); } - if (new_consts || fp->so != nv40->state.hw[NV40_STATE_FRAGPROG]) { - so_ref(fp->so, &nv40->state.hw[NV40_STATE_FRAGPROG]); + if (new_consts || fp->so != nvfx->state.hw[NVFX_STATE_FRAGPROG]) { + so_ref(fp->so, &nvfx->state.hw[NVFX_STATE_FRAGPROG]); return TRUE; } @@ -961,8 +961,8 @@ update_constants: } void -nv40_fragprog_destroy(struct nv40_context *nv40, - struct nv40_fragment_program *fp) +nv40_fragprog_destroy(struct nvfx_context *nvfx, + struct nvfx_fragment_program *fp) { if (fp->buffer) pipe_buffer_reference(&fp->buffer, NULL); @@ -974,11 +974,11 @@ nv40_fragprog_destroy(struct nv40_context *nv40, FREE(fp->insn); } -struct nv40_state_entry nv40_state_fragprog = { +struct nvfx_state_entry nv40_state_fragprog = { .validate = nv40_fragprog_validate, .dirty = { - .pipe = NV40_NEW_FRAGPROG, - .hw = NV40_STATE_FRAGPROG + .pipe = NVFX_NEW_FRAGPROG, + .hw = NVFX_STATE_FRAGPROG } }; diff --git a/src/gallium/drivers/nv40/nv40_fragtex.c b/src/gallium/drivers/nv40/nv40_fragtex.c index 4c26f3cb12..0b46a5313b 100644 --- a/src/gallium/drivers/nv40/nv40_fragtex.c +++ b/src/gallium/drivers/nv40/nv40_fragtex.c @@ -61,10 +61,10 @@ nv40_fragtex_format(uint pipe_format) static struct nouveau_stateobj * -nv40_fragtex_build(struct nv40_context *nv40, int unit) +nv40_fragtex_build(struct nvfx_context *nvfx, int unit) { - struct nv40_sampler_state *ps = nv40->tex_sampler[unit]; - struct nv40_miptree *nv40mt = nv40->tex_miptree[unit]; + struct nvfx_sampler_state *ps = nvfx->tex_sampler[unit]; + struct nvfx_miptree *nv40mt = nvfx->tex_miptree[unit]; struct nouveau_bo *bo = nouveau_bo(nv40mt->buffer); struct pipe_texture *pt = &nv40mt->base; struct nv40_texture_format *tf; @@ -111,7 +111,7 @@ nv40_fragtex_build(struct nv40_context *nv40, int unit) txs = tf->swizzle; so = so_new(2, 9, 2); - so_method(so, nv40->screen->eng3d, NV34TCL_TX_OFFSET(unit), 8); + so_method(so, nvfx->screen->eng3d, NV34TCL_TX_OFFSET(unit), 8); so_reloc (so, bo, 0, tex_flags | NOUVEAU_BO_LOW, 0, 0); so_reloc (so, bo, txf, tex_flags | NOUVEAU_BO_OR, NV34TCL_TX_FORMAT_DMA0, NV34TCL_TX_FORMAT_DMA1); @@ -122,17 +122,17 @@ nv40_fragtex_build(struct nv40_context *nv40, int unit) so_data (so, (pt->width0 << NV34TCL_TX_NPOT_SIZE_W_SHIFT) | pt->height0); so_data (so, ps->bcol); - so_method(so, nv40->screen->eng3d, NV40TCL_TEX_SIZE1(unit), 1); + so_method(so, nvfx->screen->eng3d, NV40TCL_TEX_SIZE1(unit), 1); so_data (so, (pt->depth0 << NV40TCL_TEX_SIZE1_DEPTH_SHIFT) | txp); return so; } static boolean -nv40_fragtex_validate(struct nv40_context *nv40) +nv40_fragtex_validate(struct nvfx_context *nvfx) { - struct nv40_fragment_program *fp = nv40->fragprog; - struct nv40_state *state = &nv40->state; + struct nvfx_fragment_program *fp = nvfx->fragprog; + struct nvfx_state *state = &nvfx->state; struct nouveau_stateobj *so; unsigned samplers, unit; @@ -142,31 +142,31 @@ nv40_fragtex_validate(struct nv40_context *nv40) samplers &= ~(1 << unit); so = so_new(1, 1, 0); - so_method(so, nv40->screen->eng3d, NV34TCL_TX_ENABLE(unit), 1); + so_method(so, nvfx->screen->eng3d, NV34TCL_TX_ENABLE(unit), 1); so_data (so, 0); - so_ref(so, &nv40->state.hw[NV40_STATE_FRAGTEX0 + unit]); - state->dirty |= (1ULL << (NV40_STATE_FRAGTEX0 + unit)); + so_ref(so, &nvfx->state.hw[NVFX_STATE_FRAGTEX0 + unit]); + state->dirty |= (1ULL << (NVFX_STATE_FRAGTEX0 + unit)); } - samplers = nv40->dirty_samplers & fp->samplers; + samplers = nvfx->dirty_samplers & fp->samplers; while (samplers) { unit = ffs(samplers) - 1; samplers &= ~(1 << unit); - so = nv40_fragtex_build(nv40, unit); - so_ref(so, &nv40->state.hw[NV40_STATE_FRAGTEX0 + unit]); + so = nv40_fragtex_build(nvfx, unit); + so_ref(so, &nvfx->state.hw[NVFX_STATE_FRAGTEX0 + unit]); so_ref(NULL, &so); - state->dirty |= (1ULL << (NV40_STATE_FRAGTEX0 + unit)); + state->dirty |= (1ULL << (NVFX_STATE_FRAGTEX0 + unit)); } - nv40->state.fp_samplers = fp->samplers; + nvfx->state.fp_samplers = fp->samplers; return FALSE; } -struct nv40_state_entry nv40_state_fragtex = { +struct nvfx_state_entry nv40_state_fragtex = { .validate = nv40_fragtex_validate, .dirty = { - .pipe = NV40_NEW_SAMPLER | NV40_NEW_FRAGPROG, + .pipe = NVFX_NEW_SAMPLER | NVFX_NEW_FRAGPROG, .hw = 0 } }; diff --git a/src/gallium/drivers/nv40/nv40_miptree.c b/src/gallium/drivers/nv40/nv40_miptree.c index 62e97bcea4..caec47058f 100644 --- a/src/gallium/drivers/nv40/nv40_miptree.c +++ b/src/gallium/drivers/nv40/nv40_miptree.c @@ -10,7 +10,7 @@ static void -nv40_miptree_layout(struct nv40_miptree *mt) +nv40_miptree_layout(struct nvfx_miptree *mt) { struct pipe_texture *pt = &mt->base; uint width = pt->width0; @@ -64,11 +64,11 @@ nv40_miptree_layout(struct nv40_miptree *mt) static struct pipe_texture * nv40_miptree_create(struct pipe_screen *pscreen, const struct pipe_texture *pt) { - struct nv40_miptree *mt; + struct nvfx_miptree *mt; unsigned buf_usage = PIPE_BUFFER_USAGE_PIXEL | NOUVEAU_BUFFER_USAGE_TEXTURE; - mt = MALLOC(sizeof(struct nv40_miptree)); + mt = MALLOC(sizeof(struct nvfx_miptree)); if (!mt) return NULL; mt->base = *pt; @@ -127,14 +127,14 @@ static struct pipe_texture * nv40_miptree_blanket(struct pipe_screen *pscreen, const struct pipe_texture *pt, const unsigned *stride, struct pipe_buffer *pb) { - struct nv40_miptree *mt; + struct nvfx_miptree *mt; /* Only supports 2D, non-mipmapped textures for the moment */ if (pt->target != PIPE_TEXTURE_2D || pt->last_level != 0 || pt->depth0 != 1) return NULL; - mt = CALLOC_STRUCT(nv40_miptree); + mt = CALLOC_STRUCT(nvfx_miptree); if (!mt) return NULL; @@ -155,7 +155,7 @@ nv40_miptree_blanket(struct pipe_screen *pscreen, const struct pipe_texture *pt, static void nv40_miptree_destroy(struct pipe_texture *pt) { - struct nv40_miptree *mt = (struct nv40_miptree *)pt; + struct nvfx_miptree *mt = (struct nvfx_miptree *)pt; int l; pipe_buffer_reference(&mt->buffer, NULL); @@ -172,7 +172,7 @@ nv40_miptree_surface_new(struct pipe_screen *pscreen, struct pipe_texture *pt, unsigned face, unsigned level, unsigned zslice, unsigned flags) { - struct nv40_miptree *mt = (struct nv40_miptree *)pt; + struct nvfx_miptree *mt = (struct nvfx_miptree *)pt; struct nv04_surface *ns; ns = CALLOC_STRUCT(nv04_surface); @@ -202,7 +202,7 @@ nv40_miptree_surface_new(struct pipe_screen *pscreen, struct pipe_texture *pt, * Note that ns->pitch is always a multiple of 64 for linear surfaces and swizzled surfaces are POT, so * ns->pitch & 63 is equivalent to (ns->pitch < 64 && swizzled)*/ if((ns->pitch & 63) && (ns->base.usage & (PIPE_BUFFER_USAGE_GPU_WRITE | NOUVEAU_BUFFER_USAGE_NO_RENDER)) == PIPE_BUFFER_USAGE_GPU_WRITE) - return &nv04_surface_wrap_for_render(pscreen, ((struct nv40_screen*)pscreen)->eng2d, ns)->base; + return &nv04_surface_wrap_for_render(pscreen, ((struct nvfx_screen*)pscreen)->eng2d, ns)->base; return &ns->base; } @@ -213,7 +213,7 @@ nv40_miptree_surface_del(struct pipe_surface *ps) struct nv04_surface* ns = (struct nv04_surface*)ps; if(ns->backing) { - struct nv40_screen* screen = (struct nv40_screen*)ps->texture->screen; + struct nvfx_screen* screen = (struct nvfx_screen*)ps->texture->screen; if(ns->backing->base.usage & PIPE_BUFFER_USAGE_GPU_WRITE) screen->eng2d->copy(screen->eng2d, &ns->backing->base, 0, 0, ps, 0, 0, ns->base.width, ns->base.height); nv40_miptree_surface_del(&ns->backing->base); diff --git a/src/gallium/drivers/nv40/nv40_query.c b/src/gallium/drivers/nv40/nv40_query.c index 899a8dc0b2..48cfc4d593 100644 --- a/src/gallium/drivers/nv40/nv40_query.c +++ b/src/gallium/drivers/nv40/nv40_query.c @@ -39,9 +39,9 @@ nv40_query_destroy(struct pipe_context *pipe, struct pipe_query *pq) static void nv40_query_begin(struct pipe_context *pipe, struct pipe_query *pq) { - struct nv40_context *nv40 = nv40_context(pipe); + struct nvfx_context *nvfx = nvfx_context(pipe); struct nv40_query *q = nv40_query(pq); - struct nv40_screen *screen = nv40->screen; + struct nvfx_screen *screen = nvfx->screen; struct nouveau_channel *chan = screen->base.channel; struct nouveau_grobj *eng3d = screen->eng3d; @@ -56,9 +56,9 @@ nv40_query_begin(struct pipe_context *pipe, struct pipe_query *pq) pipe->get_query_result(pipe, pq, 1, &tmp); } - if (nouveau_resource_alloc(nv40->screen->query_heap, 1, NULL, &q->object)) + if (nouveau_resource_alloc(nvfx->screen->query_heap, 1, NULL, &q->object)) assert(0); - nouveau_notifier_reset(nv40->screen->query, q->object->start); + nouveau_notifier_reset(nvfx->screen->query, q->object->start); BEGIN_RING(chan, eng3d, NV34TCL_QUERY_RESET, 1); OUT_RING (chan, 1); @@ -71,9 +71,9 @@ nv40_query_begin(struct pipe_context *pipe, struct pipe_query *pq) static void nv40_query_end(struct pipe_context *pipe, struct pipe_query *pq) { - struct nv40_context *nv40 = nv40_context(pipe); + struct nvfx_context *nvfx = nvfx_context(pipe); struct nv40_query *q = nv40_query(pq); - struct nv40_screen *screen = nv40->screen; + struct nvfx_screen *screen = nvfx->screen; struct nouveau_channel *chan = screen->base.channel; struct nouveau_grobj *eng3d = screen->eng3d; @@ -87,7 +87,7 @@ static boolean nv40_query_result(struct pipe_context *pipe, struct pipe_query *pq, boolean wait, uint64_t *result) { - struct nv40_context *nv40 = nv40_context(pipe); + struct nvfx_context *nvfx = nvfx_context(pipe); struct nv40_query *q = nv40_query(pq); assert(q->object && q->type == PIPE_QUERY_OCCLUSION_COUNTER); @@ -95,18 +95,18 @@ nv40_query_result(struct pipe_context *pipe, struct pipe_query *pq, if (!q->ready) { unsigned status; - status = nouveau_notifier_status(nv40->screen->query, + status = nouveau_notifier_status(nvfx->screen->query, q->object->start); if (status != NV_NOTIFY_STATE_STATUS_COMPLETED) { if (wait == FALSE) return FALSE; - nouveau_notifier_wait_status(nv40->screen->query, + nouveau_notifier_wait_status(nvfx->screen->query, q->object->start, NV_NOTIFY_STATE_STATUS_COMPLETED, 0); } - q->result = nouveau_notifier_return_val(nv40->screen->query, + q->result = nouveau_notifier_return_val(nvfx->screen->query, q->object->start); q->ready = TRUE; nouveau_resource_free(&q->object); @@ -117,11 +117,11 @@ nv40_query_result(struct pipe_context *pipe, struct pipe_query *pq, } void -nv40_init_query_functions(struct nv40_context *nv40) +nv40_init_query_functions(struct nvfx_context *nvfx) { - nv40->pipe.create_query = nv40_query_create; - nv40->pipe.destroy_query = nv40_query_destroy; - nv40->pipe.begin_query = nv40_query_begin; - nv40->pipe.end_query = nv40_query_end; - nv40->pipe.get_query_result = nv40_query_result; + nvfx->pipe.create_query = nv40_query_create; + nvfx->pipe.destroy_query = nv40_query_destroy; + nvfx->pipe.begin_query = nv40_query_begin; + nvfx->pipe.end_query = nv40_query_end; + nvfx->pipe.get_query_result = nv40_query_result; } diff --git a/src/gallium/drivers/nv40/nv40_screen.c b/src/gallium/drivers/nv40/nv40_screen.c index 3c901c1c53..0fc8e18750 100644 --- a/src/gallium/drivers/nv40/nv40_screen.c +++ b/src/gallium/drivers/nv40/nv40_screen.c @@ -1,7 +1,7 @@ #include "pipe/p_screen.h" #include "nv40_context.h" -#include "nv40_screen.h" +#include "nvfx_screen.h" #define NV4X_GRCLASS4097_CHIPSETS 0x00000baf #define NV4X_GRCLASS4497_CHIPSETS 0x00005450 @@ -10,7 +10,7 @@ static int nv40_screen_get_param(struct pipe_screen *pscreen, int param) { - struct nv40_screen *screen = nv40_screen(pscreen); + struct nvfx_screen *screen = nvfx_screen(pscreen); switch (param) { case PIPE_CAP_MAX_TEXTURE_IMAGE_UNITS: @@ -143,7 +143,7 @@ nv40_screen_surface_format_supported(struct pipe_screen *pscreen, static struct pipe_buffer * nv40_surface_buffer(struct pipe_surface *surf) { - struct nv40_miptree *mt = (struct nv40_miptree *)surf->texture; + struct nvfx_miptree *mt = (struct nvfx_miptree *)surf->texture; return mt->buffer; } @@ -151,10 +151,10 @@ nv40_surface_buffer(struct pipe_surface *surf) static void nv40_screen_destroy(struct pipe_screen *pscreen) { - struct nv40_screen *screen = nv40_screen(pscreen); + struct nvfx_screen *screen = nvfx_screen(pscreen); unsigned i; - for (i = 0; i < NV40_STATE_MAX; i++) { + for (i = 0; i < NVFX_STATE_MAX; i++) { if (screen->state[i]) so_ref(NULL, &screen->state[i]); } @@ -175,7 +175,7 @@ nv40_screen_destroy(struct pipe_screen *pscreen) struct pipe_screen * nv40_screen_create(struct pipe_winsys *ws, struct nouveau_device *dev) { - struct nv40_screen *screen = CALLOC_STRUCT(nv40_screen); + struct nvfx_screen *screen = CALLOC_STRUCT(nvfx_screen); struct nouveau_channel *chan; struct pipe_screen *pscreen; struct nouveau_stateobj *so; diff --git a/src/gallium/drivers/nv40/nv40_screen.h b/src/gallium/drivers/nv40/nv40_screen.h deleted file mode 100644 index ad0ee63da6..0000000000 --- a/src/gallium/drivers/nv40/nv40_screen.h +++ /dev/null @@ -1,37 +0,0 @@ -#ifndef __NV40_SCREEN_H__ -#define __NV40_SCREEN_H__ - -#include "nouveau/nouveau_screen.h" -#include "nouveau/nv04_surface_2d.h" - -struct nv40_screen { - struct nouveau_screen base; - - struct nouveau_winsys *nvws; - - struct nv40_context *cur_ctx; - - /* HW graphics objects */ - struct nv04_surface_2d *eng2d; - struct nouveau_grobj *eng3d; - struct nouveau_notifier *sync; - - /* Query object resources */ - struct nouveau_notifier *query; - struct nouveau_resource *query_heap; - - /* Vtxprog resources */ - struct nouveau_resource *vp_exec_heap; - struct nouveau_resource *vp_data_heap; - - /* Current 3D state of channel */ - struct nouveau_stateobj *state[NV40_STATE_MAX]; -}; - -static INLINE struct nv40_screen * -nv40_screen(struct pipe_screen *screen) -{ - return (struct nv40_screen *)screen; -} - -#endif diff --git a/src/gallium/drivers/nv40/nv40_state.c b/src/gallium/drivers/nv40/nv40_state.c index e8076e059b..a205342ac5 100644 --- a/src/gallium/drivers/nv40/nv40_state.c +++ b/src/gallium/drivers/nv40/nv40_state.c @@ -7,15 +7,15 @@ #include "tgsi/tgsi_parse.h" #include "nv40_context.h" -#include "nv40_state.h" +#include "nvfx_state.h" static void * nv40_blend_state_create(struct pipe_context *pipe, const struct pipe_blend_state *cso) { - struct nv40_context *nv40 = nv40_context(pipe); - struct nouveau_grobj *eng3d = nv40->screen->eng3d; - struct nv40_blend_state *bso = CALLOC(1, sizeof(*bso)); + struct nvfx_context *nvfx = nvfx_context(pipe); + struct nouveau_grobj *eng3d = nvfx->screen->eng3d; + struct nvfx_blend_state *bso = CALLOC(1, sizeof(*bso)); struct nouveau_stateobj *so = so_new(5, 8, 0); if (cso->rt[0].blend_enable) { @@ -60,16 +60,16 @@ nv40_blend_state_create(struct pipe_context *pipe, static void nv40_blend_state_bind(struct pipe_context *pipe, void *hwcso) { - struct nv40_context *nv40 = nv40_context(pipe); + struct nvfx_context *nvfx = nvfx_context(pipe); - nv40->blend = hwcso; - nv40->dirty |= NV40_NEW_BLEND; + nvfx->blend = hwcso; + nvfx->dirty |= NVFX_NEW_BLEND; } static void nv40_blend_state_delete(struct pipe_context *pipe, void *hwcso) { - struct nv40_blend_state *bso = hwcso; + struct nvfx_blend_state *bso = hwcso; so_ref(NULL, &bso->so); FREE(bso); @@ -118,10 +118,10 @@ static void * nv40_sampler_state_create(struct pipe_context *pipe, const struct pipe_sampler_state *cso) { - struct nv40_sampler_state *ps; + struct nvfx_sampler_state *ps; uint32_t filter = 0; - ps = MALLOC(sizeof(struct nv40_sampler_state)); + ps = MALLOC(sizeof(struct nvfx_sampler_state)); ps->fmt = 0; if (!cso->normalized_coords) @@ -258,21 +258,21 @@ nv40_sampler_state_create(struct pipe_context *pipe, static void nv40_sampler_state_bind(struct pipe_context *pipe, unsigned nr, void **sampler) { - struct nv40_context *nv40 = nv40_context(pipe); + struct nvfx_context *nvfx = nvfx_context(pipe); unsigned unit; for (unit = 0; unit < nr; unit++) { - nv40->tex_sampler[unit] = sampler[unit]; - nv40->dirty_samplers |= (1 << unit); + nvfx->tex_sampler[unit] = sampler[unit]; + nvfx->dirty_samplers |= (1 << unit); } - for (unit = nr; unit < nv40->nr_samplers; unit++) { - nv40->tex_sampler[unit] = NULL; - nv40->dirty_samplers |= (1 << unit); + for (unit = nr; unit < nvfx->nr_samplers; unit++) { + nvfx->tex_sampler[unit] = NULL; + nvfx->dirty_samplers |= (1 << unit); } - nv40->nr_samplers = nr; - nv40->dirty |= NV40_NEW_SAMPLER; + nvfx->nr_samplers = nr; + nvfx->dirty |= NVFX_NEW_SAMPLER; } static void @@ -285,33 +285,33 @@ static void nv40_set_sampler_texture(struct pipe_context *pipe, unsigned nr, struct pipe_texture **miptree) { - struct nv40_context *nv40 = nv40_context(pipe); + struct nvfx_context *nvfx = nvfx_context(pipe); unsigned unit; for (unit = 0; unit < nr; unit++) { pipe_texture_reference((struct pipe_texture **) - &nv40->tex_miptree[unit], miptree[unit]); - nv40->dirty_samplers |= (1 << unit); + &nvfx->tex_miptree[unit], miptree[unit]); + nvfx->dirty_samplers |= (1 << unit); } - for (unit = nr; unit < nv40->nr_textures; unit++) { + for (unit = nr; unit < nvfx->nr_textures; unit++) { pipe_texture_reference((struct pipe_texture **) - &nv40->tex_miptree[unit], NULL); - nv40->dirty_samplers |= (1 << unit); + &nvfx->tex_miptree[unit], NULL); + nvfx->dirty_samplers |= (1 << unit); } - nv40->nr_textures = nr; - nv40->dirty |= NV40_NEW_SAMPLER; + nvfx->nr_textures = nr; + nvfx->dirty |= NVFX_NEW_SAMPLER; } static void * nv40_rasterizer_state_create(struct pipe_context *pipe, const struct pipe_rasterizer_state *cso) { - struct nv40_context *nv40 = nv40_context(pipe); - struct nv40_rasterizer_state *rsso = CALLOC(1, sizeof(*rsso)); + struct nvfx_context *nvfx = nvfx_context(pipe); + struct nvfx_rasterizer_state *rsso = CALLOC(1, sizeof(*rsso)); struct nouveau_stateobj *so = so_new(9, 19, 0); - struct nouveau_grobj *eng3d = nv40->screen->eng3d; + struct nouveau_grobj *eng3d = nvfx->screen->eng3d; /*XXX: ignored: * light_twoside @@ -423,17 +423,17 @@ nv40_rasterizer_state_create(struct pipe_context *pipe, static void nv40_rasterizer_state_bind(struct pipe_context *pipe, void *hwcso) { - struct nv40_context *nv40 = nv40_context(pipe); + struct nvfx_context *nvfx = nvfx_context(pipe); - nv40->rasterizer = hwcso; - nv40->dirty |= NV40_NEW_RAST; - nv40->draw_dirty |= NV40_NEW_RAST; + nvfx->rasterizer = hwcso; + nvfx->dirty |= NVFX_NEW_RAST; + nvfx->draw_dirty |= NVFX_NEW_RAST; } static void nv40_rasterizer_state_delete(struct pipe_context *pipe, void *hwcso) { - struct nv40_rasterizer_state *rsso = hwcso; + struct nvfx_rasterizer_state *rsso = hwcso; so_ref(NULL, &rsso->so); FREE(rsso); @@ -443,10 +443,10 @@ static void * nv40_depth_stencil_alpha_state_create(struct pipe_context *pipe, const struct pipe_depth_stencil_alpha_state *cso) { - struct nv40_context *nv40 = nv40_context(pipe); - struct nv40_zsa_state *zsaso = CALLOC(1, sizeof(*zsaso)); + struct nvfx_context *nvfx = nvfx_context(pipe); + struct nvfx_zsa_state *zsaso = CALLOC(1, sizeof(*zsaso)); struct nouveau_stateobj *so = so_new(6, 20, 0); - struct nouveau_grobj *eng3d = nv40->screen->eng3d; + struct nouveau_grobj *eng3d = nvfx->screen->eng3d; so_method(so, eng3d, NV34TCL_DEPTH_FUNC, 3); so_data (so, nvgl_comparison_op(cso->depth.func)); @@ -497,16 +497,16 @@ nv40_depth_stencil_alpha_state_create(struct pipe_context *pipe, static void nv40_depth_stencil_alpha_state_bind(struct pipe_context *pipe, void *hwcso) { - struct nv40_context *nv40 = nv40_context(pipe); + struct nvfx_context *nvfx = nvfx_context(pipe); - nv40->zsa = hwcso; - nv40->dirty |= NV40_NEW_ZSA; + nvfx->zsa = hwcso; + nvfx->dirty |= NVFX_NEW_ZSA; } static void nv40_depth_stencil_alpha_state_delete(struct pipe_context *pipe, void *hwcso) { - struct nv40_zsa_state *zsaso = hwcso; + struct nvfx_zsa_state *zsaso = hwcso; so_ref(NULL, &zsaso->so); FREE(zsaso); @@ -516,12 +516,12 @@ static void * nv40_vp_state_create(struct pipe_context *pipe, const struct pipe_shader_state *cso) { - struct nv40_context *nv40 = nv40_context(pipe); - struct nv40_vertex_program *vp; + struct nvfx_context *nvfx = nvfx_context(pipe); + struct nvfx_vertex_program *vp; - vp = CALLOC(1, sizeof(struct nv40_vertex_program)); + vp = CALLOC(1, sizeof(struct nvfx_vertex_program)); vp->pipe.tokens = tgsi_dup_tokens(cso->tokens); - vp->draw = draw_create_vertex_shader(nv40->draw, &vp->pipe); + vp->draw = draw_create_vertex_shader(nvfx->draw, &vp->pipe); return (void *)vp; } @@ -529,21 +529,21 @@ nv40_vp_state_create(struct pipe_context *pipe, static void nv40_vp_state_bind(struct pipe_context *pipe, void *hwcso) { - struct nv40_context *nv40 = nv40_context(pipe); + struct nvfx_context *nvfx = nvfx_context(pipe); - nv40->vertprog = hwcso; - nv40->dirty |= NV40_NEW_VERTPROG; - nv40->draw_dirty |= NV40_NEW_VERTPROG; + nvfx->vertprog = hwcso; + nvfx->dirty |= NVFX_NEW_VERTPROG; + nvfx->draw_dirty |= NVFX_NEW_VERTPROG; } static void nv40_vp_state_delete(struct pipe_context *pipe, void *hwcso) { - struct nv40_context *nv40 = nv40_context(pipe); - struct nv40_vertex_program *vp = hwcso; + struct nvfx_context *nvfx = nvfx_context(pipe); + struct nvfx_vertex_program *vp = hwcso; - draw_delete_vertex_shader(nv40->draw, vp->draw); - nv40_vertprog_destroy(nv40, vp); + draw_delete_vertex_shader(nvfx->draw, vp->draw); + nv40_vertprog_destroy(nvfx, vp); FREE((void*)vp->pipe.tokens); FREE(vp); } @@ -552,9 +552,9 @@ static void * nv40_fp_state_create(struct pipe_context *pipe, const struct pipe_shader_state *cso) { - struct nv40_fragment_program *fp; + struct nvfx_fragment_program *fp; - fp = CALLOC(1, sizeof(struct nv40_fragment_program)); + fp = CALLOC(1, sizeof(struct nvfx_fragment_program)); fp->pipe.tokens = tgsi_dup_tokens(cso->tokens); tgsi_scan_shader(fp->pipe.tokens, &fp->info); @@ -565,19 +565,19 @@ nv40_fp_state_create(struct pipe_context *pipe, static void nv40_fp_state_bind(struct pipe_context *pipe, void *hwcso) { - struct nv40_context *nv40 = nv40_context(pipe); + struct nvfx_context *nvfx = nvfx_context(pipe); - nv40->fragprog = hwcso; - nv40->dirty |= NV40_NEW_FRAGPROG; + nvfx->fragprog = hwcso; + nvfx->dirty |= NVFX_NEW_FRAGPROG; } static void nv40_fp_state_delete(struct pipe_context *pipe, void *hwcso) { - struct nv40_context *nv40 = nv40_context(pipe); - struct nv40_fragment_program *fp = hwcso; + struct nvfx_context *nvfx = nvfx_context(pipe); + struct nvfx_fragment_program *fp = hwcso; - nv40_fragprog_destroy(nv40, fp); + nv40_fragprog_destroy(nvfx, fp); FREE((void*)fp->pipe.tokens); FREE(fp); } @@ -586,47 +586,47 @@ static void nv40_set_blend_color(struct pipe_context *pipe, const struct pipe_blend_color *bcol) { - struct nv40_context *nv40 = nv40_context(pipe); + struct nvfx_context *nvfx = nvfx_context(pipe); - nv40->blend_colour = *bcol; - nv40->dirty |= NV40_NEW_BCOL; + nvfx->blend_colour = *bcol; + nvfx->dirty |= NVFX_NEW_BCOL; } static void nv40_set_stencil_ref(struct pipe_context *pipe, const struct pipe_stencil_ref *sr) { - struct nv40_context *nv40 = nv40_context(pipe); + struct nvfx_context *nvfx = nvfx_context(pipe); - nv40->stencil_ref = *sr; - nv40->dirty |= NV40_NEW_SR; + nvfx->stencil_ref = *sr; + nvfx->dirty |= NVFX_NEW_SR; } static void nv40_set_clip_state(struct pipe_context *pipe, const struct pipe_clip_state *clip) { - struct nv40_context *nv40 = nv40_context(pipe); + struct nvfx_context *nvfx = nvfx_context(pipe); - nv40->clip = *clip; - nv40->dirty |= NV40_NEW_UCP; - nv40->draw_dirty |= NV40_NEW_UCP; + nvfx->clip = *clip; + nvfx->dirty |= NVFX_NEW_UCP; + nvfx->draw_dirty |= NVFX_NEW_UCP; } static void nv40_set_constant_buffer(struct pipe_context *pipe, uint shader, uint index, struct pipe_buffer *buf ) { - struct nv40_context *nv40 = nv40_context(pipe); + struct nvfx_context *nvfx = nvfx_context(pipe); - nv40->constbuf[shader] = buf; - nv40->constbuf_nr[shader] = buf->size / (4 * sizeof(float)); + nvfx->constbuf[shader] = buf; + nvfx->constbuf_nr[shader] = buf->size / (4 * sizeof(float)); if (shader == PIPE_SHADER_VERTEX) { - nv40->dirty |= NV40_NEW_VERTPROG; + nvfx->dirty |= NVFX_NEW_VERTPROG; } else if (shader == PIPE_SHADER_FRAGMENT) { - nv40->dirty |= NV40_NEW_FRAGPROG; + nvfx->dirty |= NVFX_NEW_FRAGPROG; } } @@ -634,54 +634,54 @@ static void nv40_set_framebuffer_state(struct pipe_context *pipe, const struct pipe_framebuffer_state *fb) { - struct nv40_context *nv40 = nv40_context(pipe); + struct nvfx_context *nvfx = nvfx_context(pipe); - nv40->framebuffer = *fb; - nv40->dirty |= NV40_NEW_FB; + nvfx->framebuffer = *fb; + nvfx->dirty |= NVFX_NEW_FB; } static void nv40_set_polygon_stipple(struct pipe_context *pipe, const struct pipe_poly_stipple *stipple) { - struct nv40_context *nv40 = nv40_context(pipe); + struct nvfx_context *nvfx = nvfx_context(pipe); - memcpy(nv40->stipple, stipple->stipple, 4 * 32); - nv40->dirty |= NV40_NEW_STIPPLE; + memcpy(nvfx->stipple, stipple->stipple, 4 * 32); + nvfx->dirty |= NVFX_NEW_STIPPLE; } static void nv40_set_scissor_state(struct pipe_context *pipe, const struct pipe_scissor_state *s) { - struct nv40_context *nv40 = nv40_context(pipe); + struct nvfx_context *nvfx = nvfx_context(pipe); - nv40->scissor = *s; - nv40->dirty |= NV40_NEW_SCISSOR; + nvfx->scissor = *s; + nvfx->dirty |= NVFX_NEW_SCISSOR; } static void nv40_set_viewport_state(struct pipe_context *pipe, const struct pipe_viewport_state *vpt) { - struct nv40_context *nv40 = nv40_context(pipe); + struct nvfx_context *nvfx = nvfx_context(pipe); - nv40->viewport = *vpt; - nv40->dirty |= NV40_NEW_VIEWPORT; - nv40->draw_dirty |= NV40_NEW_VIEWPORT; + nvfx->viewport = *vpt; + nvfx->dirty |= NVFX_NEW_VIEWPORT; + nvfx->draw_dirty |= NVFX_NEW_VIEWPORT; } static void nv40_set_vertex_buffers(struct pipe_context *pipe, unsigned count, const struct pipe_vertex_buffer *vb) { - struct nv40_context *nv40 = nv40_context(pipe); + struct nvfx_context *nvfx = nvfx_context(pipe); - memcpy(nv40->vtxbuf, vb, sizeof(*vb) * count); - nv40->vtxbuf_nr = count; + memcpy(nvfx->vtxbuf, vb, sizeof(*vb) * count); + nvfx->vtxbuf_nr = count; - nv40->dirty |= NV40_NEW_ARRAYS; - nv40->draw_dirty |= NV40_NEW_ARRAYS; + nvfx->dirty |= NVFX_NEW_ARRAYS; + nvfx->draw_dirty |= NVFX_NEW_ARRAYS; } static void * @@ -689,7 +689,7 @@ nv40_vtxelts_state_create(struct pipe_context *pipe, unsigned num_elements, const struct pipe_vertex_element *elements) { - struct nv40_vtxelt_state *cso = CALLOC_STRUCT(nv40_vtxelt_state); + struct nvfx_vtxelt_state *cso = CALLOC_STRUCT(nvfx_vtxelt_state); assert(num_elements < 16); /* not doing fallbacks yet */ cso->num_elements = num_elements; @@ -709,57 +709,57 @@ nv40_vtxelts_state_delete(struct pipe_context *pipe, void *hwcso) static void nv40_vtxelts_state_bind(struct pipe_context *pipe, void *hwcso) { - struct nv40_context *nv40 = nv40_context(pipe); + struct nvfx_context *nvfx = nvfx_context(pipe); - nv40->vtxelt = hwcso; - nv40->dirty |= NV40_NEW_ARRAYS; - nv40->draw_dirty |= NV40_NEW_ARRAYS; + nvfx->vtxelt = hwcso; + nvfx->dirty |= NVFX_NEW_ARRAYS; + nvfx->draw_dirty |= NVFX_NEW_ARRAYS; } void -nv40_init_state_functions(struct nv40_context *nv40) +nv40_init_state_functions(struct nvfx_context *nvfx) { - nv40->pipe.create_blend_state = nv40_blend_state_create; - nv40->pipe.bind_blend_state = nv40_blend_state_bind; - nv40->pipe.delete_blend_state = nv40_blend_state_delete; + nvfx->pipe.create_blend_state = nv40_blend_state_create; + nvfx->pipe.bind_blend_state = nv40_blend_state_bind; + nvfx->pipe.delete_blend_state = nv40_blend_state_delete; - nv40->pipe.create_sampler_state = nv40_sampler_state_create; - nv40->pipe.bind_fragment_sampler_states = nv40_sampler_state_bind; - nv40->pipe.delete_sampler_state = nv40_sampler_state_delete; - nv40->pipe.set_fragment_sampler_textures = nv40_set_sampler_texture; + nvfx->pipe.create_sampler_state = nv40_sampler_state_create; + nvfx->pipe.bind_fragment_sampler_states = nv40_sampler_state_bind; + nvfx->pipe.delete_sampler_state = nv40_sampler_state_delete; + nvfx->pipe.set_fragment_sampler_textures = nv40_set_sampler_texture; - nv40->pipe.create_rasterizer_state = nv40_rasterizer_state_create; - nv40->pipe.bind_rasterizer_state = nv40_rasterizer_state_bind; - nv40->pipe.delete_rasterizer_state = nv40_rasterizer_state_delete; + nvfx->pipe.create_rasterizer_state = nv40_rasterizer_state_create; + nvfx->pipe.bind_rasterizer_state = nv40_rasterizer_state_bind; + nvfx->pipe.delete_rasterizer_state = nv40_rasterizer_state_delete; - nv40->pipe.create_depth_stencil_alpha_state = + nvfx->pipe.create_depth_stencil_alpha_state = nv40_depth_stencil_alpha_state_create; - nv40->pipe.bind_depth_stencil_alpha_state = + nvfx->pipe.bind_depth_stencil_alpha_state = nv40_depth_stencil_alpha_state_bind; - nv40->pipe.delete_depth_stencil_alpha_state = + nvfx->pipe.delete_depth_stencil_alpha_state = nv40_depth_stencil_alpha_state_delete; - nv40->pipe.create_vs_state = nv40_vp_state_create; - nv40->pipe.bind_vs_state = nv40_vp_state_bind; - nv40->pipe.delete_vs_state = nv40_vp_state_delete; + nvfx->pipe.create_vs_state = nv40_vp_state_create; + nvfx->pipe.bind_vs_state = nv40_vp_state_bind; + nvfx->pipe.delete_vs_state = nv40_vp_state_delete; - nv40->pipe.create_fs_state = nv40_fp_state_create; - nv40->pipe.bind_fs_state = nv40_fp_state_bind; - nv40->pipe.delete_fs_state = nv40_fp_state_delete; + nvfx->pipe.create_fs_state = nv40_fp_state_create; + nvfx->pipe.bind_fs_state = nv40_fp_state_bind; + nvfx->pipe.delete_fs_state = nv40_fp_state_delete; - nv40->pipe.set_blend_color = nv40_set_blend_color; - nv40->pipe.set_stencil_ref = nv40_set_stencil_ref; - nv40->pipe.set_clip_state = nv40_set_clip_state; - nv40->pipe.set_constant_buffer = nv40_set_constant_buffer; - nv40->pipe.set_framebuffer_state = nv40_set_framebuffer_state; - nv40->pipe.set_polygon_stipple = nv40_set_polygon_stipple; - nv40->pipe.set_scissor_state = nv40_set_scissor_state; - nv40->pipe.set_viewport_state = nv40_set_viewport_state; + nvfx->pipe.set_blend_color = nv40_set_blend_color; + nvfx->pipe.set_stencil_ref = nv40_set_stencil_ref; + nvfx->pipe.set_clip_state = nv40_set_clip_state; + nvfx->pipe.set_constant_buffer = nv40_set_constant_buffer; + nvfx->pipe.set_framebuffer_state = nv40_set_framebuffer_state; + nvfx->pipe.set_polygon_stipple = nv40_set_polygon_stipple; + nvfx->pipe.set_scissor_state = nv40_set_scissor_state; + nvfx->pipe.set_viewport_state = nv40_set_viewport_state; - nv40->pipe.create_vertex_elements_state = nv40_vtxelts_state_create; - nv40->pipe.delete_vertex_elements_state = nv40_vtxelts_state_delete; - nv40->pipe.bind_vertex_elements_state = nv40_vtxelts_state_bind; + nvfx->pipe.create_vertex_elements_state = nv40_vtxelts_state_create; + nvfx->pipe.delete_vertex_elements_state = nv40_vtxelts_state_delete; + nvfx->pipe.bind_vertex_elements_state = nv40_vtxelts_state_bind; - nv40->pipe.set_vertex_buffers = nv40_set_vertex_buffers; + nvfx->pipe.set_vertex_buffers = nv40_set_vertex_buffers; } diff --git a/src/gallium/drivers/nv40/nv40_state.h b/src/gallium/drivers/nv40/nv40_state.h deleted file mode 100644 index e2e69420ea..0000000000 --- a/src/gallium/drivers/nv40/nv40_state.h +++ /dev/null @@ -1,91 +0,0 @@ -#ifndef __NV40_STATE_H__ -#define __NV40_STATE_H__ - -#include "pipe/p_state.h" -#include "tgsi/tgsi_scan.h" - -struct nv40_sampler_state { - uint32_t fmt; - uint32_t wrap; - uint32_t en; - uint32_t filt; - uint32_t bcol; -}; - -struct nv40_vertex_program_exec { - uint32_t data[4]; - boolean has_branch_offset; - int const_index; -}; - -struct nv40_vertex_program_data { - int index; /* immediates == -1 */ - float value[4]; -}; - -struct nv40_vertex_program { - struct pipe_shader_state pipe; - - struct draw_vertex_shader *draw; - - boolean translated; - - struct pipe_clip_state ucp; - - struct nv40_vertex_program_exec *insns; - unsigned nr_insns; - struct nv40_vertex_program_data *consts; - unsigned nr_consts; - - struct nouveau_resource *exec; - unsigned exec_start; - struct nouveau_resource *data; - unsigned data_start; - unsigned data_start_min; - - uint32_t ir; - uint32_t or; - uint32_t clip_ctrl; - struct nouveau_stateobj *so; -}; - -struct nv40_fragment_program_data { - unsigned offset; - unsigned index; -}; - -struct nv40_fragment_program { - struct pipe_shader_state pipe; - struct tgsi_shader_info info; - - boolean translated; - unsigned samplers; - - uint32_t *insn; - int insn_len; - - struct nv40_fragment_program_data *consts; - unsigned nr_consts; - - struct pipe_buffer *buffer; - - uint32_t fp_control; - struct nouveau_stateobj *so; -}; - -#define NV40_MAX_TEXTURE_LEVELS 16 - -struct nv40_miptree { - struct pipe_texture base; - struct nouveau_bo *bo; - - struct pipe_buffer *buffer; - uint total_size; - - struct { - uint pitch; - uint *image_offset; - } level[NV40_MAX_TEXTURE_LEVELS]; -}; - -#endif diff --git a/src/gallium/drivers/nv40/nv40_state_blend.c b/src/gallium/drivers/nv40/nv40_state_blend.c index 83202ec23c..bb06b4888d 100644 --- a/src/gallium/drivers/nv40/nv40_state_blend.c +++ b/src/gallium/drivers/nv40/nv40_state_blend.c @@ -1,41 +1,41 @@ #include "nv40_context.h" static boolean -nv40_state_blend_validate(struct nv40_context *nv40) +nv40_state_blend_validate(struct nvfx_context *nvfx) { - so_ref(nv40->blend->so, &nv40->state.hw[NV40_STATE_BLEND]); + so_ref(nvfx->blend->so, &nvfx->state.hw[NVFX_STATE_BLEND]); return TRUE; } -struct nv40_state_entry nv40_state_blend = { +struct nvfx_state_entry nv40_state_blend = { .validate = nv40_state_blend_validate, .dirty = { - .pipe = NV40_NEW_BLEND, - .hw = NV40_STATE_BLEND + .pipe = NVFX_NEW_BLEND, + .hw = NVFX_STATE_BLEND } }; static boolean -nv40_state_blend_colour_validate(struct nv40_context *nv40) +nv40_state_blend_colour_validate(struct nvfx_context *nvfx) { struct nouveau_stateobj *so = so_new(1, 1, 0); - struct pipe_blend_color *bcol = &nv40->blend_colour; + struct pipe_blend_color *bcol = &nvfx->blend_colour; - so_method(so, nv40->screen->eng3d, NV34TCL_BLEND_COLOR, 1); + so_method(so, nvfx->screen->eng3d, NV34TCL_BLEND_COLOR, 1); so_data (so, ((float_to_ubyte(bcol->color[3]) << 24) | (float_to_ubyte(bcol->color[0]) << 16) | (float_to_ubyte(bcol->color[1]) << 8) | (float_to_ubyte(bcol->color[2]) << 0))); - so_ref(so, &nv40->state.hw[NV40_STATE_BCOL]); + so_ref(so, &nvfx->state.hw[NVFX_STATE_BCOL]); so_ref(NULL, &so); return TRUE; } -struct nv40_state_entry nv40_state_blend_colour = { +struct nvfx_state_entry nv40_state_blend_colour = { .validate = nv40_state_blend_colour_validate, .dirty = { - .pipe = NV40_NEW_BCOL, - .hw = NV40_STATE_BCOL + .pipe = NVFX_NEW_BCOL, + .hw = NVFX_STATE_BCOL } }; diff --git a/src/gallium/drivers/nv40/nv40_state_emit.c b/src/gallium/drivers/nv40/nv40_state_emit.c index 6ad7a8d4fd..5c437f9969 100644 --- a/src/gallium/drivers/nv40/nv40_state_emit.c +++ b/src/gallium/drivers/nv40/nv40_state_emit.c @@ -1,8 +1,8 @@ #include "nv40_context.h" -#include "nv40_state.h" +#include "nvfx_state.h" #include "draw/draw_context.h" -static struct nv40_state_entry *render_states[] = { +static struct nvfx_state_entry *render_states[] = { &nv40_state_framebuffer, &nv40_state_rasterizer, &nv40_state_scissor, @@ -19,7 +19,7 @@ static struct nv40_state_entry *render_states[] = { NULL }; -static struct nv40_state_entry *swtnl_states[] = { +static struct nvfx_state_entry *swtnl_states[] = { &nv40_state_framebuffer, &nv40_state_rasterizer, &nv40_state_scissor, @@ -37,27 +37,27 @@ static struct nv40_state_entry *swtnl_states[] = { }; static void -nv40_state_do_validate(struct nv40_context *nv40, - struct nv40_state_entry **states) +nv40_state_do_validate(struct nvfx_context *nvfx, + struct nvfx_state_entry **states) { while (*states) { - struct nv40_state_entry *e = *states; + struct nvfx_state_entry *e = *states; - if (nv40->dirty & e->dirty.pipe) { - if (e->validate(nv40)) - nv40->state.dirty |= (1ULL << e->dirty.hw); + if (nvfx->dirty & e->dirty.pipe) { + if (e->validate(nvfx)) + nvfx->state.dirty |= (1ULL << e->dirty.hw); } states++; } - nv40->dirty = 0; + nvfx->dirty = 0; } void -nv40_state_emit(struct nv40_context *nv40) +nv40_state_emit(struct nvfx_context *nvfx) { - struct nv40_state *state = &nv40->state; - struct nv40_screen *screen = nv40->screen; + struct nvfx_state *state = &nvfx->state; + struct nvfx_screen *screen = nvfx->screen; struct nouveau_channel *chan = screen->base.channel; struct nouveau_grobj *eng3d = screen->eng3d; unsigned i; @@ -65,26 +65,26 @@ nv40_state_emit(struct nv40_context *nv40) /* XXX: race conditions */ - if (nv40 != screen->cur_ctx) { - for (i = 0; i < NV40_STATE_MAX; i++) { + if (nvfx != screen->cur_ctx) { + for (i = 0; i < NVFX_STATE_MAX; i++) { if (state->hw[i] && screen->state[i] != state->hw[i]) state->dirty |= (1ULL << i); } - screen->cur_ctx = nv40; + screen->cur_ctx = nvfx; } for (i = 0, states = state->dirty; states; i++) { if (!(states & (1ULL << i))) continue; - so_ref (state->hw[i], &nv40->screen->state[i]); + so_ref (state->hw[i], &nvfx->screen->state[i]); if (state->hw[i]) - so_emit(chan, nv40->screen->state[i]); + so_emit(chan, nvfx->screen->state[i]); states &= ~(1ULL << i); } - if (state->dirty & ((1ULL << NV40_STATE_FRAGPROG) | - (1ULL << NV40_STATE_FRAGTEX0))) { + if (state->dirty & ((1ULL << NVFX_STATE_FRAGPROG) | + (1ULL << NVFX_STATE_FRAGTEX0))) { BEGIN_RING(chan, eng3d, NV40TCL_TEX_CACHE_CTL, 1); OUT_RING (chan, 2); BEGIN_RING(chan, eng3d, NV40TCL_TEX_CACHE_CTL, 1); @@ -97,46 +97,46 @@ nv40_state_emit(struct nv40_context *nv40) void nv40_state_flush_notify(struct nouveau_channel *chan) { - struct nv40_context *nv40 = chan->user_private; - struct nv40_state *state = &nv40->state; + struct nvfx_context *nvfx = chan->user_private; + struct nvfx_state *state = &nvfx->state; unsigned i, samplers; - so_emit_reloc_markers(chan, state->hw[NV40_STATE_FB]); + so_emit_reloc_markers(chan, state->hw[NVFX_STATE_FB]); for (i = 0, samplers = state->fp_samplers; i < 16 && samplers; i++) { if (!(samplers & (1 << i))) continue; so_emit_reloc_markers(chan, - state->hw[NV40_STATE_FRAGTEX0+i]); + state->hw[NVFX_STATE_FRAGTEX0+i]); samplers &= ~(1ULL << i); } - so_emit_reloc_markers(chan, state->hw[NV40_STATE_FRAGPROG]); - if (state->hw[NV40_STATE_VTXBUF] && nv40->render_mode == HW) - so_emit_reloc_markers(chan, state->hw[NV40_STATE_VTXBUF]); + so_emit_reloc_markers(chan, state->hw[NVFX_STATE_FRAGPROG]); + if (state->hw[NVFX_STATE_VTXBUF] && nvfx->render_mode == HW) + so_emit_reloc_markers(chan, state->hw[NVFX_STATE_VTXBUF]); } boolean -nv40_state_validate(struct nv40_context *nv40) +nv40_state_validate(struct nvfx_context *nvfx) { - boolean was_sw = nv40->fallback_swtnl ? TRUE : FALSE; + boolean was_sw = nvfx->fallback_swtnl ? TRUE : FALSE; - if (nv40->render_mode != HW) { + if (nvfx->render_mode != HW) { /* Don't even bother trying to go back to hw if none * of the states that caused swtnl previously have changed. */ - if ((nv40->fallback_swtnl & nv40->dirty) - != nv40->fallback_swtnl) + if ((nvfx->fallback_swtnl & nvfx->dirty) + != nvfx->fallback_swtnl) return FALSE; /* Attempt to go to hwtnl again */ - nv40->pipe.flush(&nv40->pipe, 0, NULL); - nv40->dirty |= (NV40_NEW_VIEWPORT | - NV40_NEW_VERTPROG | - NV40_NEW_ARRAYS); - nv40->render_mode = HW; + nvfx->pipe.flush(&nvfx->pipe, 0, NULL); + nvfx->dirty |= (NVFX_NEW_VIEWPORT | + NVFX_NEW_VERTPROG | + NVFX_NEW_ARRAYS); + nvfx->render_mode = HW; } - nv40_state_do_validate(nv40, render_states); - if (nv40->fallback_swtnl || nv40->fallback_swrast) + nv40_state_do_validate(nvfx, render_states); + if (nvfx->fallback_swtnl || nvfx->fallback_swrast) return FALSE; if (was_sw) @@ -146,44 +146,44 @@ nv40_state_validate(struct nv40_context *nv40) } boolean -nv40_state_validate_swtnl(struct nv40_context *nv40) +nv40_state_validate_swtnl(struct nvfx_context *nvfx) { - struct draw_context *draw = nv40->draw; + struct draw_context *draw = nvfx->draw; /* Setup for swtnl */ - if (nv40->render_mode == HW) { - NOUVEAU_ERR("hw->swtnl 0x%08x\n", nv40->fallback_swtnl); - nv40->pipe.flush(&nv40->pipe, 0, NULL); - nv40->dirty |= (NV40_NEW_VIEWPORT | - NV40_NEW_VERTPROG | - NV40_NEW_ARRAYS); - nv40->render_mode = SWTNL; + if (nvfx->render_mode == HW) { + NOUVEAU_ERR("hw->swtnl 0x%08x\n", nvfx->fallback_swtnl); + nvfx->pipe.flush(&nvfx->pipe, 0, NULL); + nvfx->dirty |= (NVFX_NEW_VIEWPORT | + NVFX_NEW_VERTPROG | + NVFX_NEW_ARRAYS); + nvfx->render_mode = SWTNL; } - if (nv40->draw_dirty & NV40_NEW_VERTPROG) - draw_bind_vertex_shader(draw, nv40->vertprog->draw); + if (nvfx->draw_dirty & NVFX_NEW_VERTPROG) + draw_bind_vertex_shader(draw, nvfx->vertprog->draw); - if (nv40->draw_dirty & NV40_NEW_RAST) - draw_set_rasterizer_state(draw, &nv40->rasterizer->pipe); + if (nvfx->draw_dirty & NVFX_NEW_RAST) + draw_set_rasterizer_state(draw, &nvfx->rasterizer->pipe); - if (nv40->draw_dirty & NV40_NEW_UCP) - draw_set_clip_state(draw, &nv40->clip); + if (nvfx->draw_dirty & NVFX_NEW_UCP) + draw_set_clip_state(draw, &nvfx->clip); - if (nv40->draw_dirty & NV40_NEW_VIEWPORT) - draw_set_viewport_state(draw, &nv40->viewport); + if (nvfx->draw_dirty & NVFX_NEW_VIEWPORT) + draw_set_viewport_state(draw, &nvfx->viewport); - if (nv40->draw_dirty & NV40_NEW_ARRAYS) { - draw_set_vertex_buffers(draw, nv40->vtxbuf_nr, nv40->vtxbuf); - draw_set_vertex_elements(draw, nv40->vtxelt->num_elements, nv40->vtxelt->pipe); + if (nvfx->draw_dirty & NVFX_NEW_ARRAYS) { + draw_set_vertex_buffers(draw, nvfx->vtxbuf_nr, nvfx->vtxbuf); + draw_set_vertex_elements(draw, nvfx->vtxelt->num_elements, nvfx->vtxelt->pipe); } - nv40_state_do_validate(nv40, swtnl_states); - if (nv40->fallback_swrast) { - NOUVEAU_ERR("swtnl->swrast 0x%08x\n", nv40->fallback_swrast); + nv40_state_do_validate(nvfx, swtnl_states); + if (nvfx->fallback_swrast) { + NOUVEAU_ERR("swtnl->swrast 0x%08x\n", nvfx->fallback_swrast); return FALSE; } - nv40->draw_dirty = 0; + nvfx->draw_dirty = 0; return TRUE; } diff --git a/src/gallium/drivers/nv40/nv40_state_fb.c b/src/gallium/drivers/nv40/nv40_state_fb.c index 207b70923e..95735e40a3 100644 --- a/src/gallium/drivers/nv40/nv40_state_fb.c +++ b/src/gallium/drivers/nv40/nv40_state_fb.c @@ -4,18 +4,18 @@ static struct pipe_buffer * nv40_do_surface_buffer(struct pipe_surface *surface) { - struct nv40_miptree *mt = (struct nv40_miptree *)surface->texture; + struct nvfx_miptree *mt = (struct nvfx_miptree *)surface->texture; return mt->buffer; } #define nv40_surface_buffer(ps) nouveau_bo(nv40_do_surface_buffer(ps)) static boolean -nv40_state_framebuffer_validate(struct nv40_context *nv40) +nv40_state_framebuffer_validate(struct nvfx_context *nvfx) { - struct nouveau_channel *chan = nv40->screen->base.channel; - struct nouveau_grobj *eng3d = nv40->screen->eng3d; - struct pipe_framebuffer_state *fb = &nv40->framebuffer; + struct nouveau_channel *chan = nvfx->screen->base.channel; + struct nouveau_grobj *eng3d = nvfx->screen->eng3d; + struct pipe_framebuffer_state *fb = &nvfx->framebuffer; struct nv04_surface *rt[4], *zeta; uint32_t rt_enable, rt_format; int i, colour_format = 0, zeta_format = 0; @@ -161,15 +161,15 @@ nv40_state_framebuffer_validate(struct nv40_context *nv40) so_method(so, eng3d, 0x1d88, 1); so_data (so, (1 << 12) | h); - so_ref(so, &nv40->state.hw[NV40_STATE_FB]); + so_ref(so, &nvfx->state.hw[NVFX_STATE_FB]); so_ref(NULL, &so); return TRUE; } -struct nv40_state_entry nv40_state_framebuffer = { +struct nvfx_state_entry nv40_state_framebuffer = { .validate = nv40_state_framebuffer_validate, .dirty = { - .pipe = NV40_NEW_FB, - .hw = NV40_STATE_FB + .pipe = NVFX_NEW_FB, + .hw = NVFX_STATE_FB } }; diff --git a/src/gallium/drivers/nv40/nv40_state_rasterizer.c b/src/gallium/drivers/nv40/nv40_state_rasterizer.c index 9ecda5990f..d6136a26eb 100644 --- a/src/gallium/drivers/nv40/nv40_state_rasterizer.c +++ b/src/gallium/drivers/nv40/nv40_state_rasterizer.c @@ -1,17 +1,17 @@ #include "nv40_context.h" static boolean -nv40_state_rasterizer_validate(struct nv40_context *nv40) +nv40_state_rasterizer_validate(struct nvfx_context *nvfx) { - so_ref(nv40->rasterizer->so, - &nv40->state.hw[NV40_STATE_RAST]); + so_ref(nvfx->rasterizer->so, + &nvfx->state.hw[NVFX_STATE_RAST]); return TRUE; } -struct nv40_state_entry nv40_state_rasterizer = { +struct nvfx_state_entry nv40_state_rasterizer = { .validate = nv40_state_rasterizer_validate, .dirty = { - .pipe = NV40_NEW_RAST, - .hw = NV40_STATE_RAST + .pipe = NVFX_NEW_RAST, + .hw = NVFX_STATE_RAST } }; diff --git a/src/gallium/drivers/nv40/nv40_state_scissor.c b/src/gallium/drivers/nv40/nv40_state_scissor.c index dcb068d059..11ec5c0878 100644 --- a/src/gallium/drivers/nv40/nv40_state_scissor.c +++ b/src/gallium/drivers/nv40/nv40_state_scissor.c @@ -1,20 +1,20 @@ #include "nv40_context.h" static boolean -nv40_state_scissor_validate(struct nv40_context *nv40) +nv40_state_scissor_validate(struct nvfx_context *nvfx) { - struct pipe_rasterizer_state *rast = &nv40->rasterizer->pipe; - struct pipe_scissor_state *s = &nv40->scissor; + struct pipe_rasterizer_state *rast = &nvfx->rasterizer->pipe; + struct pipe_scissor_state *s = &nvfx->scissor; struct nouveau_stateobj *so; - if (nv40->state.hw[NV40_STATE_SCISSOR] && - (rast->scissor == 0 && nv40->state.scissor_enabled == 0)) + if (nvfx->state.hw[NVFX_STATE_SCISSOR] && + (rast->scissor == 0 && nvfx->state.scissor_enabled == 0)) return FALSE; - nv40->state.scissor_enabled = rast->scissor; + nvfx->state.scissor_enabled = rast->scissor; so = so_new(1, 2, 0); - so_method(so, nv40->screen->eng3d, NV34TCL_SCISSOR_HORIZ, 2); - if (nv40->state.scissor_enabled) { + so_method(so, nvfx->screen->eng3d, NV34TCL_SCISSOR_HORIZ, 2); + if (nvfx->state.scissor_enabled) { so_data (so, ((s->maxx - s->minx) << 16) | s->minx); so_data (so, ((s->maxy - s->miny) << 16) | s->miny); } else { @@ -22,15 +22,15 @@ nv40_state_scissor_validate(struct nv40_context *nv40) so_data (so, 4096 << 16); } - so_ref(so, &nv40->state.hw[NV40_STATE_SCISSOR]); + so_ref(so, &nvfx->state.hw[NVFX_STATE_SCISSOR]); so_ref(NULL, &so); return TRUE; } -struct nv40_state_entry nv40_state_scissor = { +struct nvfx_state_entry nv40_state_scissor = { .validate = nv40_state_scissor_validate, .dirty = { - .pipe = NV40_NEW_SCISSOR | NV40_NEW_RAST, - .hw = NV40_STATE_SCISSOR + .pipe = NVFX_NEW_SCISSOR | NVFX_NEW_RAST, + .hw = NVFX_STATE_SCISSOR } }; diff --git a/src/gallium/drivers/nv40/nv40_state_stipple.c b/src/gallium/drivers/nv40/nv40_state_stipple.c index 4514618772..e537e08e1d 100644 --- a/src/gallium/drivers/nv40/nv40_state_stipple.c +++ b/src/gallium/drivers/nv40/nv40_state_stipple.c @@ -1,14 +1,14 @@ #include "nv40_context.h" static boolean -nv40_state_stipple_validate(struct nv40_context *nv40) +nv40_state_stipple_validate(struct nvfx_context *nvfx) { - struct pipe_rasterizer_state *rast = &nv40->rasterizer->pipe; - struct nouveau_grobj *eng3d = nv40->screen->eng3d; + struct pipe_rasterizer_state *rast = &nvfx->rasterizer->pipe; + struct nouveau_grobj *eng3d = nvfx->screen->eng3d; struct nouveau_stateobj *so; - if (nv40->state.hw[NV40_STATE_STIPPLE] && - (rast->poly_stipple_enable == 0 && nv40->state.stipple_enabled == 0)) + if (nvfx->state.hw[NVFX_STATE_STIPPLE] && + (rast->poly_stipple_enable == 0 && nvfx->state.stipple_enabled == 0)) return FALSE; if (rast->poly_stipple_enable) { @@ -19,21 +19,21 @@ nv40_state_stipple_validate(struct nv40_context *nv40) so_data (so, 1); so_method(so, eng3d, NV34TCL_POLYGON_STIPPLE_PATTERN(0), 32); for (i = 0; i < 32; i++) - so_data(so, nv40->stipple[i]); + so_data(so, nvfx->stipple[i]); } else { so = so_new(1, 1, 0); so_method(so, eng3d, NV34TCL_POLYGON_STIPPLE_ENABLE, 1); so_data (so, 0); } - so_ref(so, &nv40->state.hw[NV40_STATE_STIPPLE]); + so_ref(so, &nvfx->state.hw[NVFX_STATE_STIPPLE]); return TRUE; } -struct nv40_state_entry nv40_state_stipple = { +struct nvfx_state_entry nv40_state_stipple = { .validate = nv40_state_stipple_validate, .dirty = { - .pipe = NV40_NEW_STIPPLE | NV40_NEW_RAST, - .hw = NV40_STATE_STIPPLE, + .pipe = NVFX_NEW_STIPPLE | NVFX_NEW_RAST, + .hw = NVFX_STATE_STIPPLE, } }; diff --git a/src/gallium/drivers/nv40/nv40_state_viewport.c b/src/gallium/drivers/nv40/nv40_state_viewport.c index 43cf6e5a0a..bf73e1119e 100644 --- a/src/gallium/drivers/nv40/nv40_state_viewport.c +++ b/src/gallium/drivers/nv40/nv40_state_viewport.c @@ -1,17 +1,17 @@ #include "nv40_context.h" static boolean -nv40_state_viewport_validate(struct nv40_context *nv40) +nv40_state_viewport_validate(struct nvfx_context *nvfx) { - struct pipe_viewport_state *vpt = &nv40->viewport; + struct pipe_viewport_state *vpt = &nvfx->viewport; struct nouveau_stateobj *so; - if (nv40->state.hw[NV40_STATE_VIEWPORT] && - !(nv40->dirty & NV40_NEW_VIEWPORT)) + if (nvfx->state.hw[NVFX_STATE_VIEWPORT] && + !(nvfx->dirty & NVFX_NEW_VIEWPORT)) return FALSE; so = so_new(2, 9, 0); - so_method(so, nv40->screen->eng3d, + so_method(so, nvfx->screen->eng3d, NV34TCL_VIEWPORT_TRANSLATE_X, 8); so_data (so, fui(vpt->translate[0])); so_data (so, fui(vpt->translate[1])); @@ -21,18 +21,18 @@ nv40_state_viewport_validate(struct nv40_context *nv40) so_data (so, fui(vpt->scale[1])); so_data (so, fui(vpt->scale[2])); so_data (so, fui(vpt->scale[3])); - so_method(so, nv40->screen->eng3d, 0x1d78, 1); + so_method(so, nvfx->screen->eng3d, 0x1d78, 1); so_data (so, 1); - so_ref(so, &nv40->state.hw[NV40_STATE_VIEWPORT]); + so_ref(so, &nvfx->state.hw[NVFX_STATE_VIEWPORT]); so_ref(NULL, &so); return TRUE; } -struct nv40_state_entry nv40_state_viewport = { +struct nvfx_state_entry nv40_state_viewport = { .validate = nv40_state_viewport_validate, .dirty = { - .pipe = NV40_NEW_VIEWPORT | NV40_NEW_RAST, - .hw = NV40_STATE_VIEWPORT + .pipe = NVFX_NEW_VIEWPORT | NVFX_NEW_RAST, + .hw = NVFX_STATE_VIEWPORT } }; diff --git a/src/gallium/drivers/nv40/nv40_state_zsa.c b/src/gallium/drivers/nv40/nv40_state_zsa.c index cb56948a1b..00facd520a 100644 --- a/src/gallium/drivers/nv40/nv40_state_zsa.c +++ b/src/gallium/drivers/nv40/nv40_state_zsa.c @@ -1,41 +1,41 @@ #include "nv40_context.h" static boolean -nv40_state_zsa_validate(struct nv40_context *nv40) +nv40_state_zsa_validate(struct nvfx_context *nvfx) { - so_ref(nv40->zsa->so, - &nv40->state.hw[NV40_STATE_ZSA]); + so_ref(nvfx->zsa->so, + &nvfx->state.hw[NVFX_STATE_ZSA]); return TRUE; } -struct nv40_state_entry nv40_state_zsa = { +struct nvfx_state_entry nv40_state_zsa = { .validate = nv40_state_zsa_validate, .dirty = { - .pipe = NV40_NEW_ZSA, - .hw = NV40_STATE_ZSA + .pipe = NVFX_NEW_ZSA, + .hw = NVFX_STATE_ZSA } }; static boolean -nv40_state_sr_validate(struct nv40_context *nv40) +nv40_state_sr_validate(struct nvfx_context *nvfx) { struct nouveau_stateobj *so = so_new(2, 2, 0); - struct pipe_stencil_ref *sr = &nv40->stencil_ref; + struct pipe_stencil_ref *sr = &nvfx->stencil_ref; - so_method(so, nv40->screen->eng3d, NV34TCL_STENCIL_FRONT_FUNC_REF, 1); + so_method(so, nvfx->screen->eng3d, NV34TCL_STENCIL_FRONT_FUNC_REF, 1); so_data (so, sr->ref_value[0]); - so_method(so, nv40->screen->eng3d, NV34TCL_STENCIL_BACK_FUNC_REF, 1); + so_method(so, nvfx->screen->eng3d, NV34TCL_STENCIL_BACK_FUNC_REF, 1); so_data (so, sr->ref_value[1]); - so_ref(so, &nv40->state.hw[NV40_STATE_SR]); + so_ref(so, &nvfx->state.hw[NVFX_STATE_SR]); so_ref(NULL, &so); return TRUE; } -struct nv40_state_entry nv40_state_sr = { +struct nvfx_state_entry nv40_state_sr = { .validate = nv40_state_sr_validate, .dirty = { - .pipe = NV40_NEW_SR, - .hw = NV40_STATE_SR + .pipe = NVFX_NEW_SR, + .hw = NVFX_STATE_SR } }; diff --git a/src/gallium/drivers/nv40/nv40_surface.c b/src/gallium/drivers/nv40/nv40_surface.c index 02ecfd7bbb..328c23b8b4 100644 --- a/src/gallium/drivers/nv40/nv40_surface.c +++ b/src/gallium/drivers/nv40/nv40_surface.c @@ -39,8 +39,8 @@ nv40_surface_copy(struct pipe_context *pipe, struct pipe_surface *src, unsigned srcx, unsigned srcy, unsigned width, unsigned height) { - struct nv40_context *nv40 = nv40_context(pipe); - struct nv04_surface_2d *eng2d = nv40->screen->eng2d; + struct nvfx_context *nvfx = nvfx_context(pipe); + struct nv04_surface_2d *eng2d = nvfx->screen->eng2d; eng2d->copy(eng2d, dest, destx, desty, src, srcx, srcy, width, height); } @@ -50,15 +50,15 @@ nv40_surface_fill(struct pipe_context *pipe, struct pipe_surface *dest, unsigned destx, unsigned desty, unsigned width, unsigned height, unsigned value) { - struct nv40_context *nv40 = nv40_context(pipe); - struct nv04_surface_2d *eng2d = nv40->screen->eng2d; + struct nvfx_context *nvfx = nvfx_context(pipe); + struct nv04_surface_2d *eng2d = nvfx->screen->eng2d; eng2d->fill(eng2d, dest, destx, desty, width, height, value); } void -nv40_init_surface_functions(struct nv40_context *nv40) +nv40_init_surface_functions(struct nvfx_context *nvfx) { - nv40->pipe.surface_copy = nv40_surface_copy; - nv40->pipe.surface_fill = nv40_surface_fill; + nvfx->pipe.surface_copy = nv40_surface_copy; + nvfx->pipe.surface_fill = nv40_surface_fill; } diff --git a/src/gallium/drivers/nv40/nv40_transfer.c b/src/gallium/drivers/nv40/nv40_transfer.c index c552a68113..3d8c8e8c78 100644 --- a/src/gallium/drivers/nv40/nv40_transfer.c +++ b/src/gallium/drivers/nv40/nv40_transfer.c @@ -6,8 +6,8 @@ #include "util/u_math.h" #include "nouveau/nouveau_winsys.h" #include "nv40_context.h" -#include "nv40_screen.h" -#include "nv40_state.h" +#include "nvfx_screen.h" +#include "nvfx_state.h" struct nv40_transfer { struct pipe_transfer base; @@ -39,7 +39,7 @@ nv40_transfer_new(struct pipe_context *pcontext, struct pipe_texture *pt, unsigned x, unsigned y, unsigned w, unsigned h) { struct pipe_screen *pscreen = pcontext->screen; - struct nv40_miptree *mt = (struct nv40_miptree *)pt; + struct nvfx_miptree *mt = (struct nvfx_miptree *)pt; struct nv40_transfer *tx; struct pipe_texture tx_tex_template, *tx_tex; @@ -81,7 +81,7 @@ nv40_transfer_new(struct pipe_context *pcontext, struct pipe_texture *pt, return NULL; } - tx->base.stride = ((struct nv40_miptree*)tx_tex)->level[0].pitch; + tx->base.stride = ((struct nvfx_miptree*)tx_tex)->level[0].pitch; tx->surface = pscreen->get_tex_surface(pscreen, tx_tex, 0, 0, 0, @@ -97,7 +97,7 @@ nv40_transfer_new(struct pipe_context *pcontext, struct pipe_texture *pt, } if (usage & PIPE_TRANSFER_READ) { - struct nv40_screen *nvscreen = nv40_screen(pscreen); + struct nvfx_screen *nvscreen = nvfx_screen(pscreen); struct pipe_surface *src; src = pscreen->get_tex_surface(pscreen, pt, @@ -124,7 +124,7 @@ nv40_transfer_del(struct pipe_context *pcontext, struct pipe_transfer *ptx) if (!tx->direct && (ptx->usage & PIPE_TRANSFER_WRITE)) { struct pipe_screen *pscreen = pcontext->screen; - struct nv40_screen *nvscreen = nv40_screen(pscreen); + struct nvfx_screen *nvscreen = nvfx_screen(pscreen); struct pipe_surface *dst; dst = pscreen->get_tex_surface(pscreen, ptx->texture, @@ -151,7 +151,7 @@ nv40_transfer_map(struct pipe_context *pcontext, struct pipe_transfer *ptx) struct pipe_screen *pscreen = pcontext->screen; struct nv40_transfer *tx = (struct nv40_transfer *)ptx; struct nv04_surface *ns = (struct nv04_surface *)tx->surface; - struct nv40_miptree *mt = (struct nv40_miptree *)tx->surface->texture; + struct nvfx_miptree *mt = (struct nvfx_miptree *)tx->surface->texture; void *map = pipe_buffer_map(pscreen, mt->buffer, pipe_transfer_buffer_flags(ptx)); @@ -166,16 +166,16 @@ nv40_transfer_unmap(struct pipe_context *pcontext, struct pipe_transfer *ptx) { struct pipe_screen *pscreen = pcontext->screen; struct nv40_transfer *tx = (struct nv40_transfer *)ptx; - struct nv40_miptree *mt = (struct nv40_miptree *)tx->surface->texture; + struct nvfx_miptree *mt = (struct nvfx_miptree *)tx->surface->texture; pipe_buffer_unmap(pscreen, mt->buffer); } void -nv40_init_transfer_functions(struct nv40_context *nv40) +nv40_init_transfer_functions(struct nvfx_context *nvfx) { - nv40->pipe.get_tex_transfer = nv40_transfer_new; - nv40->pipe.tex_transfer_destroy = nv40_transfer_del; - nv40->pipe.transfer_map = nv40_transfer_map; - nv40->pipe.transfer_unmap = nv40_transfer_unmap; + nvfx->pipe.get_tex_transfer = nv40_transfer_new; + nvfx->pipe.tex_transfer_destroy = nv40_transfer_del; + nvfx->pipe.transfer_map = nv40_transfer_map; + nvfx->pipe.transfer_unmap = nv40_transfer_unmap; } diff --git a/src/gallium/drivers/nv40/nv40_vbo.c b/src/gallium/drivers/nv40/nv40_vbo.c index b77c9e924b..0738d5c93b 100644 --- a/src/gallium/drivers/nv40/nv40_vbo.c +++ b/src/gallium/drivers/nv40/nv40_vbo.c @@ -4,7 +4,7 @@ #include "util/u_format.h" #include "nv40_context.h" -#include "nv40_state.h" +#include "nvfx_state.h" #include "nouveau/nouveau_channel.h" #include "nouveau/nouveau_pushbuf.h" @@ -69,15 +69,15 @@ nv40_vbo_format_to_hw(enum pipe_format pipe, unsigned *fmt, unsigned *ncomp) } static boolean -nv40_vbo_set_idxbuf(struct nv40_context *nv40, struct pipe_buffer *ib, +nv40_vbo_set_idxbuf(struct nvfx_context *nvfx, struct pipe_buffer *ib, unsigned ib_size) { - struct pipe_screen *pscreen = &nv40->screen->base.base; + struct pipe_screen *pscreen = &nvfx->screen->base.base; unsigned type; if (!ib) { - nv40->idxbuf = NULL; - nv40->idxbuf_format = 0xdeadbeef; + nvfx->idxbuf = NULL; + nvfx->idxbuf_format = 0xdeadbeef; return FALSE; } @@ -95,23 +95,23 @@ nv40_vbo_set_idxbuf(struct nv40_context *nv40, struct pipe_buffer *ib, return FALSE; } - if (ib != nv40->idxbuf || - type != nv40->idxbuf_format) { - nv40->dirty |= NV40_NEW_ARRAYS; - nv40->idxbuf = ib; - nv40->idxbuf_format = type; + if (ib != nvfx->idxbuf || + type != nvfx->idxbuf_format) { + nvfx->dirty |= NVFX_NEW_ARRAYS; + nvfx->idxbuf = ib; + nvfx->idxbuf_format = type; } return TRUE; } static boolean -nv40_vbo_static_attrib(struct nv40_context *nv40, struct nouveau_stateobj *so, +nv40_vbo_static_attrib(struct nvfx_context *nvfx, struct nouveau_stateobj *so, int attrib, struct pipe_vertex_element *ve, struct pipe_vertex_buffer *vb) { - struct pipe_screen *pscreen = nv40->pipe.screen; - struct nouveau_grobj *eng3d = nv40->screen->eng3d; + struct pipe_screen *pscreen = nvfx->pipe.screen; + struct nouveau_grobj *eng3d = nvfx->screen->eng3d; unsigned type, ncomp; void *map; @@ -169,14 +169,14 @@ void nv40_draw_arrays(struct pipe_context *pipe, unsigned mode, unsigned start, unsigned count) { - struct nv40_context *nv40 = nv40_context(pipe); - struct nv40_screen *screen = nv40->screen; + struct nvfx_context *nvfx = nvfx_context(pipe); + struct nvfx_screen *screen = nvfx->screen; struct nouveau_channel *chan = screen->base.channel; struct nouveau_grobj *eng3d = screen->eng3d; unsigned restart; - nv40_vbo_set_idxbuf(nv40, NULL, 0); - if (FORCE_SWTNL || !nv40_state_validate(nv40)) { + nv40_vbo_set_idxbuf(nvfx, NULL, 0); + if (FORCE_SWTNL || !nv40_state_validate(nvfx)) { nv40_draw_elements_swtnl(pipe, NULL, 0, mode, start, count); return; @@ -185,7 +185,7 @@ nv40_draw_arrays(struct pipe_context *pipe, while (count) { unsigned vc, nr; - nv40_state_emit(nv40); + nv40_state_emit(nvfx); vc = nouveau_vbuf_split(AVAIL_RING(chan), 6, 256, mode, start, count, &restart); @@ -228,10 +228,10 @@ nv40_draw_arrays(struct pipe_context *pipe, } static INLINE void -nv40_draw_elements_u08(struct nv40_context *nv40, void *ib, +nv40_draw_elements_u08(struct nvfx_context *nvfx, void *ib, unsigned mode, unsigned start, unsigned count) { - struct nv40_screen *screen = nv40->screen; + struct nvfx_screen *screen = nvfx->screen; struct nouveau_channel *chan = screen->base.channel; struct nouveau_grobj *eng3d = screen->eng3d; @@ -239,7 +239,7 @@ nv40_draw_elements_u08(struct nv40_context *nv40, void *ib, uint8_t *elts = (uint8_t *)ib + start; unsigned vc, push, restart; - nv40_state_emit(nv40); + nv40_state_emit(nvfx); vc = nouveau_vbuf_split(AVAIL_RING(chan), 6, 2, mode, start, count, &restart); @@ -279,10 +279,10 @@ nv40_draw_elements_u08(struct nv40_context *nv40, void *ib, } static INLINE void -nv40_draw_elements_u16(struct nv40_context *nv40, void *ib, +nv40_draw_elements_u16(struct nvfx_context *nvfx, void *ib, unsigned mode, unsigned start, unsigned count) { - struct nv40_screen *screen = nv40->screen; + struct nvfx_screen *screen = nvfx->screen; struct nouveau_channel *chan = screen->base.channel; struct nouveau_grobj *eng3d = screen->eng3d; @@ -290,7 +290,7 @@ nv40_draw_elements_u16(struct nv40_context *nv40, void *ib, uint16_t *elts = (uint16_t *)ib + start; unsigned vc, push, restart; - nv40_state_emit(nv40); + nv40_state_emit(nvfx); vc = nouveau_vbuf_split(AVAIL_RING(chan), 6, 2, mode, start, count, &restart); @@ -330,10 +330,10 @@ nv40_draw_elements_u16(struct nv40_context *nv40, void *ib, } static INLINE void -nv40_draw_elements_u32(struct nv40_context *nv40, void *ib, +nv40_draw_elements_u32(struct nvfx_context *nvfx, void *ib, unsigned mode, unsigned start, unsigned count) { - struct nv40_screen *screen = nv40->screen; + struct nvfx_screen *screen = nvfx->screen; struct nouveau_channel *chan = screen->base.channel; struct nouveau_grobj *eng3d = screen->eng3d; @@ -341,7 +341,7 @@ nv40_draw_elements_u32(struct nv40_context *nv40, void *ib, uint32_t *elts = (uint32_t *)ib + start; unsigned vc, push, restart; - nv40_state_emit(nv40); + nv40_state_emit(nvfx); vc = nouveau_vbuf_split(AVAIL_RING(chan), 5, 1, mode, start, count, &restart); @@ -376,7 +376,7 @@ nv40_draw_elements_inline(struct pipe_context *pipe, struct pipe_buffer *ib, unsigned ib_size, unsigned mode, unsigned start, unsigned count) { - struct nv40_context *nv40 = nv40_context(pipe); + struct nvfx_context *nvfx = nvfx_context(pipe); struct pipe_screen *pscreen = pipe->screen; void *map; @@ -388,13 +388,13 @@ nv40_draw_elements_inline(struct pipe_context *pipe, switch (ib_size) { case 1: - nv40_draw_elements_u08(nv40, map, mode, start, count); + nv40_draw_elements_u08(nvfx, map, mode, start, count); break; case 2: - nv40_draw_elements_u16(nv40, map, mode, start, count); + nv40_draw_elements_u16(nvfx, map, mode, start, count); break; case 4: - nv40_draw_elements_u32(nv40, map, mode, start, count); + nv40_draw_elements_u32(nvfx, map, mode, start, count); break; default: NOUVEAU_ERR("invalid idxbuf fmt %d\n", ib_size); @@ -408,8 +408,8 @@ static void nv40_draw_elements_vbo(struct pipe_context *pipe, unsigned mode, unsigned start, unsigned count) { - struct nv40_context *nv40 = nv40_context(pipe); - struct nv40_screen *screen = nv40->screen; + struct nvfx_context *nvfx = nvfx_context(pipe); + struct nvfx_screen *screen = nvfx->screen; struct nouveau_channel *chan = screen->base.channel; struct nouveau_grobj *eng3d = screen->eng3d; unsigned restart; @@ -417,7 +417,7 @@ nv40_draw_elements_vbo(struct pipe_context *pipe, while (count) { unsigned nr, vc; - nv40_state_emit(nv40); + nv40_state_emit(nvfx); vc = nouveau_vbuf_split(AVAIL_RING(chan), 6, 256, mode, start, count, &restart); @@ -462,11 +462,11 @@ nv40_draw_elements(struct pipe_context *pipe, struct pipe_buffer *indexBuffer, unsigned indexSize, unsigned mode, unsigned start, unsigned count) { - struct nv40_context *nv40 = nv40_context(pipe); + struct nvfx_context *nvfx = nvfx_context(pipe); boolean idxbuf; - idxbuf = nv40_vbo_set_idxbuf(nv40, indexBuffer, indexSize); - if (FORCE_SWTNL || !nv40_state_validate(nv40)) { + idxbuf = nv40_vbo_set_idxbuf(nvfx, indexBuffer, indexSize); + if (FORCE_SWTNL || !nv40_state_validate(nvfx)) { nv40_draw_elements_swtnl(pipe, NULL, 0, mode, start, count); return; @@ -483,33 +483,33 @@ nv40_draw_elements(struct pipe_context *pipe, } static boolean -nv40_vbo_validate(struct nv40_context *nv40) +nv40_vbo_validate(struct nvfx_context *nvfx) { struct nouveau_stateobj *vtxbuf, *vtxfmt, *sattr = NULL; - struct nouveau_grobj *eng3d = nv40->screen->eng3d; - struct pipe_buffer *ib = nv40->idxbuf; - unsigned ib_format = nv40->idxbuf_format; + struct nouveau_grobj *eng3d = nvfx->screen->eng3d; + struct pipe_buffer *ib = nvfx->idxbuf; + unsigned ib_format = nvfx->idxbuf_format; unsigned vb_flags = NOUVEAU_BO_VRAM | NOUVEAU_BO_GART | NOUVEAU_BO_RD; int hw; vtxbuf = so_new(3, 17, 18); - so_method(vtxbuf, eng3d, NV34TCL_VTXBUF_ADDRESS(0), nv40->vtxelt->num_elements); + so_method(vtxbuf, eng3d, NV34TCL_VTXBUF_ADDRESS(0), nvfx->vtxelt->num_elements); vtxfmt = so_new(1, 16, 0); - so_method(vtxfmt, eng3d, NV34TCL_VTXFMT(0), nv40->vtxelt->num_elements); + so_method(vtxfmt, eng3d, NV34TCL_VTXFMT(0), nvfx->vtxelt->num_elements); - for (hw = 0; hw < nv40->vtxelt->num_elements; hw++) { + for (hw = 0; hw < nvfx->vtxelt->num_elements; hw++) { struct pipe_vertex_element *ve; struct pipe_vertex_buffer *vb; unsigned type, ncomp; - ve = &nv40->vtxelt->pipe[hw]; - vb = &nv40->vtxbuf[ve->vertex_buffer_index]; + ve = &nvfx->vtxelt->pipe[hw]; + vb = &nvfx->vtxbuf[ve->vertex_buffer_index]; if (!vb->stride) { if (!sattr) sattr = so_new(16, 16 * 4, 0); - if (nv40_vbo_static_attrib(nv40, sattr, hw, ve, vb)) { + if (nv40_vbo_static_attrib(nvfx, sattr, hw, ve, vb)) { so_data(vtxbuf, 0); so_data(vtxfmt, NV34TCL_VTXFMT_TYPE_FLOAT); continue; @@ -517,7 +517,7 @@ nv40_vbo_validate(struct nv40_context *nv40) } if (nv40_vbo_format_to_hw(ve->src_format, &type, &ncomp)) { - nv40->fallback_swtnl |= NV40_NEW_ARRAYS; + nvfx->fallback_swtnl |= NVFX_NEW_ARRAYS; so_ref(NULL, &vtxbuf); so_ref(NULL, &vtxfmt); return FALSE; @@ -543,22 +543,22 @@ nv40_vbo_validate(struct nv40_context *nv40) so_method(vtxbuf, eng3d, 0x1710, 1); so_data (vtxbuf, 0); - so_ref(vtxbuf, &nv40->state.hw[NV40_STATE_VTXBUF]); + so_ref(vtxbuf, &nvfx->state.hw[NVFX_STATE_VTXBUF]); so_ref(NULL, &vtxbuf); - nv40->state.dirty |= (1ULL << NV40_STATE_VTXBUF); - so_ref(vtxfmt, &nv40->state.hw[NV40_STATE_VTXFMT]); + nvfx->state.dirty |= (1ULL << NVFX_STATE_VTXBUF); + so_ref(vtxfmt, &nvfx->state.hw[NVFX_STATE_VTXFMT]); so_ref(NULL, &vtxfmt); - nv40->state.dirty |= (1ULL << NV40_STATE_VTXFMT); - so_ref(sattr, &nv40->state.hw[NV40_STATE_VTXATTR]); + nvfx->state.dirty |= (1ULL << NVFX_STATE_VTXFMT); + so_ref(sattr, &nvfx->state.hw[NVFX_STATE_VTXATTR]); so_ref(NULL, &sattr); - nv40->state.dirty |= (1ULL << NV40_STATE_VTXATTR); + nvfx->state.dirty |= (1ULL << NVFX_STATE_VTXATTR); return FALSE; } -struct nv40_state_entry nv40_state_vbo = { +struct nvfx_state_entry nv40_state_vbo = { .validate = nv40_vbo_validate, .dirty = { - .pipe = NV40_NEW_ARRAYS, + .pipe = NVFX_NEW_ARRAYS, .hw = 0, } }; diff --git a/src/gallium/drivers/nv40/nv40_vertprog.c b/src/gallium/drivers/nv40/nv40_vertprog.c index 96f2743429..a199f0766e 100644 --- a/src/gallium/drivers/nv40/nv40_vertprog.c +++ b/src/gallium/drivers/nv40/nv40_vertprog.c @@ -8,7 +8,7 @@ #include "tgsi/tgsi_util.h" #include "nv40_context.h" -#include "nv40_state.h" +#include "nvfx_state.h" /* TODO (at least...): * 1. Indexed consts + ARL @@ -41,9 +41,9 @@ #define NV40_VP_INST_DEST_CLIP(n) ((~0 - 6) + (n)) struct nv40_vpc { - struct nv40_vertex_program *vp; + struct nvfx_vertex_program *vp; - struct nv40_vertex_program_exec *vpi; + struct nvfx_vertex_program_exec *vpi; unsigned r_temps; unsigned r_temps_discard; @@ -83,8 +83,8 @@ release_temps(struct nv40_vpc *vpc) static struct nv40_sreg constant(struct nv40_vpc *vpc, int pipe, float x, float y, float z, float w) { - struct nv40_vertex_program *vp = vpc->vp; - struct nv40_vertex_program_data *vpd; + struct nvfx_vertex_program *vp = vpc->vp; + struct nvfx_vertex_program_data *vpd; int idx; if (pipe >= 0) { @@ -112,7 +112,7 @@ constant(struct nv40_vpc *vpc, int pipe, float x, float y, float z, float w) static void emit_src(struct nv40_vpc *vpc, uint32_t *hw, int pos, struct nv40_sreg src) { - struct nv40_vertex_program *vp = vpc->vp; + struct nvfx_vertex_program *vp = vpc->vp; uint32_t sr = 0; switch (src.type) { @@ -176,7 +176,7 @@ emit_src(struct nv40_vpc *vpc, uint32_t *hw, int pos, struct nv40_sreg src) static void emit_dst(struct nv40_vpc *vpc, uint32_t *hw, int slot, struct nv40_sreg dst) { - struct nv40_vertex_program *vp = vpc->vp; + struct nvfx_vertex_program *vp = vpc->vp; switch (dst.type) { case NV40SR_TEMP: @@ -259,7 +259,7 @@ nv40_vp_arith(struct nv40_vpc *vpc, int slot, int op, struct nv40_sreg s0, struct nv40_sreg s1, struct nv40_sreg s2) { - struct nv40_vertex_program *vp = vpc->vp; + struct nvfx_vertex_program *vp = vpc->vp; uint32_t *hw; vp->insns = realloc(vp->insns, ++vp->nr_insns * sizeof(*vpc->vpi)); @@ -723,8 +723,8 @@ nv40_vertprog_prepare(struct nv40_vpc *vpc) } static void -nv40_vertprog_translate(struct nv40_context *nv40, - struct nv40_vertex_program *vp) +nv40_vertprog_translate(struct nvfx_context *nvfx, + struct nvfx_vertex_program *vp) { struct tgsi_parse_context parse; struct nv40_vpc *vpc = NULL; @@ -798,10 +798,10 @@ nv40_vertprog_translate(struct nv40_context *nv40, struct nv40_sreg cdst = nv40_sr(NV40SR_OUTPUT, NV40_VP_INST_DEST_CLIP(i)); struct nv40_sreg ceqn = constant(vpc, -1, - nv40->clip.ucp[i][0], - nv40->clip.ucp[i][1], - nv40->clip.ucp[i][2], - nv40->clip.ucp[i][3]); + nvfx->clip.ucp[i][0], + nvfx->clip.ucp[i][1], + nvfx->clip.ucp[i][2], + nvfx->clip.ucp[i][3]); struct nv40_sreg htmp = vpc->r_result[vpc->hpos_idx]; unsigned mask; @@ -831,28 +831,28 @@ out_err: } static boolean -nv40_vertprog_validate(struct nv40_context *nv40) +nv40_vertprog_validate(struct nvfx_context *nvfx) { - struct pipe_screen *pscreen = nv40->pipe.screen; - struct nv40_screen *screen = nv40->screen; + struct pipe_screen *pscreen = nvfx->pipe.screen; + struct nvfx_screen *screen = nvfx->screen; struct nouveau_channel *chan = screen->base.channel; struct nouveau_grobj *eng3d = screen->eng3d; - struct nv40_vertex_program *vp; + struct nvfx_vertex_program *vp; struct pipe_buffer *constbuf; boolean upload_code = FALSE, upload_data = FALSE; int i; - if (nv40->render_mode == HW) { - vp = nv40->vertprog; - constbuf = nv40->constbuf[PIPE_SHADER_VERTEX]; + if (nvfx->render_mode == HW) { + vp = nvfx->vertprog; + constbuf = nvfx->constbuf[PIPE_SHADER_VERTEX]; - if ((nv40->dirty & NV40_NEW_UCP) || - memcmp(&nv40->clip, &vp->ucp, sizeof(vp->ucp))) { - nv40_vertprog_destroy(nv40, vp); - memcpy(&vp->ucp, &nv40->clip, sizeof(vp->ucp)); + if ((nvfx->dirty & NVFX_NEW_UCP) || + memcmp(&nvfx->clip, &vp->ucp, sizeof(vp->ucp))) { + nv40_vertprog_destroy(nvfx, vp); + memcpy(&vp->ucp, &nvfx->clip, sizeof(vp->ucp)); } } else { - vp = nv40->swtnl.vertprog; + vp = nvfx->swtnl.vertprog; constbuf = NULL; } @@ -860,23 +860,23 @@ nv40_vertprog_validate(struct nv40_context *nv40) if (vp->translated) goto check_gpu_resources; - nv40->fallback_swtnl &= ~NV40_NEW_VERTPROG; - nv40_vertprog_translate(nv40, vp); + nvfx->fallback_swtnl &= ~NVFX_NEW_VERTPROG; + nv40_vertprog_translate(nvfx, vp); if (!vp->translated) { - nv40->fallback_swtnl |= NV40_NEW_VERTPROG; + nvfx->fallback_swtnl |= NVFX_NEW_VERTPROG; return FALSE; } check_gpu_resources: /* Allocate hw vtxprog exec slots */ if (!vp->exec) { - struct nouveau_resource *heap = nv40->screen->vp_exec_heap; + struct nouveau_resource *heap = nvfx->screen->vp_exec_heap; struct nouveau_stateobj *so; uint vplen = vp->nr_insns; if (nouveau_resource_alloc(heap, vplen, vp, &vp->exec)) { while (heap->next && heap->size < vplen) { - struct nv40_vertex_program *evict; + struct nvfx_vertex_program *evict; evict = heap->next->priv; nouveau_resource_free(&evict->exec); @@ -902,11 +902,11 @@ check_gpu_resources: /* Allocate hw vtxprog const slots */ if (vp->nr_consts && !vp->data) { - struct nouveau_resource *heap = nv40->screen->vp_data_heap; + struct nouveau_resource *heap = nvfx->screen->vp_data_heap; if (nouveau_resource_alloc(heap, vp->nr_consts, vp, &vp->data)) { while (heap->next && heap->size < vp->nr_consts) { - struct nv40_vertex_program *evict; + struct nvfx_vertex_program *evict; evict = heap->next->priv; nouveau_resource_free(&evict->data); @@ -929,7 +929,7 @@ check_gpu_resources: */ if (vp->exec_start != vp->exec->start) { for (i = 0; i < vp->nr_insns; i++) { - struct nv40_vertex_program_exec *vpi = &vp->insns[i]; + struct nvfx_vertex_program_exec *vpi = &vp->insns[i]; if (vpi->has_branch_offset) { assert(0); @@ -941,7 +941,7 @@ check_gpu_resources: if (vp->nr_consts && vp->data_start != vp->data->start) { for (i = 0; i < vp->nr_insns; i++) { - struct nv40_vertex_program_exec *vpi = &vp->insns[i]; + struct nvfx_vertex_program_exec *vpi = &vp->insns[i]; if (vpi->const_index >= 0) { vpi->data[1] &= ~NV40_VP_INST_CONST_SRC_MASK; @@ -965,7 +965,7 @@ check_gpu_resources: } for (i = 0; i < vp->nr_consts; i++) { - struct nv40_vertex_program_data *vpd = &vp->consts[i]; + struct nvfx_vertex_program_data *vpd = &vp->consts[i]; if (vpd->index >= 0) { if (!upload_data && @@ -1003,8 +1003,8 @@ check_gpu_resources: } } - if (vp->so != nv40->state.hw[NV40_STATE_VERTPROG]) { - so_ref(vp->so, &nv40->state.hw[NV40_STATE_VERTPROG]); + if (vp->so != nvfx->state.hw[NVFX_STATE_VERTPROG]) { + so_ref(vp->so, &nvfx->state.hw[NVFX_STATE_VERTPROG]); return TRUE; } @@ -1012,7 +1012,7 @@ check_gpu_resources: } void -nv40_vertprog_destroy(struct nv40_context *nv40, struct nv40_vertex_program *vp) +nv40_vertprog_destroy(struct nvfx_context *nvfx, struct nvfx_vertex_program *vp) { vp->translated = FALSE; @@ -1038,11 +1038,11 @@ nv40_vertprog_destroy(struct nv40_context *nv40, struct nv40_vertex_program *vp) so_ref(NULL, &vp->so); } -struct nv40_state_entry nv40_state_vertprog = { +struct nvfx_state_entry nv40_state_vertprog = { .validate = nv40_vertprog_validate, .dirty = { - .pipe = NV40_NEW_VERTPROG | NV40_NEW_UCP, - .hw = NV40_STATE_VERTPROG, + .pipe = NVFX_NEW_VERTPROG | NVFX_NEW_UCP, + .hw = NVFX_STATE_VERTPROG, } }; diff --git a/src/gallium/drivers/nvfx/nvfx_context.h b/src/gallium/drivers/nvfx/nvfx_context.h new file mode 100644 index 0000000000..9e89d8409f --- /dev/null +++ b/src/gallium/drivers/nvfx/nvfx_context.h @@ -0,0 +1,182 @@ +#ifndef __NVFX_CONTEXT_H__ +#define __NVFX_CONTEXT_H__ + +#include + +#include "pipe/p_context.h" +#include "pipe/p_defines.h" +#include "pipe/p_state.h" +#include "pipe/p_compiler.h" + +#include "util/u_memory.h" +#include "util/u_math.h" +#include "util/u_inlines.h" + +#include "draw/draw_vertex.h" + +#include "nouveau/nouveau_winsys.h" +#include "nouveau/nouveau_gldefs.h" +#include "nouveau/nouveau_context.h" +#include "nouveau/nouveau_stateobj.h" + +#include "nvfx_state.h" + +#define NOUVEAU_ERR(fmt, args...) \ + fprintf(stderr, "%s:%d - "fmt, __func__, __LINE__, ##args); +#define NOUVEAU_MSG(fmt, args...) \ + fprintf(stderr, "nouveau: "fmt, ##args); + +enum nvfx_state_index { + NVFX_STATE_FB = 0, + NVFX_STATE_VIEWPORT = 1, + NVFX_STATE_BLEND = 2, + NVFX_STATE_RAST = 3, + NVFX_STATE_ZSA = 4, + NVFX_STATE_BCOL = 5, + NVFX_STATE_CLIP = 6, + NVFX_STATE_SCISSOR = 7, + NVFX_STATE_STIPPLE = 8, + NVFX_STATE_FRAGPROG = 9, + NVFX_STATE_VERTPROG = 10, + NVFX_STATE_FRAGTEX0 = 11, + NVFX_STATE_FRAGTEX1 = 12, + NVFX_STATE_FRAGTEX2 = 13, + NVFX_STATE_FRAGTEX3 = 14, + NVFX_STATE_FRAGTEX4 = 15, + NVFX_STATE_FRAGTEX5 = 16, + NVFX_STATE_FRAGTEX6 = 17, + NVFX_STATE_FRAGTEX7 = 18, + NVFX_STATE_FRAGTEX8 = 19, + NVFX_STATE_FRAGTEX9 = 20, + NVFX_STATE_FRAGTEX10 = 21, + NVFX_STATE_FRAGTEX11 = 22, + NVFX_STATE_FRAGTEX12 = 23, + NVFX_STATE_FRAGTEX13 = 24, + NVFX_STATE_FRAGTEX14 = 25, + NVFX_STATE_FRAGTEX15 = 26, + NVFX_STATE_VERTTEX0 = 27, + NVFX_STATE_VERTTEX1 = 28, + NVFX_STATE_VERTTEX2 = 29, + NVFX_STATE_VERTTEX3 = 30, + NVFX_STATE_VTXBUF = 31, + NVFX_STATE_VTXFMT = 32, + NVFX_STATE_VTXATTR = 33, + NVFX_STATE_SR = 34, + NVFX_STATE_MAX = 35 +}; + +#include "nvfx_screen.h" + +#define NVFX_NEW_BLEND (1 << 0) +#define NVFX_NEW_RAST (1 << 1) +#define NVFX_NEW_ZSA (1 << 2) +#define NVFX_NEW_SAMPLER (1 << 3) +#define NVFX_NEW_FB (1 << 4) +#define NVFX_NEW_STIPPLE (1 << 5) +#define NVFX_NEW_SCISSOR (1 << 6) +#define NVFX_NEW_VIEWPORT (1 << 7) +#define NVFX_NEW_BCOL (1 << 8) +#define NVFX_NEW_VERTPROG (1 << 9) +#define NVFX_NEW_FRAGPROG (1 << 10) +#define NVFX_NEW_ARRAYS (1 << 11) +#define NVFX_NEW_UCP (1 << 12) +#define NVFX_NEW_SR (1 << 13) + +struct nvfx_rasterizer_state { + struct pipe_rasterizer_state pipe; + struct nouveau_stateobj *so; +}; + +struct nvfx_zsa_state { + struct pipe_depth_stencil_alpha_state pipe; + struct nouveau_stateobj *so; +}; + +struct nvfx_blend_state { + struct pipe_blend_state pipe; + struct nouveau_stateobj *so; +}; + + +struct nvfx_state { + unsigned scissor_enabled; + unsigned stipple_enabled; + unsigned fp_samplers; + + uint64_t dirty; + struct nouveau_stateobj *hw[NVFX_STATE_MAX]; +}; + +struct nvfx_vtxelt_state { + struct pipe_vertex_element pipe[16]; + unsigned num_elements; +}; + +struct nvfx_context { + struct pipe_context pipe; + + struct nouveau_winsys *nvws; + struct nvfx_screen *screen; + + struct draw_context *draw; + + /* HW state derived from pipe states */ + struct nvfx_state state; + struct { + struct nvfx_vertex_program *vertprog; + + unsigned nr_attribs; + unsigned hw[PIPE_MAX_SHADER_INPUTS]; + unsigned draw[PIPE_MAX_SHADER_INPUTS]; + unsigned emit[PIPE_MAX_SHADER_INPUTS]; + } swtnl; + + enum { + HW, SWTNL, SWRAST + } render_mode; + unsigned fallback_swtnl; + unsigned fallback_swrast; + + /* Context state */ + unsigned dirty, draw_dirty; + struct pipe_scissor_state scissor; + unsigned stipple[32]; + struct pipe_clip_state clip; + struct nvfx_vertex_program *vertprog; + struct nvfx_fragment_program *fragprog; + struct pipe_buffer *constbuf[PIPE_SHADER_TYPES]; + unsigned constbuf_nr[PIPE_SHADER_TYPES]; + struct nvfx_rasterizer_state *rasterizer; + struct nvfx_zsa_state *zsa; + struct nvfx_blend_state *blend; + struct pipe_blend_color blend_colour; + struct pipe_stencil_ref stencil_ref; + struct pipe_viewport_state viewport; + struct pipe_framebuffer_state framebuffer; + struct pipe_buffer *idxbuf; + unsigned idxbuf_format; + struct nvfx_sampler_state *tex_sampler[PIPE_MAX_SAMPLERS]; + struct nvfx_miptree *tex_miptree[PIPE_MAX_SAMPLERS]; + unsigned nr_samplers; + unsigned nr_textures; + unsigned dirty_samplers; + struct pipe_vertex_buffer vtxbuf[PIPE_MAX_ATTRIBS]; + unsigned vtxbuf_nr; + struct nvfx_vtxelt_state *vtxelt; +}; + +static INLINE struct nvfx_context * +nvfx_context(struct pipe_context *pipe) +{ + return (struct nvfx_context *)pipe; +} + +struct nvfx_state_entry { + boolean (*validate)(struct nvfx_context *nvfx); + struct { + unsigned pipe; + unsigned hw; + } dirty; +}; + +#endif diff --git a/src/gallium/drivers/nvfx/nvfx_screen.h b/src/gallium/drivers/nvfx/nvfx_screen.h new file mode 100644 index 0000000000..b56f2d4b3f --- /dev/null +++ b/src/gallium/drivers/nvfx/nvfx_screen.h @@ -0,0 +1,37 @@ +#ifndef __NVFX_SCREEN_H__ +#define __NVFX_SCREEN_H__ + +#include "nouveau/nouveau_screen.h" +#include "nouveau/nv04_surface_2d.h" + +struct nvfx_screen { + struct nouveau_screen base; + + struct nouveau_winsys *nvws; + + struct nvfx_context *cur_ctx; + + /* HW graphics objects */ + struct nv04_surface_2d *eng2d; + struct nouveau_grobj *eng3d; + struct nouveau_notifier *sync; + + /* Query object resources */ + struct nouveau_notifier *query; + struct nouveau_resource *query_heap; + + /* Vtxprog resources */ + struct nouveau_resource *vp_exec_heap; + struct nouveau_resource *vp_data_heap; + + /* Current 3D state of channel */ + struct nouveau_stateobj *state[NVFX_STATE_MAX]; +}; + +static INLINE struct nvfx_screen * +nvfx_screen(struct pipe_screen *screen) +{ + return (struct nvfx_screen *)screen; +} + +#endif diff --git a/src/gallium/drivers/nvfx/nvfx_state.h b/src/gallium/drivers/nvfx/nvfx_state.h new file mode 100644 index 0000000000..b243b1020f --- /dev/null +++ b/src/gallium/drivers/nvfx/nvfx_state.h @@ -0,0 +1,91 @@ +#ifndef __NVFX_STATE_H__ +#define __NVFX_STATE_H__ + +#include "pipe/p_state.h" +#include "tgsi/tgsi_scan.h" + +struct nvfx_sampler_state { + uint32_t fmt; + uint32_t wrap; + uint32_t en; + uint32_t filt; + uint32_t bcol; +}; + +struct nvfx_vertex_program_exec { + uint32_t data[4]; + boolean has_branch_offset; + int const_index; +}; + +struct nvfx_vertex_program_data { + int index; /* immediates == -1 */ + float value[4]; +}; + +struct nvfx_vertex_program { + struct pipe_shader_state pipe; + + struct draw_vertex_shader *draw; + + boolean translated; + + struct pipe_clip_state ucp; + + struct nvfx_vertex_program_exec *insns; + unsigned nr_insns; + struct nvfx_vertex_program_data *consts; + unsigned nr_consts; + + struct nouveau_resource *exec; + unsigned exec_start; + struct nouveau_resource *data; + unsigned data_start; + unsigned data_start_min; + + uint32_t ir; + uint32_t or; + uint32_t clip_ctrl; + struct nouveau_stateobj *so; +}; + +struct nvfx_fragment_program_data { + unsigned offset; + unsigned index; +}; + +struct nvfx_fragment_program { + struct pipe_shader_state pipe; + struct tgsi_shader_info info; + + boolean translated; + unsigned samplers; + + uint32_t *insn; + int insn_len; + + struct nvfx_fragment_program_data *consts; + unsigned nr_consts; + + struct pipe_buffer *buffer; + + uint32_t fp_control; + struct nouveau_stateobj *so; +}; + +#define NVFX_MAX_TEXTURE_LEVELS 16 + +struct nvfx_miptree { + struct pipe_texture base; + struct nouveau_bo *bo; + + struct pipe_buffer *buffer; + uint total_size; + + struct { + uint pitch; + uint *image_offset; + } level[NVFX_MAX_TEXTURE_LEVELS]; +}; + +#endif -- cgit v1.2.3 From 6518a1c853e82a42b28027b1304babd4f02f98ef Mon Sep 17 00:00:00 2001 From: Luca Barbieri Date: Sun, 21 Feb 2010 13:40:49 +0100 Subject: nv30, nv40: add is_nv4x member to context and screen structs This will make it faster to check for nv40. --- src/gallium/drivers/nv30/nv30_context.c | 2 ++ src/gallium/drivers/nv40/nv40_context.c | 2 ++ src/gallium/drivers/nv40/nv40_screen.c | 3 +++ src/gallium/drivers/nvfx/nvfx_context.h | 2 ++ src/gallium/drivers/nvfx/nvfx_screen.h | 2 ++ 5 files changed, 11 insertions(+) (limited to 'src') diff --git a/src/gallium/drivers/nv30/nv30_context.c b/src/gallium/drivers/nv30/nv30_context.c index 628b50d8dc..afed8bb952 100644 --- a/src/gallium/drivers/nv30/nv30_context.c +++ b/src/gallium/drivers/nv30/nv30_context.c @@ -71,6 +71,8 @@ nv30_create(struct pipe_screen *pscreen, void *priv) screen->base.channel->user_private = nvfx; screen->base.channel->flush_notify = nv30_state_flush_notify; + nvfx->is_nv4x = screen->is_nv4x; + nv30_init_query_functions(nvfx); nv30_init_surface_functions(nvfx); nv30_init_state_functions(nvfx); diff --git a/src/gallium/drivers/nv40/nv40_context.c b/src/gallium/drivers/nv40/nv40_context.c index 721b513438..6cc3a339e6 100644 --- a/src/gallium/drivers/nv40/nv40_context.c +++ b/src/gallium/drivers/nv40/nv40_context.c @@ -71,6 +71,8 @@ nv40_create(struct pipe_screen *pscreen, void *priv) screen->base.channel->user_private = nvfx; screen->base.channel->flush_notify = nv40_state_flush_notify; + nvfx->is_nv4x = screen->is_nv4x; + nv40_init_query_functions(nvfx); nv40_init_surface_functions(nvfx); nv40_init_state_functions(nvfx); diff --git a/src/gallium/drivers/nv40/nv40_screen.c b/src/gallium/drivers/nv40/nv40_screen.c index 0fc8e18750..c64864d58d 100644 --- a/src/gallium/drivers/nv40/nv40_screen.c +++ b/src/gallium/drivers/nv40/nv40_screen.c @@ -184,6 +184,9 @@ nv40_screen_create(struct pipe_winsys *ws, struct nouveau_device *dev) if (!screen) return NULL; + + screen->is_nv4x = ~0; + pscreen = &screen->base.base; ret = nouveau_screen_init(&screen->base, dev); diff --git a/src/gallium/drivers/nvfx/nvfx_context.h b/src/gallium/drivers/nvfx/nvfx_context.h index 9e89d8409f..87bad54e63 100644 --- a/src/gallium/drivers/nvfx/nvfx_context.h +++ b/src/gallium/drivers/nvfx/nvfx_context.h @@ -118,6 +118,8 @@ struct nvfx_context { struct nouveau_winsys *nvws; struct nvfx_screen *screen; + unsigned is_nv4x; /* either 0 or ~0 */ + struct draw_context *draw; /* HW state derived from pipe states */ diff --git a/src/gallium/drivers/nvfx/nvfx_screen.h b/src/gallium/drivers/nvfx/nvfx_screen.h index b56f2d4b3f..e076b876b0 100644 --- a/src/gallium/drivers/nvfx/nvfx_screen.h +++ b/src/gallium/drivers/nvfx/nvfx_screen.h @@ -11,6 +11,8 @@ struct nvfx_screen { struct nvfx_context *cur_ctx; + unsigned is_nv4x; /* either 0 or ~0 */ + /* HW graphics objects */ struct nv04_surface_2d *eng2d; struct nouveau_grobj *eng3d; -- cgit v1.2.3 From 6321a183319fdcb2ebee757b7f0922efe3f919db Mon Sep 17 00:00:00 2001 From: Luca Barbieri Date: Sat, 20 Feb 2010 19:52:22 +0100 Subject: nvfx: add nvfx directory to build system Will be used to hold source files unified between nv30 and nv40. Eventually all nv30 and nv40 code will be moved there and the nv30 and nv40 directories will be removed. --- configure.ac | 2 +- src/gallium/drivers/nvfx/Makefile | 11 +++++++++++ src/gallium/winsys/drm/nouveau/dri/Makefile | 7 +++++++ src/gallium/winsys/drm/nouveau/egl/Makefile | 7 +++++++ src/gallium/winsys/drm/nouveau/xorg/Makefile | 7 +++++++ 5 files changed, 33 insertions(+), 1 deletion(-) create mode 100644 src/gallium/drivers/nvfx/Makefile (limited to 'src') diff --git a/configure.ac b/configure.ac index 35fbcd9d85..eb271e9d51 100644 --- a/configure.ac +++ b/configure.ac @@ -1360,7 +1360,7 @@ AC_ARG_ENABLE([gallium-nouveau], [enable_gallium_nouveau=no]) if test "x$enable_gallium_nouveau" = xyes; then GALLIUM_WINSYS_DRM_DIRS="$GALLIUM_WINSYS_DRM_DIRS nouveau" - GALLIUM_DRIVERS_DIRS="$GALLIUM_DRIVERS_DIRS nouveau nv30 nv40 nv50" + GALLIUM_DRIVERS_DIRS="$GALLIUM_DRIVERS_DIRS nouveau nvfx nv30 nv40 nv50" fi dnl diff --git a/src/gallium/drivers/nvfx/Makefile b/src/gallium/drivers/nvfx/Makefile new file mode 100644 index 0000000000..05cdda0cc0 --- /dev/null +++ b/src/gallium/drivers/nvfx/Makefile @@ -0,0 +1,11 @@ +TOP = ../../../.. +include $(TOP)/configs/current + +LIBNAME = nvfx + +nvfx_dummy.c: + touch nvfx_dummy.c + +C_SOURCES = nvfx_dummy.c + +include ../../Makefile.template diff --git a/src/gallium/winsys/drm/nouveau/dri/Makefile b/src/gallium/winsys/drm/nouveau/dri/Makefile index 7e95f79d03..0cc60395ff 100644 --- a/src/gallium/winsys/drm/nouveau/dri/Makefile +++ b/src/gallium/winsys/drm/nouveau/dri/Makefile @@ -3,11 +3,18 @@ include $(TOP)/configs/current LIBNAME = nouveau_dri.so +# hideous hack +-Wl,--start-group: +-Wl,--end-group: + PIPE_DRIVERS = \ $(TOP)/src/gallium/state_trackers/dri/libdridrm.a \ $(TOP)/src/gallium/winsys/drm/nouveau/drm/libnouveaudrm.a \ + -Wl,--start-group \ $(TOP)/src/gallium/drivers/nv30/libnv30.a \ $(TOP)/src/gallium/drivers/nv40/libnv40.a \ + $(TOP)/src/gallium/drivers/nvfx/libnvfx.a \ + -Wl,--end-group \ $(TOP)/src/gallium/drivers/nv50/libnv50.a \ $(TOP)/src/gallium/drivers/nouveau/libnouveau.a diff --git a/src/gallium/winsys/drm/nouveau/egl/Makefile b/src/gallium/winsys/drm/nouveau/egl/Makefile index 2c35260332..0f5e6d64aa 100644 --- a/src/gallium/winsys/drm/nouveau/egl/Makefile +++ b/src/gallium/winsys/drm/nouveau/egl/Makefile @@ -5,10 +5,17 @@ EGL_DRIVER_NAME = nouveau EGL_DRIVER_SOURCES = dummy.c EGL_DRIVER_LIBS = -ldrm_nouveau +# hideous hack +-Wl,--start-group: +-Wl,--end-group: + EGL_DRIVER_PIPES = \ $(TOP)/src/gallium/winsys/drm/nouveau/drm/libnouveaudrm.a \ + -Wl,--start-group \ $(TOP)/src/gallium/drivers/nv30/libnv30.a \ $(TOP)/src/gallium/drivers/nv40/libnv40.a \ + $(TOP)/src/gallium/drivers/nv40/libnvfx.a \ + -Wl,--end-group \ $(TOP)/src/gallium/drivers/nv50/libnv50.a \ $(TOP)/src/gallium/drivers/nouveau/libnouveau.a \ $(TOP)/src/gallium/drivers/softpipe/libsoftpipe.a diff --git a/src/gallium/winsys/drm/nouveau/xorg/Makefile b/src/gallium/winsys/drm/nouveau/xorg/Makefile index 179b50230b..0607d82a6e 100644 --- a/src/gallium/winsys/drm/nouveau/xorg/Makefile +++ b/src/gallium/winsys/drm/nouveau/xorg/Makefile @@ -15,11 +15,18 @@ INCLUDES = \ -I$(TOP)/include \ -I$(TOP)/src/egl/main +# hideous hack +-Wl,--start-group: +-Wl,--end-group: + LIBS = \ $(TOP)/src/gallium/state_trackers/xorg/libxorgtracker.a \ $(TOP)/src/gallium/winsys/drm/nouveau/drm/libnouveaudrm.a \ + --Wl,--start-group \ $(TOP)/src/gallium/drivers/nv30/libnv30.a \ $(TOP)/src/gallium/drivers/nv40/libnv40.a \ + $(TOP)/src/gallium/drivers/nv40/libnvfx.a \ + --Wl,--end-group \ $(TOP)/src/gallium/drivers/nv50/libnv50.a \ $(TOP)/src/gallium/drivers/nouveau/libnouveau.a \ $(GALLIUM_AUXILIARIES) -- cgit v1.2.3 From c5c7b69bda3fb49fd88b846feb6e65289a04488a Mon Sep 17 00:00:00 2001 From: Luca Barbieri Date: Sat, 20 Feb 2010 20:04:54 +0100 Subject: nv30, nv40: unify identical nv[34]0_clear.c --- src/gallium/drivers/nv30/Makefile | 1 - src/gallium/drivers/nv30/nv30_clear.c | 14 -------------- src/gallium/drivers/nv30/nv30_context.c | 2 +- src/gallium/drivers/nv30/nv30_context.h | 4 ---- src/gallium/drivers/nv40/Makefile | 1 - src/gallium/drivers/nv40/nv40_clear.c | 14 -------------- src/gallium/drivers/nv40/nv40_context.c | 2 +- src/gallium/drivers/nv40/nv40_context.h | 4 ---- src/gallium/drivers/nvfx/Makefile | 6 ++---- src/gallium/drivers/nvfx/nvfx_clear.c | 14 ++++++++++++++ src/gallium/drivers/nvfx/nvfx_context.h | 4 ++++ 11 files changed, 22 insertions(+), 44 deletions(-) delete mode 100644 src/gallium/drivers/nv30/nv30_clear.c delete mode 100644 src/gallium/drivers/nv40/nv40_clear.c create mode 100644 src/gallium/drivers/nvfx/nvfx_clear.c (limited to 'src') diff --git a/src/gallium/drivers/nv30/Makefile b/src/gallium/drivers/nv30/Makefile index ed02075d13..27f19da75c 100644 --- a/src/gallium/drivers/nv30/Makefile +++ b/src/gallium/drivers/nv30/Makefile @@ -4,7 +4,6 @@ include $(TOP)/configs/current LIBNAME = nv30 C_SOURCES = \ - nv30_clear.c \ nv30_context.c \ nv30_draw.c \ nv30_fragprog.c \ diff --git a/src/gallium/drivers/nv30/nv30_clear.c b/src/gallium/drivers/nv30/nv30_clear.c deleted file mode 100644 index e7ba73de7c..0000000000 --- a/src/gallium/drivers/nv30/nv30_clear.c +++ /dev/null @@ -1,14 +0,0 @@ -#include "pipe/p_context.h" -#include "pipe/p_defines.h" -#include "pipe/p_state.h" -#include "util/u_clear.h" - -#include "nv30_context.h" - -void -nv30_clear(struct pipe_context *pipe, unsigned buffers, - const float *rgba, double depth, unsigned stencil) -{ - util_clear(pipe, &nvfx_context(pipe)->framebuffer, buffers, rgba, depth, - stencil); -} diff --git a/src/gallium/drivers/nv30/nv30_context.c b/src/gallium/drivers/nv30/nv30_context.c index afed8bb952..74be578705 100644 --- a/src/gallium/drivers/nv30/nv30_context.c +++ b/src/gallium/drivers/nv30/nv30_context.c @@ -62,7 +62,7 @@ nv30_create(struct pipe_screen *pscreen, void *priv) nvfx->pipe.destroy = nv30_destroy; nvfx->pipe.draw_arrays = nv30_draw_arrays; nvfx->pipe.draw_elements = nv30_draw_elements; - nvfx->pipe.clear = nv30_clear; + nvfx->pipe.clear = nvfx_clear; nvfx->pipe.flush = nv30_flush; nvfx->pipe.is_texture_referenced = nouveau_is_texture_referenced; diff --git a/src/gallium/drivers/nv30/nv30_context.h b/src/gallium/drivers/nv30/nv30_context.h index 2fc148cded..8032bcd979 100644 --- a/src/gallium/drivers/nv30/nv30_context.h +++ b/src/gallium/drivers/nv30/nv30_context.h @@ -51,10 +51,6 @@ extern void nv30_draw_elements(struct pipe_context *pipe, unsigned mode, unsigned start, unsigned count); -/* nv30_clear.c */ -extern void nv30_clear(struct pipe_context *pipe, unsigned buffers, - const float *rgba, double depth, unsigned stencil); - /* nvfx_context.c */ struct pipe_context * nv30_create(struct pipe_screen *pscreen, void *priv); diff --git a/src/gallium/drivers/nv40/Makefile b/src/gallium/drivers/nv40/Makefile index 50e5e72b4e..031c943de5 100644 --- a/src/gallium/drivers/nv40/Makefile +++ b/src/gallium/drivers/nv40/Makefile @@ -4,7 +4,6 @@ include $(TOP)/configs/current LIBNAME = nv40 C_SOURCES = \ - nv40_clear.c \ nv40_context.c \ nv40_draw.c \ nv40_fragprog.c \ diff --git a/src/gallium/drivers/nv40/nv40_clear.c b/src/gallium/drivers/nv40/nv40_clear.c deleted file mode 100644 index 79de90434d..0000000000 --- a/src/gallium/drivers/nv40/nv40_clear.c +++ /dev/null @@ -1,14 +0,0 @@ -#include "pipe/p_context.h" -#include "pipe/p_defines.h" -#include "pipe/p_state.h" -#include "util/u_clear.h" - -#include "nv40_context.h" - -void -nv40_clear(struct pipe_context *pipe, unsigned buffers, - const float *rgba, double depth, unsigned stencil) -{ - util_clear(pipe, &nvfx_context(pipe)->framebuffer, buffers, rgba, depth, - stencil); -} diff --git a/src/gallium/drivers/nv40/nv40_context.c b/src/gallium/drivers/nv40/nv40_context.c index 6cc3a339e6..cb249dd5d7 100644 --- a/src/gallium/drivers/nv40/nv40_context.c +++ b/src/gallium/drivers/nv40/nv40_context.c @@ -62,7 +62,7 @@ nv40_create(struct pipe_screen *pscreen, void *priv) nvfx->pipe.destroy = nv40_destroy; nvfx->pipe.draw_arrays = nv40_draw_arrays; nvfx->pipe.draw_elements = nv40_draw_elements; - nvfx->pipe.clear = nv40_clear; + nvfx->pipe.clear = nvfx_clear; nvfx->pipe.flush = nv40_flush; nvfx->pipe.is_texture_referenced = nouveau_is_texture_referenced; diff --git a/src/gallium/drivers/nv40/nv40_context.h b/src/gallium/drivers/nv40/nv40_context.h index 7227c4a438..f9c0a9eb29 100644 --- a/src/gallium/drivers/nv40/nv40_context.h +++ b/src/gallium/drivers/nv40/nv40_context.h @@ -57,10 +57,6 @@ extern void nv40_draw_elements(struct pipe_context *pipe, unsigned mode, unsigned start, unsigned count); -/* nv40_clear.c */ -extern void nv40_clear(struct pipe_context *pipe, unsigned buffers, - const float *rgba, double depth, unsigned stencil); - /* nvfx_context.c */ struct pipe_context * nv40_create(struct pipe_screen *pscreen, void *priv); diff --git a/src/gallium/drivers/nvfx/Makefile b/src/gallium/drivers/nvfx/Makefile index 05cdda0cc0..6959efa390 100644 --- a/src/gallium/drivers/nvfx/Makefile +++ b/src/gallium/drivers/nvfx/Makefile @@ -3,9 +3,7 @@ include $(TOP)/configs/current LIBNAME = nvfx -nvfx_dummy.c: - touch nvfx_dummy.c - -C_SOURCES = nvfx_dummy.c +C_SOURCES = \ + nvfx_clear.c include ../../Makefile.template diff --git a/src/gallium/drivers/nvfx/nvfx_clear.c b/src/gallium/drivers/nvfx/nvfx_clear.c new file mode 100644 index 0000000000..2be70fcee4 --- /dev/null +++ b/src/gallium/drivers/nvfx/nvfx_clear.c @@ -0,0 +1,14 @@ +#include "pipe/p_context.h" +#include "pipe/p_defines.h" +#include "pipe/p_state.h" +#include "util/u_clear.h" + +#include "nvfx_context.h" + +void +nvfx_clear(struct pipe_context *pipe, unsigned buffers, + const float *rgba, double depth, unsigned stencil) +{ + util_clear(pipe, &nvfx_context(pipe)->framebuffer, buffers, rgba, depth, + stencil); +} diff --git a/src/gallium/drivers/nvfx/nvfx_context.h b/src/gallium/drivers/nvfx/nvfx_context.h index 87bad54e63..0aaa4964e2 100644 --- a/src/gallium/drivers/nvfx/nvfx_context.h +++ b/src/gallium/drivers/nvfx/nvfx_context.h @@ -181,4 +181,8 @@ struct nvfx_state_entry { } dirty; }; +/* nvfx_clear.c */ +extern void nvfx_clear(struct pipe_context *pipe, unsigned buffers, + const float *rgba, double depth, unsigned stencil); + #endif -- cgit v1.2.3 From d084d189d03dc89a3161a131f1b386840c06ad61 Mon Sep 17 00:00:00 2001 From: Luca Barbieri Date: Sat, 20 Feb 2010 20:07:10 +0100 Subject: nv30, nv40: unify identical nv[34]0_transfer.c --- src/gallium/drivers/nv30/Makefile | 1 - src/gallium/drivers/nv30/nv30_context.c | 2 +- src/gallium/drivers/nv30/nv30_context.h | 1 - src/gallium/drivers/nv30/nv30_transfer.c | 182 ------------------------------- src/gallium/drivers/nv40/Makefile | 1 - src/gallium/drivers/nv40/nv40_context.c | 2 +- src/gallium/drivers/nv40/nv40_context.h | 1 - src/gallium/drivers/nvfx/Makefile | 3 +- src/gallium/drivers/nvfx/nvfx_context.h | 3 + src/gallium/drivers/nvfx/nvfx_transfer.c | 182 +++++++++++++++++++++++++++++++ 10 files changed, 189 insertions(+), 189 deletions(-) delete mode 100644 src/gallium/drivers/nv30/nv30_transfer.c create mode 100644 src/gallium/drivers/nvfx/nvfx_transfer.c (limited to 'src') diff --git a/src/gallium/drivers/nv30/Makefile b/src/gallium/drivers/nv30/Makefile index 27f19da75c..f18295cefc 100644 --- a/src/gallium/drivers/nv30/Makefile +++ b/src/gallium/drivers/nv30/Makefile @@ -21,7 +21,6 @@ C_SOURCES = \ nv30_state_viewport.c \ nv30_state_zsa.c \ nv30_surface.c \ - nv30_transfer.c \ nv30_vbo.c \ nv30_vertprog.c diff --git a/src/gallium/drivers/nv30/nv30_context.c b/src/gallium/drivers/nv30/nv30_context.c index 74be578705..ee2c465bc6 100644 --- a/src/gallium/drivers/nv30/nv30_context.c +++ b/src/gallium/drivers/nv30/nv30_context.c @@ -76,7 +76,7 @@ nv30_create(struct pipe_screen *pscreen, void *priv) nv30_init_query_functions(nvfx); nv30_init_surface_functions(nvfx); nv30_init_state_functions(nvfx); - nv30_init_transfer_functions(nvfx); + nvfx_init_transfer_functions(nvfx); /* Create, configure, and install fallback swtnl path */ nvfx->draw = draw_create(); diff --git a/src/gallium/drivers/nv30/nv30_context.h b/src/gallium/drivers/nv30/nv30_context.h index 8032bcd979..9f28d49706 100644 --- a/src/gallium/drivers/nv30/nv30_context.h +++ b/src/gallium/drivers/nv30/nv30_context.h @@ -6,7 +6,6 @@ extern void nv30_init_state_functions(struct nvfx_context *nvfx); extern void nv30_init_surface_functions(struct nvfx_context *nvfx); extern void nv30_init_query_functions(struct nvfx_context *nvfx); -extern void nv30_init_transfer_functions(struct nvfx_context *nvfx); extern void nv30_screen_init_miptree_functions(struct pipe_screen *pscreen); diff --git a/src/gallium/drivers/nv30/nv30_transfer.c b/src/gallium/drivers/nv30/nv30_transfer.c deleted file mode 100644 index 3d71df52b9..0000000000 --- a/src/gallium/drivers/nv30/nv30_transfer.c +++ /dev/null @@ -1,182 +0,0 @@ -#include "pipe/p_state.h" -#include "pipe/p_defines.h" -#include "util/u_inlines.h" -#include "util/u_format.h" -#include "util/u_memory.h" -#include "util/u_math.h" -#include "nouveau/nouveau_winsys.h" -#include "nv30_context.h" -#include "nvfx_screen.h" -#include "nvfx_state.h" - -struct nv30_transfer { - struct pipe_transfer base; - struct pipe_surface *surface; - boolean direct; -}; - -static void -nv30_compatible_transfer_tex(struct pipe_texture *pt, unsigned width, unsigned height, - struct pipe_texture *template) -{ - memset(template, 0, sizeof(struct pipe_texture)); - template->target = pt->target; - template->format = pt->format; - template->width0 = width; - template->height0 = height; - template->depth0 = 1; - template->last_level = 0; - template->nr_samples = pt->nr_samples; - - template->tex_usage = PIPE_TEXTURE_USAGE_DYNAMIC | - NOUVEAU_TEXTURE_USAGE_LINEAR; -} - -static struct pipe_transfer * -nv30_transfer_new(struct pipe_context *pcontext, struct pipe_texture *pt, - unsigned face, unsigned level, unsigned zslice, - enum pipe_transfer_usage usage, - unsigned x, unsigned y, unsigned w, unsigned h) -{ - struct pipe_screen *pscreen = pcontext->screen; - struct nvfx_miptree *mt = (struct nvfx_miptree *)pt; - struct nv30_transfer *tx; - struct pipe_texture tx_tex_template, *tx_tex; - - tx = CALLOC_STRUCT(nv30_transfer); - if (!tx) - return NULL; - - pipe_texture_reference(&tx->base.texture, pt); - tx->base.x = x; - tx->base.y = y; - tx->base.width = w; - tx->base.height = h; - tx->base.stride = mt->level[level].pitch; - tx->base.usage = usage; - tx->base.face = face; - tx->base.level = level; - tx->base.zslice = zslice; - - /* Direct access to texture */ - if ((pt->tex_usage & PIPE_TEXTURE_USAGE_DYNAMIC || - debug_get_bool_option("NOUVEAU_NO_TRANSFER", TRUE/*XXX:FALSE*/)) && - pt->tex_usage & NOUVEAU_TEXTURE_USAGE_LINEAR) - { - tx->direct = true; - tx->surface = pscreen->get_tex_surface(pscreen, pt, - face, level, zslice, - pipe_transfer_buffer_flags(&tx->base)); - return &tx->base; - } - - tx->direct = false; - - nv30_compatible_transfer_tex(pt, w, h, &tx_tex_template); - - tx_tex = pscreen->texture_create(pscreen, &tx_tex_template); - if (!tx_tex) - { - FREE(tx); - return NULL; - } - - tx->base.stride = ((struct nvfx_miptree*)tx_tex)->level[0].pitch; - - tx->surface = pscreen->get_tex_surface(pscreen, tx_tex, - 0, 0, 0, - pipe_transfer_buffer_flags(&tx->base)); - - pipe_texture_reference(&tx_tex, NULL); - - if (!tx->surface) - { - pipe_surface_reference(&tx->surface, NULL); - FREE(tx); - return NULL; - } - - if (usage & PIPE_TRANSFER_READ) { - struct nvfx_screen *nvscreen = nvfx_screen(pscreen); - struct pipe_surface *src; - - src = pscreen->get_tex_surface(pscreen, pt, - face, level, zslice, - PIPE_BUFFER_USAGE_GPU_READ); - - /* TODO: Check if SIFM can deal with x,y,w,h when swizzling */ - /* TODO: Check if SIFM can un-swizzle */ - nvscreen->eng2d->copy(nvscreen->eng2d, - tx->surface, 0, 0, - src, x, y, - w, h); - - pipe_surface_reference(&src, NULL); - } - - return &tx->base; -} - -static void -nv30_transfer_del(struct pipe_context *pcontext, - struct pipe_transfer *ptx) -{ - struct nv30_transfer *tx = (struct nv30_transfer *)ptx; - - if (!tx->direct && (ptx->usage & PIPE_TRANSFER_WRITE)) { - struct pipe_screen *pscreen = pcontext->screen; - struct nvfx_screen *nvscreen = nvfx_screen(pscreen); - struct pipe_surface *dst; - - dst = pscreen->get_tex_surface(pscreen, ptx->texture, - ptx->face, ptx->level, ptx->zslice, - PIPE_BUFFER_USAGE_GPU_WRITE | NOUVEAU_BUFFER_USAGE_NO_RENDER); - - /* TODO: Check if SIFM can deal with x,y,w,h when swizzling */ - nvscreen->eng2d->copy(nvscreen->eng2d, - dst, tx->base.x, tx->base.y, - tx->surface, 0, 0, - tx->base.width, tx->base.height); - - pipe_surface_reference(&dst, NULL); - } - - pipe_surface_reference(&tx->surface, NULL); - pipe_texture_reference(&ptx->texture, NULL); - FREE(ptx); -} - -static void * -nv30_transfer_map(struct pipe_context *pcontext, struct pipe_transfer *ptx) -{ - struct pipe_screen *pscreen = pcontext->screen; - struct nv30_transfer *tx = (struct nv30_transfer *)ptx; - struct nv04_surface *ns = (struct nv04_surface *)tx->surface; - struct nvfx_miptree *mt = (struct nvfx_miptree *)tx->surface->texture; - void *map = pipe_buffer_map(pscreen, mt->buffer, - pipe_transfer_buffer_flags(ptx)); - - if(!tx->direct) - return map + ns->base.offset; - else - return map + ns->base.offset + ptx->y * ns->pitch + ptx->x * util_format_get_blocksize(ptx->texture->format); -} - -static void -nv30_transfer_unmap(struct pipe_context *pcontext, struct pipe_transfer *ptx) -{ - struct pipe_screen *pscreen = pcontext->screen; - struct nv30_transfer *tx = (struct nv30_transfer *)ptx; - struct nvfx_miptree *mt = (struct nvfx_miptree *)tx->surface->texture; - - pipe_buffer_unmap(pscreen, mt->buffer); -} - -void -nv30_init_transfer_functions(struct nvfx_context *nvfx) -{ - nvfx->pipe.get_tex_transfer = nv30_transfer_new; - nvfx->pipe.tex_transfer_destroy = nv30_transfer_del; - nvfx->pipe.transfer_map = nv30_transfer_map; - nvfx->pipe.transfer_unmap = nv30_transfer_unmap; -} diff --git a/src/gallium/drivers/nv40/Makefile b/src/gallium/drivers/nv40/Makefile index 031c943de5..8d09ef807f 100644 --- a/src/gallium/drivers/nv40/Makefile +++ b/src/gallium/drivers/nv40/Makefile @@ -21,7 +21,6 @@ C_SOURCES = \ nv40_state_viewport.c \ nv40_state_zsa.c \ nv40_surface.c \ - nv40_transfer.c \ nv40_vbo.c \ nv40_vertprog.c diff --git a/src/gallium/drivers/nv40/nv40_context.c b/src/gallium/drivers/nv40/nv40_context.c index cb249dd5d7..9934b582ee 100644 --- a/src/gallium/drivers/nv40/nv40_context.c +++ b/src/gallium/drivers/nv40/nv40_context.c @@ -76,7 +76,7 @@ nv40_create(struct pipe_screen *pscreen, void *priv) nv40_init_query_functions(nvfx); nv40_init_surface_functions(nvfx); nv40_init_state_functions(nvfx); - nv40_init_transfer_functions(nvfx); + nvfx_init_transfer_functions(nvfx); /* Create, configure, and install fallback swtnl path */ nvfx->draw = draw_create(); diff --git a/src/gallium/drivers/nv40/nv40_context.h b/src/gallium/drivers/nv40/nv40_context.h index f9c0a9eb29..e7c6d5ad86 100644 --- a/src/gallium/drivers/nv40/nv40_context.h +++ b/src/gallium/drivers/nv40/nv40_context.h @@ -6,7 +6,6 @@ extern void nv40_init_state_functions(struct nvfx_context *nvfx); extern void nv40_init_surface_functions(struct nvfx_context *nvfx); extern void nv40_init_query_functions(struct nvfx_context *nvfx); -extern void nv40_init_transfer_functions(struct nvfx_context *nvfx); extern void nv40_screen_init_miptree_functions(struct pipe_screen *pscreen); diff --git a/src/gallium/drivers/nvfx/Makefile b/src/gallium/drivers/nvfx/Makefile index 6959efa390..699cbedbc8 100644 --- a/src/gallium/drivers/nvfx/Makefile +++ b/src/gallium/drivers/nvfx/Makefile @@ -4,6 +4,7 @@ include $(TOP)/configs/current LIBNAME = nvfx C_SOURCES = \ - nvfx_clear.c + nvfx_clear.c \ + nvfx_transfer.c include ../../Makefile.template diff --git a/src/gallium/drivers/nvfx/nvfx_context.h b/src/gallium/drivers/nvfx/nvfx_context.h index 0aaa4964e2..38d1142ff9 100644 --- a/src/gallium/drivers/nvfx/nvfx_context.h +++ b/src/gallium/drivers/nvfx/nvfx_context.h @@ -185,4 +185,7 @@ struct nvfx_state_entry { extern void nvfx_clear(struct pipe_context *pipe, unsigned buffers, const float *rgba, double depth, unsigned stencil); +/* nvfx_transfer.c */ +extern void nvfx_init_transfer_functions(struct nvfx_context *nvfx); + #endif diff --git a/src/gallium/drivers/nvfx/nvfx_transfer.c b/src/gallium/drivers/nvfx/nvfx_transfer.c new file mode 100644 index 0000000000..409b354d58 --- /dev/null +++ b/src/gallium/drivers/nvfx/nvfx_transfer.c @@ -0,0 +1,182 @@ +#include "pipe/p_state.h" +#include "pipe/p_defines.h" +#include "util/u_inlines.h" +#include "util/u_format.h" +#include "util/u_memory.h" +#include "util/u_math.h" +#include "nouveau/nouveau_winsys.h" +#include "nvfx_context.h" +#include "nvfx_screen.h" +#include "nvfx_state.h" + +struct nvfx_transfer { + struct pipe_transfer base; + struct pipe_surface *surface; + boolean direct; +}; + +static void +nvfx_compatible_transfer_tex(struct pipe_texture *pt, unsigned width, unsigned height, + struct pipe_texture *template) +{ + memset(template, 0, sizeof(struct pipe_texture)); + template->target = pt->target; + template->format = pt->format; + template->width0 = width; + template->height0 = height; + template->depth0 = 1; + template->last_level = 0; + template->nr_samples = pt->nr_samples; + + template->tex_usage = PIPE_TEXTURE_USAGE_DYNAMIC | + NOUVEAU_TEXTURE_USAGE_LINEAR; +} + +static struct pipe_transfer * +nvfx_transfer_new(struct pipe_context *pcontext, struct pipe_texture *pt, + unsigned face, unsigned level, unsigned zslice, + enum pipe_transfer_usage usage, + unsigned x, unsigned y, unsigned w, unsigned h) +{ + struct pipe_screen *pscreen = pcontext->screen; + struct nvfx_miptree *mt = (struct nvfx_miptree *)pt; + struct nvfx_transfer *tx; + struct pipe_texture tx_tex_template, *tx_tex; + + tx = CALLOC_STRUCT(nvfx_transfer); + if (!tx) + return NULL; + + pipe_texture_reference(&tx->base.texture, pt); + tx->base.x = x; + tx->base.y = y; + tx->base.width = w; + tx->base.height = h; + tx->base.stride = mt->level[level].pitch; + tx->base.usage = usage; + tx->base.face = face; + tx->base.level = level; + tx->base.zslice = zslice; + + /* Direct access to texture */ + if ((pt->tex_usage & PIPE_TEXTURE_USAGE_DYNAMIC || + debug_get_bool_option("NOUVEAU_NO_TRANSFER", TRUE/*XXX:FALSE*/)) && + pt->tex_usage & NOUVEAU_TEXTURE_USAGE_LINEAR) + { + tx->direct = true; + tx->surface = pscreen->get_tex_surface(pscreen, pt, + face, level, zslice, + pipe_transfer_buffer_flags(&tx->base)); + return &tx->base; + } + + tx->direct = false; + + nvfx_compatible_transfer_tex(pt, w, h, &tx_tex_template); + + tx_tex = pscreen->texture_create(pscreen, &tx_tex_template); + if (!tx_tex) + { + FREE(tx); + return NULL; + } + + tx->base.stride = ((struct nvfx_miptree*)tx_tex)->level[0].pitch; + + tx->surface = pscreen->get_tex_surface(pscreen, tx_tex, + 0, 0, 0, + pipe_transfer_buffer_flags(&tx->base)); + + pipe_texture_reference(&tx_tex, NULL); + + if (!tx->surface) + { + pipe_surface_reference(&tx->surface, NULL); + FREE(tx); + return NULL; + } + + if (usage & PIPE_TRANSFER_READ) { + struct nvfx_screen *nvscreen = nvfx_screen(pscreen); + struct pipe_surface *src; + + src = pscreen->get_tex_surface(pscreen, pt, + face, level, zslice, + PIPE_BUFFER_USAGE_GPU_READ); + + /* TODO: Check if SIFM can deal with x,y,w,h when swizzling */ + /* TODO: Check if SIFM can un-swizzle */ + nvscreen->eng2d->copy(nvscreen->eng2d, + tx->surface, 0, 0, + src, x, y, + w, h); + + pipe_surface_reference(&src, NULL); + } + + return &tx->base; +} + +static void +nvfx_transfer_del(struct pipe_context *pcontext, + struct pipe_transfer *ptx) +{ + struct nvfx_transfer *tx = (struct nvfx_transfer *)ptx; + + if (!tx->direct && (ptx->usage & PIPE_TRANSFER_WRITE)) { + struct pipe_screen *pscreen = pcontext->screen; + struct nvfx_screen *nvscreen = nvfx_screen(pscreen); + struct pipe_surface *dst; + + dst = pscreen->get_tex_surface(pscreen, ptx->texture, + ptx->face, ptx->level, ptx->zslice, + PIPE_BUFFER_USAGE_GPU_WRITE | NOUVEAU_BUFFER_USAGE_NO_RENDER); + + /* TODO: Check if SIFM can deal with x,y,w,h when swizzling */ + nvscreen->eng2d->copy(nvscreen->eng2d, + dst, tx->base.x, tx->base.y, + tx->surface, 0, 0, + tx->base.width, tx->base.height); + + pipe_surface_reference(&dst, NULL); + } + + pipe_surface_reference(&tx->surface, NULL); + pipe_texture_reference(&ptx->texture, NULL); + FREE(ptx); +} + +static void * +nvfx_transfer_map(struct pipe_context *pcontext, struct pipe_transfer *ptx) +{ + struct pipe_screen *pscreen = pcontext->screen; + struct nvfx_transfer *tx = (struct nvfx_transfer *)ptx; + struct nv04_surface *ns = (struct nv04_surface *)tx->surface; + struct nvfx_miptree *mt = (struct nvfx_miptree *)tx->surface->texture; + void *map = pipe_buffer_map(pscreen, mt->buffer, + pipe_transfer_buffer_flags(ptx)); + + if(!tx->direct) + return map + ns->base.offset; + else + return map + ns->base.offset + ptx->y * ns->pitch + ptx->x * util_format_get_blocksize(ptx->texture->format); +} + +static void +nvfx_transfer_unmap(struct pipe_context *pcontext, struct pipe_transfer *ptx) +{ + struct pipe_screen *pscreen = pcontext->screen; + struct nvfx_transfer *tx = (struct nvfx_transfer *)ptx; + struct nvfx_miptree *mt = (struct nvfx_miptree *)tx->surface->texture; + + pipe_buffer_unmap(pscreen, mt->buffer); +} + +void +nvfx_init_transfer_functions(struct nvfx_context *nvfx) +{ + nvfx->pipe.get_tex_transfer = nvfx_transfer_new; + nvfx->pipe.tex_transfer_destroy = nvfx_transfer_del; + nvfx->pipe.transfer_map = nvfx_transfer_map; + nvfx->pipe.transfer_unmap = nvfx_transfer_unmap; +} -- cgit v1.2.3 From 778c64da97272e7508dbcdf0bffdb699d1b04ce0 Mon Sep 17 00:00:00 2001 From: Luca Barbieri Date: Sun, 21 Feb 2010 11:33:15 +0100 Subject: nv30, nv40: non-trivially unify nv[34]0_state_emit.c The files are the same except for swtnl support on nv40 and for texture cache flushing on nv40. Unify them, and use a macro to define 4 versions of render_states, for all combinations of nvfx and hwtnl/swtnl. --- src/gallium/drivers/nv30/Makefile | 1 - src/gallium/drivers/nv30/nv30_context.c | 2 +- src/gallium/drivers/nv30/nv30_context.h | 3 - src/gallium/drivers/nv30/nv30_state_emit.c | 121 ------------------ src/gallium/drivers/nv30/nv30_vbo.c | 14 +-- src/gallium/drivers/nv40/Makefile | 1 - src/gallium/drivers/nv40/nv40_context.c | 2 +- src/gallium/drivers/nv40/nv40_context.h | 4 - src/gallium/drivers/nv40/nv40_draw.c | 6 +- src/gallium/drivers/nv40/nv40_state_emit.c | 189 ----------------------------- src/gallium/drivers/nv40/nv40_vbo.c | 14 +-- src/gallium/drivers/nvfx/Makefile | 1 + src/gallium/drivers/nvfx/nvfx_context.h | 6 + src/gallium/drivers/nvfx/nvfx_state_emit.c | 188 ++++++++++++++++++++++++++++ 14 files changed, 214 insertions(+), 338 deletions(-) delete mode 100644 src/gallium/drivers/nv30/nv30_state_emit.c delete mode 100644 src/gallium/drivers/nv40/nv40_state_emit.c create mode 100644 src/gallium/drivers/nvfx/nvfx_state_emit.c (limited to 'src') diff --git a/src/gallium/drivers/nv30/Makefile b/src/gallium/drivers/nv30/Makefile index f18295cefc..3067e45062 100644 --- a/src/gallium/drivers/nv30/Makefile +++ b/src/gallium/drivers/nv30/Makefile @@ -13,7 +13,6 @@ C_SOURCES = \ nv30_screen.c \ nv30_state.c \ nv30_state_blend.c \ - nv30_state_emit.c \ nv30_state_fb.c \ nv30_state_rasterizer.c \ nv30_state_scissor.c \ diff --git a/src/gallium/drivers/nv30/nv30_context.c b/src/gallium/drivers/nv30/nv30_context.c index ee2c465bc6..6fe8cb3e32 100644 --- a/src/gallium/drivers/nv30/nv30_context.c +++ b/src/gallium/drivers/nv30/nv30_context.c @@ -69,7 +69,7 @@ nv30_create(struct pipe_screen *pscreen, void *priv) nvfx->pipe.is_buffer_referenced = nouveau_is_buffer_referenced; screen->base.channel->user_private = nvfx; - screen->base.channel->flush_notify = nv30_state_flush_notify; + screen->base.channel->flush_notify = nvfx_state_flush_notify; nvfx->is_nv4x = screen->is_nv4x; diff --git a/src/gallium/drivers/nv30/nv30_context.h b/src/gallium/drivers/nv30/nv30_context.h index 9f28d49706..a6767da4dc 100644 --- a/src/gallium/drivers/nv30/nv30_context.h +++ b/src/gallium/drivers/nv30/nv30_context.h @@ -24,9 +24,6 @@ extern void nv30_fragprog_destroy(struct nvfx_context *, extern void nv30_fragtex_bind(struct nvfx_context *); /* nv30_state.c and friends */ -extern boolean nv30_state_validate(struct nvfx_context *nvfx); -extern void nv30_state_emit(struct nvfx_context *nvfx); -extern void nv30_state_flush_notify(struct nouveau_channel *chan); extern struct nvfx_state_entry nv30_state_rasterizer; extern struct nvfx_state_entry nv30_state_scissor; extern struct nvfx_state_entry nv30_state_stipple; diff --git a/src/gallium/drivers/nv30/nv30_state_emit.c b/src/gallium/drivers/nv30/nv30_state_emit.c deleted file mode 100644 index 6df93618da..0000000000 --- a/src/gallium/drivers/nv30/nv30_state_emit.c +++ /dev/null @@ -1,121 +0,0 @@ -#include "nv30_context.h" -#include "nvfx_state.h" - -static struct nvfx_state_entry *render_states[] = { - &nv30_state_framebuffer, - &nv30_state_rasterizer, - &nv30_state_scissor, - &nv30_state_stipple, - &nv30_state_fragprog, - &nv30_state_fragtex, - &nv30_state_vertprog, - &nv30_state_blend, - &nv30_state_blend_colour, - &nv30_state_zsa, - &nv30_state_sr, - &nv30_state_viewport, - &nv30_state_vbo, - NULL -}; - -static void -nv30_state_do_validate(struct nvfx_context *nvfx, - struct nvfx_state_entry **states) -{ - while (*states) { - struct nvfx_state_entry *e = *states; - - if (nvfx->dirty & e->dirty.pipe) { - if (e->validate(nvfx)) - nvfx->state.dirty |= (1ULL << e->dirty.hw); - } - - states++; - } - nvfx->dirty = 0; -} - -void -nv30_state_emit(struct nvfx_context *nvfx) -{ - struct nouveau_channel *chan = nvfx->screen->base.channel; - struct nvfx_state *state = &nvfx->state; - struct nvfx_screen *screen = nvfx->screen; - unsigned i; - uint64_t states; - - /* XXX: racy! - */ - if (nvfx != screen->cur_ctx) { - for (i = 0; i < NVFX_STATE_MAX; i++) { - if (state->hw[i] && screen->state[i] != state->hw[i]) - state->dirty |= (1ULL << i); - } - - screen->cur_ctx = nvfx; - } - - for (i = 0, states = state->dirty; states; i++) { - if (!(states & (1ULL << i))) - continue; - so_ref (state->hw[i], &nvfx->screen->state[i]); - if (state->hw[i]) - so_emit(chan, nvfx->screen->state[i]); - states &= ~(1ULL << i); - } - - state->dirty = 0; -} - -void -nv30_state_flush_notify(struct nouveau_channel *chan) -{ - struct nvfx_context *nvfx = chan->user_private; - struct nvfx_state *state = &nvfx->state; - unsigned i, samplers; - - so_emit_reloc_markers(chan, state->hw[NVFX_STATE_FB]); - for (i = 0, samplers = state->fp_samplers; i < 16 && samplers; i++) { - if (!(samplers & (1 << i))) - continue; - so_emit_reloc_markers(chan, - state->hw[NVFX_STATE_FRAGTEX0+i]); - samplers &= ~(1ULL << i); - } - so_emit_reloc_markers(chan, state->hw[NVFX_STATE_FRAGPROG]); - if (state->hw[NVFX_STATE_VTXBUF] /*&& nvfx->render_mode == HW*/) - so_emit_reloc_markers(chan, state->hw[NVFX_STATE_VTXBUF]); -} - -boolean -nv30_state_validate(struct nvfx_context *nvfx) -{ -#if 0 - boolean was_sw = nvfx->fallback_swtnl ? TRUE : FALSE; - - if (nvfx->render_mode != HW) { - /* Don't even bother trying to go back to hw if none - * of the states that caused swtnl previously have changed. - */ - if ((nvfx->fallback_swtnl & nvfx->dirty) - != nvfx->fallback_swtnl) - return FALSE; - - /* Attempt to go to hwtnl again */ - nvfx->pipe.flush(&nvfx->pipe, 0, NULL); - nvfx->dirty |= (NVFX_NEW_VIEWPORT | - NVFX_NEW_VERTPROG | - NVFX_NEW_ARRAYS); - nvfx->render_mode = HW; - } -#endif - nv30_state_do_validate(nvfx, render_states); -#if 0 - if (nvfx->fallback_swtnl || nvfx->fallback_swrast) - return FALSE; - - if (was_sw) - NOUVEAU_ERR("swtnl->hw\n"); -#endif - return TRUE; -} diff --git a/src/gallium/drivers/nv30/nv30_vbo.c b/src/gallium/drivers/nv30/nv30_vbo.c index 119fa59890..2b4401e533 100644 --- a/src/gallium/drivers/nv30/nv30_vbo.c +++ b/src/gallium/drivers/nv30/nv30_vbo.c @@ -175,7 +175,7 @@ nv30_draw_arrays(struct pipe_context *pipe, unsigned restart = 0; nv30_vbo_set_idxbuf(nvfx, NULL, 0); - if (FORCE_SWTNL || !nv30_state_validate(nvfx)) { + if (FORCE_SWTNL || !nvfx_state_validate(nvfx)) { /*return nv30_draw_elements_swtnl(pipe, NULL, 0, mode, start, count);*/ return; @@ -184,7 +184,7 @@ nv30_draw_arrays(struct pipe_context *pipe, while (count) { unsigned vc, nr; - nv30_state_emit(nvfx); + nvfx_state_emit(nvfx); vc = nouveau_vbuf_split(AVAIL_RING(chan), 6, 256, mode, start, count, &restart); @@ -238,7 +238,7 @@ nv30_draw_elements_u08(struct nvfx_context *nvfx, void *ib, uint8_t *elts = (uint8_t *)ib + start; unsigned vc, push, restart = 0; - nv30_state_emit(nvfx); + nvfx_state_emit(nvfx); vc = nouveau_vbuf_split(AVAIL_RING(chan), 6, 2, mode, start, count, &restart); @@ -289,7 +289,7 @@ nv30_draw_elements_u16(struct nvfx_context *nvfx, void *ib, uint16_t *elts = (uint16_t *)ib + start; unsigned vc, push, restart = 0; - nv30_state_emit(nvfx); + nvfx_state_emit(nvfx); vc = nouveau_vbuf_split(AVAIL_RING(chan), 6, 2, mode, start, count, &restart); @@ -340,7 +340,7 @@ nv30_draw_elements_u32(struct nvfx_context *nvfx, void *ib, uint32_t *elts = (uint32_t *)ib + start; unsigned vc, push, restart = 0; - nv30_state_emit(nvfx); + nvfx_state_emit(nvfx); vc = nouveau_vbuf_split(AVAIL_RING(chan), 5, 1, mode, start, count, &restart); @@ -416,7 +416,7 @@ nv30_draw_elements_vbo(struct pipe_context *pipe, while (count) { unsigned nr, vc; - nv30_state_emit(nvfx); + nvfx_state_emit(nvfx); vc = nouveau_vbuf_split(AVAIL_RING(chan), 6, 256, mode, start, count, &restart); @@ -465,7 +465,7 @@ nv30_draw_elements(struct pipe_context *pipe, boolean idxbuf; idxbuf = nv30_vbo_set_idxbuf(nvfx, indexBuffer, indexSize); - if (FORCE_SWTNL || !nv30_state_validate(nvfx)) { + if (FORCE_SWTNL || !nvfx_state_validate(nvfx)) { /*return nv30_draw_elements_swtnl(pipe, NULL, 0, mode, start, count);*/ return; diff --git a/src/gallium/drivers/nv40/Makefile b/src/gallium/drivers/nv40/Makefile index 8d09ef807f..b0c0c09d51 100644 --- a/src/gallium/drivers/nv40/Makefile +++ b/src/gallium/drivers/nv40/Makefile @@ -13,7 +13,6 @@ C_SOURCES = \ nv40_screen.c \ nv40_state.c \ nv40_state_blend.c \ - nv40_state_emit.c \ nv40_state_fb.c \ nv40_state_rasterizer.c \ nv40_state_scissor.c \ diff --git a/src/gallium/drivers/nv40/nv40_context.c b/src/gallium/drivers/nv40/nv40_context.c index 9934b582ee..12f57377cd 100644 --- a/src/gallium/drivers/nv40/nv40_context.c +++ b/src/gallium/drivers/nv40/nv40_context.c @@ -69,7 +69,7 @@ nv40_create(struct pipe_screen *pscreen, void *priv) nvfx->pipe.is_buffer_referenced = nouveau_is_buffer_referenced; screen->base.channel->user_private = nvfx; - screen->base.channel->flush_notify = nv40_state_flush_notify; + screen->base.channel->flush_notify = nvfx_state_flush_notify; nvfx->is_nv4x = screen->is_nv4x; diff --git a/src/gallium/drivers/nv40/nv40_context.h b/src/gallium/drivers/nv40/nv40_context.h index e7c6d5ad86..0b875bcb06 100644 --- a/src/gallium/drivers/nv40/nv40_context.h +++ b/src/gallium/drivers/nv40/nv40_context.h @@ -28,10 +28,6 @@ extern void nv40_fragprog_destroy(struct nvfx_context *, extern void nv40_fragtex_bind(struct nvfx_context *); /* nv40_state.c and friends */ -extern boolean nv40_state_validate(struct nvfx_context *nvfx); -extern boolean nv40_state_validate_swtnl(struct nvfx_context *nvfx); -extern void nv40_state_emit(struct nvfx_context *nvfx); -extern void nv40_state_flush_notify(struct nouveau_channel *chan); extern struct nvfx_state_entry nv40_state_rasterizer; extern struct nvfx_state_entry nv40_state_scissor; extern struct nvfx_state_entry nv40_state_stipple; diff --git a/src/gallium/drivers/nv40/nv40_draw.c b/src/gallium/drivers/nv40/nv40_draw.c index cce1c64621..87d2689d54 100644 --- a/src/gallium/drivers/nv40/nv40_draw.c +++ b/src/gallium/drivers/nv40/nv40_draw.c @@ -98,7 +98,7 @@ nv40_render_prim(struct draw_stage *stage, struct prim_header *prim, assert(0); } FIRE_RING(chan); - nv40_state_emit(nvfx); + nvfx_state_emit(nvfx); } /* Switch primitive modes if necessary */ @@ -245,10 +245,10 @@ nv40_draw_elements_swtnl(struct pipe_context *pipe, unsigned i; void *map; - if (!nv40_state_validate_swtnl(nvfx)) + if (!nvfx_state_validate_swtnl(nvfx)) return; nvfx->state.dirty &= ~(1ULL << NVFX_STATE_VTXBUF); - nv40_state_emit(nvfx); + nvfx_state_emit(nvfx); for (i = 0; i < nvfx->vtxbuf_nr; i++) { map = pipe_buffer_map(pscreen, nvfx->vtxbuf[i].buffer, diff --git a/src/gallium/drivers/nv40/nv40_state_emit.c b/src/gallium/drivers/nv40/nv40_state_emit.c deleted file mode 100644 index 5c437f9969..0000000000 --- a/src/gallium/drivers/nv40/nv40_state_emit.c +++ /dev/null @@ -1,189 +0,0 @@ -#include "nv40_context.h" -#include "nvfx_state.h" -#include "draw/draw_context.h" - -static struct nvfx_state_entry *render_states[] = { - &nv40_state_framebuffer, - &nv40_state_rasterizer, - &nv40_state_scissor, - &nv40_state_stipple, - &nv40_state_fragprog, - &nv40_state_fragtex, - &nv40_state_vertprog, - &nv40_state_blend, - &nv40_state_blend_colour, - &nv40_state_zsa, - &nv40_state_sr, - &nv40_state_viewport, - &nv40_state_vbo, - NULL -}; - -static struct nvfx_state_entry *swtnl_states[] = { - &nv40_state_framebuffer, - &nv40_state_rasterizer, - &nv40_state_scissor, - &nv40_state_stipple, - &nv40_state_fragprog, - &nv40_state_fragtex, - &nv40_state_vertprog, - &nv40_state_blend, - &nv40_state_blend_colour, - &nv40_state_zsa, - &nv40_state_sr, - &nv40_state_viewport, - &nv40_state_vtxfmt, - NULL -}; - -static void -nv40_state_do_validate(struct nvfx_context *nvfx, - struct nvfx_state_entry **states) -{ - while (*states) { - struct nvfx_state_entry *e = *states; - - if (nvfx->dirty & e->dirty.pipe) { - if (e->validate(nvfx)) - nvfx->state.dirty |= (1ULL << e->dirty.hw); - } - - states++; - } - nvfx->dirty = 0; -} - -void -nv40_state_emit(struct nvfx_context *nvfx) -{ - struct nvfx_state *state = &nvfx->state; - struct nvfx_screen *screen = nvfx->screen; - struct nouveau_channel *chan = screen->base.channel; - struct nouveau_grobj *eng3d = screen->eng3d; - unsigned i; - uint64_t states; - - /* XXX: race conditions - */ - if (nvfx != screen->cur_ctx) { - for (i = 0; i < NVFX_STATE_MAX; i++) { - if (state->hw[i] && screen->state[i] != state->hw[i]) - state->dirty |= (1ULL << i); - } - - screen->cur_ctx = nvfx; - } - - for (i = 0, states = state->dirty; states; i++) { - if (!(states & (1ULL << i))) - continue; - so_ref (state->hw[i], &nvfx->screen->state[i]); - if (state->hw[i]) - so_emit(chan, nvfx->screen->state[i]); - states &= ~(1ULL << i); - } - - if (state->dirty & ((1ULL << NVFX_STATE_FRAGPROG) | - (1ULL << NVFX_STATE_FRAGTEX0))) { - BEGIN_RING(chan, eng3d, NV40TCL_TEX_CACHE_CTL, 1); - OUT_RING (chan, 2); - BEGIN_RING(chan, eng3d, NV40TCL_TEX_CACHE_CTL, 1); - OUT_RING (chan, 1); - } - - state->dirty = 0; -} - -void -nv40_state_flush_notify(struct nouveau_channel *chan) -{ - struct nvfx_context *nvfx = chan->user_private; - struct nvfx_state *state = &nvfx->state; - unsigned i, samplers; - - so_emit_reloc_markers(chan, state->hw[NVFX_STATE_FB]); - for (i = 0, samplers = state->fp_samplers; i < 16 && samplers; i++) { - if (!(samplers & (1 << i))) - continue; - so_emit_reloc_markers(chan, - state->hw[NVFX_STATE_FRAGTEX0+i]); - samplers &= ~(1ULL << i); - } - so_emit_reloc_markers(chan, state->hw[NVFX_STATE_FRAGPROG]); - if (state->hw[NVFX_STATE_VTXBUF] && nvfx->render_mode == HW) - so_emit_reloc_markers(chan, state->hw[NVFX_STATE_VTXBUF]); -} - -boolean -nv40_state_validate(struct nvfx_context *nvfx) -{ - boolean was_sw = nvfx->fallback_swtnl ? TRUE : FALSE; - - if (nvfx->render_mode != HW) { - /* Don't even bother trying to go back to hw if none - * of the states that caused swtnl previously have changed. - */ - if ((nvfx->fallback_swtnl & nvfx->dirty) - != nvfx->fallback_swtnl) - return FALSE; - - /* Attempt to go to hwtnl again */ - nvfx->pipe.flush(&nvfx->pipe, 0, NULL); - nvfx->dirty |= (NVFX_NEW_VIEWPORT | - NVFX_NEW_VERTPROG | - NVFX_NEW_ARRAYS); - nvfx->render_mode = HW; - } - - nv40_state_do_validate(nvfx, render_states); - if (nvfx->fallback_swtnl || nvfx->fallback_swrast) - return FALSE; - - if (was_sw) - NOUVEAU_ERR("swtnl->hw\n"); - - return TRUE; -} - -boolean -nv40_state_validate_swtnl(struct nvfx_context *nvfx) -{ - struct draw_context *draw = nvfx->draw; - - /* Setup for swtnl */ - if (nvfx->render_mode == HW) { - NOUVEAU_ERR("hw->swtnl 0x%08x\n", nvfx->fallback_swtnl); - nvfx->pipe.flush(&nvfx->pipe, 0, NULL); - nvfx->dirty |= (NVFX_NEW_VIEWPORT | - NVFX_NEW_VERTPROG | - NVFX_NEW_ARRAYS); - nvfx->render_mode = SWTNL; - } - - if (nvfx->draw_dirty & NVFX_NEW_VERTPROG) - draw_bind_vertex_shader(draw, nvfx->vertprog->draw); - - if (nvfx->draw_dirty & NVFX_NEW_RAST) - draw_set_rasterizer_state(draw, &nvfx->rasterizer->pipe); - - if (nvfx->draw_dirty & NVFX_NEW_UCP) - draw_set_clip_state(draw, &nvfx->clip); - - if (nvfx->draw_dirty & NVFX_NEW_VIEWPORT) - draw_set_viewport_state(draw, &nvfx->viewport); - - if (nvfx->draw_dirty & NVFX_NEW_ARRAYS) { - draw_set_vertex_buffers(draw, nvfx->vtxbuf_nr, nvfx->vtxbuf); - draw_set_vertex_elements(draw, nvfx->vtxelt->num_elements, nvfx->vtxelt->pipe); - } - - nv40_state_do_validate(nvfx, swtnl_states); - if (nvfx->fallback_swrast) { - NOUVEAU_ERR("swtnl->swrast 0x%08x\n", nvfx->fallback_swrast); - return FALSE; - } - - nvfx->draw_dirty = 0; - return TRUE; -} - diff --git a/src/gallium/drivers/nv40/nv40_vbo.c b/src/gallium/drivers/nv40/nv40_vbo.c index 0738d5c93b..456b508d43 100644 --- a/src/gallium/drivers/nv40/nv40_vbo.c +++ b/src/gallium/drivers/nv40/nv40_vbo.c @@ -176,7 +176,7 @@ nv40_draw_arrays(struct pipe_context *pipe, unsigned restart; nv40_vbo_set_idxbuf(nvfx, NULL, 0); - if (FORCE_SWTNL || !nv40_state_validate(nvfx)) { + if (FORCE_SWTNL || !nvfx_state_validate(nvfx)) { nv40_draw_elements_swtnl(pipe, NULL, 0, mode, start, count); return; @@ -185,7 +185,7 @@ nv40_draw_arrays(struct pipe_context *pipe, while (count) { unsigned vc, nr; - nv40_state_emit(nvfx); + nvfx_state_emit(nvfx); vc = nouveau_vbuf_split(AVAIL_RING(chan), 6, 256, mode, start, count, &restart); @@ -239,7 +239,7 @@ nv40_draw_elements_u08(struct nvfx_context *nvfx, void *ib, uint8_t *elts = (uint8_t *)ib + start; unsigned vc, push, restart; - nv40_state_emit(nvfx); + nvfx_state_emit(nvfx); vc = nouveau_vbuf_split(AVAIL_RING(chan), 6, 2, mode, start, count, &restart); @@ -290,7 +290,7 @@ nv40_draw_elements_u16(struct nvfx_context *nvfx, void *ib, uint16_t *elts = (uint16_t *)ib + start; unsigned vc, push, restart; - nv40_state_emit(nvfx); + nvfx_state_emit(nvfx); vc = nouveau_vbuf_split(AVAIL_RING(chan), 6, 2, mode, start, count, &restart); @@ -341,7 +341,7 @@ nv40_draw_elements_u32(struct nvfx_context *nvfx, void *ib, uint32_t *elts = (uint32_t *)ib + start; unsigned vc, push, restart; - nv40_state_emit(nvfx); + nvfx_state_emit(nvfx); vc = nouveau_vbuf_split(AVAIL_RING(chan), 5, 1, mode, start, count, &restart); @@ -417,7 +417,7 @@ nv40_draw_elements_vbo(struct pipe_context *pipe, while (count) { unsigned nr, vc; - nv40_state_emit(nvfx); + nvfx_state_emit(nvfx); vc = nouveau_vbuf_split(AVAIL_RING(chan), 6, 256, mode, start, count, &restart); @@ -466,7 +466,7 @@ nv40_draw_elements(struct pipe_context *pipe, boolean idxbuf; idxbuf = nv40_vbo_set_idxbuf(nvfx, indexBuffer, indexSize); - if (FORCE_SWTNL || !nv40_state_validate(nvfx)) { + if (FORCE_SWTNL || !nvfx_state_validate(nvfx)) { nv40_draw_elements_swtnl(pipe, NULL, 0, mode, start, count); return; diff --git a/src/gallium/drivers/nvfx/Makefile b/src/gallium/drivers/nvfx/Makefile index 699cbedbc8..0eb1bebeb3 100644 --- a/src/gallium/drivers/nvfx/Makefile +++ b/src/gallium/drivers/nvfx/Makefile @@ -5,6 +5,7 @@ LIBNAME = nvfx C_SOURCES = \ nvfx_clear.c \ + nvfx_state_emit.c \ nvfx_transfer.c include ../../Makefile.template diff --git a/src/gallium/drivers/nvfx/nvfx_context.h b/src/gallium/drivers/nvfx/nvfx_context.h index 38d1142ff9..3d4bc6bbc9 100644 --- a/src/gallium/drivers/nvfx/nvfx_context.h +++ b/src/gallium/drivers/nvfx/nvfx_context.h @@ -185,6 +185,12 @@ struct nvfx_state_entry { extern void nvfx_clear(struct pipe_context *pipe, unsigned buffers, const float *rgba, double depth, unsigned stencil); +/* nvfx_state_emit.c */ +extern void nvfx_state_flush_notify(struct nouveau_channel *chan); +extern boolean nvfx_state_validate(struct nvfx_context *nvfx); +extern boolean nvfx_state_validate_swtnl(struct nvfx_context *nvfx); +extern void nvfx_state_emit(struct nvfx_context *nvfx); + /* nvfx_transfer.c */ extern void nvfx_init_transfer_functions(struct nvfx_context *nvfx); diff --git a/src/gallium/drivers/nvfx/nvfx_state_emit.c b/src/gallium/drivers/nvfx/nvfx_state_emit.c new file mode 100644 index 0000000000..9582ba9648 --- /dev/null +++ b/src/gallium/drivers/nvfx/nvfx_state_emit.c @@ -0,0 +1,188 @@ +#include "nv30/nv30_context.h" +#include "nv40/nv40_context.h" +#include "nvfx_state.h" +#include "draw/draw_context.h" + +#define RENDER_STATES(name, nvxx, vbo) \ +static struct nvfx_state_entry *name##_render_states[] = { \ + &nvxx##_state_framebuffer, \ + &nvxx##_state_rasterizer, \ + &nvxx##_state_scissor, \ + &nvxx##_state_stipple, \ + &nvxx##_state_fragprog, \ + &nvxx##_state_fragtex, \ + &nvxx##_state_vertprog, \ + &nvxx##_state_blend, \ + &nvxx##_state_blend_colour, \ + &nvxx##_state_zsa, \ + &nvxx##_state_sr, \ + &nvxx##_state_viewport, \ + &nvxx##_state_##vbo, \ + NULL \ +} + +RENDER_STATES(nv30, nv30, vbo); +RENDER_STATES(nv30_swtnl, nv30, vbo); /* TODO: replace with vtxfmt once draw is unified */ +RENDER_STATES(nv40, nv40, vbo); +RENDER_STATES(nv40_swtnl, nv40, vtxfmt); + +static void +nvfx_state_do_validate(struct nvfx_context *nvfx, + struct nvfx_state_entry **states) +{ + while (*states) { + struct nvfx_state_entry *e = *states; + + if (nvfx->dirty & e->dirty.pipe) { + if (e->validate(nvfx)) + nvfx->state.dirty |= (1ULL << e->dirty.hw); + } + + states++; + } + nvfx->dirty = 0; +} + +void +nvfx_state_emit(struct nvfx_context *nvfx) +{ + struct nvfx_state *state = &nvfx->state; + struct nvfx_screen *screen = nvfx->screen; + struct nouveau_channel *chan = screen->base.channel; + struct nouveau_grobj *eng3d = screen->eng3d; + unsigned i; + uint64_t states; + + /* XXX: race conditions + */ + if (nvfx != screen->cur_ctx) { + for (i = 0; i < NVFX_STATE_MAX; i++) { + if (state->hw[i] && screen->state[i] != state->hw[i]) + state->dirty |= (1ULL << i); + } + + screen->cur_ctx = nvfx; + } + + for (i = 0, states = state->dirty; states; i++) { + if (!(states & (1ULL << i))) + continue; + so_ref (state->hw[i], &nvfx->screen->state[i]); + if (state->hw[i]) + so_emit(chan, nvfx->screen->state[i]); + states &= ~(1ULL << i); + } + + /* TODO: could nv30 need this or something similar too? */ + if(nvfx->is_nv4x) { + if (state->dirty & ((1ULL << NVFX_STATE_FRAGPROG) | + (1ULL << NVFX_STATE_FRAGTEX0))) { + BEGIN_RING(chan, eng3d, NV40TCL_TEX_CACHE_CTL, 1); + OUT_RING (chan, 2); + BEGIN_RING(chan, eng3d, NV40TCL_TEX_CACHE_CTL, 1); + OUT_RING (chan, 1); + } + } + state->dirty = 0; +} + +void +nvfx_state_flush_notify(struct nouveau_channel *chan) +{ + struct nvfx_context *nvfx = chan->user_private; + struct nvfx_state *state = &nvfx->state; + unsigned i, samplers; + + so_emit_reloc_markers(chan, state->hw[NVFX_STATE_FB]); + for (i = 0, samplers = state->fp_samplers; i < 16 && samplers; i++) { + if (!(samplers & (1 << i))) + continue; + so_emit_reloc_markers(chan, + state->hw[NVFX_STATE_FRAGTEX0+i]); + samplers &= ~(1ULL << i); + } + so_emit_reloc_markers(chan, state->hw[NVFX_STATE_FRAGPROG]); + if (state->hw[NVFX_STATE_VTXBUF] && nvfx->render_mode == HW) + so_emit_reloc_markers(chan, state->hw[NVFX_STATE_VTXBUF]); +} + +boolean +nvfx_state_validate(struct nvfx_context *nvfx) +{ + boolean was_sw = nvfx->fallback_swtnl ? TRUE : FALSE; + + if (nvfx->render_mode != HW) { + /* Don't even bother trying to go back to hw if none + * of the states that caused swtnl previously have changed. + */ + if ((nvfx->fallback_swtnl & nvfx->dirty) + != nvfx->fallback_swtnl) + return FALSE; + + /* Attempt to go to hwtnl again */ + nvfx->pipe.flush(&nvfx->pipe, 0, NULL); + nvfx->dirty |= (NVFX_NEW_VIEWPORT | + NVFX_NEW_VERTPROG | + NVFX_NEW_ARRAYS); + nvfx->render_mode = HW; + } + + if(!nvfx->is_nv4x) + nvfx_state_do_validate(nvfx, nv30_render_states); + else + nvfx_state_do_validate(nvfx, nv40_render_states); + + if (nvfx->fallback_swtnl || nvfx->fallback_swrast) + return FALSE; + + if (was_sw) + NOUVEAU_ERR("swtnl->hw\n"); + + return TRUE; +} + +boolean +nvfx_state_validate_swtnl(struct nvfx_context *nvfx) +{ + struct draw_context *draw = nvfx->draw; + + /* Setup for swtnl */ + if (nvfx->render_mode == HW) { + NOUVEAU_ERR("hw->swtnl 0x%08x\n", nvfx->fallback_swtnl); + nvfx->pipe.flush(&nvfx->pipe, 0, NULL); + nvfx->dirty |= (NVFX_NEW_VIEWPORT | + NVFX_NEW_VERTPROG | + NVFX_NEW_ARRAYS); + nvfx->render_mode = SWTNL; + } + + if (nvfx->draw_dirty & NVFX_NEW_VERTPROG) + draw_bind_vertex_shader(draw, nvfx->vertprog->draw); + + if (nvfx->draw_dirty & NVFX_NEW_RAST) + draw_set_rasterizer_state(draw, &nvfx->rasterizer->pipe); + + if (nvfx->draw_dirty & NVFX_NEW_UCP) + draw_set_clip_state(draw, &nvfx->clip); + + if (nvfx->draw_dirty & NVFX_NEW_VIEWPORT) + draw_set_viewport_state(draw, &nvfx->viewport); + + if (nvfx->draw_dirty & NVFX_NEW_ARRAYS) { + draw_set_vertex_buffers(draw, nvfx->vtxbuf_nr, nvfx->vtxbuf); + draw_set_vertex_elements(draw, nvfx->vtxelt->num_elements, nvfx->vtxelt->pipe); + } + + if(!nvfx->is_nv4x) + nvfx_state_do_validate(nvfx, nv30_swtnl_render_states); + else + nvfx_state_do_validate(nvfx, nv40_swtnl_render_states); + + if (nvfx->fallback_swrast) { + NOUVEAU_ERR("swtnl->swrast 0x%08x\n", nvfx->fallback_swrast); + return FALSE; + } + + nvfx->draw_dirty = 0; + return TRUE; +} -- cgit v1.2.3 From 0b55e1cd17801a03d6fbb7ce46f25aa2b086bff4 Mon Sep 17 00:00:00 2001 From: Luca Barbieri Date: Sat, 20 Feb 2010 20:37:17 +0100 Subject: nv30, nv40: unify identical nv[34]0_state_blend.c --- src/gallium/drivers/nv30/Makefile | 1 - src/gallium/drivers/nv30/nv30_context.h | 2 -- src/gallium/drivers/nv30/nv30_state_blend.c | 41 ----------------------------- src/gallium/drivers/nv40/Makefile | 1 - src/gallium/drivers/nv40/nv40_context.h | 2 -- src/gallium/drivers/nv40/nv40_state_blend.c | 41 ----------------------------- src/gallium/drivers/nvfx/Makefile | 1 + src/gallium/drivers/nvfx/nvfx_context.h | 3 +++ src/gallium/drivers/nvfx/nvfx_state_blend.c | 41 +++++++++++++++++++++++++++++ src/gallium/drivers/nvfx/nvfx_state_emit.c | 4 +-- 10 files changed, 47 insertions(+), 90 deletions(-) delete mode 100644 src/gallium/drivers/nv30/nv30_state_blend.c delete mode 100644 src/gallium/drivers/nv40/nv40_state_blend.c create mode 100644 src/gallium/drivers/nvfx/nvfx_state_blend.c (limited to 'src') diff --git a/src/gallium/drivers/nv30/Makefile b/src/gallium/drivers/nv30/Makefile index 3067e45062..66dad8f358 100644 --- a/src/gallium/drivers/nv30/Makefile +++ b/src/gallium/drivers/nv30/Makefile @@ -12,7 +12,6 @@ C_SOURCES = \ nv30_query.c \ nv30_screen.c \ nv30_state.c \ - nv30_state_blend.c \ nv30_state_fb.c \ nv30_state_rasterizer.c \ nv30_state_scissor.c \ diff --git a/src/gallium/drivers/nv30/nv30_context.h b/src/gallium/drivers/nv30/nv30_context.h index a6767da4dc..e6194b23f5 100644 --- a/src/gallium/drivers/nv30/nv30_context.h +++ b/src/gallium/drivers/nv30/nv30_context.h @@ -29,8 +29,6 @@ extern struct nvfx_state_entry nv30_state_scissor; extern struct nvfx_state_entry nv30_state_stipple; extern struct nvfx_state_entry nv30_state_fragprog; extern struct nvfx_state_entry nv30_state_vertprog; -extern struct nvfx_state_entry nv30_state_blend; -extern struct nvfx_state_entry nv30_state_blend_colour; extern struct nvfx_state_entry nv30_state_zsa; extern struct nvfx_state_entry nv30_state_viewport; extern struct nvfx_state_entry nv30_state_framebuffer; diff --git a/src/gallium/drivers/nv30/nv30_state_blend.c b/src/gallium/drivers/nv30/nv30_state_blend.c deleted file mode 100644 index de368e5bd7..0000000000 --- a/src/gallium/drivers/nv30/nv30_state_blend.c +++ /dev/null @@ -1,41 +0,0 @@ -#include "nv30_context.h" - -static boolean -nv30_state_blend_validate(struct nvfx_context *nvfx) -{ - so_ref(nvfx->blend->so, &nvfx->state.hw[NVFX_STATE_BLEND]); - return TRUE; -} - -struct nvfx_state_entry nv30_state_blend = { - .validate = nv30_state_blend_validate, - .dirty = { - .pipe = NVFX_NEW_BLEND, - .hw = NVFX_STATE_BLEND - } -}; - -static boolean -nv30_state_blend_colour_validate(struct nvfx_context *nvfx) -{ - struct nouveau_stateobj *so = so_new(1, 1, 0); - struct pipe_blend_color *bcol = &nvfx->blend_colour; - - so_method(so, nvfx->screen->eng3d, NV34TCL_BLEND_COLOR, 1); - so_data (so, ((float_to_ubyte(bcol->color[3]) << 24) | - (float_to_ubyte(bcol->color[0]) << 16) | - (float_to_ubyte(bcol->color[1]) << 8) | - (float_to_ubyte(bcol->color[2]) << 0))); - - so_ref(so, &nvfx->state.hw[NVFX_STATE_BCOL]); - so_ref(NULL, &so); - return TRUE; -} - -struct nvfx_state_entry nv30_state_blend_colour = { - .validate = nv30_state_blend_colour_validate, - .dirty = { - .pipe = NVFX_NEW_BCOL, - .hw = NVFX_STATE_BCOL - } -}; diff --git a/src/gallium/drivers/nv40/Makefile b/src/gallium/drivers/nv40/Makefile index b0c0c09d51..739ca43387 100644 --- a/src/gallium/drivers/nv40/Makefile +++ b/src/gallium/drivers/nv40/Makefile @@ -12,7 +12,6 @@ C_SOURCES = \ nv40_query.c \ nv40_screen.c \ nv40_state.c \ - nv40_state_blend.c \ nv40_state_fb.c \ nv40_state_rasterizer.c \ nv40_state_scissor.c \ diff --git a/src/gallium/drivers/nv40/nv40_context.h b/src/gallium/drivers/nv40/nv40_context.h index 0b875bcb06..28a79e4ecf 100644 --- a/src/gallium/drivers/nv40/nv40_context.h +++ b/src/gallium/drivers/nv40/nv40_context.h @@ -33,8 +33,6 @@ extern struct nvfx_state_entry nv40_state_scissor; extern struct nvfx_state_entry nv40_state_stipple; extern struct nvfx_state_entry nv40_state_fragprog; extern struct nvfx_state_entry nv40_state_vertprog; -extern struct nvfx_state_entry nv40_state_blend; -extern struct nvfx_state_entry nv40_state_blend_colour; extern struct nvfx_state_entry nv40_state_zsa; extern struct nvfx_state_entry nv40_state_viewport; extern struct nvfx_state_entry nv40_state_framebuffer; diff --git a/src/gallium/drivers/nv40/nv40_state_blend.c b/src/gallium/drivers/nv40/nv40_state_blend.c deleted file mode 100644 index bb06b4888d..0000000000 --- a/src/gallium/drivers/nv40/nv40_state_blend.c +++ /dev/null @@ -1,41 +0,0 @@ -#include "nv40_context.h" - -static boolean -nv40_state_blend_validate(struct nvfx_context *nvfx) -{ - so_ref(nvfx->blend->so, &nvfx->state.hw[NVFX_STATE_BLEND]); - return TRUE; -} - -struct nvfx_state_entry nv40_state_blend = { - .validate = nv40_state_blend_validate, - .dirty = { - .pipe = NVFX_NEW_BLEND, - .hw = NVFX_STATE_BLEND - } -}; - -static boolean -nv40_state_blend_colour_validate(struct nvfx_context *nvfx) -{ - struct nouveau_stateobj *so = so_new(1, 1, 0); - struct pipe_blend_color *bcol = &nvfx->blend_colour; - - so_method(so, nvfx->screen->eng3d, NV34TCL_BLEND_COLOR, 1); - so_data (so, ((float_to_ubyte(bcol->color[3]) << 24) | - (float_to_ubyte(bcol->color[0]) << 16) | - (float_to_ubyte(bcol->color[1]) << 8) | - (float_to_ubyte(bcol->color[2]) << 0))); - - so_ref(so, &nvfx->state.hw[NVFX_STATE_BCOL]); - so_ref(NULL, &so); - return TRUE; -} - -struct nvfx_state_entry nv40_state_blend_colour = { - .validate = nv40_state_blend_colour_validate, - .dirty = { - .pipe = NVFX_NEW_BCOL, - .hw = NVFX_STATE_BCOL - } -}; diff --git a/src/gallium/drivers/nvfx/Makefile b/src/gallium/drivers/nvfx/Makefile index 0eb1bebeb3..d124de89ec 100644 --- a/src/gallium/drivers/nvfx/Makefile +++ b/src/gallium/drivers/nvfx/Makefile @@ -6,6 +6,7 @@ LIBNAME = nvfx C_SOURCES = \ nvfx_clear.c \ nvfx_state_emit.c \ + nvfx_state_blend.c \ nvfx_transfer.c include ../../Makefile.template diff --git a/src/gallium/drivers/nvfx/nvfx_context.h b/src/gallium/drivers/nvfx/nvfx_context.h index 3d4bc6bbc9..bbffb8a18d 100644 --- a/src/gallium/drivers/nvfx/nvfx_context.h +++ b/src/gallium/drivers/nvfx/nvfx_context.h @@ -181,6 +181,9 @@ struct nvfx_state_entry { } dirty; }; +extern struct nvfx_state_entry nvfx_state_blend; +extern struct nvfx_state_entry nvfx_state_blend_colour; + /* nvfx_clear.c */ extern void nvfx_clear(struct pipe_context *pipe, unsigned buffers, const float *rgba, double depth, unsigned stencil); diff --git a/src/gallium/drivers/nvfx/nvfx_state_blend.c b/src/gallium/drivers/nvfx/nvfx_state_blend.c new file mode 100644 index 0000000000..03b6ef8117 --- /dev/null +++ b/src/gallium/drivers/nvfx/nvfx_state_blend.c @@ -0,0 +1,41 @@ +#include "nvfx_context.h" + +static boolean +nvfx_state_blend_validate(struct nvfx_context *nvfx) +{ + so_ref(nvfx->blend->so, &nvfx->state.hw[NVFX_STATE_BLEND]); + return TRUE; +} + +struct nvfx_state_entry nvfx_state_blend = { + .validate = nvfx_state_blend_validate, + .dirty = { + .pipe = NVFX_NEW_BLEND, + .hw = NVFX_STATE_BLEND + } +}; + +static boolean +nvfx_state_blend_colour_validate(struct nvfx_context *nvfx) +{ + struct nouveau_stateobj *so = so_new(1, 1, 0); + struct pipe_blend_color *bcol = &nvfx->blend_colour; + + so_method(so, nvfx->screen->eng3d, NV34TCL_BLEND_COLOR, 1); + so_data (so, ((float_to_ubyte(bcol->color[3]) << 24) | + (float_to_ubyte(bcol->color[0]) << 16) | + (float_to_ubyte(bcol->color[1]) << 8) | + (float_to_ubyte(bcol->color[2]) << 0))); + + so_ref(so, &nvfx->state.hw[NVFX_STATE_BCOL]); + so_ref(NULL, &so); + return TRUE; +} + +struct nvfx_state_entry nvfx_state_blend_colour = { + .validate = nvfx_state_blend_colour_validate, + .dirty = { + .pipe = NVFX_NEW_BCOL, + .hw = NVFX_STATE_BCOL + } +}; diff --git a/src/gallium/drivers/nvfx/nvfx_state_emit.c b/src/gallium/drivers/nvfx/nvfx_state_emit.c index 9582ba9648..059bbb14b7 100644 --- a/src/gallium/drivers/nvfx/nvfx_state_emit.c +++ b/src/gallium/drivers/nvfx/nvfx_state_emit.c @@ -12,8 +12,8 @@ static struct nvfx_state_entry *name##_render_states[] = { \ &nvxx##_state_fragprog, \ &nvxx##_state_fragtex, \ &nvxx##_state_vertprog, \ - &nvxx##_state_blend, \ - &nvxx##_state_blend_colour, \ + &nvfx_state_blend, \ + &nvfx_state_blend_colour, \ &nvxx##_state_zsa, \ &nvxx##_state_sr, \ &nvxx##_state_viewport, \ -- cgit v1.2.3 From ada801222b3c984c260165415864a8f511145251 Mon Sep 17 00:00:00 2001 From: Luca Barbieri Date: Sat, 20 Feb 2010 23:16:01 +0100 Subject: nv30, nv40: unify identical nv[34]0_state_rasterizer.c --- src/gallium/drivers/nv30/Makefile | 1 - src/gallium/drivers/nv30/nv30_context.h | 1 - src/gallium/drivers/nv30/nv30_state_rasterizer.c | 17 ----------------- src/gallium/drivers/nv40/Makefile | 1 - src/gallium/drivers/nv40/nv40_context.h | 1 - src/gallium/drivers/nv40/nv40_state_rasterizer.c | 17 ----------------- src/gallium/drivers/nvfx/Makefile | 1 + src/gallium/drivers/nvfx/nvfx_context.h | 1 + src/gallium/drivers/nvfx/nvfx_state_emit.c | 2 +- src/gallium/drivers/nvfx/nvfx_state_rasterizer.c | 17 +++++++++++++++++ 10 files changed, 20 insertions(+), 39 deletions(-) delete mode 100644 src/gallium/drivers/nv30/nv30_state_rasterizer.c delete mode 100644 src/gallium/drivers/nv40/nv40_state_rasterizer.c create mode 100644 src/gallium/drivers/nvfx/nvfx_state_rasterizer.c (limited to 'src') diff --git a/src/gallium/drivers/nv30/Makefile b/src/gallium/drivers/nv30/Makefile index 66dad8f358..668f5965b1 100644 --- a/src/gallium/drivers/nv30/Makefile +++ b/src/gallium/drivers/nv30/Makefile @@ -13,7 +13,6 @@ C_SOURCES = \ nv30_screen.c \ nv30_state.c \ nv30_state_fb.c \ - nv30_state_rasterizer.c \ nv30_state_scissor.c \ nv30_state_stipple.c \ nv30_state_viewport.c \ diff --git a/src/gallium/drivers/nv30/nv30_context.h b/src/gallium/drivers/nv30/nv30_context.h index e6194b23f5..fbafbec383 100644 --- a/src/gallium/drivers/nv30/nv30_context.h +++ b/src/gallium/drivers/nv30/nv30_context.h @@ -24,7 +24,6 @@ extern void nv30_fragprog_destroy(struct nvfx_context *, extern void nv30_fragtex_bind(struct nvfx_context *); /* nv30_state.c and friends */ -extern struct nvfx_state_entry nv30_state_rasterizer; extern struct nvfx_state_entry nv30_state_scissor; extern struct nvfx_state_entry nv30_state_stipple; extern struct nvfx_state_entry nv30_state_fragprog; diff --git a/src/gallium/drivers/nv30/nv30_state_rasterizer.c b/src/gallium/drivers/nv30/nv30_state_rasterizer.c deleted file mode 100644 index 1a83da5204..0000000000 --- a/src/gallium/drivers/nv30/nv30_state_rasterizer.c +++ /dev/null @@ -1,17 +0,0 @@ -#include "nv30_context.h" - -static boolean -nv30_state_rasterizer_validate(struct nvfx_context *nvfx) -{ - so_ref(nvfx->rasterizer->so, - &nvfx->state.hw[NVFX_STATE_RAST]); - return TRUE; -} - -struct nvfx_state_entry nv30_state_rasterizer = { - .validate = nv30_state_rasterizer_validate, - .dirty = { - .pipe = NVFX_NEW_RAST, - .hw = NVFX_STATE_RAST - } -}; diff --git a/src/gallium/drivers/nv40/Makefile b/src/gallium/drivers/nv40/Makefile index 739ca43387..25ad2974bf 100644 --- a/src/gallium/drivers/nv40/Makefile +++ b/src/gallium/drivers/nv40/Makefile @@ -13,7 +13,6 @@ C_SOURCES = \ nv40_screen.c \ nv40_state.c \ nv40_state_fb.c \ - nv40_state_rasterizer.c \ nv40_state_scissor.c \ nv40_state_stipple.c \ nv40_state_viewport.c \ diff --git a/src/gallium/drivers/nv40/nv40_context.h b/src/gallium/drivers/nv40/nv40_context.h index 28a79e4ecf..fc8b06bd0f 100644 --- a/src/gallium/drivers/nv40/nv40_context.h +++ b/src/gallium/drivers/nv40/nv40_context.h @@ -28,7 +28,6 @@ extern void nv40_fragprog_destroy(struct nvfx_context *, extern void nv40_fragtex_bind(struct nvfx_context *); /* nv40_state.c and friends */ -extern struct nvfx_state_entry nv40_state_rasterizer; extern struct nvfx_state_entry nv40_state_scissor; extern struct nvfx_state_entry nv40_state_stipple; extern struct nvfx_state_entry nv40_state_fragprog; diff --git a/src/gallium/drivers/nv40/nv40_state_rasterizer.c b/src/gallium/drivers/nv40/nv40_state_rasterizer.c deleted file mode 100644 index d6136a26eb..0000000000 --- a/src/gallium/drivers/nv40/nv40_state_rasterizer.c +++ /dev/null @@ -1,17 +0,0 @@ -#include "nv40_context.h" - -static boolean -nv40_state_rasterizer_validate(struct nvfx_context *nvfx) -{ - so_ref(nvfx->rasterizer->so, - &nvfx->state.hw[NVFX_STATE_RAST]); - return TRUE; -} - -struct nvfx_state_entry nv40_state_rasterizer = { - .validate = nv40_state_rasterizer_validate, - .dirty = { - .pipe = NVFX_NEW_RAST, - .hw = NVFX_STATE_RAST - } -}; diff --git a/src/gallium/drivers/nvfx/Makefile b/src/gallium/drivers/nvfx/Makefile index d124de89ec..f1843b61df 100644 --- a/src/gallium/drivers/nvfx/Makefile +++ b/src/gallium/drivers/nvfx/Makefile @@ -7,6 +7,7 @@ C_SOURCES = \ nvfx_clear.c \ nvfx_state_emit.c \ nvfx_state_blend.c \ + nvfx_state_rasterizer.c \ nvfx_transfer.c include ../../Makefile.template diff --git a/src/gallium/drivers/nvfx/nvfx_context.h b/src/gallium/drivers/nvfx/nvfx_context.h index bbffb8a18d..c7ce17ab38 100644 --- a/src/gallium/drivers/nvfx/nvfx_context.h +++ b/src/gallium/drivers/nvfx/nvfx_context.h @@ -183,6 +183,7 @@ struct nvfx_state_entry { extern struct nvfx_state_entry nvfx_state_blend; extern struct nvfx_state_entry nvfx_state_blend_colour; +extern struct nvfx_state_entry nvfx_state_rasterizer; /* nvfx_clear.c */ extern void nvfx_clear(struct pipe_context *pipe, unsigned buffers, diff --git a/src/gallium/drivers/nvfx/nvfx_state_emit.c b/src/gallium/drivers/nvfx/nvfx_state_emit.c index 059bbb14b7..60df50aa1c 100644 --- a/src/gallium/drivers/nvfx/nvfx_state_emit.c +++ b/src/gallium/drivers/nvfx/nvfx_state_emit.c @@ -6,7 +6,7 @@ #define RENDER_STATES(name, nvxx, vbo) \ static struct nvfx_state_entry *name##_render_states[] = { \ &nvxx##_state_framebuffer, \ - &nvxx##_state_rasterizer, \ + &nvfx_state_rasterizer, \ &nvxx##_state_scissor, \ &nvxx##_state_stipple, \ &nvxx##_state_fragprog, \ diff --git a/src/gallium/drivers/nvfx/nvfx_state_rasterizer.c b/src/gallium/drivers/nvfx/nvfx_state_rasterizer.c new file mode 100644 index 0000000000..0d35ecbf20 --- /dev/null +++ b/src/gallium/drivers/nvfx/nvfx_state_rasterizer.c @@ -0,0 +1,17 @@ +#include "nvfx_context.h" + +static boolean +nvfx_state_rasterizer_validate(struct nvfx_context *nvfx) +{ + so_ref(nvfx->rasterizer->so, + &nvfx->state.hw[NVFX_STATE_RAST]); + return TRUE; +} + +struct nvfx_state_entry nvfx_state_rasterizer = { + .validate = nvfx_state_rasterizer_validate, + .dirty = { + .pipe = NVFX_NEW_RAST, + .hw = NVFX_STATE_RAST + } +}; -- cgit v1.2.3 From 938c6905cfa4e25c8e898c8d91ee0fe8174abe0b Mon Sep 17 00:00:00 2001 From: Luca Barbieri Date: Sat, 20 Feb 2010 23:17:41 +0100 Subject: nv30, nv40: unify identical nv[34]0_state_scissor.c --- src/gallium/drivers/nv30/Makefile | 1 - src/gallium/drivers/nv30/nv30_context.h | 1 - src/gallium/drivers/nv30/nv30_state_scissor.c | 36 --------------------------- src/gallium/drivers/nv40/Makefile | 1 - src/gallium/drivers/nv40/nv40_context.h | 1 - src/gallium/drivers/nv40/nv40_state_scissor.c | 36 --------------------------- src/gallium/drivers/nvfx/Makefile | 1 + src/gallium/drivers/nvfx/nvfx_context.h | 1 + src/gallium/drivers/nvfx/nvfx_state_emit.c | 2 +- src/gallium/drivers/nvfx/nvfx_state_scissor.c | 36 +++++++++++++++++++++++++++ 10 files changed, 39 insertions(+), 77 deletions(-) delete mode 100644 src/gallium/drivers/nv30/nv30_state_scissor.c delete mode 100644 src/gallium/drivers/nv40/nv40_state_scissor.c create mode 100644 src/gallium/drivers/nvfx/nvfx_state_scissor.c (limited to 'src') diff --git a/src/gallium/drivers/nv30/Makefile b/src/gallium/drivers/nv30/Makefile index 668f5965b1..bbfca55e49 100644 --- a/src/gallium/drivers/nv30/Makefile +++ b/src/gallium/drivers/nv30/Makefile @@ -13,7 +13,6 @@ C_SOURCES = \ nv30_screen.c \ nv30_state.c \ nv30_state_fb.c \ - nv30_state_scissor.c \ nv30_state_stipple.c \ nv30_state_viewport.c \ nv30_state_zsa.c \ diff --git a/src/gallium/drivers/nv30/nv30_context.h b/src/gallium/drivers/nv30/nv30_context.h index fbafbec383..5a5311e5a9 100644 --- a/src/gallium/drivers/nv30/nv30_context.h +++ b/src/gallium/drivers/nv30/nv30_context.h @@ -24,7 +24,6 @@ extern void nv30_fragprog_destroy(struct nvfx_context *, extern void nv30_fragtex_bind(struct nvfx_context *); /* nv30_state.c and friends */ -extern struct nvfx_state_entry nv30_state_scissor; extern struct nvfx_state_entry nv30_state_stipple; extern struct nvfx_state_entry nv30_state_fragprog; extern struct nvfx_state_entry nv30_state_vertprog; diff --git a/src/gallium/drivers/nv30/nv30_state_scissor.c b/src/gallium/drivers/nv30/nv30_state_scissor.c deleted file mode 100644 index e91680e2d1..0000000000 --- a/src/gallium/drivers/nv30/nv30_state_scissor.c +++ /dev/null @@ -1,36 +0,0 @@ -#include "nv30_context.h" - -static boolean -nv30_state_scissor_validate(struct nvfx_context *nvfx) -{ - struct pipe_rasterizer_state *rast = &nvfx->rasterizer->pipe; - struct pipe_scissor_state *s = &nvfx->scissor; - struct nouveau_stateobj *so; - - if (nvfx->state.hw[NVFX_STATE_SCISSOR] && - (rast->scissor == 0 && nvfx->state.scissor_enabled == 0)) - return FALSE; - nvfx->state.scissor_enabled = rast->scissor; - - so = so_new(1, 2, 0); - so_method(so, nvfx->screen->eng3d, NV34TCL_SCISSOR_HORIZ, 2); - if (nvfx->state.scissor_enabled) { - so_data (so, ((s->maxx - s->minx) << 16) | s->minx); - so_data (so, ((s->maxy - s->miny) << 16) | s->miny); - } else { - so_data (so, 4096 << 16); - so_data (so, 4096 << 16); - } - - so_ref(so, &nvfx->state.hw[NVFX_STATE_SCISSOR]); - so_ref(NULL, &so); - return TRUE; -} - -struct nvfx_state_entry nv30_state_scissor = { - .validate = nv30_state_scissor_validate, - .dirty = { - .pipe = NVFX_NEW_SCISSOR | NVFX_NEW_RAST, - .hw = NVFX_STATE_SCISSOR - } -}; diff --git a/src/gallium/drivers/nv40/Makefile b/src/gallium/drivers/nv40/Makefile index 25ad2974bf..02bbb15f81 100644 --- a/src/gallium/drivers/nv40/Makefile +++ b/src/gallium/drivers/nv40/Makefile @@ -13,7 +13,6 @@ C_SOURCES = \ nv40_screen.c \ nv40_state.c \ nv40_state_fb.c \ - nv40_state_scissor.c \ nv40_state_stipple.c \ nv40_state_viewport.c \ nv40_state_zsa.c \ diff --git a/src/gallium/drivers/nv40/nv40_context.h b/src/gallium/drivers/nv40/nv40_context.h index fc8b06bd0f..d3464ad7a3 100644 --- a/src/gallium/drivers/nv40/nv40_context.h +++ b/src/gallium/drivers/nv40/nv40_context.h @@ -28,7 +28,6 @@ extern void nv40_fragprog_destroy(struct nvfx_context *, extern void nv40_fragtex_bind(struct nvfx_context *); /* nv40_state.c and friends */ -extern struct nvfx_state_entry nv40_state_scissor; extern struct nvfx_state_entry nv40_state_stipple; extern struct nvfx_state_entry nv40_state_fragprog; extern struct nvfx_state_entry nv40_state_vertprog; diff --git a/src/gallium/drivers/nv40/nv40_state_scissor.c b/src/gallium/drivers/nv40/nv40_state_scissor.c deleted file mode 100644 index 11ec5c0878..0000000000 --- a/src/gallium/drivers/nv40/nv40_state_scissor.c +++ /dev/null @@ -1,36 +0,0 @@ -#include "nv40_context.h" - -static boolean -nv40_state_scissor_validate(struct nvfx_context *nvfx) -{ - struct pipe_rasterizer_state *rast = &nvfx->rasterizer->pipe; - struct pipe_scissor_state *s = &nvfx->scissor; - struct nouveau_stateobj *so; - - if (nvfx->state.hw[NVFX_STATE_SCISSOR] && - (rast->scissor == 0 && nvfx->state.scissor_enabled == 0)) - return FALSE; - nvfx->state.scissor_enabled = rast->scissor; - - so = so_new(1, 2, 0); - so_method(so, nvfx->screen->eng3d, NV34TCL_SCISSOR_HORIZ, 2); - if (nvfx->state.scissor_enabled) { - so_data (so, ((s->maxx - s->minx) << 16) | s->minx); - so_data (so, ((s->maxy - s->miny) << 16) | s->miny); - } else { - so_data (so, 4096 << 16); - so_data (so, 4096 << 16); - } - - so_ref(so, &nvfx->state.hw[NVFX_STATE_SCISSOR]); - so_ref(NULL, &so); - return TRUE; -} - -struct nvfx_state_entry nv40_state_scissor = { - .validate = nv40_state_scissor_validate, - .dirty = { - .pipe = NVFX_NEW_SCISSOR | NVFX_NEW_RAST, - .hw = NVFX_STATE_SCISSOR - } -}; diff --git a/src/gallium/drivers/nvfx/Makefile b/src/gallium/drivers/nvfx/Makefile index f1843b61df..8f4edb6543 100644 --- a/src/gallium/drivers/nvfx/Makefile +++ b/src/gallium/drivers/nvfx/Makefile @@ -8,6 +8,7 @@ C_SOURCES = \ nvfx_state_emit.c \ nvfx_state_blend.c \ nvfx_state_rasterizer.c \ + nvfx_state_scissor.c \ nvfx_transfer.c include ../../Makefile.template diff --git a/src/gallium/drivers/nvfx/nvfx_context.h b/src/gallium/drivers/nvfx/nvfx_context.h index c7ce17ab38..d5817ac5f8 100644 --- a/src/gallium/drivers/nvfx/nvfx_context.h +++ b/src/gallium/drivers/nvfx/nvfx_context.h @@ -184,6 +184,7 @@ struct nvfx_state_entry { extern struct nvfx_state_entry nvfx_state_blend; extern struct nvfx_state_entry nvfx_state_blend_colour; extern struct nvfx_state_entry nvfx_state_rasterizer; +extern struct nvfx_state_entry nvfx_state_scissor; /* nvfx_clear.c */ extern void nvfx_clear(struct pipe_context *pipe, unsigned buffers, diff --git a/src/gallium/drivers/nvfx/nvfx_state_emit.c b/src/gallium/drivers/nvfx/nvfx_state_emit.c index 60df50aa1c..cf73f81fb2 100644 --- a/src/gallium/drivers/nvfx/nvfx_state_emit.c +++ b/src/gallium/drivers/nvfx/nvfx_state_emit.c @@ -7,7 +7,7 @@ static struct nvfx_state_entry *name##_render_states[] = { \ &nvxx##_state_framebuffer, \ &nvfx_state_rasterizer, \ - &nvxx##_state_scissor, \ + &nvfx_state_scissor, \ &nvxx##_state_stipple, \ &nvxx##_state_fragprog, \ &nvxx##_state_fragtex, \ diff --git a/src/gallium/drivers/nvfx/nvfx_state_scissor.c b/src/gallium/drivers/nvfx/nvfx_state_scissor.c new file mode 100644 index 0000000000..940d8cb5c0 --- /dev/null +++ b/src/gallium/drivers/nvfx/nvfx_state_scissor.c @@ -0,0 +1,36 @@ +#include "nvfx_context.h" + +static boolean +nvfx_state_scissor_validate(struct nvfx_context *nvfx) +{ + struct pipe_rasterizer_state *rast = &nvfx->rasterizer->pipe; + struct pipe_scissor_state *s = &nvfx->scissor; + struct nouveau_stateobj *so; + + if (nvfx->state.hw[NVFX_STATE_SCISSOR] && + (rast->scissor == 0 && nvfx->state.scissor_enabled == 0)) + return FALSE; + nvfx->state.scissor_enabled = rast->scissor; + + so = so_new(1, 2, 0); + so_method(so, nvfx->screen->eng3d, NV34TCL_SCISSOR_HORIZ, 2); + if (nvfx->state.scissor_enabled) { + so_data (so, ((s->maxx - s->minx) << 16) | s->minx); + so_data (so, ((s->maxy - s->miny) << 16) | s->miny); + } else { + so_data (so, 4096 << 16); + so_data (so, 4096 << 16); + } + + so_ref(so, &nvfx->state.hw[NVFX_STATE_SCISSOR]); + so_ref(NULL, &so); + return TRUE; +} + +struct nvfx_state_entry nvfx_state_scissor = { + .validate = nvfx_state_scissor_validate, + .dirty = { + .pipe = NVFX_NEW_SCISSOR | NVFX_NEW_RAST, + .hw = NVFX_STATE_SCISSOR + } +}; -- cgit v1.2.3 From 64d882637dc97b332eb3c0f457376f86b75c8c5f Mon Sep 17 00:00:00 2001 From: Luca Barbieri Date: Sat, 20 Feb 2010 23:19:40 +0100 Subject: nv30, nv40: unify identical nv[34]0_state_zsa.c --- src/gallium/drivers/nv30/Makefile | 1 - src/gallium/drivers/nv30/nv30_context.h | 2 -- src/gallium/drivers/nv30/nv30_state_zsa.c | 41 ------------------------------ src/gallium/drivers/nv40/Makefile | 1 - src/gallium/drivers/nv40/nv40_context.h | 2 -- src/gallium/drivers/nv40/nv40_state_zsa.c | 41 ------------------------------ src/gallium/drivers/nvfx/Makefile | 1 + src/gallium/drivers/nvfx/nvfx_context.h | 2 ++ src/gallium/drivers/nvfx/nvfx_state_emit.c | 4 +-- src/gallium/drivers/nvfx/nvfx_state_zsa.c | 41 ++++++++++++++++++++++++++++++ 10 files changed, 46 insertions(+), 90 deletions(-) delete mode 100644 src/gallium/drivers/nv30/nv30_state_zsa.c delete mode 100644 src/gallium/drivers/nv40/nv40_state_zsa.c create mode 100644 src/gallium/drivers/nvfx/nvfx_state_zsa.c (limited to 'src') diff --git a/src/gallium/drivers/nv30/Makefile b/src/gallium/drivers/nv30/Makefile index bbfca55e49..8f198ff2b7 100644 --- a/src/gallium/drivers/nv30/Makefile +++ b/src/gallium/drivers/nv30/Makefile @@ -15,7 +15,6 @@ C_SOURCES = \ nv30_state_fb.c \ nv30_state_stipple.c \ nv30_state_viewport.c \ - nv30_state_zsa.c \ nv30_surface.c \ nv30_vbo.c \ nv30_vertprog.c diff --git a/src/gallium/drivers/nv30/nv30_context.h b/src/gallium/drivers/nv30/nv30_context.h index 5a5311e5a9..2ee12ef5d8 100644 --- a/src/gallium/drivers/nv30/nv30_context.h +++ b/src/gallium/drivers/nv30/nv30_context.h @@ -27,12 +27,10 @@ extern void nv30_fragtex_bind(struct nvfx_context *); extern struct nvfx_state_entry nv30_state_stipple; extern struct nvfx_state_entry nv30_state_fragprog; extern struct nvfx_state_entry nv30_state_vertprog; -extern struct nvfx_state_entry nv30_state_zsa; extern struct nvfx_state_entry nv30_state_viewport; extern struct nvfx_state_entry nv30_state_framebuffer; extern struct nvfx_state_entry nv30_state_fragtex; extern struct nvfx_state_entry nv30_state_vbo; -extern struct nvfx_state_entry nv30_state_sr; /* nv30_vbo.c */ extern void nv30_draw_arrays(struct pipe_context *, unsigned mode, diff --git a/src/gallium/drivers/nv30/nv30_state_zsa.c b/src/gallium/drivers/nv30/nv30_state_zsa.c deleted file mode 100644 index 0832408edf..0000000000 --- a/src/gallium/drivers/nv30/nv30_state_zsa.c +++ /dev/null @@ -1,41 +0,0 @@ -#include "nv30_context.h" - -static boolean -nv30_state_zsa_validate(struct nvfx_context *nvfx) -{ - so_ref(nvfx->zsa->so, - &nvfx->state.hw[NVFX_STATE_ZSA]); - return TRUE; -} - -struct nvfx_state_entry nv30_state_zsa = { - .validate = nv30_state_zsa_validate, - .dirty = { - .pipe = NVFX_NEW_ZSA, - .hw = NVFX_STATE_ZSA - } -}; - -static boolean -nv30_state_sr_validate(struct nvfx_context *nvfx) -{ - struct nouveau_stateobj *so = so_new(2, 2, 0); - struct pipe_stencil_ref *sr = &nvfx->stencil_ref; - - so_method(so, nvfx->screen->eng3d, NV34TCL_STENCIL_FRONT_FUNC_REF, 1); - so_data (so, sr->ref_value[0]); - so_method(so, nvfx->screen->eng3d, NV34TCL_STENCIL_BACK_FUNC_REF, 1); - so_data (so, sr->ref_value[1]); - - so_ref(so, &nvfx->state.hw[NVFX_STATE_SR]); - so_ref(NULL, &so); - return TRUE; -} - -struct nvfx_state_entry nv30_state_sr = { - .validate = nv30_state_sr_validate, - .dirty = { - .pipe = NVFX_NEW_SR, - .hw = NVFX_STATE_SR - } -}; diff --git a/src/gallium/drivers/nv40/Makefile b/src/gallium/drivers/nv40/Makefile index 02bbb15f81..1cad9409ed 100644 --- a/src/gallium/drivers/nv40/Makefile +++ b/src/gallium/drivers/nv40/Makefile @@ -15,7 +15,6 @@ C_SOURCES = \ nv40_state_fb.c \ nv40_state_stipple.c \ nv40_state_viewport.c \ - nv40_state_zsa.c \ nv40_surface.c \ nv40_vbo.c \ nv40_vertprog.c diff --git a/src/gallium/drivers/nv40/nv40_context.h b/src/gallium/drivers/nv40/nv40_context.h index d3464ad7a3..3dcbbae30b 100644 --- a/src/gallium/drivers/nv40/nv40_context.h +++ b/src/gallium/drivers/nv40/nv40_context.h @@ -31,13 +31,11 @@ extern void nv40_fragtex_bind(struct nvfx_context *); extern struct nvfx_state_entry nv40_state_stipple; extern struct nvfx_state_entry nv40_state_fragprog; extern struct nvfx_state_entry nv40_state_vertprog; -extern struct nvfx_state_entry nv40_state_zsa; extern struct nvfx_state_entry nv40_state_viewport; extern struct nvfx_state_entry nv40_state_framebuffer; extern struct nvfx_state_entry nv40_state_fragtex; extern struct nvfx_state_entry nv40_state_vbo; extern struct nvfx_state_entry nv40_state_vtxfmt; -extern struct nvfx_state_entry nv40_state_sr; /* nv40_vbo.c */ extern void nv40_draw_arrays(struct pipe_context *, unsigned mode, diff --git a/src/gallium/drivers/nv40/nv40_state_zsa.c b/src/gallium/drivers/nv40/nv40_state_zsa.c deleted file mode 100644 index 00facd520a..0000000000 --- a/src/gallium/drivers/nv40/nv40_state_zsa.c +++ /dev/null @@ -1,41 +0,0 @@ -#include "nv40_context.h" - -static boolean -nv40_state_zsa_validate(struct nvfx_context *nvfx) -{ - so_ref(nvfx->zsa->so, - &nvfx->state.hw[NVFX_STATE_ZSA]); - return TRUE; -} - -struct nvfx_state_entry nv40_state_zsa = { - .validate = nv40_state_zsa_validate, - .dirty = { - .pipe = NVFX_NEW_ZSA, - .hw = NVFX_STATE_ZSA - } -}; - -static boolean -nv40_state_sr_validate(struct nvfx_context *nvfx) -{ - struct nouveau_stateobj *so = so_new(2, 2, 0); - struct pipe_stencil_ref *sr = &nvfx->stencil_ref; - - so_method(so, nvfx->screen->eng3d, NV34TCL_STENCIL_FRONT_FUNC_REF, 1); - so_data (so, sr->ref_value[0]); - so_method(so, nvfx->screen->eng3d, NV34TCL_STENCIL_BACK_FUNC_REF, 1); - so_data (so, sr->ref_value[1]); - - so_ref(so, &nvfx->state.hw[NVFX_STATE_SR]); - so_ref(NULL, &so); - return TRUE; -} - -struct nvfx_state_entry nv40_state_sr = { - .validate = nv40_state_sr_validate, - .dirty = { - .pipe = NVFX_NEW_SR, - .hw = NVFX_STATE_SR - } -}; diff --git a/src/gallium/drivers/nvfx/Makefile b/src/gallium/drivers/nvfx/Makefile index 8f4edb6543..b077713b04 100644 --- a/src/gallium/drivers/nvfx/Makefile +++ b/src/gallium/drivers/nvfx/Makefile @@ -9,6 +9,7 @@ C_SOURCES = \ nvfx_state_blend.c \ nvfx_state_rasterizer.c \ nvfx_state_scissor.c \ + nvfx_state_zsa.c \ nvfx_transfer.c include ../../Makefile.template diff --git a/src/gallium/drivers/nvfx/nvfx_context.h b/src/gallium/drivers/nvfx/nvfx_context.h index d5817ac5f8..d97cf30a1d 100644 --- a/src/gallium/drivers/nvfx/nvfx_context.h +++ b/src/gallium/drivers/nvfx/nvfx_context.h @@ -185,6 +185,8 @@ extern struct nvfx_state_entry nvfx_state_blend; extern struct nvfx_state_entry nvfx_state_blend_colour; extern struct nvfx_state_entry nvfx_state_rasterizer; extern struct nvfx_state_entry nvfx_state_scissor; +extern struct nvfx_state_entry nvfx_state_sr; +extern struct nvfx_state_entry nvfx_state_zsa; /* nvfx_clear.c */ extern void nvfx_clear(struct pipe_context *pipe, unsigned buffers, diff --git a/src/gallium/drivers/nvfx/nvfx_state_emit.c b/src/gallium/drivers/nvfx/nvfx_state_emit.c index cf73f81fb2..a30af174e3 100644 --- a/src/gallium/drivers/nvfx/nvfx_state_emit.c +++ b/src/gallium/drivers/nvfx/nvfx_state_emit.c @@ -14,8 +14,8 @@ static struct nvfx_state_entry *name##_render_states[] = { \ &nvxx##_state_vertprog, \ &nvfx_state_blend, \ &nvfx_state_blend_colour, \ - &nvxx##_state_zsa, \ - &nvxx##_state_sr, \ + &nvfx_state_zsa, \ + &nvfx_state_sr, \ &nvxx##_state_viewport, \ &nvxx##_state_##vbo, \ NULL \ diff --git a/src/gallium/drivers/nvfx/nvfx_state_zsa.c b/src/gallium/drivers/nvfx/nvfx_state_zsa.c new file mode 100644 index 0000000000..c84fd041c1 --- /dev/null +++ b/src/gallium/drivers/nvfx/nvfx_state_zsa.c @@ -0,0 +1,41 @@ +#include "nvfx_context.h" + +static boolean +nvfx_state_zsa_validate(struct nvfx_context *nvfx) +{ + so_ref(nvfx->zsa->so, + &nvfx->state.hw[NVFX_STATE_ZSA]); + return TRUE; +} + +struct nvfx_state_entry nvfx_state_zsa = { + .validate = nvfx_state_zsa_validate, + .dirty = { + .pipe = NVFX_NEW_ZSA, + .hw = NVFX_STATE_ZSA + } +}; + +static boolean +nvfx_state_sr_validate(struct nvfx_context *nvfx) +{ + struct nouveau_stateobj *so = so_new(2, 2, 0); + struct pipe_stencil_ref *sr = &nvfx->stencil_ref; + + so_method(so, nvfx->screen->eng3d, NV34TCL_STENCIL_FRONT_FUNC_REF, 1); + so_data (so, sr->ref_value[0]); + so_method(so, nvfx->screen->eng3d, NV34TCL_STENCIL_BACK_FUNC_REF, 1); + so_data (so, sr->ref_value[1]); + + so_ref(so, &nvfx->state.hw[NVFX_STATE_SR]); + so_ref(NULL, &so); + return TRUE; +} + +struct nvfx_state_entry nvfx_state_sr = { + .validate = nvfx_state_sr_validate, + .dirty = { + .pipe = NVFX_NEW_SR, + .hw = NVFX_STATE_SR + } +}; -- cgit v1.2.3 From e392e0b148d6b499322e58a84f300e2e0be49e29 Mon Sep 17 00:00:00 2001 From: Luca Barbieri Date: Sat, 20 Feb 2010 19:22:57 +0100 Subject: nv30, nv40: unify nv[34]0_state_stipple.c The files are identical, except for the fact that the nv40 version forgets to unreference the stateobj. Unified to the correct nv30 version. --- src/gallium/drivers/nv30/Makefile | 1 - src/gallium/drivers/nv30/nv30_context.h | 1 - src/gallium/drivers/nv30/nv30_state_stipple.c | 40 --------------------------- src/gallium/drivers/nv40/Makefile | 1 - src/gallium/drivers/nv40/nv40_context.h | 1 - src/gallium/drivers/nv40/nv40_state_stipple.c | 39 -------------------------- src/gallium/drivers/nvfx/Makefile | 1 + src/gallium/drivers/nvfx/nvfx_context.h | 1 + src/gallium/drivers/nvfx/nvfx_state_emit.c | 2 +- src/gallium/drivers/nvfx/nvfx_state_stipple.c | 40 +++++++++++++++++++++++++++ 10 files changed, 43 insertions(+), 84 deletions(-) delete mode 100644 src/gallium/drivers/nv30/nv30_state_stipple.c delete mode 100644 src/gallium/drivers/nv40/nv40_state_stipple.c create mode 100644 src/gallium/drivers/nvfx/nvfx_state_stipple.c (limited to 'src') diff --git a/src/gallium/drivers/nv30/Makefile b/src/gallium/drivers/nv30/Makefile index 8f198ff2b7..5541a36618 100644 --- a/src/gallium/drivers/nv30/Makefile +++ b/src/gallium/drivers/nv30/Makefile @@ -13,7 +13,6 @@ C_SOURCES = \ nv30_screen.c \ nv30_state.c \ nv30_state_fb.c \ - nv30_state_stipple.c \ nv30_state_viewport.c \ nv30_surface.c \ nv30_vbo.c \ diff --git a/src/gallium/drivers/nv30/nv30_context.h b/src/gallium/drivers/nv30/nv30_context.h index 2ee12ef5d8..1c2572aa86 100644 --- a/src/gallium/drivers/nv30/nv30_context.h +++ b/src/gallium/drivers/nv30/nv30_context.h @@ -24,7 +24,6 @@ extern void nv30_fragprog_destroy(struct nvfx_context *, extern void nv30_fragtex_bind(struct nvfx_context *); /* nv30_state.c and friends */ -extern struct nvfx_state_entry nv30_state_stipple; extern struct nvfx_state_entry nv30_state_fragprog; extern struct nvfx_state_entry nv30_state_vertprog; extern struct nvfx_state_entry nv30_state_viewport; diff --git a/src/gallium/drivers/nv30/nv30_state_stipple.c b/src/gallium/drivers/nv30/nv30_state_stipple.c deleted file mode 100644 index eceb0c57f9..0000000000 --- a/src/gallium/drivers/nv30/nv30_state_stipple.c +++ /dev/null @@ -1,40 +0,0 @@ -#include "nv30_context.h" - -static boolean -nv30_state_stipple_validate(struct nvfx_context *nvfx) -{ - struct pipe_rasterizer_state *rast = &nvfx->rasterizer->pipe; - struct nouveau_grobj *eng3d = nvfx->screen->eng3d; - struct nouveau_stateobj *so; - - if (nvfx->state.hw[NVFX_STATE_STIPPLE] && - (rast->poly_stipple_enable == 0 && nvfx->state.stipple_enabled == 0)) - return FALSE; - - if (rast->poly_stipple_enable) { - unsigned i; - - so = so_new(2, 33, 0); - so_method(so, eng3d, NV34TCL_POLYGON_STIPPLE_ENABLE, 1); - so_data (so, 1); - so_method(so, eng3d, NV34TCL_POLYGON_STIPPLE_PATTERN(0), 32); - for (i = 0; i < 32; i++) - so_data(so, nvfx->stipple[i]); - } else { - so = so_new(1, 1, 0); - so_method(so, eng3d, NV34TCL_POLYGON_STIPPLE_ENABLE, 1); - so_data (so, 0); - } - - so_ref(so, &nvfx->state.hw[NVFX_STATE_STIPPLE]); - so_ref(NULL, &so); - return TRUE; -} - -struct nvfx_state_entry nv30_state_stipple = { - .validate = nv30_state_stipple_validate, - .dirty = { - .pipe = NVFX_NEW_STIPPLE | NVFX_NEW_RAST, - .hw = NVFX_STATE_STIPPLE, - } -}; diff --git a/src/gallium/drivers/nv40/Makefile b/src/gallium/drivers/nv40/Makefile index 1cad9409ed..a101cfc80c 100644 --- a/src/gallium/drivers/nv40/Makefile +++ b/src/gallium/drivers/nv40/Makefile @@ -13,7 +13,6 @@ C_SOURCES = \ nv40_screen.c \ nv40_state.c \ nv40_state_fb.c \ - nv40_state_stipple.c \ nv40_state_viewport.c \ nv40_surface.c \ nv40_vbo.c \ diff --git a/src/gallium/drivers/nv40/nv40_context.h b/src/gallium/drivers/nv40/nv40_context.h index 3dcbbae30b..127502dd5f 100644 --- a/src/gallium/drivers/nv40/nv40_context.h +++ b/src/gallium/drivers/nv40/nv40_context.h @@ -28,7 +28,6 @@ extern void nv40_fragprog_destroy(struct nvfx_context *, extern void nv40_fragtex_bind(struct nvfx_context *); /* nv40_state.c and friends */ -extern struct nvfx_state_entry nv40_state_stipple; extern struct nvfx_state_entry nv40_state_fragprog; extern struct nvfx_state_entry nv40_state_vertprog; extern struct nvfx_state_entry nv40_state_viewport; diff --git a/src/gallium/drivers/nv40/nv40_state_stipple.c b/src/gallium/drivers/nv40/nv40_state_stipple.c deleted file mode 100644 index e537e08e1d..0000000000 --- a/src/gallium/drivers/nv40/nv40_state_stipple.c +++ /dev/null @@ -1,39 +0,0 @@ -#include "nv40_context.h" - -static boolean -nv40_state_stipple_validate(struct nvfx_context *nvfx) -{ - struct pipe_rasterizer_state *rast = &nvfx->rasterizer->pipe; - struct nouveau_grobj *eng3d = nvfx->screen->eng3d; - struct nouveau_stateobj *so; - - if (nvfx->state.hw[NVFX_STATE_STIPPLE] && - (rast->poly_stipple_enable == 0 && nvfx->state.stipple_enabled == 0)) - return FALSE; - - if (rast->poly_stipple_enable) { - unsigned i; - - so = so_new(2, 33, 0); - so_method(so, eng3d, NV34TCL_POLYGON_STIPPLE_ENABLE, 1); - so_data (so, 1); - so_method(so, eng3d, NV34TCL_POLYGON_STIPPLE_PATTERN(0), 32); - for (i = 0; i < 32; i++) - so_data(so, nvfx->stipple[i]); - } else { - so = so_new(1, 1, 0); - so_method(so, eng3d, NV34TCL_POLYGON_STIPPLE_ENABLE, 1); - so_data (so, 0); - } - - so_ref(so, &nvfx->state.hw[NVFX_STATE_STIPPLE]); - return TRUE; -} - -struct nvfx_state_entry nv40_state_stipple = { - .validate = nv40_state_stipple_validate, - .dirty = { - .pipe = NVFX_NEW_STIPPLE | NVFX_NEW_RAST, - .hw = NVFX_STATE_STIPPLE, - } -}; diff --git a/src/gallium/drivers/nvfx/Makefile b/src/gallium/drivers/nvfx/Makefile index b077713b04..e96c9aa6bc 100644 --- a/src/gallium/drivers/nvfx/Makefile +++ b/src/gallium/drivers/nvfx/Makefile @@ -9,6 +9,7 @@ C_SOURCES = \ nvfx_state_blend.c \ nvfx_state_rasterizer.c \ nvfx_state_scissor.c \ + nvfx_state_stipple.c \ nvfx_state_zsa.c \ nvfx_transfer.c diff --git a/src/gallium/drivers/nvfx/nvfx_context.h b/src/gallium/drivers/nvfx/nvfx_context.h index d97cf30a1d..8f5013a9d6 100644 --- a/src/gallium/drivers/nvfx/nvfx_context.h +++ b/src/gallium/drivers/nvfx/nvfx_context.h @@ -186,6 +186,7 @@ extern struct nvfx_state_entry nvfx_state_blend_colour; extern struct nvfx_state_entry nvfx_state_rasterizer; extern struct nvfx_state_entry nvfx_state_scissor; extern struct nvfx_state_entry nvfx_state_sr; +extern struct nvfx_state_entry nvfx_state_stipple; extern struct nvfx_state_entry nvfx_state_zsa; /* nvfx_clear.c */ diff --git a/src/gallium/drivers/nvfx/nvfx_state_emit.c b/src/gallium/drivers/nvfx/nvfx_state_emit.c index a30af174e3..04c0429ce1 100644 --- a/src/gallium/drivers/nvfx/nvfx_state_emit.c +++ b/src/gallium/drivers/nvfx/nvfx_state_emit.c @@ -8,7 +8,7 @@ static struct nvfx_state_entry *name##_render_states[] = { \ &nvxx##_state_framebuffer, \ &nvfx_state_rasterizer, \ &nvfx_state_scissor, \ - &nvxx##_state_stipple, \ + &nvfx_state_stipple, \ &nvxx##_state_fragprog, \ &nvxx##_state_fragtex, \ &nvxx##_state_vertprog, \ diff --git a/src/gallium/drivers/nvfx/nvfx_state_stipple.c b/src/gallium/drivers/nvfx/nvfx_state_stipple.c new file mode 100644 index 0000000000..57cd3c936a --- /dev/null +++ b/src/gallium/drivers/nvfx/nvfx_state_stipple.c @@ -0,0 +1,40 @@ +#include "nvfx_context.h" + +static boolean +nvfx_state_stipple_validate(struct nvfx_context *nvfx) +{ + struct pipe_rasterizer_state *rast = &nvfx->rasterizer->pipe; + struct nouveau_grobj *eng3d = nvfx->screen->eng3d; + struct nouveau_stateobj *so; + + if (nvfx->state.hw[NVFX_STATE_STIPPLE] && + (rast->poly_stipple_enable == 0 && nvfx->state.stipple_enabled == 0)) + return FALSE; + + if (rast->poly_stipple_enable) { + unsigned i; + + so = so_new(2, 33, 0); + so_method(so, eng3d, NV34TCL_POLYGON_STIPPLE_ENABLE, 1); + so_data (so, 1); + so_method(so, eng3d, NV34TCL_POLYGON_STIPPLE_PATTERN(0), 32); + for (i = 0; i < 32; i++) + so_data(so, nvfx->stipple[i]); + } else { + so = so_new(1, 1, 0); + so_method(so, eng3d, NV34TCL_POLYGON_STIPPLE_ENABLE, 1); + so_data (so, 0); + } + + so_ref(so, &nvfx->state.hw[NVFX_STATE_STIPPLE]); + so_ref(NULL, &so); + return TRUE; +} + +struct nvfx_state_entry nvfx_state_stipple = { + .validate = nvfx_state_stipple_validate, + .dirty = { + .pipe = NVFX_NEW_STIPPLE | NVFX_NEW_RAST, + .hw = NVFX_STATE_STIPPLE, + } +}; -- cgit v1.2.3 From 8611a31bb401fcc2bdc0b3624859fffff7236c4b Mon Sep 17 00:00:00 2001 From: Luca Barbieri Date: Sat, 20 Feb 2010 19:32:29 +0100 Subject: nv30, nv40: unify nv[34]0_miptree.c The only difference between nv30 and nv40 is that nv30 allowed swizzling for more texture types. This patch preserves the existing behavior, using conditional code. Note however that this does not make sense, since all texture types can be swizzled on nv40 and probably on nv30 too. However, the handling of swizzled surfaces in the current 2D code is partially broken, so it's best not to touch this. A whole rewrite of the 2D code will be submitted, which will solve this problem. --- src/gallium/drivers/nv30/Makefile | 1 - src/gallium/drivers/nv30/nv30_context.h | 2 - src/gallium/drivers/nv30/nv30_miptree.c | 240 ------------------------------- src/gallium/drivers/nv30/nv30_screen.c | 2 +- src/gallium/drivers/nv40/Makefile | 1 - src/gallium/drivers/nv40/nv40_context.h | 2 - src/gallium/drivers/nv40/nv40_miptree.c | 236 ------------------------------ src/gallium/drivers/nv40/nv40_screen.c | 2 +- src/gallium/drivers/nvfx/Makefile | 1 + src/gallium/drivers/nvfx/nvfx_miptree.c | 247 ++++++++++++++++++++++++++++++++ 10 files changed, 250 insertions(+), 484 deletions(-) delete mode 100644 src/gallium/drivers/nv30/nv30_miptree.c delete mode 100644 src/gallium/drivers/nv40/nv40_miptree.c create mode 100644 src/gallium/drivers/nvfx/nvfx_miptree.c (limited to 'src') diff --git a/src/gallium/drivers/nv30/Makefile b/src/gallium/drivers/nv30/Makefile index 5541a36618..d8de297f12 100644 --- a/src/gallium/drivers/nv30/Makefile +++ b/src/gallium/drivers/nv30/Makefile @@ -8,7 +8,6 @@ C_SOURCES = \ nv30_draw.c \ nv30_fragprog.c \ nv30_fragtex.c \ - nv30_miptree.c \ nv30_query.c \ nv30_screen.c \ nv30_state.c \ diff --git a/src/gallium/drivers/nv30/nv30_context.h b/src/gallium/drivers/nv30/nv30_context.h index 1c2572aa86..46b36ee2e5 100644 --- a/src/gallium/drivers/nv30/nv30_context.h +++ b/src/gallium/drivers/nv30/nv30_context.h @@ -7,8 +7,6 @@ extern void nv30_init_state_functions(struct nvfx_context *nvfx); extern void nv30_init_surface_functions(struct nvfx_context *nvfx); extern void nv30_init_query_functions(struct nvfx_context *nvfx); -extern void nv30_screen_init_miptree_functions(struct pipe_screen *pscreen); - /* nv30_draw.c */ extern struct draw_stage *nv30_draw_render_stage(struct nvfx_context *nvfx); diff --git a/src/gallium/drivers/nv30/nv30_miptree.c b/src/gallium/drivers/nv30/nv30_miptree.c deleted file mode 100644 index ada355a444..0000000000 --- a/src/gallium/drivers/nv30/nv30_miptree.c +++ /dev/null @@ -1,240 +0,0 @@ -#include "pipe/p_state.h" -#include "pipe/p_defines.h" -#include "util/u_inlines.h" -#include "util/u_format.h" -#include "util/u_math.h" - -#include "nv30_context.h" -#include "../nouveau/nv04_surface_2d.h" - -static void -nv30_miptree_layout(struct nvfx_miptree *nv30mt) -{ - struct pipe_texture *pt = &nv30mt->base; - uint width = pt->width0; - uint offset = 0; - int nr_faces, l, f; - uint wide_pitch = pt->tex_usage & (PIPE_TEXTURE_USAGE_SAMPLER | - PIPE_TEXTURE_USAGE_DEPTH_STENCIL | - PIPE_TEXTURE_USAGE_RENDER_TARGET | - PIPE_TEXTURE_USAGE_DISPLAY_TARGET | - PIPE_TEXTURE_USAGE_SCANOUT); - - if (pt->target == PIPE_TEXTURE_CUBE) { - nr_faces = 6; - } else - if (pt->target == PIPE_TEXTURE_3D) { - nr_faces = pt->depth0; - } else { - nr_faces = 1; - } - - for (l = 0; l <= pt->last_level; l++) { - if (wide_pitch && (pt->tex_usage & NOUVEAU_TEXTURE_USAGE_LINEAR)) - nv30mt->level[l].pitch = align(util_format_get_stride(pt->format, pt->width0), 64); - else - nv30mt->level[l].pitch = util_format_get_stride(pt->format, width); - - nv30mt->level[l].image_offset = - CALLOC(nr_faces, sizeof(unsigned)); - - width = u_minify(width, 1); - } - - for (f = 0; f < nr_faces; f++) { - for (l = 0; l < pt->last_level; l++) { - nv30mt->level[l].image_offset[f] = offset; - - if (!(pt->tex_usage & NOUVEAU_TEXTURE_USAGE_LINEAR) && - u_minify(pt->width0, l + 1) > 1 && u_minify(pt->height0, l + 1) > 1) - offset += align(nv30mt->level[l].pitch * u_minify(pt->height0, l), 64); - else - offset += nv30mt->level[l].pitch * u_minify(pt->height0, l); - } - - nv30mt->level[l].image_offset[f] = offset; - offset += nv30mt->level[l].pitch * u_minify(pt->height0, l); - } - - nv30mt->total_size = offset; -} - -static struct pipe_texture * -nv30_miptree_create(struct pipe_screen *pscreen, const struct pipe_texture *pt) -{ - struct nvfx_miptree *mt; - unsigned buf_usage = PIPE_BUFFER_USAGE_PIXEL | - NOUVEAU_BUFFER_USAGE_TEXTURE; - - mt = MALLOC(sizeof(struct nvfx_miptree)); - if (!mt) - return NULL; - mt->base = *pt; - pipe_reference_init(&mt->base.reference, 1); - mt->base.screen = pscreen; - - /* Swizzled textures must be POT */ - if (pt->width0 & (pt->width0 - 1) || - pt->height0 & (pt->height0 - 1)) - mt->base.tex_usage |= NOUVEAU_TEXTURE_USAGE_LINEAR; - else - if (pt->tex_usage & (PIPE_TEXTURE_USAGE_SCANOUT | - PIPE_TEXTURE_USAGE_DISPLAY_TARGET | - PIPE_TEXTURE_USAGE_DEPTH_STENCIL)) - mt->base.tex_usage |= NOUVEAU_TEXTURE_USAGE_LINEAR; - else - if (pt->tex_usage & PIPE_TEXTURE_USAGE_DYNAMIC) - mt->base.tex_usage |= NOUVEAU_TEXTURE_USAGE_LINEAR; - else { - switch (pt->format) { - /* TODO: Figure out which formats can be swizzled */ - case PIPE_FORMAT_B8G8R8A8_UNORM: - case PIPE_FORMAT_B8G8R8X8_UNORM: - case PIPE_FORMAT_R16_SNORM: - case PIPE_FORMAT_B5G6R5_UNORM: - case PIPE_FORMAT_L8A8_UNORM: - case PIPE_FORMAT_A8_UNORM: - case PIPE_FORMAT_L8_UNORM: - case PIPE_FORMAT_I8_UNORM: - { - if (debug_get_bool_option("NOUVEAU_NO_SWIZZLE", FALSE)) - mt->base.tex_usage |= NOUVEAU_TEXTURE_USAGE_LINEAR; - break; - } - default: - mt->base.tex_usage |= NOUVEAU_TEXTURE_USAGE_LINEAR; - } - } - - if (pt->tex_usage & PIPE_TEXTURE_USAGE_DYNAMIC) - buf_usage |= PIPE_BUFFER_USAGE_CPU_READ_WRITE; - - /* apparently we can't render to swizzled surfaces smaller than 64 bytes, so make them linear. - * If the user did not ask for a render target, they can still render to it, but it will cost them an extra copy. - * This also happens for small mipmaps of large textures. */ - if (pt->tex_usage & PIPE_TEXTURE_USAGE_RENDER_TARGET && util_format_get_stride(pt->format, pt->width0) < 64) - mt->base.tex_usage |= NOUVEAU_TEXTURE_USAGE_LINEAR; - - nv30_miptree_layout(mt); - - mt->buffer = pscreen->buffer_create(pscreen, 256, buf_usage, - mt->total_size); - if (!mt->buffer) { - FREE(mt); - return NULL; - } - mt->bo = nouveau_bo(mt->buffer); - - return &mt->base; -} - -static struct pipe_texture * -nv30_miptree_blanket(struct pipe_screen *pscreen, const struct pipe_texture *pt, - const unsigned *stride, struct pipe_buffer *pb) -{ - struct nvfx_miptree *mt; - - /* Only supports 2D, non-mipmapped textures for the moment */ - if (pt->target != PIPE_TEXTURE_2D || pt->last_level != 0 || - pt->depth0 != 1) - return NULL; - - mt = CALLOC_STRUCT(nvfx_miptree); - if (!mt) - return NULL; - - mt->base = *pt; - pipe_reference_init(&mt->base.reference, 1); - mt->base.screen = pscreen; - mt->level[0].pitch = stride[0]; - mt->level[0].image_offset = CALLOC(1, sizeof(unsigned)); - - /* Assume whoever created this buffer expects it to be linear for now */ - mt->base.tex_usage |= NOUVEAU_TEXTURE_USAGE_LINEAR; - - pipe_buffer_reference(&mt->buffer, pb); - mt->bo = nouveau_bo(mt->buffer); - return &mt->base; -} - -static void -nv30_miptree_destroy(struct pipe_texture *pt) -{ - struct nvfx_miptree *mt = (struct nvfx_miptree *)pt; - int l; - - pipe_buffer_reference(&mt->buffer, NULL); - for (l = 0; l <= pt->last_level; l++) { - if (mt->level[l].image_offset) - FREE(mt->level[l].image_offset); - } - - FREE(mt); -} - -static struct pipe_surface * -nv30_miptree_surface_new(struct pipe_screen *pscreen, struct pipe_texture *pt, - unsigned face, unsigned level, unsigned zslice, - unsigned flags) -{ - struct nvfx_miptree *nv30mt = (struct nvfx_miptree *)pt; - struct nv04_surface *ns; - - ns = CALLOC_STRUCT(nv04_surface); - if (!ns) - return NULL; - pipe_texture_reference(&ns->base.texture, pt); - ns->base.format = pt->format; - ns->base.width = u_minify(pt->width0, level); - ns->base.height = u_minify(pt->height0, level); - ns->base.usage = flags; - pipe_reference_init(&ns->base.reference, 1); - ns->base.face = face; - ns->base.level = level; - ns->base.zslice = zslice; - ns->pitch = nv30mt->level[level].pitch; - - if (pt->target == PIPE_TEXTURE_CUBE) { - ns->base.offset = nv30mt->level[level].image_offset[face]; - } else - if (pt->target == PIPE_TEXTURE_3D) { - ns->base.offset = nv30mt->level[level].image_offset[zslice]; - } else { - ns->base.offset = nv30mt->level[level].image_offset[0]; - } - - /* create a linear temporary that we can render into if necessary. - * Note that ns->pitch is always a multiple of 64 for linear surfaces and swizzled surfaces are POT, so - * ns->pitch & 63 is equivalent to (ns->pitch < 64 && swizzled)*/ - if((ns->pitch & 63) && (ns->base.usage & (PIPE_BUFFER_USAGE_GPU_WRITE | NOUVEAU_BUFFER_USAGE_NO_RENDER)) == PIPE_BUFFER_USAGE_GPU_WRITE) - return &nv04_surface_wrap_for_render(pscreen, ((struct nvfx_screen*)pscreen)->eng2d, ns)->base; - - return &ns->base; -} - -static void -nv30_miptree_surface_del(struct pipe_surface *ps) -{ - struct nv04_surface* ns = (struct nv04_surface*)ps; - if(ns->backing) - { - struct nvfx_screen* screen = (struct nvfx_screen*)ps->texture->screen; - if(ns->backing->base.usage & PIPE_BUFFER_USAGE_GPU_WRITE) - screen->eng2d->copy(screen->eng2d, &ns->backing->base, 0, 0, ps, 0, 0, ns->base.width, ns->base.height); - nv30_miptree_surface_del(&ns->backing->base); - } - - pipe_texture_reference(&ps->texture, NULL); - FREE(ps); -} - -void -nv30_screen_init_miptree_functions(struct pipe_screen *pscreen) -{ - pscreen->texture_create = nv30_miptree_create; - pscreen->texture_destroy = nv30_miptree_destroy; - pscreen->get_tex_surface = nv30_miptree_surface_new; - pscreen->tex_surface_destroy = nv30_miptree_surface_del; - - nouveau_screen(pscreen)->texture_blanket = nv30_miptree_blanket; -} diff --git a/src/gallium/drivers/nv30/nv30_screen.c b/src/gallium/drivers/nv30/nv30_screen.c index 305dfa8386..3a48255c18 100644 --- a/src/gallium/drivers/nv30/nv30_screen.c +++ b/src/gallium/drivers/nv30/nv30_screen.c @@ -213,7 +213,7 @@ nv30_screen_create(struct pipe_winsys *ws, struct nouveau_device *dev) pscreen->is_format_supported = nv30_screen_surface_format_supported; pscreen->context_create = nv30_create; - nv30_screen_init_miptree_functions(pscreen); + nvfx_screen_init_miptree_functions(pscreen); /* 3D object */ switch (dev->chipset & 0xf0) { diff --git a/src/gallium/drivers/nv40/Makefile b/src/gallium/drivers/nv40/Makefile index a101cfc80c..bf68338e3f 100644 --- a/src/gallium/drivers/nv40/Makefile +++ b/src/gallium/drivers/nv40/Makefile @@ -8,7 +8,6 @@ C_SOURCES = \ nv40_draw.c \ nv40_fragprog.c \ nv40_fragtex.c \ - nv40_miptree.c \ nv40_query.c \ nv40_screen.c \ nv40_state.c \ diff --git a/src/gallium/drivers/nv40/nv40_context.h b/src/gallium/drivers/nv40/nv40_context.h index 127502dd5f..fe44452f81 100644 --- a/src/gallium/drivers/nv40/nv40_context.h +++ b/src/gallium/drivers/nv40/nv40_context.h @@ -7,8 +7,6 @@ extern void nv40_init_state_functions(struct nvfx_context *nvfx); extern void nv40_init_surface_functions(struct nvfx_context *nvfx); extern void nv40_init_query_functions(struct nvfx_context *nvfx); -extern void nv40_screen_init_miptree_functions(struct pipe_screen *pscreen); - /* nv40_draw.c */ extern struct draw_stage *nv40_draw_render_stage(struct nvfx_context *nvfx); extern void nv40_draw_elements_swtnl(struct pipe_context *pipe, diff --git a/src/gallium/drivers/nv40/nv40_miptree.c b/src/gallium/drivers/nv40/nv40_miptree.c deleted file mode 100644 index caec47058f..0000000000 --- a/src/gallium/drivers/nv40/nv40_miptree.c +++ /dev/null @@ -1,236 +0,0 @@ -#include "pipe/p_state.h" -#include "pipe/p_defines.h" -#include "util/u_inlines.h" -#include "util/u_format.h" -#include "util/u_math.h" - -#include "nv40_context.h" -#include "../nouveau/nv04_surface_2d.h" - - - -static void -nv40_miptree_layout(struct nvfx_miptree *mt) -{ - struct pipe_texture *pt = &mt->base; - uint width = pt->width0; - uint offset = 0; - int nr_faces, l, f; - uint wide_pitch = pt->tex_usage & (PIPE_TEXTURE_USAGE_SAMPLER | - PIPE_TEXTURE_USAGE_DEPTH_STENCIL | - PIPE_TEXTURE_USAGE_RENDER_TARGET | - PIPE_TEXTURE_USAGE_DISPLAY_TARGET | - PIPE_TEXTURE_USAGE_SCANOUT); - - if (pt->target == PIPE_TEXTURE_CUBE) { - nr_faces = 6; - } else - if (pt->target == PIPE_TEXTURE_3D) { - nr_faces = pt->depth0; - } else { - nr_faces = 1; - } - - for (l = 0; l <= pt->last_level; l++) { - if (wide_pitch && (pt->tex_usage & NOUVEAU_TEXTURE_USAGE_LINEAR)) - mt->level[l].pitch = align(util_format_get_stride(pt->format, pt->width0), 64); - else - mt->level[l].pitch = util_format_get_stride(pt->format, width); - - mt->level[l].image_offset = - CALLOC(nr_faces, sizeof(unsigned)); - - width = u_minify(width, 1); - } - - for (f = 0; f < nr_faces; f++) { - for (l = 0; l < pt->last_level; l++) { - mt->level[l].image_offset[f] = offset; - - if (!(pt->tex_usage & NOUVEAU_TEXTURE_USAGE_LINEAR) && - u_minify(pt->width0, l + 1) > 1 && u_minify(pt->height0, l + 1) > 1) - offset += align(mt->level[l].pitch * u_minify(pt->height0, l), 64); - else - offset += mt->level[l].pitch * u_minify(pt->height0, l); - } - - mt->level[l].image_offset[f] = offset; - offset += mt->level[l].pitch * u_minify(pt->height0, l); - } - - mt->total_size = offset; -} - -static struct pipe_texture * -nv40_miptree_create(struct pipe_screen *pscreen, const struct pipe_texture *pt) -{ - struct nvfx_miptree *mt; - unsigned buf_usage = PIPE_BUFFER_USAGE_PIXEL | - NOUVEAU_BUFFER_USAGE_TEXTURE; - - mt = MALLOC(sizeof(struct nvfx_miptree)); - if (!mt) - return NULL; - mt->base = *pt; - pipe_reference_init(&mt->base.reference, 1); - mt->base.screen = pscreen; - - /* Swizzled textures must be POT */ - if (pt->width0 & (pt->width0 - 1) || - pt->height0 & (pt->height0 - 1)) - mt->base.tex_usage |= NOUVEAU_TEXTURE_USAGE_LINEAR; - else - if (pt->tex_usage & (PIPE_TEXTURE_USAGE_SCANOUT | - PIPE_TEXTURE_USAGE_DISPLAY_TARGET | - PIPE_TEXTURE_USAGE_DEPTH_STENCIL)) - mt->base.tex_usage |= NOUVEAU_TEXTURE_USAGE_LINEAR; - else - if (pt->tex_usage & PIPE_TEXTURE_USAGE_DYNAMIC) - mt->base.tex_usage |= NOUVEAU_TEXTURE_USAGE_LINEAR; - else { - switch (pt->format) { - /* TODO: Figure out which formats can be swizzled */ - case PIPE_FORMAT_B8G8R8A8_UNORM: - case PIPE_FORMAT_B8G8R8X8_UNORM: - case PIPE_FORMAT_R16_SNORM: - { - if (debug_get_bool_option("NOUVEAU_NO_SWIZZLE", FALSE)) - mt->base.tex_usage |= NOUVEAU_TEXTURE_USAGE_LINEAR; - break; - } - default: - mt->base.tex_usage |= NOUVEAU_TEXTURE_USAGE_LINEAR; - } - } - - if (pt->tex_usage & PIPE_TEXTURE_USAGE_DYNAMIC) - buf_usage |= PIPE_BUFFER_USAGE_CPU_READ_WRITE; - - /* apparently we can't render to swizzled surfaces smaller than 64 bytes, so make them linear. - * If the user did not ask for a render target, they can still render to it, but it will cost them an extra copy. - * This also happens for small mipmaps of large textures. */ - if (pt->tex_usage & PIPE_TEXTURE_USAGE_RENDER_TARGET && util_format_get_stride(pt->format, pt->width0) < 64) - mt->base.tex_usage |= NOUVEAU_TEXTURE_USAGE_LINEAR; - - nv40_miptree_layout(mt); - - mt->buffer = pscreen->buffer_create(pscreen, 256, buf_usage, mt->total_size); - if (!mt->buffer) { - FREE(mt); - return NULL; - } - mt->bo = nouveau_bo(mt->buffer); - return &mt->base; -} - -static struct pipe_texture * -nv40_miptree_blanket(struct pipe_screen *pscreen, const struct pipe_texture *pt, - const unsigned *stride, struct pipe_buffer *pb) -{ - struct nvfx_miptree *mt; - - /* Only supports 2D, non-mipmapped textures for the moment */ - if (pt->target != PIPE_TEXTURE_2D || pt->last_level != 0 || - pt->depth0 != 1) - return NULL; - - mt = CALLOC_STRUCT(nvfx_miptree); - if (!mt) - return NULL; - - mt->base = *pt; - pipe_reference_init(&mt->base.reference, 1); - mt->base.screen = pscreen; - mt->level[0].pitch = stride[0]; - mt->level[0].image_offset = CALLOC(1, sizeof(unsigned)); - - /* Assume whoever created this buffer expects it to be linear for now */ - mt->base.tex_usage |= NOUVEAU_TEXTURE_USAGE_LINEAR; - - pipe_buffer_reference(&mt->buffer, pb); - mt->bo = nouveau_bo(mt->buffer); - return &mt->base; -} - -static void -nv40_miptree_destroy(struct pipe_texture *pt) -{ - struct nvfx_miptree *mt = (struct nvfx_miptree *)pt; - int l; - - pipe_buffer_reference(&mt->buffer, NULL); - for (l = 0; l <= pt->last_level; l++) { - if (mt->level[l].image_offset) - FREE(mt->level[l].image_offset); - } - - FREE(mt); -} - -static struct pipe_surface * -nv40_miptree_surface_new(struct pipe_screen *pscreen, struct pipe_texture *pt, - unsigned face, unsigned level, unsigned zslice, - unsigned flags) -{ - struct nvfx_miptree *mt = (struct nvfx_miptree *)pt; - struct nv04_surface *ns; - - ns = CALLOC_STRUCT(nv04_surface); - if (!ns) - return NULL; - pipe_texture_reference(&ns->base.texture, pt); - ns->base.format = pt->format; - ns->base.width = u_minify(pt->width0, level); - ns->base.height = u_minify(pt->height0, level); - ns->base.usage = flags; - pipe_reference_init(&ns->base.reference, 1); - ns->base.face = face; - ns->base.level = level; - ns->base.zslice = zslice; - ns->pitch = mt->level[level].pitch; - - if (pt->target == PIPE_TEXTURE_CUBE) { - ns->base.offset = mt->level[level].image_offset[face]; - } else - if (pt->target == PIPE_TEXTURE_3D) { - ns->base.offset = mt->level[level].image_offset[zslice]; - } else { - ns->base.offset = mt->level[level].image_offset[0]; - } - - /* create a linear temporary that we can render into if necessary. - * Note that ns->pitch is always a multiple of 64 for linear surfaces and swizzled surfaces are POT, so - * ns->pitch & 63 is equivalent to (ns->pitch < 64 && swizzled)*/ - if((ns->pitch & 63) && (ns->base.usage & (PIPE_BUFFER_USAGE_GPU_WRITE | NOUVEAU_BUFFER_USAGE_NO_RENDER)) == PIPE_BUFFER_USAGE_GPU_WRITE) - return &nv04_surface_wrap_for_render(pscreen, ((struct nvfx_screen*)pscreen)->eng2d, ns)->base; - - return &ns->base; -} - -static void -nv40_miptree_surface_del(struct pipe_surface *ps) -{ - struct nv04_surface* ns = (struct nv04_surface*)ps; - if(ns->backing) - { - struct nvfx_screen* screen = (struct nvfx_screen*)ps->texture->screen; - if(ns->backing->base.usage & PIPE_BUFFER_USAGE_GPU_WRITE) - screen->eng2d->copy(screen->eng2d, &ns->backing->base, 0, 0, ps, 0, 0, ns->base.width, ns->base.height); - nv40_miptree_surface_del(&ns->backing->base); - } - - pipe_texture_reference(&ps->texture, NULL); - FREE(ps); -} - -void -nv40_screen_init_miptree_functions(struct pipe_screen *pscreen) -{ - pscreen->texture_create = nv40_miptree_create; - pscreen->texture_destroy = nv40_miptree_destroy; - pscreen->get_tex_surface = nv40_miptree_surface_new; - pscreen->tex_surface_destroy = nv40_miptree_surface_del; - - nouveau_screen(pscreen)->texture_blanket = nv40_miptree_blanket; -} - diff --git a/src/gallium/drivers/nv40/nv40_screen.c b/src/gallium/drivers/nv40/nv40_screen.c index c64864d58d..0603b7d1c1 100644 --- a/src/gallium/drivers/nv40/nv40_screen.c +++ b/src/gallium/drivers/nv40/nv40_screen.c @@ -203,7 +203,7 @@ nv40_screen_create(struct pipe_winsys *ws, struct nouveau_device *dev) pscreen->is_format_supported = nv40_screen_surface_format_supported; pscreen->context_create = nv40_create; - nv40_screen_init_miptree_functions(pscreen); + nvfx_screen_init_miptree_functions(pscreen); /* 3D object */ switch (dev->chipset & 0xf0) { diff --git a/src/gallium/drivers/nvfx/Makefile b/src/gallium/drivers/nvfx/Makefile index e96c9aa6bc..5073168604 100644 --- a/src/gallium/drivers/nvfx/Makefile +++ b/src/gallium/drivers/nvfx/Makefile @@ -6,6 +6,7 @@ LIBNAME = nvfx C_SOURCES = \ nvfx_clear.c \ nvfx_state_emit.c \ + nvfx_miptree.c \ nvfx_state_blend.c \ nvfx_state_rasterizer.c \ nvfx_state_scissor.c \ diff --git a/src/gallium/drivers/nvfx/nvfx_miptree.c b/src/gallium/drivers/nvfx/nvfx_miptree.c new file mode 100644 index 0000000000..5dced8dae4 --- /dev/null +++ b/src/gallium/drivers/nvfx/nvfx_miptree.c @@ -0,0 +1,247 @@ +#include "pipe/p_state.h" +#include "pipe/p_defines.h" +#include "util/u_inlines.h" +#include "util/u_format.h" +#include "util/u_math.h" + +#include "nvfx_context.h" +#include "../nouveau/nv04_surface_2d.h" + + + +static void +nvfx_miptree_layout(struct nvfx_miptree *mt) +{ + struct pipe_texture *pt = &mt->base; + uint width = pt->width0; + uint offset = 0; + int nr_faces, l, f; + uint wide_pitch = pt->tex_usage & (PIPE_TEXTURE_USAGE_SAMPLER | + PIPE_TEXTURE_USAGE_DEPTH_STENCIL | + PIPE_TEXTURE_USAGE_RENDER_TARGET | + PIPE_TEXTURE_USAGE_DISPLAY_TARGET | + PIPE_TEXTURE_USAGE_SCANOUT); + + if (pt->target == PIPE_TEXTURE_CUBE) { + nr_faces = 6; + } else + if (pt->target == PIPE_TEXTURE_3D) { + nr_faces = pt->depth0; + } else { + nr_faces = 1; + } + + for (l = 0; l <= pt->last_level; l++) { + if (wide_pitch && (pt->tex_usage & NOUVEAU_TEXTURE_USAGE_LINEAR)) + mt->level[l].pitch = align(util_format_get_stride(pt->format, pt->width0), 64); + else + mt->level[l].pitch = util_format_get_stride(pt->format, width); + + mt->level[l].image_offset = + CALLOC(nr_faces, sizeof(unsigned)); + + width = u_minify(width, 1); + } + + for (f = 0; f < nr_faces; f++) { + for (l = 0; l < pt->last_level; l++) { + mt->level[l].image_offset[f] = offset; + + if (!(pt->tex_usage & NOUVEAU_TEXTURE_USAGE_LINEAR) && + u_minify(pt->width0, l + 1) > 1 && u_minify(pt->height0, l + 1) > 1) + offset += align(mt->level[l].pitch * u_minify(pt->height0, l), 64); + else + offset += mt->level[l].pitch * u_minify(pt->height0, l); + } + + mt->level[l].image_offset[f] = offset; + offset += mt->level[l].pitch * u_minify(pt->height0, l); + } + + mt->total_size = offset; +} + +static struct pipe_texture * +nvfx_miptree_create(struct pipe_screen *pscreen, const struct pipe_texture *pt) +{ + struct nvfx_miptree *mt; + unsigned buf_usage = PIPE_BUFFER_USAGE_PIXEL | + NOUVEAU_BUFFER_USAGE_TEXTURE; + + mt = MALLOC(sizeof(struct nvfx_miptree)); + if (!mt) + return NULL; + mt->base = *pt; + pipe_reference_init(&mt->base.reference, 1); + mt->base.screen = pscreen; + + /* Swizzled textures must be POT */ + if (pt->width0 & (pt->width0 - 1) || + pt->height0 & (pt->height0 - 1)) + mt->base.tex_usage |= NOUVEAU_TEXTURE_USAGE_LINEAR; + else + if (pt->tex_usage & (PIPE_TEXTURE_USAGE_SCANOUT | + PIPE_TEXTURE_USAGE_DISPLAY_TARGET | + PIPE_TEXTURE_USAGE_DEPTH_STENCIL)) + mt->base.tex_usage |= NOUVEAU_TEXTURE_USAGE_LINEAR; + else + if (pt->tex_usage & PIPE_TEXTURE_USAGE_DYNAMIC) + mt->base.tex_usage |= NOUVEAU_TEXTURE_USAGE_LINEAR; + else { + switch (pt->format) { + case PIPE_FORMAT_B5G6R5_UNORM: + case PIPE_FORMAT_L8A8_UNORM: + case PIPE_FORMAT_A8_UNORM: + case PIPE_FORMAT_L8_UNORM: + case PIPE_FORMAT_I8_UNORM: + /* TODO: we can actually swizzle these formats on nv40, we + are just preserving the pre-unification behavior. + The whole 2D code is going to be rewritten anyway. */ + if(nvfx_screen(pscreen)->is_nv4x) { + mt->base.tex_usage |= NOUVEAU_TEXTURE_USAGE_LINEAR; + break; + } + /* TODO: Figure out which formats can be swizzled */ + case PIPE_FORMAT_B8G8R8A8_UNORM: + case PIPE_FORMAT_B8G8R8X8_UNORM: + case PIPE_FORMAT_R16_SNORM: + { + if (debug_get_bool_option("NOUVEAU_NO_SWIZZLE", FALSE)) + mt->base.tex_usage |= NOUVEAU_TEXTURE_USAGE_LINEAR; + break; + } + default: + mt->base.tex_usage |= NOUVEAU_TEXTURE_USAGE_LINEAR; + } + } + + if (pt->tex_usage & PIPE_TEXTURE_USAGE_DYNAMIC) + buf_usage |= PIPE_BUFFER_USAGE_CPU_READ_WRITE; + + /* apparently we can't render to swizzled surfaces smaller than 64 bytes, so make them linear. + * If the user did not ask for a render target, they can still render to it, but it will cost them an extra copy. + * This also happens for small mipmaps of large textures. */ + if (pt->tex_usage & PIPE_TEXTURE_USAGE_RENDER_TARGET && util_format_get_stride(pt->format, pt->width0) < 64) + mt->base.tex_usage |= NOUVEAU_TEXTURE_USAGE_LINEAR; + + nvfx_miptree_layout(mt); + + mt->buffer = pscreen->buffer_create(pscreen, 256, buf_usage, mt->total_size); + if (!mt->buffer) { + FREE(mt); + return NULL; + } + mt->bo = nouveau_bo(mt->buffer); + return &mt->base; +} + +static struct pipe_texture * +nvfx_miptree_blanket(struct pipe_screen *pscreen, const struct pipe_texture *pt, + const unsigned *stride, struct pipe_buffer *pb) +{ + struct nvfx_miptree *mt; + + /* Only supports 2D, non-mipmapped textures for the moment */ + if (pt->target != PIPE_TEXTURE_2D || pt->last_level != 0 || + pt->depth0 != 1) + return NULL; + + mt = CALLOC_STRUCT(nvfx_miptree); + if (!mt) + return NULL; + + mt->base = *pt; + pipe_reference_init(&mt->base.reference, 1); + mt->base.screen = pscreen; + mt->level[0].pitch = stride[0]; + mt->level[0].image_offset = CALLOC(1, sizeof(unsigned)); + + /* Assume whoever created this buffer expects it to be linear for now */ + mt->base.tex_usage |= NOUVEAU_TEXTURE_USAGE_LINEAR; + + pipe_buffer_reference(&mt->buffer, pb); + mt->bo = nouveau_bo(mt->buffer); + return &mt->base; +} + +static void +nvfx_miptree_destroy(struct pipe_texture *pt) +{ + struct nvfx_miptree *mt = (struct nvfx_miptree *)pt; + int l; + + pipe_buffer_reference(&mt->buffer, NULL); + for (l = 0; l <= pt->last_level; l++) { + if (mt->level[l].image_offset) + FREE(mt->level[l].image_offset); + } + + FREE(mt); +} + +static struct pipe_surface * +nvfx_miptree_surface_new(struct pipe_screen *pscreen, struct pipe_texture *pt, + unsigned face, unsigned level, unsigned zslice, + unsigned flags) +{ + struct nvfx_miptree *mt = (struct nvfx_miptree *)pt; + struct nv04_surface *ns; + + ns = CALLOC_STRUCT(nv04_surface); + if (!ns) + return NULL; + pipe_texture_reference(&ns->base.texture, pt); + ns->base.format = pt->format; + ns->base.width = u_minify(pt->width0, level); + ns->base.height = u_minify(pt->height0, level); + ns->base.usage = flags; + pipe_reference_init(&ns->base.reference, 1); + ns->base.face = face; + ns->base.level = level; + ns->base.zslice = zslice; + ns->pitch = mt->level[level].pitch; + + if (pt->target == PIPE_TEXTURE_CUBE) { + ns->base.offset = mt->level[level].image_offset[face]; + } else + if (pt->target == PIPE_TEXTURE_3D) { + ns->base.offset = mt->level[level].image_offset[zslice]; + } else { + ns->base.offset = mt->level[level].image_offset[0]; + } + + /* create a linear temporary that we can render into if necessary. + * Note that ns->pitch is always a multiple of 64 for linear surfaces and swizzled surfaces are POT, so + * ns->pitch & 63 is equivalent to (ns->pitch < 64 && swizzled)*/ + if((ns->pitch & 63) && (ns->base.usage & (PIPE_BUFFER_USAGE_GPU_WRITE | NOUVEAU_BUFFER_USAGE_NO_RENDER)) == PIPE_BUFFER_USAGE_GPU_WRITE) + return &nv04_surface_wrap_for_render(pscreen, ((struct nvfx_screen*)pscreen)->eng2d, ns)->base; + + return &ns->base; +} + +static void +nvfx_miptree_surface_del(struct pipe_surface *ps) +{ + struct nv04_surface* ns = (struct nv04_surface*)ps; + if(ns->backing) + { + struct nvfx_screen* screen = (struct nvfx_screen*)ps->texture->screen; + if(ns->backing->base.usage & PIPE_BUFFER_USAGE_GPU_WRITE) + screen->eng2d->copy(screen->eng2d, &ns->backing->base, 0, 0, ps, 0, 0, ns->base.width, ns->base.height); + nvfx_miptree_surface_del(&ns->backing->base); + } + + pipe_texture_reference(&ps->texture, NULL); + FREE(ps); +} + +void +nvfx_screen_init_miptree_functions(struct pipe_screen *pscreen) +{ + pscreen->texture_create = nvfx_miptree_create; + pscreen->texture_destroy = nvfx_miptree_destroy; + pscreen->get_tex_surface = nvfx_miptree_surface_new; + pscreen->tex_surface_destroy = nvfx_miptree_surface_del; + + nouveau_screen(pscreen)->texture_blanket = nvfx_miptree_blanket; +} -- cgit v1.2.3 From 9937116c7b15468088a224da478d927347a76f32 Mon Sep 17 00:00:00 2001 From: Luca Barbieri Date: Sat, 20 Feb 2010 19:39:24 +0100 Subject: nv30, nv40: unify nv[34]0_query.c The files are identical except formatting. --- src/gallium/drivers/nv30/Makefile | 2 - src/gallium/drivers/nv30/nv30_context.c | 4 +- src/gallium/drivers/nv30/nv30_context.h | 2 - src/gallium/drivers/nv30/nv30_query.c | 127 -------------------------------- src/gallium/drivers/nv30/nv30_surface.c | 62 ---------------- src/gallium/drivers/nv40/Makefile | 2 - src/gallium/drivers/nv40/nv40_context.c | 4 +- src/gallium/drivers/nv40/nv40_context.h | 2 - src/gallium/drivers/nv40/nv40_query.c | 127 -------------------------------- src/gallium/drivers/nv40/nv40_surface.c | 64 ---------------- src/gallium/drivers/nvfx/Makefile | 2 + src/gallium/drivers/nvfx/nvfx_context.h | 3 + src/gallium/drivers/nvfx/nvfx_query.c | 127 ++++++++++++++++++++++++++++++++ src/gallium/drivers/nvfx/nvfx_surface.c | 62 ++++++++++++++++ 14 files changed, 198 insertions(+), 392 deletions(-) delete mode 100644 src/gallium/drivers/nv30/nv30_query.c delete mode 100644 src/gallium/drivers/nv30/nv30_surface.c delete mode 100644 src/gallium/drivers/nv40/nv40_query.c delete mode 100644 src/gallium/drivers/nv40/nv40_surface.c create mode 100644 src/gallium/drivers/nvfx/nvfx_query.c create mode 100644 src/gallium/drivers/nvfx/nvfx_surface.c (limited to 'src') diff --git a/src/gallium/drivers/nv30/Makefile b/src/gallium/drivers/nv30/Makefile index d8de297f12..4f9798de0c 100644 --- a/src/gallium/drivers/nv30/Makefile +++ b/src/gallium/drivers/nv30/Makefile @@ -8,12 +8,10 @@ C_SOURCES = \ nv30_draw.c \ nv30_fragprog.c \ nv30_fragtex.c \ - nv30_query.c \ nv30_screen.c \ nv30_state.c \ nv30_state_fb.c \ nv30_state_viewport.c \ - nv30_surface.c \ nv30_vbo.c \ nv30_vertprog.c diff --git a/src/gallium/drivers/nv30/nv30_context.c b/src/gallium/drivers/nv30/nv30_context.c index 6fe8cb3e32..f13458d50a 100644 --- a/src/gallium/drivers/nv30/nv30_context.c +++ b/src/gallium/drivers/nv30/nv30_context.c @@ -73,8 +73,8 @@ nv30_create(struct pipe_screen *pscreen, void *priv) nvfx->is_nv4x = screen->is_nv4x; - nv30_init_query_functions(nvfx); - nv30_init_surface_functions(nvfx); + nvfx_init_query_functions(nvfx); + nvfx_init_surface_functions(nvfx); nv30_init_state_functions(nvfx); nvfx_init_transfer_functions(nvfx); diff --git a/src/gallium/drivers/nv30/nv30_context.h b/src/gallium/drivers/nv30/nv30_context.h index 46b36ee2e5..a0a1c335ec 100644 --- a/src/gallium/drivers/nv30/nv30_context.h +++ b/src/gallium/drivers/nv30/nv30_context.h @@ -4,8 +4,6 @@ #include "nvfx_context.h" extern void nv30_init_state_functions(struct nvfx_context *nvfx); -extern void nv30_init_surface_functions(struct nvfx_context *nvfx); -extern void nv30_init_query_functions(struct nvfx_context *nvfx); /* nv30_draw.c */ extern struct draw_stage *nv30_draw_render_stage(struct nvfx_context *nvfx); diff --git a/src/gallium/drivers/nv30/nv30_query.c b/src/gallium/drivers/nv30/nv30_query.c deleted file mode 100644 index 53b11a8943..0000000000 --- a/src/gallium/drivers/nv30/nv30_query.c +++ /dev/null @@ -1,127 +0,0 @@ -#include "pipe/p_context.h" - -#include "nv30_context.h" - -struct nv30_query { - struct nouveau_resource *object; - unsigned type; - boolean ready; - uint64_t result; -}; - -static INLINE struct nv30_query * -nv30_query(struct pipe_query *pipe) -{ - return (struct nv30_query *)pipe; -} - -static struct pipe_query * -nv30_query_create(struct pipe_context *pipe, unsigned query_type) -{ - struct nv30_query *q; - - q = CALLOC(1, sizeof(struct nv30_query)); - q->type = query_type; - - return (struct pipe_query *)q; -} - -static void -nv30_query_destroy(struct pipe_context *pipe, struct pipe_query *pq) -{ - struct nv30_query *q = nv30_query(pq); - - if (q->object) - nouveau_resource_free(&q->object); - FREE(q); -} - -static void -nv30_query_begin(struct pipe_context *pipe, struct pipe_query *pq) -{ - struct nvfx_context *nvfx = nvfx_context(pipe); - struct nv30_query *q = nv30_query(pq); - struct nvfx_screen *screen = nvfx->screen; - struct nouveau_channel *chan = screen->base.channel; - struct nouveau_grobj *eng3d = screen->eng3d; - - assert(q->type == PIPE_QUERY_OCCLUSION_COUNTER); - - /* Happens when end_query() is called, then another begin_query() - * without querying the result in-between. For now we'll wait for - * the existing query to notify completion, but it could be better. - */ - if (q->object) { - uint64_t tmp; - pipe->get_query_result(pipe, pq, 1, &tmp); - } - - if (nouveau_resource_alloc(nvfx->screen->query_heap, 1, NULL, &q->object)) - assert(0); - nouveau_notifier_reset(nvfx->screen->query, q->object->start); - - BEGIN_RING(chan, eng3d, NV34TCL_QUERY_RESET, 1); - OUT_RING (chan, 1); - BEGIN_RING(chan, eng3d, NV34TCL_QUERY_UNK17CC, 1); - OUT_RING (chan, 1); - - q->ready = FALSE; -} - -static void -nv30_query_end(struct pipe_context *pipe, struct pipe_query *pq) -{ - struct nvfx_context *nvfx = nvfx_context(pipe); - struct nvfx_screen *screen = nvfx->screen; - struct nouveau_channel *chan = screen->base.channel; - struct nouveau_grobj *eng3d = screen->eng3d; - struct nv30_query *q = nv30_query(pq); - - BEGIN_RING(chan, eng3d, NV34TCL_QUERY_GET, 1); - OUT_RING (chan, (0x01 << NV34TCL_QUERY_GET_UNK24_SHIFT) | - ((q->object->start * 32) << NV34TCL_QUERY_GET_OFFSET_SHIFT)); - FIRE_RING(chan); -} - -static boolean -nv30_query_result(struct pipe_context *pipe, struct pipe_query *pq, - boolean wait, uint64_t *result) -{ - struct nvfx_context *nvfx = nvfx_context(pipe); - struct nv30_query *q = nv30_query(pq); - - assert(q->object && q->type == PIPE_QUERY_OCCLUSION_COUNTER); - - if (!q->ready) { - unsigned status; - - status = nouveau_notifier_status(nvfx->screen->query, - q->object->start); - if (status != NV_NOTIFY_STATE_STATUS_COMPLETED) { - if (wait == FALSE) - return FALSE; - - nouveau_notifier_wait_status(nvfx->screen->query, - q->object->start, - NV_NOTIFY_STATE_STATUS_COMPLETED, 0); - } - - q->result = nouveau_notifier_return_val(nvfx->screen->query, - q->object->start); - q->ready = TRUE; - nouveau_resource_free(&q->object); - } - - *result = q->result; - return TRUE; -} - -void -nv30_init_query_functions(struct nvfx_context *nvfx) -{ - nvfx->pipe.create_query = nv30_query_create; - nvfx->pipe.destroy_query = nv30_query_destroy; - nvfx->pipe.begin_query = nv30_query_begin; - nvfx->pipe.end_query = nv30_query_end; - nvfx->pipe.get_query_result = nv30_query_result; -} diff --git a/src/gallium/drivers/nv30/nv30_surface.c b/src/gallium/drivers/nv30/nv30_surface.c deleted file mode 100644 index 613a9fa492..0000000000 --- a/src/gallium/drivers/nv30/nv30_surface.c +++ /dev/null @@ -1,62 +0,0 @@ - -/************************************************************************** - * - * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas. - * All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the - * "Software"), to deal in the Software without restriction, including - * without limitation the rights to use, copy, modify, merge, publish, - * distribute, sub license, and/or sell copies of the Software, and to - * permit persons to whom the Software is furnished to do so, subject to - * the following conditions: - * - * The above copyright notice and this permission notice (including the - * next paragraph) shall be included in all copies or substantial portions - * of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS - * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. - * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR - * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, - * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE - * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. - * - **************************************************************************/ - -#include "nv30_context.h" -#include "pipe/p_defines.h" -#include "util/u_inlines.h" -#include "util/u_tile.h" - -static void -nv30_surface_copy(struct pipe_context *pipe, - struct pipe_surface *dest, unsigned destx, unsigned desty, - struct pipe_surface *src, unsigned srcx, unsigned srcy, - unsigned width, unsigned height) -{ - struct nvfx_context *nvfx = nvfx_context(pipe); - struct nv04_surface_2d *eng2d = nvfx->screen->eng2d; - - eng2d->copy(eng2d, dest, destx, desty, src, srcx, srcy, width, height); -} - -static void -nv30_surface_fill(struct pipe_context *pipe, struct pipe_surface *dest, - unsigned destx, unsigned desty, unsigned width, - unsigned height, unsigned value) -{ - struct nvfx_context *nvfx = nvfx_context(pipe); - struct nv04_surface_2d *eng2d = nvfx->screen->eng2d; - - eng2d->fill(eng2d, dest, destx, desty, width, height, value); -} - -void -nv30_init_surface_functions(struct nvfx_context *nvfx) -{ - nvfx->pipe.surface_copy = nv30_surface_copy; - nvfx->pipe.surface_fill = nv30_surface_fill; -} diff --git a/src/gallium/drivers/nv40/Makefile b/src/gallium/drivers/nv40/Makefile index bf68338e3f..0b3607be89 100644 --- a/src/gallium/drivers/nv40/Makefile +++ b/src/gallium/drivers/nv40/Makefile @@ -8,12 +8,10 @@ C_SOURCES = \ nv40_draw.c \ nv40_fragprog.c \ nv40_fragtex.c \ - nv40_query.c \ nv40_screen.c \ nv40_state.c \ nv40_state_fb.c \ nv40_state_viewport.c \ - nv40_surface.c \ nv40_vbo.c \ nv40_vertprog.c diff --git a/src/gallium/drivers/nv40/nv40_context.c b/src/gallium/drivers/nv40/nv40_context.c index 12f57377cd..441b038b05 100644 --- a/src/gallium/drivers/nv40/nv40_context.c +++ b/src/gallium/drivers/nv40/nv40_context.c @@ -73,8 +73,8 @@ nv40_create(struct pipe_screen *pscreen, void *priv) nvfx->is_nv4x = screen->is_nv4x; - nv40_init_query_functions(nvfx); - nv40_init_surface_functions(nvfx); + nvfx_init_query_functions(nvfx); + nvfx_init_surface_functions(nvfx); nv40_init_state_functions(nvfx); nvfx_init_transfer_functions(nvfx); diff --git a/src/gallium/drivers/nv40/nv40_context.h b/src/gallium/drivers/nv40/nv40_context.h index fe44452f81..4353d78cd2 100644 --- a/src/gallium/drivers/nv40/nv40_context.h +++ b/src/gallium/drivers/nv40/nv40_context.h @@ -4,8 +4,6 @@ #include "nvfx_context.h" extern void nv40_init_state_functions(struct nvfx_context *nvfx); -extern void nv40_init_surface_functions(struct nvfx_context *nvfx); -extern void nv40_init_query_functions(struct nvfx_context *nvfx); /* nv40_draw.c */ extern struct draw_stage *nv40_draw_render_stage(struct nvfx_context *nvfx); diff --git a/src/gallium/drivers/nv40/nv40_query.c b/src/gallium/drivers/nv40/nv40_query.c deleted file mode 100644 index 48cfc4d593..0000000000 --- a/src/gallium/drivers/nv40/nv40_query.c +++ /dev/null @@ -1,127 +0,0 @@ -#include "pipe/p_context.h" - -#include "nv40_context.h" - -struct nv40_query { - struct nouveau_resource *object; - unsigned type; - boolean ready; - uint64_t result; -}; - -static INLINE struct nv40_query * -nv40_query(struct pipe_query *pipe) -{ - return (struct nv40_query *)pipe; -} - -static struct pipe_query * -nv40_query_create(struct pipe_context *pipe, unsigned query_type) -{ - struct nv40_query *q; - - q = CALLOC(1, sizeof(struct nv40_query)); - q->type = query_type; - - return (struct pipe_query *)q; -} - -static void -nv40_query_destroy(struct pipe_context *pipe, struct pipe_query *pq) -{ - struct nv40_query *q = nv40_query(pq); - - if (q->object) - nouveau_resource_free(&q->object); - FREE(q); -} - -static void -nv40_query_begin(struct pipe_context *pipe, struct pipe_query *pq) -{ - struct nvfx_context *nvfx = nvfx_context(pipe); - struct nv40_query *q = nv40_query(pq); - struct nvfx_screen *screen = nvfx->screen; - struct nouveau_channel *chan = screen->base.channel; - struct nouveau_grobj *eng3d = screen->eng3d; - - assert(q->type == PIPE_QUERY_OCCLUSION_COUNTER); - - /* Happens when end_query() is called, then another begin_query() - * without querying the result in-between. For now we'll wait for - * the existing query to notify completion, but it could be better. - */ - if (q->object) { - uint64_t tmp; - pipe->get_query_result(pipe, pq, 1, &tmp); - } - - if (nouveau_resource_alloc(nvfx->screen->query_heap, 1, NULL, &q->object)) - assert(0); - nouveau_notifier_reset(nvfx->screen->query, q->object->start); - - BEGIN_RING(chan, eng3d, NV34TCL_QUERY_RESET, 1); - OUT_RING (chan, 1); - BEGIN_RING(chan, eng3d, NV34TCL_QUERY_UNK17CC, 1); - OUT_RING (chan, 1); - - q->ready = FALSE; -} - -static void -nv40_query_end(struct pipe_context *pipe, struct pipe_query *pq) -{ - struct nvfx_context *nvfx = nvfx_context(pipe); - struct nv40_query *q = nv40_query(pq); - struct nvfx_screen *screen = nvfx->screen; - struct nouveau_channel *chan = screen->base.channel; - struct nouveau_grobj *eng3d = screen->eng3d; - - BEGIN_RING(chan, eng3d, NV34TCL_QUERY_GET, 1); - OUT_RING (chan, (0x01 << NV34TCL_QUERY_GET_UNK24_SHIFT) | - ((q->object->start * 32) << NV34TCL_QUERY_GET_OFFSET_SHIFT)); - FIRE_RING(chan); -} - -static boolean -nv40_query_result(struct pipe_context *pipe, struct pipe_query *pq, - boolean wait, uint64_t *result) -{ - struct nvfx_context *nvfx = nvfx_context(pipe); - struct nv40_query *q = nv40_query(pq); - - assert(q->object && q->type == PIPE_QUERY_OCCLUSION_COUNTER); - - if (!q->ready) { - unsigned status; - - status = nouveau_notifier_status(nvfx->screen->query, - q->object->start); - if (status != NV_NOTIFY_STATE_STATUS_COMPLETED) { - if (wait == FALSE) - return FALSE; - nouveau_notifier_wait_status(nvfx->screen->query, - q->object->start, - NV_NOTIFY_STATE_STATUS_COMPLETED, - 0); - } - - q->result = nouveau_notifier_return_val(nvfx->screen->query, - q->object->start); - q->ready = TRUE; - nouveau_resource_free(&q->object); - } - - *result = q->result; - return TRUE; -} - -void -nv40_init_query_functions(struct nvfx_context *nvfx) -{ - nvfx->pipe.create_query = nv40_query_create; - nvfx->pipe.destroy_query = nv40_query_destroy; - nvfx->pipe.begin_query = nv40_query_begin; - nvfx->pipe.end_query = nv40_query_end; - nvfx->pipe.get_query_result = nv40_query_result; -} diff --git a/src/gallium/drivers/nv40/nv40_surface.c b/src/gallium/drivers/nv40/nv40_surface.c deleted file mode 100644 index 328c23b8b4..0000000000 --- a/src/gallium/drivers/nv40/nv40_surface.c +++ /dev/null @@ -1,64 +0,0 @@ - -/************************************************************************** - * - * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas. - * All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the - * "Software"), to deal in the Software without restriction, including - * without limitation the rights to use, copy, modify, merge, publish, - * distribute, sub license, and/or sell copies of the Software, and to - * permit persons to whom the Software is furnished to do so, subject to - * the following conditions: - * - * The above copyright notice and this permission notice (including the - * next paragraph) shall be included in all copies or substantial portions - * of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS - * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. - * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR - * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, - * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE - * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. - * - **************************************************************************/ - -#include "pipe/p_defines.h" -#include "util/u_inlines.h" - -#include "util/u_tile.h" - -#include "nv40_context.h" - -static void -nv40_surface_copy(struct pipe_context *pipe, - struct pipe_surface *dest, unsigned destx, unsigned desty, - struct pipe_surface *src, unsigned srcx, unsigned srcy, - unsigned width, unsigned height) -{ - struct nvfx_context *nvfx = nvfx_context(pipe); - struct nv04_surface_2d *eng2d = nvfx->screen->eng2d; - - eng2d->copy(eng2d, dest, destx, desty, src, srcx, srcy, width, height); -} - -static void -nv40_surface_fill(struct pipe_context *pipe, struct pipe_surface *dest, - unsigned destx, unsigned desty, unsigned width, - unsigned height, unsigned value) -{ - struct nvfx_context *nvfx = nvfx_context(pipe); - struct nv04_surface_2d *eng2d = nvfx->screen->eng2d; - - eng2d->fill(eng2d, dest, destx, desty, width, height, value); -} - -void -nv40_init_surface_functions(struct nvfx_context *nvfx) -{ - nvfx->pipe.surface_copy = nv40_surface_copy; - nvfx->pipe.surface_fill = nv40_surface_fill; -} diff --git a/src/gallium/drivers/nvfx/Makefile b/src/gallium/drivers/nvfx/Makefile index 5073168604..f51ab1856b 100644 --- a/src/gallium/drivers/nvfx/Makefile +++ b/src/gallium/drivers/nvfx/Makefile @@ -7,11 +7,13 @@ C_SOURCES = \ nvfx_clear.c \ nvfx_state_emit.c \ nvfx_miptree.c \ + nvfx_query.c \ nvfx_state_blend.c \ nvfx_state_rasterizer.c \ nvfx_state_scissor.c \ nvfx_state_stipple.c \ nvfx_state_zsa.c \ + nvfx_surface.c \ nvfx_transfer.c include ../../Makefile.template diff --git a/src/gallium/drivers/nvfx/nvfx_context.h b/src/gallium/drivers/nvfx/nvfx_context.h index 8f5013a9d6..5f61d4450d 100644 --- a/src/gallium/drivers/nvfx/nvfx_context.h +++ b/src/gallium/drivers/nvfx/nvfx_context.h @@ -189,6 +189,9 @@ extern struct nvfx_state_entry nvfx_state_sr; extern struct nvfx_state_entry nvfx_state_stipple; extern struct nvfx_state_entry nvfx_state_zsa; +extern void nvfx_init_query_functions(struct nvfx_context *nvfx); +extern void nvfx_init_surface_functions(struct nvfx_context *nvfx); + /* nvfx_clear.c */ extern void nvfx_clear(struct pipe_context *pipe, unsigned buffers, const float *rgba, double depth, unsigned stencil); diff --git a/src/gallium/drivers/nvfx/nvfx_query.c b/src/gallium/drivers/nvfx/nvfx_query.c new file mode 100644 index 0000000000..acbaf75a23 --- /dev/null +++ b/src/gallium/drivers/nvfx/nvfx_query.c @@ -0,0 +1,127 @@ +#include "pipe/p_context.h" + +#include "nvfx_context.h" + +struct nvfx_query { + struct nouveau_resource *object; + unsigned type; + boolean ready; + uint64_t result; +}; + +static INLINE struct nvfx_query * +nvfx_query(struct pipe_query *pipe) +{ + return (struct nvfx_query *)pipe; +} + +static struct pipe_query * +nvfx_query_create(struct pipe_context *pipe, unsigned query_type) +{ + struct nvfx_query *q; + + q = CALLOC(1, sizeof(struct nvfx_query)); + q->type = query_type; + + return (struct pipe_query *)q; +} + +static void +nvfx_query_destroy(struct pipe_context *pipe, struct pipe_query *pq) +{ + struct nvfx_query *q = nvfx_query(pq); + + if (q->object) + nouveau_resource_free(&q->object); + FREE(q); +} + +static void +nvfx_query_begin(struct pipe_context *pipe, struct pipe_query *pq) +{ + struct nvfx_context *nvfx = nvfx_context(pipe); + struct nvfx_query *q = nvfx_query(pq); + struct nvfx_screen *screen = nvfx->screen; + struct nouveau_channel *chan = screen->base.channel; + struct nouveau_grobj *eng3d = screen->eng3d; + + assert(q->type == PIPE_QUERY_OCCLUSION_COUNTER); + + /* Happens when end_query() is called, then another begin_query() + * without querying the result in-between. For now we'll wait for + * the existing query to notify completion, but it could be better. + */ + if (q->object) { + uint64_t tmp; + pipe->get_query_result(pipe, pq, 1, &tmp); + } + + if (nouveau_resource_alloc(nvfx->screen->query_heap, 1, NULL, &q->object)) + assert(0); + nouveau_notifier_reset(nvfx->screen->query, q->object->start); + + BEGIN_RING(chan, eng3d, NV34TCL_QUERY_RESET, 1); + OUT_RING (chan, 1); + BEGIN_RING(chan, eng3d, NV34TCL_QUERY_UNK17CC, 1); + OUT_RING (chan, 1); + + q->ready = FALSE; +} + +static void +nvfx_query_end(struct pipe_context *pipe, struct pipe_query *pq) +{ + struct nvfx_context *nvfx = nvfx_context(pipe); + struct nvfx_screen *screen = nvfx->screen; + struct nouveau_channel *chan = screen->base.channel; + struct nouveau_grobj *eng3d = screen->eng3d; + struct nvfx_query *q = nvfx_query(pq); + + BEGIN_RING(chan, eng3d, NV34TCL_QUERY_GET, 1); + OUT_RING (chan, (0x01 << NV34TCL_QUERY_GET_UNK24_SHIFT) | + ((q->object->start * 32) << NV34TCL_QUERY_GET_OFFSET_SHIFT)); + FIRE_RING(chan); +} + +static boolean +nvfx_query_result(struct pipe_context *pipe, struct pipe_query *pq, + boolean wait, uint64_t *result) +{ + struct nvfx_context *nvfx = nvfx_context(pipe); + struct nvfx_query *q = nvfx_query(pq); + + assert(q->object && q->type == PIPE_QUERY_OCCLUSION_COUNTER); + + if (!q->ready) { + unsigned status; + + status = nouveau_notifier_status(nvfx->screen->query, + q->object->start); + if (status != NV_NOTIFY_STATE_STATUS_COMPLETED) { + if (wait == FALSE) + return FALSE; + + nouveau_notifier_wait_status(nvfx->screen->query, + q->object->start, + NV_NOTIFY_STATE_STATUS_COMPLETED, 0); + } + + q->result = nouveau_notifier_return_val(nvfx->screen->query, + q->object->start); + q->ready = TRUE; + nouveau_resource_free(&q->object); + } + + *result = q->result; + return TRUE; +} + +void +nvfx_init_query_functions(struct nvfx_context *nvfx) +{ + nvfx->pipe.create_query = nvfx_query_create; + nvfx->pipe.destroy_query = nvfx_query_destroy; + nvfx->pipe.begin_query = nvfx_query_begin; + nvfx->pipe.end_query = nvfx_query_end; + nvfx->pipe.get_query_result = nvfx_query_result; +} diff --git a/src/gallium/drivers/nvfx/nvfx_surface.c b/src/gallium/drivers/nvfx/nvfx_surface.c new file mode 100644 index 0000000000..8a05ad0a57 --- /dev/null +++ b/src/gallium/drivers/nvfx/nvfx_surface.c @@ -0,0 +1,62 @@ + +/************************************************************************** + * + * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas. + * All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + **************************************************************************/ + +#include "nvfx_context.h" +#include "pipe/p_defines.h" +#include "util/u_inlines.h" +#include "util/u_tile.h" + +static void +nvfx_surface_copy(struct pipe_context *pipe, + struct pipe_surface *dest, unsigned destx, unsigned desty, + struct pipe_surface *src, unsigned srcx, unsigned srcy, + unsigned width, unsigned height) +{ + struct nvfx_context *nvfx = nvfx_context(pipe); + struct nv04_surface_2d *eng2d = nvfx->screen->eng2d; + + eng2d->copy(eng2d, dest, destx, desty, src, srcx, srcy, width, height); +} + +static void +nvfx_surface_fill(struct pipe_context *pipe, struct pipe_surface *dest, + unsigned destx, unsigned desty, unsigned width, + unsigned height, unsigned value) +{ + struct nvfx_context *nvfx = nvfx_context(pipe); + struct nv04_surface_2d *eng2d = nvfx->screen->eng2d; + + eng2d->fill(eng2d, dest, destx, desty, width, height, value); +} + +void +nvfx_init_surface_functions(struct nvfx_context *nvfx) +{ + nvfx->pipe.surface_copy = nvfx_surface_copy; + nvfx->pipe.surface_fill = nvfx_surface_fill; +} -- cgit v1.2.3 From 4d93ef1a015c8ec7341b0793e87ec375014436b3 Mon Sep 17 00:00:00 2001 From: Luca Barbieri Date: Sat, 20 Feb 2010 23:30:59 +0100 Subject: nv30, nv40: unify nv[34]0_state_viewport.c The files are identical, except for an extra comment in nv30. --- src/gallium/drivers/nv30/Makefile | 1 - src/gallium/drivers/nv30/nv30_context.h | 1 - src/gallium/drivers/nv30/nv30_state_viewport.c | 42 -------------------------- src/gallium/drivers/nv40/Makefile | 1 - src/gallium/drivers/nv40/nv40_context.h | 1 - src/gallium/drivers/nv40/nv40_state_viewport.c | 38 ----------------------- src/gallium/drivers/nvfx/Makefile | 1 + src/gallium/drivers/nvfx/nvfx_context.h | 1 + src/gallium/drivers/nvfx/nvfx_state_emit.c | 2 +- src/gallium/drivers/nvfx/nvfx_state_viewport.c | 38 +++++++++++++++++++++++ 10 files changed, 41 insertions(+), 85 deletions(-) delete mode 100644 src/gallium/drivers/nv30/nv30_state_viewport.c delete mode 100644 src/gallium/drivers/nv40/nv40_state_viewport.c create mode 100644 src/gallium/drivers/nvfx/nvfx_state_viewport.c (limited to 'src') diff --git a/src/gallium/drivers/nv30/Makefile b/src/gallium/drivers/nv30/Makefile index 4f9798de0c..6ee0d8f248 100644 --- a/src/gallium/drivers/nv30/Makefile +++ b/src/gallium/drivers/nv30/Makefile @@ -11,7 +11,6 @@ C_SOURCES = \ nv30_screen.c \ nv30_state.c \ nv30_state_fb.c \ - nv30_state_viewport.c \ nv30_vbo.c \ nv30_vertprog.c diff --git a/src/gallium/drivers/nv30/nv30_context.h b/src/gallium/drivers/nv30/nv30_context.h index a0a1c335ec..37def47b61 100644 --- a/src/gallium/drivers/nv30/nv30_context.h +++ b/src/gallium/drivers/nv30/nv30_context.h @@ -22,7 +22,6 @@ extern void nv30_fragtex_bind(struct nvfx_context *); /* nv30_state.c and friends */ extern struct nvfx_state_entry nv30_state_fragprog; extern struct nvfx_state_entry nv30_state_vertprog; -extern struct nvfx_state_entry nv30_state_viewport; extern struct nvfx_state_entry nv30_state_framebuffer; extern struct nvfx_state_entry nv30_state_fragtex; extern struct nvfx_state_entry nv30_state_vbo; diff --git a/src/gallium/drivers/nv30/nv30_state_viewport.c b/src/gallium/drivers/nv30/nv30_state_viewport.c deleted file mode 100644 index 2e9d5b14c7..0000000000 --- a/src/gallium/drivers/nv30/nv30_state_viewport.c +++ /dev/null @@ -1,42 +0,0 @@ -#include "nv30_context.h" - -static boolean -nv30_state_viewport_validate(struct nvfx_context *nvfx) -{ - struct pipe_viewport_state *vpt = &nvfx->viewport; - struct nouveau_stateobj *so; - - if (nvfx->state.hw[NVFX_STATE_VIEWPORT] && - !(nvfx->dirty & NVFX_NEW_VIEWPORT)) - return FALSE; - - so = so_new(3, 10, 0); - so_method(so, nvfx->screen->eng3d, - NV34TCL_VIEWPORT_TRANSLATE_X, 8); - so_data (so, fui(vpt->translate[0])); - so_data (so, fui(vpt->translate[1])); - so_data (so, fui(vpt->translate[2])); - so_data (so, fui(vpt->translate[3])); - so_data (so, fui(vpt->scale[0])); - so_data (so, fui(vpt->scale[1])); - so_data (so, fui(vpt->scale[2])); - so_data (so, fui(vpt->scale[3])); -/* so_method(so, nvfx->screen->eng3d, 0x1d78, 1); - so_data (so, 1); -*/ - /* TODO/FIXME: never saw value 0x0110 in renouveau dumps, only 0x0001 */ - so_method(so, nvfx->screen->eng3d, 0x1d78, 1); - so_data (so, 1); - - so_ref(so, &nvfx->state.hw[NVFX_STATE_VIEWPORT]); - so_ref(NULL, &so); - return TRUE; -} - -struct nvfx_state_entry nv30_state_viewport = { - .validate = nv30_state_viewport_validate, - .dirty = { - .pipe = NVFX_NEW_VIEWPORT | NVFX_NEW_RAST, - .hw = NVFX_STATE_VIEWPORT - } -}; diff --git a/src/gallium/drivers/nv40/Makefile b/src/gallium/drivers/nv40/Makefile index 0b3607be89..85d6ce9886 100644 --- a/src/gallium/drivers/nv40/Makefile +++ b/src/gallium/drivers/nv40/Makefile @@ -11,7 +11,6 @@ C_SOURCES = \ nv40_screen.c \ nv40_state.c \ nv40_state_fb.c \ - nv40_state_viewport.c \ nv40_vbo.c \ nv40_vertprog.c diff --git a/src/gallium/drivers/nv40/nv40_context.h b/src/gallium/drivers/nv40/nv40_context.h index 4353d78cd2..a3000eeca0 100644 --- a/src/gallium/drivers/nv40/nv40_context.h +++ b/src/gallium/drivers/nv40/nv40_context.h @@ -26,7 +26,6 @@ extern void nv40_fragtex_bind(struct nvfx_context *); /* nv40_state.c and friends */ extern struct nvfx_state_entry nv40_state_fragprog; extern struct nvfx_state_entry nv40_state_vertprog; -extern struct nvfx_state_entry nv40_state_viewport; extern struct nvfx_state_entry nv40_state_framebuffer; extern struct nvfx_state_entry nv40_state_fragtex; extern struct nvfx_state_entry nv40_state_vbo; diff --git a/src/gallium/drivers/nv40/nv40_state_viewport.c b/src/gallium/drivers/nv40/nv40_state_viewport.c deleted file mode 100644 index bf73e1119e..0000000000 --- a/src/gallium/drivers/nv40/nv40_state_viewport.c +++ /dev/null @@ -1,38 +0,0 @@ -#include "nv40_context.h" - -static boolean -nv40_state_viewport_validate(struct nvfx_context *nvfx) -{ - struct pipe_viewport_state *vpt = &nvfx->viewport; - struct nouveau_stateobj *so; - - if (nvfx->state.hw[NVFX_STATE_VIEWPORT] && - !(nvfx->dirty & NVFX_NEW_VIEWPORT)) - return FALSE; - - so = so_new(2, 9, 0); - so_method(so, nvfx->screen->eng3d, - NV34TCL_VIEWPORT_TRANSLATE_X, 8); - so_data (so, fui(vpt->translate[0])); - so_data (so, fui(vpt->translate[1])); - so_data (so, fui(vpt->translate[2])); - so_data (so, fui(vpt->translate[3])); - so_data (so, fui(vpt->scale[0])); - so_data (so, fui(vpt->scale[1])); - so_data (so, fui(vpt->scale[2])); - so_data (so, fui(vpt->scale[3])); - so_method(so, nvfx->screen->eng3d, 0x1d78, 1); - so_data (so, 1); - - so_ref(so, &nvfx->state.hw[NVFX_STATE_VIEWPORT]); - so_ref(NULL, &so); - return TRUE; -} - -struct nvfx_state_entry nv40_state_viewport = { - .validate = nv40_state_viewport_validate, - .dirty = { - .pipe = NVFX_NEW_VIEWPORT | NVFX_NEW_RAST, - .hw = NVFX_STATE_VIEWPORT - } -}; diff --git a/src/gallium/drivers/nvfx/Makefile b/src/gallium/drivers/nvfx/Makefile index f51ab1856b..2f198d9d1a 100644 --- a/src/gallium/drivers/nvfx/Makefile +++ b/src/gallium/drivers/nvfx/Makefile @@ -12,6 +12,7 @@ C_SOURCES = \ nvfx_state_rasterizer.c \ nvfx_state_scissor.c \ nvfx_state_stipple.c \ + nvfx_state_viewport.c \ nvfx_state_zsa.c \ nvfx_surface.c \ nvfx_transfer.c diff --git a/src/gallium/drivers/nvfx/nvfx_context.h b/src/gallium/drivers/nvfx/nvfx_context.h index 5f61d4450d..b6e6cf8fd9 100644 --- a/src/gallium/drivers/nvfx/nvfx_context.h +++ b/src/gallium/drivers/nvfx/nvfx_context.h @@ -187,6 +187,7 @@ extern struct nvfx_state_entry nvfx_state_rasterizer; extern struct nvfx_state_entry nvfx_state_scissor; extern struct nvfx_state_entry nvfx_state_sr; extern struct nvfx_state_entry nvfx_state_stipple; +extern struct nvfx_state_entry nvfx_state_viewport; extern struct nvfx_state_entry nvfx_state_zsa; extern void nvfx_init_query_functions(struct nvfx_context *nvfx); diff --git a/src/gallium/drivers/nvfx/nvfx_state_emit.c b/src/gallium/drivers/nvfx/nvfx_state_emit.c index 04c0429ce1..b86cb44936 100644 --- a/src/gallium/drivers/nvfx/nvfx_state_emit.c +++ b/src/gallium/drivers/nvfx/nvfx_state_emit.c @@ -16,7 +16,7 @@ static struct nvfx_state_entry *name##_render_states[] = { \ &nvfx_state_blend_colour, \ &nvfx_state_zsa, \ &nvfx_state_sr, \ - &nvxx##_state_viewport, \ + &nvfx_state_viewport, \ &nvxx##_state_##vbo, \ NULL \ } diff --git a/src/gallium/drivers/nvfx/nvfx_state_viewport.c b/src/gallium/drivers/nvfx/nvfx_state_viewport.c new file mode 100644 index 0000000000..72057a80f8 --- /dev/null +++ b/src/gallium/drivers/nvfx/nvfx_state_viewport.c @@ -0,0 +1,38 @@ +#include "nvfx_context.h" + +static boolean +nvfx_state_viewport_validate(struct nvfx_context *nvfx) +{ + struct pipe_viewport_state *vpt = &nvfx->viewport; + struct nouveau_stateobj *so; + + if (nvfx->state.hw[NVFX_STATE_VIEWPORT] && + !(nvfx->dirty & NVFX_NEW_VIEWPORT)) + return FALSE; + + so = so_new(2, 9, 0); + so_method(so, nvfx->screen->eng3d, + NV34TCL_VIEWPORT_TRANSLATE_X, 8); + so_data (so, fui(vpt->translate[0])); + so_data (so, fui(vpt->translate[1])); + so_data (so, fui(vpt->translate[2])); + so_data (so, fui(vpt->translate[3])); + so_data (so, fui(vpt->scale[0])); + so_data (so, fui(vpt->scale[1])); + so_data (so, fui(vpt->scale[2])); + so_data (so, fui(vpt->scale[3])); + so_method(so, nvfx->screen->eng3d, 0x1d78, 1); + so_data (so, 1); + + so_ref(so, &nvfx->state.hw[NVFX_STATE_VIEWPORT]); + so_ref(NULL, &so); + return TRUE; +} + +struct nvfx_state_entry nvfx_state_viewport = { + .validate = nvfx_state_viewport_validate, + .dirty = { + .pipe = NVFX_NEW_VIEWPORT | NVFX_NEW_RAST, + .hw = NVFX_STATE_VIEWPORT + } +}; -- cgit v1.2.3 From cd0d03adab65a9586e0c5d60e9ee487677914f3b Mon Sep 17 00:00:00 2001 From: Luca Barbieri Date: Sun, 21 Feb 2010 00:59:30 +0100 Subject: nv30, nv40: non-trivially unify nv[34]0_state_fb.c The files are significantly different due to: 1. nv30 support 2 render targets, nv40 4 2. z-buffer pitch is set differently 3. nv30 has a limitation of colour_bits >= zeta_bits. This may not actually exist in the driver though 4. nv30 points color0 at depth in the depth-only case 5. nv30 sets NV34TCL_VIEWPORT_TX_ORIGIN to 0. This is probably unnecessary This patch attempts to unify the two files and preserve the existing behavior. --- src/gallium/drivers/nv30/Makefile | 1 - src/gallium/drivers/nv30/nv30_context.h | 1 - src/gallium/drivers/nv30/nv30_state_fb.c | 173 --------------------- src/gallium/drivers/nv40/Makefile | 1 - src/gallium/drivers/nv40/nv40_context.h | 1 - src/gallium/drivers/nv40/nv40_state_fb.c | 175 --------------------- src/gallium/drivers/nvfx/Makefile | 1 + src/gallium/drivers/nvfx/nvfx_context.h | 1 + src/gallium/drivers/nvfx/nvfx_state_emit.c | 2 +- src/gallium/drivers/nvfx/nvfx_state_fb.c | 234 +++++++++++++++++++++++++++++ 10 files changed, 237 insertions(+), 353 deletions(-) delete mode 100644 src/gallium/drivers/nv30/nv30_state_fb.c delete mode 100644 src/gallium/drivers/nv40/nv40_state_fb.c create mode 100644 src/gallium/drivers/nvfx/nvfx_state_fb.c (limited to 'src') diff --git a/src/gallium/drivers/nv30/Makefile b/src/gallium/drivers/nv30/Makefile index 6ee0d8f248..b5728a34f8 100644 --- a/src/gallium/drivers/nv30/Makefile +++ b/src/gallium/drivers/nv30/Makefile @@ -10,7 +10,6 @@ C_SOURCES = \ nv30_fragtex.c \ nv30_screen.c \ nv30_state.c \ - nv30_state_fb.c \ nv30_vbo.c \ nv30_vertprog.c diff --git a/src/gallium/drivers/nv30/nv30_context.h b/src/gallium/drivers/nv30/nv30_context.h index 37def47b61..c203425cc9 100644 --- a/src/gallium/drivers/nv30/nv30_context.h +++ b/src/gallium/drivers/nv30/nv30_context.h @@ -22,7 +22,6 @@ extern void nv30_fragtex_bind(struct nvfx_context *); /* nv30_state.c and friends */ extern struct nvfx_state_entry nv30_state_fragprog; extern struct nvfx_state_entry nv30_state_vertprog; -extern struct nvfx_state_entry nv30_state_framebuffer; extern struct nvfx_state_entry nv30_state_fragtex; extern struct nvfx_state_entry nv30_state_vbo; diff --git a/src/gallium/drivers/nv30/nv30_state_fb.c b/src/gallium/drivers/nv30/nv30_state_fb.c deleted file mode 100644 index e9e215dcce..0000000000 --- a/src/gallium/drivers/nv30/nv30_state_fb.c +++ /dev/null @@ -1,173 +0,0 @@ -#include "nv30_context.h" -#include "nouveau/nouveau_util.h" - -static boolean -nv30_state_framebuffer_validate(struct nvfx_context *nvfx) -{ - struct pipe_framebuffer_state *fb = &nvfx->framebuffer; - struct nouveau_channel *chan = nvfx->screen->base.channel; - struct nouveau_grobj *eng3d = nvfx->screen->eng3d; - struct nv04_surface *rt[2], *zeta = NULL; - uint32_t rt_enable = 0, rt_format = 0; - int i, colour_format = 0, zeta_format = 0, depth_only = 0; - struct nouveau_stateobj *so = so_new(12, 18, 10); - unsigned rt_flags = NOUVEAU_BO_RDWR | NOUVEAU_BO_VRAM; - unsigned w = fb->width; - unsigned h = fb->height; - struct nvfx_miptree *nv30mt; - int colour_bits = 32, zeta_bits = 32; - - for (i = 0; i < fb->nr_cbufs; i++) { - if (colour_format) { - assert(colour_format == fb->cbufs[i]->format); - } else { - colour_format = fb->cbufs[i]->format; - rt_enable |= (NV34TCL_RT_ENABLE_COLOR0 << i); - rt[i] = (struct nv04_surface *)fb->cbufs[i]; - } - } - - if (rt_enable & NV34TCL_RT_ENABLE_COLOR1) - rt_enable |= NV34TCL_RT_ENABLE_MRT; - - if (fb->zsbuf) { - zeta_format = fb->zsbuf->format; - zeta = (struct nv04_surface *)fb->zsbuf; - } - - if (rt_enable & (NV34TCL_RT_ENABLE_COLOR0|NV34TCL_RT_ENABLE_COLOR1)) { - /* Render to at least a colour buffer */ - if (!(rt[0]->base.texture->tex_usage & NOUVEAU_TEXTURE_USAGE_LINEAR)) { - assert(!(fb->width & (fb->width - 1)) && !(fb->height & (fb->height - 1))); - for (i = 1; i < fb->nr_cbufs; i++) - assert(!(rt[i]->base.texture->tex_usage & NOUVEAU_TEXTURE_USAGE_LINEAR)); - - rt_format = NV34TCL_RT_FORMAT_TYPE_SWIZZLED | - (log2i(rt[0]->base.width) << NV34TCL_RT_FORMAT_LOG2_WIDTH_SHIFT) | - (log2i(rt[0]->base.height) << NV34TCL_RT_FORMAT_LOG2_HEIGHT_SHIFT); - } - else - rt_format = NV34TCL_RT_FORMAT_TYPE_LINEAR; - } else if (fb->zsbuf) { - depth_only = 1; - - /* Render to depth buffer only */ - if (!(zeta->base.texture->tex_usage & NOUVEAU_TEXTURE_USAGE_LINEAR)) { - assert(!(fb->width & (fb->width - 1)) && !(fb->height & (fb->height - 1))); - - rt_format = NV34TCL_RT_FORMAT_TYPE_SWIZZLED | - (log2i(zeta->base.width) << NV34TCL_RT_FORMAT_LOG2_WIDTH_SHIFT) | - (log2i(zeta->base.height) << NV34TCL_RT_FORMAT_LOG2_HEIGHT_SHIFT); - } - else - rt_format = NV34TCL_RT_FORMAT_TYPE_LINEAR; - } else { - return FALSE; - } - - switch (colour_format) { - case PIPE_FORMAT_B8G8R8X8_UNORM: - rt_format |= NV34TCL_RT_FORMAT_COLOR_X8R8G8B8; - break; - case PIPE_FORMAT_B8G8R8A8_UNORM: - case 0: - rt_format |= NV34TCL_RT_FORMAT_COLOR_A8R8G8B8; - break; - case PIPE_FORMAT_B5G6R5_UNORM: - rt_format |= NV34TCL_RT_FORMAT_COLOR_R5G6B5; - colour_bits = 16; - break; - default: - assert(0); - } - - switch (zeta_format) { - case PIPE_FORMAT_Z16_UNORM: - rt_format |= NV34TCL_RT_FORMAT_ZETA_Z16; - zeta_bits = 16; - break; - case PIPE_FORMAT_S8Z24_UNORM: - case PIPE_FORMAT_X8Z24_UNORM: - case 0: - rt_format |= NV34TCL_RT_FORMAT_ZETA_Z24S8; - break; - default: - assert(0); - } - - if (colour_bits > zeta_bits) { - return FALSE; - } - - if (depth_only || (rt_enable & NV34TCL_RT_ENABLE_COLOR0)) { - struct nv04_surface *rt0 = (depth_only ? zeta : rt[0]); - uint32_t pitch = rt0->pitch; - - if (zeta) { - pitch |= (zeta->pitch << 16); - } else { - pitch |= (pitch << 16); - } - - nv30mt = (struct nvfx_miptree *) rt0->base.texture; - so_method(so, eng3d, NV34TCL_DMA_COLOR0, 1); - so_reloc (so, nouveau_bo(nv30mt->buffer), 0, rt_flags | NOUVEAU_BO_OR, - chan->vram->handle, chan->gart->handle); - so_method(so, eng3d, NV34TCL_COLOR0_PITCH, 2); - so_data (so, pitch); - so_reloc (so, nouveau_bo(nv30mt->buffer), rt0->base.offset, - rt_flags | NOUVEAU_BO_LOW, 0, 0); - } - - if (rt_enable & NV34TCL_RT_ENABLE_COLOR1) { - nv30mt = (struct nvfx_miptree *)rt[1]->base.texture; - so_method(so, eng3d, NV34TCL_DMA_COLOR1, 1); - so_reloc (so, nouveau_bo(nv30mt->buffer), 0, rt_flags | NOUVEAU_BO_OR, - chan->vram->handle, chan->gart->handle); - so_method(so, eng3d, NV34TCL_COLOR1_OFFSET, 2); - so_reloc (so, nouveau_bo(nv30mt->buffer), rt[1]->base.offset, - rt_flags | NOUVEAU_BO_LOW, 0, 0); - so_data (so, rt[1]->pitch); - } - - if (zeta_format) { - nv30mt = (struct nvfx_miptree *)zeta->base.texture; - so_method(so, eng3d, NV34TCL_DMA_ZETA, 1); - so_reloc (so, nouveau_bo(nv30mt->buffer), 0, rt_flags | NOUVEAU_BO_OR, - chan->vram->handle, chan->gart->handle); - so_method(so, eng3d, NV34TCL_ZETA_OFFSET, 1); - so_reloc (so, nouveau_bo(nv30mt->buffer), zeta->base.offset, - rt_flags | NOUVEAU_BO_LOW, 0, 0); - /* TODO: allocate LMA depth buffer */ - } - - so_method(so, eng3d, NV34TCL_RT_ENABLE, 1); - so_data (so, rt_enable); - so_method(so, eng3d, NV34TCL_RT_HORIZ, 3); - so_data (so, (w << 16) | 0); - so_data (so, (h << 16) | 0); - so_data (so, rt_format); - so_method(so, eng3d, NV34TCL_VIEWPORT_HORIZ, 2); - so_data (so, (w << 16) | 0); - so_data (so, (h << 16) | 0); - so_method(so, eng3d, NV34TCL_VIEWPORT_CLIP_HORIZ(0), 2); - so_data (so, ((w - 1) << 16) | 0); - so_data (so, ((h - 1) << 16) | 0); - so_method(so, eng3d, 0x1d88, 1); - so_data (so, (1 << 12) | h); - /* Wonder why this is needed, context should all be set to zero on init */ - so_method(so, eng3d, NV34TCL_VIEWPORT_TX_ORIGIN, 1); - so_data (so, 0); - - so_ref(so, &nvfx->state.hw[NVFX_STATE_FB]); - so_ref(NULL, &so); - return TRUE; -} - -struct nvfx_state_entry nv30_state_framebuffer = { - .validate = nv30_state_framebuffer_validate, - .dirty = { - .pipe = NVFX_NEW_FB, - .hw = NVFX_STATE_FB - } -}; diff --git a/src/gallium/drivers/nv40/Makefile b/src/gallium/drivers/nv40/Makefile index 85d6ce9886..f78e81ac4b 100644 --- a/src/gallium/drivers/nv40/Makefile +++ b/src/gallium/drivers/nv40/Makefile @@ -10,7 +10,6 @@ C_SOURCES = \ nv40_fragtex.c \ nv40_screen.c \ nv40_state.c \ - nv40_state_fb.c \ nv40_vbo.c \ nv40_vertprog.c diff --git a/src/gallium/drivers/nv40/nv40_context.h b/src/gallium/drivers/nv40/nv40_context.h index a3000eeca0..3840134ce6 100644 --- a/src/gallium/drivers/nv40/nv40_context.h +++ b/src/gallium/drivers/nv40/nv40_context.h @@ -26,7 +26,6 @@ extern void nv40_fragtex_bind(struct nvfx_context *); /* nv40_state.c and friends */ extern struct nvfx_state_entry nv40_state_fragprog; extern struct nvfx_state_entry nv40_state_vertprog; -extern struct nvfx_state_entry nv40_state_framebuffer; extern struct nvfx_state_entry nv40_state_fragtex; extern struct nvfx_state_entry nv40_state_vbo; extern struct nvfx_state_entry nv40_state_vtxfmt; diff --git a/src/gallium/drivers/nv40/nv40_state_fb.c b/src/gallium/drivers/nv40/nv40_state_fb.c deleted file mode 100644 index 95735e40a3..0000000000 --- a/src/gallium/drivers/nv40/nv40_state_fb.c +++ /dev/null @@ -1,175 +0,0 @@ -#include "nv40_context.h" -#include "nouveau/nouveau_util.h" - -static struct pipe_buffer * -nv40_do_surface_buffer(struct pipe_surface *surface) -{ - struct nvfx_miptree *mt = (struct nvfx_miptree *)surface->texture; - return mt->buffer; -} - -#define nv40_surface_buffer(ps) nouveau_bo(nv40_do_surface_buffer(ps)) - -static boolean -nv40_state_framebuffer_validate(struct nvfx_context *nvfx) -{ - struct nouveau_channel *chan = nvfx->screen->base.channel; - struct nouveau_grobj *eng3d = nvfx->screen->eng3d; - struct pipe_framebuffer_state *fb = &nvfx->framebuffer; - struct nv04_surface *rt[4], *zeta; - uint32_t rt_enable, rt_format; - int i, colour_format = 0, zeta_format = 0; - struct nouveau_stateobj *so = so_new(18, 24, 10); - unsigned rt_flags = NOUVEAU_BO_RDWR | NOUVEAU_BO_VRAM; - unsigned w = fb->width; - unsigned h = fb->height; - - rt_enable = 0; - for (i = 0; i < fb->nr_cbufs; i++) { - if (colour_format) { - assert(colour_format == fb->cbufs[i]->format); - } else { - colour_format = fb->cbufs[i]->format; - rt_enable |= (NV40TCL_RT_ENABLE_COLOR0 << i); - rt[i] = (struct nv04_surface *)fb->cbufs[i]; - } - } - - if (rt_enable & (NV40TCL_RT_ENABLE_COLOR1 | NV40TCL_RT_ENABLE_COLOR2 | - NV40TCL_RT_ENABLE_COLOR3)) - rt_enable |= NV40TCL_RT_ENABLE_MRT; - - if (fb->zsbuf) { - zeta_format = fb->zsbuf->format; - zeta = (struct nv04_surface *)fb->zsbuf; - } - - if (!(rt[0]->base.texture->tex_usage & NOUVEAU_TEXTURE_USAGE_LINEAR)) { - assert(!(fb->width & (fb->width - 1)) && !(fb->height & (fb->height - 1))); - for (i = 1; i < fb->nr_cbufs; i++) - assert(!(rt[i]->base.texture->tex_usage & NOUVEAU_TEXTURE_USAGE_LINEAR)); - - rt_format = NV34TCL_RT_FORMAT_TYPE_SWIZZLED | - log2i(fb->width) << NV34TCL_RT_FORMAT_LOG2_WIDTH_SHIFT | - log2i(fb->height) << NV34TCL_RT_FORMAT_LOG2_HEIGHT_SHIFT; - } - else - rt_format = NV34TCL_RT_FORMAT_TYPE_LINEAR; - - switch (colour_format) { - case PIPE_FORMAT_B8G8R8X8_UNORM: - rt_format |= NV34TCL_RT_FORMAT_COLOR_X8R8G8B8; - break; - case PIPE_FORMAT_B8G8R8A8_UNORM: - case 0: - rt_format |= NV34TCL_RT_FORMAT_COLOR_A8R8G8B8; - break; - case PIPE_FORMAT_B5G6R5_UNORM: - rt_format |= NV34TCL_RT_FORMAT_COLOR_R5G6B5; - break; - default: - assert(0); - } - - switch (zeta_format) { - case PIPE_FORMAT_Z16_UNORM: - rt_format |= NV34TCL_RT_FORMAT_ZETA_Z16; - break; - case PIPE_FORMAT_S8Z24_UNORM: - case PIPE_FORMAT_X8Z24_UNORM: - case 0: - rt_format |= NV34TCL_RT_FORMAT_ZETA_Z24S8; - break; - default: - assert(0); - } - - if (rt_enable & NV40TCL_RT_ENABLE_COLOR0) { - so_method(so, eng3d, NV34TCL_DMA_COLOR0, 1); - so_reloc (so, nv40_surface_buffer(&rt[0]->base), 0, - rt_flags | NOUVEAU_BO_OR, - chan->vram->handle, chan->gart->handle); - so_method(so, eng3d, NV34TCL_COLOR0_PITCH, 2); - so_data (so, rt[0]->pitch); - so_reloc (so, nv40_surface_buffer(&rt[0]->base), - rt[0]->base.offset, rt_flags | NOUVEAU_BO_LOW, - 0, 0); - } - - if (rt_enable & NV40TCL_RT_ENABLE_COLOR1) { - so_method(so, eng3d, NV34TCL_DMA_COLOR1, 1); - so_reloc (so, nv40_surface_buffer(&rt[1]->base), 0, - rt_flags | NOUVEAU_BO_OR, - chan->vram->handle, chan->gart->handle); - so_method(so, eng3d, NV34TCL_COLOR1_OFFSET, 2); - so_reloc (so, nv40_surface_buffer(&rt[1]->base), - rt[1]->base.offset, rt_flags | NOUVEAU_BO_LOW, - 0, 0); - so_data (so, rt[1]->pitch); - } - - if (rt_enable & NV40TCL_RT_ENABLE_COLOR2) { - so_method(so, eng3d, NV40TCL_DMA_COLOR2, 1); - so_reloc (so, nv40_surface_buffer(&rt[2]->base), 0, - rt_flags | NOUVEAU_BO_OR, - chan->vram->handle, chan->gart->handle); - so_method(so, eng3d, NV40TCL_COLOR2_OFFSET, 1); - so_reloc (so, nv40_surface_buffer(&rt[2]->base), - rt[2]->base.offset, rt_flags | NOUVEAU_BO_LOW, - 0, 0); - so_method(so, eng3d, NV40TCL_COLOR2_PITCH, 1); - so_data (so, rt[2]->pitch); - } - - if (rt_enable & NV40TCL_RT_ENABLE_COLOR3) { - so_method(so, eng3d, NV40TCL_DMA_COLOR3, 1); - so_reloc (so, nv40_surface_buffer(&rt[3]->base), 0, - rt_flags | NOUVEAU_BO_OR, - chan->vram->handle, chan->gart->handle); - so_method(so, eng3d, NV40TCL_COLOR3_OFFSET, 1); - so_reloc (so, nv40_surface_buffer(&rt[3]->base), - rt[3]->base.offset, rt_flags | NOUVEAU_BO_LOW, - 0, 0); - so_method(so, eng3d, NV40TCL_COLOR3_PITCH, 1); - so_data (so, rt[3]->pitch); - } - - if (zeta_format) { - so_method(so, eng3d, NV34TCL_DMA_ZETA, 1); - so_reloc (so, nv40_surface_buffer(&zeta->base), 0, - rt_flags | NOUVEAU_BO_OR, - chan->vram->handle, chan->gart->handle); - so_method(so, eng3d, NV34TCL_ZETA_OFFSET, 1); - so_reloc (so, nv40_surface_buffer(&zeta->base), - zeta->base.offset, rt_flags | NOUVEAU_BO_LOW, 0, 0); - so_method(so, eng3d, NV40TCL_ZETA_PITCH, 1); - so_data (so, zeta->pitch); - } - - so_method(so, eng3d, NV40TCL_RT_ENABLE, 1); - so_data (so, rt_enable); - so_method(so, eng3d, NV34TCL_RT_HORIZ, 3); - so_data (so, (w << 16) | 0); - so_data (so, (h << 16) | 0); - so_data (so, rt_format); - so_method(so, eng3d, NV34TCL_VIEWPORT_HORIZ, 2); - so_data (so, (w << 16) | 0); - so_data (so, (h << 16) | 0); - so_method(so, eng3d, NV34TCL_VIEWPORT_CLIP_HORIZ(0), 2); - so_data (so, ((w - 1) << 16) | 0); - so_data (so, ((h - 1) << 16) | 0); - so_method(so, eng3d, 0x1d88, 1); - so_data (so, (1 << 12) | h); - - so_ref(so, &nvfx->state.hw[NVFX_STATE_FB]); - so_ref(NULL, &so); - return TRUE; -} - -struct nvfx_state_entry nv40_state_framebuffer = { - .validate = nv40_state_framebuffer_validate, - .dirty = { - .pipe = NVFX_NEW_FB, - .hw = NVFX_STATE_FB - } -}; diff --git a/src/gallium/drivers/nvfx/Makefile b/src/gallium/drivers/nvfx/Makefile index 2f198d9d1a..2f80681e5c 100644 --- a/src/gallium/drivers/nvfx/Makefile +++ b/src/gallium/drivers/nvfx/Makefile @@ -9,6 +9,7 @@ C_SOURCES = \ nvfx_miptree.c \ nvfx_query.c \ nvfx_state_blend.c \ + nvfx_state_fb.c \ nvfx_state_rasterizer.c \ nvfx_state_scissor.c \ nvfx_state_stipple.c \ diff --git a/src/gallium/drivers/nvfx/nvfx_context.h b/src/gallium/drivers/nvfx/nvfx_context.h index b6e6cf8fd9..28daa1d2e7 100644 --- a/src/gallium/drivers/nvfx/nvfx_context.h +++ b/src/gallium/drivers/nvfx/nvfx_context.h @@ -183,6 +183,7 @@ struct nvfx_state_entry { extern struct nvfx_state_entry nvfx_state_blend; extern struct nvfx_state_entry nvfx_state_blend_colour; +extern struct nvfx_state_entry nvfx_state_framebuffer; extern struct nvfx_state_entry nvfx_state_rasterizer; extern struct nvfx_state_entry nvfx_state_scissor; extern struct nvfx_state_entry nvfx_state_sr; diff --git a/src/gallium/drivers/nvfx/nvfx_state_emit.c b/src/gallium/drivers/nvfx/nvfx_state_emit.c index b86cb44936..d3088e4211 100644 --- a/src/gallium/drivers/nvfx/nvfx_state_emit.c +++ b/src/gallium/drivers/nvfx/nvfx_state_emit.c @@ -5,7 +5,7 @@ #define RENDER_STATES(name, nvxx, vbo) \ static struct nvfx_state_entry *name##_render_states[] = { \ - &nvxx##_state_framebuffer, \ + &nvfx_state_framebuffer, \ &nvfx_state_rasterizer, \ &nvfx_state_scissor, \ &nvfx_state_stipple, \ diff --git a/src/gallium/drivers/nvfx/nvfx_state_fb.c b/src/gallium/drivers/nvfx/nvfx_state_fb.c new file mode 100644 index 0000000000..dd64ba4193 --- /dev/null +++ b/src/gallium/drivers/nvfx/nvfx_state_fb.c @@ -0,0 +1,234 @@ +#include "nvfx_context.h" +#include "nouveau/nouveau_util.h" + +static struct pipe_buffer * +nvfx_do_surface_buffer(struct pipe_surface *surface) +{ + struct nvfx_miptree *mt = (struct nvfx_miptree *)surface->texture; + return mt->buffer; +} + +#define nvfx_surface_buffer(ps) nouveau_bo(nvfx_do_surface_buffer(ps)) + +static boolean +nvfx_state_framebuffer_validate(struct nvfx_context *nvfx) +{ + struct pipe_framebuffer_state *fb = &nvfx->framebuffer; + struct nouveau_channel *chan = nvfx->screen->base.channel; + struct nouveau_grobj *eng3d = nvfx->screen->eng3d; + struct nv04_surface *rt[4], *zeta = NULL; + uint32_t rt_enable = 0, rt_format = 0; + int i, colour_format = 0, zeta_format = 0; + int depth_only = 0; + struct nouveau_stateobj *so = so_new(18, 24, 10); + unsigned rt_flags = NOUVEAU_BO_RDWR | NOUVEAU_BO_VRAM; + unsigned w = fb->width; + unsigned h = fb->height; + int colour_bits = 32, zeta_bits = 32; + + if(!nvfx->is_nv4x) + assert(fb->nr_cbufs <= 2); + else + assert(fb->nr_cbufs <= 4); + + for (i = 0; i < fb->nr_cbufs; i++) { + if (colour_format) { + assert(colour_format == fb->cbufs[i]->format); + } else { + colour_format = fb->cbufs[i]->format; + rt_enable |= (NV34TCL_RT_ENABLE_COLOR0 << i); + rt[i] = (struct nv04_surface *)fb->cbufs[i]; + } + } + + if (rt_enable & (NV34TCL_RT_ENABLE_COLOR1 | + NV40TCL_RT_ENABLE_COLOR2 | NV40TCL_RT_ENABLE_COLOR3)) + rt_enable |= NV34TCL_RT_ENABLE_MRT; + + if (fb->zsbuf) { + zeta_format = fb->zsbuf->format; + zeta = (struct nv04_surface *)fb->zsbuf; + } + + if (rt_enable & (NV34TCL_RT_ENABLE_COLOR0 | NV34TCL_RT_ENABLE_COLOR1 | + NV40TCL_RT_ENABLE_COLOR2 | NV40TCL_RT_ENABLE_COLOR3)) { + /* Render to at least a colour buffer */ + if (!(rt[0]->base.texture->tex_usage & NOUVEAU_TEXTURE_USAGE_LINEAR)) { + assert(!(fb->width & (fb->width - 1)) && !(fb->height & (fb->height - 1))); + for (i = 1; i < fb->nr_cbufs; i++) + assert(!(rt[i]->base.texture->tex_usage & NOUVEAU_TEXTURE_USAGE_LINEAR)); + + rt_format = NV34TCL_RT_FORMAT_TYPE_SWIZZLED | + (log2i(rt[0]->base.width) << NV34TCL_RT_FORMAT_LOG2_WIDTH_SHIFT) | + (log2i(rt[0]->base.height) << NV34TCL_RT_FORMAT_LOG2_HEIGHT_SHIFT); + } + else + rt_format = NV34TCL_RT_FORMAT_TYPE_LINEAR; + } else if (fb->zsbuf) { + depth_only = 1; + + /* Render to depth buffer only */ + if (!(zeta->base.texture->tex_usage & NOUVEAU_TEXTURE_USAGE_LINEAR)) { + assert(!(fb->width & (fb->width - 1)) && !(fb->height & (fb->height - 1))); + + rt_format = NV34TCL_RT_FORMAT_TYPE_SWIZZLED | + (log2i(zeta->base.width) << NV34TCL_RT_FORMAT_LOG2_WIDTH_SHIFT) | + (log2i(zeta->base.height) << NV34TCL_RT_FORMAT_LOG2_HEIGHT_SHIFT); + } + else + rt_format = NV34TCL_RT_FORMAT_TYPE_LINEAR; + } else { + return FALSE; + } + + switch (colour_format) { + case PIPE_FORMAT_B8G8R8X8_UNORM: + rt_format |= NV34TCL_RT_FORMAT_COLOR_X8R8G8B8; + break; + case PIPE_FORMAT_B8G8R8A8_UNORM: + case 0: + rt_format |= NV34TCL_RT_FORMAT_COLOR_A8R8G8B8; + break; + case PIPE_FORMAT_B5G6R5_UNORM: + rt_format |= NV34TCL_RT_FORMAT_COLOR_R5G6B5; + colour_bits = 16; + break; + default: + assert(0); + } + + switch (zeta_format) { + case PIPE_FORMAT_Z16_UNORM: + rt_format |= NV34TCL_RT_FORMAT_ZETA_Z16; + zeta_bits = 16; + break; + case PIPE_FORMAT_S8Z24_UNORM: + case PIPE_FORMAT_X8Z24_UNORM: + case 0: + rt_format |= NV34TCL_RT_FORMAT_ZETA_Z24S8; + break; + default: + assert(0); + } + + if ((!nvfx->is_nv4x) && colour_bits > zeta_bits) { + /* TODO: does this limitation really exist? + TODO: can it be worked around somehow? */ + return FALSE; + } + + if ((rt_enable & NV34TCL_RT_ENABLE_COLOR0) + || ((!nvfx->is_nv4x) && depth_only)) { + struct nv04_surface *rt0 = (depth_only ? zeta : rt[0]); + uint32_t pitch = rt0->pitch; + + if(!nvfx->is_nv4x) + { + if (zeta) { + pitch |= (zeta->pitch << 16); + } else { + pitch |= (pitch << 16); + } + } + + so_method(so, eng3d, NV34TCL_DMA_COLOR0, 1); + so_reloc (so, nvfx_surface_buffer(&rt0->base), 0, + rt_flags | NOUVEAU_BO_OR, + chan->vram->handle, chan->gart->handle); + so_method(so, eng3d, NV34TCL_COLOR0_PITCH, 2); + so_data (so, pitch); + so_reloc (so, nvfx_surface_buffer(&rt[0]->base), + rt0->base.offset, rt_flags | NOUVEAU_BO_LOW, + 0, 0); + } + + if (rt_enable & NV34TCL_RT_ENABLE_COLOR1) { + so_method(so, eng3d, NV34TCL_DMA_COLOR1, 1); + so_reloc (so, nvfx_surface_buffer(&rt[1]->base), 0, + rt_flags | NOUVEAU_BO_OR, + chan->vram->handle, chan->gart->handle); + so_method(so, eng3d, NV34TCL_COLOR1_OFFSET, 2); + so_reloc (so, nvfx_surface_buffer(&rt[1]->base), + rt[1]->base.offset, rt_flags | NOUVEAU_BO_LOW, + 0, 0); + so_data (so, rt[1]->pitch); + } + + if(nvfx->is_nv4x) + { + if (rt_enable & NV40TCL_RT_ENABLE_COLOR2) { + so_method(so, eng3d, NV40TCL_DMA_COLOR2, 1); + so_reloc (so, nvfx_surface_buffer(&rt[2]->base), 0, + rt_flags | NOUVEAU_BO_OR, + chan->vram->handle, chan->gart->handle); + so_method(so, eng3d, NV40TCL_COLOR2_OFFSET, 1); + so_reloc (so, nvfx_surface_buffer(&rt[2]->base), + rt[2]->base.offset, rt_flags | NOUVEAU_BO_LOW, + 0, 0); + so_method(so, eng3d, NV40TCL_COLOR2_PITCH, 1); + so_data (so, rt[2]->pitch); + } + + if (rt_enable & NV40TCL_RT_ENABLE_COLOR3) { + so_method(so, eng3d, NV40TCL_DMA_COLOR3, 1); + so_reloc (so, nvfx_surface_buffer(&rt[3]->base), 0, + rt_flags | NOUVEAU_BO_OR, + chan->vram->handle, chan->gart->handle); + so_method(so, eng3d, NV40TCL_COLOR3_OFFSET, 1); + so_reloc (so, nvfx_surface_buffer(&rt[3]->base), + rt[3]->base.offset, rt_flags | NOUVEAU_BO_LOW, + 0, 0); + so_method(so, eng3d, NV40TCL_COLOR3_PITCH, 1); + so_data (so, rt[3]->pitch); + } + } + + if (zeta_format) { + so_method(so, eng3d, NV34TCL_DMA_ZETA, 1); + so_reloc (so, nvfx_surface_buffer(&zeta->base), 0, + rt_flags | NOUVEAU_BO_OR, + chan->vram->handle, chan->gart->handle); + so_method(so, eng3d, NV34TCL_ZETA_OFFSET, 1); + /* TODO: reverse engineer LMA */ + so_reloc (so, nvfx_surface_buffer(&zeta->base), + zeta->base.offset, rt_flags | NOUVEAU_BO_LOW, 0, 0); + if(nvfx->is_nv4x) { + so_method(so, eng3d, NV40TCL_ZETA_PITCH, 1); + so_data (so, zeta->pitch); + } + } + + so_method(so, eng3d, NV34TCL_RT_ENABLE, 1); + so_data (so, rt_enable); + so_method(so, eng3d, NV34TCL_RT_HORIZ, 3); + so_data (so, (w << 16) | 0); + so_data (so, (h << 16) | 0); + so_data (so, rt_format); + so_method(so, eng3d, NV34TCL_VIEWPORT_HORIZ, 2); + so_data (so, (w << 16) | 0); + so_data (so, (h << 16) | 0); + so_method(so, eng3d, NV34TCL_VIEWPORT_CLIP_HORIZ(0), 2); + so_data (so, ((w - 1) << 16) | 0); + so_data (so, ((h - 1) << 16) | 0); + so_method(so, eng3d, 0x1d88, 1); + so_data (so, (1 << 12) | h); + + if(!nvfx->is_nv4x) { + /* Wonder why this is needed, context should all be set to zero on init */ + /* TODO: we can most likely remove this, after putting it in context init */ + so_method(so, eng3d, NV34TCL_VIEWPORT_TX_ORIGIN, 1); + so_data (so, 0); + } + + so_ref(so, &nvfx->state.hw[NVFX_STATE_FB]); + so_ref(NULL, &so); + return TRUE; +} + +struct nvfx_state_entry nvfx_state_framebuffer = { + .validate = nvfx_state_framebuffer_validate, + .dirty = { + .pipe = NVFX_NEW_FB, + .hw = NVFX_STATE_FB + } +}; -- cgit v1.2.3 From d9e396ce4a124529fa92ad967f2b3ff72534079b Mon Sep 17 00:00:00 2001 From: Luca Barbieri Date: Sun, 21 Feb 2010 02:26:25 +0100 Subject: nv30, nv40: non-trivially partially unify nv[34]0_shader.h shader.h is similar, except for the following differences: 1. The instruction sets are not exactly the same, but mostly similar 2. Vertex program fields are in different bit positions This patch unifies all parts of nv[34]0_shader.h except the vertex program fields. Vertex opcodes are also changed so that the constant names includes SCA if it is a scalar opcode and VEC if it is a vector opcode. --- src/gallium/drivers/nv30/nv30_fragprog.c | 172 ++++++------- src/gallium/drivers/nv30/nv30_shader.h | 323 +----------------------- src/gallium/drivers/nv30/nv30_vertprog.c | 134 +++++----- src/gallium/drivers/nv40/nv40_draw.c | 2 +- src/gallium/drivers/nv40/nv40_fragprog.c | 160 ++++++------ src/gallium/drivers/nv40/nv40_shader.h | 380 +---------------------------- src/gallium/drivers/nv40/nv40_vertprog.c | 166 ++++++------- src/gallium/drivers/nvfx/nvfx_shader.h | 407 +++++++++++++++++++++++++++++++ 8 files changed, 726 insertions(+), 1018 deletions(-) create mode 100644 src/gallium/drivers/nvfx/nvfx_shader.h (limited to 'src') diff --git a/src/gallium/drivers/nv30/nv30_fragprog.c b/src/gallium/drivers/nv30/nv30_fragprog.c index ae246ffd64..4ce16b8f0e 100644 --- a/src/gallium/drivers/nv30/nv30_fragprog.c +++ b/src/gallium/drivers/nv30/nv30_fragprog.c @@ -19,14 +19,14 @@ #define MASK_Z 4 #define MASK_W 8 #define MASK_ALL (MASK_X|MASK_Y|MASK_Z|MASK_W) -#define DEF_SCALE NV30_FP_OP_DST_SCALE_1X -#define DEF_CTEST NV30_FP_OP_COND_TR -#include "nv30_shader.h" +#define DEF_SCALE NVFX_FP_OP_DST_SCALE_1X +#define DEF_CTEST NVFX_FP_OP_COND_TR +#include "nvfx_shader.h" -#define swz(s,x,y,z,w) nv30_sr_swz((s), SWZ_##x, SWZ_##y, SWZ_##z, SWZ_##w) -#define neg(s) nv30_sr_neg((s)) -#define abs(s) nv30_sr_abs((s)) -#define scale(s,v) nv30_sr_scale((s), NV30_FP_OP_DST_SCALE_##v) +#define swz(s,x,y,z,w) nvfx_sr_swz((s), SWZ_##x, SWZ_##y, SWZ_##z, SWZ_##w) +#define neg(s) nvfx_sr_neg((s)) +#define abs(s) nvfx_sr_abs((s)) +#define scale(s,v) nvfx_sr_scale((s), NVFX_FP_OP_DST_SCALE_##v) #define MAX_CONSTS 128 #define MAX_IMM 32 @@ -50,21 +50,21 @@ struct nv30_fpc { } consts[MAX_CONSTS]; int nr_consts; - struct nv30_sreg imm[MAX_IMM]; + struct nvfx_sreg imm[MAX_IMM]; unsigned nr_imm; }; -static INLINE struct nv30_sreg +static INLINE struct nvfx_sreg temp(struct nv30_fpc *fpc) { int idx; idx = fpc->temp_temp_count++; idx += fpc->high_temp + 1; - return nv30_sr(NV30SR_TEMP, idx); + return nvfx_sr(NVFXSR_TEMP, idx); } -static INLINE struct nv30_sreg +static INLINE struct nvfx_sreg constant(struct nv30_fpc *fpc, int pipe, float vals[4]) { int idx; @@ -76,14 +76,14 @@ constant(struct nv30_fpc *fpc, int pipe, float vals[4]) fpc->consts[idx].pipe = pipe; if (pipe == -1) memcpy(fpc->consts[idx].vals, vals, 4 * sizeof(float)); - return nv30_sr(NV30SR_CONST, idx); + return nvfx_sr(NVFXSR_CONST, idx); } #define arith(cc,s,o,d,m,s0,s1,s2) \ - nv30_fp_arith((cc), (s), NV30_FP_OP_OPCODE_##o, \ + nv30_fp_arith((cc), (s), NVFX_FP_OP_OPCODE_##o, \ (d), (m), (s0), (s1), (s2)) #define tex(cc,s,o,u,d,m,s0,s1,s2) \ - nv30_fp_tex((cc), (s), NV30_FP_OP_OPCODE_##o, (u), \ + nv30_fp_tex((cc), (s), NVFX_FP_OP_OPCODE_##o, (u), \ (d), (m), (s0), none, none) static void @@ -96,25 +96,25 @@ grow_insns(struct nv30_fpc *fpc, int size) } static void -emit_src(struct nv30_fpc *fpc, int pos, struct nv30_sreg src) +emit_src(struct nv30_fpc *fpc, int pos, struct nvfx_sreg src) { struct nvfx_fragment_program *fp = fpc->fp; uint32_t *hw = &fp->insn[fpc->inst_offset]; uint32_t sr = 0; switch (src.type) { - case NV30SR_INPUT: - sr |= (NV30_FP_REG_TYPE_INPUT << NV30_FP_REG_TYPE_SHIFT); - hw[0] |= (src.index << NV30_FP_OP_INPUT_SRC_SHIFT); + case NVFXSR_INPUT: + sr |= (NVFX_FP_REG_TYPE_INPUT << NVFX_FP_REG_TYPE_SHIFT); + hw[0] |= (src.index << NVFX_FP_OP_INPUT_SRC_SHIFT); break; - case NV30SR_OUTPUT: - sr |= NV30_FP_REG_SRC_HALF; + case NVFXSR_OUTPUT: + sr |= NVFX_FP_REG_SRC_HALF; /* fall-through */ - case NV30SR_TEMP: - sr |= (NV30_FP_REG_TYPE_TEMP << NV30_FP_REG_TYPE_SHIFT); - sr |= (src.index << NV30_FP_REG_SRC_SHIFT); + case NVFXSR_TEMP: + sr |= (NVFX_FP_REG_TYPE_TEMP << NVFX_FP_REG_TYPE_SHIFT); + sr |= (src.index << NVFX_FP_REG_SRC_SHIFT); break; - case NV30SR_CONST: + case NVFXSR_CONST: grow_insns(fpc, 4); hw = &fp->insn[fpc->inst_offset]; if (fpc->consts[src.index].pipe >= 0) { @@ -132,61 +132,61 @@ emit_src(struct nv30_fpc *fpc, int pos, struct nv30_sreg src) sizeof(uint32_t) * 4); } - sr |= (NV30_FP_REG_TYPE_CONST << NV30_FP_REG_TYPE_SHIFT); + sr |= (NVFX_FP_REG_TYPE_CONST << NVFX_FP_REG_TYPE_SHIFT); break; - case NV30SR_NONE: - sr |= (NV30_FP_REG_TYPE_INPUT << NV30_FP_REG_TYPE_SHIFT); + case NVFXSR_NONE: + sr |= (NVFX_FP_REG_TYPE_INPUT << NVFX_FP_REG_TYPE_SHIFT); break; default: assert(0); } if (src.negate) - sr |= NV30_FP_REG_NEGATE; + sr |= NVFX_FP_REG_NEGATE; if (src.abs) hw[1] |= (1 << (29 + pos)); - sr |= ((src.swz[0] << NV30_FP_REG_SWZ_X_SHIFT) | - (src.swz[1] << NV30_FP_REG_SWZ_Y_SHIFT) | - (src.swz[2] << NV30_FP_REG_SWZ_Z_SHIFT) | - (src.swz[3] << NV30_FP_REG_SWZ_W_SHIFT)); + sr |= ((src.swz[0] << NVFX_FP_REG_SWZ_X_SHIFT) | + (src.swz[1] << NVFX_FP_REG_SWZ_Y_SHIFT) | + (src.swz[2] << NVFX_FP_REG_SWZ_Z_SHIFT) | + (src.swz[3] << NVFX_FP_REG_SWZ_W_SHIFT)); hw[pos + 1] |= sr; } static void -emit_dst(struct nv30_fpc *fpc, struct nv30_sreg dst) +emit_dst(struct nv30_fpc *fpc, struct nvfx_sreg dst) { struct nvfx_fragment_program *fp = fpc->fp; uint32_t *hw = &fp->insn[fpc->inst_offset]; switch (dst.type) { - case NV30SR_TEMP: + case NVFXSR_TEMP: if (fpc->num_regs < (dst.index + 1)) fpc->num_regs = dst.index + 1; break; - case NV30SR_OUTPUT: + case NVFXSR_OUTPUT: if (dst.index == 1) { fp->fp_control |= 0xe; } else { - hw[0] |= NV30_FP_OP_OUT_REG_HALF; + hw[0] |= NVFX_FP_OP_OUT_REG_HALF; } break; - case NV30SR_NONE: + case NVFXSR_NONE: hw[0] |= (1 << 30); break; default: assert(0); } - hw[0] |= (dst.index << NV30_FP_OP_OUT_REG_SHIFT); + hw[0] |= (dst.index << NVFX_FP_OP_OUT_REG_SHIFT); } static void nv30_fp_arith(struct nv30_fpc *fpc, int sat, int op, - struct nv30_sreg dst, int mask, - struct nv30_sreg s0, struct nv30_sreg s1, struct nv30_sreg s2) + struct nvfx_sreg dst, int mask, + struct nvfx_sreg s0, struct nvfx_sreg s1, struct nvfx_sreg s2) { struct nvfx_fragment_program *fp = fpc->fp; uint32_t *hw; @@ -196,22 +196,22 @@ nv30_fp_arith(struct nv30_fpc *fpc, int sat, int op, hw = &fp->insn[fpc->inst_offset]; memset(hw, 0, sizeof(uint32_t) * 4); - if (op == NV30_FP_OP_OPCODE_KIL) + if (op == NVFX_FP_OP_OPCODE_KIL) fp->fp_control |= NV34TCL_FP_CONTROL_USES_KIL; - hw[0] |= (op << NV30_FP_OP_OPCODE_SHIFT); - hw[0] |= (mask << NV30_FP_OP_OUTMASK_SHIFT); - hw[2] |= (dst.dst_scale << NV30_FP_OP_DST_SCALE_SHIFT); + hw[0] |= (op << NVFX_FP_OP_OPCODE_SHIFT); + hw[0] |= (mask << NVFX_FP_OP_OUTMASK_SHIFT); + hw[2] |= (dst.dst_scale << NVFX_FP_OP_DST_SCALE_SHIFT); if (sat) - hw[0] |= NV30_FP_OP_OUT_SAT; + hw[0] |= NVFX_FP_OP_OUT_SAT; if (dst.cc_update) - hw[0] |= NV30_FP_OP_COND_WRITE_ENABLE; - hw[1] |= (dst.cc_test << NV30_FP_OP_COND_SHIFT); - hw[1] |= ((dst.cc_swz[0] << NV30_FP_OP_COND_SWZ_X_SHIFT) | - (dst.cc_swz[1] << NV30_FP_OP_COND_SWZ_Y_SHIFT) | - (dst.cc_swz[2] << NV30_FP_OP_COND_SWZ_Z_SHIFT) | - (dst.cc_swz[3] << NV30_FP_OP_COND_SWZ_W_SHIFT)); + hw[0] |= NVFX_FP_OP_COND_WRITE_ENABLE; + hw[1] |= (dst.cc_test << NVFX_FP_OP_COND_SHIFT); + hw[1] |= ((dst.cc_swz[0] << NVFX_FP_OP_COND_SWZ_X_SHIFT) | + (dst.cc_swz[1] << NVFX_FP_OP_COND_SWZ_Y_SHIFT) | + (dst.cc_swz[2] << NVFX_FP_OP_COND_SWZ_Z_SHIFT) | + (dst.cc_swz[3] << NVFX_FP_OP_COND_SWZ_W_SHIFT)); emit_dst(fpc, dst); emit_src(fpc, 0, s0); @@ -221,25 +221,25 @@ nv30_fp_arith(struct nv30_fpc *fpc, int sat, int op, static void nv30_fp_tex(struct nv30_fpc *fpc, int sat, int op, int unit, - struct nv30_sreg dst, int mask, - struct nv30_sreg s0, struct nv30_sreg s1, struct nv30_sreg s2) + struct nvfx_sreg dst, int mask, + struct nvfx_sreg s0, struct nvfx_sreg s1, struct nvfx_sreg s2) { struct nvfx_fragment_program *fp = fpc->fp; nv30_fp_arith(fpc, sat, op, dst, mask, s0, s1, s2); - fp->insn[fpc->inst_offset] |= (unit << NV30_FP_OP_TEX_UNIT_SHIFT); + fp->insn[fpc->inst_offset] |= (unit << NVFX_FP_OP_TEX_UNIT_SHIFT); fp->samplers |= (1 << unit); } -static INLINE struct nv30_sreg +static INLINE struct nvfx_sreg tgsi_src(struct nv30_fpc *fpc, const struct tgsi_full_src_register *fsrc) { - struct nv30_sreg src; + struct nvfx_sreg src; switch (fsrc->Register.File) { case TGSI_FILE_INPUT: - src = nv30_sr(NV30SR_INPUT, + src = nvfx_sr(NVFXSR_INPUT, fpc->attrib_map[fsrc->Register.Index]); break; case TGSI_FILE_CONSTANT: @@ -250,7 +250,7 @@ tgsi_src(struct nv30_fpc *fpc, const struct tgsi_full_src_register *fsrc) src = fpc->imm[fsrc->Register.Index]; break; case TGSI_FILE_TEMPORARY: - src = nv30_sr(NV30SR_TEMP, fsrc->Register.Index + 1); + src = nvfx_sr(NVFXSR_TEMP, fsrc->Register.Index + 1); if (fpc->high_temp < src.index) fpc->high_temp = src.index; break; @@ -259,9 +259,9 @@ tgsi_src(struct nv30_fpc *fpc, const struct tgsi_full_src_register *fsrc) */ case TGSI_FILE_OUTPUT: if (fsrc->Register.Index == fpc->colour_id) - return nv30_sr(NV30SR_OUTPUT, 0); + return nvfx_sr(NVFXSR_OUTPUT, 0); else - return nv30_sr(NV30SR_OUTPUT, 1); + return nvfx_sr(NVFXSR_OUTPUT, 1); break; default: NOUVEAU_ERR("bad src file\n"); @@ -277,27 +277,27 @@ tgsi_src(struct nv30_fpc *fpc, const struct tgsi_full_src_register *fsrc) return src; } -static INLINE struct nv30_sreg +static INLINE struct nvfx_sreg tgsi_dst(struct nv30_fpc *fpc, const struct tgsi_full_dst_register *fdst) { int idx; switch (fdst->Register.File) { case TGSI_FILE_OUTPUT: if (fdst->Register.Index == fpc->colour_id) - return nv30_sr(NV30SR_OUTPUT, 0); + return nvfx_sr(NVFXSR_OUTPUT, 0); else - return nv30_sr(NV30SR_OUTPUT, 1); + return nvfx_sr(NVFXSR_OUTPUT, 1); break; case TGSI_FILE_TEMPORARY: idx = fdst->Register.Index + 1; if (fpc->high_temp < idx) fpc->high_temp = idx; - return nv30_sr(NV30SR_TEMP, idx); + return nvfx_sr(NVFXSR_TEMP, idx); case TGSI_FILE_NULL: - return nv30_sr(NV30SR_NONE, 0); + return nvfx_sr(NVFXSR_NONE, 0); default: NOUVEAU_ERR("bad dst file %d\n", fdst->Register.File); - return nv30_sr(NV30SR_NONE, 0); + return nvfx_sr(NVFXSR_NONE, 0); } } @@ -315,10 +315,10 @@ tgsi_mask(uint tgsi) static boolean src_native_swz(struct nv30_fpc *fpc, const struct tgsi_full_src_register *fsrc, - struct nv30_sreg *src) + struct nvfx_sreg *src) { - const struct nv30_sreg none = nv30_sr(NV30SR_NONE, 0); - struct nv30_sreg tgsi = tgsi_src(fpc, fsrc); + const struct nvfx_sreg none = nvfx_sr(NVFXSR_NONE, 0); + struct nvfx_sreg tgsi = tgsi_src(fpc, fsrc); uint mask = 0; uint c; @@ -350,8 +350,8 @@ static boolean nv30_fragprog_parse_instruction(struct nv30_fpc *fpc, const struct tgsi_full_instruction *finst) { - const struct nv30_sreg none = nv30_sr(NV30SR_NONE, 0); - struct nv30_sreg src[3], dst, tmp; + const struct nvfx_sreg none = nvfx_sr(NVFXSR_NONE, 0); + struct nvfx_sreg src[3], dst, tmp; int mask, sat, unit = 0; int ai = -1, ci = -1; int i; @@ -435,12 +435,12 @@ nv30_fragprog_parse_instruction(struct nv30_fpc *fpc, arith(fpc, sat, ADD, dst, mask, src[0], src[1], none); break; case TGSI_OPCODE_CMP: - tmp = nv30_sr(NV30SR_NONE, 0); + tmp = nvfx_sr(NVFXSR_NONE, 0); tmp.cc_update = 1; arith(fpc, 0, MOV, tmp, 0xf, src[0], none, none); - dst.cc_test = NV30_VP_INST_COND_GE; + dst.cc_test = NVFX_VP_INST_COND_GE; arith(fpc, sat, MOV, dst, mask, src[2], none, none); - dst.cc_test = NV30_VP_INST_COND_LT; + dst.cc_test = NVFX_VP_INST_COND_LT; arith(fpc, sat, MOV, dst, mask, src[1], none, none); break; case TGSI_OPCODE_COS: @@ -474,10 +474,10 @@ nv30_fragprog_parse_instruction(struct nv30_fpc *fpc, arith(fpc, 0, KIL, none, 0, none, none, none); break; case TGSI_OPCODE_KIL: - dst = nv30_sr(NV30SR_NONE, 0); + dst = nvfx_sr(NVFXSR_NONE, 0); dst.cc_update = 1; arith(fpc, 0, MOV, dst, MASK_ALL, src[0], none, none); - dst.cc_update = 0; dst.cc_test = NV30_FP_OP_COND_LT; + dst.cc_update = 0; dst.cc_test = NVFX_FP_OP_COND_LT; arith(fpc, 0, KIL, dst, 0, none, none, none); break; case TGSI_OPCODE_LG2: @@ -485,7 +485,7 @@ nv30_fragprog_parse_instruction(struct nv30_fpc *fpc, break; // case TGSI_OPCODE_LIT: case TGSI_OPCODE_LRP: - arith(fpc, sat, LRP, dst, mask, src[0], src[1], src[2]); + arith(fpc, sat, LRP_NV30, dst, mask, src[0], src[1], src[2]); break; case TGSI_OPCODE_MAD: arith(fpc, sat, MAD, dst, mask, src[0], src[1], src[2]); @@ -503,7 +503,7 @@ nv30_fragprog_parse_instruction(struct nv30_fpc *fpc, arith(fpc, sat, MUL, dst, mask, src[0], src[1], none); break; case TGSI_OPCODE_POW: - arith(fpc, sat, POW, dst, mask, src[0], src[1], none); + arith(fpc, sat, POW_NV30, dst, mask, src[0], src[1], none); break; case TGSI_OPCODE_RCP: arith(fpc, sat, RCP, dst, mask, src[0], none, none); @@ -512,10 +512,10 @@ nv30_fragprog_parse_instruction(struct nv30_fpc *fpc, assert(0); break; case TGSI_OPCODE_RFL: - arith(fpc, 0, RFL, dst, mask, src[0], src[1], none); + arith(fpc, 0, RFL_NV30, dst, mask, src[0], src[1], none); break; case TGSI_OPCODE_RSQ: - arith(fpc, sat, RSQ, dst, mask, abs(swz(src[0], X, X, X, X)), none, none); + arith(fpc, sat, RSQ_NV30, dst, mask, abs(swz(src[0], X, X, X, X)), none, none); break; case TGSI_OPCODE_SCS: /* avoid overwriting the source */ @@ -590,25 +590,25 @@ nv30_fragprog_parse_decl_attrib(struct nv30_fpc *fpc, switch (fdec->Semantic.Name) { case TGSI_SEMANTIC_POSITION: - hw = NV30_FP_OP_INPUT_SRC_POSITION; + hw = NVFX_FP_OP_INPUT_SRC_POSITION; break; case TGSI_SEMANTIC_COLOR: if (fdec->Semantic.Index == 0) { - hw = NV30_FP_OP_INPUT_SRC_COL0; + hw = NVFX_FP_OP_INPUT_SRC_COL0; } else if (fdec->Semantic.Index == 1) { - hw = NV30_FP_OP_INPUT_SRC_COL1; + hw = NVFX_FP_OP_INPUT_SRC_COL1; } else { NOUVEAU_ERR("bad colour semantic index\n"); return FALSE; } break; case TGSI_SEMANTIC_FOG: - hw = NV30_FP_OP_INPUT_SRC_FOGC; + hw = NVFX_FP_OP_INPUT_SRC_FOGC; break; case TGSI_SEMANTIC_GENERIC: if (fdec->Semantic.Index <= 7) { - hw = NV30_FP_OP_INPUT_SRC_TC(fdec->Semantic. + hw = NVFX_FP_OP_INPUT_SRC_TC(fdec->Semantic. Index); } else { NOUVEAU_ERR("bad generic semantic index\n"); @@ -702,7 +702,7 @@ nv30_fragprog_prepare(struct nv30_fpc *fpc) tgsi_parse_free(&p); /*if (++high_temp) { - fpc->r_temp = CALLOC(high_temp, sizeof(struct nv30_sreg)); + fpc->r_temp = CALLOC(high_temp, sizeof(struct nvfx_sreg)); for (i = 0; i < high_temp; i++) fpc->r_temp[i] = temp(fpc); fpc->r_temps_discard = 0; diff --git a/src/gallium/drivers/nv30/nv30_shader.h b/src/gallium/drivers/nv30/nv30_shader.h index dd3a36f78f..f19efb5aa4 100644 --- a/src/gallium/drivers/nv30/nv30_shader.h +++ b/src/gallium/drivers/nv30/nv30_shader.h @@ -72,14 +72,6 @@ #define NV30_VP_INST_COND_TEST_ENABLE (1<<14) #define NV30_VP_INST_COND_SHIFT 11 #define NV30_VP_INST_COND_MASK (0x07 << 11) -# define NV30_VP_INST_COND_FL 0 /* guess */ -# define NV30_VP_INST_COND_LT 1 -# define NV30_VP_INST_COND_EQ 2 -# define NV30_VP_INST_COND_LE 3 -# define NV30_VP_INST_COND_GT 4 -# define NV30_VP_INST_COND_NE 5 -# define NV30_VP_INST_COND_GE 6 -# define NV30_VP_INST_COND_TR 7 /* guess */ #define NV30_VP_INST_COND_SWZ_X_SHIFT 9 #define NV30_VP_INST_COND_SWZ_X_MASK (0x03 << 9) #define NV30_VP_INST_COND_SWZ_Y_SHIFT 7 @@ -98,59 +90,12 @@ /* DWORD 1 */ #define NV30_VP_INST_SCA_OPCODEL_SHIFT 28 #define NV30_VP_INST_SCA_OPCODEL_MASK (0x0F << 28) -# define NV30_VP_INST_OP_NOP 0x00 -# define NV30_VP_INST_OP_RCP 0x02 -# define NV30_VP_INST_OP_RCC 0x03 -# define NV30_VP_INST_OP_RSQ 0x04 -# define NV30_VP_INST_OP_EXP 0x05 -# define NV30_VP_INST_OP_LOG 0x06 -# define NV30_VP_INST_OP_LIT 0x07 -# define NV30_VP_INST_OP_BRA 0x09 -# define NV30_VP_INST_OP_CAL 0x0B -# define NV30_VP_INST_OP_RET 0x0C -# define NV30_VP_INST_OP_LG2 0x0D -# define NV30_VP_INST_OP_EX2 0x0E -# define NV30_VP_INST_OP_SIN 0x0F -# define NV30_VP_INST_OP_COS 0x10 #define NV30_VP_INST_VEC_OPCODE_SHIFT 23 #define NV30_VP_INST_VEC_OPCODE_MASK (0x1F << 23) -# define NV30_VP_INST_OP_NOPV 0x00 -# define NV30_VP_INST_OP_MOV 0x01 -# define NV30_VP_INST_OP_MUL 0x02 -# define NV30_VP_INST_OP_ADD 0x03 -# define NV30_VP_INST_OP_MAD 0x04 -# define NV30_VP_INST_OP_DP3 0x05 -# define NV30_VP_INST_OP_DP4 0x07 -# define NV30_VP_INST_OP_DPH 0x06 -# define NV30_VP_INST_OP_DST 0x08 -# define NV30_VP_INST_OP_MIN 0x09 -# define NV30_VP_INST_OP_MAX 0x0A -# define NV30_VP_INST_OP_SLT 0x0B -# define NV30_VP_INST_OP_SGE 0x0C -# define NV30_VP_INST_OP_ARL 0x0D -# define NV30_VP_INST_OP_FRC 0x0E -# define NV30_VP_INST_OP_FLR 0x0F -# define NV30_VP_INST_OP_SEQ 0x10 -# define NV30_VP_INST_OP_SFL 0x11 -# define NV30_VP_INST_OP_SGT 0x12 -# define NV30_VP_INST_OP_SLE 0x13 -# define NV30_VP_INST_OP_SNE 0x14 -# define NV30_VP_INST_OP_STR 0x15 -# define NV30_VP_INST_OP_SSG 0x16 -# define NV30_VP_INST_OP_ARR 0x17 -# define NV30_VP_INST_OP_ARA 0x18 #define NV30_VP_INST_CONST_SRC_SHIFT 14 #define NV30_VP_INST_CONST_SRC_MASK (0xFF << 14) #define NV30_VP_INST_INPUT_SRC_SHIFT 9 /*NV20*/ #define NV30_VP_INST_INPUT_SRC_MASK (0x0F << 9) /*NV20*/ -# define NV30_VP_INST_IN_POS 0 /* These seem to match the bindings specified in */ -# define NV30_VP_INST_IN_WEIGHT 1 /* the ARB_v_p spec (2.14.3.1) */ -# define NV30_VP_INST_IN_NORMAL 2 -# define NV30_VP_INST_IN_COL0 3 /* Should probably confirm them all though */ -# define NV30_VP_INST_IN_COL1 4 -# define NV30_VP_INST_IN_FOGC 5 -# define NV30_VP_INST_IN_TC0 8 -# define NV30_VP_INST_IN_TC(n) (8+n) #define NV30_VP_INST_SRC0H_SHIFT 0 /*NV20*/ #define NV30_VP_INST_SRC0H_MASK (0x1FF << 0) /*NV20*/ @@ -190,8 +135,6 @@ # define NV30_VP_INST_DEST_PSZ 6 # define NV30_VP_INST_DEST_TC(n) (8+n) -#define NV30_VP_INST_LAST (1 << 0) - /* Useful to split the source selection regs into their pieces */ #define NV30_VP_SRC0_HIGH_SHIFT 6 #define NV30_VP_SRC0_HIGH_MASK 0x00007FC0 @@ -221,270 +164,6 @@ #define NV30_VP_SRC_REG_TYPE_INPUT 2 #define NV30_VP_SRC_REG_TYPE_CONST 3 /* guess */ -/* - * Each fragment program opcode appears to be comprised of 4 32-bit values. - * - * 0 - Opcode, output reg/mask, ATTRIB source - * 1 - Source 0 - * 2 - Source 1 - * 3 - Source 2 - * - * There appears to be no special difference between result regs and temp regs. - * result.color == R0.xyzw - * result.depth == R1.z - * When the fragprog contains instructions to write depth, NV30_TCL_PRIMITIVE_3D_UNK1D78=0 - * otherwise it is set to 1. - * - * Constants are inserted directly after the instruction that uses them. - * - * It appears that it's not possible to use two input registers in one - * instruction as the input sourcing is done in the instruction dword - * and not the source selection dwords. As such instructions such as: - * - * ADD result.color, fragment.color, fragment.texcoord[0]; - * - * must be split into two MOV's and then an ADD (nvidia does this) but - * I'm not sure why it's not just one MOV and then source the second input - * in the ADD instruction.. - * - * Negation of the full source is done with NV30_FP_REG_NEGATE, arbitrary - * negation requires multiplication with a const. - * - * Arbitrary swizzling is supported with the exception of SWIZZLE_ZERO/SWIZZLE_ONE - * The temp/result regs appear to be initialised to (0.0, 0.0, 0.0, 0.0) as SWIZZLE_ZERO - * is implemented simply by not writing to the relevant components of the destination. - * - * Conditional execution - * TODO - * - * Non-native instructions: - * LIT - * LRP - MAD+MAD - * SUB - ADD, negate second source - * RSQ - LG2 + EX2 - * POW - LG2 + MUL + EX2 - * SCS - COS + SIN - * XPD - */ - -//== Opcode / Destination selection == -#define NV30_FP_OP_PROGRAM_END (1 << 0) -#define NV30_FP_OP_OUT_REG_SHIFT 1 -#define NV30_FP_OP_OUT_REG_MASK (31 << 1) /* uncertain */ -/* Needs to be set when writing outputs to get expected result.. */ -#define NV30_FP_OP_OUT_REG_HALF (1 << 7) -#define NV30_FP_OP_COND_WRITE_ENABLE (1 << 8) -#define NV30_FP_OP_OUTMASK_SHIFT 9 -#define NV30_FP_OP_OUTMASK_MASK (0xF << 9) -# define NV30_FP_OP_OUT_X (1<<9) -# define NV30_FP_OP_OUT_Y (1<<10) -# define NV30_FP_OP_OUT_Z (1<<11) -# define NV30_FP_OP_OUT_W (1<<12) -/* Uncertain about these, especially the input_src values.. it's possible that - * they can be dynamically changed. - */ -#define NV30_FP_OP_INPUT_SRC_SHIFT 13 -#define NV30_FP_OP_INPUT_SRC_MASK (15 << 13) -# define NV30_FP_OP_INPUT_SRC_POSITION 0x0 -# define NV30_FP_OP_INPUT_SRC_COL0 0x1 -# define NV30_FP_OP_INPUT_SRC_COL1 0x2 -# define NV30_FP_OP_INPUT_SRC_FOGC 0x3 -# define NV30_FP_OP_INPUT_SRC_TC0 0x4 -# define NV30_FP_OP_INPUT_SRC_TC(n) (0x4 + n) -#define NV30_FP_OP_TEX_UNIT_SHIFT 17 -#define NV30_FP_OP_TEX_UNIT_MASK (0xF << 17) /* guess */ -#define NV30_FP_OP_PRECISION_SHIFT 22 -#define NV30_FP_OP_PRECISION_MASK (3 << 22) -# define NV30_FP_PRECISION_FP32 0 -# define NV30_FP_PRECISION_FP16 1 -# define NV30_FP_PRECISION_FX12 2 -#define NV30_FP_OP_OPCODE_SHIFT 24 -#define NV30_FP_OP_OPCODE_MASK (0x3F << 24) -# define NV30_FP_OP_OPCODE_NOP 0x00 -# define NV30_FP_OP_OPCODE_MOV 0x01 -# define NV30_FP_OP_OPCODE_MUL 0x02 -# define NV30_FP_OP_OPCODE_ADD 0x03 -# define NV30_FP_OP_OPCODE_MAD 0x04 -# define NV30_FP_OP_OPCODE_DP3 0x05 -# define NV30_FP_OP_OPCODE_DP4 0x06 -# define NV30_FP_OP_OPCODE_DST 0x07 -# define NV30_FP_OP_OPCODE_MIN 0x08 -# define NV30_FP_OP_OPCODE_MAX 0x09 -# define NV30_FP_OP_OPCODE_SLT 0x0A -# define NV30_FP_OP_OPCODE_SGE 0x0B -# define NV30_FP_OP_OPCODE_SLE 0x0C -# define NV30_FP_OP_OPCODE_SGT 0x0D -# define NV30_FP_OP_OPCODE_SNE 0x0E -# define NV30_FP_OP_OPCODE_SEQ 0x0F -# define NV30_FP_OP_OPCODE_FRC 0x10 -# define NV30_FP_OP_OPCODE_FLR 0x11 -# define NV30_FP_OP_OPCODE_KIL 0x12 -# define NV30_FP_OP_OPCODE_PK4B 0x13 -# define NV30_FP_OP_OPCODE_UP4B 0x14 -# define NV30_FP_OP_OPCODE_DDX 0x15 /* can only write XY */ -# define NV30_FP_OP_OPCODE_DDY 0x16 /* can only write XY */ -# define NV30_FP_OP_OPCODE_TEX 0x17 -# define NV30_FP_OP_OPCODE_TXP 0x18 -# define NV30_FP_OP_OPCODE_TXD 0x19 -# define NV30_FP_OP_OPCODE_RCP 0x1A -# define NV30_FP_OP_OPCODE_RSQ 0x1B -# define NV30_FP_OP_OPCODE_EX2 0x1C -# define NV30_FP_OP_OPCODE_LG2 0x1D -# define NV30_FP_OP_OPCODE_LIT 0x1E -# define NV30_FP_OP_OPCODE_LRP 0x1F -# define NV30_FP_OP_OPCODE_STR 0x20 -# define NV30_FP_OP_OPCODE_SFL 0x21 -# define NV30_FP_OP_OPCODE_COS 0x22 -# define NV30_FP_OP_OPCODE_SIN 0x23 -# define NV30_FP_OP_OPCODE_PK2H 0x24 -# define NV30_FP_OP_OPCODE_UP2H 0x25 -# define NV30_FP_OP_OPCODE_POW 0x26 -# define NV30_FP_OP_OPCODE_PK4UB 0x27 -# define NV30_FP_OP_OPCODE_UP4UB 0x28 -# define NV30_FP_OP_OPCODE_PK2US 0x29 -# define NV30_FP_OP_OPCODE_UP2US 0x2A -# define NV30_FP_OP_OPCODE_DP2A 0x2E -# define NV30_FP_OP_OPCODE_TXB 0x31 -# define NV30_FP_OP_OPCODE_RFL 0x36 -# define NV30_FP_OP_OPCODE_DIV 0x3A -#define NV30_FP_OP_OUT_SAT (1 << 31) - -/* high order bits of SRC0 */ -#define NV30_FP_OP_OUT_ABS (1 << 29) -#define NV30_FP_OP_COND_SWZ_W_SHIFT 27 -#define NV30_FP_OP_COND_SWZ_W_MASK (3 << 27) -#define NV30_FP_OP_COND_SWZ_Z_SHIFT 25 -#define NV30_FP_OP_COND_SWZ_Z_MASK (3 << 25) -#define NV30_FP_OP_COND_SWZ_Y_SHIFT 23 -#define NV30_FP_OP_COND_SWZ_Y_MASK (3 << 23) -#define NV30_FP_OP_COND_SWZ_X_SHIFT 21 -#define NV30_FP_OP_COND_SWZ_X_MASK (3 << 21) -#define NV30_FP_OP_COND_SWZ_ALL_SHIFT 21 -#define NV30_FP_OP_COND_SWZ_ALL_MASK (0xFF << 21) -#define NV30_FP_OP_COND_SHIFT 18 -#define NV30_FP_OP_COND_MASK (0x07 << 18) -# define NV30_FP_OP_COND_FL 0 -# define NV30_FP_OP_COND_LT 1 -# define NV30_FP_OP_COND_EQ 2 -# define NV30_FP_OP_COND_LE 3 -# define NV30_FP_OP_COND_GT 4 -# define NV30_FP_OP_COND_NE 5 -# define NV30_FP_OP_COND_GE 6 -# define NV30_FP_OP_COND_TR 7 - -/* high order bits of SRC1 */ -#define NV30_FP_OP_DST_SCALE_SHIFT 28 -#define NV30_FP_OP_DST_SCALE_MASK (3 << 28) -#define NV30_FP_OP_DST_SCALE_1X 0 -#define NV30_FP_OP_DST_SCALE_2X 1 -#define NV30_FP_OP_DST_SCALE_4X 2 -#define NV30_FP_OP_DST_SCALE_8X 3 -#define NV30_FP_OP_DST_SCALE_INV_2X 5 -#define NV30_FP_OP_DST_SCALE_INV_4X 6 -#define NV30_FP_OP_DST_SCALE_INV_8X 7 - - -/* high order bits of SRC2 */ -#define NV30_FP_OP_INDEX_INPUT (1 << 30) - -//== Register selection == -#define NV30_FP_REG_TYPE_SHIFT 0 -#define NV30_FP_REG_TYPE_MASK (3 << 0) -# define NV30_FP_REG_TYPE_TEMP 0 -# define NV30_FP_REG_TYPE_INPUT 1 -# define NV30_FP_REG_TYPE_CONST 2 -#define NV30_FP_REG_SRC_SHIFT 2 /* uncertain */ -#define NV30_FP_REG_SRC_MASK (31 << 2) -#define NV30_FP_REG_SRC_HALF (1 << 8) -#define NV30_FP_REG_SWZ_ALL_SHIFT 9 -#define NV30_FP_REG_SWZ_ALL_MASK (255 << 9) -#define NV30_FP_REG_SWZ_X_SHIFT 9 -#define NV30_FP_REG_SWZ_X_MASK (3 << 9) -#define NV30_FP_REG_SWZ_Y_SHIFT 11 -#define NV30_FP_REG_SWZ_Y_MASK (3 << 11) -#define NV30_FP_REG_SWZ_Z_SHIFT 13 -#define NV30_FP_REG_SWZ_Z_MASK (3 << 13) -#define NV30_FP_REG_SWZ_W_SHIFT 15 -#define NV30_FP_REG_SWZ_W_MASK (3 << 15) -# define NV30_FP_SWIZZLE_X 0 -# define NV30_FP_SWIZZLE_Y 1 -# define NV30_FP_SWIZZLE_Z 2 -# define NV30_FP_SWIZZLE_W 3 -#define NV30_FP_REG_NEGATE (1 << 17) - -#define NV30SR_NONE 0 -#define NV30SR_OUTPUT 1 -#define NV30SR_INPUT 2 -#define NV30SR_TEMP 3 -#define NV30SR_CONST 4 - -struct nv30_sreg { - int type; - int index; - - int dst_scale; - - int negate; - int abs; - int swz[4]; - - int cc_update; - int cc_update_reg; - int cc_test; - int cc_test_reg; - int cc_swz[4]; -}; - -static INLINE struct nv30_sreg -nv30_sr(int type, int index) -{ - struct nv30_sreg temp = { - .type = type, - .index = index, - .dst_scale = DEF_SCALE, - .abs = 0, - .negate = 0, - .swz = { 0, 1, 2, 3 }, - .cc_update = 0, - .cc_update_reg = 0, - .cc_test = DEF_CTEST, - .cc_test_reg = 0, - .cc_swz = { 0, 1, 2, 3 }, - }; - return temp; -} - -static INLINE struct nv30_sreg -nv30_sr_swz(struct nv30_sreg src, int x, int y, int z, int w) -{ - struct nv30_sreg dst = src; - - dst.swz[SWZ_X] = src.swz[x]; - dst.swz[SWZ_Y] = src.swz[y]; - dst.swz[SWZ_Z] = src.swz[z]; - dst.swz[SWZ_W] = src.swz[w]; - return dst; -} - -static INLINE struct nv30_sreg -nv30_sr_neg(struct nv30_sreg src) -{ - src.negate = !src.negate; - return src; -} - -static INLINE struct nv30_sreg -nv30_sr_abs(struct nv30_sreg src) -{ - src.abs = 1; - return src; -} - -static INLINE struct nv30_sreg -nv30_sr_scale(struct nv30_sreg src, int scale) -{ - src.dst_scale = scale; - return src; -} +#include "nvfx_shader.h" #endif diff --git a/src/gallium/drivers/nv30/nv30_vertprog.c b/src/gallium/drivers/nv30/nv30_vertprog.c index cf910e34b1..ec6d63889b 100644 --- a/src/gallium/drivers/nv30/nv30_vertprog.c +++ b/src/gallium/drivers/nv30/nv30_vertprog.c @@ -35,9 +35,9 @@ #define DEF_CTEST 0 #include "nv30_shader.h" -#define swz(s,x,y,z,w) nv30_sr_swz((s), SWZ_##x, SWZ_##y, SWZ_##z, SWZ_##w) -#define neg(s) nv30_sr_neg((s)) -#define abs(s) nv30_sr_abs((s)) +#define swz(s,x,y,z,w) nvfx_sr_swz((s), SWZ_##x, SWZ_##y, SWZ_##z, SWZ_##w) +#define neg(s) nvfx_sr_neg((s)) +#define abs(s) nvfx_sr_abs((s)) struct nv30_vpc { struct nvfx_vertex_program *vp; @@ -49,21 +49,21 @@ struct nv30_vpc { int high_temp; int temp_temp_count; - struct nv30_sreg *imm; + struct nvfx_sreg *imm; unsigned nr_imm; }; -static struct nv30_sreg +static struct nvfx_sreg temp(struct nv30_vpc *vpc) { int idx; idx = vpc->temp_temp_count++; idx += vpc->high_temp + 1; - return nv30_sr(NV30SR_TEMP, idx); + return nvfx_sr(NVFXSR_TEMP, idx); } -static struct nv30_sreg +static struct nvfx_sreg constant(struct nv30_vpc *vpc, int pipe, float x, float y, float z, float w) { struct nvfx_vertex_program *vp = vpc->vp; @@ -73,7 +73,7 @@ constant(struct nv30_vpc *vpc, int pipe, float x, float y, float z, float w) if (pipe >= 0) { for (idx = 0; idx < vp->nr_consts; idx++) { if (vp->consts[idx].index == pipe) - return nv30_sr(NV30SR_CONST, idx); + return nvfx_sr(NVFXSR_CONST, idx); } } @@ -86,37 +86,37 @@ constant(struct nv30_vpc *vpc, int pipe, float x, float y, float z, float w) vpd->value[1] = y; vpd->value[2] = z; vpd->value[3] = w; - return nv30_sr(NV30SR_CONST, idx); + return nvfx_sr(NVFXSR_CONST, idx); } #define arith(cc,s,o,d,m,s0,s1,s2) \ - nv30_vp_arith((cc), (s), NV30_VP_INST_##o, (d), (m), (s0), (s1), (s2)) + nv30_vp_arith((cc), NVFX_VP_INST_SLOT_##s, NVFX_VP_INST_##s##_OP_##o, (d), (m), (s0), (s1), (s2)) static void -emit_src(struct nv30_vpc *vpc, uint32_t *hw, int pos, struct nv30_sreg src) +emit_src(struct nv30_vpc *vpc, uint32_t *hw, int pos, struct nvfx_sreg src) { struct nvfx_vertex_program *vp = vpc->vp; uint32_t sr = 0; switch (src.type) { - case NV30SR_TEMP: + case NVFXSR_TEMP: sr |= (NV30_VP_SRC_REG_TYPE_TEMP << NV30_VP_SRC_REG_TYPE_SHIFT); sr |= (src.index << NV30_VP_SRC_TEMP_SRC_SHIFT); break; - case NV30SR_INPUT: + case NVFXSR_INPUT: sr |= (NV30_VP_SRC_REG_TYPE_INPUT << NV30_VP_SRC_REG_TYPE_SHIFT); vp->ir |= (1 << src.index); hw[1] |= (src.index << NV30_VP_INST_INPUT_SRC_SHIFT); break; - case NV30SR_CONST: + case NVFXSR_CONST: sr |= (NV30_VP_SRC_REG_TYPE_CONST << NV30_VP_SRC_REG_TYPE_SHIFT); assert(vpc->vpi->const_index == -1 || vpc->vpi->const_index == src.index); vpc->vpi->const_index = src.index; break; - case NV30SR_NONE: + case NVFXSR_NONE: sr |= (NV30_VP_SRC_REG_TYPE_INPUT << NV30_VP_SRC_REG_TYPE_SHIFT); break; @@ -164,15 +164,15 @@ emit_src(struct nv30_vpc *vpc, uint32_t *hw, int pos, struct nv30_sreg src) } static void -emit_dst(struct nv30_vpc *vpc, uint32_t *hw, int slot, struct nv30_sreg dst) +emit_dst(struct nv30_vpc *vpc, uint32_t *hw, int slot, struct nvfx_sreg dst) { struct nvfx_vertex_program *vp = vpc->vp; switch (dst.type) { - case NV30SR_TEMP: + case NVFXSR_TEMP: hw[0] |= (dst.index << NV30_VP_INST_DEST_TEMP_ID_SHIFT); break; - case NV30SR_OUTPUT: + case NVFXSR_OUTPUT: switch (dst.index) { case NV30_VP_INST_DEST_COL0 : vp->or |= (1 << 0); break; case NV30_VP_INST_DEST_COL1 : vp->or |= (1 << 1); break; @@ -207,9 +207,9 @@ emit_dst(struct nv30_vpc *vpc, uint32_t *hw, int slot, struct nv30_sreg dst) static void nv30_vp_arith(struct nv30_vpc *vpc, int slot, int op, - struct nv30_sreg dst, int mask, - struct nv30_sreg s0, struct nv30_sreg s1, - struct nv30_sreg s2) + struct nvfx_sreg dst, int mask, + struct nvfx_sreg s0, struct nvfx_sreg s1, + struct nvfx_sreg s2) { struct nvfx_vertex_program *vp = vpc->vp; uint32_t *hw; @@ -221,7 +221,7 @@ nv30_vp_arith(struct nv30_vpc *vpc, int slot, int op, hw = vpc->vpi->data; - hw[0] |= (NV30_VP_INST_COND_TR << NV30_VP_INST_COND_SHIFT); + hw[0] |= (NVFX_VP_INST_COND_TR << NV30_VP_INST_COND_SHIFT); hw[0] |= ((0 << NV30_VP_INST_COND_SWZ_X_SHIFT) | (1 << NV30_VP_INST_COND_SWZ_Y_SHIFT) | (2 << NV30_VP_INST_COND_SWZ_Z_SHIFT) | @@ -231,7 +231,7 @@ nv30_vp_arith(struct nv30_vpc *vpc, int slot, int op, // hw[3] |= NV30_VP_INST_SCA_DEST_TEMP_MASK; // hw[3] |= (mask << NV30_VP_INST_VEC_WRITEMASK_SHIFT); - if (dst.type == NV30SR_OUTPUT) { + if (dst.type == NVFXSR_OUTPUT) { if (slot) hw[3] |= (mask << NV30_VP_INST_SDEST_WRITEMASK_SHIFT); else @@ -249,13 +249,13 @@ nv30_vp_arith(struct nv30_vpc *vpc, int slot, int op, emit_src(vpc, hw, 2, s2); } -static INLINE struct nv30_sreg +static INLINE struct nvfx_sreg tgsi_src(struct nv30_vpc *vpc, const struct tgsi_full_src_register *fsrc) { - struct nv30_sreg src; + struct nvfx_sreg src; switch (fsrc->Register.File) { case TGSI_FILE_INPUT: - src = nv30_sr(NV30SR_INPUT, fsrc->Register.Index); + src = nvfx_sr(NVFXSR_INPUT, fsrc->Register.Index); break; case TGSI_FILE_CONSTANT: src = constant(vpc, fsrc->Register.Index, 0, 0, 0, 0); @@ -266,7 +266,7 @@ tgsi_src(struct nv30_vpc *vpc, const struct tgsi_full_src_register *fsrc) { case TGSI_FILE_TEMPORARY: if (vpc->high_temp < fsrc->Register.Index) vpc->high_temp = fsrc->Register.Index; - src = nv30_sr(NV30SR_TEMP, fsrc->Register.Index); + src = nvfx_sr(NVFXSR_TEMP, fsrc->Register.Index); break; default: NOUVEAU_ERR("bad src file\n"); @@ -282,18 +282,18 @@ tgsi_src(struct nv30_vpc *vpc, const struct tgsi_full_src_register *fsrc) { return src; } -static INLINE struct nv30_sreg +static INLINE struct nvfx_sreg tgsi_dst(struct nv30_vpc *vpc, const struct tgsi_full_dst_register *fdst) { - struct nv30_sreg dst; + struct nvfx_sreg dst; switch (fdst->Register.File) { case TGSI_FILE_OUTPUT: - dst = nv30_sr(NV30SR_OUTPUT, + dst = nvfx_sr(NVFXSR_OUTPUT, vpc->output_map[fdst->Register.Index]); break; case TGSI_FILE_TEMPORARY: - dst = nv30_sr(NV30SR_TEMP, fdst->Register.Index); + dst = nvfx_sr(NVFXSR_TEMP, fdst->Register.Index); if (vpc->high_temp < dst.index) vpc->high_temp = dst.index; break; @@ -321,8 +321,8 @@ static boolean nv30_vertprog_parse_instruction(struct nv30_vpc *vpc, const struct tgsi_full_instruction *finst) { - struct nv30_sreg src[3], dst, tmp; - struct nv30_sreg none = nv30_sr(NV30SR_NONE, 0); + struct nvfx_sreg src[3], dst, tmp; + struct nvfx_sreg none = nvfx_sr(NVFXSR_NONE, 0); int mask; int ai = -1, ci = -1; int i; @@ -351,7 +351,7 @@ nv30_vertprog_parse_instruction(struct nv30_vpc *vpc, src[i] = tgsi_src(vpc, fsrc); } else { src[i] = temp(vpc); - arith(vpc, 0, OP_MOV, src[i], MASK_ALL, + arith(vpc, VEC, MOV, src[i], MASK_ALL, tgsi_src(vpc, fsrc), none, none); } break; @@ -365,7 +365,7 @@ nv30_vertprog_parse_instruction(struct nv30_vpc *vpc, src[i] = tgsi_src(vpc, fsrc); } else { src[i] = temp(vpc); - arith(vpc, 0, OP_MOV, src[i], MASK_ALL, + arith(vpc, VEC, MOV, src[i], MASK_ALL, tgsi_src(vpc, fsrc), none, none); } break; @@ -383,96 +383,96 @@ nv30_vertprog_parse_instruction(struct nv30_vpc *vpc, switch (finst->Instruction.Opcode) { case TGSI_OPCODE_ABS: - arith(vpc, 0, OP_MOV, dst, mask, abs(src[0]), none, none); + arith(vpc, VEC, MOV, dst, mask, abs(src[0]), none, none); break; case TGSI_OPCODE_ADD: - arith(vpc, 0, OP_ADD, dst, mask, src[0], none, src[1]); + arith(vpc, VEC, ADD, dst, mask, src[0], none, src[1]); break; case TGSI_OPCODE_ARL: - arith(vpc, 0, OP_ARL, dst, mask, src[0], none, none); + arith(vpc, VEC, ARL, dst, mask, src[0], none, none); break; case TGSI_OPCODE_DP3: - arith(vpc, 0, OP_DP3, dst, mask, src[0], src[1], none); + arith(vpc, VEC, DP3, dst, mask, src[0], src[1], none); break; case TGSI_OPCODE_DP4: - arith(vpc, 0, OP_DP4, dst, mask, src[0], src[1], none); + arith(vpc, VEC, DP4, dst, mask, src[0], src[1], none); break; case TGSI_OPCODE_DPH: - arith(vpc, 0, OP_DPH, dst, mask, src[0], src[1], none); + arith(vpc, VEC, DPH, dst, mask, src[0], src[1], none); break; case TGSI_OPCODE_DST: - arith(vpc, 0, OP_DST, dst, mask, src[0], src[1], none); + arith(vpc, VEC, DST, dst, mask, src[0], src[1], none); break; case TGSI_OPCODE_EX2: - arith(vpc, 1, OP_EX2, dst, mask, none, none, src[0]); + arith(vpc, SCA, EX2, dst, mask, none, none, src[0]); break; case TGSI_OPCODE_EXP: - arith(vpc, 1, OP_EXP, dst, mask, none, none, src[0]); + arith(vpc, SCA, EXP, dst, mask, none, none, src[0]); break; case TGSI_OPCODE_FLR: - arith(vpc, 0, OP_FLR, dst, mask, src[0], none, none); + arith(vpc, VEC, FLR, dst, mask, src[0], none, none); break; case TGSI_OPCODE_FRC: - arith(vpc, 0, OP_FRC, dst, mask, src[0], none, none); + arith(vpc, VEC, FRC, dst, mask, src[0], none, none); break; case TGSI_OPCODE_LG2: - arith(vpc, 1, OP_LG2, dst, mask, none, none, src[0]); + arith(vpc, SCA, LG2, dst, mask, none, none, src[0]); break; case TGSI_OPCODE_LIT: - arith(vpc, 1, OP_LIT, dst, mask, none, none, src[0]); + arith(vpc, SCA, LIT, dst, mask, none, none, src[0]); break; case TGSI_OPCODE_LOG: - arith(vpc, 1, OP_LOG, dst, mask, none, none, src[0]); + arith(vpc, SCA, LOG, dst, mask, none, none, src[0]); break; case TGSI_OPCODE_MAD: - arith(vpc, 0, OP_MAD, dst, mask, src[0], src[1], src[2]); + arith(vpc, VEC, MAD, dst, mask, src[0], src[1], src[2]); break; case TGSI_OPCODE_MAX: - arith(vpc, 0, OP_MAX, dst, mask, src[0], src[1], none); + arith(vpc, VEC, MAX, dst, mask, src[0], src[1], none); break; case TGSI_OPCODE_MIN: - arith(vpc, 0, OP_MIN, dst, mask, src[0], src[1], none); + arith(vpc, VEC, MIN, dst, mask, src[0], src[1], none); break; case TGSI_OPCODE_MOV: - arith(vpc, 0, OP_MOV, dst, mask, src[0], none, none); + arith(vpc, VEC, MOV, dst, mask, src[0], none, none); break; case TGSI_OPCODE_MUL: - arith(vpc, 0, OP_MUL, dst, mask, src[0], src[1], none); + arith(vpc, VEC, MUL, dst, mask, src[0], src[1], none); break; case TGSI_OPCODE_POW: tmp = temp(vpc); - arith(vpc, 1, OP_LG2, tmp, MASK_X, none, none, + arith(vpc, SCA, LG2, tmp, MASK_X, none, none, swz(src[0], X, X, X, X)); - arith(vpc, 0, OP_MUL, tmp, MASK_X, swz(tmp, X, X, X, X), + arith(vpc, VEC, MUL, tmp, MASK_X, swz(tmp, X, X, X, X), swz(src[1], X, X, X, X), none); - arith(vpc, 1, OP_EX2, dst, mask, none, none, + arith(vpc, SCA, EX2, dst, mask, none, none, swz(tmp, X, X, X, X)); break; case TGSI_OPCODE_RCP: - arith(vpc, 1, OP_RCP, dst, mask, none, none, src[0]); + arith(vpc, SCA, RCP, dst, mask, none, none, src[0]); break; case TGSI_OPCODE_RET: break; case TGSI_OPCODE_RSQ: - arith(vpc, 1, OP_RSQ, dst, mask, none, none, src[0]); + arith(vpc, SCA, RSQ, dst, mask, none, none, src[0]); break; case TGSI_OPCODE_SGE: - arith(vpc, 0, OP_SGE, dst, mask, src[0], src[1], none); + arith(vpc, VEC, SGE, dst, mask, src[0], src[1], none); break; case TGSI_OPCODE_SGT: - arith(vpc, 0, OP_SGT, dst, mask, src[0], src[1], none); + arith(vpc, VEC, SGT, dst, mask, src[0], src[1], none); break; case TGSI_OPCODE_SLT: - arith(vpc, 0, OP_SLT, dst, mask, src[0], src[1], none); + arith(vpc, VEC, SLT, dst, mask, src[0], src[1], none); break; case TGSI_OPCODE_SUB: - arith(vpc, 0, OP_ADD, dst, mask, src[0], none, neg(src[1])); + arith(vpc, VEC, ADD, dst, mask, src[0], none, neg(src[1])); break; case TGSI_OPCODE_XPD: tmp = temp(vpc); - arith(vpc, 0, OP_MUL, tmp, mask, + arith(vpc, VEC, MUL, tmp, mask, swz(src[0], Z, X, Y, Y), swz(src[1], Y, Z, X, X), none); - arith(vpc, 0, OP_MAD, dst, (mask & ~MASK_W), + arith(vpc, VEC, MAD, dst, (mask & ~MASK_W), swz(src[0], Y, Z, X, X), swz(src[1], Z, X, Y, Y), neg(tmp)); break; @@ -564,7 +564,7 @@ nv30_vertprog_prepare(struct nv30_vpc *vpc) tgsi_parse_free(&p); if (nr_imm) { - vpc->imm = CALLOC(nr_imm, sizeof(struct nv30_sreg)); + vpc->imm = CALLOC(nr_imm, sizeof(struct nvfx_sreg)); assert(vpc->imm); } @@ -639,7 +639,7 @@ nv30_vertprog_translate(struct nvfx_context *nvfx, } } - vp->insns[vp->nr_insns - 1].data[3] |= NV30_VP_INST_LAST; + vp->insns[vp->nr_insns - 1].data[3] |= NVFX_VP_INST_LAST; vp->translated = TRUE; out_err: tgsi_parse_free(&parse); diff --git a/src/gallium/drivers/nv40/nv40_draw.c b/src/gallium/drivers/nv40/nv40_draw.c index 87d2689d54..4ed87779fd 100644 --- a/src/gallium/drivers/nv40/nv40_draw.c +++ b/src/gallium/drivers/nv40/nv40_draw.c @@ -8,7 +8,7 @@ #include "draw/draw_pipe.h" #include "nv40_context.h" -#define NV40_SHADER_NO_FUCKEDNESS +#define NVFX_SHADER_NO_FUCKEDNESS #include "nv40_shader.h" /* Simple, but crappy, swtnl path, hopefully we wont need to hit this very diff --git a/src/gallium/drivers/nv40/nv40_fragprog.c b/src/gallium/drivers/nv40/nv40_fragprog.c index 2a0ab0cf31..e044f367a0 100644 --- a/src/gallium/drivers/nv40/nv40_fragprog.c +++ b/src/gallium/drivers/nv40/nv40_fragprog.c @@ -18,14 +18,14 @@ #define MASK_Z 4 #define MASK_W 8 #define MASK_ALL (MASK_X|MASK_Y|MASK_Z|MASK_W) -#define DEF_SCALE NV40_FP_OP_DST_SCALE_1X -#define DEF_CTEST NV40_FP_OP_COND_TR -#include "nv40_shader.h" +#define DEF_SCALE NVFX_FP_OP_DST_SCALE_1X +#define DEF_CTEST NVFX_FP_OP_COND_TR +#include "nvfx_shader.h" -#define swz(s,x,y,z,w) nv40_sr_swz((s), SWZ_##x, SWZ_##y, SWZ_##z, SWZ_##w) -#define neg(s) nv40_sr_neg((s)) -#define abs(s) nv40_sr_abs((s)) -#define scale(s,v) nv40_sr_scale((s), NV40_FP_OP_DST_SCALE_##v) +#define swz(s,x,y,z,w) nvfx_sr_swz((s), SWZ_##x, SWZ_##y, SWZ_##z, SWZ_##w) +#define neg(s) nvfx_sr_neg((s)) +#define abs(s) nvfx_sr_abs((s)) +#define scale(s,v) nvfx_sr_scale((s), NVFX_FP_OP_DST_SCALE_##v) #define MAX_CONSTS 128 #define MAX_IMM 32 @@ -36,8 +36,8 @@ struct nv40_fpc { unsigned r_temps; unsigned r_temps_discard; - struct nv40_sreg r_result[PIPE_MAX_SHADER_OUTPUTS]; - struct nv40_sreg *r_temp; + struct nvfx_sreg r_result[PIPE_MAX_SHADER_OUTPUTS]; + struct nvfx_sreg *r_temp; int num_regs; @@ -50,11 +50,11 @@ struct nv40_fpc { } consts[MAX_CONSTS]; int nr_consts; - struct nv40_sreg imm[MAX_IMM]; + struct nvfx_sreg imm[MAX_IMM]; unsigned nr_imm; }; -static INLINE struct nv40_sreg +static INLINE struct nvfx_sreg temp(struct nv40_fpc *fpc) { int idx = ffs(~fpc->r_temps) - 1; @@ -62,12 +62,12 @@ temp(struct nv40_fpc *fpc) if (idx < 0) { NOUVEAU_ERR("out of temps!!\n"); assert(0); - return nv40_sr(NV40SR_TEMP, 0); + return nvfx_sr(NVFXSR_TEMP, 0); } fpc->r_temps |= (1 << idx); fpc->r_temps_discard |= (1 << idx); - return nv40_sr(NV40SR_TEMP, idx); + return nvfx_sr(NVFXSR_TEMP, idx); } static INLINE void @@ -77,7 +77,7 @@ release_temps(struct nv40_fpc *fpc) fpc->r_temps_discard = 0; } -static INLINE struct nv40_sreg +static INLINE struct nvfx_sreg constant(struct nv40_fpc *fpc, int pipe, float vals[4]) { int idx; @@ -89,14 +89,14 @@ constant(struct nv40_fpc *fpc, int pipe, float vals[4]) fpc->consts[idx].pipe = pipe; if (pipe == -1) memcpy(fpc->consts[idx].vals, vals, 4 * sizeof(float)); - return nv40_sr(NV40SR_CONST, idx); + return nvfx_sr(NVFXSR_CONST, idx); } #define arith(cc,s,o,d,m,s0,s1,s2) \ - nv40_fp_arith((cc), (s), NV40_FP_OP_OPCODE_##o, \ + nv40_fp_arith((cc), (s), NVFX_FP_OP_OPCODE_##o, \ (d), (m), (s0), (s1), (s2)) #define tex(cc,s,o,u,d,m,s0,s1,s2) \ - nv40_fp_tex((cc), (s), NV40_FP_OP_OPCODE_##o, (u), \ + nv40_fp_tex((cc), (s), NVFX_FP_OP_OPCODE_##o, (u), \ (d), (m), (s0), none, none) static void @@ -109,25 +109,25 @@ grow_insns(struct nv40_fpc *fpc, int size) } static void -emit_src(struct nv40_fpc *fpc, int pos, struct nv40_sreg src) +emit_src(struct nv40_fpc *fpc, int pos, struct nvfx_sreg src) { struct nvfx_fragment_program *fp = fpc->fp; uint32_t *hw = &fp->insn[fpc->inst_offset]; uint32_t sr = 0; switch (src.type) { - case NV40SR_INPUT: - sr |= (NV40_FP_REG_TYPE_INPUT << NV40_FP_REG_TYPE_SHIFT); - hw[0] |= (src.index << NV40_FP_OP_INPUT_SRC_SHIFT); + case NVFXSR_INPUT: + sr |= (NVFX_FP_REG_TYPE_INPUT << NVFX_FP_REG_TYPE_SHIFT); + hw[0] |= (src.index << NVFX_FP_OP_INPUT_SRC_SHIFT); break; - case NV40SR_OUTPUT: - sr |= NV40_FP_REG_SRC_HALF; + case NVFXSR_OUTPUT: + sr |= NVFX_FP_REG_SRC_HALF; /* fall-through */ - case NV40SR_TEMP: - sr |= (NV40_FP_REG_TYPE_TEMP << NV40_FP_REG_TYPE_SHIFT); - sr |= (src.index << NV40_FP_REG_SRC_SHIFT); + case NVFXSR_TEMP: + sr |= (NVFX_FP_REG_TYPE_TEMP << NVFX_FP_REG_TYPE_SHIFT); + sr |= (src.index << NVFX_FP_REG_SRC_SHIFT); break; - case NV40SR_CONST: + case NVFXSR_CONST: if (!fpc->have_const) { grow_insns(fpc, 4); fpc->have_const = 1; @@ -149,61 +149,61 @@ emit_src(struct nv40_fpc *fpc, int pos, struct nv40_sreg src) sizeof(uint32_t) * 4); } - sr |= (NV40_FP_REG_TYPE_CONST << NV40_FP_REG_TYPE_SHIFT); + sr |= (NVFX_FP_REG_TYPE_CONST << NVFX_FP_REG_TYPE_SHIFT); break; - case NV40SR_NONE: - sr |= (NV40_FP_REG_TYPE_INPUT << NV40_FP_REG_TYPE_SHIFT); + case NVFXSR_NONE: + sr |= (NVFX_FP_REG_TYPE_INPUT << NVFX_FP_REG_TYPE_SHIFT); break; default: assert(0); } if (src.negate) - sr |= NV40_FP_REG_NEGATE; + sr |= NVFX_FP_REG_NEGATE; if (src.abs) hw[1] |= (1 << (29 + pos)); - sr |= ((src.swz[0] << NV40_FP_REG_SWZ_X_SHIFT) | - (src.swz[1] << NV40_FP_REG_SWZ_Y_SHIFT) | - (src.swz[2] << NV40_FP_REG_SWZ_Z_SHIFT) | - (src.swz[3] << NV40_FP_REG_SWZ_W_SHIFT)); + sr |= ((src.swz[0] << NVFX_FP_REG_SWZ_X_SHIFT) | + (src.swz[1] << NVFX_FP_REG_SWZ_Y_SHIFT) | + (src.swz[2] << NVFX_FP_REG_SWZ_Z_SHIFT) | + (src.swz[3] << NVFX_FP_REG_SWZ_W_SHIFT)); hw[pos + 1] |= sr; } static void -emit_dst(struct nv40_fpc *fpc, struct nv40_sreg dst) +emit_dst(struct nv40_fpc *fpc, struct nvfx_sreg dst) { struct nvfx_fragment_program *fp = fpc->fp; uint32_t *hw = &fp->insn[fpc->inst_offset]; switch (dst.type) { - case NV40SR_TEMP: + case NVFXSR_TEMP: if (fpc->num_regs < (dst.index + 1)) fpc->num_regs = dst.index + 1; break; - case NV40SR_OUTPUT: + case NVFXSR_OUTPUT: if (dst.index == 1) { fp->fp_control |= 0xe; } else { - hw[0] |= NV40_FP_OP_OUT_REG_HALF; + hw[0] |= NVFX_FP_OP_OUT_REG_HALF; } break; - case NV40SR_NONE: + case NVFXSR_NONE: hw[0] |= (1 << 30); break; default: assert(0); } - hw[0] |= (dst.index << NV40_FP_OP_OUT_REG_SHIFT); + hw[0] |= (dst.index << NVFX_FP_OP_OUT_REG_SHIFT); } static void nv40_fp_arith(struct nv40_fpc *fpc, int sat, int op, - struct nv40_sreg dst, int mask, - struct nv40_sreg s0, struct nv40_sreg s1, struct nv40_sreg s2) + struct nvfx_sreg dst, int mask, + struct nvfx_sreg s0, struct nvfx_sreg s1, struct nvfx_sreg s2) { struct nvfx_fragment_program *fp = fpc->fp; uint32_t *hw; @@ -214,22 +214,22 @@ nv40_fp_arith(struct nv40_fpc *fpc, int sat, int op, hw = &fp->insn[fpc->inst_offset]; memset(hw, 0, sizeof(uint32_t) * 4); - if (op == NV40_FP_OP_OPCODE_KIL) + if (op == NVFX_FP_OP_OPCODE_KIL) fp->fp_control |= NV40TCL_FP_CONTROL_KIL; - hw[0] |= (op << NV40_FP_OP_OPCODE_SHIFT); - hw[0] |= (mask << NV40_FP_OP_OUTMASK_SHIFT); - hw[2] |= (dst.dst_scale << NV40_FP_OP_DST_SCALE_SHIFT); + hw[0] |= (op << NVFX_FP_OP_OPCODE_SHIFT); + hw[0] |= (mask << NVFX_FP_OP_OUTMASK_SHIFT); + hw[2] |= (dst.dst_scale << NVFX_FP_OP_DST_SCALE_SHIFT); if (sat) - hw[0] |= NV40_FP_OP_OUT_SAT; + hw[0] |= NVFX_FP_OP_OUT_SAT; if (dst.cc_update) - hw[0] |= NV40_FP_OP_COND_WRITE_ENABLE; - hw[1] |= (dst.cc_test << NV40_FP_OP_COND_SHIFT); - hw[1] |= ((dst.cc_swz[0] << NV40_FP_OP_COND_SWZ_X_SHIFT) | - (dst.cc_swz[1] << NV40_FP_OP_COND_SWZ_Y_SHIFT) | - (dst.cc_swz[2] << NV40_FP_OP_COND_SWZ_Z_SHIFT) | - (dst.cc_swz[3] << NV40_FP_OP_COND_SWZ_W_SHIFT)); + hw[0] |= NVFX_FP_OP_COND_WRITE_ENABLE; + hw[1] |= (dst.cc_test << NVFX_FP_OP_COND_SHIFT); + hw[1] |= ((dst.cc_swz[0] << NVFX_FP_OP_COND_SWZ_X_SHIFT) | + (dst.cc_swz[1] << NVFX_FP_OP_COND_SWZ_Y_SHIFT) | + (dst.cc_swz[2] << NVFX_FP_OP_COND_SWZ_Z_SHIFT) | + (dst.cc_swz[3] << NVFX_FP_OP_COND_SWZ_W_SHIFT)); emit_dst(fpc, dst); emit_src(fpc, 0, s0); @@ -239,25 +239,25 @@ nv40_fp_arith(struct nv40_fpc *fpc, int sat, int op, static void nv40_fp_tex(struct nv40_fpc *fpc, int sat, int op, int unit, - struct nv40_sreg dst, int mask, - struct nv40_sreg s0, struct nv40_sreg s1, struct nv40_sreg s2) + struct nvfx_sreg dst, int mask, + struct nvfx_sreg s0, struct nvfx_sreg s1, struct nvfx_sreg s2) { struct nvfx_fragment_program *fp = fpc->fp; nv40_fp_arith(fpc, sat, op, dst, mask, s0, s1, s2); - fp->insn[fpc->inst_offset] |= (unit << NV40_FP_OP_TEX_UNIT_SHIFT); + fp->insn[fpc->inst_offset] |= (unit << NVFX_FP_OP_TEX_UNIT_SHIFT); fp->samplers |= (1 << unit); } -static INLINE struct nv40_sreg +static INLINE struct nvfx_sreg tgsi_src(struct nv40_fpc *fpc, const struct tgsi_full_src_register *fsrc) { - struct nv40_sreg src; + struct nvfx_sreg src; switch (fsrc->Register.File) { case TGSI_FILE_INPUT: - src = nv40_sr(NV40SR_INPUT, + src = nvfx_sr(NVFXSR_INPUT, fpc->attrib_map[fsrc->Register.Index]); break; case TGSI_FILE_CONSTANT: @@ -288,7 +288,7 @@ tgsi_src(struct nv40_fpc *fpc, const struct tgsi_full_src_register *fsrc) return src; } -static INLINE struct nv40_sreg +static INLINE struct nvfx_sreg tgsi_dst(struct nv40_fpc *fpc, const struct tgsi_full_dst_register *fdst) { switch (fdst->Register.File) { case TGSI_FILE_OUTPUT: @@ -296,10 +296,10 @@ tgsi_dst(struct nv40_fpc *fpc, const struct tgsi_full_dst_register *fdst) { case TGSI_FILE_TEMPORARY: return fpc->r_temp[fdst->Register.Index]; case TGSI_FILE_NULL: - return nv40_sr(NV40SR_NONE, 0); + return nvfx_sr(NVFXSR_NONE, 0); default: NOUVEAU_ERR("bad dst file %d\n", fdst->Register.File); - return nv40_sr(NV40SR_NONE, 0); + return nvfx_sr(NVFXSR_NONE, 0); } } @@ -317,10 +317,10 @@ tgsi_mask(uint tgsi) static boolean src_native_swz(struct nv40_fpc *fpc, const struct tgsi_full_src_register *fsrc, - struct nv40_sreg *src) + struct nvfx_sreg *src) { - const struct nv40_sreg none = nv40_sr(NV40SR_NONE, 0); - struct nv40_sreg tgsi = tgsi_src(fpc, fsrc); + const struct nvfx_sreg none = nvfx_sr(NVFXSR_NONE, 0); + struct nvfx_sreg tgsi = tgsi_src(fpc, fsrc); uint mask = 0; uint c; @@ -352,8 +352,8 @@ static boolean nv40_fragprog_parse_instruction(struct nv40_fpc *fpc, const struct tgsi_full_instruction *finst) { - const struct nv40_sreg none = nv40_sr(NV40SR_NONE, 0); - struct nv40_sreg src[3], dst, tmp; + const struct nvfx_sreg none = nvfx_sr(NVFXSR_NONE, 0); + struct nvfx_sreg src[3], dst, tmp; int mask, sat, unit; int ai = -1, ci = -1, ii = -1; int i; @@ -445,12 +445,12 @@ nv40_fragprog_parse_instruction(struct nv40_fpc *fpc, arith(fpc, sat, ADD, dst, mask, src[0], src[1], none); break; case TGSI_OPCODE_CMP: - tmp = nv40_sr(NV40SR_NONE, 0); + tmp = nvfx_sr(NVFXSR_NONE, 0); tmp.cc_update = 1; arith(fpc, 0, MOV, tmp, 0xf, src[0], none, none); - dst.cc_test = NV40_VP_INST_COND_GE; + dst.cc_test = NVFX_VP_INST_COND_GE; arith(fpc, sat, MOV, dst, mask, src[2], none, none); - dst.cc_test = NV40_VP_INST_COND_LT; + dst.cc_test = NVFX_VP_INST_COND_LT; arith(fpc, sat, MOV, dst, mask, src[1], none, none); break; case TGSI_OPCODE_COS: @@ -512,10 +512,10 @@ nv40_fragprog_parse_instruction(struct nv40_fpc *fpc, arith(fpc, 0, KIL, none, 0, none, none, none); break; case TGSI_OPCODE_KIL: - dst = nv40_sr(NV40SR_NONE, 0); + dst = nvfx_sr(NVFXSR_NONE, 0); dst.cc_update = 1; arith(fpc, 0, MOV, dst, MASK_ALL, src[0], none, none); - dst.cc_update = 0; dst.cc_test = NV40_FP_OP_COND_LT; + dst.cc_update = 0; dst.cc_test = NVFX_FP_OP_COND_LT; arith(fpc, 0, KIL, dst, 0, none, none, none); break; case TGSI_OPCODE_LG2: @@ -662,25 +662,25 @@ nv40_fragprog_parse_decl_attrib(struct nv40_fpc *fpc, switch (fdec->Semantic.Name) { case TGSI_SEMANTIC_POSITION: - hw = NV40_FP_OP_INPUT_SRC_POSITION; + hw = NVFX_FP_OP_INPUT_SRC_POSITION; break; case TGSI_SEMANTIC_COLOR: if (fdec->Semantic.Index == 0) { - hw = NV40_FP_OP_INPUT_SRC_COL0; + hw = NVFX_FP_OP_INPUT_SRC_COL0; } else if (fdec->Semantic.Index == 1) { - hw = NV40_FP_OP_INPUT_SRC_COL1; + hw = NVFX_FP_OP_INPUT_SRC_COL1; } else { NOUVEAU_ERR("bad colour semantic index\n"); return FALSE; } break; case TGSI_SEMANTIC_FOG: - hw = NV40_FP_OP_INPUT_SRC_FOGC; + hw = NVFX_FP_OP_INPUT_SRC_FOGC; break; case TGSI_SEMANTIC_GENERIC: if (fdec->Semantic.Index <= 7) { - hw = NV40_FP_OP_INPUT_SRC_TC(fdec->Semantic. + hw = NVFX_FP_OP_INPUT_SRC_TC(fdec->Semantic. Index); } else { NOUVEAU_ERR("bad generic semantic index\n"); @@ -723,7 +723,7 @@ nv40_fragprog_parse_decl_output(struct nv40_fpc *fpc, return FALSE; } - fpc->r_result[idx] = nv40_sr(NV40SR_OUTPUT, hw); + fpc->r_result[idx] = nvfx_sr(NVFXSR_OUTPUT, hw); fpc->r_temps |= (1 << hw); return TRUE; } @@ -787,7 +787,7 @@ nv40_fragprog_prepare(struct nv40_fpc *fpc) tgsi_parse_free(&p); if (++high_temp) { - fpc->r_temp = CALLOC(high_temp, sizeof(struct nv40_sreg)); + fpc->r_temp = CALLOC(high_temp, sizeof(struct nvfx_sreg)); for (i = 0; i < high_temp; i++) fpc->r_temp[i] = temp(fpc); fpc->r_temps_discard = 0; diff --git a/src/gallium/drivers/nv40/nv40_shader.h b/src/gallium/drivers/nv40/nv40_shader.h index 854dccf548..8d28137e9d 100644 --- a/src/gallium/drivers/nv40/nv40_shader.h +++ b/src/gallium/drivers/nv40/nv40_shader.h @@ -48,14 +48,6 @@ #define NV40_VP_INST_COND_TEST_ENABLE (1 << 13) #define NV40_VP_INST_COND_SHIFT 10 #define NV40_VP_INST_COND_MASK (0x7 << 10) -# define NV40_VP_INST_COND_FL 0 -# define NV40_VP_INST_COND_LT 1 -# define NV40_VP_INST_COND_EQ 2 -# define NV40_VP_INST_COND_LE 3 -# define NV40_VP_INST_COND_GT 4 -# define NV40_VP_INST_COND_NE 5 -# define NV40_VP_INST_COND_GE 6 -# define NV40_VP_INST_COND_TR 7 #define NV40_VP_INST_COND_SWZ_X_SHIFT 8 #define NV40_VP_INST_COND_SWZ_X_MASK (3 << 8) #define NV40_VP_INST_COND_SWZ_Y_SHIFT 6 @@ -84,63 +76,12 @@ /* ---- OPCODE BITS 95:64 / data DWORD 1 --- */ #define NV40_VP_INST_VEC_OPCODE_SHIFT 22 #define NV40_VP_INST_VEC_OPCODE_MASK (0x1F << 22) -# define NV40_VP_INST_OP_NOP 0x00 -# define NV40_VP_INST_OP_MOV 0x01 -# define NV40_VP_INST_OP_MUL 0x02 -# define NV40_VP_INST_OP_ADD 0x03 -# define NV40_VP_INST_OP_MAD 0x04 -# define NV40_VP_INST_OP_DP3 0x05 -# define NV40_VP_INST_OP_DPH 0x06 -# define NV40_VP_INST_OP_DP4 0x07 -# define NV40_VP_INST_OP_DST 0x08 -# define NV40_VP_INST_OP_MIN 0x09 -# define NV40_VP_INST_OP_MAX 0x0A -# define NV40_VP_INST_OP_SLT 0x0B -# define NV40_VP_INST_OP_SGE 0x0C -# define NV40_VP_INST_OP_ARL 0x0D -# define NV40_VP_INST_OP_FRC 0x0E -# define NV40_VP_INST_OP_FLR 0x0F -# define NV40_VP_INST_OP_SEQ 0x10 -# define NV40_VP_INST_OP_SFL 0x11 -# define NV40_VP_INST_OP_SGT 0x12 -# define NV40_VP_INST_OP_SLE 0x13 -# define NV40_VP_INST_OP_SNE 0x14 -# define NV40_VP_INST_OP_STR 0x15 -# define NV40_VP_INST_OP_SSG 0x16 -# define NV40_VP_INST_OP_ARR 0x17 -# define NV40_VP_INST_OP_ARA 0x18 -# define NV40_VP_INST_OP_TXL 0x19 #define NV40_VP_INST_SCA_OPCODE_SHIFT 27 #define NV40_VP_INST_SCA_OPCODE_MASK (0x1F << 27) -# define NV40_VP_INST_OP_NOP 0x00 -# define NV40_VP_INST_OP_MOV 0x01 -# define NV40_VP_INST_OP_RCP 0x02 -# define NV40_VP_INST_OP_RCC 0x03 -# define NV40_VP_INST_OP_RSQ 0x04 -# define NV40_VP_INST_OP_EXP 0x05 -# define NV40_VP_INST_OP_LOG 0x06 -# define NV40_VP_INST_OP_LIT 0x07 -# define NV40_VP_INST_OP_BRA 0x09 -# define NV40_VP_INST_OP_CAL 0x0B -# define NV40_VP_INST_OP_RET 0x0C -# define NV40_VP_INST_OP_LG2 0x0D -# define NV40_VP_INST_OP_EX2 0x0E -# define NV40_VP_INST_OP_SIN 0x0F -# define NV40_VP_INST_OP_COS 0x10 -# define NV40_VP_INST_OP_PUSHA 0x13 -# define NV40_VP_INST_OP_POPA 0x14 #define NV40_VP_INST_CONST_SRC_SHIFT 12 #define NV40_VP_INST_CONST_SRC_MASK (0xFF << 12) #define NV40_VP_INST_INPUT_SRC_SHIFT 8 #define NV40_VP_INST_INPUT_SRC_MASK (0x0F << 8) -# define NV40_VP_INST_IN_POS 0 -# define NV40_VP_INST_IN_WEIGHT 1 -# define NV40_VP_INST_IN_NORMAL 2 -# define NV40_VP_INST_IN_COL0 3 -# define NV40_VP_INST_IN_COL1 4 -# define NV40_VP_INST_IN_FOGC 5 -# define NV40_VP_INST_IN_TC0 8 -# define NV40_VP_INST_IN_TC(n) (8+n) #define NV40_VP_INST_SRC0H_SHIFT 0 #define NV40_VP_INST_SRC0H_MASK (0xFF << 0) #define NV40_VP_INST1_KNOWN ( \ @@ -194,7 +135,6 @@ # define NV40_VP_INST_DEST_TC(n) (7+n) # define NV40_VP_INST_DEST_TEMP 0x1F #define NV40_VP_INST_INDEX_CONST (1 << 1) -#define NV40_VP_INST_LAST (1 << 0) #define NV40_VP_INST3_KNOWN ( \ NV40_VP_INST_SRC2L_MASK |\ NV40_VP_INST_SCA_WRITEMASK_MASK |\ @@ -232,325 +172,7 @@ # define NV40_VP_SRC_REG_TYPE_INPUT 2 # define NV40_VP_SRC_REG_TYPE_CONST 3 +#include "nvfx_shader.h" -/* - * Each fragment program opcode appears to be comprised of 4 32-bit values. - * - * 0 - Opcode, output reg/mask, ATTRIB source - * 1 - Source 0 - * 2 - Source 1 - * 3 - Source 2 - * - * There appears to be no special difference between result regs and temp regs. - * result.color == R0.xyzw - * result.depth == R1.z - * When the fragprog contains instructions to write depth, - * NV30_TCL_PRIMITIVE_3D_UNK1D78=0 otherwise it is set to 1. - * - * Constants are inserted directly after the instruction that uses them. - * - * It appears that it's not possible to use two input registers in one - * instruction as the input sourcing is done in the instruction dword - * and not the source selection dwords. As such instructions such as: - * - * ADD result.color, fragment.color, fragment.texcoord[0]; - * - * must be split into two MOV's and then an ADD (nvidia does this) but - * I'm not sure why it's not just one MOV and then source the second input - * in the ADD instruction.. - * - * Negation of the full source is done with NV30_FP_REG_NEGATE, arbitrary - * negation requires multiplication with a const. - * - * Arbitrary swizzling is supported with the exception of SWIZZLE_ZERO and - * SWIZZLE_ONE. - * - * The temp/result regs appear to be initialised to (0.0, 0.0, 0.0, 0.0) as - * SWIZZLE_ZERO is implemented simply by not writing to the relevant components - * of the destination. - * - * Looping - * Loops appear to be fairly expensive on NV40 at least, the proprietary - * driver goes to a lot of effort to avoid using the native looping - * instructions. If the total number of *executed* instructions between - * REP/ENDREP or LOOP/ENDLOOP is <=500, the driver will unroll the loop. - * The maximum loop count is 255. - * - * Conditional execution - * TODO - * - * Non-native instructions: - * LIT - * LRP - MAD+MAD - * SUB - ADD, negate second source - * RSQ - LG2 + EX2 - * POW - LG2 + MUL + EX2 - * SCS - COS + SIN - * XPD - * DP2 - MUL + ADD - * NRM - */ - -//== Opcode / Destination selection == -#define NV40_FP_OP_PROGRAM_END (1 << 0) -#define NV40_FP_OP_OUT_REG_SHIFT 1 -#define NV40_FP_OP_OUT_REG_MASK (63 << 1) -/* Needs to be set when writing outputs to get expected result.. */ -#define NV40_FP_OP_OUT_REG_HALF (1 << 7) -#define NV40_FP_OP_COND_WRITE_ENABLE (1 << 8) -#define NV40_FP_OP_OUTMASK_SHIFT 9 -#define NV40_FP_OP_OUTMASK_MASK (0xF << 9) -# define NV40_FP_OP_OUT_X (1 << 9) -# define NV40_FP_OP_OUT_Y (1 <<10) -# define NV40_FP_OP_OUT_Z (1 <<11) -# define NV40_FP_OP_OUT_W (1 <<12) -/* Uncertain about these, especially the input_src values.. it's possible that - * they can be dynamically changed. - */ -#define NV40_FP_OP_INPUT_SRC_SHIFT 13 -#define NV40_FP_OP_INPUT_SRC_MASK (15 << 13) -# define NV40_FP_OP_INPUT_SRC_POSITION 0x0 -# define NV40_FP_OP_INPUT_SRC_COL0 0x1 -# define NV40_FP_OP_INPUT_SRC_COL1 0x2 -# define NV40_FP_OP_INPUT_SRC_FOGC 0x3 -# define NV40_FP_OP_INPUT_SRC_TC0 0x4 -# define NV40_FP_OP_INPUT_SRC_TC(n) (0x4 + n) -# define NV40_FP_OP_INPUT_SRC_FACING 0xE -#define NV40_FP_OP_TEX_UNIT_SHIFT 17 -#define NV40_FP_OP_TEX_UNIT_MASK (0xF << 17) -#define NV40_FP_OP_PRECISION_SHIFT 22 -#define NV40_FP_OP_PRECISION_MASK (3 << 22) -# define NV40_FP_PRECISION_FP32 0 -# define NV40_FP_PRECISION_FP16 1 -# define NV40_FP_PRECISION_FX12 2 -#define NV40_FP_OP_OPCODE_SHIFT 24 -#define NV40_FP_OP_OPCODE_MASK (0x3F << 24) -# define NV40_FP_OP_OPCODE_NOP 0x00 -# define NV40_FP_OP_OPCODE_MOV 0x01 -# define NV40_FP_OP_OPCODE_MUL 0x02 -# define NV40_FP_OP_OPCODE_ADD 0x03 -# define NV40_FP_OP_OPCODE_MAD 0x04 -# define NV40_FP_OP_OPCODE_DP3 0x05 -# define NV40_FP_OP_OPCODE_DP4 0x06 -# define NV40_FP_OP_OPCODE_DST 0x07 -# define NV40_FP_OP_OPCODE_MIN 0x08 -# define NV40_FP_OP_OPCODE_MAX 0x09 -# define NV40_FP_OP_OPCODE_SLT 0x0A -# define NV40_FP_OP_OPCODE_SGE 0x0B -# define NV40_FP_OP_OPCODE_SLE 0x0C -# define NV40_FP_OP_OPCODE_SGT 0x0D -# define NV40_FP_OP_OPCODE_SNE 0x0E -# define NV40_FP_OP_OPCODE_SEQ 0x0F -# define NV40_FP_OP_OPCODE_FRC 0x10 -# define NV40_FP_OP_OPCODE_FLR 0x11 -# define NV40_FP_OP_OPCODE_KIL 0x12 -# define NV40_FP_OP_OPCODE_PK4B 0x13 -# define NV40_FP_OP_OPCODE_UP4B 0x14 -/* DDX/DDY can only write to XY */ -# define NV40_FP_OP_OPCODE_DDX 0x15 -# define NV40_FP_OP_OPCODE_DDY 0x16 -# define NV40_FP_OP_OPCODE_TEX 0x17 -# define NV40_FP_OP_OPCODE_TXP 0x18 -# define NV40_FP_OP_OPCODE_TXD 0x19 -# define NV40_FP_OP_OPCODE_RCP 0x1A -# define NV40_FP_OP_OPCODE_EX2 0x1C -# define NV40_FP_OP_OPCODE_LG2 0x1D -# define NV40_FP_OP_OPCODE_STR 0x20 -# define NV40_FP_OP_OPCODE_SFL 0x21 -# define NV40_FP_OP_OPCODE_COS 0x22 -# define NV40_FP_OP_OPCODE_SIN 0x23 -# define NV40_FP_OP_OPCODE_PK2H 0x24 -# define NV40_FP_OP_OPCODE_UP2H 0x25 -# define NV40_FP_OP_OPCODE_PK4UB 0x27 -# define NV40_FP_OP_OPCODE_UP4UB 0x28 -# define NV40_FP_OP_OPCODE_PK2US 0x29 -# define NV40_FP_OP_OPCODE_UP2US 0x2A -# define NV40_FP_OP_OPCODE_DP2A 0x2E -# define NV40_FP_OP_OPCODE_TXL 0x2F -# define NV40_FP_OP_OPCODE_TXB 0x31 -# define NV40_FP_OP_OPCODE_DIV 0x3A -# define NV40_FP_OP_OPCODE_UNK_LIT 0x3C -/* The use of these instructions appears to be indicated by bit 31 of DWORD 2.*/ -# define NV40_FP_OP_BRA_OPCODE_BRK 0x0 -# define NV40_FP_OP_BRA_OPCODE_CAL 0x1 -# define NV40_FP_OP_BRA_OPCODE_IF 0x2 -# define NV40_FP_OP_BRA_OPCODE_LOOP 0x3 -# define NV40_FP_OP_BRA_OPCODE_REP 0x4 -# define NV40_FP_OP_BRA_OPCODE_RET 0x5 -#define NV40_FP_OP_OUT_SAT (1 << 31) - -/* high order bits of SRC0 */ -#define NV40_FP_OP_OUT_ABS (1 << 29) -#define NV40_FP_OP_COND_SWZ_W_SHIFT 27 -#define NV40_FP_OP_COND_SWZ_W_MASK (3 << 27) -#define NV40_FP_OP_COND_SWZ_Z_SHIFT 25 -#define NV40_FP_OP_COND_SWZ_Z_MASK (3 << 25) -#define NV40_FP_OP_COND_SWZ_Y_SHIFT 23 -#define NV40_FP_OP_COND_SWZ_Y_MASK (3 << 23) -#define NV40_FP_OP_COND_SWZ_X_SHIFT 21 -#define NV40_FP_OP_COND_SWZ_X_MASK (3 << 21) -#define NV40_FP_OP_COND_SWZ_ALL_SHIFT 21 -#define NV40_FP_OP_COND_SWZ_ALL_MASK (0xFF << 21) -#define NV40_FP_OP_COND_SHIFT 18 -#define NV40_FP_OP_COND_MASK (0x07 << 18) -# define NV40_FP_OP_COND_FL 0 -# define NV40_FP_OP_COND_LT 1 -# define NV40_FP_OP_COND_EQ 2 -# define NV40_FP_OP_COND_LE 3 -# define NV40_FP_OP_COND_GT 4 -# define NV40_FP_OP_COND_NE 5 -# define NV40_FP_OP_COND_GE 6 -# define NV40_FP_OP_COND_TR 7 - -/* high order bits of SRC1 */ -#define NV40_FP_OP_OPCODE_IS_BRANCH (1<<31) -#define NV40_FP_OP_DST_SCALE_SHIFT 28 -#define NV40_FP_OP_DST_SCALE_MASK (3 << 28) -#define NV40_FP_OP_DST_SCALE_1X 0 -#define NV40_FP_OP_DST_SCALE_2X 1 -#define NV40_FP_OP_DST_SCALE_4X 2 -#define NV40_FP_OP_DST_SCALE_8X 3 -#define NV40_FP_OP_DST_SCALE_INV_2X 5 -#define NV40_FP_OP_DST_SCALE_INV_4X 6 -#define NV40_FP_OP_DST_SCALE_INV_8X 7 - -/* SRC1 LOOP */ -#define NV40_FP_OP_LOOP_INCR_SHIFT 19 -#define NV40_FP_OP_LOOP_INCR_MASK (0xFF << 19) -#define NV40_FP_OP_LOOP_INDEX_SHIFT 10 -#define NV40_FP_OP_LOOP_INDEX_MASK (0xFF << 10) -#define NV40_FP_OP_LOOP_COUNT_SHIFT 2 -#define NV40_FP_OP_LOOP_COUNT_MASK (0xFF << 2) - -/* SRC1 IF */ -#define NV40_FP_OP_ELSE_ID_SHIFT 2 -#define NV40_FP_OP_ELSE_ID_MASK (0xFF << 2) - -/* SRC1 CAL */ -#define NV40_FP_OP_IADDR_SHIFT 2 -#define NV40_FP_OP_IADDR_MASK (0xFF << 2) - -/* SRC1 REP - * I have no idea why there are 3 count values here.. but they - * have always been filled with the same value in my tests so - * far.. - */ -#define NV40_FP_OP_REP_COUNT1_SHIFT 2 -#define NV40_FP_OP_REP_COUNT1_MASK (0xFF << 2) -#define NV40_FP_OP_REP_COUNT2_SHIFT 10 -#define NV40_FP_OP_REP_COUNT2_MASK (0xFF << 10) -#define NV40_FP_OP_REP_COUNT3_SHIFT 19 -#define NV40_FP_OP_REP_COUNT3_MASK (0xFF << 19) - -/* SRC2 REP/IF */ -#define NV40_FP_OP_END_ID_SHIFT 2 -#define NV40_FP_OP_END_ID_MASK (0xFF << 2) - -// SRC2 high-order -#define NV40_FP_OP_INDEX_INPUT (1 << 30) -#define NV40_FP_OP_ADDR_INDEX_SHIFT 19 -#define NV40_FP_OP_ADDR_INDEX_MASK (0xF << 19) - -//== Register selection == -#define NV40_FP_REG_TYPE_SHIFT 0 -#define NV40_FP_REG_TYPE_MASK (3 << 0) -# define NV40_FP_REG_TYPE_TEMP 0 -# define NV40_FP_REG_TYPE_INPUT 1 -# define NV40_FP_REG_TYPE_CONST 2 -#define NV40_FP_REG_SRC_SHIFT 2 -#define NV40_FP_REG_SRC_MASK (63 << 2) -#define NV40_FP_REG_SRC_HALF (1 << 8) -#define NV40_FP_REG_SWZ_ALL_SHIFT 9 -#define NV40_FP_REG_SWZ_ALL_MASK (255 << 9) -#define NV40_FP_REG_SWZ_X_SHIFT 9 -#define NV40_FP_REG_SWZ_X_MASK (3 << 9) -#define NV40_FP_REG_SWZ_Y_SHIFT 11 -#define NV40_FP_REG_SWZ_Y_MASK (3 << 11) -#define NV40_FP_REG_SWZ_Z_SHIFT 13 -#define NV40_FP_REG_SWZ_Z_MASK (3 << 13) -#define NV40_FP_REG_SWZ_W_SHIFT 15 -#define NV40_FP_REG_SWZ_W_MASK (3 << 15) -# define NV40_FP_SWIZZLE_X 0 -# define NV40_FP_SWIZZLE_Y 1 -# define NV40_FP_SWIZZLE_Z 2 -# define NV40_FP_SWIZZLE_W 3 -#define NV40_FP_REG_NEGATE (1 << 17) - -#ifndef NV40_SHADER_NO_FUCKEDNESS -#define NV40SR_NONE 0 -#define NV40SR_OUTPUT 1 -#define NV40SR_INPUT 2 -#define NV40SR_TEMP 3 -#define NV40SR_CONST 4 - -struct nv40_sreg { - int type; - int index; - - int dst_scale; - - int negate; - int abs; - int swz[4]; - - int cc_update; - int cc_update_reg; - int cc_test; - int cc_test_reg; - int cc_swz[4]; -}; - -static INLINE struct nv40_sreg -nv40_sr(int type, int index) -{ - struct nv40_sreg temp = { - .type = type, - .index = index, - .dst_scale = DEF_SCALE, - .abs = 0, - .negate = 0, - .swz = { 0, 1, 2, 3 }, - .cc_update = 0, - .cc_update_reg = 0, - .cc_test = DEF_CTEST, - .cc_test_reg = 0, - .cc_swz = { 0, 1, 2, 3 }, - }; - return temp; -} - -static INLINE struct nv40_sreg -nv40_sr_swz(struct nv40_sreg src, int x, int y, int z, int w) -{ - struct nv40_sreg dst = src; - - dst.swz[SWZ_X] = src.swz[x]; - dst.swz[SWZ_Y] = src.swz[y]; - dst.swz[SWZ_Z] = src.swz[z]; - dst.swz[SWZ_W] = src.swz[w]; - return dst; -} - -static INLINE struct nv40_sreg -nv40_sr_neg(struct nv40_sreg src) -{ - src.negate = !src.negate; - return src; -} - -static INLINE struct nv40_sreg -nv40_sr_abs(struct nv40_sreg src) -{ - src.abs = 1; - return src; -} - -static INLINE struct nv40_sreg -nv40_sr_scale(struct nv40_sreg src, int scale) -{ - src.dst_scale = scale; - return src; -} #endif -#endif diff --git a/src/gallium/drivers/nv40/nv40_vertprog.c b/src/gallium/drivers/nv40/nv40_vertprog.c index a199f0766e..752cd0d1b3 100644 --- a/src/gallium/drivers/nv40/nv40_vertprog.c +++ b/src/gallium/drivers/nv40/nv40_vertprog.c @@ -34,9 +34,9 @@ #define DEF_CTEST 0 #include "nv40_shader.h" -#define swz(s,x,y,z,w) nv40_sr_swz((s), SWZ_##x, SWZ_##y, SWZ_##z, SWZ_##w) -#define neg(s) nv40_sr_neg((s)) -#define abs(s) nv40_sr_abs((s)) +#define swz(s,x,y,z,w) nvfx_sr_swz((s), SWZ_##x, SWZ_##y, SWZ_##z, SWZ_##w) +#define neg(s) nvfx_sr_neg((s)) +#define abs(s) nvfx_sr_abs((s)) #define NV40_VP_INST_DEST_CLIP(n) ((~0 - 6) + (n)) @@ -47,17 +47,17 @@ struct nv40_vpc { unsigned r_temps; unsigned r_temps_discard; - struct nv40_sreg r_result[PIPE_MAX_SHADER_OUTPUTS]; - struct nv40_sreg *r_address; - struct nv40_sreg *r_temp; + struct nvfx_sreg r_result[PIPE_MAX_SHADER_OUTPUTS]; + struct nvfx_sreg *r_address; + struct nvfx_sreg *r_temp; - struct nv40_sreg *imm; + struct nvfx_sreg *imm; unsigned nr_imm; unsigned hpos_idx; }; -static struct nv40_sreg +static struct nvfx_sreg temp(struct nv40_vpc *vpc) { int idx = ffs(~vpc->r_temps) - 1; @@ -65,12 +65,12 @@ temp(struct nv40_vpc *vpc) if (idx < 0) { NOUVEAU_ERR("out of temps!!\n"); assert(0); - return nv40_sr(NV40SR_TEMP, 0); + return nvfx_sr(NVFXSR_TEMP, 0); } vpc->r_temps |= (1 << idx); vpc->r_temps_discard |= (1 << idx); - return nv40_sr(NV40SR_TEMP, idx); + return nvfx_sr(NVFXSR_TEMP, idx); } static INLINE void @@ -80,7 +80,7 @@ release_temps(struct nv40_vpc *vpc) vpc->r_temps_discard = 0; } -static struct nv40_sreg +static struct nvfx_sreg constant(struct nv40_vpc *vpc, int pipe, float x, float y, float z, float w) { struct nvfx_vertex_program *vp = vpc->vp; @@ -90,7 +90,7 @@ constant(struct nv40_vpc *vpc, int pipe, float x, float y, float z, float w) if (pipe >= 0) { for (idx = 0; idx < vp->nr_consts; idx++) { if (vp->consts[idx].index == pipe) - return nv40_sr(NV40SR_CONST, idx); + return nvfx_sr(NVFXSR_CONST, idx); } } @@ -103,37 +103,37 @@ constant(struct nv40_vpc *vpc, int pipe, float x, float y, float z, float w) vpd->value[1] = y; vpd->value[2] = z; vpd->value[3] = w; - return nv40_sr(NV40SR_CONST, idx); + return nvfx_sr(NVFXSR_CONST, idx); } #define arith(cc,s,o,d,m,s0,s1,s2) \ - nv40_vp_arith((cc), (s), NV40_VP_INST_##o, (d), (m), (s0), (s1), (s2)) + nv40_vp_arith((cc), NVFX_VP_INST_SLOT_##s, NVFX_VP_INST_##s##_OP_##o, (d), (m), (s0), (s1), (s2)) static void -emit_src(struct nv40_vpc *vpc, uint32_t *hw, int pos, struct nv40_sreg src) +emit_src(struct nv40_vpc *vpc, uint32_t *hw, int pos, struct nvfx_sreg src) { struct nvfx_vertex_program *vp = vpc->vp; uint32_t sr = 0; switch (src.type) { - case NV40SR_TEMP: + case NVFXSR_TEMP: sr |= (NV40_VP_SRC_REG_TYPE_TEMP << NV40_VP_SRC_REG_TYPE_SHIFT); sr |= (src.index << NV40_VP_SRC_TEMP_SRC_SHIFT); break; - case NV40SR_INPUT: + case NVFXSR_INPUT: sr |= (NV40_VP_SRC_REG_TYPE_INPUT << NV40_VP_SRC_REG_TYPE_SHIFT); vp->ir |= (1 << src.index); hw[1] |= (src.index << NV40_VP_INST_INPUT_SRC_SHIFT); break; - case NV40SR_CONST: + case NVFXSR_CONST: sr |= (NV40_VP_SRC_REG_TYPE_CONST << NV40_VP_SRC_REG_TYPE_SHIFT); assert(vpc->vpi->const_index == -1 || vpc->vpi->const_index == src.index); vpc->vpi->const_index = src.index; break; - case NV40SR_NONE: + case NVFXSR_NONE: sr |= (NV40_VP_SRC_REG_TYPE_INPUT << NV40_VP_SRC_REG_TYPE_SHIFT); break; @@ -174,12 +174,12 @@ emit_src(struct nv40_vpc *vpc, uint32_t *hw, int pos, struct nv40_sreg src) } static void -emit_dst(struct nv40_vpc *vpc, uint32_t *hw, int slot, struct nv40_sreg dst) +emit_dst(struct nv40_vpc *vpc, uint32_t *hw, int slot, struct nvfx_sreg dst) { struct nvfx_vertex_program *vp = vpc->vp; switch (dst.type) { - case NV40SR_TEMP: + case NVFXSR_TEMP: hw[3] |= NV40_VP_INST_DEST_MASK; if (slot == 0) { hw[0] |= (dst.index << @@ -189,7 +189,7 @@ emit_dst(struct nv40_vpc *vpc, uint32_t *hw, int slot, struct nv40_sreg dst) NV40_VP_INST_SCA_DEST_TEMP_SHIFT); } break; - case NV40SR_OUTPUT: + case NVFXSR_OUTPUT: switch (dst.index) { case NV40_VP_INST_DEST_COL0 : vp->or |= (1 << 0); break; case NV40_VP_INST_DEST_COL1 : vp->or |= (1 << 1); break; @@ -255,9 +255,9 @@ emit_dst(struct nv40_vpc *vpc, uint32_t *hw, int slot, struct nv40_sreg dst) static void nv40_vp_arith(struct nv40_vpc *vpc, int slot, int op, - struct nv40_sreg dst, int mask, - struct nv40_sreg s0, struct nv40_sreg s1, - struct nv40_sreg s2) + struct nvfx_sreg dst, int mask, + struct nvfx_sreg s0, struct nvfx_sreg s1, + struct nvfx_sreg s2) { struct nvfx_vertex_program *vp = vpc->vp; uint32_t *hw; @@ -269,7 +269,7 @@ nv40_vp_arith(struct nv40_vpc *vpc, int slot, int op, hw = vpc->vpi->data; - hw[0] |= (NV40_VP_INST_COND_TR << NV40_VP_INST_COND_SHIFT); + hw[0] |= (NVFX_VP_INST_COND_TR << NV40_VP_INST_COND_SHIFT); hw[0] |= ((0 << NV40_VP_INST_COND_SWZ_X_SHIFT) | (1 << NV40_VP_INST_COND_SWZ_Y_SHIFT) | (2 << NV40_VP_INST_COND_SWZ_Z_SHIFT) | @@ -291,13 +291,13 @@ nv40_vp_arith(struct nv40_vpc *vpc, int slot, int op, emit_src(vpc, hw, 2, s2); } -static INLINE struct nv40_sreg +static INLINE struct nvfx_sreg tgsi_src(struct nv40_vpc *vpc, const struct tgsi_full_src_register *fsrc) { - struct nv40_sreg src; + struct nvfx_sreg src; switch (fsrc->Register.File) { case TGSI_FILE_INPUT: - src = nv40_sr(NV40SR_INPUT, fsrc->Register.Index); + src = nvfx_sr(NVFXSR_INPUT, fsrc->Register.Index); break; case TGSI_FILE_CONSTANT: src = constant(vpc, fsrc->Register.Index, 0, 0, 0, 0); @@ -322,9 +322,9 @@ tgsi_src(struct nv40_vpc *vpc, const struct tgsi_full_src_register *fsrc) { return src; } -static INLINE struct nv40_sreg +static INLINE struct nvfx_sreg tgsi_dst(struct nv40_vpc *vpc, const struct tgsi_full_dst_register *fdst) { - struct nv40_sreg dst; + struct nvfx_sreg dst; switch (fdst->Register.File) { case TGSI_FILE_OUTPUT: @@ -358,10 +358,10 @@ tgsi_mask(uint tgsi) static boolean src_native_swz(struct nv40_vpc *vpc, const struct tgsi_full_src_register *fsrc, - struct nv40_sreg *src) + struct nvfx_sreg *src) { - const struct nv40_sreg none = nv40_sr(NV40SR_NONE, 0); - struct nv40_sreg tgsi = tgsi_src(vpc, fsrc); + const struct nvfx_sreg none = nvfx_sr(NVFXSR_NONE, 0); + struct nvfx_sreg tgsi = tgsi_src(vpc, fsrc); uint mask = 0; uint c; @@ -384,7 +384,7 @@ src_native_swz(struct nv40_vpc *vpc, const struct tgsi_full_src_register *fsrc, *src = temp(vpc); if (mask) - arith(vpc, 0, OP_MOV, *src, mask, tgsi, none, none); + arith(vpc, VEC, MOV, *src, mask, tgsi, none, none); return FALSE; } @@ -393,8 +393,8 @@ static boolean nv40_vertprog_parse_instruction(struct nv40_vpc *vpc, const struct tgsi_full_instruction *finst) { - struct nv40_sreg src[3], dst, tmp; - struct nv40_sreg none = nv40_sr(NV40SR_NONE, 0); + struct nvfx_sreg src[3], dst, tmp; + struct nvfx_sreg none = nvfx_sr(NVFXSR_NONE, 0); int mask; int ai = -1, ci = -1, ii = -1; int i; @@ -434,7 +434,7 @@ nv40_vertprog_parse_instruction(struct nv40_vpc *vpc, src[i] = tgsi_src(vpc, fsrc); } else { src[i] = temp(vpc); - arith(vpc, 0, OP_MOV, src[i], MASK_ALL, + arith(vpc, VEC, MOV, src[i], MASK_ALL, tgsi_src(vpc, fsrc), none, none); } break; @@ -445,7 +445,7 @@ nv40_vertprog_parse_instruction(struct nv40_vpc *vpc, src[i] = tgsi_src(vpc, fsrc); } else { src[i] = temp(vpc); - arith(vpc, 0, OP_MOV, src[i], MASK_ALL, + arith(vpc, VEC, MOV, src[i], MASK_ALL, tgsi_src(vpc, fsrc), none, none); } break; @@ -456,7 +456,7 @@ nv40_vertprog_parse_instruction(struct nv40_vpc *vpc, src[i] = tgsi_src(vpc, fsrc); } else { src[i] = temp(vpc); - arith(vpc, 0, OP_MOV, src[i], MASK_ALL, + arith(vpc, VEC, MOV, src[i], MASK_ALL, tgsi_src(vpc, fsrc), none, none); } break; @@ -474,93 +474,93 @@ nv40_vertprog_parse_instruction(struct nv40_vpc *vpc, switch (finst->Instruction.Opcode) { case TGSI_OPCODE_ABS: - arith(vpc, 0, OP_MOV, dst, mask, abs(src[0]), none, none); + arith(vpc, VEC, MOV, dst, mask, abs(src[0]), none, none); break; case TGSI_OPCODE_ADD: - arith(vpc, 0, OP_ADD, dst, mask, src[0], none, src[1]); + arith(vpc, VEC, ADD, dst, mask, src[0], none, src[1]); break; case TGSI_OPCODE_ARL: - arith(vpc, 0, OP_ARL, dst, mask, src[0], none, none); + arith(vpc, VEC, ARL, dst, mask, src[0], none, none); break; case TGSI_OPCODE_DP3: - arith(vpc, 0, OP_DP3, dst, mask, src[0], src[1], none); + arith(vpc, VEC, DP3, dst, mask, src[0], src[1], none); break; case TGSI_OPCODE_DP4: - arith(vpc, 0, OP_DP4, dst, mask, src[0], src[1], none); + arith(vpc, VEC, DP4, dst, mask, src[0], src[1], none); break; case TGSI_OPCODE_DPH: - arith(vpc, 0, OP_DPH, dst, mask, src[0], src[1], none); + arith(vpc, VEC, DPH, dst, mask, src[0], src[1], none); break; case TGSI_OPCODE_DST: - arith(vpc, 0, OP_DST, dst, mask, src[0], src[1], none); + arith(vpc, VEC, DST, dst, mask, src[0], src[1], none); break; case TGSI_OPCODE_EX2: - arith(vpc, 1, OP_EX2, dst, mask, none, none, src[0]); + arith(vpc, SCA, EX2, dst, mask, none, none, src[0]); break; case TGSI_OPCODE_EXP: - arith(vpc, 1, OP_EXP, dst, mask, none, none, src[0]); + arith(vpc, SCA, EXP, dst, mask, none, none, src[0]); break; case TGSI_OPCODE_FLR: - arith(vpc, 0, OP_FLR, dst, mask, src[0], none, none); + arith(vpc, VEC, FLR, dst, mask, src[0], none, none); break; case TGSI_OPCODE_FRC: - arith(vpc, 0, OP_FRC, dst, mask, src[0], none, none); + arith(vpc, VEC, FRC, dst, mask, src[0], none, none); break; case TGSI_OPCODE_LG2: - arith(vpc, 1, OP_LG2, dst, mask, none, none, src[0]); + arith(vpc, SCA, LG2, dst, mask, none, none, src[0]); break; case TGSI_OPCODE_LIT: - arith(vpc, 1, OP_LIT, dst, mask, none, none, src[0]); + arith(vpc, SCA, LIT, dst, mask, none, none, src[0]); break; case TGSI_OPCODE_LOG: - arith(vpc, 1, OP_LOG, dst, mask, none, none, src[0]); + arith(vpc, SCA, LOG, dst, mask, none, none, src[0]); break; case TGSI_OPCODE_MAD: - arith(vpc, 0, OP_MAD, dst, mask, src[0], src[1], src[2]); + arith(vpc, VEC, MAD, dst, mask, src[0], src[1], src[2]); break; case TGSI_OPCODE_MAX: - arith(vpc, 0, OP_MAX, dst, mask, src[0], src[1], none); + arith(vpc, VEC, MAX, dst, mask, src[0], src[1], none); break; case TGSI_OPCODE_MIN: - arith(vpc, 0, OP_MIN, dst, mask, src[0], src[1], none); + arith(vpc, VEC, MIN, dst, mask, src[0], src[1], none); break; case TGSI_OPCODE_MOV: - arith(vpc, 0, OP_MOV, dst, mask, src[0], none, none); + arith(vpc, VEC, MOV, dst, mask, src[0], none, none); break; case TGSI_OPCODE_MUL: - arith(vpc, 0, OP_MUL, dst, mask, src[0], src[1], none); + arith(vpc, VEC, MUL, dst, mask, src[0], src[1], none); break; case TGSI_OPCODE_POW: tmp = temp(vpc); - arith(vpc, 1, OP_LG2, tmp, MASK_X, none, none, + arith(vpc, SCA, LG2, tmp, MASK_X, none, none, swz(src[0], X, X, X, X)); - arith(vpc, 0, OP_MUL, tmp, MASK_X, swz(tmp, X, X, X, X), + arith(vpc, VEC, MUL, tmp, MASK_X, swz(tmp, X, X, X, X), swz(src[1], X, X, X, X), none); - arith(vpc, 1, OP_EX2, dst, mask, none, none, + arith(vpc, SCA, EX2, dst, mask, none, none, swz(tmp, X, X, X, X)); break; case TGSI_OPCODE_RCP: - arith(vpc, 1, OP_RCP, dst, mask, none, none, src[0]); + arith(vpc, SCA, RCP, dst, mask, none, none, src[0]); break; case TGSI_OPCODE_RET: break; case TGSI_OPCODE_RSQ: - arith(vpc, 1, OP_RSQ, dst, mask, none, none, abs(src[0])); + arith(vpc, SCA, RSQ, dst, mask, none, none, abs(src[0])); break; case TGSI_OPCODE_SGE: - arith(vpc, 0, OP_SGE, dst, mask, src[0], src[1], none); + arith(vpc, VEC, SGE, dst, mask, src[0], src[1], none); break; case TGSI_OPCODE_SLT: - arith(vpc, 0, OP_SLT, dst, mask, src[0], src[1], none); + arith(vpc, VEC, SLT, dst, mask, src[0], src[1], none); break; case TGSI_OPCODE_SUB: - arith(vpc, 0, OP_ADD, dst, mask, src[0], none, neg(src[1])); + arith(vpc, VEC, ADD, dst, mask, src[0], none, neg(src[1])); break; case TGSI_OPCODE_XPD: tmp = temp(vpc); - arith(vpc, 0, OP_MUL, tmp, mask, + arith(vpc, VEC, MUL, tmp, mask, swz(src[0], Z, X, Y, Y), swz(src[1], Y, Z, X, X), none); - arith(vpc, 0, OP_MAD, dst, (mask & ~MASK_W), + arith(vpc, VEC, MAD, dst, (mask & ~MASK_W), swz(src[0], Y, Z, X, X), swz(src[1], Z, X, Y, Y), neg(tmp)); break; @@ -630,7 +630,7 @@ nv40_vertprog_parse_decl_output(struct nv40_vpc *vpc, return FALSE; } - vpc->r_result[idx] = nv40_sr(NV40SR_OUTPUT, hw); + vpc->r_result[idx] = nvfx_sr(NVFXSR_OUTPUT, hw); return TRUE; } @@ -702,18 +702,18 @@ nv40_vertprog_prepare(struct nv40_vpc *vpc) tgsi_parse_free(&p); if (nr_imm) { - vpc->imm = CALLOC(nr_imm, sizeof(struct nv40_sreg)); + vpc->imm = CALLOC(nr_imm, sizeof(struct nvfx_sreg)); assert(vpc->imm); } if (++high_temp) { - vpc->r_temp = CALLOC(high_temp, sizeof(struct nv40_sreg)); + vpc->r_temp = CALLOC(high_temp, sizeof(struct nvfx_sreg)); for (i = 0; i < high_temp; i++) vpc->r_temp[i] = temp(vpc); } if (++high_addr) { - vpc->r_address = CALLOC(high_addr, sizeof(struct nv40_sreg)); + vpc->r_address = CALLOC(high_addr, sizeof(struct nvfx_sreg)); for (i = 0; i < high_addr; i++) vpc->r_address[i] = temp(vpc); } @@ -728,7 +728,7 @@ nv40_vertprog_translate(struct nvfx_context *nvfx, { struct tgsi_parse_context parse; struct nv40_vpc *vpc = NULL; - struct nv40_sreg none = nv40_sr(NV40SR_NONE, 0); + struct nvfx_sreg none = nvfx_sr(NVFXSR_NONE, 0); int i; vpc = CALLOC(1, sizeof(struct nv40_vpc)); @@ -785,24 +785,24 @@ nv40_vertprog_translate(struct nvfx_context *nvfx, } /* Write out HPOS if it was redirected to a temp earlier */ - if (vpc->r_result[vpc->hpos_idx].type != NV40SR_OUTPUT) { - struct nv40_sreg hpos = nv40_sr(NV40SR_OUTPUT, + if (vpc->r_result[vpc->hpos_idx].type != NVFXSR_OUTPUT) { + struct nvfx_sreg hpos = nvfx_sr(NVFXSR_OUTPUT, NV40_VP_INST_DEST_POS); - struct nv40_sreg htmp = vpc->r_result[vpc->hpos_idx]; + struct nvfx_sreg htmp = vpc->r_result[vpc->hpos_idx]; - arith(vpc, 0, OP_MOV, hpos, MASK_ALL, htmp, none, none); + arith(vpc, VEC, MOV, hpos, MASK_ALL, htmp, none, none); } /* Insert code to handle user clip planes */ for (i = 0; i < vp->ucp.nr; i++) { - struct nv40_sreg cdst = nv40_sr(NV40SR_OUTPUT, + struct nvfx_sreg cdst = nvfx_sr(NVFXSR_OUTPUT, NV40_VP_INST_DEST_CLIP(i)); - struct nv40_sreg ceqn = constant(vpc, -1, + struct nvfx_sreg ceqn = constant(vpc, -1, nvfx->clip.ucp[i][0], nvfx->clip.ucp[i][1], nvfx->clip.ucp[i][2], nvfx->clip.ucp[i][3]); - struct nv40_sreg htmp = vpc->r_result[vpc->hpos_idx]; + struct nvfx_sreg htmp = vpc->r_result[vpc->hpos_idx]; unsigned mask; switch (i) { @@ -814,10 +814,10 @@ nv40_vertprog_translate(struct nvfx_context *nvfx, goto out_err; } - arith(vpc, 0, OP_DP4, cdst, mask, htmp, ceqn, none); + arith(vpc, VEC, DP4, cdst, mask, htmp, ceqn, none); } - vp->insns[vp->nr_insns - 1].data[3] |= NV40_VP_INST_LAST; + vp->insns[vp->nr_insns - 1].data[3] |= NVFX_VP_INST_LAST; vp->translated = TRUE; out_err: tgsi_parse_free(&parse); diff --git a/src/gallium/drivers/nvfx/nvfx_shader.h b/src/gallium/drivers/nvfx/nvfx_shader.h new file mode 100644 index 0000000000..191131a40a --- /dev/null +++ b/src/gallium/drivers/nvfx/nvfx_shader.h @@ -0,0 +1,407 @@ +#ifndef __NVFX_SHADER_H__ +#define __NVFX_SHADER_H__ + +/* this will resolve to either the NV30 or the NV40 version + * depending on the current hardware */ +/* unusual, but very fast and compact method */ +#define NVFX_VP(c) ((NV30_VP_##c) + (nvfx->is_nv4x & ((NV40_VP_##c) - (NV30_VP_##c)))) + +#define NVFX_VP_INST_SLOT_VEC 0 +#define NVFX_VP_INST_SLOT_SCA 1 + +#define NVFX_VP_INST_COND_FL 0 /* guess */ +#define NVFX_VP_INST_COND_LT 1 +#define NVFX_VP_INST_COND_EQ 2 +#define NVFX_VP_INST_COND_LE 3 +#define NVFX_VP_INST_COND_GT 4 +#define NVFX_VP_INST_COND_NE 5 +#define NVFX_VP_INST_COND_GE 6 +#define NVFX_VP_INST_COND_TR 7 /* guess */ + +#define NVFX_VP_INST_IN_POS 0 /* These seem to match the bindings specified in */ +#define NVFX_VP_INST_IN_WEIGHT 1 /* the ARB_v_p spec (2.14.3.1) */ +#define NVFX_VP_INST_IN_NORMAL 2 +#define NVFX_VP_INST_IN_COL0 3 /* Should probably confirm them all though */ +#define NVFX_VP_INST_IN_COL1 4 +#define NVFX_VP_INST_IN_FOGC 5 +#define NVFX_VP_INST_IN_TC0 8 +#define NVFX_VP_INST_IN_TC(n) (8+n) + +#define NVFX_VP_INST_SCA_OP_NOP 0x00 +#define NVFX_VP_INST_SCA_OP_MOV 0x01 +#define NVFX_VP_INST_SCA_OP_RCP 0x02 +#define NVFX_VP_INST_SCA_OP_RCC 0x03 +#define NVFX_VP_INST_SCA_OP_RSQ 0x04 +#define NVFX_VP_INST_SCA_OP_EXP 0x05 +#define NVFX_VP_INST_SCA_OP_LOG 0x06 +#define NVFX_VP_INST_SCA_OP_LIT 0x07 +#define NVFX_VP_INST_SCA_OP_BRA 0x09 +#define NVFX_VP_INST_SCA_OP_CAL 0x0B +#define NVFX_VP_INST_SCA_OP_RET 0x0C +#define NVFX_VP_INST_SCA_OP_LG2 0x0D +#define NVFX_VP_INST_SCA_OP_EX2 0x0E +#define NVFX_VP_INST_SCA_OP_SIN 0x0F +#define NVFX_VP_INST_SCA_OP_COS 0x10 + +#define NV40_VP_INST_SCA_OP_PUSHA 0x13 +#define NV40_VP_INST_SCA_OP_POPA 0x14 + +#define NVFX_VP_INST_VEC_OP_NOP 0x00 +#define NVFX_VP_INST_VEC_OP_MOV 0x01 +#define NVFX_VP_INST_VEC_OP_MUL 0x02 +#define NVFX_VP_INST_VEC_OP_ADD 0x03 +#define NVFX_VP_INST_VEC_OP_MAD 0x04 +#define NVFX_VP_INST_VEC_OP_DP3 0x05 +#define NVFX_VP_INST_VEC_OP_DPH 0x06 +#define NVFX_VP_INST_VEC_OP_DP4 0x07 +#define NVFX_VP_INST_VEC_OP_DST 0x08 +#define NVFX_VP_INST_VEC_OP_MIN 0x09 +#define NVFX_VP_INST_VEC_OP_MAX 0x0A +#define NVFX_VP_INST_VEC_OP_SLT 0x0B +#define NVFX_VP_INST_VEC_OP_SGE 0x0C +#define NVFX_VP_INST_VEC_OP_ARL 0x0D +#define NVFX_VP_INST_VEC_OP_FRC 0x0E +#define NVFX_VP_INST_VEC_OP_FLR 0x0F +#define NVFX_VP_INST_VEC_OP_SEQ 0x10 +#define NVFX_VP_INST_VEC_OP_SFL 0x11 +#define NVFX_VP_INST_VEC_OP_SGT 0x12 +#define NVFX_VP_INST_VEC_OP_SLE 0x13 +#define NVFX_VP_INST_VEC_OP_SNE 0x14 +#define NVFX_VP_INST_VEC_OP_STR 0x15 +#define NVFX_VP_INST_VEC_OP_SSG 0x16 +#define NVFX_VP_INST_VEC_OP_ARR 0x17 +#define NVFX_VP_INST_VEC_OP_ARA 0x18 + +#define NV40_VP_INST_VEC_OP_TXL 0x19 + +/* DWORD 3 */ +#define NVFX_VP_INST_LAST (1 << 0) + +/* + * Each fragment program opcode appears to be comprised of 4 32-bit values. + * + * 0 - Opcode, output reg/mask, ATTRIB source + * 1 - Source 0 + * 2 - Source 1 + * 3 - Source 2 + * + * There appears to be no special difference between result regs and temp regs. + * result.color == R0.xyzw + * result.depth == R1.z + * When the fragprog contains instructions to write depth, NV30_TCL_PRIMITIVE_3D_UNK1D78=0 + * otherwise it is set to 1. + * + * Constants are inserted directly after the instruction that uses them. + * + * It appears that it's not possible to use two input registers in one + * instruction as the input sourcing is done in the instruction dword + * and not the source selection dwords. As such instructions such as: + * + * ADD result.color, fragment.color, fragment.texcoord[0]; + * + * must be split into two MOV's and then an ADD (nvidia does this) but + * I'm not sure why it's not just one MOV and then source the second input + * in the ADD instruction.. + * + * Negation of the full source is done with NV30_FP_REG_NEGATE, arbitrary + * negation requires multiplication with a const. + * + * Arbitrary swizzling is supported with the exception of SWIZZLE_ZERO/SWIZZLE_ONE + * The temp/result regs appear to be initialised to (0.0, 0.0, 0.0, 0.0) as SWIZZLE_ZERO + * is implemented simply by not writing to the relevant components of the destination. + * + * Conditional execution + * TODO + * + * Non-native instructions: + * LIT + * LRP - MAD+MAD + * SUB - ADD, negate second source + * RSQ - LG2 + EX2 + * POW - LG2 + MUL + EX2 + * SCS - COS + SIN + * XPD + * + * NV40 Looping + * Loops appear to be fairly expensive on NV40 at least, the proprietary + * driver goes to a lot of effort to avoid using the native looping + * instructions. If the total number of *executed* instructions between + * REP/ENDREP or LOOP/ENDLOOP is <=500, the driver will unroll the loop. + * The maximum loop count is 255. + * + */ + +//== Opcode / Destination selection == +#define NVFX_FP_OP_PROGRAM_END (1 << 0) +#define NVFX_FP_OP_OUT_REG_SHIFT 1 +#define NV30_FP_OP_OUT_REG_MASK (31 << 1) /* uncertain */ +#define NV40_FP_OP_OUT_REG_MASK (63 << 1) +/* Needs to be set when writing outputs to get expected result.. */ +#define NVFX_FP_OP_OUT_REG_HALF (1 << 7) +#define NVFX_FP_OP_COND_WRITE_ENABLE (1 << 8) +#define NVFX_FP_OP_OUTMASK_SHIFT 9 +#define NVFX_FP_OP_OUTMASK_MASK (0xF << 9) +# define NVFX_FP_OP_OUT_X (1<<9) +# define NVFX_FP_OP_OUT_Y (1<<10) +# define NVFX_FP_OP_OUT_Z (1<<11) +# define NVFX_FP_OP_OUT_W (1<<12) +/* Uncertain about these, especially the input_src values.. it's possible that + * they can be dynamically changed. + */ +#define NVFX_FP_OP_INPUT_SRC_SHIFT 13 +#define NVFX_FP_OP_INPUT_SRC_MASK (15 << 13) +# define NVFX_FP_OP_INPUT_SRC_POSITION 0x0 +# define NVFX_FP_OP_INPUT_SRC_COL0 0x1 +# define NVFX_FP_OP_INPUT_SRC_COL1 0x2 +# define NVFX_FP_OP_INPUT_SRC_FOGC 0x3 +# define NVFX_FP_OP_INPUT_SRC_TC0 0x4 +# define NVFX_FP_OP_INPUT_SRC_TC(n) (0x4 + n) +# define NV40_FP_OP_INPUT_SRC_FACING 0xE +#define NVFX_FP_OP_TEX_UNIT_SHIFT 17 +#define NVFX_FP_OP_TEX_UNIT_MASK (0xF << 17) /* guess */ +#define NVFX_FP_OP_PRECISION_SHIFT 22 +#define NVFX_FP_OP_PRECISION_MASK (3 << 22) +# define NVFX_FP_PRECISION_FP32 0 +# define NVFX_FP_PRECISION_FP16 1 +# define NVFX_FP_PRECISION_FX12 2 +#define NVFX_FP_OP_OPCODE_SHIFT 24 +#define NVFX_FP_OP_OPCODE_MASK (0x3F << 24) +/* NV30/NV40 fragment program opcodes */ +#define NVFX_FP_OP_OPCODE_NOP 0x00 +#define NVFX_FP_OP_OPCODE_MOV 0x01 +#define NVFX_FP_OP_OPCODE_MUL 0x02 +#define NVFX_FP_OP_OPCODE_ADD 0x03 +#define NVFX_FP_OP_OPCODE_MAD 0x04 +#define NVFX_FP_OP_OPCODE_DP3 0x05 +#define NVFX_FP_OP_OPCODE_DP4 0x06 +#define NVFX_FP_OP_OPCODE_DST 0x07 +#define NVFX_FP_OP_OPCODE_MIN 0x08 +#define NVFX_FP_OP_OPCODE_MAX 0x09 +#define NVFX_FP_OP_OPCODE_SLT 0x0A +#define NVFX_FP_OP_OPCODE_SGE 0x0B +#define NVFX_FP_OP_OPCODE_SLE 0x0C +#define NVFX_FP_OP_OPCODE_SGT 0x0D +#define NVFX_FP_OP_OPCODE_SNE 0x0E +#define NVFX_FP_OP_OPCODE_SEQ 0x0F +#define NVFX_FP_OP_OPCODE_FRC 0x10 +#define NVFX_FP_OP_OPCODE_FLR 0x11 +#define NVFX_FP_OP_OPCODE_KIL 0x12 +#define NVFX_FP_OP_OPCODE_PK4B 0x13 +#define NVFX_FP_OP_OPCODE_UP4B 0x14 +#define NVFX_FP_OP_OPCODE_DDX 0x15 /* can only write XY */ +#define NVFX_FP_OP_OPCODE_DDY 0x16 /* can only write XY */ +#define NVFX_FP_OP_OPCODE_TEX 0x17 +#define NVFX_FP_OP_OPCODE_TXP 0x18 +#define NVFX_FP_OP_OPCODE_TXD 0x19 +#define NVFX_FP_OP_OPCODE_RCP 0x1A +#define NVFX_FP_OP_OPCODE_EX2 0x1C +#define NVFX_FP_OP_OPCODE_LG2 0x1D +#define NVFX_FP_OP_OPCODE_STR 0x20 +#define NVFX_FP_OP_OPCODE_SFL 0x21 +#define NVFX_FP_OP_OPCODE_COS 0x22 +#define NVFX_FP_OP_OPCODE_SIN 0x23 +#define NVFX_FP_OP_OPCODE_PK2H 0x24 +#define NVFX_FP_OP_OPCODE_UP2H 0x25 +#define NVFX_FP_OP_OPCODE_PK4UB 0x27 +#define NVFX_FP_OP_OPCODE_UP4UB 0x28 +#define NVFX_FP_OP_OPCODE_PK2US 0x29 +#define NVFX_FP_OP_OPCODE_UP2US 0x2A +#define NVFX_FP_OP_OPCODE_DP2A 0x2E +#define NVFX_FP_OP_OPCODE_TXB 0x31 +#define NVFX_FP_OP_OPCODE_DIV 0x3A + +/* NV30 only fragment program opcodes */ +#define NVFX_FP_OP_OPCODE_RSQ_NV30 0x1B +#define NVFX_FP_OP_OPCODE_LIT_NV30 0x1E +#define NVFX_FP_OP_OPCODE_LRP_NV30 0x1F +#define NVFX_FP_OP_OPCODE_POW_NV30 0x26 +#define NVFX_FP_OP_OPCODE_RFL_NV30 0x36 + +/* NV40 only fragment program opcodes */ +#define NVFX_FP_OP_OPCODE_TXL_NV40 0x31 +/* The use of these instructions appears to be indicated by bit 31 of DWORD 2.*/ +#define NV40_FP_OP_BRA_OPCODE_BRK 0x0 +#define NV40_FP_OP_BRA_OPCODE_CAL 0x1 +#define NV40_FP_OP_BRA_OPCODE_IF 0x2 +#define NV40_FP_OP_BRA_OPCODE_LOOP 0x3 +#define NV40_FP_OP_BRA_OPCODE_REP 0x4 +#define NV40_FP_OP_BRA_OPCODE_RET 0x5 + +#define NVFX_FP_OP_OUT_SAT (1 << 31) + +/* high order bits of SRC0 */ +#define NVFX_FP_OP_OUT_ABS (1 << 29) +#define NVFX_FP_OP_COND_SWZ_W_SHIFT 27 +#define NVFX_FP_OP_COND_SWZ_W_MASK (3 << 27) +#define NVFX_FP_OP_COND_SWZ_Z_SHIFT 25 +#define NVFX_FP_OP_COND_SWZ_Z_MASK (3 << 25) +#define NVFX_FP_OP_COND_SWZ_Y_SHIFT 23 +#define NVFX_FP_OP_COND_SWZ_Y_MASK (3 << 23) +#define NVFX_FP_OP_COND_SWZ_X_SHIFT 21 +#define NVFX_FP_OP_COND_SWZ_X_MASK (3 << 21) +#define NVFX_FP_OP_COND_SWZ_ALL_SHIFT 21 +#define NVFX_FP_OP_COND_SWZ_ALL_MASK (0xFF << 21) +#define NVFX_FP_OP_COND_SHIFT 18 +#define NVFX_FP_OP_COND_MASK (0x07 << 18) +# define NVFX_FP_OP_COND_FL 0 +# define NVFX_FP_OP_COND_LT 1 +# define NVFX_FP_OP_COND_EQ 2 +# define NVFX_FP_OP_COND_LE 3 +# define NVFX_FP_OP_COND_GT 4 +# define NVFX_FP_OP_COND_NE 5 +# define NVFX_FP_OP_COND_GE 6 +# define NVFX_FP_OP_COND_TR 7 + +/* high order bits of SRC1 */ +#define NV40_FP_OP_OPCODE_IS_BRANCH (1<<31) +#define NVFX_FP_OP_DST_SCALE_SHIFT 28 +#define NVFX_FP_OP_DST_SCALE_MASK (3 << 28) +#define NVFX_FP_OP_DST_SCALE_1X 0 +#define NVFX_FP_OP_DST_SCALE_2X 1 +#define NVFX_FP_OP_DST_SCALE_4X 2 +#define NVFX_FP_OP_DST_SCALE_8X 3 +#define NVFX_FP_OP_DST_SCALE_INV_2X 5 +#define NVFX_FP_OP_DST_SCALE_INV_4X 6 +#define NVFX_FP_OP_DST_SCALE_INV_8X 7 + +/* SRC1 LOOP */ +#define NV40_FP_OP_LOOP_INCR_SHIFT 19 +#define NV40_FP_OP_LOOP_INCR_MASK (0xFF << 19) +#define NV40_FP_OP_LOOP_INDEX_SHIFT 10 +#define NV40_FP_OP_LOOP_INDEX_MASK (0xFF << 10) +#define NV40_FP_OP_LOOP_COUNT_SHIFT 2 +#define NV40_FP_OP_LOOP_COUNT_MASK (0xFF << 2) + +/* SRC1 IF */ +#define NV40_FP_OP_ELSE_ID_SHIFT 2 +#define NV40_FP_OP_ELSE_ID_MASK (0xFF << 2) + +/* SRC1 CAL */ +#define NV40_FP_OP_IADDR_SHIFT 2 +#define NV40_FP_OP_IADDR_MASK (0xFF << 2) + +/* SRC1 REP + * I have no idea why there are 3 count values here.. but they + * have always been filled with the same value in my tests so + * far.. + */ +#define NV40_FP_OP_REP_COUNT1_SHIFT 2 +#define NV40_FP_OP_REP_COUNT1_MASK (0xFF << 2) +#define NV40_FP_OP_REP_COUNT2_SHIFT 10 +#define NV40_FP_OP_REP_COUNT2_MASK (0xFF << 10) +#define NV40_FP_OP_REP_COUNT3_SHIFT 19 +#define NV40_FP_OP_REP_COUNT3_MASK (0xFF << 19) + +/* SRC2 REP/IF */ +#define NV40_FP_OP_END_ID_SHIFT 2 +#define NV40_FP_OP_END_ID_MASK (0xFF << 2) + +/* high order bits of SRC2 */ +#define NVFX_FP_OP_INDEX_INPUT (1 << 30) +#define NV40_FP_OP_ADDR_INDEX_SHIFT 19 +#define NV40_FP_OP_ADDR_INDEX_MASK (0xF << 19) + +//== Register selection == +#define NVFX_FP_REG_TYPE_SHIFT 0 +#define NVFX_FP_REG_TYPE_MASK (3 << 0) +# define NVFX_FP_REG_TYPE_TEMP 0 +# define NVFX_FP_REG_TYPE_INPUT 1 +# define NVFX_FP_REG_TYPE_CONST 2 +#define NVFX_FP_REG_SRC_SHIFT 2 +#define NV30_FP_REG_SRC_MASK (31 << 2) +#define NV40_FP_REG_SRC_MASK (63 << 2) +#define NVFX_FP_REG_SRC_HALF (1 << 8) +#define NVFX_FP_REG_SWZ_ALL_SHIFT 9 +#define NVFX_FP_REG_SWZ_ALL_MASK (255 << 9) +#define NVFX_FP_REG_SWZ_X_SHIFT 9 +#define NVFX_FP_REG_SWZ_X_MASK (3 << 9) +#define NVFX_FP_REG_SWZ_Y_SHIFT 11 +#define NVFX_FP_REG_SWZ_Y_MASK (3 << 11) +#define NVFX_FP_REG_SWZ_Z_SHIFT 13 +#define NVFX_FP_REG_SWZ_Z_MASK (3 << 13) +#define NVFX_FP_REG_SWZ_W_SHIFT 15 +#define NVFX_FP_REG_SWZ_W_MASK (3 << 15) +# define NVFX_FP_SWIZZLE_X 0 +# define NVFX_FP_SWIZZLE_Y 1 +# define NVFX_FP_SWIZZLE_Z 2 +# define NVFX_FP_SWIZZLE_W 3 +#define NVFX_FP_REG_NEGATE (1 << 17) + +#ifndef NVFX_SHADER_NO_FUCKEDNESS +#define NVFXSR_NONE 0 +#define NVFXSR_OUTPUT 1 +#define NVFXSR_INPUT 2 +#define NVFXSR_TEMP 3 +#define NVFXSR_CONST 4 + +struct nvfx_sreg { + int type; + int index; + + int dst_scale; + + int negate; + int abs; + int swz[4]; + + int cc_update; + int cc_update_reg; + int cc_test; + int cc_test_reg; + int cc_swz[4]; +}; + +static INLINE struct nvfx_sreg +nvfx_sr(int type, int index) +{ + struct nvfx_sreg temp = { + .type = type, + .index = index, + .dst_scale = DEF_SCALE, + .abs = 0, + .negate = 0, + .swz = { 0, 1, 2, 3 }, + .cc_update = 0, + .cc_update_reg = 0, + .cc_test = DEF_CTEST, + .cc_test_reg = 0, + .cc_swz = { 0, 1, 2, 3 }, + }; + return temp; +} + +static INLINE struct nvfx_sreg +nvfx_sr_swz(struct nvfx_sreg src, int x, int y, int z, int w) +{ + struct nvfx_sreg dst = src; + + dst.swz[SWZ_X] = src.swz[x]; + dst.swz[SWZ_Y] = src.swz[y]; + dst.swz[SWZ_Z] = src.swz[z]; + dst.swz[SWZ_W] = src.swz[w]; + return dst; +} + +static INLINE struct nvfx_sreg +nvfx_sr_neg(struct nvfx_sreg src) +{ + src.negate = !src.negate; + return src; +} + +static INLINE struct nvfx_sreg +nvfx_sr_abs(struct nvfx_sreg src) +{ + src.abs = 1; + return src; +} + +static INLINE struct nvfx_sreg +nvfx_sr_scale(struct nvfx_sreg src, int scale) +{ + src.dst_scale = scale; + return src; +} +#endif + +#endif -- cgit v1.2.3 From bcb37411fc9159a5c1af50b7defbf1f526b50793 Mon Sep 17 00:00:00 2001 From: Luca Barbieri Date: Sun, 21 Feb 2010 10:55:41 +0100 Subject: nv30, nv40: non-trivially unify nv[34]0_fragprog.c The files are mostly the same except: 1. On NV40, some TGSI instructions are emulated with several hardware ones 2. Some instructions such as DDX/DDY, and STR were missing from nv30 3. NV40 has more sophisticated register management nv30 now supports all instructions and uses the nv40 register management. --- src/gallium/drivers/nv30/Makefile | 1 - src/gallium/drivers/nv30/nv30_context.h | 5 - src/gallium/drivers/nv30/nv30_fragprog.c | 903 ------------------------- src/gallium/drivers/nv30/nv30_state.c | 2 +- src/gallium/drivers/nv40/Makefile | 1 - src/gallium/drivers/nv40/nv40_context.h | 5 - src/gallium/drivers/nv40/nv40_fragprog.c | 984 --------------------------- src/gallium/drivers/nv40/nv40_state.c | 2 +- src/gallium/drivers/nvfx/Makefile | 3 +- src/gallium/drivers/nvfx/nvfx_context.h | 5 + src/gallium/drivers/nvfx/nvfx_fragprog.c | 1011 ++++++++++++++++++++++++++++ src/gallium/drivers/nvfx/nvfx_state_emit.c | 2 +- 12 files changed, 1021 insertions(+), 1903 deletions(-) delete mode 100644 src/gallium/drivers/nv30/nv30_fragprog.c delete mode 100644 src/gallium/drivers/nv40/nv40_fragprog.c create mode 100644 src/gallium/drivers/nvfx/nvfx_fragprog.c (limited to 'src') diff --git a/src/gallium/drivers/nv30/Makefile b/src/gallium/drivers/nv30/Makefile index b5728a34f8..196cc9a1ef 100644 --- a/src/gallium/drivers/nv30/Makefile +++ b/src/gallium/drivers/nv30/Makefile @@ -6,7 +6,6 @@ LIBNAME = nv30 C_SOURCES = \ nv30_context.c \ nv30_draw.c \ - nv30_fragprog.c \ nv30_fragtex.c \ nv30_screen.c \ nv30_state.c \ diff --git a/src/gallium/drivers/nv30/nv30_context.h b/src/gallium/drivers/nv30/nv30_context.h index c203425cc9..7840318363 100644 --- a/src/gallium/drivers/nv30/nv30_context.h +++ b/src/gallium/drivers/nv30/nv30_context.h @@ -12,15 +12,10 @@ extern struct draw_stage *nv30_draw_render_stage(struct nvfx_context *nvfx); extern void nv30_vertprog_destroy(struct nvfx_context *, struct nvfx_vertex_program *); -/* nv30_fragprog.c */ -extern void nv30_fragprog_destroy(struct nvfx_context *, - struct nvfx_fragment_program *); - /* nv30_fragtex.c */ extern void nv30_fragtex_bind(struct nvfx_context *); /* nv30_state.c and friends */ -extern struct nvfx_state_entry nv30_state_fragprog; extern struct nvfx_state_entry nv30_state_vertprog; extern struct nvfx_state_entry nv30_state_fragtex; extern struct nvfx_state_entry nv30_state_vbo; diff --git a/src/gallium/drivers/nv30/nv30_fragprog.c b/src/gallium/drivers/nv30/nv30_fragprog.c deleted file mode 100644 index 4ce16b8f0e..0000000000 --- a/src/gallium/drivers/nv30/nv30_fragprog.c +++ /dev/null @@ -1,903 +0,0 @@ -#include "pipe/p_context.h" -#include "pipe/p_defines.h" -#include "pipe/p_state.h" -#include "util/u_inlines.h" - -#include "pipe/p_shader_tokens.h" -#include "tgsi/tgsi_dump.h" -#include "tgsi/tgsi_parse.h" -#include "tgsi/tgsi_util.h" - -#include "nv30_context.h" - -#define SWZ_X 0 -#define SWZ_Y 1 -#define SWZ_Z 2 -#define SWZ_W 3 -#define MASK_X 1 -#define MASK_Y 2 -#define MASK_Z 4 -#define MASK_W 8 -#define MASK_ALL (MASK_X|MASK_Y|MASK_Z|MASK_W) -#define DEF_SCALE NVFX_FP_OP_DST_SCALE_1X -#define DEF_CTEST NVFX_FP_OP_COND_TR -#include "nvfx_shader.h" - -#define swz(s,x,y,z,w) nvfx_sr_swz((s), SWZ_##x, SWZ_##y, SWZ_##z, SWZ_##w) -#define neg(s) nvfx_sr_neg((s)) -#define abs(s) nvfx_sr_abs((s)) -#define scale(s,v) nvfx_sr_scale((s), NVFX_FP_OP_DST_SCALE_##v) - -#define MAX_CONSTS 128 -#define MAX_IMM 32 -struct nv30_fpc { - struct nvfx_fragment_program *fp; - - uint attrib_map[PIPE_MAX_SHADER_INPUTS]; - - int high_temp; - int temp_temp_count; - int num_regs; - - uint depth_id; - uint colour_id; - - unsigned inst_offset; - - struct { - int pipe; - float vals[4]; - } consts[MAX_CONSTS]; - int nr_consts; - - struct nvfx_sreg imm[MAX_IMM]; - unsigned nr_imm; -}; - -static INLINE struct nvfx_sreg -temp(struct nv30_fpc *fpc) -{ - int idx; - - idx = fpc->temp_temp_count++; - idx += fpc->high_temp + 1; - return nvfx_sr(NVFXSR_TEMP, idx); -} - -static INLINE struct nvfx_sreg -constant(struct nv30_fpc *fpc, int pipe, float vals[4]) -{ - int idx; - - if (fpc->nr_consts == MAX_CONSTS) - assert(0); - idx = fpc->nr_consts++; - - fpc->consts[idx].pipe = pipe; - if (pipe == -1) - memcpy(fpc->consts[idx].vals, vals, 4 * sizeof(float)); - return nvfx_sr(NVFXSR_CONST, idx); -} - -#define arith(cc,s,o,d,m,s0,s1,s2) \ - nv30_fp_arith((cc), (s), NVFX_FP_OP_OPCODE_##o, \ - (d), (m), (s0), (s1), (s2)) -#define tex(cc,s,o,u,d,m,s0,s1,s2) \ - nv30_fp_tex((cc), (s), NVFX_FP_OP_OPCODE_##o, (u), \ - (d), (m), (s0), none, none) - -static void -grow_insns(struct nv30_fpc *fpc, int size) -{ - struct nvfx_fragment_program *fp = fpc->fp; - - fp->insn_len += size; - fp->insn = realloc(fp->insn, sizeof(uint32_t) * fp->insn_len); -} - -static void -emit_src(struct nv30_fpc *fpc, int pos, struct nvfx_sreg src) -{ - struct nvfx_fragment_program *fp = fpc->fp; - uint32_t *hw = &fp->insn[fpc->inst_offset]; - uint32_t sr = 0; - - switch (src.type) { - case NVFXSR_INPUT: - sr |= (NVFX_FP_REG_TYPE_INPUT << NVFX_FP_REG_TYPE_SHIFT); - hw[0] |= (src.index << NVFX_FP_OP_INPUT_SRC_SHIFT); - break; - case NVFXSR_OUTPUT: - sr |= NVFX_FP_REG_SRC_HALF; - /* fall-through */ - case NVFXSR_TEMP: - sr |= (NVFX_FP_REG_TYPE_TEMP << NVFX_FP_REG_TYPE_SHIFT); - sr |= (src.index << NVFX_FP_REG_SRC_SHIFT); - break; - case NVFXSR_CONST: - grow_insns(fpc, 4); - hw = &fp->insn[fpc->inst_offset]; - if (fpc->consts[src.index].pipe >= 0) { - struct nvfx_fragment_program_data *fpd; - - fp->consts = realloc(fp->consts, ++fp->nr_consts * - sizeof(*fpd)); - fpd = &fp->consts[fp->nr_consts - 1]; - fpd->offset = fpc->inst_offset + 4; - fpd->index = fpc->consts[src.index].pipe; - memset(&fp->insn[fpd->offset], 0, sizeof(uint32_t) * 4); - } else { - memcpy(&fp->insn[fpc->inst_offset + 4], - fpc->consts[src.index].vals, - sizeof(uint32_t) * 4); - } - - sr |= (NVFX_FP_REG_TYPE_CONST << NVFX_FP_REG_TYPE_SHIFT); - break; - case NVFXSR_NONE: - sr |= (NVFX_FP_REG_TYPE_INPUT << NVFX_FP_REG_TYPE_SHIFT); - break; - default: - assert(0); - } - - if (src.negate) - sr |= NVFX_FP_REG_NEGATE; - - if (src.abs) - hw[1] |= (1 << (29 + pos)); - - sr |= ((src.swz[0] << NVFX_FP_REG_SWZ_X_SHIFT) | - (src.swz[1] << NVFX_FP_REG_SWZ_Y_SHIFT) | - (src.swz[2] << NVFX_FP_REG_SWZ_Z_SHIFT) | - (src.swz[3] << NVFX_FP_REG_SWZ_W_SHIFT)); - - hw[pos + 1] |= sr; -} - -static void -emit_dst(struct nv30_fpc *fpc, struct nvfx_sreg dst) -{ - struct nvfx_fragment_program *fp = fpc->fp; - uint32_t *hw = &fp->insn[fpc->inst_offset]; - - switch (dst.type) { - case NVFXSR_TEMP: - if (fpc->num_regs < (dst.index + 1)) - fpc->num_regs = dst.index + 1; - break; - case NVFXSR_OUTPUT: - if (dst.index == 1) { - fp->fp_control |= 0xe; - } else { - hw[0] |= NVFX_FP_OP_OUT_REG_HALF; - } - break; - case NVFXSR_NONE: - hw[0] |= (1 << 30); - break; - default: - assert(0); - } - - hw[0] |= (dst.index << NVFX_FP_OP_OUT_REG_SHIFT); -} - -static void -nv30_fp_arith(struct nv30_fpc *fpc, int sat, int op, - struct nvfx_sreg dst, int mask, - struct nvfx_sreg s0, struct nvfx_sreg s1, struct nvfx_sreg s2) -{ - struct nvfx_fragment_program *fp = fpc->fp; - uint32_t *hw; - - fpc->inst_offset = fp->insn_len; - grow_insns(fpc, 4); - hw = &fp->insn[fpc->inst_offset]; - memset(hw, 0, sizeof(uint32_t) * 4); - - if (op == NVFX_FP_OP_OPCODE_KIL) - fp->fp_control |= NV34TCL_FP_CONTROL_USES_KIL; - hw[0] |= (op << NVFX_FP_OP_OPCODE_SHIFT); - hw[0] |= (mask << NVFX_FP_OP_OUTMASK_SHIFT); - hw[2] |= (dst.dst_scale << NVFX_FP_OP_DST_SCALE_SHIFT); - - if (sat) - hw[0] |= NVFX_FP_OP_OUT_SAT; - - if (dst.cc_update) - hw[0] |= NVFX_FP_OP_COND_WRITE_ENABLE; - hw[1] |= (dst.cc_test << NVFX_FP_OP_COND_SHIFT); - hw[1] |= ((dst.cc_swz[0] << NVFX_FP_OP_COND_SWZ_X_SHIFT) | - (dst.cc_swz[1] << NVFX_FP_OP_COND_SWZ_Y_SHIFT) | - (dst.cc_swz[2] << NVFX_FP_OP_COND_SWZ_Z_SHIFT) | - (dst.cc_swz[3] << NVFX_FP_OP_COND_SWZ_W_SHIFT)); - - emit_dst(fpc, dst); - emit_src(fpc, 0, s0); - emit_src(fpc, 1, s1); - emit_src(fpc, 2, s2); -} - -static void -nv30_fp_tex(struct nv30_fpc *fpc, int sat, int op, int unit, - struct nvfx_sreg dst, int mask, - struct nvfx_sreg s0, struct nvfx_sreg s1, struct nvfx_sreg s2) -{ - struct nvfx_fragment_program *fp = fpc->fp; - - nv30_fp_arith(fpc, sat, op, dst, mask, s0, s1, s2); - - fp->insn[fpc->inst_offset] |= (unit << NVFX_FP_OP_TEX_UNIT_SHIFT); - fp->samplers |= (1 << unit); -} - -static INLINE struct nvfx_sreg -tgsi_src(struct nv30_fpc *fpc, const struct tgsi_full_src_register *fsrc) -{ - struct nvfx_sreg src; - - switch (fsrc->Register.File) { - case TGSI_FILE_INPUT: - src = nvfx_sr(NVFXSR_INPUT, - fpc->attrib_map[fsrc->Register.Index]); - break; - case TGSI_FILE_CONSTANT: - src = constant(fpc, fsrc->Register.Index, NULL); - break; - case TGSI_FILE_IMMEDIATE: - assert(fsrc->Register.Index < fpc->nr_imm); - src = fpc->imm[fsrc->Register.Index]; - break; - case TGSI_FILE_TEMPORARY: - src = nvfx_sr(NVFXSR_TEMP, fsrc->Register.Index + 1); - if (fpc->high_temp < src.index) - fpc->high_temp = src.index; - break; - /* This is clearly insane, but gallium hands us shaders like this. - * Luckily fragprog results are just temp regs.. - */ - case TGSI_FILE_OUTPUT: - if (fsrc->Register.Index == fpc->colour_id) - return nvfx_sr(NVFXSR_OUTPUT, 0); - else - return nvfx_sr(NVFXSR_OUTPUT, 1); - break; - default: - NOUVEAU_ERR("bad src file\n"); - break; - } - - src.abs = fsrc->Register.Absolute; - src.negate = fsrc->Register.Negate; - src.swz[0] = fsrc->Register.SwizzleX; - src.swz[1] = fsrc->Register.SwizzleY; - src.swz[2] = fsrc->Register.SwizzleZ; - src.swz[3] = fsrc->Register.SwizzleW; - return src; -} - -static INLINE struct nvfx_sreg -tgsi_dst(struct nv30_fpc *fpc, const struct tgsi_full_dst_register *fdst) { - int idx; - - switch (fdst->Register.File) { - case TGSI_FILE_OUTPUT: - if (fdst->Register.Index == fpc->colour_id) - return nvfx_sr(NVFXSR_OUTPUT, 0); - else - return nvfx_sr(NVFXSR_OUTPUT, 1); - break; - case TGSI_FILE_TEMPORARY: - idx = fdst->Register.Index + 1; - if (fpc->high_temp < idx) - fpc->high_temp = idx; - return nvfx_sr(NVFXSR_TEMP, idx); - case TGSI_FILE_NULL: - return nvfx_sr(NVFXSR_NONE, 0); - default: - NOUVEAU_ERR("bad dst file %d\n", fdst->Register.File); - return nvfx_sr(NVFXSR_NONE, 0); - } -} - -static INLINE int -tgsi_mask(uint tgsi) -{ - int mask = 0; - - if (tgsi & TGSI_WRITEMASK_X) mask |= MASK_X; - if (tgsi & TGSI_WRITEMASK_Y) mask |= MASK_Y; - if (tgsi & TGSI_WRITEMASK_Z) mask |= MASK_Z; - if (tgsi & TGSI_WRITEMASK_W) mask |= MASK_W; - return mask; -} - -static boolean -src_native_swz(struct nv30_fpc *fpc, const struct tgsi_full_src_register *fsrc, - struct nvfx_sreg *src) -{ - const struct nvfx_sreg none = nvfx_sr(NVFXSR_NONE, 0); - struct nvfx_sreg tgsi = tgsi_src(fpc, fsrc); - uint mask = 0; - uint c; - - for (c = 0; c < 4; c++) { - switch (tgsi_util_get_full_src_register_swizzle(fsrc, c)) { - case TGSI_SWIZZLE_X: - case TGSI_SWIZZLE_Y: - case TGSI_SWIZZLE_Z: - case TGSI_SWIZZLE_W: - mask |= (1 << c); - break; - default: - assert(0); - } - } - - if (mask == MASK_ALL) - return TRUE; - - *src = temp(fpc); - - if (mask) - arith(fpc, 0, MOV, *src, mask, tgsi, none, none); - - return FALSE; -} - -static boolean -nv30_fragprog_parse_instruction(struct nv30_fpc *fpc, - const struct tgsi_full_instruction *finst) -{ - const struct nvfx_sreg none = nvfx_sr(NVFXSR_NONE, 0); - struct nvfx_sreg src[3], dst, tmp; - int mask, sat, unit = 0; - int ai = -1, ci = -1; - int i; - - if (finst->Instruction.Opcode == TGSI_OPCODE_END) - return TRUE; - - fpc->temp_temp_count = 0; - for (i = 0; i < finst->Instruction.NumSrcRegs; i++) { - const struct tgsi_full_src_register *fsrc; - - fsrc = &finst->Src[i]; - if (fsrc->Register.File == TGSI_FILE_TEMPORARY) { - src[i] = tgsi_src(fpc, fsrc); - } - } - - for (i = 0; i < finst->Instruction.NumSrcRegs; i++) { - const struct tgsi_full_src_register *fsrc; - - fsrc = &finst->Src[i]; - - switch (fsrc->Register.File) { - case TGSI_FILE_INPUT: - case TGSI_FILE_CONSTANT: - case TGSI_FILE_TEMPORARY: - if (!src_native_swz(fpc, fsrc, &src[i])) - continue; - break; - default: - break; - } - - switch (fsrc->Register.File) { - case TGSI_FILE_INPUT: - if (ai == -1 || ai == fsrc->Register.Index) { - ai = fsrc->Register.Index; - src[i] = tgsi_src(fpc, fsrc); - } else { - NOUVEAU_MSG("extra src attr %d\n", - fsrc->Register.Index); - src[i] = temp(fpc); - arith(fpc, 0, MOV, src[i], MASK_ALL, - tgsi_src(fpc, fsrc), none, none); - } - break; - case TGSI_FILE_CONSTANT: - case TGSI_FILE_IMMEDIATE: - if (ci == -1 || ci == fsrc->Register.Index) { - ci = fsrc->Register.Index; - src[i] = tgsi_src(fpc, fsrc); - } else { - src[i] = temp(fpc); - arith(fpc, 0, MOV, src[i], MASK_ALL, - tgsi_src(fpc, fsrc), none, none); - } - break; - case TGSI_FILE_TEMPORARY: - /* handled above */ - break; - case TGSI_FILE_SAMPLER: - unit = fsrc->Register.Index; - break; - case TGSI_FILE_OUTPUT: - break; - default: - NOUVEAU_ERR("bad src file\n"); - return FALSE; - } - } - - dst = tgsi_dst(fpc, &finst->Dst[0]); - mask = tgsi_mask(finst->Dst[0].Register.WriteMask); - sat = (finst->Instruction.Saturate == TGSI_SAT_ZERO_ONE); - - switch (finst->Instruction.Opcode) { - case TGSI_OPCODE_ABS: - arith(fpc, sat, MOV, dst, mask, abs(src[0]), none, none); - break; - case TGSI_OPCODE_ADD: - arith(fpc, sat, ADD, dst, mask, src[0], src[1], none); - break; - case TGSI_OPCODE_CMP: - tmp = nvfx_sr(NVFXSR_NONE, 0); - tmp.cc_update = 1; - arith(fpc, 0, MOV, tmp, 0xf, src[0], none, none); - dst.cc_test = NVFX_VP_INST_COND_GE; - arith(fpc, sat, MOV, dst, mask, src[2], none, none); - dst.cc_test = NVFX_VP_INST_COND_LT; - arith(fpc, sat, MOV, dst, mask, src[1], none, none); - break; - case TGSI_OPCODE_COS: - arith(fpc, sat, COS, dst, mask, src[0], none, none); - break; - case TGSI_OPCODE_DP3: - arith(fpc, sat, DP3, dst, mask, src[0], src[1], none); - break; - case TGSI_OPCODE_DP4: - arith(fpc, sat, DP4, dst, mask, src[0], src[1], none); - break; - case TGSI_OPCODE_DPH: - tmp = temp(fpc); - arith(fpc, 0, DP3, tmp, MASK_X, src[0], src[1], none); - arith(fpc, sat, ADD, dst, mask, swz(tmp, X, X, X, X), - swz(src[1], W, W, W, W), none); - break; - case TGSI_OPCODE_DST: - arith(fpc, sat, DST, dst, mask, src[0], src[1], none); - break; - case TGSI_OPCODE_EX2: - arith(fpc, sat, EX2, dst, mask, src[0], none, none); - break; - case TGSI_OPCODE_FLR: - arith(fpc, sat, FLR, dst, mask, src[0], none, none); - break; - case TGSI_OPCODE_FRC: - arith(fpc, sat, FRC, dst, mask, src[0], none, none); - break; - case TGSI_OPCODE_KILP: - arith(fpc, 0, KIL, none, 0, none, none, none); - break; - case TGSI_OPCODE_KIL: - dst = nvfx_sr(NVFXSR_NONE, 0); - dst.cc_update = 1; - arith(fpc, 0, MOV, dst, MASK_ALL, src[0], none, none); - dst.cc_update = 0; dst.cc_test = NVFX_FP_OP_COND_LT; - arith(fpc, 0, KIL, dst, 0, none, none, none); - break; - case TGSI_OPCODE_LG2: - arith(fpc, sat, LG2, dst, mask, src[0], none, none); - break; -// case TGSI_OPCODE_LIT: - case TGSI_OPCODE_LRP: - arith(fpc, sat, LRP_NV30, dst, mask, src[0], src[1], src[2]); - break; - case TGSI_OPCODE_MAD: - arith(fpc, sat, MAD, dst, mask, src[0], src[1], src[2]); - break; - case TGSI_OPCODE_MAX: - arith(fpc, sat, MAX, dst, mask, src[0], src[1], none); - break; - case TGSI_OPCODE_MIN: - arith(fpc, sat, MIN, dst, mask, src[0], src[1], none); - break; - case TGSI_OPCODE_MOV: - arith(fpc, sat, MOV, dst, mask, src[0], none, none); - break; - case TGSI_OPCODE_MUL: - arith(fpc, sat, MUL, dst, mask, src[0], src[1], none); - break; - case TGSI_OPCODE_POW: - arith(fpc, sat, POW_NV30, dst, mask, src[0], src[1], none); - break; - case TGSI_OPCODE_RCP: - arith(fpc, sat, RCP, dst, mask, src[0], none, none); - break; - case TGSI_OPCODE_RET: - assert(0); - break; - case TGSI_OPCODE_RFL: - arith(fpc, 0, RFL_NV30, dst, mask, src[0], src[1], none); - break; - case TGSI_OPCODE_RSQ: - arith(fpc, sat, RSQ_NV30, dst, mask, abs(swz(src[0], X, X, X, X)), none, none); - break; - case TGSI_OPCODE_SCS: - /* avoid overwriting the source */ - if(src[0].swz[SWZ_X] != SWZ_X) - { - if (mask & MASK_X) { - arith(fpc, sat, COS, dst, MASK_X, - swz(src[0], X, X, X, X), none, none); - } - if (mask & MASK_Y) { - arith(fpc, sat, SIN, dst, MASK_Y, - swz(src[0], X, X, X, X), none, none); - } - } - else - { - if (mask & MASK_Y) { - arith(fpc, sat, SIN, dst, MASK_Y, - swz(src[0], X, X, X, X), none, none); - } - if (mask & MASK_X) { - arith(fpc, sat, COS, dst, MASK_X, - swz(src[0], X, X, X, X), none, none); - } - } - break; - case TGSI_OPCODE_SIN: - arith(fpc, sat, SIN, dst, mask, src[0], none, none); - break; - case TGSI_OPCODE_SGE: - arith(fpc, sat, SGE, dst, mask, src[0], src[1], none); - break; - case TGSI_OPCODE_SGT: - arith(fpc, sat, SGT, dst, mask, src[0], src[1], none); - break; - case TGSI_OPCODE_SLT: - arith(fpc, sat, SLT, dst, mask, src[0], src[1], none); - break; - case TGSI_OPCODE_SUB: - arith(fpc, sat, ADD, dst, mask, src[0], neg(src[1]), none); - break; - case TGSI_OPCODE_TEX: - tex(fpc, sat, TEX, unit, dst, mask, src[0], none, none); - break; - case TGSI_OPCODE_TXB: - tex(fpc, sat, TXB, unit, dst, mask, src[0], none, none); - break; - case TGSI_OPCODE_TXP: - tex(fpc, sat, TXP, unit, dst, mask, src[0], none, none); - break; - case TGSI_OPCODE_XPD: - tmp = temp(fpc); - arith(fpc, 0, MUL, tmp, mask, - swz(src[0], Z, X, Y, Y), swz(src[1], Y, Z, X, X), none); - arith(fpc, sat, MAD, dst, (mask & ~MASK_W), - swz(src[0], Y, Z, X, X), swz(src[1], Z, X, Y, Y), - neg(tmp)); - break; - default: - NOUVEAU_ERR("invalid opcode %d\n", finst->Instruction.Opcode); - return FALSE; - } - - return TRUE; -} - -static boolean -nv30_fragprog_parse_decl_attrib(struct nv30_fpc *fpc, - const struct tgsi_full_declaration *fdec) -{ - int hw; - - switch (fdec->Semantic.Name) { - case TGSI_SEMANTIC_POSITION: - hw = NVFX_FP_OP_INPUT_SRC_POSITION; - break; - case TGSI_SEMANTIC_COLOR: - if (fdec->Semantic.Index == 0) { - hw = NVFX_FP_OP_INPUT_SRC_COL0; - } else - if (fdec->Semantic.Index == 1) { - hw = NVFX_FP_OP_INPUT_SRC_COL1; - } else { - NOUVEAU_ERR("bad colour semantic index\n"); - return FALSE; - } - break; - case TGSI_SEMANTIC_FOG: - hw = NVFX_FP_OP_INPUT_SRC_FOGC; - break; - case TGSI_SEMANTIC_GENERIC: - if (fdec->Semantic.Index <= 7) { - hw = NVFX_FP_OP_INPUT_SRC_TC(fdec->Semantic. - Index); - } else { - NOUVEAU_ERR("bad generic semantic index\n"); - return FALSE; - } - break; - default: - NOUVEAU_ERR("bad input semantic\n"); - return FALSE; - } - - fpc->attrib_map[fdec->Range.First] = hw; - return TRUE; -} - -static boolean -nv30_fragprog_parse_decl_output(struct nv30_fpc *fpc, - const struct tgsi_full_declaration *fdec) -{ - switch (fdec->Semantic.Name) { - case TGSI_SEMANTIC_POSITION: - fpc->depth_id = fdec->Range.First; - break; - case TGSI_SEMANTIC_COLOR: - fpc->colour_id = fdec->Range.First; - break; - default: - NOUVEAU_ERR("bad output semantic\n"); - return FALSE; - } - - return TRUE; -} - -static boolean -nv30_fragprog_prepare(struct nv30_fpc *fpc) -{ - struct tgsi_parse_context p; - /*int high_temp = -1, i;*/ - - tgsi_parse_init(&p, fpc->fp->pipe.tokens); - while (!tgsi_parse_end_of_tokens(&p)) { - const union tgsi_full_token *tok = &p.FullToken; - - tgsi_parse_token(&p); - switch(tok->Token.Type) { - case TGSI_TOKEN_TYPE_DECLARATION: - { - const struct tgsi_full_declaration *fdec; - fdec = &p.FullToken.FullDeclaration; - switch (fdec->Declaration.File) { - case TGSI_FILE_INPUT: - if (!nv30_fragprog_parse_decl_attrib(fpc, fdec)) - goto out_err; - break; - case TGSI_FILE_OUTPUT: - if (!nv30_fragprog_parse_decl_output(fpc, fdec)) - goto out_err; - break; - /*case TGSI_FILE_TEMPORARY: - if (fdec->Range.Last > high_temp) { - high_temp = - fdec->Range.Last; - } - break;*/ - default: - break; - } - } - break; - case TGSI_TOKEN_TYPE_IMMEDIATE: - { - struct tgsi_full_immediate *imm; - float vals[4]; - - imm = &p.FullToken.FullImmediate; - assert(imm->Immediate.DataType == TGSI_IMM_FLOAT32); - assert(fpc->nr_imm < MAX_IMM); - - vals[0] = imm->u[0].Float; - vals[1] = imm->u[1].Float; - vals[2] = imm->u[2].Float; - vals[3] = imm->u[3].Float; - fpc->imm[fpc->nr_imm++] = constant(fpc, -1, vals); - } - break; - default: - break; - } - } - tgsi_parse_free(&p); - - /*if (++high_temp) { - fpc->r_temp = CALLOC(high_temp, sizeof(struct nvfx_sreg)); - for (i = 0; i < high_temp; i++) - fpc->r_temp[i] = temp(fpc); - fpc->r_temps_discard = 0; - }*/ - - return TRUE; - -out_err: - /*if (fpc->r_temp) - FREE(fpc->r_temp);*/ - tgsi_parse_free(&p); - return FALSE; -} - -static void -nv30_fragprog_translate(struct nvfx_context *nvfx, - struct nvfx_fragment_program *fp) -{ - struct tgsi_parse_context parse; - struct nv30_fpc *fpc = NULL; - - tgsi_dump(fp->pipe.tokens,0); - - fpc = CALLOC(1, sizeof(struct nv30_fpc)); - if (!fpc) - return; - fpc->fp = fp; - fpc->high_temp = -1; - fpc->num_regs = 2; - - if (!nv30_fragprog_prepare(fpc)) { - FREE(fpc); - return; - } - - tgsi_parse_init(&parse, fp->pipe.tokens); - - while (!tgsi_parse_end_of_tokens(&parse)) { - tgsi_parse_token(&parse); - - switch (parse.FullToken.Token.Type) { - case TGSI_TOKEN_TYPE_INSTRUCTION: - { - const struct tgsi_full_instruction *finst; - - finst = &parse.FullToken.FullInstruction; - if (!nv30_fragprog_parse_instruction(fpc, finst)) - goto out_err; - } - break; - default: - break; - } - } - - fp->fp_control |= (fpc->num_regs-1)/2; - - /* Terminate final instruction */ - fp->insn[fpc->inst_offset] |= 0x00000001; - - /* Append NOP + END instruction, may or may not be necessary. */ - fpc->inst_offset = fp->insn_len; - grow_insns(fpc, 4); - fp->insn[fpc->inst_offset + 0] = 0x00000001; - fp->insn[fpc->inst_offset + 1] = 0x00000000; - fp->insn[fpc->inst_offset + 2] = 0x00000000; - fp->insn[fpc->inst_offset + 3] = 0x00000000; - - fp->translated = TRUE; -out_err: - tgsi_parse_free(&parse); - FREE(fpc); -} - -static void -nv30_fragprog_upload(struct nvfx_context *nvfx, - struct nvfx_fragment_program *fp) -{ - struct pipe_screen *pscreen = nvfx->pipe.screen; - const uint32_t le = 1; - uint32_t *map; - int i; - - map = pipe_buffer_map(pscreen, fp->buffer, PIPE_BUFFER_USAGE_CPU_WRITE); - -#if 0 - for (i = 0; i < fp->insn_len; i++) { - fflush(stdout); fflush(stderr); - NOUVEAU_ERR("%d 0x%08x\n", i, fp->insn[i]); - fflush(stdout); fflush(stderr); - } -#endif - - if ((*(const uint8_t *)&le)) { - for (i = 0; i < fp->insn_len; i++) { - map[i] = fp->insn[i]; - } - } else { - /* Weird swapping for big-endian chips */ - for (i = 0; i < fp->insn_len; i++) { - map[i] = ((fp->insn[i] & 0xffff) << 16) | - ((fp->insn[i] >> 16) & 0xffff); - } - } - - pipe_buffer_unmap(pscreen, fp->buffer); -} - -static boolean -nv30_fragprog_validate(struct nvfx_context *nvfx) -{ - struct nvfx_fragment_program *fp = nvfx->fragprog; - struct pipe_buffer *constbuf = - nvfx->constbuf[PIPE_SHADER_FRAGMENT]; - struct pipe_screen *pscreen = nvfx->pipe.screen; - struct nouveau_stateobj *so; - boolean new_consts = FALSE; - int i; - - if (fp->translated) - goto update_constants; - - /*nvfx->fallback_swrast &= ~NVFX_NEW_FRAGPROG;*/ - nv30_fragprog_translate(nvfx, fp); - if (!fp->translated) { - /*nvfx->fallback_swrast |= NVFX_NEW_FRAGPROG;*/ - return FALSE; - } - - fp->buffer = pscreen->buffer_create(pscreen, 0x100, 0, fp->insn_len * 4); - nv30_fragprog_upload(nvfx, fp); - - so = so_new(4, 4, 1); - so_method(so, nvfx->screen->eng3d, NV34TCL_FP_ACTIVE_PROGRAM, 1); - so_reloc (so, nouveau_bo(fp->buffer), 0, NOUVEAU_BO_VRAM | - NOUVEAU_BO_GART | NOUVEAU_BO_RD | NOUVEAU_BO_LOW | - NOUVEAU_BO_OR, NV34TCL_FP_ACTIVE_PROGRAM_DMA0, - NV34TCL_FP_ACTIVE_PROGRAM_DMA1); - so_method(so, nvfx->screen->eng3d, NV34TCL_FP_CONTROL, 1); - so_data (so, fp->fp_control); - so_method(so, nvfx->screen->eng3d, NV34TCL_FP_REG_CONTROL, 1); - so_data (so, (1<<16)|0x4); - so_method(so, nvfx->screen->eng3d, NV34TCL_TX_UNITS_ENABLE, 1); - so_data (so, fp->samplers); - so_ref(so, &fp->so); - so_ref(NULL, &so); - -update_constants: - if (fp->nr_consts) { - float *map; - - map = pipe_buffer_map(pscreen, constbuf, - PIPE_BUFFER_USAGE_CPU_READ); - for (i = 0; i < fp->nr_consts; i++) { - struct nvfx_fragment_program_data *fpd = &fp->consts[i]; - uint32_t *p = &fp->insn[fpd->offset]; - uint32_t *cb = (uint32_t *)&map[fpd->index * 4]; - - if (!memcmp(p, cb, 4 * sizeof(float))) - continue; - memcpy(p, cb, 4 * sizeof(float)); - new_consts = TRUE; - } - pipe_buffer_unmap(pscreen, constbuf); - - if (new_consts) - nv30_fragprog_upload(nvfx, fp); - } - - if (new_consts || fp->so != nvfx->state.hw[NVFX_STATE_FRAGPROG]) { - so_ref(fp->so, &nvfx->state.hw[NVFX_STATE_FRAGPROG]); - return TRUE; - } - - return FALSE; -} - -void -nv30_fragprog_destroy(struct nvfx_context *nvfx, - struct nvfx_fragment_program *fp) -{ - if (fp->buffer) - pipe_buffer_reference(&fp->buffer, NULL); - - if (fp->so) - so_ref(NULL, &fp->so); - - if (fp->insn_len) - FREE(fp->insn); -} - -struct nvfx_state_entry nv30_state_fragprog = { - .validate = nv30_fragprog_validate, - .dirty = { - .pipe = NVFX_NEW_FRAGPROG, - .hw = NVFX_STATE_FRAGPROG - } -}; diff --git a/src/gallium/drivers/nv30/nv30_state.c b/src/gallium/drivers/nv30/nv30_state.c index 5263f894f2..92a4089b31 100644 --- a/src/gallium/drivers/nv30/nv30_state.c +++ b/src/gallium/drivers/nv30/nv30_state.c @@ -567,7 +567,7 @@ nv30_fp_state_delete(struct pipe_context *pipe, void *hwcso) struct nvfx_context *nvfx = nvfx_context(pipe); struct nvfx_fragment_program *fp = hwcso; - nv30_fragprog_destroy(nvfx, fp); + nvfx_fragprog_destroy(nvfx, fp); FREE((void*)fp->pipe.tokens); FREE(fp); } diff --git a/src/gallium/drivers/nv40/Makefile b/src/gallium/drivers/nv40/Makefile index f78e81ac4b..f3ff376dfd 100644 --- a/src/gallium/drivers/nv40/Makefile +++ b/src/gallium/drivers/nv40/Makefile @@ -6,7 +6,6 @@ LIBNAME = nv40 C_SOURCES = \ nv40_context.c \ nv40_draw.c \ - nv40_fragprog.c \ nv40_fragtex.c \ nv40_screen.c \ nv40_state.c \ diff --git a/src/gallium/drivers/nv40/nv40_context.h b/src/gallium/drivers/nv40/nv40_context.h index 3840134ce6..4cd56af8f7 100644 --- a/src/gallium/drivers/nv40/nv40_context.h +++ b/src/gallium/drivers/nv40/nv40_context.h @@ -16,15 +16,10 @@ extern void nv40_draw_elements_swtnl(struct pipe_context *pipe, extern void nv40_vertprog_destroy(struct nvfx_context *, struct nvfx_vertex_program *); -/* nv40_fragprog.c */ -extern void nv40_fragprog_destroy(struct nvfx_context *, - struct nvfx_fragment_program *); - /* nv40_fragtex.c */ extern void nv40_fragtex_bind(struct nvfx_context *); /* nv40_state.c and friends */ -extern struct nvfx_state_entry nv40_state_fragprog; extern struct nvfx_state_entry nv40_state_vertprog; extern struct nvfx_state_entry nv40_state_fragtex; extern struct nvfx_state_entry nv40_state_vbo; diff --git a/src/gallium/drivers/nv40/nv40_fragprog.c b/src/gallium/drivers/nv40/nv40_fragprog.c deleted file mode 100644 index e044f367a0..0000000000 --- a/src/gallium/drivers/nv40/nv40_fragprog.c +++ /dev/null @@ -1,984 +0,0 @@ -#include "pipe/p_context.h" -#include "pipe/p_defines.h" -#include "pipe/p_state.h" -#include "util/u_inlines.h" - -#include "pipe/p_shader_tokens.h" -#include "tgsi/tgsi_parse.h" -#include "tgsi/tgsi_util.h" - -#include "nv40_context.h" - -#define SWZ_X 0 -#define SWZ_Y 1 -#define SWZ_Z 2 -#define SWZ_W 3 -#define MASK_X 1 -#define MASK_Y 2 -#define MASK_Z 4 -#define MASK_W 8 -#define MASK_ALL (MASK_X|MASK_Y|MASK_Z|MASK_W) -#define DEF_SCALE NVFX_FP_OP_DST_SCALE_1X -#define DEF_CTEST NVFX_FP_OP_COND_TR -#include "nvfx_shader.h" - -#define swz(s,x,y,z,w) nvfx_sr_swz((s), SWZ_##x, SWZ_##y, SWZ_##z, SWZ_##w) -#define neg(s) nvfx_sr_neg((s)) -#define abs(s) nvfx_sr_abs((s)) -#define scale(s,v) nvfx_sr_scale((s), NVFX_FP_OP_DST_SCALE_##v) - -#define MAX_CONSTS 128 -#define MAX_IMM 32 -struct nv40_fpc { - struct nvfx_fragment_program *fp; - - uint attrib_map[PIPE_MAX_SHADER_INPUTS]; - - unsigned r_temps; - unsigned r_temps_discard; - struct nvfx_sreg r_result[PIPE_MAX_SHADER_OUTPUTS]; - struct nvfx_sreg *r_temp; - - int num_regs; - - unsigned inst_offset; - unsigned have_const; - - struct { - int pipe; - float vals[4]; - } consts[MAX_CONSTS]; - int nr_consts; - - struct nvfx_sreg imm[MAX_IMM]; - unsigned nr_imm; -}; - -static INLINE struct nvfx_sreg -temp(struct nv40_fpc *fpc) -{ - int idx = ffs(~fpc->r_temps) - 1; - - if (idx < 0) { - NOUVEAU_ERR("out of temps!!\n"); - assert(0); - return nvfx_sr(NVFXSR_TEMP, 0); - } - - fpc->r_temps |= (1 << idx); - fpc->r_temps_discard |= (1 << idx); - return nvfx_sr(NVFXSR_TEMP, idx); -} - -static INLINE void -release_temps(struct nv40_fpc *fpc) -{ - fpc->r_temps &= ~fpc->r_temps_discard; - fpc->r_temps_discard = 0; -} - -static INLINE struct nvfx_sreg -constant(struct nv40_fpc *fpc, int pipe, float vals[4]) -{ - int idx; - - if (fpc->nr_consts == MAX_CONSTS) - assert(0); - idx = fpc->nr_consts++; - - fpc->consts[idx].pipe = pipe; - if (pipe == -1) - memcpy(fpc->consts[idx].vals, vals, 4 * sizeof(float)); - return nvfx_sr(NVFXSR_CONST, idx); -} - -#define arith(cc,s,o,d,m,s0,s1,s2) \ - nv40_fp_arith((cc), (s), NVFX_FP_OP_OPCODE_##o, \ - (d), (m), (s0), (s1), (s2)) -#define tex(cc,s,o,u,d,m,s0,s1,s2) \ - nv40_fp_tex((cc), (s), NVFX_FP_OP_OPCODE_##o, (u), \ - (d), (m), (s0), none, none) - -static void -grow_insns(struct nv40_fpc *fpc, int size) -{ - struct nvfx_fragment_program *fp = fpc->fp; - - fp->insn_len += size; - fp->insn = realloc(fp->insn, sizeof(uint32_t) * fp->insn_len); -} - -static void -emit_src(struct nv40_fpc *fpc, int pos, struct nvfx_sreg src) -{ - struct nvfx_fragment_program *fp = fpc->fp; - uint32_t *hw = &fp->insn[fpc->inst_offset]; - uint32_t sr = 0; - - switch (src.type) { - case NVFXSR_INPUT: - sr |= (NVFX_FP_REG_TYPE_INPUT << NVFX_FP_REG_TYPE_SHIFT); - hw[0] |= (src.index << NVFX_FP_OP_INPUT_SRC_SHIFT); - break; - case NVFXSR_OUTPUT: - sr |= NVFX_FP_REG_SRC_HALF; - /* fall-through */ - case NVFXSR_TEMP: - sr |= (NVFX_FP_REG_TYPE_TEMP << NVFX_FP_REG_TYPE_SHIFT); - sr |= (src.index << NVFX_FP_REG_SRC_SHIFT); - break; - case NVFXSR_CONST: - if (!fpc->have_const) { - grow_insns(fpc, 4); - fpc->have_const = 1; - } - - hw = &fp->insn[fpc->inst_offset]; - if (fpc->consts[src.index].pipe >= 0) { - struct nvfx_fragment_program_data *fpd; - - fp->consts = realloc(fp->consts, ++fp->nr_consts * - sizeof(*fpd)); - fpd = &fp->consts[fp->nr_consts - 1]; - fpd->offset = fpc->inst_offset + 4; - fpd->index = fpc->consts[src.index].pipe; - memset(&fp->insn[fpd->offset], 0, sizeof(uint32_t) * 4); - } else { - memcpy(&fp->insn[fpc->inst_offset + 4], - fpc->consts[src.index].vals, - sizeof(uint32_t) * 4); - } - - sr |= (NVFX_FP_REG_TYPE_CONST << NVFX_FP_REG_TYPE_SHIFT); - break; - case NVFXSR_NONE: - sr |= (NVFX_FP_REG_TYPE_INPUT << NVFX_FP_REG_TYPE_SHIFT); - break; - default: - assert(0); - } - - if (src.negate) - sr |= NVFX_FP_REG_NEGATE; - - if (src.abs) - hw[1] |= (1 << (29 + pos)); - - sr |= ((src.swz[0] << NVFX_FP_REG_SWZ_X_SHIFT) | - (src.swz[1] << NVFX_FP_REG_SWZ_Y_SHIFT) | - (src.swz[2] << NVFX_FP_REG_SWZ_Z_SHIFT) | - (src.swz[3] << NVFX_FP_REG_SWZ_W_SHIFT)); - - hw[pos + 1] |= sr; -} - -static void -emit_dst(struct nv40_fpc *fpc, struct nvfx_sreg dst) -{ - struct nvfx_fragment_program *fp = fpc->fp; - uint32_t *hw = &fp->insn[fpc->inst_offset]; - - switch (dst.type) { - case NVFXSR_TEMP: - if (fpc->num_regs < (dst.index + 1)) - fpc->num_regs = dst.index + 1; - break; - case NVFXSR_OUTPUT: - if (dst.index == 1) { - fp->fp_control |= 0xe; - } else { - hw[0] |= NVFX_FP_OP_OUT_REG_HALF; - } - break; - case NVFXSR_NONE: - hw[0] |= (1 << 30); - break; - default: - assert(0); - } - - hw[0] |= (dst.index << NVFX_FP_OP_OUT_REG_SHIFT); -} - -static void -nv40_fp_arith(struct nv40_fpc *fpc, int sat, int op, - struct nvfx_sreg dst, int mask, - struct nvfx_sreg s0, struct nvfx_sreg s1, struct nvfx_sreg s2) -{ - struct nvfx_fragment_program *fp = fpc->fp; - uint32_t *hw; - - fpc->inst_offset = fp->insn_len; - fpc->have_const = 0; - grow_insns(fpc, 4); - hw = &fp->insn[fpc->inst_offset]; - memset(hw, 0, sizeof(uint32_t) * 4); - - if (op == NVFX_FP_OP_OPCODE_KIL) - fp->fp_control |= NV40TCL_FP_CONTROL_KIL; - hw[0] |= (op << NVFX_FP_OP_OPCODE_SHIFT); - hw[0] |= (mask << NVFX_FP_OP_OUTMASK_SHIFT); - hw[2] |= (dst.dst_scale << NVFX_FP_OP_DST_SCALE_SHIFT); - - if (sat) - hw[0] |= NVFX_FP_OP_OUT_SAT; - - if (dst.cc_update) - hw[0] |= NVFX_FP_OP_COND_WRITE_ENABLE; - hw[1] |= (dst.cc_test << NVFX_FP_OP_COND_SHIFT); - hw[1] |= ((dst.cc_swz[0] << NVFX_FP_OP_COND_SWZ_X_SHIFT) | - (dst.cc_swz[1] << NVFX_FP_OP_COND_SWZ_Y_SHIFT) | - (dst.cc_swz[2] << NVFX_FP_OP_COND_SWZ_Z_SHIFT) | - (dst.cc_swz[3] << NVFX_FP_OP_COND_SWZ_W_SHIFT)); - - emit_dst(fpc, dst); - emit_src(fpc, 0, s0); - emit_src(fpc, 1, s1); - emit_src(fpc, 2, s2); -} - -static void -nv40_fp_tex(struct nv40_fpc *fpc, int sat, int op, int unit, - struct nvfx_sreg dst, int mask, - struct nvfx_sreg s0, struct nvfx_sreg s1, struct nvfx_sreg s2) -{ - struct nvfx_fragment_program *fp = fpc->fp; - - nv40_fp_arith(fpc, sat, op, dst, mask, s0, s1, s2); - - fp->insn[fpc->inst_offset] |= (unit << NVFX_FP_OP_TEX_UNIT_SHIFT); - fp->samplers |= (1 << unit); -} - -static INLINE struct nvfx_sreg -tgsi_src(struct nv40_fpc *fpc, const struct tgsi_full_src_register *fsrc) -{ - struct nvfx_sreg src; - - switch (fsrc->Register.File) { - case TGSI_FILE_INPUT: - src = nvfx_sr(NVFXSR_INPUT, - fpc->attrib_map[fsrc->Register.Index]); - break; - case TGSI_FILE_CONSTANT: - src = constant(fpc, fsrc->Register.Index, NULL); - break; - case TGSI_FILE_IMMEDIATE: - assert(fsrc->Register.Index < fpc->nr_imm); - src = fpc->imm[fsrc->Register.Index]; - break; - case TGSI_FILE_TEMPORARY: - src = fpc->r_temp[fsrc->Register.Index]; - break; - /* NV40 fragprog result regs are just temps, so this is simple */ - case TGSI_FILE_OUTPUT: - src = fpc->r_result[fsrc->Register.Index]; - break; - default: - NOUVEAU_ERR("bad src file\n"); - break; - } - - src.abs = fsrc->Register.Absolute; - src.negate = fsrc->Register.Negate; - src.swz[0] = fsrc->Register.SwizzleX; - src.swz[1] = fsrc->Register.SwizzleY; - src.swz[2] = fsrc->Register.SwizzleZ; - src.swz[3] = fsrc->Register.SwizzleW; - return src; -} - -static INLINE struct nvfx_sreg -tgsi_dst(struct nv40_fpc *fpc, const struct tgsi_full_dst_register *fdst) { - switch (fdst->Register.File) { - case TGSI_FILE_OUTPUT: - return fpc->r_result[fdst->Register.Index]; - case TGSI_FILE_TEMPORARY: - return fpc->r_temp[fdst->Register.Index]; - case TGSI_FILE_NULL: - return nvfx_sr(NVFXSR_NONE, 0); - default: - NOUVEAU_ERR("bad dst file %d\n", fdst->Register.File); - return nvfx_sr(NVFXSR_NONE, 0); - } -} - -static INLINE int -tgsi_mask(uint tgsi) -{ - int mask = 0; - - if (tgsi & TGSI_WRITEMASK_X) mask |= MASK_X; - if (tgsi & TGSI_WRITEMASK_Y) mask |= MASK_Y; - if (tgsi & TGSI_WRITEMASK_Z) mask |= MASK_Z; - if (tgsi & TGSI_WRITEMASK_W) mask |= MASK_W; - return mask; -} - -static boolean -src_native_swz(struct nv40_fpc *fpc, const struct tgsi_full_src_register *fsrc, - struct nvfx_sreg *src) -{ - const struct nvfx_sreg none = nvfx_sr(NVFXSR_NONE, 0); - struct nvfx_sreg tgsi = tgsi_src(fpc, fsrc); - uint mask = 0; - uint c; - - for (c = 0; c < 4; c++) { - switch (tgsi_util_get_full_src_register_swizzle(fsrc, c)) { - case TGSI_SWIZZLE_X: - case TGSI_SWIZZLE_Y: - case TGSI_SWIZZLE_Z: - case TGSI_SWIZZLE_W: - mask |= (1 << c); - break; - default: - assert(0); - } - } - - if (mask == MASK_ALL) - return TRUE; - - *src = temp(fpc); - - if (mask) - arith(fpc, 0, MOV, *src, mask, tgsi, none, none); - - return FALSE; -} - -static boolean -nv40_fragprog_parse_instruction(struct nv40_fpc *fpc, - const struct tgsi_full_instruction *finst) -{ - const struct nvfx_sreg none = nvfx_sr(NVFXSR_NONE, 0); - struct nvfx_sreg src[3], dst, tmp; - int mask, sat, unit; - int ai = -1, ci = -1, ii = -1; - int i; - - if (finst->Instruction.Opcode == TGSI_OPCODE_END) - return TRUE; - - for (i = 0; i < finst->Instruction.NumSrcRegs; i++) { - const struct tgsi_full_src_register *fsrc; - - fsrc = &finst->Src[i]; - if (fsrc->Register.File == TGSI_FILE_TEMPORARY) { - src[i] = tgsi_src(fpc, fsrc); - } - } - - for (i = 0; i < finst->Instruction.NumSrcRegs; i++) { - const struct tgsi_full_src_register *fsrc; - - fsrc = &finst->Src[i]; - - switch (fsrc->Register.File) { - case TGSI_FILE_INPUT: - case TGSI_FILE_CONSTANT: - case TGSI_FILE_TEMPORARY: - if (!src_native_swz(fpc, fsrc, &src[i])) - continue; - break; - default: - break; - } - - switch (fsrc->Register.File) { - case TGSI_FILE_INPUT: - if (ai == -1 || ai == fsrc->Register.Index) { - ai = fsrc->Register.Index; - src[i] = tgsi_src(fpc, fsrc); - } else { - src[i] = temp(fpc); - arith(fpc, 0, MOV, src[i], MASK_ALL, - tgsi_src(fpc, fsrc), none, none); - } - break; - case TGSI_FILE_CONSTANT: - if ((ci == -1 && ii == -1) || - ci == fsrc->Register.Index) { - ci = fsrc->Register.Index; - src[i] = tgsi_src(fpc, fsrc); - } else { - src[i] = temp(fpc); - arith(fpc, 0, MOV, src[i], MASK_ALL, - tgsi_src(fpc, fsrc), none, none); - } - break; - case TGSI_FILE_IMMEDIATE: - if ((ci == -1 && ii == -1) || - ii == fsrc->Register.Index) { - ii = fsrc->Register.Index; - src[i] = tgsi_src(fpc, fsrc); - } else { - src[i] = temp(fpc); - arith(fpc, 0, MOV, src[i], MASK_ALL, - tgsi_src(fpc, fsrc), none, none); - } - break; - case TGSI_FILE_TEMPORARY: - /* handled above */ - break; - case TGSI_FILE_SAMPLER: - unit = fsrc->Register.Index; - break; - case TGSI_FILE_OUTPUT: - break; - default: - NOUVEAU_ERR("bad src file\n"); - return FALSE; - } - } - - dst = tgsi_dst(fpc, &finst->Dst[0]); - mask = tgsi_mask(finst->Dst[0].Register.WriteMask); - sat = (finst->Instruction.Saturate == TGSI_SAT_ZERO_ONE); - - switch (finst->Instruction.Opcode) { - case TGSI_OPCODE_ABS: - arith(fpc, sat, MOV, dst, mask, abs(src[0]), none, none); - break; - case TGSI_OPCODE_ADD: - arith(fpc, sat, ADD, dst, mask, src[0], src[1], none); - break; - case TGSI_OPCODE_CMP: - tmp = nvfx_sr(NVFXSR_NONE, 0); - tmp.cc_update = 1; - arith(fpc, 0, MOV, tmp, 0xf, src[0], none, none); - dst.cc_test = NVFX_VP_INST_COND_GE; - arith(fpc, sat, MOV, dst, mask, src[2], none, none); - dst.cc_test = NVFX_VP_INST_COND_LT; - arith(fpc, sat, MOV, dst, mask, src[1], none, none); - break; - case TGSI_OPCODE_COS: - arith(fpc, sat, COS, dst, mask, src[0], none, none); - break; - case TGSI_OPCODE_DDX: - if (mask & (MASK_Z | MASK_W)) { - tmp = temp(fpc); - arith(fpc, sat, DDX, tmp, MASK_X | MASK_Y, - swz(src[0], Z, W, Z, W), none, none); - arith(fpc, 0, MOV, tmp, MASK_Z | MASK_W, - swz(tmp, X, Y, X, Y), none, none); - arith(fpc, sat, DDX, tmp, MASK_X | MASK_Y, src[0], - none, none); - arith(fpc, 0, MOV, dst, mask, tmp, none, none); - } else { - arith(fpc, sat, DDX, dst, mask, src[0], none, none); - } - break; - case TGSI_OPCODE_DDY: - if (mask & (MASK_Z | MASK_W)) { - tmp = temp(fpc); - arith(fpc, sat, DDY, tmp, MASK_X | MASK_Y, - swz(src[0], Z, W, Z, W), none, none); - arith(fpc, 0, MOV, tmp, MASK_Z | MASK_W, - swz(tmp, X, Y, X, Y), none, none); - arith(fpc, sat, DDY, tmp, MASK_X | MASK_Y, src[0], - none, none); - arith(fpc, 0, MOV, dst, mask, tmp, none, none); - } else { - arith(fpc, sat, DDY, dst, mask, src[0], none, none); - } - break; - case TGSI_OPCODE_DP3: - arith(fpc, sat, DP3, dst, mask, src[0], src[1], none); - break; - case TGSI_OPCODE_DP4: - arith(fpc, sat, DP4, dst, mask, src[0], src[1], none); - break; - case TGSI_OPCODE_DPH: - tmp = temp(fpc); - arith(fpc, 0, DP3, tmp, MASK_X, src[0], src[1], none); - arith(fpc, sat, ADD, dst, mask, swz(tmp, X, X, X, X), - swz(src[1], W, W, W, W), none); - break; - case TGSI_OPCODE_DST: - arith(fpc, sat, DST, dst, mask, src[0], src[1], none); - break; - case TGSI_OPCODE_EX2: - arith(fpc, sat, EX2, dst, mask, src[0], none, none); - break; - case TGSI_OPCODE_FLR: - arith(fpc, sat, FLR, dst, mask, src[0], none, none); - break; - case TGSI_OPCODE_FRC: - arith(fpc, sat, FRC, dst, mask, src[0], none, none); - break; - case TGSI_OPCODE_KILP: - arith(fpc, 0, KIL, none, 0, none, none, none); - break; - case TGSI_OPCODE_KIL: - dst = nvfx_sr(NVFXSR_NONE, 0); - dst.cc_update = 1; - arith(fpc, 0, MOV, dst, MASK_ALL, src[0], none, none); - dst.cc_update = 0; dst.cc_test = NVFX_FP_OP_COND_LT; - arith(fpc, 0, KIL, dst, 0, none, none, none); - break; - case TGSI_OPCODE_LG2: - arith(fpc, sat, LG2, dst, mask, src[0], none, none); - break; -// case TGSI_OPCODE_LIT: - case TGSI_OPCODE_LRP: - tmp = temp(fpc); - arith(fpc, 0, MAD, tmp, mask, neg(src[0]), src[2], src[2]); - arith(fpc, sat, MAD, dst, mask, src[0], src[1], tmp); - break; - case TGSI_OPCODE_MAD: - arith(fpc, sat, MAD, dst, mask, src[0], src[1], src[2]); - break; - case TGSI_OPCODE_MAX: - arith(fpc, sat, MAX, dst, mask, src[0], src[1], none); - break; - case TGSI_OPCODE_MIN: - arith(fpc, sat, MIN, dst, mask, src[0], src[1], none); - break; - case TGSI_OPCODE_MOV: - arith(fpc, sat, MOV, dst, mask, src[0], none, none); - break; - case TGSI_OPCODE_MUL: - arith(fpc, sat, MUL, dst, mask, src[0], src[1], none); - break; - case TGSI_OPCODE_POW: - tmp = temp(fpc); - arith(fpc, 0, LG2, tmp, MASK_X, - swz(src[0], X, X, X, X), none, none); - arith(fpc, 0, MUL, tmp, MASK_X, swz(tmp, X, X, X, X), - swz(src[1], X, X, X, X), none); - arith(fpc, sat, EX2, dst, mask, - swz(tmp, X, X, X, X), none, none); - break; - case TGSI_OPCODE_RCP: - arith(fpc, sat, RCP, dst, mask, src[0], none, none); - break; - case TGSI_OPCODE_RET: - assert(0); - break; - case TGSI_OPCODE_RFL: - tmp = temp(fpc); - arith(fpc, 0, DP3, tmp, MASK_X, src[0], src[0], none); - arith(fpc, 0, DP3, tmp, MASK_Y, src[0], src[1], none); - arith(fpc, 0, DIV, scale(tmp, 2X), MASK_Z, - swz(tmp, Y, Y, Y, Y), swz(tmp, X, X, X, X), none); - arith(fpc, sat, MAD, dst, mask, - swz(tmp, Z, Z, Z, Z), src[0], neg(src[1])); - break; - case TGSI_OPCODE_RSQ: - tmp = temp(fpc); - arith(fpc, 0, LG2, scale(tmp, INV_2X), MASK_X, - abs(swz(src[0], X, X, X, X)), none, none); - arith(fpc, sat, EX2, dst, mask, - neg(swz(tmp, X, X, X, X)), none, none); - break; - case TGSI_OPCODE_SCS: - /* avoid overwriting the source */ - if(src[0].swz[SWZ_X] != SWZ_X) - { - if (mask & MASK_X) { - arith(fpc, sat, COS, dst, MASK_X, - swz(src[0], X, X, X, X), none, none); - } - if (mask & MASK_Y) { - arith(fpc, sat, SIN, dst, MASK_Y, - swz(src[0], X, X, X, X), none, none); - } - } - else - { - if (mask & MASK_Y) { - arith(fpc, sat, SIN, dst, MASK_Y, - swz(src[0], X, X, X, X), none, none); - } - if (mask & MASK_X) { - arith(fpc, sat, COS, dst, MASK_X, - swz(src[0], X, X, X, X), none, none); - } - } - break; - case TGSI_OPCODE_SEQ: - arith(fpc, sat, SEQ, dst, mask, src[0], src[1], none); - break; - case TGSI_OPCODE_SFL: - arith(fpc, sat, SFL, dst, mask, src[0], src[1], none); - break; - case TGSI_OPCODE_SGE: - arith(fpc, sat, SGE, dst, mask, src[0], src[1], none); - break; - case TGSI_OPCODE_SGT: - arith(fpc, sat, SGT, dst, mask, src[0], src[1], none); - break; - case TGSI_OPCODE_SIN: - arith(fpc, sat, SIN, dst, mask, src[0], none, none); - break; - case TGSI_OPCODE_SLE: - arith(fpc, sat, SLE, dst, mask, src[0], src[1], none); - break; - case TGSI_OPCODE_SLT: - arith(fpc, sat, SLT, dst, mask, src[0], src[1], none); - break; - case TGSI_OPCODE_SNE: - arith(fpc, sat, SNE, dst, mask, src[0], src[1], none); - break; - case TGSI_OPCODE_STR: - arith(fpc, sat, STR, dst, mask, src[0], src[1], none); - break; - case TGSI_OPCODE_SUB: - arith(fpc, sat, ADD, dst, mask, src[0], neg(src[1]), none); - break; - case TGSI_OPCODE_TEX: - tex(fpc, sat, TEX, unit, dst, mask, src[0], none, none); - break; - case TGSI_OPCODE_TXB: - tex(fpc, sat, TXB, unit, dst, mask, src[0], none, none); - break; - case TGSI_OPCODE_TXP: - tex(fpc, sat, TXP, unit, dst, mask, src[0], none, none); - break; - case TGSI_OPCODE_XPD: - tmp = temp(fpc); - arith(fpc, 0, MUL, tmp, mask, - swz(src[0], Z, X, Y, Y), swz(src[1], Y, Z, X, X), none); - arith(fpc, sat, MAD, dst, (mask & ~MASK_W), - swz(src[0], Y, Z, X, X), swz(src[1], Z, X, Y, Y), - neg(tmp)); - break; - default: - NOUVEAU_ERR("invalid opcode %d\n", finst->Instruction.Opcode); - return FALSE; - } - - release_temps(fpc); - return TRUE; -} - -static boolean -nv40_fragprog_parse_decl_attrib(struct nv40_fpc *fpc, - const struct tgsi_full_declaration *fdec) -{ - int hw; - - switch (fdec->Semantic.Name) { - case TGSI_SEMANTIC_POSITION: - hw = NVFX_FP_OP_INPUT_SRC_POSITION; - break; - case TGSI_SEMANTIC_COLOR: - if (fdec->Semantic.Index == 0) { - hw = NVFX_FP_OP_INPUT_SRC_COL0; - } else - if (fdec->Semantic.Index == 1) { - hw = NVFX_FP_OP_INPUT_SRC_COL1; - } else { - NOUVEAU_ERR("bad colour semantic index\n"); - return FALSE; - } - break; - case TGSI_SEMANTIC_FOG: - hw = NVFX_FP_OP_INPUT_SRC_FOGC; - break; - case TGSI_SEMANTIC_GENERIC: - if (fdec->Semantic.Index <= 7) { - hw = NVFX_FP_OP_INPUT_SRC_TC(fdec->Semantic. - Index); - } else { - NOUVEAU_ERR("bad generic semantic index\n"); - return FALSE; - } - break; - default: - NOUVEAU_ERR("bad input semantic\n"); - return FALSE; - } - - fpc->attrib_map[fdec->Range.First] = hw; - return TRUE; -} - -static boolean -nv40_fragprog_parse_decl_output(struct nv40_fpc *fpc, - const struct tgsi_full_declaration *fdec) -{ - unsigned idx = fdec->Range.First; - unsigned hw; - - switch (fdec->Semantic.Name) { - case TGSI_SEMANTIC_POSITION: - hw = 1; - break; - case TGSI_SEMANTIC_COLOR: - switch (fdec->Semantic.Index) { - case 0: hw = 0; break; - case 1: hw = 2; break; - case 2: hw = 3; break; - case 3: hw = 4; break; - default: - NOUVEAU_ERR("bad rcol index\n"); - return FALSE; - } - break; - default: - NOUVEAU_ERR("bad output semantic\n"); - return FALSE; - } - - fpc->r_result[idx] = nvfx_sr(NVFXSR_OUTPUT, hw); - fpc->r_temps |= (1 << hw); - return TRUE; -} - -static boolean -nv40_fragprog_prepare(struct nv40_fpc *fpc) -{ - struct tgsi_parse_context p; - int high_temp = -1, i; - - tgsi_parse_init(&p, fpc->fp->pipe.tokens); - while (!tgsi_parse_end_of_tokens(&p)) { - const union tgsi_full_token *tok = &p.FullToken; - - tgsi_parse_token(&p); - switch(tok->Token.Type) { - case TGSI_TOKEN_TYPE_DECLARATION: - { - const struct tgsi_full_declaration *fdec; - fdec = &p.FullToken.FullDeclaration; - switch (fdec->Declaration.File) { - case TGSI_FILE_INPUT: - if (!nv40_fragprog_parse_decl_attrib(fpc, fdec)) - goto out_err; - break; - case TGSI_FILE_OUTPUT: - if (!nv40_fragprog_parse_decl_output(fpc, fdec)) - goto out_err; - break; - case TGSI_FILE_TEMPORARY: - if (fdec->Range.Last > high_temp) { - high_temp = - fdec->Range.Last; - } - break; - default: - break; - } - } - break; - case TGSI_TOKEN_TYPE_IMMEDIATE: - { - struct tgsi_full_immediate *imm; - float vals[4]; - - imm = &p.FullToken.FullImmediate; - assert(imm->Immediate.DataType == TGSI_IMM_FLOAT32); - assert(fpc->nr_imm < MAX_IMM); - - vals[0] = imm->u[0].Float; - vals[1] = imm->u[1].Float; - vals[2] = imm->u[2].Float; - vals[3] = imm->u[3].Float; - fpc->imm[fpc->nr_imm++] = constant(fpc, -1, vals); - } - break; - default: - break; - } - } - tgsi_parse_free(&p); - - if (++high_temp) { - fpc->r_temp = CALLOC(high_temp, sizeof(struct nvfx_sreg)); - for (i = 0; i < high_temp; i++) - fpc->r_temp[i] = temp(fpc); - fpc->r_temps_discard = 0; - } - - return TRUE; - -out_err: - if (fpc->r_temp) - FREE(fpc->r_temp); - tgsi_parse_free(&p); - return FALSE; -} - -static void -nv40_fragprog_translate(struct nvfx_context *nvfx, - struct nvfx_fragment_program *fp) -{ - struct tgsi_parse_context parse; - struct nv40_fpc *fpc = NULL; - - fpc = CALLOC(1, sizeof(struct nv40_fpc)); - if (!fpc) - return; - fpc->fp = fp; - fpc->num_regs = 2; - - if (!nv40_fragprog_prepare(fpc)) { - FREE(fpc); - return; - } - - tgsi_parse_init(&parse, fp->pipe.tokens); - - while (!tgsi_parse_end_of_tokens(&parse)) { - tgsi_parse_token(&parse); - - switch (parse.FullToken.Token.Type) { - case TGSI_TOKEN_TYPE_INSTRUCTION: - { - const struct tgsi_full_instruction *finst; - - finst = &parse.FullToken.FullInstruction; - if (!nv40_fragprog_parse_instruction(fpc, finst)) - goto out_err; - } - break; - default: - break; - } - } - - fp->fp_control |= fpc->num_regs << NV40TCL_FP_CONTROL_TEMP_COUNT_SHIFT; - - /* Terminate final instruction */ - fp->insn[fpc->inst_offset] |= 0x00000001; - - /* Append NOP + END instruction, may or may not be necessary. */ - fpc->inst_offset = fp->insn_len; - grow_insns(fpc, 4); - fp->insn[fpc->inst_offset + 0] = 0x00000001; - fp->insn[fpc->inst_offset + 1] = 0x00000000; - fp->insn[fpc->inst_offset + 2] = 0x00000000; - fp->insn[fpc->inst_offset + 3] = 0x00000000; - - fp->translated = TRUE; -out_err: - tgsi_parse_free(&parse); - if (fpc->r_temp) - FREE(fpc->r_temp); - FREE(fpc); -} - -static void -nv40_fragprog_upload(struct nvfx_context *nvfx, - struct nvfx_fragment_program *fp) -{ - struct pipe_screen *pscreen = nvfx->pipe.screen; - const uint32_t le = 1; - uint32_t *map; - int i; - - map = pipe_buffer_map(pscreen, fp->buffer, PIPE_BUFFER_USAGE_CPU_WRITE); - -#if 0 - for (i = 0; i < fp->insn_len; i++) { - fflush(stdout); fflush(stderr); - NOUVEAU_ERR("%d 0x%08x\n", i, fp->insn[i]); - fflush(stdout); fflush(stderr); - } -#endif - - if ((*(const uint8_t *)&le)) { - for (i = 0; i < fp->insn_len; i++) { - map[i] = fp->insn[i]; - } - } else { - /* Weird swapping for big-endian chips */ - for (i = 0; i < fp->insn_len; i++) { - map[i] = ((fp->insn[i] & 0xffff) << 16) | - ((fp->insn[i] >> 16) & 0xffff); - } - } - - pipe_buffer_unmap(pscreen, fp->buffer); -} - -static boolean -nv40_fragprog_validate(struct nvfx_context *nvfx) -{ - struct nvfx_fragment_program *fp = nvfx->fragprog; - struct pipe_buffer *constbuf = - nvfx->constbuf[PIPE_SHADER_FRAGMENT]; - struct pipe_screen *pscreen = nvfx->pipe.screen; - struct nouveau_stateobj *so; - boolean new_consts = FALSE; - int i; - - if (fp->translated) - goto update_constants; - - nvfx->fallback_swrast &= ~NVFX_NEW_FRAGPROG; - nv40_fragprog_translate(nvfx, fp); - if (!fp->translated) { - nvfx->fallback_swrast |= NVFX_NEW_FRAGPROG; - return FALSE; - } - - fp->buffer = pscreen->buffer_create(pscreen, 0x100, 0, fp->insn_len * 4); - nv40_fragprog_upload(nvfx, fp); - - so = so_new(2, 2, 1); - so_method(so, nvfx->screen->eng3d, NV34TCL_FP_ACTIVE_PROGRAM, 1); - so_reloc (so, nouveau_bo(fp->buffer), 0, NOUVEAU_BO_VRAM | - NOUVEAU_BO_GART | NOUVEAU_BO_RD | NOUVEAU_BO_LOW | - NOUVEAU_BO_OR, NV34TCL_FP_ACTIVE_PROGRAM_DMA0, - NV34TCL_FP_ACTIVE_PROGRAM_DMA1); - so_method(so, nvfx->screen->eng3d, NV34TCL_FP_CONTROL, 1); - so_data (so, fp->fp_control); - so_ref(so, &fp->so); - so_ref(NULL, &so); - -update_constants: - if (fp->nr_consts) { - float *map; - - map = pipe_buffer_map(pscreen, constbuf, - PIPE_BUFFER_USAGE_CPU_READ); - for (i = 0; i < fp->nr_consts; i++) { - struct nvfx_fragment_program_data *fpd = &fp->consts[i]; - uint32_t *p = &fp->insn[fpd->offset]; - uint32_t *cb = (uint32_t *)&map[fpd->index * 4]; - - if (!memcmp(p, cb, 4 * sizeof(float))) - continue; - memcpy(p, cb, 4 * sizeof(float)); - new_consts = TRUE; - } - pipe_buffer_unmap(pscreen, constbuf); - - if (new_consts) - nv40_fragprog_upload(nvfx, fp); - } - - if (new_consts || fp->so != nvfx->state.hw[NVFX_STATE_FRAGPROG]) { - so_ref(fp->so, &nvfx->state.hw[NVFX_STATE_FRAGPROG]); - return TRUE; - } - - return FALSE; -} - -void -nv40_fragprog_destroy(struct nvfx_context *nvfx, - struct nvfx_fragment_program *fp) -{ - if (fp->buffer) - pipe_buffer_reference(&fp->buffer, NULL); - - if (fp->so) - so_ref(NULL, &fp->so); - - if (fp->insn_len) - FREE(fp->insn); -} - -struct nvfx_state_entry nv40_state_fragprog = { - .validate = nv40_fragprog_validate, - .dirty = { - .pipe = NVFX_NEW_FRAGPROG, - .hw = NVFX_STATE_FRAGPROG - } -}; - diff --git a/src/gallium/drivers/nv40/nv40_state.c b/src/gallium/drivers/nv40/nv40_state.c index a205342ac5..1f4b9777d4 100644 --- a/src/gallium/drivers/nv40/nv40_state.c +++ b/src/gallium/drivers/nv40/nv40_state.c @@ -577,7 +577,7 @@ nv40_fp_state_delete(struct pipe_context *pipe, void *hwcso) struct nvfx_context *nvfx = nvfx_context(pipe); struct nvfx_fragment_program *fp = hwcso; - nv40_fragprog_destroy(nvfx, fp); + nvfx_fragprog_destroy(nvfx, fp); FREE((void*)fp->pipe.tokens); FREE(fp); } diff --git a/src/gallium/drivers/nvfx/Makefile b/src/gallium/drivers/nvfx/Makefile index 2f80681e5c..f8c10a249b 100644 --- a/src/gallium/drivers/nvfx/Makefile +++ b/src/gallium/drivers/nvfx/Makefile @@ -5,10 +5,11 @@ LIBNAME = nvfx C_SOURCES = \ nvfx_clear.c \ - nvfx_state_emit.c \ + nvfx_fragprog.c \ nvfx_miptree.c \ nvfx_query.c \ nvfx_state_blend.c \ + nvfx_state_emit.c \ nvfx_state_fb.c \ nvfx_state_rasterizer.c \ nvfx_state_scissor.c \ diff --git a/src/gallium/drivers/nvfx/nvfx_context.h b/src/gallium/drivers/nvfx/nvfx_context.h index 28daa1d2e7..0a7a0f1252 100644 --- a/src/gallium/drivers/nvfx/nvfx_context.h +++ b/src/gallium/drivers/nvfx/nvfx_context.h @@ -183,6 +183,7 @@ struct nvfx_state_entry { extern struct nvfx_state_entry nvfx_state_blend; extern struct nvfx_state_entry nvfx_state_blend_colour; +extern struct nvfx_state_entry nvfx_state_fragprog; extern struct nvfx_state_entry nvfx_state_framebuffer; extern struct nvfx_state_entry nvfx_state_rasterizer; extern struct nvfx_state_entry nvfx_state_scissor; @@ -198,6 +199,10 @@ extern void nvfx_init_surface_functions(struct nvfx_context *nvfx); extern void nvfx_clear(struct pipe_context *pipe, unsigned buffers, const float *rgba, double depth, unsigned stencil); +/* nvfx_fragprog.c */ +extern void nvfx_fragprog_destroy(struct nvfx_context *, + struct nvfx_fragment_program *); + /* nvfx_state_emit.c */ extern void nvfx_state_flush_notify(struct nouveau_channel *chan); extern boolean nvfx_state_validate(struct nvfx_context *nvfx); diff --git a/src/gallium/drivers/nvfx/nvfx_fragprog.c b/src/gallium/drivers/nvfx/nvfx_fragprog.c new file mode 100644 index 0000000000..ecc193877b --- /dev/null +++ b/src/gallium/drivers/nvfx/nvfx_fragprog.c @@ -0,0 +1,1011 @@ +#include "pipe/p_context.h" +#include "pipe/p_defines.h" +#include "pipe/p_state.h" +#include "util/u_inlines.h" + +#include "pipe/p_shader_tokens.h" +#include "tgsi/tgsi_parse.h" +#include "tgsi/tgsi_util.h" + +#include "nvfx_context.h" + +#define SWZ_X 0 +#define SWZ_Y 1 +#define SWZ_Z 2 +#define SWZ_W 3 +#define MASK_X 1 +#define MASK_Y 2 +#define MASK_Z 4 +#define MASK_W 8 +#define MASK_ALL (MASK_X|MASK_Y|MASK_Z|MASK_W) +#define DEF_SCALE NVFX_FP_OP_DST_SCALE_1X +#define DEF_CTEST NVFX_FP_OP_COND_TR +#include "nvfx_shader.h" + +#define swz(s,x,y,z,w) nvfx_sr_swz((s), SWZ_##x, SWZ_##y, SWZ_##z, SWZ_##w) +#define neg(s) nvfx_sr_neg((s)) +#define abs(s) nvfx_sr_abs((s)) +#define scale(s,v) nvfx_sr_scale((s), NVFX_FP_OP_DST_SCALE_##v) + +#define MAX_CONSTS 128 +#define MAX_IMM 32 +struct nvfx_fpc { + struct nvfx_fragment_program *fp; + + uint attrib_map[PIPE_MAX_SHADER_INPUTS]; + + unsigned r_temps; + unsigned r_temps_discard; + struct nvfx_sreg r_result[PIPE_MAX_SHADER_OUTPUTS]; + struct nvfx_sreg *r_temp; + + int num_regs; + + unsigned inst_offset; + unsigned have_const; + + struct { + int pipe; + float vals[4]; + } consts[MAX_CONSTS]; + int nr_consts; + + struct nvfx_sreg imm[MAX_IMM]; + unsigned nr_imm; +}; + +static INLINE struct nvfx_sreg +temp(struct nvfx_fpc *fpc) +{ + int idx = ffs(~fpc->r_temps) - 1; + + if (idx < 0) { + NOUVEAU_ERR("out of temps!!\n"); + assert(0); + return nvfx_sr(NVFXSR_TEMP, 0); + } + + fpc->r_temps |= (1 << idx); + fpc->r_temps_discard |= (1 << idx); + return nvfx_sr(NVFXSR_TEMP, idx); +} + +static INLINE void +release_temps(struct nvfx_fpc *fpc) +{ + fpc->r_temps &= ~fpc->r_temps_discard; + fpc->r_temps_discard = 0; +} + +static INLINE struct nvfx_sreg +constant(struct nvfx_fpc *fpc, int pipe, float vals[4]) +{ + int idx; + + if (fpc->nr_consts == MAX_CONSTS) + assert(0); + idx = fpc->nr_consts++; + + fpc->consts[idx].pipe = pipe; + if (pipe == -1) + memcpy(fpc->consts[idx].vals, vals, 4 * sizeof(float)); + return nvfx_sr(NVFXSR_CONST, idx); +} + +#define arith(cc,s,o,d,m,s0,s1,s2) \ + nvfx_fp_arith((cc), (s), NVFX_FP_OP_OPCODE_##o, \ + (d), (m), (s0), (s1), (s2)) +#define tex(cc,s,o,u,d,m,s0,s1,s2) \ + nvfx_fp_tex((cc), (s), NVFX_FP_OP_OPCODE_##o, (u), \ + (d), (m), (s0), none, none) + +static void +grow_insns(struct nvfx_fpc *fpc, int size) +{ + struct nvfx_fragment_program *fp = fpc->fp; + + fp->insn_len += size; + fp->insn = realloc(fp->insn, sizeof(uint32_t) * fp->insn_len); +} + +static void +emit_src(struct nvfx_fpc *fpc, int pos, struct nvfx_sreg src) +{ + struct nvfx_fragment_program *fp = fpc->fp; + uint32_t *hw = &fp->insn[fpc->inst_offset]; + uint32_t sr = 0; + + switch (src.type) { + case NVFXSR_INPUT: + sr |= (NVFX_FP_REG_TYPE_INPUT << NVFX_FP_REG_TYPE_SHIFT); + hw[0] |= (src.index << NVFX_FP_OP_INPUT_SRC_SHIFT); + break; + case NVFXSR_OUTPUT: + sr |= NVFX_FP_REG_SRC_HALF; + /* fall-through */ + case NVFXSR_TEMP: + sr |= (NVFX_FP_REG_TYPE_TEMP << NVFX_FP_REG_TYPE_SHIFT); + sr |= (src.index << NVFX_FP_REG_SRC_SHIFT); + break; + case NVFXSR_CONST: + if (!fpc->have_const) { + grow_insns(fpc, 4); + fpc->have_const = 1; + } + + hw = &fp->insn[fpc->inst_offset]; + if (fpc->consts[src.index].pipe >= 0) { + struct nvfx_fragment_program_data *fpd; + + fp->consts = realloc(fp->consts, ++fp->nr_consts * + sizeof(*fpd)); + fpd = &fp->consts[fp->nr_consts - 1]; + fpd->offset = fpc->inst_offset + 4; + fpd->index = fpc->consts[src.index].pipe; + memset(&fp->insn[fpd->offset], 0, sizeof(uint32_t) * 4); + } else { + memcpy(&fp->insn[fpc->inst_offset + 4], + fpc->consts[src.index].vals, + sizeof(uint32_t) * 4); + } + + sr |= (NVFX_FP_REG_TYPE_CONST << NVFX_FP_REG_TYPE_SHIFT); + break; + case NVFXSR_NONE: + sr |= (NVFX_FP_REG_TYPE_INPUT << NVFX_FP_REG_TYPE_SHIFT); + break; + default: + assert(0); + } + + if (src.negate) + sr |= NVFX_FP_REG_NEGATE; + + if (src.abs) + hw[1] |= (1 << (29 + pos)); + + sr |= ((src.swz[0] << NVFX_FP_REG_SWZ_X_SHIFT) | + (src.swz[1] << NVFX_FP_REG_SWZ_Y_SHIFT) | + (src.swz[2] << NVFX_FP_REG_SWZ_Z_SHIFT) | + (src.swz[3] << NVFX_FP_REG_SWZ_W_SHIFT)); + + hw[pos + 1] |= sr; +} + +static void +emit_dst(struct nvfx_fpc *fpc, struct nvfx_sreg dst) +{ + struct nvfx_fragment_program *fp = fpc->fp; + uint32_t *hw = &fp->insn[fpc->inst_offset]; + + switch (dst.type) { + case NVFXSR_TEMP: + if (fpc->num_regs < (dst.index + 1)) + fpc->num_regs = dst.index + 1; + break; + case NVFXSR_OUTPUT: + if (dst.index == 1) { + fp->fp_control |= 0xe; + } else { + hw[0] |= NVFX_FP_OP_OUT_REG_HALF; + } + break; + case NVFXSR_NONE: + hw[0] |= (1 << 30); + break; + default: + assert(0); + } + + hw[0] |= (dst.index << NVFX_FP_OP_OUT_REG_SHIFT); +} + +static void +nvfx_fp_arith(struct nvfx_fpc *fpc, int sat, int op, + struct nvfx_sreg dst, int mask, + struct nvfx_sreg s0, struct nvfx_sreg s1, struct nvfx_sreg s2) +{ + struct nvfx_fragment_program *fp = fpc->fp; + uint32_t *hw; + + fpc->inst_offset = fp->insn_len; + fpc->have_const = 0; + grow_insns(fpc, 4); + hw = &fp->insn[fpc->inst_offset]; + memset(hw, 0, sizeof(uint32_t) * 4); + + if (op == NVFX_FP_OP_OPCODE_KIL) + fp->fp_control |= NV34TCL_FP_CONTROL_USES_KIL; + hw[0] |= (op << NVFX_FP_OP_OPCODE_SHIFT); + hw[0] |= (mask << NVFX_FP_OP_OUTMASK_SHIFT); + hw[2] |= (dst.dst_scale << NVFX_FP_OP_DST_SCALE_SHIFT); + + if (sat) + hw[0] |= NVFX_FP_OP_OUT_SAT; + + if (dst.cc_update) + hw[0] |= NVFX_FP_OP_COND_WRITE_ENABLE; + hw[1] |= (dst.cc_test << NVFX_FP_OP_COND_SHIFT); + hw[1] |= ((dst.cc_swz[0] << NVFX_FP_OP_COND_SWZ_X_SHIFT) | + (dst.cc_swz[1] << NVFX_FP_OP_COND_SWZ_Y_SHIFT) | + (dst.cc_swz[2] << NVFX_FP_OP_COND_SWZ_Z_SHIFT) | + (dst.cc_swz[3] << NVFX_FP_OP_COND_SWZ_W_SHIFT)); + + emit_dst(fpc, dst); + emit_src(fpc, 0, s0); + emit_src(fpc, 1, s1); + emit_src(fpc, 2, s2); +} + +static void +nvfx_fp_tex(struct nvfx_fpc *fpc, int sat, int op, int unit, + struct nvfx_sreg dst, int mask, + struct nvfx_sreg s0, struct nvfx_sreg s1, struct nvfx_sreg s2) +{ + struct nvfx_fragment_program *fp = fpc->fp; + + nvfx_fp_arith(fpc, sat, op, dst, mask, s0, s1, s2); + + fp->insn[fpc->inst_offset] |= (unit << NVFX_FP_OP_TEX_UNIT_SHIFT); + fp->samplers |= (1 << unit); +} + +static INLINE struct nvfx_sreg +tgsi_src(struct nvfx_fpc *fpc, const struct tgsi_full_src_register *fsrc) +{ + struct nvfx_sreg src; + + switch (fsrc->Register.File) { + case TGSI_FILE_INPUT: + src = nvfx_sr(NVFXSR_INPUT, + fpc->attrib_map[fsrc->Register.Index]); + break; + case TGSI_FILE_CONSTANT: + src = constant(fpc, fsrc->Register.Index, NULL); + break; + case TGSI_FILE_IMMEDIATE: + assert(fsrc->Register.Index < fpc->nr_imm); + src = fpc->imm[fsrc->Register.Index]; + break; + case TGSI_FILE_TEMPORARY: + src = fpc->r_temp[fsrc->Register.Index]; + break; + /* NV40 fragprog result regs are just temps, so this is simple */ + case TGSI_FILE_OUTPUT: + src = fpc->r_result[fsrc->Register.Index]; + break; + default: + NOUVEAU_ERR("bad src file\n"); + break; + } + + src.abs = fsrc->Register.Absolute; + src.negate = fsrc->Register.Negate; + src.swz[0] = fsrc->Register.SwizzleX; + src.swz[1] = fsrc->Register.SwizzleY; + src.swz[2] = fsrc->Register.SwizzleZ; + src.swz[3] = fsrc->Register.SwizzleW; + return src; +} + +static INLINE struct nvfx_sreg +tgsi_dst(struct nvfx_fpc *fpc, const struct tgsi_full_dst_register *fdst) { + switch (fdst->Register.File) { + case TGSI_FILE_OUTPUT: + return fpc->r_result[fdst->Register.Index]; + case TGSI_FILE_TEMPORARY: + return fpc->r_temp[fdst->Register.Index]; + case TGSI_FILE_NULL: + return nvfx_sr(NVFXSR_NONE, 0); + default: + NOUVEAU_ERR("bad dst file %d\n", fdst->Register.File); + return nvfx_sr(NVFXSR_NONE, 0); + } +} + +static INLINE int +tgsi_mask(uint tgsi) +{ + int mask = 0; + + if (tgsi & TGSI_WRITEMASK_X) mask |= MASK_X; + if (tgsi & TGSI_WRITEMASK_Y) mask |= MASK_Y; + if (tgsi & TGSI_WRITEMASK_Z) mask |= MASK_Z; + if (tgsi & TGSI_WRITEMASK_W) mask |= MASK_W; + return mask; +} + +static boolean +src_native_swz(struct nvfx_fpc *fpc, const struct tgsi_full_src_register *fsrc, + struct nvfx_sreg *src) +{ + const struct nvfx_sreg none = nvfx_sr(NVFXSR_NONE, 0); + struct nvfx_sreg tgsi = tgsi_src(fpc, fsrc); + uint mask = 0; + uint c; + + for (c = 0; c < 4; c++) { + switch (tgsi_util_get_full_src_register_swizzle(fsrc, c)) { + case TGSI_SWIZZLE_X: + case TGSI_SWIZZLE_Y: + case TGSI_SWIZZLE_Z: + case TGSI_SWIZZLE_W: + mask |= (1 << c); + break; + default: + assert(0); + } + } + + if (mask == MASK_ALL) + return TRUE; + + *src = temp(fpc); + + if (mask) + arith(fpc, 0, MOV, *src, mask, tgsi, none, none); + + return FALSE; +} + +static boolean +nvfx_fragprog_parse_instruction(struct nvfx_context* nvfx, struct nvfx_fpc *fpc, + const struct tgsi_full_instruction *finst) +{ + const struct nvfx_sreg none = nvfx_sr(NVFXSR_NONE, 0); + struct nvfx_sreg src[3], dst, tmp; + int mask, sat, unit; + int ai = -1, ci = -1, ii = -1; + int i; + + if (finst->Instruction.Opcode == TGSI_OPCODE_END) + return TRUE; + + for (i = 0; i < finst->Instruction.NumSrcRegs; i++) { + const struct tgsi_full_src_register *fsrc; + + fsrc = &finst->Src[i]; + if (fsrc->Register.File == TGSI_FILE_TEMPORARY) { + src[i] = tgsi_src(fpc, fsrc); + } + } + + for (i = 0; i < finst->Instruction.NumSrcRegs; i++) { + const struct tgsi_full_src_register *fsrc; + + fsrc = &finst->Src[i]; + + switch (fsrc->Register.File) { + case TGSI_FILE_INPUT: + case TGSI_FILE_CONSTANT: + case TGSI_FILE_TEMPORARY: + if (!src_native_swz(fpc, fsrc, &src[i])) + continue; + break; + default: + break; + } + + switch (fsrc->Register.File) { + case TGSI_FILE_INPUT: + if (ai == -1 || ai == fsrc->Register.Index) { + ai = fsrc->Register.Index; + src[i] = tgsi_src(fpc, fsrc); + } else { + src[i] = temp(fpc); + arith(fpc, 0, MOV, src[i], MASK_ALL, + tgsi_src(fpc, fsrc), none, none); + } + break; + case TGSI_FILE_CONSTANT: + if ((ci == -1 && ii == -1) || + ci == fsrc->Register.Index) { + ci = fsrc->Register.Index; + src[i] = tgsi_src(fpc, fsrc); + } else { + src[i] = temp(fpc); + arith(fpc, 0, MOV, src[i], MASK_ALL, + tgsi_src(fpc, fsrc), none, none); + } + break; + case TGSI_FILE_IMMEDIATE: + if ((ci == -1 && ii == -1) || + ii == fsrc->Register.Index) { + ii = fsrc->Register.Index; + src[i] = tgsi_src(fpc, fsrc); + } else { + src[i] = temp(fpc); + arith(fpc, 0, MOV, src[i], MASK_ALL, + tgsi_src(fpc, fsrc), none, none); + } + break; + case TGSI_FILE_TEMPORARY: + /* handled above */ + break; + case TGSI_FILE_SAMPLER: + unit = fsrc->Register.Index; + break; + case TGSI_FILE_OUTPUT: + break; + default: + NOUVEAU_ERR("bad src file\n"); + return FALSE; + } + } + + dst = tgsi_dst(fpc, &finst->Dst[0]); + mask = tgsi_mask(finst->Dst[0].Register.WriteMask); + sat = (finst->Instruction.Saturate == TGSI_SAT_ZERO_ONE); + + switch (finst->Instruction.Opcode) { + case TGSI_OPCODE_ABS: + arith(fpc, sat, MOV, dst, mask, abs(src[0]), none, none); + break; + case TGSI_OPCODE_ADD: + arith(fpc, sat, ADD, dst, mask, src[0], src[1], none); + break; + case TGSI_OPCODE_CMP: + tmp = nvfx_sr(NVFXSR_NONE, 0); + tmp.cc_update = 1; + arith(fpc, 0, MOV, tmp, 0xf, src[0], none, none); + dst.cc_test = NVFX_VP_INST_COND_GE; + arith(fpc, sat, MOV, dst, mask, src[2], none, none); + dst.cc_test = NVFX_VP_INST_COND_LT; + arith(fpc, sat, MOV, dst, mask, src[1], none, none); + break; + case TGSI_OPCODE_COS: + arith(fpc, sat, COS, dst, mask, src[0], none, none); + break; + case TGSI_OPCODE_DDX: + if (mask & (MASK_Z | MASK_W)) { + tmp = temp(fpc); + arith(fpc, sat, DDX, tmp, MASK_X | MASK_Y, + swz(src[0], Z, W, Z, W), none, none); + arith(fpc, 0, MOV, tmp, MASK_Z | MASK_W, + swz(tmp, X, Y, X, Y), none, none); + arith(fpc, sat, DDX, tmp, MASK_X | MASK_Y, src[0], + none, none); + arith(fpc, 0, MOV, dst, mask, tmp, none, none); + } else { + arith(fpc, sat, DDX, dst, mask, src[0], none, none); + } + break; + case TGSI_OPCODE_DDY: + if (mask & (MASK_Z | MASK_W)) { + tmp = temp(fpc); + arith(fpc, sat, DDY, tmp, MASK_X | MASK_Y, + swz(src[0], Z, W, Z, W), none, none); + arith(fpc, 0, MOV, tmp, MASK_Z | MASK_W, + swz(tmp, X, Y, X, Y), none, none); + arith(fpc, sat, DDY, tmp, MASK_X | MASK_Y, src[0], + none, none); + arith(fpc, 0, MOV, dst, mask, tmp, none, none); + } else { + arith(fpc, sat, DDY, dst, mask, src[0], none, none); + } + break; + case TGSI_OPCODE_DP3: + arith(fpc, sat, DP3, dst, mask, src[0], src[1], none); + break; + case TGSI_OPCODE_DP4: + arith(fpc, sat, DP4, dst, mask, src[0], src[1], none); + break; + case TGSI_OPCODE_DPH: + tmp = temp(fpc); + arith(fpc, 0, DP3, tmp, MASK_X, src[0], src[1], none); + arith(fpc, sat, ADD, dst, mask, swz(tmp, X, X, X, X), + swz(src[1], W, W, W, W), none); + break; + case TGSI_OPCODE_DST: + arith(fpc, sat, DST, dst, mask, src[0], src[1], none); + break; + case TGSI_OPCODE_EX2: + arith(fpc, sat, EX2, dst, mask, src[0], none, none); + break; + case TGSI_OPCODE_FLR: + arith(fpc, sat, FLR, dst, mask, src[0], none, none); + break; + case TGSI_OPCODE_FRC: + arith(fpc, sat, FRC, dst, mask, src[0], none, none); + break; + case TGSI_OPCODE_KILP: + arith(fpc, 0, KIL, none, 0, none, none, none); + break; + case TGSI_OPCODE_KIL: + dst = nvfx_sr(NVFXSR_NONE, 0); + dst.cc_update = 1; + arith(fpc, 0, MOV, dst, MASK_ALL, src[0], none, none); + dst.cc_update = 0; dst.cc_test = NVFX_FP_OP_COND_LT; + arith(fpc, 0, KIL, dst, 0, none, none, none); + break; + case TGSI_OPCODE_LG2: + arith(fpc, sat, LG2, dst, mask, src[0], none, none); + break; +// case TGSI_OPCODE_LIT: + case TGSI_OPCODE_LRP: + if(!nvfx->is_nv4x) + arith(fpc, sat, LRP_NV30, dst, mask, src[0], src[1], src[2]); + else { + tmp = temp(fpc); + arith(fpc, 0, MAD, tmp, mask, neg(src[0]), src[2], src[2]); + arith(fpc, sat, MAD, dst, mask, src[0], src[1], tmp); + } + break; + case TGSI_OPCODE_MAD: + arith(fpc, sat, MAD, dst, mask, src[0], src[1], src[2]); + break; + case TGSI_OPCODE_MAX: + arith(fpc, sat, MAX, dst, mask, src[0], src[1], none); + break; + case TGSI_OPCODE_MIN: + arith(fpc, sat, MIN, dst, mask, src[0], src[1], none); + break; + case TGSI_OPCODE_MOV: + arith(fpc, sat, MOV, dst, mask, src[0], none, none); + break; + case TGSI_OPCODE_MUL: + arith(fpc, sat, MUL, dst, mask, src[0], src[1], none); + break; + case TGSI_OPCODE_POW: + if(!nvfx->is_nv4x) + arith(fpc, sat, POW_NV30, dst, mask, src[0], src[1], none); + else { + tmp = temp(fpc); + arith(fpc, 0, LG2, tmp, MASK_X, + swz(src[0], X, X, X, X), none, none); + arith(fpc, 0, MUL, tmp, MASK_X, swz(tmp, X, X, X, X), + swz(src[1], X, X, X, X), none); + arith(fpc, sat, EX2, dst, mask, + swz(tmp, X, X, X, X), none, none); + } + break; + case TGSI_OPCODE_RCP: + arith(fpc, sat, RCP, dst, mask, src[0], none, none); + break; + case TGSI_OPCODE_RET: + assert(0); + break; + case TGSI_OPCODE_RFL: + if(!nvfx->is_nv4x) + arith(fpc, 0, RFL_NV30, dst, mask, src[0], src[1], none); + else { + tmp = temp(fpc); + arith(fpc, 0, DP3, tmp, MASK_X, src[0], src[0], none); + arith(fpc, 0, DP3, tmp, MASK_Y, src[0], src[1], none); + arith(fpc, 0, DIV, scale(tmp, 2X), MASK_Z, + swz(tmp, Y, Y, Y, Y), swz(tmp, X, X, X, X), none); + arith(fpc, sat, MAD, dst, mask, + swz(tmp, Z, Z, Z, Z), src[0], neg(src[1])); + } + break; + case TGSI_OPCODE_RSQ: + if(!nvfx->is_nv4x) + arith(fpc, sat, RSQ_NV30, dst, mask, abs(swz(src[0], X, X, X, X)), none, none); + else { + tmp = temp(fpc); + arith(fpc, 0, LG2, scale(tmp, INV_2X), MASK_X, + abs(swz(src[0], X, X, X, X)), none, none); + arith(fpc, sat, EX2, dst, mask, + neg(swz(tmp, X, X, X, X)), none, none); + } + break; + case TGSI_OPCODE_SCS: + /* avoid overwriting the source */ + if(src[0].swz[SWZ_X] != SWZ_X) + { + if (mask & MASK_X) { + arith(fpc, sat, COS, dst, MASK_X, + swz(src[0], X, X, X, X), none, none); + } + if (mask & MASK_Y) { + arith(fpc, sat, SIN, dst, MASK_Y, + swz(src[0], X, X, X, X), none, none); + } + } + else + { + if (mask & MASK_Y) { + arith(fpc, sat, SIN, dst, MASK_Y, + swz(src[0], X, X, X, X), none, none); + } + if (mask & MASK_X) { + arith(fpc, sat, COS, dst, MASK_X, + swz(src[0], X, X, X, X), none, none); + } + } + break; + case TGSI_OPCODE_SEQ: + arith(fpc, sat, SEQ, dst, mask, src[0], src[1], none); + break; + case TGSI_OPCODE_SFL: + arith(fpc, sat, SFL, dst, mask, src[0], src[1], none); + break; + case TGSI_OPCODE_SGE: + arith(fpc, sat, SGE, dst, mask, src[0], src[1], none); + break; + case TGSI_OPCODE_SGT: + arith(fpc, sat, SGT, dst, mask, src[0], src[1], none); + break; + case TGSI_OPCODE_SIN: + arith(fpc, sat, SIN, dst, mask, src[0], none, none); + break; + case TGSI_OPCODE_SLE: + arith(fpc, sat, SLE, dst, mask, src[0], src[1], none); + break; + case TGSI_OPCODE_SLT: + arith(fpc, sat, SLT, dst, mask, src[0], src[1], none); + break; + case TGSI_OPCODE_SNE: + arith(fpc, sat, SNE, dst, mask, src[0], src[1], none); + break; + case TGSI_OPCODE_STR: + arith(fpc, sat, STR, dst, mask, src[0], src[1], none); + break; + case TGSI_OPCODE_SUB: + arith(fpc, sat, ADD, dst, mask, src[0], neg(src[1]), none); + break; + case TGSI_OPCODE_TEX: + tex(fpc, sat, TEX, unit, dst, mask, src[0], none, none); + break; + case TGSI_OPCODE_TXB: + tex(fpc, sat, TXB, unit, dst, mask, src[0], none, none); + break; + case TGSI_OPCODE_TXP: + tex(fpc, sat, TXP, unit, dst, mask, src[0], none, none); + break; + case TGSI_OPCODE_XPD: + tmp = temp(fpc); + arith(fpc, 0, MUL, tmp, mask, + swz(src[0], Z, X, Y, Y), swz(src[1], Y, Z, X, X), none); + arith(fpc, sat, MAD, dst, (mask & ~MASK_W), + swz(src[0], Y, Z, X, X), swz(src[1], Z, X, Y, Y), + neg(tmp)); + break; + default: + NOUVEAU_ERR("invalid opcode %d\n", finst->Instruction.Opcode); + return FALSE; + } + + release_temps(fpc); + return TRUE; +} + +static boolean +nvfx_fragprog_parse_decl_attrib(struct nvfx_context* nvfx, struct nvfx_fpc *fpc, + const struct tgsi_full_declaration *fdec) +{ + int hw; + + switch (fdec->Semantic.Name) { + case TGSI_SEMANTIC_POSITION: + hw = NVFX_FP_OP_INPUT_SRC_POSITION; + break; + case TGSI_SEMANTIC_COLOR: + if (fdec->Semantic.Index == 0) { + hw = NVFX_FP_OP_INPUT_SRC_COL0; + } else + if (fdec->Semantic.Index == 1) { + hw = NVFX_FP_OP_INPUT_SRC_COL1; + } else { + NOUVEAU_ERR("bad colour semantic index\n"); + return FALSE; + } + break; + case TGSI_SEMANTIC_FOG: + hw = NVFX_FP_OP_INPUT_SRC_FOGC; + break; + case TGSI_SEMANTIC_GENERIC: + if (fdec->Semantic.Index <= 7) { + hw = NVFX_FP_OP_INPUT_SRC_TC(fdec->Semantic. + Index); + } else { + NOUVEAU_ERR("bad generic semantic index\n"); + return FALSE; + } + break; + default: + NOUVEAU_ERR("bad input semantic\n"); + return FALSE; + } + + fpc->attrib_map[fdec->Range.First] = hw; + return TRUE; +} + +static boolean +nvfx_fragprog_parse_decl_output(struct nvfx_context* nvfx, struct nvfx_fpc *fpc, + const struct tgsi_full_declaration *fdec) +{ + unsigned idx = fdec->Range.First; + unsigned hw; + + switch (fdec->Semantic.Name) { + case TGSI_SEMANTIC_POSITION: + hw = 1; + break; + case TGSI_SEMANTIC_COLOR: + hw = ~0; + switch (fdec->Semantic.Index) { + case 0: hw = 0; break; + case 1: hw = 2; break; + case 2: hw = 3; break; + case 3: hw = 4; break; + } + if(hw > ((nvfx->is_nv4x) ? 4 : 2)) { + NOUVEAU_ERR("bad rcol index\n"); + return FALSE; + } + break; + default: + NOUVEAU_ERR("bad output semantic\n"); + return FALSE; + } + + fpc->r_result[idx] = nvfx_sr(NVFXSR_OUTPUT, hw); + fpc->r_temps |= (1 << hw); + return TRUE; +} + +static boolean +nvfx_fragprog_prepare(struct nvfx_context* nvfx, struct nvfx_fpc *fpc) +{ + struct tgsi_parse_context p; + int high_temp = -1, i; + + tgsi_parse_init(&p, fpc->fp->pipe.tokens); + while (!tgsi_parse_end_of_tokens(&p)) { + const union tgsi_full_token *tok = &p.FullToken; + + tgsi_parse_token(&p); + switch(tok->Token.Type) { + case TGSI_TOKEN_TYPE_DECLARATION: + { + const struct tgsi_full_declaration *fdec; + fdec = &p.FullToken.FullDeclaration; + switch (fdec->Declaration.File) { + case TGSI_FILE_INPUT: + if (!nvfx_fragprog_parse_decl_attrib(nvfx, fpc, fdec)) + goto out_err; + break; + case TGSI_FILE_OUTPUT: + if (!nvfx_fragprog_parse_decl_output(nvfx, fpc, fdec)) + goto out_err; + break; + case TGSI_FILE_TEMPORARY: + if (fdec->Range.Last > high_temp) { + high_temp = + fdec->Range.Last; + } + break; + default: + break; + } + } + break; + case TGSI_TOKEN_TYPE_IMMEDIATE: + { + struct tgsi_full_immediate *imm; + float vals[4]; + + imm = &p.FullToken.FullImmediate; + assert(imm->Immediate.DataType == TGSI_IMM_FLOAT32); + assert(fpc->nr_imm < MAX_IMM); + + vals[0] = imm->u[0].Float; + vals[1] = imm->u[1].Float; + vals[2] = imm->u[2].Float; + vals[3] = imm->u[3].Float; + fpc->imm[fpc->nr_imm++] = constant(fpc, -1, vals); + } + break; + default: + break; + } + } + tgsi_parse_free(&p); + + if (++high_temp) { + fpc->r_temp = CALLOC(high_temp, sizeof(struct nvfx_sreg)); + for (i = 0; i < high_temp; i++) + fpc->r_temp[i] = temp(fpc); + fpc->r_temps_discard = 0; + } + + return TRUE; + +out_err: + if (fpc->r_temp) + FREE(fpc->r_temp); + tgsi_parse_free(&p); + return FALSE; +} + +static void +nvfx_fragprog_translate(struct nvfx_context *nvfx, + struct nvfx_fragment_program *fp) +{ + struct tgsi_parse_context parse; + struct nvfx_fpc *fpc = NULL; + + fpc = CALLOC(1, sizeof(struct nvfx_fpc)); + if (!fpc) + return; + fpc->fp = fp; + fpc->num_regs = 2; + + if (!nvfx_fragprog_prepare(nvfx, fpc)) { + FREE(fpc); + return; + } + + tgsi_parse_init(&parse, fp->pipe.tokens); + + while (!tgsi_parse_end_of_tokens(&parse)) { + tgsi_parse_token(&parse); + + switch (parse.FullToken.Token.Type) { + case TGSI_TOKEN_TYPE_INSTRUCTION: + { + const struct tgsi_full_instruction *finst; + + finst = &parse.FullToken.FullInstruction; + if (!nvfx_fragprog_parse_instruction(nvfx, fpc, finst)) + goto out_err; + } + break; + default: + break; + } + } + + if(!nvfx->is_nv4x) + fp->fp_control |= (fpc->num_regs-1)/2; + else + fp->fp_control |= fpc->num_regs << NV40TCL_FP_CONTROL_TEMP_COUNT_SHIFT; + + /* Terminate final instruction */ + fp->insn[fpc->inst_offset] |= 0x00000001; + + /* Append NOP + END instruction, may or may not be necessary. */ + fpc->inst_offset = fp->insn_len; + grow_insns(fpc, 4); + fp->insn[fpc->inst_offset + 0] = 0x00000001; + fp->insn[fpc->inst_offset + 1] = 0x00000000; + fp->insn[fpc->inst_offset + 2] = 0x00000000; + fp->insn[fpc->inst_offset + 3] = 0x00000000; + + fp->translated = TRUE; +out_err: + tgsi_parse_free(&parse); + if (fpc->r_temp) + FREE(fpc->r_temp); + FREE(fpc); +} + +static void +nvfx_fragprog_upload(struct nvfx_context *nvfx, + struct nvfx_fragment_program *fp) +{ + struct pipe_screen *pscreen = nvfx->pipe.screen; + const uint32_t le = 1; + uint32_t *map; + int i; + + map = pipe_buffer_map(pscreen, fp->buffer, PIPE_BUFFER_USAGE_CPU_WRITE); + +#if 0 + for (i = 0; i < fp->insn_len; i++) { + fflush(stdout); fflush(stderr); + NOUVEAU_ERR("%d 0x%08x\n", i, fp->insn[i]); + fflush(stdout); fflush(stderr); + } +#endif + + if ((*(const uint8_t *)&le)) { + for (i = 0; i < fp->insn_len; i++) { + map[i] = fp->insn[i]; + } + } else { + /* Weird swapping for big-endian chips */ + for (i = 0; i < fp->insn_len; i++) { + map[i] = ((fp->insn[i] & 0xffff) << 16) | + ((fp->insn[i] >> 16) & 0xffff); + } + } + + pipe_buffer_unmap(pscreen, fp->buffer); +} + +static boolean +nvfx_fragprog_validate(struct nvfx_context *nvfx) +{ + struct nvfx_fragment_program *fp = nvfx->fragprog; + struct pipe_buffer *constbuf = + nvfx->constbuf[PIPE_SHADER_FRAGMENT]; + struct pipe_screen *pscreen = nvfx->pipe.screen; + struct nouveau_stateobj *so; + boolean new_consts = FALSE; + int i; + + if (fp->translated) + goto update_constants; + + nvfx->fallback_swrast &= ~NVFX_NEW_FRAGPROG; + nvfx_fragprog_translate(nvfx, fp); + if (!fp->translated) { + nvfx->fallback_swrast |= NVFX_NEW_FRAGPROG; + return FALSE; + } + + fp->buffer = pscreen->buffer_create(pscreen, 0x100, 0, fp->insn_len * 4); + nvfx_fragprog_upload(nvfx, fp); + + so = so_new(4, 4, 1); + so_method(so, nvfx->screen->eng3d, NV34TCL_FP_ACTIVE_PROGRAM, 1); + so_reloc (so, nouveau_bo(fp->buffer), 0, NOUVEAU_BO_VRAM | + NOUVEAU_BO_GART | NOUVEAU_BO_RD | NOUVEAU_BO_LOW | + NOUVEAU_BO_OR, NV34TCL_FP_ACTIVE_PROGRAM_DMA0, + NV34TCL_FP_ACTIVE_PROGRAM_DMA1); + so_method(so, nvfx->screen->eng3d, NV34TCL_FP_CONTROL, 1); + so_data (so, fp->fp_control); + if(!nvfx->is_nv4x) { + so_method(so, nvfx->screen->eng3d, NV34TCL_FP_REG_CONTROL, 1); + so_data (so, (1<<16)|0x4); + so_method(so, nvfx->screen->eng3d, NV34TCL_TX_UNITS_ENABLE, 1); + so_data (so, fp->samplers); + } + + so_ref(so, &fp->so); + so_ref(NULL, &so); + +update_constants: + if (fp->nr_consts) { + float *map; + + map = pipe_buffer_map(pscreen, constbuf, + PIPE_BUFFER_USAGE_CPU_READ); + for (i = 0; i < fp->nr_consts; i++) { + struct nvfx_fragment_program_data *fpd = &fp->consts[i]; + uint32_t *p = &fp->insn[fpd->offset]; + uint32_t *cb = (uint32_t *)&map[fpd->index * 4]; + + if (!memcmp(p, cb, 4 * sizeof(float))) + continue; + memcpy(p, cb, 4 * sizeof(float)); + new_consts = TRUE; + } + pipe_buffer_unmap(pscreen, constbuf); + + if (new_consts) + nvfx_fragprog_upload(nvfx, fp); + } + + if (new_consts || fp->so != nvfx->state.hw[NVFX_STATE_FRAGPROG]) { + so_ref(fp->so, &nvfx->state.hw[NVFX_STATE_FRAGPROG]); + return TRUE; + } + + return FALSE; +} + +void +nvfx_fragprog_destroy(struct nvfx_context *nvfx, + struct nvfx_fragment_program *fp) +{ + if (fp->buffer) + pipe_buffer_reference(&fp->buffer, NULL); + + if (fp->so) + so_ref(NULL, &fp->so); + + if (fp->insn_len) + FREE(fp->insn); +} + +struct nvfx_state_entry nvfx_state_fragprog = { + .validate = nvfx_fragprog_validate, + .dirty = { + .pipe = NVFX_NEW_FRAGPROG, + .hw = NVFX_STATE_FRAGPROG + } +}; diff --git a/src/gallium/drivers/nvfx/nvfx_state_emit.c b/src/gallium/drivers/nvfx/nvfx_state_emit.c index d3088e4211..d6fbc5d8dc 100644 --- a/src/gallium/drivers/nvfx/nvfx_state_emit.c +++ b/src/gallium/drivers/nvfx/nvfx_state_emit.c @@ -9,7 +9,7 @@ static struct nvfx_state_entry *name##_render_states[] = { \ &nvfx_state_rasterizer, \ &nvfx_state_scissor, \ &nvfx_state_stipple, \ - &nvxx##_state_fragprog, \ + &nvfx_state_fragprog, \ &nvxx##_state_fragtex, \ &nvxx##_state_vertprog, \ &nvfx_state_blend, \ -- cgit v1.2.3 From f9eafeca297497a94c438ea28ed59f3a45ed2566 Mon Sep 17 00:00:00 2001 From: Luca Barbieri Date: Sun, 21 Feb 2010 11:17:55 +0100 Subject: nv30, nv40: non-trivially unify nv[34]0_draw.c nv30_draw.c is a stub. This patch makes both nv30 and nv40 use the nv40 swtnl path. Note that this doesn't actually work on nv30 because the vertex program is encoded in the nv40-only layout. However, swtnl was unimplemented before on nv30, so this is not a regression. Furthermore, a patch to fix this is available near the end of the patchset. --- src/gallium/drivers/nv30/Makefile | 1 - src/gallium/drivers/nv30/nv30_context.c | 2 +- src/gallium/drivers/nv30/nv30_context.h | 3 - src/gallium/drivers/nv30/nv30_draw.c | 61 ----- src/gallium/drivers/nv40/Makefile | 1 - src/gallium/drivers/nv40/nv40_context.c | 2 +- src/gallium/drivers/nv40/nv40_context.h | 8 - src/gallium/drivers/nv40/nv40_draw.c | 360 ---------------------------- src/gallium/drivers/nv40/nv40_vbo.c | 4 +- src/gallium/drivers/nvfx/Makefile | 1 + src/gallium/drivers/nvfx/nvfx_context.h | 8 + src/gallium/drivers/nvfx/nvfx_draw.c | 363 +++++++++++++++++++++++++++++ src/gallium/drivers/nvfx/nvfx_state_emit.c | 6 +- 13 files changed, 381 insertions(+), 439 deletions(-) delete mode 100644 src/gallium/drivers/nv30/nv30_draw.c delete mode 100644 src/gallium/drivers/nv40/nv40_draw.c create mode 100644 src/gallium/drivers/nvfx/nvfx_draw.c (limited to 'src') diff --git a/src/gallium/drivers/nv30/Makefile b/src/gallium/drivers/nv30/Makefile index 196cc9a1ef..791b0040bb 100644 --- a/src/gallium/drivers/nv30/Makefile +++ b/src/gallium/drivers/nv30/Makefile @@ -5,7 +5,6 @@ LIBNAME = nv30 C_SOURCES = \ nv30_context.c \ - nv30_draw.c \ nv30_fragtex.c \ nv30_screen.c \ nv30_state.c \ diff --git a/src/gallium/drivers/nv30/nv30_context.c b/src/gallium/drivers/nv30/nv30_context.c index f13458d50a..671a1939e8 100644 --- a/src/gallium/drivers/nv30/nv30_context.c +++ b/src/gallium/drivers/nv30/nv30_context.c @@ -84,7 +84,7 @@ nv30_create(struct pipe_screen *pscreen, void *priv) draw_wide_line_threshold(nvfx->draw, 9999999.0); draw_enable_line_stipple(nvfx->draw, FALSE); draw_enable_point_sprites(nvfx->draw, FALSE); - draw_set_rasterize_stage(nvfx->draw, nv30_draw_render_stage(nvfx)); + draw_set_rasterize_stage(nvfx->draw, nvfx_draw_render_stage(nvfx)); return &nvfx->pipe; } diff --git a/src/gallium/drivers/nv30/nv30_context.h b/src/gallium/drivers/nv30/nv30_context.h index 7840318363..ebdd5455ca 100644 --- a/src/gallium/drivers/nv30/nv30_context.h +++ b/src/gallium/drivers/nv30/nv30_context.h @@ -5,9 +5,6 @@ extern void nv30_init_state_functions(struct nvfx_context *nvfx); -/* nv30_draw.c */ -extern struct draw_stage *nv30_draw_render_stage(struct nvfx_context *nvfx); - /* nv30_vertprog.c */ extern void nv30_vertprog_destroy(struct nvfx_context *, struct nvfx_vertex_program *); diff --git a/src/gallium/drivers/nv30/nv30_draw.c b/src/gallium/drivers/nv30/nv30_draw.c deleted file mode 100644 index 5d22e78abf..0000000000 --- a/src/gallium/drivers/nv30/nv30_draw.c +++ /dev/null @@ -1,61 +0,0 @@ -#include "draw/draw_pipe.h" - -#include "nv30_context.h" - -struct nv30_draw_stage { - struct draw_stage draw; - struct nvfx_context *nvfx; -}; - -static void -nv30_draw_point(struct draw_stage *draw, struct prim_header *prim) -{ - NOUVEAU_ERR("\n"); -} - -static void -nv30_draw_line(struct draw_stage *draw, struct prim_header *prim) -{ - NOUVEAU_ERR("\n"); -} - -static void -nv30_draw_tri(struct draw_stage *draw, struct prim_header *prim) -{ - NOUVEAU_ERR("\n"); -} - -static void -nv30_draw_flush(struct draw_stage *draw, unsigned flags) -{ -} - -static void -nv30_draw_reset_stipple_counter(struct draw_stage *draw) -{ - NOUVEAU_ERR("\n"); -} - -static void -nv30_draw_destroy(struct draw_stage *draw) -{ - FREE(draw); -} - -struct draw_stage * -nv30_draw_render_stage(struct nvfx_context *nvfx) -{ - struct nv30_draw_stage *nv30draw = CALLOC_STRUCT(nv30_draw_stage); - - nv30draw->nvfx = nvfx; - nv30draw->draw.draw = nvfx->draw; - nv30draw->draw.point = nv30_draw_point; - nv30draw->draw.line = nv30_draw_line; - nv30draw->draw.tri = nv30_draw_tri; - nv30draw->draw.flush = nv30_draw_flush; - nv30draw->draw.reset_stipple_counter = nv30_draw_reset_stipple_counter; - nv30draw->draw.destroy = nv30_draw_destroy; - - return &nv30draw->draw; -} - diff --git a/src/gallium/drivers/nv40/Makefile b/src/gallium/drivers/nv40/Makefile index f3ff376dfd..7529e33a74 100644 --- a/src/gallium/drivers/nv40/Makefile +++ b/src/gallium/drivers/nv40/Makefile @@ -5,7 +5,6 @@ LIBNAME = nv40 C_SOURCES = \ nv40_context.c \ - nv40_draw.c \ nv40_fragtex.c \ nv40_screen.c \ nv40_state.c \ diff --git a/src/gallium/drivers/nv40/nv40_context.c b/src/gallium/drivers/nv40/nv40_context.c index 441b038b05..eb83131772 100644 --- a/src/gallium/drivers/nv40/nv40_context.c +++ b/src/gallium/drivers/nv40/nv40_context.c @@ -84,7 +84,7 @@ nv40_create(struct pipe_screen *pscreen, void *priv) draw_wide_line_threshold(nvfx->draw, 9999999.0); draw_enable_line_stipple(nvfx->draw, FALSE); draw_enable_point_sprites(nvfx->draw, FALSE); - draw_set_rasterize_stage(nvfx->draw, nv40_draw_render_stage(nvfx)); + draw_set_rasterize_stage(nvfx->draw, nvfx_draw_render_stage(nvfx)); return &nvfx->pipe; } diff --git a/src/gallium/drivers/nv40/nv40_context.h b/src/gallium/drivers/nv40/nv40_context.h index 4cd56af8f7..a8aba0c0ca 100644 --- a/src/gallium/drivers/nv40/nv40_context.h +++ b/src/gallium/drivers/nv40/nv40_context.h @@ -5,13 +5,6 @@ extern void nv40_init_state_functions(struct nvfx_context *nvfx); -/* nv40_draw.c */ -extern struct draw_stage *nv40_draw_render_stage(struct nvfx_context *nvfx); -extern void nv40_draw_elements_swtnl(struct pipe_context *pipe, - struct pipe_buffer *idxbuf, - unsigned ib_size, unsigned mode, - unsigned start, unsigned count); - /* nv40_vertprog.c */ extern void nv40_vertprog_destroy(struct nvfx_context *, struct nvfx_vertex_program *); @@ -23,7 +16,6 @@ extern void nv40_fragtex_bind(struct nvfx_context *); extern struct nvfx_state_entry nv40_state_vertprog; extern struct nvfx_state_entry nv40_state_fragtex; extern struct nvfx_state_entry nv40_state_vbo; -extern struct nvfx_state_entry nv40_state_vtxfmt; /* nv40_vbo.c */ extern void nv40_draw_arrays(struct pipe_context *, unsigned mode, diff --git a/src/gallium/drivers/nv40/nv40_draw.c b/src/gallium/drivers/nv40/nv40_draw.c deleted file mode 100644 index 4ed87779fd..0000000000 --- a/src/gallium/drivers/nv40/nv40_draw.c +++ /dev/null @@ -1,360 +0,0 @@ -#include "pipe/p_shader_tokens.h" -#include "util/u_inlines.h" - -#include "util/u_pack_color.h" - -#include "draw/draw_context.h" -#include "draw/draw_vertex.h" -#include "draw/draw_pipe.h" - -#include "nv40_context.h" -#define NVFX_SHADER_NO_FUCKEDNESS -#include "nv40_shader.h" - -/* Simple, but crappy, swtnl path, hopefully we wont need to hit this very - * often at all. Uses "quadro style" vertex submission + a fixed vertex - * layout to avoid the need to generate a vertex program or vtxfmt. - */ - -struct nv40_render_stage { - struct draw_stage stage; - struct nvfx_context *nvfx; - unsigned prim; -}; - -static INLINE struct nv40_render_stage * -nv40_render_stage(struct draw_stage *stage) -{ - return (struct nv40_render_stage *)stage; -} - -static INLINE void -nv40_render_vertex(struct nvfx_context *nvfx, const struct vertex_header *v) -{ - struct nvfx_screen *screen = nvfx->screen; - struct nouveau_channel *chan = screen->base.channel; - struct nouveau_grobj *eng3d = screen->eng3d; - unsigned i; - - for (i = 0; i < nvfx->swtnl.nr_attribs; i++) { - unsigned idx = nvfx->swtnl.draw[i]; - unsigned hw = nvfx->swtnl.hw[i]; - - switch (nvfx->swtnl.emit[i]) { - case EMIT_OMIT: - break; - case EMIT_1F: - BEGIN_RING(chan, eng3d, NV34TCL_VTX_ATTR_1F(hw), 1); - OUT_RING (chan, fui(v->data[idx][0])); - break; - case EMIT_2F: - BEGIN_RING(chan, eng3d, NV34TCL_VTX_ATTR_2F_X(hw), 2); - OUT_RING (chan, fui(v->data[idx][0])); - OUT_RING (chan, fui(v->data[idx][1])); - break; - case EMIT_3F: - BEGIN_RING(chan, eng3d, NV34TCL_VTX_ATTR_3F_X(hw), 3); - OUT_RING (chan, fui(v->data[idx][0])); - OUT_RING (chan, fui(v->data[idx][1])); - OUT_RING (chan, fui(v->data[idx][2])); - break; - case EMIT_4F: - BEGIN_RING(chan, eng3d, NV34TCL_VTX_ATTR_4F_X(hw), 4); - OUT_RING (chan, fui(v->data[idx][0])); - OUT_RING (chan, fui(v->data[idx][1])); - OUT_RING (chan, fui(v->data[idx][2])); - OUT_RING (chan, fui(v->data[idx][3])); - break; - case EMIT_4UB: - BEGIN_RING(chan, eng3d, NV34TCL_VTX_ATTR_4UB(hw), 1); - OUT_RING (chan, pack_ub4(float_to_ubyte(v->data[idx][0]), - float_to_ubyte(v->data[idx][1]), - float_to_ubyte(v->data[idx][2]), - float_to_ubyte(v->data[idx][3]))); - break; - default: - assert(0); - break; - } - } -} - -static INLINE void -nv40_render_prim(struct draw_stage *stage, struct prim_header *prim, - unsigned mode, unsigned count) -{ - struct nv40_render_stage *rs = nv40_render_stage(stage); - struct nvfx_context *nvfx = rs->nvfx; - - struct nvfx_screen *screen = nvfx->screen; - struct nouveau_channel *chan = screen->base.channel; - struct nouveau_grobj *eng3d = screen->eng3d; - unsigned i; - - /* Ensure there's room for 4xfloat32 + potentially 3 begin/end */ - if (AVAIL_RING(chan) < ((count * 20) + 6)) { - if (rs->prim != NV34TCL_VERTEX_BEGIN_END_STOP) { - NOUVEAU_ERR("AIII, missed flush\n"); - assert(0); - } - FIRE_RING(chan); - nvfx_state_emit(nvfx); - } - - /* Switch primitive modes if necessary */ - if (rs->prim != mode) { - if (rs->prim != NV34TCL_VERTEX_BEGIN_END_STOP) { - BEGIN_RING(chan, eng3d, NV34TCL_VERTEX_BEGIN_END, 1); - OUT_RING (chan, NV34TCL_VERTEX_BEGIN_END_STOP); - } - - BEGIN_RING(chan, eng3d, NV34TCL_VERTEX_BEGIN_END, 1); - OUT_RING (chan, mode); - rs->prim = mode; - } - - /* Emit vertex data */ - for (i = 0; i < count; i++) - nv40_render_vertex(nvfx, prim->v[i]); - - /* If it's likely we'll need to empty the push buffer soon, finish - * off the primitive now. - */ - if (AVAIL_RING(chan) < ((count * 20) + 6)) { - BEGIN_RING(chan, eng3d, NV34TCL_VERTEX_BEGIN_END, 1); - OUT_RING (chan, NV34TCL_VERTEX_BEGIN_END_STOP); - rs->prim = NV34TCL_VERTEX_BEGIN_END_STOP; - } -} - -static void -nv40_render_point(struct draw_stage *draw, struct prim_header *prim) -{ - nv40_render_prim(draw, prim, NV34TCL_VERTEX_BEGIN_END_POINTS, 1); -} - -static void -nv40_render_line(struct draw_stage *draw, struct prim_header *prim) -{ - nv40_render_prim(draw, prim, NV34TCL_VERTEX_BEGIN_END_LINES, 2); -} - -static void -nv40_render_tri(struct draw_stage *draw, struct prim_header *prim) -{ - nv40_render_prim(draw, prim, NV34TCL_VERTEX_BEGIN_END_TRIANGLES, 3); -} - -static void -nv40_render_flush(struct draw_stage *draw, unsigned flags) -{ - struct nv40_render_stage *rs = nv40_render_stage(draw); - struct nvfx_context *nvfx = rs->nvfx; - struct nvfx_screen *screen = nvfx->screen; - struct nouveau_channel *chan = screen->base.channel; - struct nouveau_grobj *eng3d = screen->eng3d; - - if (rs->prim != NV34TCL_VERTEX_BEGIN_END_STOP) { - BEGIN_RING(chan, eng3d, NV34TCL_VERTEX_BEGIN_END, 1); - OUT_RING (chan, NV34TCL_VERTEX_BEGIN_END_STOP); - rs->prim = NV34TCL_VERTEX_BEGIN_END_STOP; - } -} - -static void -nv40_render_reset_stipple_counter(struct draw_stage *draw) -{ -} - -static void -nv40_render_destroy(struct draw_stage *draw) -{ - FREE(draw); -} - -static INLINE void -emit_mov(struct nvfx_vertex_program *vp, - unsigned dst, unsigned src, unsigned vor, unsigned mask) -{ - struct nvfx_vertex_program_exec *inst; - - vp->insns = realloc(vp->insns, - sizeof(struct nvfx_vertex_program_exec) * - ++vp->nr_insns); - inst = &vp->insns[vp->nr_insns - 1]; - - inst->data[0] = 0x401f9c6c; - inst->data[1] = 0x0040000d | (src << 8); - inst->data[2] = 0x8106c083; - inst->data[3] = 0x6041ff80 | (dst << 2) | (mask << 13); - inst->const_index = -1; - inst->has_branch_offset = FALSE; - - vp->ir |= (1 << src); - if (vor != ~0) - vp->or |= (1 << vor); -} - -static struct nvfx_vertex_program * -create_drawvp(struct nvfx_context *nvfx) -{ - struct nvfx_vertex_program *vp = CALLOC_STRUCT(nvfx_vertex_program); - unsigned i; - - emit_mov(vp, NV40_VP_INST_DEST_POS, 0, ~0, 0xf); - emit_mov(vp, NV40_VP_INST_DEST_COL0, 3, 0, 0xf); - emit_mov(vp, NV40_VP_INST_DEST_COL1, 4, 1, 0xf); - emit_mov(vp, NV40_VP_INST_DEST_BFC0, 3, 2, 0xf); - emit_mov(vp, NV40_VP_INST_DEST_BFC1, 4, 3, 0xf); - emit_mov(vp, NV40_VP_INST_DEST_FOGC, 5, 4, 0x8); - for (i = 0; i < 8; i++) - emit_mov(vp, NV40_VP_INST_DEST_TC(i), 8 + i, 14 + i, 0xf); - - vp->insns[vp->nr_insns - 1].data[3] |= 1; - vp->translated = TRUE; - return vp; -} - -struct draw_stage * -nv40_draw_render_stage(struct nvfx_context *nvfx) -{ - struct nv40_render_stage *render = CALLOC_STRUCT(nv40_render_stage); - - if (!nvfx->swtnl.vertprog) - nvfx->swtnl.vertprog = create_drawvp(nvfx); - - render->nvfx = nvfx; - render->stage.draw = nvfx->draw; - render->stage.point = nv40_render_point; - render->stage.line = nv40_render_line; - render->stage.tri = nv40_render_tri; - render->stage.flush = nv40_render_flush; - render->stage.reset_stipple_counter = nv40_render_reset_stipple_counter; - render->stage.destroy = nv40_render_destroy; - - return &render->stage; -} - -void -nv40_draw_elements_swtnl(struct pipe_context *pipe, - struct pipe_buffer *idxbuf, unsigned idxbuf_size, - unsigned mode, unsigned start, unsigned count) -{ - struct nvfx_context *nvfx = nvfx_context(pipe); - struct pipe_screen *pscreen = pipe->screen; - unsigned i; - void *map; - - if (!nvfx_state_validate_swtnl(nvfx)) - return; - nvfx->state.dirty &= ~(1ULL << NVFX_STATE_VTXBUF); - nvfx_state_emit(nvfx); - - for (i = 0; i < nvfx->vtxbuf_nr; i++) { - map = pipe_buffer_map(pscreen, nvfx->vtxbuf[i].buffer, - PIPE_BUFFER_USAGE_CPU_READ); - draw_set_mapped_vertex_buffer(nvfx->draw, i, map); - } - - if (idxbuf) { - map = pipe_buffer_map(pscreen, idxbuf, - PIPE_BUFFER_USAGE_CPU_READ); - draw_set_mapped_element_buffer(nvfx->draw, idxbuf_size, map); - } else { - draw_set_mapped_element_buffer(nvfx->draw, 0, NULL); - } - - if (nvfx->constbuf[PIPE_SHADER_VERTEX]) { - const unsigned nr = nvfx->constbuf_nr[PIPE_SHADER_VERTEX]; - - map = pipe_buffer_map(pscreen, - nvfx->constbuf[PIPE_SHADER_VERTEX], - PIPE_BUFFER_USAGE_CPU_READ); - draw_set_mapped_constant_buffer(nvfx->draw, PIPE_SHADER_VERTEX, 0, - map, nr); - } - - draw_arrays(nvfx->draw, mode, start, count); - - for (i = 0; i < nvfx->vtxbuf_nr; i++) - pipe_buffer_unmap(pscreen, nvfx->vtxbuf[i].buffer); - - if (idxbuf) - pipe_buffer_unmap(pscreen, idxbuf); - - if (nvfx->constbuf[PIPE_SHADER_VERTEX]) - pipe_buffer_unmap(pscreen, nvfx->constbuf[PIPE_SHADER_VERTEX]); - - draw_flush(nvfx->draw); - pipe->flush(pipe, 0, NULL); -} - -static INLINE void -emit_attrib(struct nvfx_context *nvfx, unsigned hw, unsigned emit, - unsigned semantic, unsigned index) -{ - unsigned draw_out = draw_find_shader_output(nvfx->draw, semantic, index); - unsigned a = nvfx->swtnl.nr_attribs++; - - nvfx->swtnl.hw[a] = hw; - nvfx->swtnl.emit[a] = emit; - nvfx->swtnl.draw[a] = draw_out; -} - -static boolean -nv40_state_vtxfmt_validate(struct nvfx_context *nvfx) -{ - struct nvfx_fragment_program *fp = nvfx->fragprog; - unsigned colour = 0, texcoords = 0, fog = 0, i; - - /* Determine needed fragprog inputs */ - for (i = 0; i < fp->info.num_inputs; i++) { - switch (fp->info.input_semantic_name[i]) { - case TGSI_SEMANTIC_POSITION: - break; - case TGSI_SEMANTIC_COLOR: - colour |= (1 << fp->info.input_semantic_index[i]); - break; - case TGSI_SEMANTIC_GENERIC: - texcoords |= (1 << fp->info.input_semantic_index[i]); - break; - case TGSI_SEMANTIC_FOG: - fog = 1; - break; - default: - assert(0); - } - } - - nvfx->swtnl.nr_attribs = 0; - - /* Map draw vtxprog output to hw attribute IDs */ - for (i = 0; i < 2; i++) { - if (!(colour & (1 << i))) - continue; - emit_attrib(nvfx, 3 + i, EMIT_4UB, TGSI_SEMANTIC_COLOR, i); - } - - for (i = 0; i < 8; i++) { - if (!(texcoords & (1 << i))) - continue; - emit_attrib(nvfx, 8 + i, EMIT_4F, TGSI_SEMANTIC_GENERIC, i); - } - - if (fog) { - emit_attrib(nvfx, 5, EMIT_1F, TGSI_SEMANTIC_FOG, 0); - } - - emit_attrib(nvfx, 0, EMIT_3F, TGSI_SEMANTIC_POSITION, 0); - - return FALSE; -} - -struct nvfx_state_entry nv40_state_vtxfmt = { - .validate = nv40_state_vtxfmt_validate, - .dirty = { - .pipe = NVFX_NEW_ARRAYS | NVFX_NEW_FRAGPROG, - .hw = 0 - } -}; - diff --git a/src/gallium/drivers/nv40/nv40_vbo.c b/src/gallium/drivers/nv40/nv40_vbo.c index 456b508d43..196a12b1f6 100644 --- a/src/gallium/drivers/nv40/nv40_vbo.c +++ b/src/gallium/drivers/nv40/nv40_vbo.c @@ -177,7 +177,7 @@ nv40_draw_arrays(struct pipe_context *pipe, nv40_vbo_set_idxbuf(nvfx, NULL, 0); if (FORCE_SWTNL || !nvfx_state_validate(nvfx)) { - nv40_draw_elements_swtnl(pipe, NULL, 0, + nvfx_draw_elements_swtnl(pipe, NULL, 0, mode, start, count); return; } @@ -467,7 +467,7 @@ nv40_draw_elements(struct pipe_context *pipe, idxbuf = nv40_vbo_set_idxbuf(nvfx, indexBuffer, indexSize); if (FORCE_SWTNL || !nvfx_state_validate(nvfx)) { - nv40_draw_elements_swtnl(pipe, NULL, 0, + nvfx_draw_elements_swtnl(pipe, NULL, 0, mode, start, count); return; } diff --git a/src/gallium/drivers/nvfx/Makefile b/src/gallium/drivers/nvfx/Makefile index f8c10a249b..a23d024f11 100644 --- a/src/gallium/drivers/nvfx/Makefile +++ b/src/gallium/drivers/nvfx/Makefile @@ -5,6 +5,7 @@ LIBNAME = nvfx C_SOURCES = \ nvfx_clear.c \ + nvfx_draw.c \ nvfx_fragprog.c \ nvfx_miptree.c \ nvfx_query.c \ diff --git a/src/gallium/drivers/nvfx/nvfx_context.h b/src/gallium/drivers/nvfx/nvfx_context.h index 0a7a0f1252..75008f8ddd 100644 --- a/src/gallium/drivers/nvfx/nvfx_context.h +++ b/src/gallium/drivers/nvfx/nvfx_context.h @@ -190,6 +190,7 @@ extern struct nvfx_state_entry nvfx_state_scissor; extern struct nvfx_state_entry nvfx_state_sr; extern struct nvfx_state_entry nvfx_state_stipple; extern struct nvfx_state_entry nvfx_state_viewport; +extern struct nvfx_state_entry nvfx_state_vtxfmt; extern struct nvfx_state_entry nvfx_state_zsa; extern void nvfx_init_query_functions(struct nvfx_context *nvfx); @@ -199,6 +200,13 @@ extern void nvfx_init_surface_functions(struct nvfx_context *nvfx); extern void nvfx_clear(struct pipe_context *pipe, unsigned buffers, const float *rgba, double depth, unsigned stencil); +/* nvfx_draw.c */ +extern struct draw_stage *nvfx_draw_render_stage(struct nvfx_context *nvfx); +extern void nvfx_draw_elements_swtnl(struct pipe_context *pipe, + struct pipe_buffer *idxbuf, + unsigned ib_size, unsigned mode, + unsigned start, unsigned count); + /* nvfx_fragprog.c */ extern void nvfx_fragprog_destroy(struct nvfx_context *, struct nvfx_fragment_program *); diff --git a/src/gallium/drivers/nvfx/nvfx_draw.c b/src/gallium/drivers/nvfx/nvfx_draw.c new file mode 100644 index 0000000000..8700e14329 --- /dev/null +++ b/src/gallium/drivers/nvfx/nvfx_draw.c @@ -0,0 +1,363 @@ +#include "pipe/p_shader_tokens.h" +#include "util/u_inlines.h" + +#include "util/u_pack_color.h" + +#include "draw/draw_context.h" +#include "draw/draw_vertex.h" +#include "draw/draw_pipe.h" + +#include "nvfx_context.h" +#define NVFX_SHADER_NO_FUCKEDNESS +#include "nv30/nv30_shader.h" +#include "nv40/nv40_shader.h" + +/* Simple, but crappy, swtnl path, hopefully we wont need to hit this very + * often at all. Uses "quadro style" vertex submission + a fixed vertex + * layout to avoid the need to generate a vertex program or vtxfmt. + */ + +struct nvfx_render_stage { + struct draw_stage stage; + struct nvfx_context *nvfx; + unsigned prim; +}; + +static INLINE struct nvfx_render_stage * +nvfx_render_stage(struct draw_stage *stage) +{ + return (struct nvfx_render_stage *)stage; +} + +static INLINE void +nvfx_render_vertex(struct nvfx_context *nvfx, const struct vertex_header *v) +{ + struct nvfx_screen *screen = nvfx->screen; + struct nouveau_channel *chan = screen->base.channel; + struct nouveau_grobj *eng3d = screen->eng3d; + unsigned i; + + for (i = 0; i < nvfx->swtnl.nr_attribs; i++) { + unsigned idx = nvfx->swtnl.draw[i]; + unsigned hw = nvfx->swtnl.hw[i]; + + switch (nvfx->swtnl.emit[i]) { + case EMIT_OMIT: + break; + case EMIT_1F: + BEGIN_RING(chan, eng3d, NV34TCL_VTX_ATTR_1F(hw), 1); + OUT_RING (chan, fui(v->data[idx][0])); + break; + case EMIT_2F: + BEGIN_RING(chan, eng3d, NV34TCL_VTX_ATTR_2F_X(hw), 2); + OUT_RING (chan, fui(v->data[idx][0])); + OUT_RING (chan, fui(v->data[idx][1])); + break; + case EMIT_3F: + BEGIN_RING(chan, eng3d, NV34TCL_VTX_ATTR_3F_X(hw), 3); + OUT_RING (chan, fui(v->data[idx][0])); + OUT_RING (chan, fui(v->data[idx][1])); + OUT_RING (chan, fui(v->data[idx][2])); + break; + case EMIT_4F: + BEGIN_RING(chan, eng3d, NV34TCL_VTX_ATTR_4F_X(hw), 4); + OUT_RING (chan, fui(v->data[idx][0])); + OUT_RING (chan, fui(v->data[idx][1])); + OUT_RING (chan, fui(v->data[idx][2])); + OUT_RING (chan, fui(v->data[idx][3])); + break; + case EMIT_4UB: + BEGIN_RING(chan, eng3d, NV34TCL_VTX_ATTR_4UB(hw), 1); + OUT_RING (chan, pack_ub4(float_to_ubyte(v->data[idx][0]), + float_to_ubyte(v->data[idx][1]), + float_to_ubyte(v->data[idx][2]), + float_to_ubyte(v->data[idx][3]))); + break; + default: + assert(0); + break; + } + } +} + +static INLINE void +nvfx_render_prim(struct draw_stage *stage, struct prim_header *prim, + unsigned mode, unsigned count) +{ + struct nvfx_render_stage *rs = nvfx_render_stage(stage); + struct nvfx_context *nvfx = rs->nvfx; + + struct nvfx_screen *screen = nvfx->screen; + struct nouveau_channel *chan = screen->base.channel; + struct nouveau_grobj *eng3d = screen->eng3d; + unsigned i; + + /* Ensure there's room for 4xfloat32 + potentially 3 begin/end */ + if (AVAIL_RING(chan) < ((count * 20) + 6)) { + if (rs->prim != NV34TCL_VERTEX_BEGIN_END_STOP) { + NOUVEAU_ERR("AIII, missed flush\n"); + assert(0); + } + FIRE_RING(chan); + nvfx_state_emit(nvfx); + } + + /* Switch primitive modes if necessary */ + if (rs->prim != mode) { + if (rs->prim != NV34TCL_VERTEX_BEGIN_END_STOP) { + BEGIN_RING(chan, eng3d, NV34TCL_VERTEX_BEGIN_END, 1); + OUT_RING (chan, NV34TCL_VERTEX_BEGIN_END_STOP); + } + + BEGIN_RING(chan, eng3d, NV34TCL_VERTEX_BEGIN_END, 1); + OUT_RING (chan, mode); + rs->prim = mode; + } + + /* Emit vertex data */ + for (i = 0; i < count; i++) + nvfx_render_vertex(nvfx, prim->v[i]); + + /* If it's likely we'll need to empty the push buffer soon, finish + * off the primitive now. + */ + if (AVAIL_RING(chan) < ((count * 20) + 6)) { + BEGIN_RING(chan, eng3d, NV34TCL_VERTEX_BEGIN_END, 1); + OUT_RING (chan, NV34TCL_VERTEX_BEGIN_END_STOP); + rs->prim = NV34TCL_VERTEX_BEGIN_END_STOP; + } +} + +static void +nvfx_render_point(struct draw_stage *draw, struct prim_header *prim) +{ + nvfx_render_prim(draw, prim, NV34TCL_VERTEX_BEGIN_END_POINTS, 1); +} + +static void +nvfx_render_line(struct draw_stage *draw, struct prim_header *prim) +{ + nvfx_render_prim(draw, prim, NV34TCL_VERTEX_BEGIN_END_LINES, 2); +} + +static void +nvfx_render_tri(struct draw_stage *draw, struct prim_header *prim) +{ + nvfx_render_prim(draw, prim, NV34TCL_VERTEX_BEGIN_END_TRIANGLES, 3); +} + +static void +nvfx_render_flush(struct draw_stage *draw, unsigned flags) +{ + struct nvfx_render_stage *rs = nvfx_render_stage(draw); + struct nvfx_context *nvfx = rs->nvfx; + struct nvfx_screen *screen = nvfx->screen; + struct nouveau_channel *chan = screen->base.channel; + struct nouveau_grobj *eng3d = screen->eng3d; + + if (rs->prim != NV34TCL_VERTEX_BEGIN_END_STOP) { + BEGIN_RING(chan, eng3d, NV34TCL_VERTEX_BEGIN_END, 1); + OUT_RING (chan, NV34TCL_VERTEX_BEGIN_END_STOP); + rs->prim = NV34TCL_VERTEX_BEGIN_END_STOP; + } +} + +static void +nvfx_render_reset_stipple_counter(struct draw_stage *draw) +{ +} + +static void +nvfx_render_destroy(struct draw_stage *draw) +{ + FREE(draw); +} + +static INLINE void +emit_mov(struct nvfx_vertex_program *vp, + unsigned dst, unsigned src, unsigned vor, unsigned mask) +{ + struct nvfx_vertex_program_exec *inst; + + vp->insns = realloc(vp->insns, + sizeof(struct nvfx_vertex_program_exec) * + ++vp->nr_insns); + inst = &vp->insns[vp->nr_insns - 1]; + + inst->data[0] = 0x401f9c6c; + inst->data[1] = 0x0040000d | (src << 8); + inst->data[2] = 0x8106c083; + inst->data[3] = 0x6041ff80 | (dst << 2) | (mask << 13); + inst->const_index = -1; + inst->has_branch_offset = FALSE; + + vp->ir |= (1 << src); + if (vor != ~0) + vp->or |= (1 << vor); +} + +static struct nvfx_vertex_program * +create_drawvp(struct nvfx_context *nvfx) +{ + struct nvfx_vertex_program *vp = CALLOC_STRUCT(nvfx_vertex_program); + unsigned i; + + // nv30 support comes in a later patch + assert(nvfx->is_nv4x); + + emit_mov(vp, NVFX_VP(INST_DEST_POS), 0, ~0, 0xf); + emit_mov(vp, NVFX_VP(INST_DEST_COL0), 3, 0, 0xf); + emit_mov(vp, NVFX_VP(INST_DEST_COL1), 4, 1, 0xf); + emit_mov(vp, NVFX_VP(INST_DEST_BFC0), 3, 2, 0xf); + emit_mov(vp, NVFX_VP(INST_DEST_BFC1), 4, 3, 0xf); + emit_mov(vp, NVFX_VP(INST_DEST_FOGC), 5, 4, 0x8); + for (i = 0; i < 8; i++) + emit_mov(vp, NVFX_VP(INST_DEST_TC(i)), 8 + i, 14 + i, 0xf); + + vp->insns[vp->nr_insns - 1].data[3] |= 1; + vp->translated = TRUE; + return vp; +} + +struct draw_stage * +nvfx_draw_render_stage(struct nvfx_context *nvfx) +{ + struct nvfx_render_stage *render = CALLOC_STRUCT(nvfx_render_stage); + + if (!nvfx->swtnl.vertprog) + nvfx->swtnl.vertprog = create_drawvp(nvfx); + + render->nvfx = nvfx; + render->stage.draw = nvfx->draw; + render->stage.point = nvfx_render_point; + render->stage.line = nvfx_render_line; + render->stage.tri = nvfx_render_tri; + render->stage.flush = nvfx_render_flush; + render->stage.reset_stipple_counter = nvfx_render_reset_stipple_counter; + render->stage.destroy = nvfx_render_destroy; + + return &render->stage; +} + +void +nvfx_draw_elements_swtnl(struct pipe_context *pipe, + struct pipe_buffer *idxbuf, unsigned idxbuf_size, + unsigned mode, unsigned start, unsigned count) +{ + struct nvfx_context *nvfx = nvfx_context(pipe); + struct pipe_screen *pscreen = pipe->screen; + unsigned i; + void *map; + + if (!nvfx_state_validate_swtnl(nvfx)) + return; + nvfx->state.dirty &= ~(1ULL << NVFX_STATE_VTXBUF); + nvfx_state_emit(nvfx); + + for (i = 0; i < nvfx->vtxbuf_nr; i++) { + map = pipe_buffer_map(pscreen, nvfx->vtxbuf[i].buffer, + PIPE_BUFFER_USAGE_CPU_READ); + draw_set_mapped_vertex_buffer(nvfx->draw, i, map); + } + + if (idxbuf) { + map = pipe_buffer_map(pscreen, idxbuf, + PIPE_BUFFER_USAGE_CPU_READ); + draw_set_mapped_element_buffer(nvfx->draw, idxbuf_size, map); + } else { + draw_set_mapped_element_buffer(nvfx->draw, 0, NULL); + } + + if (nvfx->constbuf[PIPE_SHADER_VERTEX]) { + const unsigned nr = nvfx->constbuf_nr[PIPE_SHADER_VERTEX]; + + map = pipe_buffer_map(pscreen, + nvfx->constbuf[PIPE_SHADER_VERTEX], + PIPE_BUFFER_USAGE_CPU_READ); + draw_set_mapped_constant_buffer(nvfx->draw, PIPE_SHADER_VERTEX, 0, + map, nr); + } + + draw_arrays(nvfx->draw, mode, start, count); + + for (i = 0; i < nvfx->vtxbuf_nr; i++) + pipe_buffer_unmap(pscreen, nvfx->vtxbuf[i].buffer); + + if (idxbuf) + pipe_buffer_unmap(pscreen, idxbuf); + + if (nvfx->constbuf[PIPE_SHADER_VERTEX]) + pipe_buffer_unmap(pscreen, nvfx->constbuf[PIPE_SHADER_VERTEX]); + + draw_flush(nvfx->draw); + pipe->flush(pipe, 0, NULL); +} + +static INLINE void +emit_attrib(struct nvfx_context *nvfx, unsigned hw, unsigned emit, + unsigned semantic, unsigned index) +{ + unsigned draw_out = draw_find_shader_output(nvfx->draw, semantic, index); + unsigned a = nvfx->swtnl.nr_attribs++; + + nvfx->swtnl.hw[a] = hw; + nvfx->swtnl.emit[a] = emit; + nvfx->swtnl.draw[a] = draw_out; +} + +static boolean +nvfx_state_vtxfmt_validate(struct nvfx_context *nvfx) +{ + struct nvfx_fragment_program *fp = nvfx->fragprog; + unsigned colour = 0, texcoords = 0, fog = 0, i; + + /* Determine needed fragprog inputs */ + for (i = 0; i < fp->info.num_inputs; i++) { + switch (fp->info.input_semantic_name[i]) { + case TGSI_SEMANTIC_POSITION: + break; + case TGSI_SEMANTIC_COLOR: + colour |= (1 << fp->info.input_semantic_index[i]); + break; + case TGSI_SEMANTIC_GENERIC: + texcoords |= (1 << fp->info.input_semantic_index[i]); + break; + case TGSI_SEMANTIC_FOG: + fog = 1; + break; + default: + assert(0); + } + } + + nvfx->swtnl.nr_attribs = 0; + + /* Map draw vtxprog output to hw attribute IDs */ + for (i = 0; i < 2; i++) { + if (!(colour & (1 << i))) + continue; + emit_attrib(nvfx, 3 + i, EMIT_4UB, TGSI_SEMANTIC_COLOR, i); + } + + for (i = 0; i < 8; i++) { + if (!(texcoords & (1 << i))) + continue; + emit_attrib(nvfx, 8 + i, EMIT_4F, TGSI_SEMANTIC_GENERIC, i); + } + + if (fog) { + emit_attrib(nvfx, 5, EMIT_1F, TGSI_SEMANTIC_FOG, 0); + } + + emit_attrib(nvfx, 0, EMIT_3F, TGSI_SEMANTIC_POSITION, 0); + + return FALSE; +} + +struct nvfx_state_entry nvfx_state_vtxfmt = { + .validate = nvfx_state_vtxfmt_validate, + .dirty = { + .pipe = NVFX_NEW_ARRAYS | NVFX_NEW_FRAGPROG, + .hw = 0 + } +}; diff --git a/src/gallium/drivers/nvfx/nvfx_state_emit.c b/src/gallium/drivers/nvfx/nvfx_state_emit.c index d6fbc5d8dc..9961dacce4 100644 --- a/src/gallium/drivers/nvfx/nvfx_state_emit.c +++ b/src/gallium/drivers/nvfx/nvfx_state_emit.c @@ -3,6 +3,10 @@ #include "nvfx_state.h" #include "draw/draw_context.h" +/* temporary, will be removed in next patch */ +#define nv30_state_vtxfmt nvfx_state_vtxfmt +#define nv40_state_vtxfmt nvfx_state_vtxfmt + #define RENDER_STATES(name, nvxx, vbo) \ static struct nvfx_state_entry *name##_render_states[] = { \ &nvfx_state_framebuffer, \ @@ -22,7 +26,7 @@ static struct nvfx_state_entry *name##_render_states[] = { \ } RENDER_STATES(nv30, nv30, vbo); -RENDER_STATES(nv30_swtnl, nv30, vbo); /* TODO: replace with vtxfmt once draw is unified */ +RENDER_STATES(nv30_swtnl, nv30, vtxfmt); RENDER_STATES(nv40, nv40, vbo); RENDER_STATES(nv40_swtnl, nv40, vtxfmt); -- cgit v1.2.3 From 6e1d0fc5eba8cda4f4c8f3188f53fec6d2d2e9c3 Mon Sep 17 00:00:00 2001 From: Luca Barbieri Date: Sun, 21 Feb 2010 11:12:08 +0100 Subject: nv30, nv40: unify nv[34]0_vbo.c The files are identical, except for swtnl support which is commented out on nv30 and restart being initialized on nv30 to avoid a compiler warning. --- src/gallium/drivers/nv30/Makefile | 1 - src/gallium/drivers/nv30/nv30_context.c | 4 +- src/gallium/drivers/nv30/nv30_context.h | 10 - src/gallium/drivers/nv30/nv30_vbo.c | 562 ---------------------------- src/gallium/drivers/nv40/Makefile | 1 - src/gallium/drivers/nv40/nv40_context.c | 4 +- src/gallium/drivers/nv40/nv40_context.h | 10 - src/gallium/drivers/nv40/nv40_vbo.c | 565 ----------------------------- src/gallium/drivers/nvfx/Makefile | 3 +- src/gallium/drivers/nvfx/nvfx_context.h | 10 + src/gallium/drivers/nvfx/nvfx_state_emit.c | 6 +- src/gallium/drivers/nvfx/nvfx_vbo.c | 563 ++++++++++++++++++++++++++++ 12 files changed, 580 insertions(+), 1159 deletions(-) delete mode 100644 src/gallium/drivers/nv30/nv30_vbo.c delete mode 100644 src/gallium/drivers/nv40/nv40_vbo.c create mode 100644 src/gallium/drivers/nvfx/nvfx_vbo.c (limited to 'src') diff --git a/src/gallium/drivers/nv30/Makefile b/src/gallium/drivers/nv30/Makefile index 791b0040bb..6ec93ee346 100644 --- a/src/gallium/drivers/nv30/Makefile +++ b/src/gallium/drivers/nv30/Makefile @@ -8,7 +8,6 @@ C_SOURCES = \ nv30_fragtex.c \ nv30_screen.c \ nv30_state.c \ - nv30_vbo.c \ nv30_vertprog.c LIBRARY_INCLUDES = -I$(TOP)/src/gallium/drivers/nvfx diff --git a/src/gallium/drivers/nv30/nv30_context.c b/src/gallium/drivers/nv30/nv30_context.c index 671a1939e8..730f458878 100644 --- a/src/gallium/drivers/nv30/nv30_context.c +++ b/src/gallium/drivers/nv30/nv30_context.c @@ -60,8 +60,8 @@ nv30_create(struct pipe_screen *pscreen, void *priv) nvfx->pipe.screen = pscreen; nvfx->pipe.priv = priv; nvfx->pipe.destroy = nv30_destroy; - nvfx->pipe.draw_arrays = nv30_draw_arrays; - nvfx->pipe.draw_elements = nv30_draw_elements; + nvfx->pipe.draw_arrays = nvfx_draw_arrays; + nvfx->pipe.draw_elements = nvfx_draw_elements; nvfx->pipe.clear = nvfx_clear; nvfx->pipe.flush = nv30_flush; diff --git a/src/gallium/drivers/nv30/nv30_context.h b/src/gallium/drivers/nv30/nv30_context.h index ebdd5455ca..de879d504f 100644 --- a/src/gallium/drivers/nv30/nv30_context.h +++ b/src/gallium/drivers/nv30/nv30_context.h @@ -15,16 +15,6 @@ extern void nv30_fragtex_bind(struct nvfx_context *); /* nv30_state.c and friends */ extern struct nvfx_state_entry nv30_state_vertprog; extern struct nvfx_state_entry nv30_state_fragtex; -extern struct nvfx_state_entry nv30_state_vbo; - -/* nv30_vbo.c */ -extern void nv30_draw_arrays(struct pipe_context *, unsigned mode, - unsigned start, unsigned count); -extern void nv30_draw_elements(struct pipe_context *pipe, - struct pipe_buffer *indexBuffer, - unsigned indexSize, - unsigned mode, unsigned start, - unsigned count); /* nvfx_context.c */ struct pipe_context * diff --git a/src/gallium/drivers/nv30/nv30_vbo.c b/src/gallium/drivers/nv30/nv30_vbo.c deleted file mode 100644 index 2b4401e533..0000000000 --- a/src/gallium/drivers/nv30/nv30_vbo.c +++ /dev/null @@ -1,562 +0,0 @@ -#include "pipe/p_context.h" -#include "pipe/p_state.h" -#include "util/u_inlines.h" -#include "util/u_format.h" - -#include "nv30_context.h" -#include "nvfx_state.h" - -#include "nouveau/nouveau_channel.h" -#include "nouveau/nouveau_pushbuf.h" -#include "nouveau/nouveau_util.h" - -#define FORCE_SWTNL 0 - -static INLINE int -nv30_vbo_format_to_hw(enum pipe_format pipe, unsigned *fmt, unsigned *ncomp) -{ - switch (pipe) { - case PIPE_FORMAT_R32_FLOAT: - case PIPE_FORMAT_R32G32_FLOAT: - case PIPE_FORMAT_R32G32B32_FLOAT: - case PIPE_FORMAT_R32G32B32A32_FLOAT: - *fmt = NV34TCL_VTXFMT_TYPE_FLOAT; - break; - case PIPE_FORMAT_R8_UNORM: - case PIPE_FORMAT_R8G8_UNORM: - case PIPE_FORMAT_R8G8B8_UNORM: - case PIPE_FORMAT_R8G8B8A8_UNORM: - *fmt = NV34TCL_VTXFMT_TYPE_UBYTE; - break; - case PIPE_FORMAT_R16_SSCALED: - case PIPE_FORMAT_R16G16_SSCALED: - case PIPE_FORMAT_R16G16B16_SSCALED: - case PIPE_FORMAT_R16G16B16A16_SSCALED: - *fmt = NV34TCL_VTXFMT_TYPE_USHORT; - break; - default: - NOUVEAU_ERR("Unknown format %s\n", util_format_name(pipe)); - return 1; - } - - switch (pipe) { - case PIPE_FORMAT_R8_UNORM: - case PIPE_FORMAT_R32_FLOAT: - case PIPE_FORMAT_R16_SSCALED: - *ncomp = 1; - break; - case PIPE_FORMAT_R8G8_UNORM: - case PIPE_FORMAT_R32G32_FLOAT: - case PIPE_FORMAT_R16G16_SSCALED: - *ncomp = 2; - break; - case PIPE_FORMAT_R8G8B8_UNORM: - case PIPE_FORMAT_R32G32B32_FLOAT: - case PIPE_FORMAT_R16G16B16_SSCALED: - *ncomp = 3; - break; - case PIPE_FORMAT_R8G8B8A8_UNORM: - case PIPE_FORMAT_R32G32B32A32_FLOAT: - case PIPE_FORMAT_R16G16B16A16_SSCALED: - *ncomp = 4; - break; - default: - NOUVEAU_ERR("Unknown format %s\n", util_format_name(pipe)); - return 1; - } - - return 0; -} - -static boolean -nv30_vbo_set_idxbuf(struct nvfx_context *nvfx, struct pipe_buffer *ib, - unsigned ib_size) -{ - struct pipe_screen *pscreen = &nvfx->screen->base.base; - unsigned type; - - if (!ib) { - nvfx->idxbuf = NULL; - nvfx->idxbuf_format = 0xdeadbeef; - return FALSE; - } - - if (!pscreen->get_param(pscreen, NOUVEAU_CAP_HW_IDXBUF) || ib_size == 1) - return FALSE; - - switch (ib_size) { - case 2: - type = NV34TCL_IDXBUF_FORMAT_TYPE_U16; - break; - case 4: - type = NV34TCL_IDXBUF_FORMAT_TYPE_U32; - break; - default: - return FALSE; - } - - if (ib != nvfx->idxbuf || - type != nvfx->idxbuf_format) { - nvfx->dirty |= NVFX_NEW_ARRAYS; - nvfx->idxbuf = ib; - nvfx->idxbuf_format = type; - } - - return TRUE; -} - -static boolean -nv30_vbo_static_attrib(struct nvfx_context *nvfx, struct nouveau_stateobj *so, - int attrib, struct pipe_vertex_element *ve, - struct pipe_vertex_buffer *vb) -{ - struct pipe_screen *pscreen = nvfx->pipe.screen; - struct nouveau_grobj *eng3d = nvfx->screen->eng3d; - unsigned type, ncomp; - void *map; - - if (nv30_vbo_format_to_hw(ve->src_format, &type, &ncomp)) - return FALSE; - - map = pipe_buffer_map(pscreen, vb->buffer, PIPE_BUFFER_USAGE_CPU_READ); - map += vb->buffer_offset + ve->src_offset; - - switch (type) { - case NV34TCL_VTXFMT_TYPE_FLOAT: - { - float *v = map; - - switch (ncomp) { - case 4: - so_method(so, eng3d, NV34TCL_VTX_ATTR_4F_X(attrib), 4); - so_data (so, fui(v[0])); - so_data (so, fui(v[1])); - so_data (so, fui(v[2])); - so_data (so, fui(v[3])); - break; - case 3: - so_method(so, eng3d, NV34TCL_VTX_ATTR_3F_X(attrib), 3); - so_data (so, fui(v[0])); - so_data (so, fui(v[1])); - so_data (so, fui(v[2])); - break; - case 2: - so_method(so, eng3d, NV34TCL_VTX_ATTR_2F_X(attrib), 2); - so_data (so, fui(v[0])); - so_data (so, fui(v[1])); - break; - case 1: - so_method(so, eng3d, NV34TCL_VTX_ATTR_1F(attrib), 1); - so_data (so, fui(v[0])); - break; - default: - pipe_buffer_unmap(pscreen, vb->buffer); - return FALSE; - } - } - break; - default: - pipe_buffer_unmap(pscreen, vb->buffer); - return FALSE; - } - - pipe_buffer_unmap(pscreen, vb->buffer); - return TRUE; -} - -void -nv30_draw_arrays(struct pipe_context *pipe, - unsigned mode, unsigned start, unsigned count) -{ - struct nvfx_context *nvfx = nvfx_context(pipe); - struct nvfx_screen *screen = nvfx->screen; - struct nouveau_channel *chan = screen->base.channel; - struct nouveau_grobj *eng3d = screen->eng3d; - unsigned restart = 0; - - nv30_vbo_set_idxbuf(nvfx, NULL, 0); - if (FORCE_SWTNL || !nvfx_state_validate(nvfx)) { - /*return nv30_draw_elements_swtnl(pipe, NULL, 0, - mode, start, count);*/ - return; - } - - while (count) { - unsigned vc, nr; - - nvfx_state_emit(nvfx); - - vc = nouveau_vbuf_split(AVAIL_RING(chan), 6, 256, - mode, start, count, &restart); - if (!vc) { - FIRE_RING(chan); - continue; - } - - BEGIN_RING(chan, eng3d, NV34TCL_VERTEX_BEGIN_END, 1); - OUT_RING (chan, nvgl_primitive(mode)); - - nr = (vc & 0xff); - if (nr) { - BEGIN_RING(chan, eng3d, NV34TCL_VB_VERTEX_BATCH, 1); - OUT_RING (chan, ((nr - 1) << 24) | start); - start += nr; - } - - nr = vc >> 8; - while (nr) { - unsigned push = nr > 2047 ? 2047 : nr; - - nr -= push; - - BEGIN_RING_NI(chan, eng3d, NV34TCL_VB_VERTEX_BATCH, push); - while (push--) { - OUT_RING(chan, ((0x100 - 1) << 24) | start); - start += 0x100; - } - } - - BEGIN_RING(chan, eng3d, NV34TCL_VERTEX_BEGIN_END, 1); - OUT_RING (chan, 0); - - count -= vc; - start = restart; - } - - pipe->flush(pipe, 0, NULL); -} - -static INLINE void -nv30_draw_elements_u08(struct nvfx_context *nvfx, void *ib, - unsigned mode, unsigned start, unsigned count) -{ - struct nvfx_screen *screen = nvfx->screen; - struct nouveau_channel *chan = screen->base.channel; - struct nouveau_grobj *eng3d = screen->eng3d; - - while (count) { - uint8_t *elts = (uint8_t *)ib + start; - unsigned vc, push, restart = 0; - - nvfx_state_emit(nvfx); - - vc = nouveau_vbuf_split(AVAIL_RING(chan), 6, 2, - mode, start, count, &restart); - if (vc == 0) { - FIRE_RING(chan); - continue; - } - count -= vc; - - BEGIN_RING(chan, eng3d, NV34TCL_VERTEX_BEGIN_END, 1); - OUT_RING (chan, nvgl_primitive(mode)); - - if (vc & 1) { - BEGIN_RING(chan, eng3d, NV34TCL_VB_ELEMENT_U32, 1); - OUT_RING (chan, elts[0]); - elts++; vc--; - } - - while (vc) { - unsigned i; - - push = MIN2(vc, 2047 * 2); - - BEGIN_RING_NI(chan, eng3d, NV34TCL_VB_ELEMENT_U16, push >> 1); - for (i = 0; i < push; i+=2) - OUT_RING(chan, (elts[i+1] << 16) | elts[i]); - - vc -= push; - elts += push; - } - - BEGIN_RING(chan, eng3d, NV34TCL_VERTEX_BEGIN_END, 1); - OUT_RING (chan, 0); - - start = restart; - } -} - -static INLINE void -nv30_draw_elements_u16(struct nvfx_context *nvfx, void *ib, - unsigned mode, unsigned start, unsigned count) -{ - struct nvfx_screen *screen = nvfx->screen; - struct nouveau_channel *chan = screen->base.channel; - struct nouveau_grobj *eng3d = screen->eng3d; - - while (count) { - uint16_t *elts = (uint16_t *)ib + start; - unsigned vc, push, restart = 0; - - nvfx_state_emit(nvfx); - - vc = nouveau_vbuf_split(AVAIL_RING(chan), 6, 2, - mode, start, count, &restart); - if (vc == 0) { - FIRE_RING(chan); - continue; - } - count -= vc; - - BEGIN_RING(chan, eng3d, NV34TCL_VERTEX_BEGIN_END, 1); - OUT_RING (chan, nvgl_primitive(mode)); - - if (vc & 1) { - BEGIN_RING(chan, eng3d, NV34TCL_VB_ELEMENT_U32, 1); - OUT_RING (chan, elts[0]); - elts++; vc--; - } - - while (vc) { - unsigned i; - - push = MIN2(vc, 2047 * 2); - - BEGIN_RING_NI(chan, eng3d, NV34TCL_VB_ELEMENT_U16, push >> 1); - for (i = 0; i < push; i+=2) - OUT_RING(chan, (elts[i+1] << 16) | elts[i]); - - vc -= push; - elts += push; - } - - BEGIN_RING(chan, eng3d, NV34TCL_VERTEX_BEGIN_END, 1); - OUT_RING (chan, 0); - - start = restart; - } -} - -static INLINE void -nv30_draw_elements_u32(struct nvfx_context *nvfx, void *ib, - unsigned mode, unsigned start, unsigned count) -{ - struct nvfx_screen *screen = nvfx->screen; - struct nouveau_channel *chan = screen->base.channel; - struct nouveau_grobj *eng3d = screen->eng3d; - - while (count) { - uint32_t *elts = (uint32_t *)ib + start; - unsigned vc, push, restart = 0; - - nvfx_state_emit(nvfx); - - vc = nouveau_vbuf_split(AVAIL_RING(chan), 5, 1, - mode, start, count, &restart); - if (vc == 0) { - FIRE_RING(chan); - continue; - } - count -= vc; - - BEGIN_RING(chan, eng3d, NV34TCL_VERTEX_BEGIN_END, 1); - OUT_RING (chan, nvgl_primitive(mode)); - - while (vc) { - push = MIN2(vc, 2047); - - BEGIN_RING_NI(chan, eng3d, NV34TCL_VB_ELEMENT_U32, push); - OUT_RINGp (chan, elts, push); - - vc -= push; - elts += push; - } - - BEGIN_RING(chan, eng3d, NV34TCL_VERTEX_BEGIN_END, 1); - OUT_RING (chan, 0); - - start = restart; - } -} - -static void -nv30_draw_elements_inline(struct pipe_context *pipe, - struct pipe_buffer *ib, unsigned ib_size, - unsigned mode, unsigned start, unsigned count) -{ - struct nvfx_context *nvfx = nvfx_context(pipe); - struct pipe_screen *pscreen = pipe->screen; - void *map; - - map = pipe_buffer_map(pscreen, ib, PIPE_BUFFER_USAGE_CPU_READ); - if (!ib) { - NOUVEAU_ERR("failed mapping ib\n"); - return; - } - - switch (ib_size) { - case 1: - nv30_draw_elements_u08(nvfx, map, mode, start, count); - break; - case 2: - nv30_draw_elements_u16(nvfx, map, mode, start, count); - break; - case 4: - nv30_draw_elements_u32(nvfx, map, mode, start, count); - break; - default: - NOUVEAU_ERR("invalid idxbuf fmt %d\n", ib_size); - break; - } - - pipe_buffer_unmap(pscreen, ib); -} - -static void -nv30_draw_elements_vbo(struct pipe_context *pipe, - unsigned mode, unsigned start, unsigned count) -{ - struct nvfx_context *nvfx = nvfx_context(pipe); - struct nvfx_screen *screen = nvfx->screen; - struct nouveau_channel *chan = screen->base.channel; - struct nouveau_grobj *eng3d = screen->eng3d; - unsigned restart = 0; - - while (count) { - unsigned nr, vc; - - nvfx_state_emit(nvfx); - - vc = nouveau_vbuf_split(AVAIL_RING(chan), 6, 256, - mode, start, count, &restart); - if (!vc) { - FIRE_RING(chan); - continue; - } - - BEGIN_RING(chan, eng3d, NV34TCL_VERTEX_BEGIN_END, 1); - OUT_RING (chan, nvgl_primitive(mode)); - - nr = (vc & 0xff); - if (nr) { - BEGIN_RING(chan, eng3d, NV34TCL_VB_INDEX_BATCH, 1); - OUT_RING (chan, ((nr - 1) << 24) | start); - start += nr; - } - - nr = vc >> 8; - while (nr) { - unsigned push = nr > 2047 ? 2047 : nr; - - nr -= push; - - BEGIN_RING_NI(chan, eng3d, NV34TCL_VB_INDEX_BATCH, push); - while (push--) { - OUT_RING(chan, ((0x100 - 1) << 24) | start); - start += 0x100; - } - } - - BEGIN_RING(chan, eng3d, NV34TCL_VERTEX_BEGIN_END, 1); - OUT_RING (chan, 0); - - count -= vc; - start = restart; - } -} - -void -nv30_draw_elements(struct pipe_context *pipe, - struct pipe_buffer *indexBuffer, unsigned indexSize, - unsigned mode, unsigned start, unsigned count) -{ - struct nvfx_context *nvfx = nvfx_context(pipe); - boolean idxbuf; - - idxbuf = nv30_vbo_set_idxbuf(nvfx, indexBuffer, indexSize); - if (FORCE_SWTNL || !nvfx_state_validate(nvfx)) { - /*return nv30_draw_elements_swtnl(pipe, NULL, 0, - mode, start, count);*/ - return; - } - - if (idxbuf) { - nv30_draw_elements_vbo(pipe, mode, start, count); - } else { - nv30_draw_elements_inline(pipe, indexBuffer, indexSize, - mode, start, count); - } - - pipe->flush(pipe, 0, NULL); -} - -static boolean -nv30_vbo_validate(struct nvfx_context *nvfx) -{ - struct nouveau_stateobj *vtxbuf, *vtxfmt, *sattr = NULL; - struct nouveau_grobj *eng3d = nvfx->screen->eng3d; - struct pipe_buffer *ib = nvfx->idxbuf; - unsigned ib_format = nvfx->idxbuf_format; - unsigned vb_flags = NOUVEAU_BO_VRAM | NOUVEAU_BO_GART | NOUVEAU_BO_RD; - int hw; - - vtxbuf = so_new(3, 17, 18); - so_method(vtxbuf, eng3d, NV34TCL_VTXBUF_ADDRESS(0), nvfx->vtxelt->num_elements); - vtxfmt = so_new(1, 16, 0); - so_method(vtxfmt, eng3d, NV34TCL_VTXFMT(0), nvfx->vtxelt->num_elements); - - for (hw = 0; hw < nvfx->vtxelt->num_elements; hw++) { - struct pipe_vertex_element *ve; - struct pipe_vertex_buffer *vb; - unsigned type, ncomp; - - ve = &nvfx->vtxelt->pipe[hw]; - vb = &nvfx->vtxbuf[ve->vertex_buffer_index]; - - if (!vb->stride) { - if (!sattr) - sattr = so_new(16, 16 * 4, 0); - - if (nv30_vbo_static_attrib(nvfx, sattr, hw, ve, vb)) { - so_data(vtxbuf, 0); - so_data(vtxfmt, NV34TCL_VTXFMT_TYPE_FLOAT); - continue; - } - } - - if (nv30_vbo_format_to_hw(ve->src_format, &type, &ncomp)) { - /*nvfx->fallback_swtnl |= NVFX_NEW_ARRAYS;*/ - so_ref(NULL, &vtxbuf); - so_ref(NULL, &vtxfmt); - return FALSE; - } - - so_reloc(vtxbuf, nouveau_bo(vb->buffer), vb->buffer_offset + - ve->src_offset, vb_flags | NOUVEAU_BO_LOW | - NOUVEAU_BO_OR, 0, NV34TCL_VTXBUF_ADDRESS_DMA1); - so_data (vtxfmt, ((vb->stride << NV34TCL_VTXFMT_STRIDE_SHIFT) | - (ncomp << NV34TCL_VTXFMT_SIZE_SHIFT) | type)); - } - - if (ib) { - struct nouveau_bo *bo = nouveau_bo(ib); - - so_method(vtxbuf, eng3d, NV34TCL_IDXBUF_ADDRESS, 2); - so_reloc (vtxbuf, bo, 0, vb_flags | NOUVEAU_BO_LOW, 0, 0); - so_reloc (vtxbuf, bo, ib_format, vb_flags | NOUVEAU_BO_OR, - 0, NV34TCL_IDXBUF_FORMAT_DMA1); - } - - so_method(vtxbuf, eng3d, 0x1710, 1); - so_data (vtxbuf, 0); - - so_ref(vtxbuf, &nvfx->state.hw[NVFX_STATE_VTXBUF]); - so_ref(NULL, &vtxbuf); - nvfx->state.dirty |= (1ULL << NVFX_STATE_VTXBUF); - so_ref(vtxfmt, &nvfx->state.hw[NVFX_STATE_VTXFMT]); - so_ref(NULL, &vtxfmt); - nvfx->state.dirty |= (1ULL << NVFX_STATE_VTXFMT); - so_ref(sattr, &nvfx->state.hw[NVFX_STATE_VTXATTR]); - so_ref(NULL, &sattr); - nvfx->state.dirty |= (1ULL << NVFX_STATE_VTXATTR); - return FALSE; -} - -struct nvfx_state_entry nv30_state_vbo = { - .validate = nv30_vbo_validate, - .dirty = { - .pipe = NVFX_NEW_ARRAYS, - .hw = 0, - } -}; diff --git a/src/gallium/drivers/nv40/Makefile b/src/gallium/drivers/nv40/Makefile index 7529e33a74..6908506906 100644 --- a/src/gallium/drivers/nv40/Makefile +++ b/src/gallium/drivers/nv40/Makefile @@ -8,7 +8,6 @@ C_SOURCES = \ nv40_fragtex.c \ nv40_screen.c \ nv40_state.c \ - nv40_vbo.c \ nv40_vertprog.c LIBRARY_INCLUDES = -I$(TOP)/src/gallium/drivers/nvfx diff --git a/src/gallium/drivers/nv40/nv40_context.c b/src/gallium/drivers/nv40/nv40_context.c index eb83131772..85c1355b4f 100644 --- a/src/gallium/drivers/nv40/nv40_context.c +++ b/src/gallium/drivers/nv40/nv40_context.c @@ -60,8 +60,8 @@ nv40_create(struct pipe_screen *pscreen, void *priv) nvfx->pipe.priv = priv; nvfx->pipe.screen = pscreen; nvfx->pipe.destroy = nv40_destroy; - nvfx->pipe.draw_arrays = nv40_draw_arrays; - nvfx->pipe.draw_elements = nv40_draw_elements; + nvfx->pipe.draw_arrays = nvfx_draw_arrays; + nvfx->pipe.draw_elements = nvfx_draw_elements; nvfx->pipe.clear = nvfx_clear; nvfx->pipe.flush = nv40_flush; diff --git a/src/gallium/drivers/nv40/nv40_context.h b/src/gallium/drivers/nv40/nv40_context.h index a8aba0c0ca..cebf21d00c 100644 --- a/src/gallium/drivers/nv40/nv40_context.h +++ b/src/gallium/drivers/nv40/nv40_context.h @@ -15,16 +15,6 @@ extern void nv40_fragtex_bind(struct nvfx_context *); /* nv40_state.c and friends */ extern struct nvfx_state_entry nv40_state_vertprog; extern struct nvfx_state_entry nv40_state_fragtex; -extern struct nvfx_state_entry nv40_state_vbo; - -/* nv40_vbo.c */ -extern void nv40_draw_arrays(struct pipe_context *, unsigned mode, - unsigned start, unsigned count); -extern void nv40_draw_elements(struct pipe_context *pipe, - struct pipe_buffer *indexBuffer, - unsigned indexSize, - unsigned mode, unsigned start, - unsigned count); /* nvfx_context.c */ struct pipe_context * diff --git a/src/gallium/drivers/nv40/nv40_vbo.c b/src/gallium/drivers/nv40/nv40_vbo.c deleted file mode 100644 index 196a12b1f6..0000000000 --- a/src/gallium/drivers/nv40/nv40_vbo.c +++ /dev/null @@ -1,565 +0,0 @@ -#include "pipe/p_context.h" -#include "pipe/p_state.h" -#include "util/u_inlines.h" -#include "util/u_format.h" - -#include "nv40_context.h" -#include "nvfx_state.h" - -#include "nouveau/nouveau_channel.h" -#include "nouveau/nouveau_pushbuf.h" -#include "nouveau/nouveau_util.h" - -#define FORCE_SWTNL 0 - -static INLINE int -nv40_vbo_format_to_hw(enum pipe_format pipe, unsigned *fmt, unsigned *ncomp) -{ - switch (pipe) { - case PIPE_FORMAT_R32_FLOAT: - case PIPE_FORMAT_R32G32_FLOAT: - case PIPE_FORMAT_R32G32B32_FLOAT: - case PIPE_FORMAT_R32G32B32A32_FLOAT: - *fmt = NV34TCL_VTXFMT_TYPE_FLOAT; - break; - case PIPE_FORMAT_R8_UNORM: - case PIPE_FORMAT_R8G8_UNORM: - case PIPE_FORMAT_R8G8B8_UNORM: - case PIPE_FORMAT_R8G8B8A8_UNORM: - *fmt = NV34TCL_VTXFMT_TYPE_UBYTE; - break; - case PIPE_FORMAT_R16_SSCALED: - case PIPE_FORMAT_R16G16_SSCALED: - case PIPE_FORMAT_R16G16B16_SSCALED: - case PIPE_FORMAT_R16G16B16A16_SSCALED: - *fmt = NV34TCL_VTXFMT_TYPE_USHORT; - break; - default: - NOUVEAU_ERR("Unknown format %s\n", util_format_name(pipe)); - return 1; - } - - switch (pipe) { - case PIPE_FORMAT_R8_UNORM: - case PIPE_FORMAT_R32_FLOAT: - case PIPE_FORMAT_R16_SSCALED: - *ncomp = 1; - break; - case PIPE_FORMAT_R8G8_UNORM: - case PIPE_FORMAT_R32G32_FLOAT: - case PIPE_FORMAT_R16G16_SSCALED: - *ncomp = 2; - break; - case PIPE_FORMAT_R8G8B8_UNORM: - case PIPE_FORMAT_R32G32B32_FLOAT: - case PIPE_FORMAT_R16G16B16_SSCALED: - *ncomp = 3; - break; - case PIPE_FORMAT_R8G8B8A8_UNORM: - case PIPE_FORMAT_R32G32B32A32_FLOAT: - case PIPE_FORMAT_R16G16B16A16_SSCALED: - *ncomp = 4; - break; - default: - NOUVEAU_ERR("Unknown format %s\n", util_format_name(pipe)); - return 1; - } - - return 0; -} - -static boolean -nv40_vbo_set_idxbuf(struct nvfx_context *nvfx, struct pipe_buffer *ib, - unsigned ib_size) -{ - struct pipe_screen *pscreen = &nvfx->screen->base.base; - unsigned type; - - if (!ib) { - nvfx->idxbuf = NULL; - nvfx->idxbuf_format = 0xdeadbeef; - return FALSE; - } - - if (!pscreen->get_param(pscreen, NOUVEAU_CAP_HW_IDXBUF) || ib_size == 1) - return FALSE; - - switch (ib_size) { - case 2: - type = NV34TCL_IDXBUF_FORMAT_TYPE_U16; - break; - case 4: - type = NV34TCL_IDXBUF_FORMAT_TYPE_U32; - break; - default: - return FALSE; - } - - if (ib != nvfx->idxbuf || - type != nvfx->idxbuf_format) { - nvfx->dirty |= NVFX_NEW_ARRAYS; - nvfx->idxbuf = ib; - nvfx->idxbuf_format = type; - } - - return TRUE; -} - -static boolean -nv40_vbo_static_attrib(struct nvfx_context *nvfx, struct nouveau_stateobj *so, - int attrib, struct pipe_vertex_element *ve, - struct pipe_vertex_buffer *vb) -{ - struct pipe_screen *pscreen = nvfx->pipe.screen; - struct nouveau_grobj *eng3d = nvfx->screen->eng3d; - unsigned type, ncomp; - void *map; - - if (nv40_vbo_format_to_hw(ve->src_format, &type, &ncomp)) - return FALSE; - - map = pipe_buffer_map(pscreen, vb->buffer, PIPE_BUFFER_USAGE_CPU_READ); - map += vb->buffer_offset + ve->src_offset; - - switch (type) { - case NV34TCL_VTXFMT_TYPE_FLOAT: - { - float *v = map; - - switch (ncomp) { - case 4: - so_method(so, eng3d, NV34TCL_VTX_ATTR_4F_X(attrib), 4); - so_data (so, fui(v[0])); - so_data (so, fui(v[1])); - so_data (so, fui(v[2])); - so_data (so, fui(v[3])); - break; - case 3: - so_method(so, eng3d, NV34TCL_VTX_ATTR_3F_X(attrib), 3); - so_data (so, fui(v[0])); - so_data (so, fui(v[1])); - so_data (so, fui(v[2])); - break; - case 2: - so_method(so, eng3d, NV34TCL_VTX_ATTR_2F_X(attrib), 2); - so_data (so, fui(v[0])); - so_data (so, fui(v[1])); - break; - case 1: - so_method(so, eng3d, NV34TCL_VTX_ATTR_1F(attrib), 1); - so_data (so, fui(v[0])); - break; - default: - pipe_buffer_unmap(pscreen, vb->buffer); - return FALSE; - } - } - break; - default: - pipe_buffer_unmap(pscreen, vb->buffer); - return FALSE; - } - - pipe_buffer_unmap(pscreen, vb->buffer); - - return TRUE; -} - -void -nv40_draw_arrays(struct pipe_context *pipe, - unsigned mode, unsigned start, unsigned count) -{ - struct nvfx_context *nvfx = nvfx_context(pipe); - struct nvfx_screen *screen = nvfx->screen; - struct nouveau_channel *chan = screen->base.channel; - struct nouveau_grobj *eng3d = screen->eng3d; - unsigned restart; - - nv40_vbo_set_idxbuf(nvfx, NULL, 0); - if (FORCE_SWTNL || !nvfx_state_validate(nvfx)) { - nvfx_draw_elements_swtnl(pipe, NULL, 0, - mode, start, count); - return; - } - - while (count) { - unsigned vc, nr; - - nvfx_state_emit(nvfx); - - vc = nouveau_vbuf_split(AVAIL_RING(chan), 6, 256, - mode, start, count, &restart); - if (!vc) { - FIRE_RING(chan); - continue; - } - - BEGIN_RING(chan, eng3d, NV34TCL_VERTEX_BEGIN_END, 1); - OUT_RING (chan, nvgl_primitive(mode)); - - nr = (vc & 0xff); - if (nr) { - BEGIN_RING(chan, eng3d, NV34TCL_VB_VERTEX_BATCH, 1); - OUT_RING (chan, ((nr - 1) << 24) | start); - start += nr; - } - - nr = vc >> 8; - while (nr) { - unsigned push = nr > 2047 ? 2047 : nr; - - nr -= push; - - BEGIN_RING_NI(chan, eng3d, NV34TCL_VB_VERTEX_BATCH, push); - while (push--) { - OUT_RING(chan, ((0x100 - 1) << 24) | start); - start += 0x100; - } - } - - BEGIN_RING(chan, eng3d, NV34TCL_VERTEX_BEGIN_END, 1); - OUT_RING (chan, 0); - - count -= vc; - start = restart; - } - - pipe->flush(pipe, 0, NULL); -} - -static INLINE void -nv40_draw_elements_u08(struct nvfx_context *nvfx, void *ib, - unsigned mode, unsigned start, unsigned count) -{ - struct nvfx_screen *screen = nvfx->screen; - struct nouveau_channel *chan = screen->base.channel; - struct nouveau_grobj *eng3d = screen->eng3d; - - while (count) { - uint8_t *elts = (uint8_t *)ib + start; - unsigned vc, push, restart; - - nvfx_state_emit(nvfx); - - vc = nouveau_vbuf_split(AVAIL_RING(chan), 6, 2, - mode, start, count, &restart); - if (vc == 0) { - FIRE_RING(chan); - continue; - } - count -= vc; - - BEGIN_RING(chan, eng3d, NV34TCL_VERTEX_BEGIN_END, 1); - OUT_RING (chan, nvgl_primitive(mode)); - - if (vc & 1) { - BEGIN_RING(chan, eng3d, NV34TCL_VB_ELEMENT_U32, 1); - OUT_RING (chan, elts[0]); - elts++; vc--; - } - - while (vc) { - unsigned i; - - push = MIN2(vc, 2047 * 2); - - BEGIN_RING_NI(chan, eng3d, NV34TCL_VB_ELEMENT_U16, push >> 1); - for (i = 0; i < push; i+=2) - OUT_RING(chan, (elts[i+1] << 16) | elts[i]); - - vc -= push; - elts += push; - } - - BEGIN_RING(chan, eng3d, NV34TCL_VERTEX_BEGIN_END, 1); - OUT_RING (chan, 0); - - start = restart; - } -} - -static INLINE void -nv40_draw_elements_u16(struct nvfx_context *nvfx, void *ib, - unsigned mode, unsigned start, unsigned count) -{ - struct nvfx_screen *screen = nvfx->screen; - struct nouveau_channel *chan = screen->base.channel; - struct nouveau_grobj *eng3d = screen->eng3d; - - while (count) { - uint16_t *elts = (uint16_t *)ib + start; - unsigned vc, push, restart; - - nvfx_state_emit(nvfx); - - vc = nouveau_vbuf_split(AVAIL_RING(chan), 6, 2, - mode, start, count, &restart); - if (vc == 0) { - FIRE_RING(chan); - continue; - } - count -= vc; - - BEGIN_RING(chan, eng3d, NV34TCL_VERTEX_BEGIN_END, 1); - OUT_RING (chan, nvgl_primitive(mode)); - - if (vc & 1) { - BEGIN_RING(chan, eng3d, NV34TCL_VB_ELEMENT_U32, 1); - OUT_RING (chan, elts[0]); - elts++; vc--; - } - - while (vc) { - unsigned i; - - push = MIN2(vc, 2047 * 2); - - BEGIN_RING_NI(chan, eng3d, NV34TCL_VB_ELEMENT_U16, push >> 1); - for (i = 0; i < push; i+=2) - OUT_RING(chan, (elts[i+1] << 16) | elts[i]); - - vc -= push; - elts += push; - } - - BEGIN_RING(chan, eng3d, NV34TCL_VERTEX_BEGIN_END, 1); - OUT_RING (chan, 0); - - start = restart; - } -} - -static INLINE void -nv40_draw_elements_u32(struct nvfx_context *nvfx, void *ib, - unsigned mode, unsigned start, unsigned count) -{ - struct nvfx_screen *screen = nvfx->screen; - struct nouveau_channel *chan = screen->base.channel; - struct nouveau_grobj *eng3d = screen->eng3d; - - while (count) { - uint32_t *elts = (uint32_t *)ib + start; - unsigned vc, push, restart; - - nvfx_state_emit(nvfx); - - vc = nouveau_vbuf_split(AVAIL_RING(chan), 5, 1, - mode, start, count, &restart); - if (vc == 0) { - FIRE_RING(chan); - continue; - } - count -= vc; - - BEGIN_RING(chan, eng3d, NV34TCL_VERTEX_BEGIN_END, 1); - OUT_RING (chan, nvgl_primitive(mode)); - - while (vc) { - push = MIN2(vc, 2047); - - BEGIN_RING_NI(chan, eng3d, NV34TCL_VB_ELEMENT_U32, push); - OUT_RINGp (chan, elts, push); - - vc -= push; - elts += push; - } - - BEGIN_RING(chan, eng3d, NV34TCL_VERTEX_BEGIN_END, 1); - OUT_RING (chan, 0); - - start = restart; - } -} - -static void -nv40_draw_elements_inline(struct pipe_context *pipe, - struct pipe_buffer *ib, unsigned ib_size, - unsigned mode, unsigned start, unsigned count) -{ - struct nvfx_context *nvfx = nvfx_context(pipe); - struct pipe_screen *pscreen = pipe->screen; - void *map; - - map = pipe_buffer_map(pscreen, ib, PIPE_BUFFER_USAGE_CPU_READ); - if (!ib) { - NOUVEAU_ERR("failed mapping ib\n"); - return; - } - - switch (ib_size) { - case 1: - nv40_draw_elements_u08(nvfx, map, mode, start, count); - break; - case 2: - nv40_draw_elements_u16(nvfx, map, mode, start, count); - break; - case 4: - nv40_draw_elements_u32(nvfx, map, mode, start, count); - break; - default: - NOUVEAU_ERR("invalid idxbuf fmt %d\n", ib_size); - break; - } - - pipe_buffer_unmap(pscreen, ib); -} - -static void -nv40_draw_elements_vbo(struct pipe_context *pipe, - unsigned mode, unsigned start, unsigned count) -{ - struct nvfx_context *nvfx = nvfx_context(pipe); - struct nvfx_screen *screen = nvfx->screen; - struct nouveau_channel *chan = screen->base.channel; - struct nouveau_grobj *eng3d = screen->eng3d; - unsigned restart; - - while (count) { - unsigned nr, vc; - - nvfx_state_emit(nvfx); - - vc = nouveau_vbuf_split(AVAIL_RING(chan), 6, 256, - mode, start, count, &restart); - if (!vc) { - FIRE_RING(chan); - continue; - } - - BEGIN_RING(chan, eng3d, NV34TCL_VERTEX_BEGIN_END, 1); - OUT_RING (chan, nvgl_primitive(mode)); - - nr = (vc & 0xff); - if (nr) { - BEGIN_RING(chan, eng3d, NV34TCL_VB_INDEX_BATCH, 1); - OUT_RING (chan, ((nr - 1) << 24) | start); - start += nr; - } - - nr = vc >> 8; - while (nr) { - unsigned push = nr > 2047 ? 2047 : nr; - - nr -= push; - - BEGIN_RING_NI(chan, eng3d, NV34TCL_VB_INDEX_BATCH, push); - while (push--) { - OUT_RING(chan, ((0x100 - 1) << 24) | start); - start += 0x100; - } - } - - BEGIN_RING(chan, eng3d, NV34TCL_VERTEX_BEGIN_END, 1); - OUT_RING (chan, 0); - - count -= vc; - start = restart; - } -} - -void -nv40_draw_elements(struct pipe_context *pipe, - struct pipe_buffer *indexBuffer, unsigned indexSize, - unsigned mode, unsigned start, unsigned count) -{ - struct nvfx_context *nvfx = nvfx_context(pipe); - boolean idxbuf; - - idxbuf = nv40_vbo_set_idxbuf(nvfx, indexBuffer, indexSize); - if (FORCE_SWTNL || !nvfx_state_validate(nvfx)) { - nvfx_draw_elements_swtnl(pipe, NULL, 0, - mode, start, count); - return; - } - - if (idxbuf) { - nv40_draw_elements_vbo(pipe, mode, start, count); - } else { - nv40_draw_elements_inline(pipe, indexBuffer, indexSize, - mode, start, count); - } - - pipe->flush(pipe, 0, NULL); -} - -static boolean -nv40_vbo_validate(struct nvfx_context *nvfx) -{ - struct nouveau_stateobj *vtxbuf, *vtxfmt, *sattr = NULL; - struct nouveau_grobj *eng3d = nvfx->screen->eng3d; - struct pipe_buffer *ib = nvfx->idxbuf; - unsigned ib_format = nvfx->idxbuf_format; - unsigned vb_flags = NOUVEAU_BO_VRAM | NOUVEAU_BO_GART | NOUVEAU_BO_RD; - int hw; - - vtxbuf = so_new(3, 17, 18); - so_method(vtxbuf, eng3d, NV34TCL_VTXBUF_ADDRESS(0), nvfx->vtxelt->num_elements); - vtxfmt = so_new(1, 16, 0); - so_method(vtxfmt, eng3d, NV34TCL_VTXFMT(0), nvfx->vtxelt->num_elements); - - for (hw = 0; hw < nvfx->vtxelt->num_elements; hw++) { - struct pipe_vertex_element *ve; - struct pipe_vertex_buffer *vb; - unsigned type, ncomp; - - ve = &nvfx->vtxelt->pipe[hw]; - vb = &nvfx->vtxbuf[ve->vertex_buffer_index]; - - if (!vb->stride) { - if (!sattr) - sattr = so_new(16, 16 * 4, 0); - - if (nv40_vbo_static_attrib(nvfx, sattr, hw, ve, vb)) { - so_data(vtxbuf, 0); - so_data(vtxfmt, NV34TCL_VTXFMT_TYPE_FLOAT); - continue; - } - } - - if (nv40_vbo_format_to_hw(ve->src_format, &type, &ncomp)) { - nvfx->fallback_swtnl |= NVFX_NEW_ARRAYS; - so_ref(NULL, &vtxbuf); - so_ref(NULL, &vtxfmt); - return FALSE; - } - - so_reloc(vtxbuf, nouveau_bo(vb->buffer), - vb->buffer_offset + ve->src_offset, - vb_flags | NOUVEAU_BO_LOW | NOUVEAU_BO_OR, - 0, NV34TCL_VTXBUF_ADDRESS_DMA1); - so_data (vtxfmt, ((vb->stride << NV34TCL_VTXFMT_STRIDE_SHIFT) | - (ncomp << NV34TCL_VTXFMT_SIZE_SHIFT) | type)); - } - - if (ib) { - struct nouveau_bo *bo = nouveau_bo(ib); - - so_method(vtxbuf, eng3d, NV34TCL_IDXBUF_ADDRESS, 2); - so_reloc (vtxbuf, bo, 0, vb_flags | NOUVEAU_BO_LOW, 0, 0); - so_reloc (vtxbuf, bo, ib_format, vb_flags | NOUVEAU_BO_OR, - 0, NV34TCL_IDXBUF_FORMAT_DMA1); - } - - so_method(vtxbuf, eng3d, 0x1710, 1); - so_data (vtxbuf, 0); - - so_ref(vtxbuf, &nvfx->state.hw[NVFX_STATE_VTXBUF]); - so_ref(NULL, &vtxbuf); - nvfx->state.dirty |= (1ULL << NVFX_STATE_VTXBUF); - so_ref(vtxfmt, &nvfx->state.hw[NVFX_STATE_VTXFMT]); - so_ref(NULL, &vtxfmt); - nvfx->state.dirty |= (1ULL << NVFX_STATE_VTXFMT); - so_ref(sattr, &nvfx->state.hw[NVFX_STATE_VTXATTR]); - so_ref(NULL, &sattr); - nvfx->state.dirty |= (1ULL << NVFX_STATE_VTXATTR); - return FALSE; -} - -struct nvfx_state_entry nv40_state_vbo = { - .validate = nv40_vbo_validate, - .dirty = { - .pipe = NVFX_NEW_ARRAYS, - .hw = 0, - } -}; - diff --git a/src/gallium/drivers/nvfx/Makefile b/src/gallium/drivers/nvfx/Makefile index a23d024f11..d1304ccea0 100644 --- a/src/gallium/drivers/nvfx/Makefile +++ b/src/gallium/drivers/nvfx/Makefile @@ -18,6 +18,7 @@ C_SOURCES = \ nvfx_state_viewport.c \ nvfx_state_zsa.c \ nvfx_surface.c \ - nvfx_transfer.c + nvfx_transfer.c \ + nvfx_vbo.c include ../../Makefile.template diff --git a/src/gallium/drivers/nvfx/nvfx_context.h b/src/gallium/drivers/nvfx/nvfx_context.h index 75008f8ddd..8f121fe3af 100644 --- a/src/gallium/drivers/nvfx/nvfx_context.h +++ b/src/gallium/drivers/nvfx/nvfx_context.h @@ -189,6 +189,7 @@ extern struct nvfx_state_entry nvfx_state_rasterizer; extern struct nvfx_state_entry nvfx_state_scissor; extern struct nvfx_state_entry nvfx_state_sr; extern struct nvfx_state_entry nvfx_state_stipple; +extern struct nvfx_state_entry nvfx_state_vbo; extern struct nvfx_state_entry nvfx_state_viewport; extern struct nvfx_state_entry nvfx_state_vtxfmt; extern struct nvfx_state_entry nvfx_state_zsa; @@ -220,4 +221,13 @@ extern void nvfx_state_emit(struct nvfx_context *nvfx); /* nvfx_transfer.c */ extern void nvfx_init_transfer_functions(struct nvfx_context *nvfx); +/* nvfx_vbo.c */ +extern void nvfx_draw_arrays(struct pipe_context *, unsigned mode, + unsigned start, unsigned count); +extern void nvfx_draw_elements(struct pipe_context *pipe, + struct pipe_buffer *indexBuffer, + unsigned indexSize, + unsigned mode, unsigned start, + unsigned count); + #endif diff --git a/src/gallium/drivers/nvfx/nvfx_state_emit.c b/src/gallium/drivers/nvfx/nvfx_state_emit.c index 9961dacce4..88b86f9fb5 100644 --- a/src/gallium/drivers/nvfx/nvfx_state_emit.c +++ b/src/gallium/drivers/nvfx/nvfx_state_emit.c @@ -3,10 +3,6 @@ #include "nvfx_state.h" #include "draw/draw_context.h" -/* temporary, will be removed in next patch */ -#define nv30_state_vtxfmt nvfx_state_vtxfmt -#define nv40_state_vtxfmt nvfx_state_vtxfmt - #define RENDER_STATES(name, nvxx, vbo) \ static struct nvfx_state_entry *name##_render_states[] = { \ &nvfx_state_framebuffer, \ @@ -21,7 +17,7 @@ static struct nvfx_state_entry *name##_render_states[] = { \ &nvfx_state_zsa, \ &nvfx_state_sr, \ &nvfx_state_viewport, \ - &nvxx##_state_##vbo, \ + &nvfx_state_##vbo, \ NULL \ } diff --git a/src/gallium/drivers/nvfx/nvfx_vbo.c b/src/gallium/drivers/nvfx/nvfx_vbo.c new file mode 100644 index 0000000000..9d501ef1da --- /dev/null +++ b/src/gallium/drivers/nvfx/nvfx_vbo.c @@ -0,0 +1,563 @@ +#include "pipe/p_context.h" +#include "pipe/p_state.h" +#include "util/u_inlines.h" +#include "util/u_format.h" + +#include "nvfx_context.h" +#include "nvfx_state.h" + +#include "nouveau/nouveau_channel.h" +#include "nouveau/nouveau_pushbuf.h" +#include "nouveau/nouveau_util.h" + +#define FORCE_SWTNL 0 + +static INLINE int +nvfx_vbo_format_to_hw(enum pipe_format pipe, unsigned *fmt, unsigned *ncomp) +{ + switch (pipe) { + case PIPE_FORMAT_R32_FLOAT: + case PIPE_FORMAT_R32G32_FLOAT: + case PIPE_FORMAT_R32G32B32_FLOAT: + case PIPE_FORMAT_R32G32B32A32_FLOAT: + *fmt = NV34TCL_VTXFMT_TYPE_FLOAT; + break; + case PIPE_FORMAT_R8_UNORM: + case PIPE_FORMAT_R8G8_UNORM: + case PIPE_FORMAT_R8G8B8_UNORM: + case PIPE_FORMAT_R8G8B8A8_UNORM: + *fmt = NV34TCL_VTXFMT_TYPE_UBYTE; + break; + case PIPE_FORMAT_R16_SSCALED: + case PIPE_FORMAT_R16G16_SSCALED: + case PIPE_FORMAT_R16G16B16_SSCALED: + case PIPE_FORMAT_R16G16B16A16_SSCALED: + *fmt = NV34TCL_VTXFMT_TYPE_USHORT; + break; + default: + NOUVEAU_ERR("Unknown format %s\n", util_format_name(pipe)); + return 1; + } + + switch (pipe) { + case PIPE_FORMAT_R8_UNORM: + case PIPE_FORMAT_R32_FLOAT: + case PIPE_FORMAT_R16_SSCALED: + *ncomp = 1; + break; + case PIPE_FORMAT_R8G8_UNORM: + case PIPE_FORMAT_R32G32_FLOAT: + case PIPE_FORMAT_R16G16_SSCALED: + *ncomp = 2; + break; + case PIPE_FORMAT_R8G8B8_UNORM: + case PIPE_FORMAT_R32G32B32_FLOAT: + case PIPE_FORMAT_R16G16B16_SSCALED: + *ncomp = 3; + break; + case PIPE_FORMAT_R8G8B8A8_UNORM: + case PIPE_FORMAT_R32G32B32A32_FLOAT: + case PIPE_FORMAT_R16G16B16A16_SSCALED: + *ncomp = 4; + break; + default: + NOUVEAU_ERR("Unknown format %s\n", util_format_name(pipe)); + return 1; + } + + return 0; +} + +static boolean +nvfx_vbo_set_idxbuf(struct nvfx_context *nvfx, struct pipe_buffer *ib, + unsigned ib_size) +{ + struct pipe_screen *pscreen = &nvfx->screen->base.base; + unsigned type; + + if (!ib) { + nvfx->idxbuf = NULL; + nvfx->idxbuf_format = 0xdeadbeef; + return FALSE; + } + + if (!pscreen->get_param(pscreen, NOUVEAU_CAP_HW_IDXBUF) || ib_size == 1) + return FALSE; + + switch (ib_size) { + case 2: + type = NV34TCL_IDXBUF_FORMAT_TYPE_U16; + break; + case 4: + type = NV34TCL_IDXBUF_FORMAT_TYPE_U32; + break; + default: + return FALSE; + } + + if (ib != nvfx->idxbuf || + type != nvfx->idxbuf_format) { + nvfx->dirty |= NVFX_NEW_ARRAYS; + nvfx->idxbuf = ib; + nvfx->idxbuf_format = type; + } + + return TRUE; +} + +static boolean +nvfx_vbo_static_attrib(struct nvfx_context *nvfx, struct nouveau_stateobj *so, + int attrib, struct pipe_vertex_element *ve, + struct pipe_vertex_buffer *vb) +{ + struct pipe_screen *pscreen = nvfx->pipe.screen; + struct nouveau_grobj *eng3d = nvfx->screen->eng3d; + unsigned type, ncomp; + void *map; + + if (nvfx_vbo_format_to_hw(ve->src_format, &type, &ncomp)) + return FALSE; + + map = pipe_buffer_map(pscreen, vb->buffer, PIPE_BUFFER_USAGE_CPU_READ); + map += vb->buffer_offset + ve->src_offset; + + switch (type) { + case NV34TCL_VTXFMT_TYPE_FLOAT: + { + float *v = map; + + switch (ncomp) { + case 4: + so_method(so, eng3d, NV34TCL_VTX_ATTR_4F_X(attrib), 4); + so_data (so, fui(v[0])); + so_data (so, fui(v[1])); + so_data (so, fui(v[2])); + so_data (so, fui(v[3])); + break; + case 3: + so_method(so, eng3d, NV34TCL_VTX_ATTR_3F_X(attrib), 3); + so_data (so, fui(v[0])); + so_data (so, fui(v[1])); + so_data (so, fui(v[2])); + break; + case 2: + so_method(so, eng3d, NV34TCL_VTX_ATTR_2F_X(attrib), 2); + so_data (so, fui(v[0])); + so_data (so, fui(v[1])); + break; + case 1: + so_method(so, eng3d, NV34TCL_VTX_ATTR_1F(attrib), 1); + so_data (so, fui(v[0])); + break; + default: + pipe_buffer_unmap(pscreen, vb->buffer); + return FALSE; + } + } + break; + default: + pipe_buffer_unmap(pscreen, vb->buffer); + return FALSE; + } + + pipe_buffer_unmap(pscreen, vb->buffer); + return TRUE; +} + +void +nvfx_draw_arrays(struct pipe_context *pipe, + unsigned mode, unsigned start, unsigned count) +{ + struct nvfx_context *nvfx = nvfx_context(pipe); + struct nvfx_screen *screen = nvfx->screen; + struct nouveau_channel *chan = screen->base.channel; + struct nouveau_grobj *eng3d = screen->eng3d; + unsigned restart = 0; + + nvfx_vbo_set_idxbuf(nvfx, NULL, 0); + if (FORCE_SWTNL || !nvfx_state_validate(nvfx)) { + nvfx_draw_elements_swtnl(pipe, NULL, 0, + mode, start, count); + return; + } + + while (count) { + unsigned vc, nr; + + nvfx_state_emit(nvfx); + + vc = nouveau_vbuf_split(AVAIL_RING(chan), 6, 256, + mode, start, count, &restart); + if (!vc) { + FIRE_RING(chan); + continue; + } + + BEGIN_RING(chan, eng3d, NV34TCL_VERTEX_BEGIN_END, 1); + OUT_RING (chan, nvgl_primitive(mode)); + + nr = (vc & 0xff); + if (nr) { + BEGIN_RING(chan, eng3d, NV34TCL_VB_VERTEX_BATCH, 1); + OUT_RING (chan, ((nr - 1) << 24) | start); + start += nr; + } + + nr = vc >> 8; + while (nr) { + unsigned push = nr > 2047 ? 2047 : nr; + + nr -= push; + + BEGIN_RING_NI(chan, eng3d, NV34TCL_VB_VERTEX_BATCH, push); + while (push--) { + OUT_RING(chan, ((0x100 - 1) << 24) | start); + start += 0x100; + } + } + + BEGIN_RING(chan, eng3d, NV34TCL_VERTEX_BEGIN_END, 1); + OUT_RING (chan, 0); + + count -= vc; + start = restart; + } + + pipe->flush(pipe, 0, NULL); +} + +static INLINE void +nvfx_draw_elements_u08(struct nvfx_context *nvfx, void *ib, + unsigned mode, unsigned start, unsigned count) +{ + struct nvfx_screen *screen = nvfx->screen; + struct nouveau_channel *chan = screen->base.channel; + struct nouveau_grobj *eng3d = screen->eng3d; + + while (count) { + uint8_t *elts = (uint8_t *)ib + start; + unsigned vc, push, restart = 0; + + nvfx_state_emit(nvfx); + + vc = nouveau_vbuf_split(AVAIL_RING(chan), 6, 2, + mode, start, count, &restart); + if (vc == 0) { + FIRE_RING(chan); + continue; + } + count -= vc; + + BEGIN_RING(chan, eng3d, NV34TCL_VERTEX_BEGIN_END, 1); + OUT_RING (chan, nvgl_primitive(mode)); + + if (vc & 1) { + BEGIN_RING(chan, eng3d, NV34TCL_VB_ELEMENT_U32, 1); + OUT_RING (chan, elts[0]); + elts++; vc--; + } + + while (vc) { + unsigned i; + + push = MIN2(vc, 2047 * 2); + + BEGIN_RING_NI(chan, eng3d, NV34TCL_VB_ELEMENT_U16, push >> 1); + for (i = 0; i < push; i+=2) + OUT_RING(chan, (elts[i+1] << 16) | elts[i]); + + vc -= push; + elts += push; + } + + BEGIN_RING(chan, eng3d, NV34TCL_VERTEX_BEGIN_END, 1); + OUT_RING (chan, 0); + + start = restart; + } +} + +static INLINE void +nvfx_draw_elements_u16(struct nvfx_context *nvfx, void *ib, + unsigned mode, unsigned start, unsigned count) +{ + struct nvfx_screen *screen = nvfx->screen; + struct nouveau_channel *chan = screen->base.channel; + struct nouveau_grobj *eng3d = screen->eng3d; + + while (count) { + uint16_t *elts = (uint16_t *)ib + start; + unsigned vc, push, restart = 0; + + nvfx_state_emit(nvfx); + + vc = nouveau_vbuf_split(AVAIL_RING(chan), 6, 2, + mode, start, count, &restart); + if (vc == 0) { + FIRE_RING(chan); + continue; + } + count -= vc; + + BEGIN_RING(chan, eng3d, NV34TCL_VERTEX_BEGIN_END, 1); + OUT_RING (chan, nvgl_primitive(mode)); + + if (vc & 1) { + BEGIN_RING(chan, eng3d, NV34TCL_VB_ELEMENT_U32, 1); + OUT_RING (chan, elts[0]); + elts++; vc--; + } + + while (vc) { + unsigned i; + + push = MIN2(vc, 2047 * 2); + + BEGIN_RING_NI(chan, eng3d, NV34TCL_VB_ELEMENT_U16, push >> 1); + for (i = 0; i < push; i+=2) + OUT_RING(chan, (elts[i+1] << 16) | elts[i]); + + vc -= push; + elts += push; + } + + BEGIN_RING(chan, eng3d, NV34TCL_VERTEX_BEGIN_END, 1); + OUT_RING (chan, 0); + + start = restart; + } +} + +static INLINE void +nvfx_draw_elements_u32(struct nvfx_context *nvfx, void *ib, + unsigned mode, unsigned start, unsigned count) +{ + struct nvfx_screen *screen = nvfx->screen; + struct nouveau_channel *chan = screen->base.channel; + struct nouveau_grobj *eng3d = screen->eng3d; + + while (count) { + uint32_t *elts = (uint32_t *)ib + start; + unsigned vc, push, restart = 0; + + nvfx_state_emit(nvfx); + + vc = nouveau_vbuf_split(AVAIL_RING(chan), 5, 1, + mode, start, count, &restart); + if (vc == 0) { + FIRE_RING(chan); + continue; + } + count -= vc; + + BEGIN_RING(chan, eng3d, NV34TCL_VERTEX_BEGIN_END, 1); + OUT_RING (chan, nvgl_primitive(mode)); + + while (vc) { + push = MIN2(vc, 2047); + + BEGIN_RING_NI(chan, eng3d, NV34TCL_VB_ELEMENT_U32, push); + OUT_RINGp (chan, elts, push); + + vc -= push; + elts += push; + } + + BEGIN_RING(chan, eng3d, NV34TCL_VERTEX_BEGIN_END, 1); + OUT_RING (chan, 0); + + start = restart; + } +} + +static void +nvfx_draw_elements_inline(struct pipe_context *pipe, + struct pipe_buffer *ib, unsigned ib_size, + unsigned mode, unsigned start, unsigned count) +{ + struct nvfx_context *nvfx = nvfx_context(pipe); + struct pipe_screen *pscreen = pipe->screen; + void *map; + + map = pipe_buffer_map(pscreen, ib, PIPE_BUFFER_USAGE_CPU_READ); + if (!ib) { + NOUVEAU_ERR("failed mapping ib\n"); + return; + } + + switch (ib_size) { + case 1: + nvfx_draw_elements_u08(nvfx, map, mode, start, count); + break; + case 2: + nvfx_draw_elements_u16(nvfx, map, mode, start, count); + break; + case 4: + nvfx_draw_elements_u32(nvfx, map, mode, start, count); + break; + default: + NOUVEAU_ERR("invalid idxbuf fmt %d\n", ib_size); + break; + } + + pipe_buffer_unmap(pscreen, ib); +} + +static void +nvfx_draw_elements_vbo(struct pipe_context *pipe, + unsigned mode, unsigned start, unsigned count) +{ + struct nvfx_context *nvfx = nvfx_context(pipe); + struct nvfx_screen *screen = nvfx->screen; + struct nouveau_channel *chan = screen->base.channel; + struct nouveau_grobj *eng3d = screen->eng3d; + unsigned restart = 0; + + while (count) { + unsigned nr, vc; + + nvfx_state_emit(nvfx); + + vc = nouveau_vbuf_split(AVAIL_RING(chan), 6, 256, + mode, start, count, &restart); + if (!vc) { + FIRE_RING(chan); + continue; + } + + BEGIN_RING(chan, eng3d, NV34TCL_VERTEX_BEGIN_END, 1); + OUT_RING (chan, nvgl_primitive(mode)); + + nr = (vc & 0xff); + if (nr) { + BEGIN_RING(chan, eng3d, NV34TCL_VB_INDEX_BATCH, 1); + OUT_RING (chan, ((nr - 1) << 24) | start); + start += nr; + } + + nr = vc >> 8; + while (nr) { + unsigned push = nr > 2047 ? 2047 : nr; + + nr -= push; + + BEGIN_RING_NI(chan, eng3d, NV34TCL_VB_INDEX_BATCH, push); + while (push--) { + OUT_RING(chan, ((0x100 - 1) << 24) | start); + start += 0x100; + } + } + + BEGIN_RING(chan, eng3d, NV34TCL_VERTEX_BEGIN_END, 1); + OUT_RING (chan, 0); + + count -= vc; + start = restart; + } +} + +void +nvfx_draw_elements(struct pipe_context *pipe, + struct pipe_buffer *indexBuffer, unsigned indexSize, + unsigned mode, unsigned start, unsigned count) +{ + struct nvfx_context *nvfx = nvfx_context(pipe); + boolean idxbuf; + + idxbuf = nvfx_vbo_set_idxbuf(nvfx, indexBuffer, indexSize); + if (FORCE_SWTNL || !nvfx_state_validate(nvfx)) { + nvfx_draw_elements_swtnl(pipe, NULL, 0, + mode, start, count); + return; + } + + if (idxbuf) { + nvfx_draw_elements_vbo(pipe, mode, start, count); + } else { + nvfx_draw_elements_inline(pipe, indexBuffer, indexSize, + mode, start, count); + } + + pipe->flush(pipe, 0, NULL); +} + +static boolean +nvfx_vbo_validate(struct nvfx_context *nvfx) +{ + struct nouveau_stateobj *vtxbuf, *vtxfmt, *sattr = NULL; + struct nouveau_grobj *eng3d = nvfx->screen->eng3d; + struct pipe_buffer *ib = nvfx->idxbuf; + unsigned ib_format = nvfx->idxbuf_format; + unsigned vb_flags = NOUVEAU_BO_VRAM | NOUVEAU_BO_GART | NOUVEAU_BO_RD; + int hw; + + vtxbuf = so_new(3, 17, 18); + so_method(vtxbuf, eng3d, NV34TCL_VTXBUF_ADDRESS(0), nvfx->vtxelt->num_elements); + vtxfmt = so_new(1, 16, 0); + so_method(vtxfmt, eng3d, NV34TCL_VTXFMT(0), nvfx->vtxelt->num_elements); + + for (hw = 0; hw < nvfx->vtxelt->num_elements; hw++) { + struct pipe_vertex_element *ve; + struct pipe_vertex_buffer *vb; + unsigned type, ncomp; + + ve = &nvfx->vtxelt->pipe[hw]; + vb = &nvfx->vtxbuf[ve->vertex_buffer_index]; + + if (!vb->stride) { + if (!sattr) + sattr = so_new(16, 16 * 4, 0); + + if (nvfx_vbo_static_attrib(nvfx, sattr, hw, ve, vb)) { + so_data(vtxbuf, 0); + so_data(vtxfmt, NV34TCL_VTXFMT_TYPE_FLOAT); + continue; + } + } + + if (nvfx_vbo_format_to_hw(ve->src_format, &type, &ncomp)) { + nvfx->fallback_swtnl |= NVFX_NEW_ARRAYS; + so_ref(NULL, &vtxbuf); + so_ref(NULL, &vtxfmt); + return FALSE; + } + + so_reloc(vtxbuf, nouveau_bo(vb->buffer), + vb->buffer_offset + ve->src_offset, + vb_flags | NOUVEAU_BO_LOW | NOUVEAU_BO_OR, + 0, NV34TCL_VTXBUF_ADDRESS_DMA1); + so_data (vtxfmt, ((vb->stride << NV34TCL_VTXFMT_STRIDE_SHIFT) | + (ncomp << NV34TCL_VTXFMT_SIZE_SHIFT) | type)); + } + + if (ib) { + struct nouveau_bo *bo = nouveau_bo(ib); + + so_method(vtxbuf, eng3d, NV34TCL_IDXBUF_ADDRESS, 2); + so_reloc (vtxbuf, bo, 0, vb_flags | NOUVEAU_BO_LOW, 0, 0); + so_reloc (vtxbuf, bo, ib_format, vb_flags | NOUVEAU_BO_OR, + 0, NV34TCL_IDXBUF_FORMAT_DMA1); + } + + so_method(vtxbuf, eng3d, 0x1710, 1); + so_data (vtxbuf, 0); + + so_ref(vtxbuf, &nvfx->state.hw[NVFX_STATE_VTXBUF]); + so_ref(NULL, &vtxbuf); + nvfx->state.dirty |= (1ULL << NVFX_STATE_VTXBUF); + so_ref(vtxfmt, &nvfx->state.hw[NVFX_STATE_VTXFMT]); + so_ref(NULL, &vtxfmt); + nvfx->state.dirty |= (1ULL << NVFX_STATE_VTXFMT); + so_ref(sattr, &nvfx->state.hw[NVFX_STATE_VTXATTR]); + so_ref(NULL, &sattr); + nvfx->state.dirty |= (1ULL << NVFX_STATE_VTXATTR); + return FALSE; +} + +struct nvfx_state_entry nvfx_state_vbo = { + .validate = nvfx_vbo_validate, + .dirty = { + .pipe = NVFX_NEW_ARRAYS, + .hw = 0, + } +}; -- cgit v1.2.3 From c65a8f3ed2ab1650df38a3ed32d1e91e84b50520 Mon Sep 17 00:00:00 2001 From: Luca Barbieri Date: Sun, 21 Feb 2010 12:39:21 +0100 Subject: nv30, nv40: partially unify nv[34]0_state.c state.c is identical except for: 1. Sampler state creation is different 2. nv40 swtnl support 3. Separate blend equations on nv40 This patch unifies nv[34]0_state.c, except the sampler state creation code. --- src/gallium/drivers/nv30/nv30_context.c | 2 +- src/gallium/drivers/nv30/nv30_context.h | 6 - src/gallium/drivers/nv30/nv30_state.c | 573 +----------------------------- src/gallium/drivers/nv40/nv40_context.c | 2 +- src/gallium/drivers/nv40/nv40_context.h | 6 - src/gallium/drivers/nv40/nv40_state.c | 577 +----------------------------- src/gallium/drivers/nvfx/Makefile | 1 + src/gallium/drivers/nvfx/nvfx_context.h | 8 + src/gallium/drivers/nvfx/nvfx_state.c | 605 ++++++++++++++++++++++++++++++++ 9 files changed, 618 insertions(+), 1162 deletions(-) create mode 100644 src/gallium/drivers/nvfx/nvfx_state.c (limited to 'src') diff --git a/src/gallium/drivers/nv30/nv30_context.c b/src/gallium/drivers/nv30/nv30_context.c index 730f458878..9ddb331e74 100644 --- a/src/gallium/drivers/nv30/nv30_context.c +++ b/src/gallium/drivers/nv30/nv30_context.c @@ -75,7 +75,7 @@ nv30_create(struct pipe_screen *pscreen, void *priv) nvfx_init_query_functions(nvfx); nvfx_init_surface_functions(nvfx); - nv30_init_state_functions(nvfx); + nvfx_init_state_functions(nvfx); nvfx_init_transfer_functions(nvfx); /* Create, configure, and install fallback swtnl path */ diff --git a/src/gallium/drivers/nv30/nv30_context.h b/src/gallium/drivers/nv30/nv30_context.h index de879d504f..16cf3cbaa4 100644 --- a/src/gallium/drivers/nv30/nv30_context.h +++ b/src/gallium/drivers/nv30/nv30_context.h @@ -3,12 +3,6 @@ #include "nvfx_context.h" -extern void nv30_init_state_functions(struct nvfx_context *nvfx); - -/* nv30_vertprog.c */ -extern void nv30_vertprog_destroy(struct nvfx_context *, - struct nvfx_vertex_program *); - /* nv30_fragtex.c */ extern void nv30_fragtex_bind(struct nvfx_context *); diff --git a/src/gallium/drivers/nv30/nv30_state.c b/src/gallium/drivers/nv30/nv30_state.c index 92a4089b31..bf96f7cf35 100644 --- a/src/gallium/drivers/nv30/nv30_state.c +++ b/src/gallium/drivers/nv30/nv30_state.c @@ -7,74 +7,6 @@ #include "nv30_context.h" #include "nvfx_state.h" -static void * -nv30_blend_state_create(struct pipe_context *pipe, - const struct pipe_blend_state *cso) -{ - struct nvfx_context *nvfx = nvfx_context(pipe); - struct nouveau_grobj *eng3d = nvfx->screen->eng3d; - struct nvfx_blend_state *bso = CALLOC(1, sizeof(*bso)); - struct nouveau_stateobj *so = so_new(5, 8, 0); - - if (cso->rt[0].blend_enable) { - so_method(so, eng3d, NV34TCL_BLEND_FUNC_ENABLE, 3); - so_data (so, 1); - so_data (so, (nvgl_blend_func(cso->rt[0].alpha_src_factor) << 16) | - nvgl_blend_func(cso->rt[0].rgb_src_factor)); - so_data (so, nvgl_blend_func(cso->rt[0].alpha_dst_factor) << 16 | - nvgl_blend_func(cso->rt[0].rgb_dst_factor)); - /* FIXME: Gallium assumes GL_EXT_blend_func_separate. - It is not the case for NV30 */ - so_method(so, eng3d, NV34TCL_BLEND_EQUATION, 1); - so_data (so, nvgl_blend_eqn(cso->rt[0].rgb_func)); - } else { - so_method(so, eng3d, NV34TCL_BLEND_FUNC_ENABLE, 1); - so_data (so, 0); - } - - so_method(so, eng3d, NV34TCL_COLOR_MASK, 1); - so_data (so, (((cso->rt[0].colormask & PIPE_MASK_A) ? (0x01 << 24) : 0) | - ((cso->rt[0].colormask & PIPE_MASK_R) ? (0x01 << 16) : 0) | - ((cso->rt[0].colormask & PIPE_MASK_G) ? (0x01 << 8) : 0) | - ((cso->rt[0].colormask & PIPE_MASK_B) ? (0x01 << 0) : 0))); - - if (cso->logicop_enable) { - so_method(so, eng3d, NV34TCL_COLOR_LOGIC_OP_ENABLE, 2); - so_data (so, 1); - so_data (so, nvgl_logicop_func(cso->logicop_func)); - } else { - so_method(so, eng3d, NV34TCL_COLOR_LOGIC_OP_ENABLE, 1); - so_data (so, 0); - } - - so_method(so, eng3d, NV34TCL_DITHER_ENABLE, 1); - so_data (so, cso->dither ? 1 : 0); - - so_ref(so, &bso->so); - so_ref(NULL, &so); - bso->pipe = *cso; - return (void *)bso; -} - -static void -nv30_blend_state_bind(struct pipe_context *pipe, void *hwcso) -{ - struct nvfx_context *nvfx = nvfx_context(pipe); - - nvfx->blend = hwcso; - nvfx->dirty |= NVFX_NEW_BLEND; -} - -static void -nv30_blend_state_delete(struct pipe_context *pipe, void *hwcso) -{ - struct nvfx_blend_state *bso = hwcso; - - so_ref(NULL, &bso->so); - FREE(bso); -} - - static INLINE unsigned wrap_mode(unsigned wrap) { unsigned ret; @@ -113,7 +45,7 @@ wrap_mode(unsigned wrap) { return ret >> NV34TCL_TX_WRAP_S_SHIFT; } -static void * +void * nv30_sampler_state_create(struct pipe_context *pipe, const struct pipe_sampler_state *cso) { @@ -245,506 +177,3 @@ nv30_sampler_state_create(struct pipe_context *pipe, return (void *)ps; } -static void -nv30_sampler_state_bind(struct pipe_context *pipe, unsigned nr, void **sampler) -{ - struct nvfx_context *nvfx = nvfx_context(pipe); - unsigned unit; - - for (unit = 0; unit < nr; unit++) { - nvfx->tex_sampler[unit] = sampler[unit]; - nvfx->dirty_samplers |= (1 << unit); - } - - for (unit = nr; unit < nvfx->nr_samplers; unit++) { - nvfx->tex_sampler[unit] = NULL; - nvfx->dirty_samplers |= (1 << unit); - } - - nvfx->nr_samplers = nr; - nvfx->dirty |= NVFX_NEW_SAMPLER; -} - -static void -nv30_sampler_state_delete(struct pipe_context *pipe, void *hwcso) -{ - FREE(hwcso); -} - -static void -nv30_set_sampler_texture(struct pipe_context *pipe, unsigned nr, - struct pipe_texture **miptree) -{ - struct nvfx_context *nvfx = nvfx_context(pipe); - unsigned unit; - - for (unit = 0; unit < nr; unit++) { - pipe_texture_reference((struct pipe_texture **) - &nvfx->tex_miptree[unit], miptree[unit]); - nvfx->dirty_samplers |= (1 << unit); - } - - for (unit = nr; unit < nvfx->nr_textures; unit++) { - pipe_texture_reference((struct pipe_texture **) - &nvfx->tex_miptree[unit], NULL); - nvfx->dirty_samplers |= (1 << unit); - } - - nvfx->nr_textures = nr; - nvfx->dirty |= NVFX_NEW_SAMPLER; -} - -static void * -nv30_rasterizer_state_create(struct pipe_context *pipe, - const struct pipe_rasterizer_state *cso) -{ - struct nvfx_context *nvfx = nvfx_context(pipe); - struct nvfx_rasterizer_state *rsso = CALLOC(1, sizeof(*rsso)); - struct nouveau_stateobj *so = so_new(9, 19, 0); - struct nouveau_grobj *eng3d = nvfx->screen->eng3d; - - /*XXX: ignored: - * light_twoside - * point_smooth -nohw - * multisample - */ - - so_method(so, eng3d, NV34TCL_SHADE_MODEL, 1); - so_data (so, cso->flatshade ? NV34TCL_SHADE_MODEL_FLAT : - NV34TCL_SHADE_MODEL_SMOOTH); - - so_method(so, eng3d, NV34TCL_LINE_WIDTH, 2); - so_data (so, (unsigned char)(cso->line_width * 8.0) & 0xff); - so_data (so, cso->line_smooth ? 1 : 0); - so_method(so, eng3d, NV34TCL_LINE_STIPPLE_ENABLE, 2); - so_data (so, cso->line_stipple_enable ? 1 : 0); - so_data (so, (cso->line_stipple_pattern << 16) | - cso->line_stipple_factor); - - so_method(so, eng3d, NV34TCL_POINT_SIZE, 1); - so_data (so, fui(cso->point_size)); - - so_method(so, eng3d, NV34TCL_POLYGON_MODE_FRONT, 6); - if (cso->front_winding == PIPE_WINDING_CCW) { - so_data(so, nvgl_polygon_mode(cso->fill_ccw)); - so_data(so, nvgl_polygon_mode(cso->fill_cw)); - switch (cso->cull_mode) { - case PIPE_WINDING_CCW: - so_data(so, NV34TCL_CULL_FACE_FRONT); - break; - case PIPE_WINDING_CW: - so_data(so, NV34TCL_CULL_FACE_BACK); - break; - case PIPE_WINDING_BOTH: - so_data(so, NV34TCL_CULL_FACE_FRONT_AND_BACK); - break; - default: - so_data(so, NV34TCL_CULL_FACE_BACK); - break; - } - so_data(so, NV34TCL_FRONT_FACE_CCW); - } else { - so_data(so, nvgl_polygon_mode(cso->fill_cw)); - so_data(so, nvgl_polygon_mode(cso->fill_ccw)); - switch (cso->cull_mode) { - case PIPE_WINDING_CCW: - so_data(so, NV34TCL_CULL_FACE_BACK); - break; - case PIPE_WINDING_CW: - so_data(so, NV34TCL_CULL_FACE_FRONT); - break; - case PIPE_WINDING_BOTH: - so_data(so, NV34TCL_CULL_FACE_FRONT_AND_BACK); - break; - default: - so_data(so, NV34TCL_CULL_FACE_BACK); - break; - } - so_data(so, NV34TCL_FRONT_FACE_CW); - } - so_data(so, cso->poly_smooth ? 1 : 0); - so_data(so, (cso->cull_mode != PIPE_WINDING_NONE) ? 1 : 0); - - so_method(so, eng3d, NV34TCL_POLYGON_STIPPLE_ENABLE, 1); - so_data (so, cso->poly_stipple_enable ? 1 : 0); - - so_method(so, eng3d, NV34TCL_POLYGON_OFFSET_POINT_ENABLE, 3); - if ((cso->offset_cw && cso->fill_cw == PIPE_POLYGON_MODE_POINT) || - (cso->offset_ccw && cso->fill_ccw == PIPE_POLYGON_MODE_POINT)) - so_data(so, 1); - else - so_data(so, 0); - if ((cso->offset_cw && cso->fill_cw == PIPE_POLYGON_MODE_LINE) || - (cso->offset_ccw && cso->fill_ccw == PIPE_POLYGON_MODE_LINE)) - so_data(so, 1); - else - so_data(so, 0); - if ((cso->offset_cw && cso->fill_cw == PIPE_POLYGON_MODE_FILL) || - (cso->offset_ccw && cso->fill_ccw == PIPE_POLYGON_MODE_FILL)) - so_data(so, 1); - else - so_data(so, 0); - if (cso->offset_cw || cso->offset_ccw) { - so_method(so, eng3d, NV34TCL_POLYGON_OFFSET_FACTOR, 2); - so_data (so, fui(cso->offset_scale)); - so_data (so, fui(cso->offset_units * 2)); - } - - so_method(so, eng3d, NV34TCL_POINT_SPRITE, 1); - if (cso->point_quad_rasterization) { - unsigned psctl = (1 << 0), i; - - for (i = 0; i < 8; i++) { - if ((cso->sprite_coord_enable >> i) & 1) - psctl |= (1 << (8 + i)); - } - - so_data(so, psctl); - } else { - so_data(so, 0); - } - - so_ref(so, &rsso->so); - so_ref(NULL, &so); - rsso->pipe = *cso; - return (void *)rsso; -} - -static void -nv30_rasterizer_state_bind(struct pipe_context *pipe, void *hwcso) -{ - struct nvfx_context *nvfx = nvfx_context(pipe); - - nvfx->rasterizer = hwcso; - nvfx->dirty |= NVFX_NEW_RAST; - /*nvfx->draw_dirty |= NVFX_NEW_RAST;*/ -} - -static void -nv30_rasterizer_state_delete(struct pipe_context *pipe, void *hwcso) -{ - struct nvfx_rasterizer_state *rsso = hwcso; - - so_ref(NULL, &rsso->so); - FREE(rsso); -} - -static void * -nv30_depth_stencil_alpha_state_create(struct pipe_context *pipe, - const struct pipe_depth_stencil_alpha_state *cso) -{ - struct nvfx_context *nvfx = nvfx_context(pipe); - struct nvfx_zsa_state *zsaso = CALLOC(1, sizeof(*zsaso)); - struct nouveau_stateobj *so = so_new(6, 20, 0); - struct nouveau_grobj *eng3d = nvfx->screen->eng3d; - - so_method(so, eng3d, NV34TCL_DEPTH_FUNC, 3); - so_data (so, nvgl_comparison_op(cso->depth.func)); - so_data (so, cso->depth.writemask ? 1 : 0); - so_data (so, cso->depth.enabled ? 1 : 0); - - so_method(so, eng3d, NV34TCL_ALPHA_FUNC_ENABLE, 3); - so_data (so, cso->alpha.enabled ? 1 : 0); - so_data (so, nvgl_comparison_op(cso->alpha.func)); - so_data (so, float_to_ubyte(cso->alpha.ref_value)); - - if (cso->stencil[0].enabled) { - so_method(so, eng3d, NV34TCL_STENCIL_FRONT_ENABLE, 3); - so_data (so, cso->stencil[0].enabled ? 1 : 0); - so_data (so, cso->stencil[0].writemask); - so_data (so, nvgl_comparison_op(cso->stencil[0].func)); - so_method(so, eng3d, NV34TCL_STENCIL_FRONT_FUNC_MASK, 4); - so_data (so, cso->stencil[0].valuemask); - so_data (so, nvgl_stencil_op(cso->stencil[0].fail_op)); - so_data (so, nvgl_stencil_op(cso->stencil[0].zfail_op)); - so_data (so, nvgl_stencil_op(cso->stencil[0].zpass_op)); - } else { - so_method(so, eng3d, NV34TCL_STENCIL_FRONT_ENABLE, 1); - so_data (so, 0); - } - - if (cso->stencil[1].enabled) { - so_method(so, eng3d, NV34TCL_STENCIL_BACK_ENABLE, 3); - so_data (so, cso->stencil[1].enabled ? 1 : 0); - so_data (so, cso->stencil[1].writemask); - so_data (so, nvgl_comparison_op(cso->stencil[1].func)); - so_method(so, eng3d, NV34TCL_STENCIL_BACK_FUNC_MASK, 4); - so_data (so, cso->stencil[1].valuemask); - so_data (so, nvgl_stencil_op(cso->stencil[1].fail_op)); - so_data (so, nvgl_stencil_op(cso->stencil[1].zfail_op)); - so_data (so, nvgl_stencil_op(cso->stencil[1].zpass_op)); - } else { - so_method(so, eng3d, NV34TCL_STENCIL_BACK_ENABLE, 1); - so_data (so, 0); - } - - so_ref(so, &zsaso->so); - so_ref(NULL, &so); - zsaso->pipe = *cso; - return (void *)zsaso; -} - -static void -nv30_depth_stencil_alpha_state_bind(struct pipe_context *pipe, void *hwcso) -{ - struct nvfx_context *nvfx = nvfx_context(pipe); - - nvfx->zsa = hwcso; - nvfx->dirty |= NVFX_NEW_ZSA; -} - -static void -nv30_depth_stencil_alpha_state_delete(struct pipe_context *pipe, void *hwcso) -{ - struct nvfx_zsa_state *zsaso = hwcso; - - so_ref(NULL, &zsaso->so); - FREE(zsaso); -} - -static void * -nv30_vp_state_create(struct pipe_context *pipe, - const struct pipe_shader_state *cso) -{ - /*struct nvfx_context *nvfx = nvfx_context(pipe);*/ - struct nvfx_vertex_program *vp; - - vp = CALLOC(1, sizeof(struct nvfx_vertex_program)); - vp->pipe.tokens = tgsi_dup_tokens(cso->tokens); - /*vp->draw = draw_create_vertex_shader(nvfx->draw, &vp->pipe);*/ - - return (void *)vp; -} - -static void -nv30_vp_state_bind(struct pipe_context *pipe, void *hwcso) -{ - struct nvfx_context *nvfx = nvfx_context(pipe); - - nvfx->vertprog = hwcso; - nvfx->dirty |= NVFX_NEW_VERTPROG; - /*nvfx->draw_dirty |= NVFX_NEW_VERTPROG;*/ -} - -static void -nv30_vp_state_delete(struct pipe_context *pipe, void *hwcso) -{ - struct nvfx_context *nvfx = nvfx_context(pipe); - struct nvfx_vertex_program *vp = hwcso; - - /*draw_delete_vertex_shader(nvfx->draw, vp->draw);*/ - nv30_vertprog_destroy(nvfx, vp); - FREE((void*)vp->pipe.tokens); - FREE(vp); -} - -static void * -nv30_fp_state_create(struct pipe_context *pipe, - const struct pipe_shader_state *cso) -{ - struct nvfx_fragment_program *fp; - - fp = CALLOC(1, sizeof(struct nvfx_fragment_program)); - fp->pipe.tokens = tgsi_dup_tokens(cso->tokens); - - tgsi_scan_shader(fp->pipe.tokens, &fp->info); - - return (void *)fp; -} - -static void -nv30_fp_state_bind(struct pipe_context *pipe, void *hwcso) -{ - struct nvfx_context *nvfx = nvfx_context(pipe); - - nvfx->fragprog = hwcso; - nvfx->dirty |= NVFX_NEW_FRAGPROG; -} - -static void -nv30_fp_state_delete(struct pipe_context *pipe, void *hwcso) -{ - struct nvfx_context *nvfx = nvfx_context(pipe); - struct nvfx_fragment_program *fp = hwcso; - - nvfx_fragprog_destroy(nvfx, fp); - FREE((void*)fp->pipe.tokens); - FREE(fp); -} - -static void -nv30_set_blend_color(struct pipe_context *pipe, - const struct pipe_blend_color *bcol) -{ - struct nvfx_context *nvfx = nvfx_context(pipe); - - nvfx->blend_colour = *bcol; - nvfx->dirty |= NVFX_NEW_BCOL; -} - -static void -nv30_set_stencil_ref(struct pipe_context *pipe, - const struct pipe_stencil_ref *sr) -{ - struct nvfx_context *nvfx = nvfx_context(pipe); - - nvfx->stencil_ref = *sr; - nvfx->dirty |= NVFX_NEW_SR; -} - -static void -nv30_set_clip_state(struct pipe_context *pipe, - const struct pipe_clip_state *clip) -{ -} - -static void -nv30_set_constant_buffer(struct pipe_context *pipe, uint shader, uint index, - struct pipe_buffer *buf ) -{ - struct nvfx_context *nvfx = nvfx_context(pipe); - - nvfx->constbuf[shader] = buf; - nvfx->constbuf_nr[shader] = buf->size / (4 * sizeof(float)); - - if (shader == PIPE_SHADER_VERTEX) { - nvfx->dirty |= NVFX_NEW_VERTPROG; - } else - if (shader == PIPE_SHADER_FRAGMENT) { - nvfx->dirty |= NVFX_NEW_FRAGPROG; - } -} - -static void -nv30_set_framebuffer_state(struct pipe_context *pipe, - const struct pipe_framebuffer_state *fb) -{ - struct nvfx_context *nvfx = nvfx_context(pipe); - - nvfx->framebuffer = *fb; - nvfx->dirty |= NVFX_NEW_FB; -} - -static void -nv30_set_polygon_stipple(struct pipe_context *pipe, - const struct pipe_poly_stipple *stipple) -{ - struct nvfx_context *nvfx = nvfx_context(pipe); - - memcpy(nvfx->stipple, stipple->stipple, 4 * 32); - nvfx->dirty |= NVFX_NEW_STIPPLE; -} - -static void -nv30_set_scissor_state(struct pipe_context *pipe, - const struct pipe_scissor_state *s) -{ - struct nvfx_context *nvfx = nvfx_context(pipe); - - nvfx->scissor = *s; - nvfx->dirty |= NVFX_NEW_SCISSOR; -} - -static void -nv30_set_viewport_state(struct pipe_context *pipe, - const struct pipe_viewport_state *vpt) -{ - struct nvfx_context *nvfx = nvfx_context(pipe); - - nvfx->viewport = *vpt; - nvfx->dirty |= NVFX_NEW_VIEWPORT; - /*nvfx->draw_dirty |= NVFX_NEW_VIEWPORT;*/ -} - -static void -nv30_set_vertex_buffers(struct pipe_context *pipe, unsigned count, - const struct pipe_vertex_buffer *vb) -{ - struct nvfx_context *nvfx = nvfx_context(pipe); - - memcpy(nvfx->vtxbuf, vb, sizeof(*vb) * count); - nvfx->vtxbuf_nr = count; - - nvfx->dirty |= NVFX_NEW_ARRAYS; - /*nvfx->draw_dirty |= NVFX_NEW_ARRAYS;*/ -} - -static void * -nv30_vtxelts_state_create(struct pipe_context *pipe, - unsigned num_elements, - const struct pipe_vertex_element *elements) -{ - struct nvfx_vtxelt_state *cso = CALLOC_STRUCT(nvfx_vtxelt_state); - - assert(num_elements < 16); /* not doing fallbacks yet */ - cso->num_elements = num_elements; - memcpy(cso->pipe, elements, num_elements * sizeof(*elements)); - -/* nv30_vtxelt_construct(cso);*/ - - return (void *)cso; -} - -static void -nv30_vtxelts_state_delete(struct pipe_context *pipe, void *hwcso) -{ - FREE(hwcso); -} - -static void -nv30_vtxelts_state_bind(struct pipe_context *pipe, void *hwcso) -{ - struct nvfx_context *nvfx = nvfx_context(pipe); - - nvfx->vtxelt = hwcso; - nvfx->dirty |= NVFX_NEW_ARRAYS; - /*nvfx->draw_dirty |= NVFX_NEW_ARRAYS;*/ -} - -void -nv30_init_state_functions(struct nvfx_context *nvfx) -{ - nvfx->pipe.create_blend_state = nv30_blend_state_create; - nvfx->pipe.bind_blend_state = nv30_blend_state_bind; - nvfx->pipe.delete_blend_state = nv30_blend_state_delete; - - nvfx->pipe.create_sampler_state = nv30_sampler_state_create; - nvfx->pipe.bind_fragment_sampler_states = nv30_sampler_state_bind; - nvfx->pipe.delete_sampler_state = nv30_sampler_state_delete; - nvfx->pipe.set_fragment_sampler_textures = nv30_set_sampler_texture; - - nvfx->pipe.create_rasterizer_state = nv30_rasterizer_state_create; - nvfx->pipe.bind_rasterizer_state = nv30_rasterizer_state_bind; - nvfx->pipe.delete_rasterizer_state = nv30_rasterizer_state_delete; - - nvfx->pipe.create_depth_stencil_alpha_state = - nv30_depth_stencil_alpha_state_create; - nvfx->pipe.bind_depth_stencil_alpha_state = - nv30_depth_stencil_alpha_state_bind; - nvfx->pipe.delete_depth_stencil_alpha_state = - nv30_depth_stencil_alpha_state_delete; - - nvfx->pipe.create_vs_state = nv30_vp_state_create; - nvfx->pipe.bind_vs_state = nv30_vp_state_bind; - nvfx->pipe.delete_vs_state = nv30_vp_state_delete; - - nvfx->pipe.create_fs_state = nv30_fp_state_create; - nvfx->pipe.bind_fs_state = nv30_fp_state_bind; - nvfx->pipe.delete_fs_state = nv30_fp_state_delete; - - nvfx->pipe.set_blend_color = nv30_set_blend_color; - nvfx->pipe.set_stencil_ref = nv30_set_stencil_ref; - nvfx->pipe.set_clip_state = nv30_set_clip_state; - nvfx->pipe.set_constant_buffer = nv30_set_constant_buffer; - nvfx->pipe.set_framebuffer_state = nv30_set_framebuffer_state; - nvfx->pipe.set_polygon_stipple = nv30_set_polygon_stipple; - nvfx->pipe.set_scissor_state = nv30_set_scissor_state; - nvfx->pipe.set_viewport_state = nv30_set_viewport_state; - - nvfx->pipe.create_vertex_elements_state = nv30_vtxelts_state_create; - nvfx->pipe.delete_vertex_elements_state = nv30_vtxelts_state_delete; - nvfx->pipe.bind_vertex_elements_state = nv30_vtxelts_state_bind; - - nvfx->pipe.set_vertex_buffers = nv30_set_vertex_buffers; -} - diff --git a/src/gallium/drivers/nv40/nv40_context.c b/src/gallium/drivers/nv40/nv40_context.c index 85c1355b4f..13bd50dd1d 100644 --- a/src/gallium/drivers/nv40/nv40_context.c +++ b/src/gallium/drivers/nv40/nv40_context.c @@ -75,7 +75,7 @@ nv40_create(struct pipe_screen *pscreen, void *priv) nvfx_init_query_functions(nvfx); nvfx_init_surface_functions(nvfx); - nv40_init_state_functions(nvfx); + nvfx_init_state_functions(nvfx); nvfx_init_transfer_functions(nvfx); /* Create, configure, and install fallback swtnl path */ diff --git a/src/gallium/drivers/nv40/nv40_context.h b/src/gallium/drivers/nv40/nv40_context.h index cebf21d00c..5ea2229fac 100644 --- a/src/gallium/drivers/nv40/nv40_context.h +++ b/src/gallium/drivers/nv40/nv40_context.h @@ -3,12 +3,6 @@ #include "nvfx_context.h" -extern void nv40_init_state_functions(struct nvfx_context *nvfx); - -/* nv40_vertprog.c */ -extern void nv40_vertprog_destroy(struct nvfx_context *, - struct nvfx_vertex_program *); - /* nv40_fragtex.c */ extern void nv40_fragtex_bind(struct nvfx_context *); diff --git a/src/gallium/drivers/nv40/nv40_state.c b/src/gallium/drivers/nv40/nv40_state.c index 1f4b9777d4..4d4098bc42 100644 --- a/src/gallium/drivers/nv40/nv40_state.c +++ b/src/gallium/drivers/nv40/nv40_state.c @@ -9,73 +9,6 @@ #include "nv40_context.h" #include "nvfx_state.h" -static void * -nv40_blend_state_create(struct pipe_context *pipe, - const struct pipe_blend_state *cso) -{ - struct nvfx_context *nvfx = nvfx_context(pipe); - struct nouveau_grobj *eng3d = nvfx->screen->eng3d; - struct nvfx_blend_state *bso = CALLOC(1, sizeof(*bso)); - struct nouveau_stateobj *so = so_new(5, 8, 0); - - if (cso->rt[0].blend_enable) { - so_method(so, eng3d, NV34TCL_BLEND_FUNC_ENABLE, 3); - so_data (so, 1); - so_data (so, (nvgl_blend_func(cso->rt[0].alpha_src_factor) << 16) | - nvgl_blend_func(cso->rt[0].rgb_src_factor)); - so_data (so, nvgl_blend_func(cso->rt[0].alpha_dst_factor) << 16 | - nvgl_blend_func(cso->rt[0].rgb_dst_factor)); - so_method(so, eng3d, NV40TCL_BLEND_EQUATION, 1); - so_data (so, nvgl_blend_eqn(cso->rt[0].alpha_func) << 16 | - nvgl_blend_eqn(cso->rt[0].rgb_func)); - } else { - so_method(so, eng3d, NV34TCL_BLEND_FUNC_ENABLE, 1); - so_data (so, 0); - } - - so_method(so, eng3d, NV34TCL_COLOR_MASK, 1); - so_data (so, (((cso->rt[0].colormask & PIPE_MASK_A) ? (0x01 << 24) : 0) | - ((cso->rt[0].colormask & PIPE_MASK_R) ? (0x01 << 16) : 0) | - ((cso->rt[0].colormask & PIPE_MASK_G) ? (0x01 << 8) : 0) | - ((cso->rt[0].colormask & PIPE_MASK_B) ? (0x01 << 0) : 0))); - - if (cso->logicop_enable) { - so_method(so, eng3d, NV34TCL_COLOR_LOGIC_OP_ENABLE, 2); - so_data (so, 1); - so_data (so, nvgl_logicop_func(cso->logicop_func)); - } else { - so_method(so, eng3d, NV34TCL_COLOR_LOGIC_OP_ENABLE, 1); - so_data (so, 0); - } - - so_method(so, eng3d, NV34TCL_DITHER_ENABLE, 1); - so_data (so, cso->dither ? 1 : 0); - - so_ref(so, &bso->so); - so_ref(NULL, &so); - bso->pipe = *cso; - return (void *)bso; -} - -static void -nv40_blend_state_bind(struct pipe_context *pipe, void *hwcso) -{ - struct nvfx_context *nvfx = nvfx_context(pipe); - - nvfx->blend = hwcso; - nvfx->dirty |= NVFX_NEW_BLEND; -} - -static void -nv40_blend_state_delete(struct pipe_context *pipe, void *hwcso) -{ - struct nvfx_blend_state *bso = hwcso; - - so_ref(NULL, &bso->so); - FREE(bso); -} - - static INLINE unsigned wrap_mode(unsigned wrap) { unsigned ret; @@ -114,7 +47,7 @@ wrap_mode(unsigned wrap) { return ret >> NV34TCL_TX_WRAP_S_SHIFT; } -static void * +void * nv40_sampler_state_create(struct pipe_context *pipe, const struct pipe_sampler_state *cso) { @@ -255,511 +188,3 @@ nv40_sampler_state_create(struct pipe_context *pipe, return (void *)ps; } -static void -nv40_sampler_state_bind(struct pipe_context *pipe, unsigned nr, void **sampler) -{ - struct nvfx_context *nvfx = nvfx_context(pipe); - unsigned unit; - - for (unit = 0; unit < nr; unit++) { - nvfx->tex_sampler[unit] = sampler[unit]; - nvfx->dirty_samplers |= (1 << unit); - } - - for (unit = nr; unit < nvfx->nr_samplers; unit++) { - nvfx->tex_sampler[unit] = NULL; - nvfx->dirty_samplers |= (1 << unit); - } - - nvfx->nr_samplers = nr; - nvfx->dirty |= NVFX_NEW_SAMPLER; -} - -static void -nv40_sampler_state_delete(struct pipe_context *pipe, void *hwcso) -{ - FREE(hwcso); -} - -static void -nv40_set_sampler_texture(struct pipe_context *pipe, unsigned nr, - struct pipe_texture **miptree) -{ - struct nvfx_context *nvfx = nvfx_context(pipe); - unsigned unit; - - for (unit = 0; unit < nr; unit++) { - pipe_texture_reference((struct pipe_texture **) - &nvfx->tex_miptree[unit], miptree[unit]); - nvfx->dirty_samplers |= (1 << unit); - } - - for (unit = nr; unit < nvfx->nr_textures; unit++) { - pipe_texture_reference((struct pipe_texture **) - &nvfx->tex_miptree[unit], NULL); - nvfx->dirty_samplers |= (1 << unit); - } - - nvfx->nr_textures = nr; - nvfx->dirty |= NVFX_NEW_SAMPLER; -} - -static void * -nv40_rasterizer_state_create(struct pipe_context *pipe, - const struct pipe_rasterizer_state *cso) -{ - struct nvfx_context *nvfx = nvfx_context(pipe); - struct nvfx_rasterizer_state *rsso = CALLOC(1, sizeof(*rsso)); - struct nouveau_stateobj *so = so_new(9, 19, 0); - struct nouveau_grobj *eng3d = nvfx->screen->eng3d; - - /*XXX: ignored: - * light_twoside - * point_smooth -nohw - * multisample - */ - - so_method(so, eng3d, NV34TCL_SHADE_MODEL, 1); - so_data (so, cso->flatshade ? NV34TCL_SHADE_MODEL_FLAT : - NV34TCL_SHADE_MODEL_SMOOTH); - - so_method(so, eng3d, NV34TCL_LINE_WIDTH, 2); - so_data (so, (unsigned char)(cso->line_width * 8.0) & 0xff); - so_data (so, cso->line_smooth ? 1 : 0); - so_method(so, eng3d, NV34TCL_LINE_STIPPLE_ENABLE, 2); - so_data (so, cso->line_stipple_enable ? 1 : 0); - so_data (so, (cso->line_stipple_pattern << 16) | - cso->line_stipple_factor); - - so_method(so, eng3d, NV34TCL_POINT_SIZE, 1); - so_data (so, fui(cso->point_size)); - - so_method(so, eng3d, NV34TCL_POLYGON_MODE_FRONT, 6); - if (cso->front_winding == PIPE_WINDING_CCW) { - so_data(so, nvgl_polygon_mode(cso->fill_ccw)); - so_data(so, nvgl_polygon_mode(cso->fill_cw)); - switch (cso->cull_mode) { - case PIPE_WINDING_CCW: - so_data(so, NV34TCL_CULL_FACE_FRONT); - break; - case PIPE_WINDING_CW: - so_data(so, NV34TCL_CULL_FACE_BACK); - break; - case PIPE_WINDING_BOTH: - so_data(so, NV34TCL_CULL_FACE_FRONT_AND_BACK); - break; - default: - so_data(so, NV34TCL_CULL_FACE_BACK); - break; - } - so_data(so, NV34TCL_FRONT_FACE_CCW); - } else { - so_data(so, nvgl_polygon_mode(cso->fill_cw)); - so_data(so, nvgl_polygon_mode(cso->fill_ccw)); - switch (cso->cull_mode) { - case PIPE_WINDING_CCW: - so_data(so, NV34TCL_CULL_FACE_BACK); - break; - case PIPE_WINDING_CW: - so_data(so, NV34TCL_CULL_FACE_FRONT); - break; - case PIPE_WINDING_BOTH: - so_data(so, NV34TCL_CULL_FACE_FRONT_AND_BACK); - break; - default: - so_data(so, NV34TCL_CULL_FACE_BACK); - break; - } - so_data(so, NV34TCL_FRONT_FACE_CW); - } - so_data(so, cso->poly_smooth ? 1 : 0); - so_data(so, (cso->cull_mode != PIPE_WINDING_NONE) ? 1 : 0); - - so_method(so, eng3d, NV34TCL_POLYGON_STIPPLE_ENABLE, 1); - so_data (so, cso->poly_stipple_enable ? 1 : 0); - - so_method(so, eng3d, NV34TCL_POLYGON_OFFSET_POINT_ENABLE, 3); - if ((cso->offset_cw && cso->fill_cw == PIPE_POLYGON_MODE_POINT) || - (cso->offset_ccw && cso->fill_ccw == PIPE_POLYGON_MODE_POINT)) - so_data(so, 1); - else - so_data(so, 0); - if ((cso->offset_cw && cso->fill_cw == PIPE_POLYGON_MODE_LINE) || - (cso->offset_ccw && cso->fill_ccw == PIPE_POLYGON_MODE_LINE)) - so_data(so, 1); - else - so_data(so, 0); - if ((cso->offset_cw && cso->fill_cw == PIPE_POLYGON_MODE_FILL) || - (cso->offset_ccw && cso->fill_ccw == PIPE_POLYGON_MODE_FILL)) - so_data(so, 1); - else - so_data(so, 0); - if (cso->offset_cw || cso->offset_ccw) { - so_method(so, eng3d, NV34TCL_POLYGON_OFFSET_FACTOR, 2); - so_data (so, fui(cso->offset_scale)); - so_data (so, fui(cso->offset_units * 2)); - } - - so_method(so, eng3d, NV34TCL_POINT_SPRITE, 1); - if (cso->point_quad_rasterization) { - unsigned psctl = (1 << 0), i; - - for (i = 0; i < 8; i++) { - if ((cso->sprite_coord_enable >> i) & 1) - psctl |= (1 << (8 + i)); - } - - so_data(so, psctl); - } else { - so_data(so, 0); - } - - so_ref(so, &rsso->so); - so_ref(NULL, &so); - rsso->pipe = *cso; - return (void *)rsso; -} - -static void -nv40_rasterizer_state_bind(struct pipe_context *pipe, void *hwcso) -{ - struct nvfx_context *nvfx = nvfx_context(pipe); - - nvfx->rasterizer = hwcso; - nvfx->dirty |= NVFX_NEW_RAST; - nvfx->draw_dirty |= NVFX_NEW_RAST; -} - -static void -nv40_rasterizer_state_delete(struct pipe_context *pipe, void *hwcso) -{ - struct nvfx_rasterizer_state *rsso = hwcso; - - so_ref(NULL, &rsso->so); - FREE(rsso); -} - -static void * -nv40_depth_stencil_alpha_state_create(struct pipe_context *pipe, - const struct pipe_depth_stencil_alpha_state *cso) -{ - struct nvfx_context *nvfx = nvfx_context(pipe); - struct nvfx_zsa_state *zsaso = CALLOC(1, sizeof(*zsaso)); - struct nouveau_stateobj *so = so_new(6, 20, 0); - struct nouveau_grobj *eng3d = nvfx->screen->eng3d; - - so_method(so, eng3d, NV34TCL_DEPTH_FUNC, 3); - so_data (so, nvgl_comparison_op(cso->depth.func)); - so_data (so, cso->depth.writemask ? 1 : 0); - so_data (so, cso->depth.enabled ? 1 : 0); - - so_method(so, eng3d, NV34TCL_ALPHA_FUNC_ENABLE, 3); - so_data (so, cso->alpha.enabled ? 1 : 0); - so_data (so, nvgl_comparison_op(cso->alpha.func)); - so_data (so, float_to_ubyte(cso->alpha.ref_value)); - - if (cso->stencil[0].enabled) { - so_method(so, eng3d, NV34TCL_STENCIL_FRONT_ENABLE, 3); - so_data (so, cso->stencil[0].enabled ? 1 : 0); - so_data (so, cso->stencil[0].writemask); - so_data (so, nvgl_comparison_op(cso->stencil[0].func)); - so_method(so, eng3d, NV34TCL_STENCIL_FRONT_FUNC_MASK, 4); - so_data (so, cso->stencil[0].valuemask); - so_data (so, nvgl_stencil_op(cso->stencil[0].fail_op)); - so_data (so, nvgl_stencil_op(cso->stencil[0].zfail_op)); - so_data (so, nvgl_stencil_op(cso->stencil[0].zpass_op)); - } else { - so_method(so, eng3d, NV34TCL_STENCIL_FRONT_ENABLE, 1); - so_data (so, 0); - } - - if (cso->stencil[1].enabled) { - so_method(so, eng3d, NV34TCL_STENCIL_BACK_ENABLE, 3); - so_data (so, cso->stencil[1].enabled ? 1 : 0); - so_data (so, cso->stencil[1].writemask); - so_data (so, nvgl_comparison_op(cso->stencil[1].func)); - so_method(so, eng3d, NV34TCL_STENCIL_BACK_FUNC_MASK, 4); - so_data (so, cso->stencil[1].valuemask); - so_data (so, nvgl_stencil_op(cso->stencil[1].fail_op)); - so_data (so, nvgl_stencil_op(cso->stencil[1].zfail_op)); - so_data (so, nvgl_stencil_op(cso->stencil[1].zpass_op)); - } else { - so_method(so, eng3d, NV34TCL_STENCIL_BACK_ENABLE, 1); - so_data (so, 0); - } - - so_ref(so, &zsaso->so); - so_ref(NULL, &so); - zsaso->pipe = *cso; - return (void *)zsaso; -} - -static void -nv40_depth_stencil_alpha_state_bind(struct pipe_context *pipe, void *hwcso) -{ - struct nvfx_context *nvfx = nvfx_context(pipe); - - nvfx->zsa = hwcso; - nvfx->dirty |= NVFX_NEW_ZSA; -} - -static void -nv40_depth_stencil_alpha_state_delete(struct pipe_context *pipe, void *hwcso) -{ - struct nvfx_zsa_state *zsaso = hwcso; - - so_ref(NULL, &zsaso->so); - FREE(zsaso); -} - -static void * -nv40_vp_state_create(struct pipe_context *pipe, - const struct pipe_shader_state *cso) -{ - struct nvfx_context *nvfx = nvfx_context(pipe); - struct nvfx_vertex_program *vp; - - vp = CALLOC(1, sizeof(struct nvfx_vertex_program)); - vp->pipe.tokens = tgsi_dup_tokens(cso->tokens); - vp->draw = draw_create_vertex_shader(nvfx->draw, &vp->pipe); - - return (void *)vp; -} - -static void -nv40_vp_state_bind(struct pipe_context *pipe, void *hwcso) -{ - struct nvfx_context *nvfx = nvfx_context(pipe); - - nvfx->vertprog = hwcso; - nvfx->dirty |= NVFX_NEW_VERTPROG; - nvfx->draw_dirty |= NVFX_NEW_VERTPROG; -} - -static void -nv40_vp_state_delete(struct pipe_context *pipe, void *hwcso) -{ - struct nvfx_context *nvfx = nvfx_context(pipe); - struct nvfx_vertex_program *vp = hwcso; - - draw_delete_vertex_shader(nvfx->draw, vp->draw); - nv40_vertprog_destroy(nvfx, vp); - FREE((void*)vp->pipe.tokens); - FREE(vp); -} - -static void * -nv40_fp_state_create(struct pipe_context *pipe, - const struct pipe_shader_state *cso) -{ - struct nvfx_fragment_program *fp; - - fp = CALLOC(1, sizeof(struct nvfx_fragment_program)); - fp->pipe.tokens = tgsi_dup_tokens(cso->tokens); - - tgsi_scan_shader(fp->pipe.tokens, &fp->info); - - return (void *)fp; -} - -static void -nv40_fp_state_bind(struct pipe_context *pipe, void *hwcso) -{ - struct nvfx_context *nvfx = nvfx_context(pipe); - - nvfx->fragprog = hwcso; - nvfx->dirty |= NVFX_NEW_FRAGPROG; -} - -static void -nv40_fp_state_delete(struct pipe_context *pipe, void *hwcso) -{ - struct nvfx_context *nvfx = nvfx_context(pipe); - struct nvfx_fragment_program *fp = hwcso; - - nvfx_fragprog_destroy(nvfx, fp); - FREE((void*)fp->pipe.tokens); - FREE(fp); -} - -static void -nv40_set_blend_color(struct pipe_context *pipe, - const struct pipe_blend_color *bcol) -{ - struct nvfx_context *nvfx = nvfx_context(pipe); - - nvfx->blend_colour = *bcol; - nvfx->dirty |= NVFX_NEW_BCOL; -} - - static void -nv40_set_stencil_ref(struct pipe_context *pipe, - const struct pipe_stencil_ref *sr) -{ - struct nvfx_context *nvfx = nvfx_context(pipe); - - nvfx->stencil_ref = *sr; - nvfx->dirty |= NVFX_NEW_SR; -} - -static void -nv40_set_clip_state(struct pipe_context *pipe, - const struct pipe_clip_state *clip) -{ - struct nvfx_context *nvfx = nvfx_context(pipe); - - nvfx->clip = *clip; - nvfx->dirty |= NVFX_NEW_UCP; - nvfx->draw_dirty |= NVFX_NEW_UCP; -} - -static void -nv40_set_constant_buffer(struct pipe_context *pipe, uint shader, uint index, - struct pipe_buffer *buf ) -{ - struct nvfx_context *nvfx = nvfx_context(pipe); - - nvfx->constbuf[shader] = buf; - nvfx->constbuf_nr[shader] = buf->size / (4 * sizeof(float)); - - if (shader == PIPE_SHADER_VERTEX) { - nvfx->dirty |= NVFX_NEW_VERTPROG; - } else - if (shader == PIPE_SHADER_FRAGMENT) { - nvfx->dirty |= NVFX_NEW_FRAGPROG; - } -} - -static void -nv40_set_framebuffer_state(struct pipe_context *pipe, - const struct pipe_framebuffer_state *fb) -{ - struct nvfx_context *nvfx = nvfx_context(pipe); - - nvfx->framebuffer = *fb; - nvfx->dirty |= NVFX_NEW_FB; -} - -static void -nv40_set_polygon_stipple(struct pipe_context *pipe, - const struct pipe_poly_stipple *stipple) -{ - struct nvfx_context *nvfx = nvfx_context(pipe); - - memcpy(nvfx->stipple, stipple->stipple, 4 * 32); - nvfx->dirty |= NVFX_NEW_STIPPLE; -} - -static void -nv40_set_scissor_state(struct pipe_context *pipe, - const struct pipe_scissor_state *s) -{ - struct nvfx_context *nvfx = nvfx_context(pipe); - - nvfx->scissor = *s; - nvfx->dirty |= NVFX_NEW_SCISSOR; -} - -static void -nv40_set_viewport_state(struct pipe_context *pipe, - const struct pipe_viewport_state *vpt) -{ - struct nvfx_context *nvfx = nvfx_context(pipe); - - nvfx->viewport = *vpt; - nvfx->dirty |= NVFX_NEW_VIEWPORT; - nvfx->draw_dirty |= NVFX_NEW_VIEWPORT; -} - -static void -nv40_set_vertex_buffers(struct pipe_context *pipe, unsigned count, - const struct pipe_vertex_buffer *vb) -{ - struct nvfx_context *nvfx = nvfx_context(pipe); - - memcpy(nvfx->vtxbuf, vb, sizeof(*vb) * count); - nvfx->vtxbuf_nr = count; - - nvfx->dirty |= NVFX_NEW_ARRAYS; - nvfx->draw_dirty |= NVFX_NEW_ARRAYS; -} - -static void * -nv40_vtxelts_state_create(struct pipe_context *pipe, - unsigned num_elements, - const struct pipe_vertex_element *elements) -{ - struct nvfx_vtxelt_state *cso = CALLOC_STRUCT(nvfx_vtxelt_state); - - assert(num_elements < 16); /* not doing fallbacks yet */ - cso->num_elements = num_elements; - memcpy(cso->pipe, elements, num_elements * sizeof(*elements)); - -/* nv40_vtxelt_construct(cso);*/ - - return (void *)cso; -} - -static void -nv40_vtxelts_state_delete(struct pipe_context *pipe, void *hwcso) -{ - FREE(hwcso); -} - -static void -nv40_vtxelts_state_bind(struct pipe_context *pipe, void *hwcso) -{ - struct nvfx_context *nvfx = nvfx_context(pipe); - - nvfx->vtxelt = hwcso; - nvfx->dirty |= NVFX_NEW_ARRAYS; - nvfx->draw_dirty |= NVFX_NEW_ARRAYS; -} - -void -nv40_init_state_functions(struct nvfx_context *nvfx) -{ - nvfx->pipe.create_blend_state = nv40_blend_state_create; - nvfx->pipe.bind_blend_state = nv40_blend_state_bind; - nvfx->pipe.delete_blend_state = nv40_blend_state_delete; - - nvfx->pipe.create_sampler_state = nv40_sampler_state_create; - nvfx->pipe.bind_fragment_sampler_states = nv40_sampler_state_bind; - nvfx->pipe.delete_sampler_state = nv40_sampler_state_delete; - nvfx->pipe.set_fragment_sampler_textures = nv40_set_sampler_texture; - - nvfx->pipe.create_rasterizer_state = nv40_rasterizer_state_create; - nvfx->pipe.bind_rasterizer_state = nv40_rasterizer_state_bind; - nvfx->pipe.delete_rasterizer_state = nv40_rasterizer_state_delete; - - nvfx->pipe.create_depth_stencil_alpha_state = - nv40_depth_stencil_alpha_state_create; - nvfx->pipe.bind_depth_stencil_alpha_state = - nv40_depth_stencil_alpha_state_bind; - nvfx->pipe.delete_depth_stencil_alpha_state = - nv40_depth_stencil_alpha_state_delete; - - nvfx->pipe.create_vs_state = nv40_vp_state_create; - nvfx->pipe.bind_vs_state = nv40_vp_state_bind; - nvfx->pipe.delete_vs_state = nv40_vp_state_delete; - - nvfx->pipe.create_fs_state = nv40_fp_state_create; - nvfx->pipe.bind_fs_state = nv40_fp_state_bind; - nvfx->pipe.delete_fs_state = nv40_fp_state_delete; - - nvfx->pipe.set_blend_color = nv40_set_blend_color; - nvfx->pipe.set_stencil_ref = nv40_set_stencil_ref; - nvfx->pipe.set_clip_state = nv40_set_clip_state; - nvfx->pipe.set_constant_buffer = nv40_set_constant_buffer; - nvfx->pipe.set_framebuffer_state = nv40_set_framebuffer_state; - nvfx->pipe.set_polygon_stipple = nv40_set_polygon_stipple; - nvfx->pipe.set_scissor_state = nv40_set_scissor_state; - nvfx->pipe.set_viewport_state = nv40_set_viewport_state; - - nvfx->pipe.create_vertex_elements_state = nv40_vtxelts_state_create; - nvfx->pipe.delete_vertex_elements_state = nv40_vtxelts_state_delete; - nvfx->pipe.bind_vertex_elements_state = nv40_vtxelts_state_bind; - - nvfx->pipe.set_vertex_buffers = nv40_set_vertex_buffers; -} - diff --git a/src/gallium/drivers/nvfx/Makefile b/src/gallium/drivers/nvfx/Makefile index d1304ccea0..6c4ee17493 100644 --- a/src/gallium/drivers/nvfx/Makefile +++ b/src/gallium/drivers/nvfx/Makefile @@ -9,6 +9,7 @@ C_SOURCES = \ nvfx_fragprog.c \ nvfx_miptree.c \ nvfx_query.c \ + nvfx_state.c \ nvfx_state_blend.c \ nvfx_state_emit.c \ nvfx_state_fb.c \ diff --git a/src/gallium/drivers/nvfx/nvfx_context.h b/src/gallium/drivers/nvfx/nvfx_context.h index 8f121fe3af..ab1a1fbbe9 100644 --- a/src/gallium/drivers/nvfx/nvfx_context.h +++ b/src/gallium/drivers/nvfx/nvfx_context.h @@ -212,6 +212,9 @@ extern void nvfx_draw_elements_swtnl(struct pipe_context *pipe, extern void nvfx_fragprog_destroy(struct nvfx_context *, struct nvfx_fragment_program *); +/* nvfx_state.c */ +extern void nvfx_init_state_functions(struct nvfx_context *nvfx); + /* nvfx_state_emit.c */ extern void nvfx_state_flush_notify(struct nouveau_channel *chan); extern boolean nvfx_state_validate(struct nvfx_context *nvfx); @@ -230,4 +233,9 @@ extern void nvfx_draw_elements(struct pipe_context *pipe, unsigned mode, unsigned start, unsigned count); +/* nvfx_vertprog.c */ +extern void nv30_vertprog_destroy(struct nvfx_context *, + struct nvfx_vertex_program *); +extern void nv40_vertprog_destroy(struct nvfx_context *, + struct nvfx_vertex_program *); #endif diff --git a/src/gallium/drivers/nvfx/nvfx_state.c b/src/gallium/drivers/nvfx/nvfx_state.c new file mode 100644 index 0000000000..76780dc4f5 --- /dev/null +++ b/src/gallium/drivers/nvfx/nvfx_state.c @@ -0,0 +1,605 @@ +#include "pipe/p_state.h" +#include "pipe/p_defines.h" +#include "util/u_inlines.h" + +#include "draw/draw_context.h" + +#include "tgsi/tgsi_parse.h" + +#include "nvfx_context.h" +#include "nvfx_state.h" + +static void * +nvfx_blend_state_create(struct pipe_context *pipe, + const struct pipe_blend_state *cso) +{ + struct nvfx_context *nvfx = nvfx_context(pipe); + struct nouveau_grobj *eng3d = nvfx->screen->eng3d; + struct nvfx_blend_state *bso = CALLOC(1, sizeof(*bso)); + struct nouveau_stateobj *so = so_new(5, 8, 0); + + if (cso->rt[0].blend_enable) { + so_method(so, eng3d, NV34TCL_BLEND_FUNC_ENABLE, 3); + so_data (so, 1); + so_data (so, (nvgl_blend_func(cso->rt[0].alpha_src_factor) << 16) | + nvgl_blend_func(cso->rt[0].rgb_src_factor)); + so_data (so, nvgl_blend_func(cso->rt[0].alpha_dst_factor) << 16 | + nvgl_blend_func(cso->rt[0].rgb_dst_factor)); + if(nvfx->screen->base.device->chipset < 0x40) { + so_method(so, eng3d, NV34TCL_BLEND_EQUATION, 1); + so_data (so, nvgl_blend_eqn(cso->rt[0].rgb_func)); + } else { + so_method(so, eng3d, NV40TCL_BLEND_EQUATION, 1); + so_data (so, nvgl_blend_eqn(cso->rt[0].alpha_func) << 16 | + nvgl_blend_eqn(cso->rt[0].rgb_func)); + } + } else { + so_method(so, eng3d, NV34TCL_BLEND_FUNC_ENABLE, 1); + so_data (so, 0); + } + + so_method(so, eng3d, NV34TCL_COLOR_MASK, 1); + so_data (so, (((cso->rt[0].colormask & PIPE_MASK_A) ? (0x01 << 24) : 0) | + ((cso->rt[0].colormask & PIPE_MASK_R) ? (0x01 << 16) : 0) | + ((cso->rt[0].colormask & PIPE_MASK_G) ? (0x01 << 8) : 0) | + ((cso->rt[0].colormask & PIPE_MASK_B) ? (0x01 << 0) : 0))); + + /* TODO: add NV40 MRT color mask */ + + if (cso->logicop_enable) { + so_method(so, eng3d, NV34TCL_COLOR_LOGIC_OP_ENABLE, 2); + so_data (so, 1); + so_data (so, nvgl_logicop_func(cso->logicop_func)); + } else { + so_method(so, eng3d, NV34TCL_COLOR_LOGIC_OP_ENABLE, 1); + so_data (so, 0); + } + + so_method(so, eng3d, NV34TCL_DITHER_ENABLE, 1); + so_data (so, cso->dither ? 1 : 0); + + so_ref(so, &bso->so); + so_ref(NULL, &so); + bso->pipe = *cso; + return (void *)bso; +} + +static void +nvfx_blend_state_bind(struct pipe_context *pipe, void *hwcso) +{ + struct nvfx_context *nvfx = nvfx_context(pipe); + + nvfx->blend = hwcso; + nvfx->dirty |= NVFX_NEW_BLEND; +} + +static void +nvfx_blend_state_delete(struct pipe_context *pipe, void *hwcso) +{ + struct nvfx_blend_state *bso = hwcso; + + so_ref(NULL, &bso->so); + FREE(bso); +} + +static void +nv40_sampler_state_bind(struct pipe_context *pipe, unsigned nr, void **sampler) +{ + struct nvfx_context *nvfx = nvfx_context(pipe); + unsigned unit; + + for (unit = 0; unit < nr; unit++) { + nvfx->tex_sampler[unit] = sampler[unit]; + nvfx->dirty_samplers |= (1 << unit); + } + + for (unit = nr; unit < nvfx->nr_samplers; unit++) { + nvfx->tex_sampler[unit] = NULL; + nvfx->dirty_samplers |= (1 << unit); + } + + nvfx->nr_samplers = nr; + nvfx->dirty |= NVFX_NEW_SAMPLER; +} + +static void +nv40_sampler_state_delete(struct pipe_context *pipe, void *hwcso) +{ + FREE(hwcso); +} + +static void +nvfx_set_sampler_texture(struct pipe_context *pipe, unsigned nr, + struct pipe_texture **miptree) +{ + struct nvfx_context *nvfx = nvfx_context(pipe); + unsigned unit; + + for (unit = 0; unit < nr; unit++) { + pipe_texture_reference((struct pipe_texture **) + &nvfx->tex_miptree[unit], miptree[unit]); + nvfx->dirty_samplers |= (1 << unit); + } + + for (unit = nr; unit < nvfx->nr_textures; unit++) { + pipe_texture_reference((struct pipe_texture **) + &nvfx->tex_miptree[unit], NULL); + nvfx->dirty_samplers |= (1 << unit); + } + + nvfx->nr_textures = nr; + nvfx->dirty |= NVFX_NEW_SAMPLER; +} + +static void * +nvfx_rasterizer_state_create(struct pipe_context *pipe, + const struct pipe_rasterizer_state *cso) +{ + struct nvfx_context *nvfx = nvfx_context(pipe); + struct nvfx_rasterizer_state *rsso = CALLOC(1, sizeof(*rsso)); + struct nouveau_stateobj *so = so_new(9, 19, 0); + struct nouveau_grobj *eng3d = nvfx->screen->eng3d; + + /*XXX: ignored: + * light_twoside + * point_smooth -nohw + * multisample + */ + + so_method(so, eng3d, NV34TCL_SHADE_MODEL, 1); + so_data (so, cso->flatshade ? NV34TCL_SHADE_MODEL_FLAT : + NV34TCL_SHADE_MODEL_SMOOTH); + + so_method(so, eng3d, NV34TCL_LINE_WIDTH, 2); + so_data (so, (unsigned char)(cso->line_width * 8.0) & 0xff); + so_data (so, cso->line_smooth ? 1 : 0); + so_method(so, eng3d, NV34TCL_LINE_STIPPLE_ENABLE, 2); + so_data (so, cso->line_stipple_enable ? 1 : 0); + so_data (so, (cso->line_stipple_pattern << 16) | + cso->line_stipple_factor); + + so_method(so, eng3d, NV34TCL_POINT_SIZE, 1); + so_data (so, fui(cso->point_size)); + + so_method(so, eng3d, NV34TCL_POLYGON_MODE_FRONT, 6); + if (cso->front_winding == PIPE_WINDING_CCW) { + so_data(so, nvgl_polygon_mode(cso->fill_ccw)); + so_data(so, nvgl_polygon_mode(cso->fill_cw)); + switch (cso->cull_mode) { + case PIPE_WINDING_CCW: + so_data(so, NV34TCL_CULL_FACE_FRONT); + break; + case PIPE_WINDING_CW: + so_data(so, NV34TCL_CULL_FACE_BACK); + break; + case PIPE_WINDING_BOTH: + so_data(so, NV34TCL_CULL_FACE_FRONT_AND_BACK); + break; + default: + so_data(so, NV34TCL_CULL_FACE_BACK); + break; + } + so_data(so, NV34TCL_FRONT_FACE_CCW); + } else { + so_data(so, nvgl_polygon_mode(cso->fill_cw)); + so_data(so, nvgl_polygon_mode(cso->fill_ccw)); + switch (cso->cull_mode) { + case PIPE_WINDING_CCW: + so_data(so, NV34TCL_CULL_FACE_BACK); + break; + case PIPE_WINDING_CW: + so_data(so, NV34TCL_CULL_FACE_FRONT); + break; + case PIPE_WINDING_BOTH: + so_data(so, NV34TCL_CULL_FACE_FRONT_AND_BACK); + break; + default: + so_data(so, NV34TCL_CULL_FACE_BACK); + break; + } + so_data(so, NV34TCL_FRONT_FACE_CW); + } + so_data(so, cso->poly_smooth ? 1 : 0); + so_data(so, (cso->cull_mode != PIPE_WINDING_NONE) ? 1 : 0); + + so_method(so, eng3d, NV34TCL_POLYGON_STIPPLE_ENABLE, 1); + so_data (so, cso->poly_stipple_enable ? 1 : 0); + + so_method(so, eng3d, NV34TCL_POLYGON_OFFSET_POINT_ENABLE, 3); + if ((cso->offset_cw && cso->fill_cw == PIPE_POLYGON_MODE_POINT) || + (cso->offset_ccw && cso->fill_ccw == PIPE_POLYGON_MODE_POINT)) + so_data(so, 1); + else + so_data(so, 0); + if ((cso->offset_cw && cso->fill_cw == PIPE_POLYGON_MODE_LINE) || + (cso->offset_ccw && cso->fill_ccw == PIPE_POLYGON_MODE_LINE)) + so_data(so, 1); + else + so_data(so, 0); + if ((cso->offset_cw && cso->fill_cw == PIPE_POLYGON_MODE_FILL) || + (cso->offset_ccw && cso->fill_ccw == PIPE_POLYGON_MODE_FILL)) + so_data(so, 1); + else + so_data(so, 0); + if (cso->offset_cw || cso->offset_ccw) { + so_method(so, eng3d, NV34TCL_POLYGON_OFFSET_FACTOR, 2); + so_data (so, fui(cso->offset_scale)); + so_data (so, fui(cso->offset_units * 2)); + } + + so_method(so, eng3d, NV34TCL_POINT_SPRITE, 1); + if (cso->point_quad_rasterization) { + unsigned psctl = (1 << 0), i; + + for (i = 0; i < 8; i++) { + if ((cso->sprite_coord_enable >> i) & 1) + psctl |= (1 << (8 + i)); + } + + so_data(so, psctl); + } else { + so_data(so, 0); + } + + so_ref(so, &rsso->so); + so_ref(NULL, &so); + rsso->pipe = *cso; + return (void *)rsso; +} + +static void +nvfx_rasterizer_state_bind(struct pipe_context *pipe, void *hwcso) +{ + struct nvfx_context *nvfx = nvfx_context(pipe); + + nvfx->rasterizer = hwcso; + nvfx->dirty |= NVFX_NEW_RAST; + nvfx->draw_dirty |= NVFX_NEW_RAST; +} + +static void +nvfx_rasterizer_state_delete(struct pipe_context *pipe, void *hwcso) +{ + struct nvfx_rasterizer_state *rsso = hwcso; + + so_ref(NULL, &rsso->so); + FREE(rsso); +} + +static void * +nvfx_depth_stencil_alpha_state_create(struct pipe_context *pipe, + const struct pipe_depth_stencil_alpha_state *cso) +{ + struct nvfx_context *nvfx = nvfx_context(pipe); + struct nvfx_zsa_state *zsaso = CALLOC(1, sizeof(*zsaso)); + struct nouveau_stateobj *so = so_new(6, 20, 0); + struct nouveau_grobj *eng3d = nvfx->screen->eng3d; + + so_method(so, eng3d, NV34TCL_DEPTH_FUNC, 3); + so_data (so, nvgl_comparison_op(cso->depth.func)); + so_data (so, cso->depth.writemask ? 1 : 0); + so_data (so, cso->depth.enabled ? 1 : 0); + + so_method(so, eng3d, NV34TCL_ALPHA_FUNC_ENABLE, 3); + so_data (so, cso->alpha.enabled ? 1 : 0); + so_data (so, nvgl_comparison_op(cso->alpha.func)); + so_data (so, float_to_ubyte(cso->alpha.ref_value)); + + if (cso->stencil[0].enabled) { + so_method(so, eng3d, NV34TCL_STENCIL_FRONT_ENABLE, 3); + so_data (so, cso->stencil[0].enabled ? 1 : 0); + so_data (so, cso->stencil[0].writemask); + so_data (so, nvgl_comparison_op(cso->stencil[0].func)); + so_method(so, eng3d, NV34TCL_STENCIL_FRONT_FUNC_MASK, 4); + so_data (so, cso->stencil[0].valuemask); + so_data (so, nvgl_stencil_op(cso->stencil[0].fail_op)); + so_data (so, nvgl_stencil_op(cso->stencil[0].zfail_op)); + so_data (so, nvgl_stencil_op(cso->stencil[0].zpass_op)); + } else { + so_method(so, eng3d, NV34TCL_STENCIL_FRONT_ENABLE, 1); + so_data (so, 0); + } + + if (cso->stencil[1].enabled) { + so_method(so, eng3d, NV34TCL_STENCIL_BACK_ENABLE, 3); + so_data (so, cso->stencil[1].enabled ? 1 : 0); + so_data (so, cso->stencil[1].writemask); + so_data (so, nvgl_comparison_op(cso->stencil[1].func)); + so_method(so, eng3d, NV34TCL_STENCIL_BACK_FUNC_MASK, 4); + so_data (so, cso->stencil[1].valuemask); + so_data (so, nvgl_stencil_op(cso->stencil[1].fail_op)); + so_data (so, nvgl_stencil_op(cso->stencil[1].zfail_op)); + so_data (so, nvgl_stencil_op(cso->stencil[1].zpass_op)); + } else { + so_method(so, eng3d, NV34TCL_STENCIL_BACK_ENABLE, 1); + so_data (so, 0); + } + + so_ref(so, &zsaso->so); + so_ref(NULL, &so); + zsaso->pipe = *cso; + return (void *)zsaso; +} + +static void +nvfx_depth_stencil_alpha_state_bind(struct pipe_context *pipe, void *hwcso) +{ + struct nvfx_context *nvfx = nvfx_context(pipe); + + nvfx->zsa = hwcso; + nvfx->dirty |= NVFX_NEW_ZSA; +} + +static void +nvfx_depth_stencil_alpha_state_delete(struct pipe_context *pipe, void *hwcso) +{ + struct nvfx_zsa_state *zsaso = hwcso; + + so_ref(NULL, &zsaso->so); + FREE(zsaso); +} + +static void * +nvfx_vp_state_create(struct pipe_context *pipe, + const struct pipe_shader_state *cso) +{ + struct nvfx_context *nvfx = nvfx_context(pipe); + struct nvfx_vertex_program *vp; + + vp = CALLOC(1, sizeof(struct nvfx_vertex_program)); + vp->pipe.tokens = tgsi_dup_tokens(cso->tokens); + vp->draw = draw_create_vertex_shader(nvfx->draw, &vp->pipe); + + return (void *)vp; +} + +static void +nvfx_vp_state_bind(struct pipe_context *pipe, void *hwcso) +{ + struct nvfx_context *nvfx = nvfx_context(pipe); + + nvfx->vertprog = hwcso; + nvfx->dirty |= NVFX_NEW_VERTPROG; + nvfx->draw_dirty |= NVFX_NEW_VERTPROG; +} + +static void +nvfx_vp_state_delete(struct pipe_context *pipe, void *hwcso) +{ + struct nvfx_context *nvfx = nvfx_context(pipe); + struct nvfx_vertex_program *vp = hwcso; + + draw_delete_vertex_shader(nvfx->draw, vp->draw); + if(!nvfx->is_nv4x) + nv30_vertprog_destroy(nvfx, vp); + else + nv40_vertprog_destroy(nvfx, vp); + FREE((void*)vp->pipe.tokens); + FREE(vp); +} + +static void * +nvfx_fp_state_create(struct pipe_context *pipe, + const struct pipe_shader_state *cso) +{ + struct nvfx_fragment_program *fp; + + fp = CALLOC(1, sizeof(struct nvfx_fragment_program)); + fp->pipe.tokens = tgsi_dup_tokens(cso->tokens); + + tgsi_scan_shader(fp->pipe.tokens, &fp->info); + + return (void *)fp; +} + +static void +nvfx_fp_state_bind(struct pipe_context *pipe, void *hwcso) +{ + struct nvfx_context *nvfx = nvfx_context(pipe); + + nvfx->fragprog = hwcso; + nvfx->dirty |= NVFX_NEW_FRAGPROG; +} + +static void +nvfx_fp_state_delete(struct pipe_context *pipe, void *hwcso) +{ + struct nvfx_context *nvfx = nvfx_context(pipe); + struct nvfx_fragment_program *fp = hwcso; + + nvfx_fragprog_destroy(nvfx, fp); + FREE((void*)fp->pipe.tokens); + FREE(fp); +} + +static void +nvfx_set_blend_color(struct pipe_context *pipe, + const struct pipe_blend_color *bcol) +{ + struct nvfx_context *nvfx = nvfx_context(pipe); + + nvfx->blend_colour = *bcol; + nvfx->dirty |= NVFX_NEW_BCOL; +} + +static void +nvfx_set_stencil_ref(struct pipe_context *pipe, + const struct pipe_stencil_ref *sr) +{ + struct nvfx_context *nvfx = nvfx_context(pipe); + + nvfx->stencil_ref = *sr; + nvfx->dirty |= NVFX_NEW_SR; +} + +static void +nvfx_set_clip_state(struct pipe_context *pipe, + const struct pipe_clip_state *clip) +{ + struct nvfx_context *nvfx = nvfx_context(pipe); + + nvfx->clip = *clip; + nvfx->dirty |= NVFX_NEW_UCP; + nvfx->draw_dirty |= NVFX_NEW_UCP; +} + +static void +nvfx_set_constant_buffer(struct pipe_context *pipe, uint shader, uint index, + struct pipe_buffer *buf ) +{ + struct nvfx_context *nvfx = nvfx_context(pipe); + + nvfx->constbuf[shader] = buf; + nvfx->constbuf_nr[shader] = buf->size / (4 * sizeof(float)); + + if (shader == PIPE_SHADER_VERTEX) { + nvfx->dirty |= NVFX_NEW_VERTPROG; + } else + if (shader == PIPE_SHADER_FRAGMENT) { + nvfx->dirty |= NVFX_NEW_FRAGPROG; + } +} + +static void +nvfx_set_framebuffer_state(struct pipe_context *pipe, + const struct pipe_framebuffer_state *fb) +{ + struct nvfx_context *nvfx = nvfx_context(pipe); + + nvfx->framebuffer = *fb; + nvfx->dirty |= NVFX_NEW_FB; +} + +static void +nvfx_set_polygon_stipple(struct pipe_context *pipe, + const struct pipe_poly_stipple *stipple) +{ + struct nvfx_context *nvfx = nvfx_context(pipe); + + memcpy(nvfx->stipple, stipple->stipple, 4 * 32); + nvfx->dirty |= NVFX_NEW_STIPPLE; +} + +static void +nvfx_set_scissor_state(struct pipe_context *pipe, + const struct pipe_scissor_state *s) +{ + struct nvfx_context *nvfx = nvfx_context(pipe); + + nvfx->scissor = *s; + nvfx->dirty |= NVFX_NEW_SCISSOR; +} + +static void +nvfx_set_viewport_state(struct pipe_context *pipe, + const struct pipe_viewport_state *vpt) +{ + struct nvfx_context *nvfx = nvfx_context(pipe); + + nvfx->viewport = *vpt; + nvfx->dirty |= NVFX_NEW_VIEWPORT; + nvfx->draw_dirty |= NVFX_NEW_VIEWPORT; +} + +static void +nvfx_set_vertex_buffers(struct pipe_context *pipe, unsigned count, + const struct pipe_vertex_buffer *vb) +{ + struct nvfx_context *nvfx = nvfx_context(pipe); + + memcpy(nvfx->vtxbuf, vb, sizeof(*vb) * count); + nvfx->vtxbuf_nr = count; + + nvfx->dirty |= NVFX_NEW_ARRAYS; + nvfx->draw_dirty |= NVFX_NEW_ARRAYS; +} + +static void * +nvfx_vtxelts_state_create(struct pipe_context *pipe, + unsigned num_elements, + const struct pipe_vertex_element *elements) +{ + struct nvfx_vtxelt_state *cso = CALLOC_STRUCT(nvfx_vtxelt_state); + + assert(num_elements < 16); /* not doing fallbacks yet */ + cso->num_elements = num_elements; + memcpy(cso->pipe, elements, num_elements * sizeof(*elements)); + +/* nvfx_vtxelt_construct(cso);*/ + + return (void *)cso; +} + +static void +nvfx_vtxelts_state_delete(struct pipe_context *pipe, void *hwcso) +{ + FREE(hwcso); +} + +static void +nvfx_vtxelts_state_bind(struct pipe_context *pipe, void *hwcso) +{ + struct nvfx_context *nvfx = nvfx_context(pipe); + + nvfx->vtxelt = hwcso; + nvfx->dirty |= NVFX_NEW_ARRAYS; + /*nvfx->draw_dirty |= NVFX_NEW_ARRAYS;*/ +} + +void * +nv30_sampler_state_create(struct pipe_context *pipe, + const struct pipe_sampler_state *cso); + +void * +nv40_sampler_state_create(struct pipe_context *pipe, + const struct pipe_sampler_state *cso); + +void +nvfx_init_state_functions(struct nvfx_context *nvfx) +{ + nvfx->pipe.create_blend_state = nvfx_blend_state_create; + nvfx->pipe.bind_blend_state = nvfx_blend_state_bind; + nvfx->pipe.delete_blend_state = nvfx_blend_state_delete; + + if(nvfx->is_nv4x) + nvfx->pipe.create_sampler_state = nv40_sampler_state_create; + else + nvfx->pipe.create_sampler_state = nv30_sampler_state_create; + nvfx->pipe.bind_fragment_sampler_states = nv40_sampler_state_bind; + nvfx->pipe.delete_sampler_state = nv40_sampler_state_delete; + nvfx->pipe.set_fragment_sampler_textures = nvfx_set_sampler_texture; + + nvfx->pipe.create_rasterizer_state = nvfx_rasterizer_state_create; + nvfx->pipe.bind_rasterizer_state = nvfx_rasterizer_state_bind; + nvfx->pipe.delete_rasterizer_state = nvfx_rasterizer_state_delete; + + nvfx->pipe.create_depth_stencil_alpha_state = + nvfx_depth_stencil_alpha_state_create; + nvfx->pipe.bind_depth_stencil_alpha_state = + nvfx_depth_stencil_alpha_state_bind; + nvfx->pipe.delete_depth_stencil_alpha_state = + nvfx_depth_stencil_alpha_state_delete; + + nvfx->pipe.create_vs_state = nvfx_vp_state_create; + nvfx->pipe.bind_vs_state = nvfx_vp_state_bind; + nvfx->pipe.delete_vs_state = nvfx_vp_state_delete; + + nvfx->pipe.create_fs_state = nvfx_fp_state_create; + nvfx->pipe.bind_fs_state = nvfx_fp_state_bind; + nvfx->pipe.delete_fs_state = nvfx_fp_state_delete; + + nvfx->pipe.set_blend_color = nvfx_set_blend_color; + nvfx->pipe.set_stencil_ref = nvfx_set_stencil_ref; + nvfx->pipe.set_clip_state = nvfx_set_clip_state; + nvfx->pipe.set_constant_buffer = nvfx_set_constant_buffer; + nvfx->pipe.set_framebuffer_state = nvfx_set_framebuffer_state; + nvfx->pipe.set_polygon_stipple = nvfx_set_polygon_stipple; + nvfx->pipe.set_scissor_state = nvfx_set_scissor_state; + nvfx->pipe.set_viewport_state = nvfx_set_viewport_state; + + nvfx->pipe.create_vertex_elements_state = nvfx_vtxelts_state_create; + nvfx->pipe.delete_vertex_elements_state = nvfx_vtxelts_state_delete; + nvfx->pipe.bind_vertex_elements_state = nvfx_vtxelts_state_bind; + + nvfx->pipe.set_vertex_buffers = nvfx_set_vertex_buffers; +} -- cgit v1.2.3 From 840c36f5e6d940343a3154af7e76fec341ca46e6 Mon Sep 17 00:00:00 2001 From: Luca Barbieri Date: Sun, 21 Feb 2010 13:33:48 +0100 Subject: nv30, nv40: non-trivially unify nv[34]0_vertprog.c vertprog.c is similar but has substantial differences: 1. nv40 supports clip planes 2. nv40 uses a more advanced register allocator 3. Some register setup is different 4. Constants with the same name have different values This patch unifies the two files. nv30 gains clip plane support and the nv40 register allocator. A new NVFX_VP(x) macro is introduced that at runtime resolved to either the nv30 or the nv40 constant value. nv30 clip planes are not tested and might not work --- src/gallium/drivers/nv30/Makefile | 3 +- src/gallium/drivers/nv30/nv30_context.h | 3 - src/gallium/drivers/nv30/nv30_vertprog.c | 842 --------------------- src/gallium/drivers/nv40/Makefile | 3 +- src/gallium/drivers/nv40/nv40_context.h | 3 - src/gallium/drivers/nv40/nv40_vertprog.c | 1048 -------------------------- src/gallium/drivers/nvfx/Makefile | 3 +- src/gallium/drivers/nvfx/nvfx_context.h | 6 +- src/gallium/drivers/nvfx/nvfx_state.c | 5 +- src/gallium/drivers/nvfx/nvfx_state_emit.c | 2 +- src/gallium/drivers/nvfx/nvfx_vertprog.c | 1108 ++++++++++++++++++++++++++++ 11 files changed, 1117 insertions(+), 1909 deletions(-) delete mode 100644 src/gallium/drivers/nv30/nv30_vertprog.c delete mode 100644 src/gallium/drivers/nv40/nv40_vertprog.c create mode 100644 src/gallium/drivers/nvfx/nvfx_vertprog.c (limited to 'src') diff --git a/src/gallium/drivers/nv30/Makefile b/src/gallium/drivers/nv30/Makefile index 6ec93ee346..b71afbbb9a 100644 --- a/src/gallium/drivers/nv30/Makefile +++ b/src/gallium/drivers/nv30/Makefile @@ -7,8 +7,7 @@ C_SOURCES = \ nv30_context.c \ nv30_fragtex.c \ nv30_screen.c \ - nv30_state.c \ - nv30_vertprog.c + nv30_state.c LIBRARY_INCLUDES = -I$(TOP)/src/gallium/drivers/nvfx diff --git a/src/gallium/drivers/nv30/nv30_context.h b/src/gallium/drivers/nv30/nv30_context.h index 16cf3cbaa4..eacbb1753d 100644 --- a/src/gallium/drivers/nv30/nv30_context.h +++ b/src/gallium/drivers/nv30/nv30_context.h @@ -5,9 +5,6 @@ /* nv30_fragtex.c */ extern void nv30_fragtex_bind(struct nvfx_context *); - -/* nv30_state.c and friends */ -extern struct nvfx_state_entry nv30_state_vertprog; extern struct nvfx_state_entry nv30_state_fragtex; /* nvfx_context.c */ diff --git a/src/gallium/drivers/nv30/nv30_vertprog.c b/src/gallium/drivers/nv30/nv30_vertprog.c deleted file mode 100644 index ec6d63889b..0000000000 --- a/src/gallium/drivers/nv30/nv30_vertprog.c +++ /dev/null @@ -1,842 +0,0 @@ -#include "pipe/p_context.h" -#include "pipe/p_defines.h" -#include "pipe/p_state.h" -#include "util/u_inlines.h" - -#include "pipe/p_shader_tokens.h" -#include "tgsi/tgsi_parse.h" -#include "tgsi/tgsi_dump.h" - -#include "nv30_context.h" -#include "nvfx_state.h" - -/* TODO (at least...): - * 1. Indexed consts + ARL - * 2. Arb. swz/negation - * 3. NV_vp11, NV_vp2, NV_vp3 features - * - extra arith opcodes - * - branching - * - texture sampling - * - indexed attribs - * - indexed results - * 4. bugs - */ - -#define SWZ_X 0 -#define SWZ_Y 1 -#define SWZ_Z 2 -#define SWZ_W 3 -#define MASK_X 8 -#define MASK_Y 4 -#define MASK_Z 2 -#define MASK_W 1 -#define MASK_ALL (MASK_X|MASK_Y|MASK_Z|MASK_W) -#define DEF_SCALE 0 -#define DEF_CTEST 0 -#include "nv30_shader.h" - -#define swz(s,x,y,z,w) nvfx_sr_swz((s), SWZ_##x, SWZ_##y, SWZ_##z, SWZ_##w) -#define neg(s) nvfx_sr_neg((s)) -#define abs(s) nvfx_sr_abs((s)) - -struct nv30_vpc { - struct nvfx_vertex_program *vp; - - struct nvfx_vertex_program_exec *vpi; - - unsigned output_map[PIPE_MAX_SHADER_OUTPUTS]; - - int high_temp; - int temp_temp_count; - - struct nvfx_sreg *imm; - unsigned nr_imm; -}; - -static struct nvfx_sreg -temp(struct nv30_vpc *vpc) -{ - int idx; - - idx = vpc->temp_temp_count++; - idx += vpc->high_temp + 1; - return nvfx_sr(NVFXSR_TEMP, idx); -} - -static struct nvfx_sreg -constant(struct nv30_vpc *vpc, int pipe, float x, float y, float z, float w) -{ - struct nvfx_vertex_program *vp = vpc->vp; - struct nvfx_vertex_program_data *vpd; - int idx; - - if (pipe >= 0) { - for (idx = 0; idx < vp->nr_consts; idx++) { - if (vp->consts[idx].index == pipe) - return nvfx_sr(NVFXSR_CONST, idx); - } - } - - idx = vp->nr_consts++; - vp->consts = realloc(vp->consts, sizeof(*vpd) * vp->nr_consts); - vpd = &vp->consts[idx]; - - vpd->index = pipe; - vpd->value[0] = x; - vpd->value[1] = y; - vpd->value[2] = z; - vpd->value[3] = w; - return nvfx_sr(NVFXSR_CONST, idx); -} - -#define arith(cc,s,o,d,m,s0,s1,s2) \ - nv30_vp_arith((cc), NVFX_VP_INST_SLOT_##s, NVFX_VP_INST_##s##_OP_##o, (d), (m), (s0), (s1), (s2)) - -static void -emit_src(struct nv30_vpc *vpc, uint32_t *hw, int pos, struct nvfx_sreg src) -{ - struct nvfx_vertex_program *vp = vpc->vp; - uint32_t sr = 0; - - switch (src.type) { - case NVFXSR_TEMP: - sr |= (NV30_VP_SRC_REG_TYPE_TEMP << NV30_VP_SRC_REG_TYPE_SHIFT); - sr |= (src.index << NV30_VP_SRC_TEMP_SRC_SHIFT); - break; - case NVFXSR_INPUT: - sr |= (NV30_VP_SRC_REG_TYPE_INPUT << - NV30_VP_SRC_REG_TYPE_SHIFT); - vp->ir |= (1 << src.index); - hw[1] |= (src.index << NV30_VP_INST_INPUT_SRC_SHIFT); - break; - case NVFXSR_CONST: - sr |= (NV30_VP_SRC_REG_TYPE_CONST << - NV30_VP_SRC_REG_TYPE_SHIFT); - assert(vpc->vpi->const_index == -1 || - vpc->vpi->const_index == src.index); - vpc->vpi->const_index = src.index; - break; - case NVFXSR_NONE: - sr |= (NV30_VP_SRC_REG_TYPE_INPUT << - NV30_VP_SRC_REG_TYPE_SHIFT); - break; - default: - assert(0); - } - - if (src.negate) - sr |= NV30_VP_SRC_NEGATE; - - if (src.abs) - hw[0] |= (1 << (21 + pos)); - - sr |= ((src.swz[0] << NV30_VP_SRC_SWZ_X_SHIFT) | - (src.swz[1] << NV30_VP_SRC_SWZ_Y_SHIFT) | - (src.swz[2] << NV30_VP_SRC_SWZ_Z_SHIFT) | - (src.swz[3] << NV30_VP_SRC_SWZ_W_SHIFT)); - -/* - * |VVV| - * d�.�b - * \u/ - * - */ - - switch (pos) { - case 0: - hw[1] |= ((sr & NV30_VP_SRC0_HIGH_MASK) >> - NV30_VP_SRC0_HIGH_SHIFT) << NV30_VP_INST_SRC0H_SHIFT; - hw[2] |= (sr & NV30_VP_SRC0_LOW_MASK) << - NV30_VP_INST_SRC0L_SHIFT; - break; - case 1: - hw[2] |= sr << NV30_VP_INST_SRC1_SHIFT; - break; - case 2: - hw[2] |= ((sr & NV30_VP_SRC2_HIGH_MASK) >> - NV30_VP_SRC2_HIGH_SHIFT) << NV30_VP_INST_SRC2H_SHIFT; - hw[3] |= (sr & NV30_VP_SRC2_LOW_MASK) << - NV30_VP_INST_SRC2L_SHIFT; - break; - default: - assert(0); - } -} - -static void -emit_dst(struct nv30_vpc *vpc, uint32_t *hw, int slot, struct nvfx_sreg dst) -{ - struct nvfx_vertex_program *vp = vpc->vp; - - switch (dst.type) { - case NVFXSR_TEMP: - hw[0] |= (dst.index << NV30_VP_INST_DEST_TEMP_ID_SHIFT); - break; - case NVFXSR_OUTPUT: - switch (dst.index) { - case NV30_VP_INST_DEST_COL0 : vp->or |= (1 << 0); break; - case NV30_VP_INST_DEST_COL1 : vp->or |= (1 << 1); break; - case NV30_VP_INST_DEST_BFC0 : vp->or |= (1 << 2); break; - case NV30_VP_INST_DEST_BFC1 : vp->or |= (1 << 3); break; - case NV30_VP_INST_DEST_FOGC : vp->or |= (1 << 4); break; - case NV30_VP_INST_DEST_PSZ : vp->or |= (1 << 5); break; - case NV30_VP_INST_DEST_TC(0): vp->or |= (1 << 14); break; - case NV30_VP_INST_DEST_TC(1): vp->or |= (1 << 15); break; - case NV30_VP_INST_DEST_TC(2): vp->or |= (1 << 16); break; - case NV30_VP_INST_DEST_TC(3): vp->or |= (1 << 17); break; - case NV30_VP_INST_DEST_TC(4): vp->or |= (1 << 18); break; - case NV30_VP_INST_DEST_TC(5): vp->or |= (1 << 19); break; - case NV30_VP_INST_DEST_TC(6): vp->or |= (1 << 20); break; - case NV30_VP_INST_DEST_TC(7): vp->or |= (1 << 21); break; - default: - break; - } - - hw[3] |= (dst.index << NV30_VP_INST_DEST_SHIFT); - hw[0] |= NV30_VP_INST_VEC_DEST_TEMP_MASK | (1<<20); - - /*XXX: no way this is entirely correct, someone needs to - * figure out what exactly it is. - */ - hw[3] |= 0x800; - break; - default: - assert(0); - } -} - -static void -nv30_vp_arith(struct nv30_vpc *vpc, int slot, int op, - struct nvfx_sreg dst, int mask, - struct nvfx_sreg s0, struct nvfx_sreg s1, - struct nvfx_sreg s2) -{ - struct nvfx_vertex_program *vp = vpc->vp; - uint32_t *hw; - - vp->insns = realloc(vp->insns, ++vp->nr_insns * sizeof(*vpc->vpi)); - vpc->vpi = &vp->insns[vp->nr_insns - 1]; - memset(vpc->vpi, 0, sizeof(*vpc->vpi)); - vpc->vpi->const_index = -1; - - hw = vpc->vpi->data; - - hw[0] |= (NVFX_VP_INST_COND_TR << NV30_VP_INST_COND_SHIFT); - hw[0] |= ((0 << NV30_VP_INST_COND_SWZ_X_SHIFT) | - (1 << NV30_VP_INST_COND_SWZ_Y_SHIFT) | - (2 << NV30_VP_INST_COND_SWZ_Z_SHIFT) | - (3 << NV30_VP_INST_COND_SWZ_W_SHIFT)); - - hw[1] |= (op << NV30_VP_INST_VEC_OPCODE_SHIFT); -// hw[3] |= NV30_VP_INST_SCA_DEST_TEMP_MASK; -// hw[3] |= (mask << NV30_VP_INST_VEC_WRITEMASK_SHIFT); - - if (dst.type == NVFXSR_OUTPUT) { - if (slot) - hw[3] |= (mask << NV30_VP_INST_SDEST_WRITEMASK_SHIFT); - else - hw[3] |= (mask << NV30_VP_INST_VDEST_WRITEMASK_SHIFT); - } else { - if (slot) - hw[3] |= (mask << NV30_VP_INST_STEMP_WRITEMASK_SHIFT); - else - hw[3] |= (mask << NV30_VP_INST_VTEMP_WRITEMASK_SHIFT); - } - - emit_dst(vpc, hw, slot, dst); - emit_src(vpc, hw, 0, s0); - emit_src(vpc, hw, 1, s1); - emit_src(vpc, hw, 2, s2); -} - -static INLINE struct nvfx_sreg -tgsi_src(struct nv30_vpc *vpc, const struct tgsi_full_src_register *fsrc) { - struct nvfx_sreg src; - - switch (fsrc->Register.File) { - case TGSI_FILE_INPUT: - src = nvfx_sr(NVFXSR_INPUT, fsrc->Register.Index); - break; - case TGSI_FILE_CONSTANT: - src = constant(vpc, fsrc->Register.Index, 0, 0, 0, 0); - break; - case TGSI_FILE_IMMEDIATE: - src = vpc->imm[fsrc->Register.Index]; - break; - case TGSI_FILE_TEMPORARY: - if (vpc->high_temp < fsrc->Register.Index) - vpc->high_temp = fsrc->Register.Index; - src = nvfx_sr(NVFXSR_TEMP, fsrc->Register.Index); - break; - default: - NOUVEAU_ERR("bad src file\n"); - break; - } - - src.abs = fsrc->Register.Absolute; - src.negate = fsrc->Register.Negate; - src.swz[0] = fsrc->Register.SwizzleX; - src.swz[1] = fsrc->Register.SwizzleY; - src.swz[2] = fsrc->Register.SwizzleZ; - src.swz[3] = fsrc->Register.SwizzleW; - return src; -} - -static INLINE struct nvfx_sreg -tgsi_dst(struct nv30_vpc *vpc, const struct tgsi_full_dst_register *fdst) { - struct nvfx_sreg dst; - - switch (fdst->Register.File) { - case TGSI_FILE_OUTPUT: - dst = nvfx_sr(NVFXSR_OUTPUT, - vpc->output_map[fdst->Register.Index]); - - break; - case TGSI_FILE_TEMPORARY: - dst = nvfx_sr(NVFXSR_TEMP, fdst->Register.Index); - if (vpc->high_temp < dst.index) - vpc->high_temp = dst.index; - break; - default: - NOUVEAU_ERR("bad dst file\n"); - break; - } - - return dst; -} - -static INLINE int -tgsi_mask(uint tgsi) -{ - int mask = 0; - - if (tgsi & TGSI_WRITEMASK_X) mask |= MASK_X; - if (tgsi & TGSI_WRITEMASK_Y) mask |= MASK_Y; - if (tgsi & TGSI_WRITEMASK_Z) mask |= MASK_Z; - if (tgsi & TGSI_WRITEMASK_W) mask |= MASK_W; - return mask; -} - -static boolean -nv30_vertprog_parse_instruction(struct nv30_vpc *vpc, - const struct tgsi_full_instruction *finst) -{ - struct nvfx_sreg src[3], dst, tmp; - struct nvfx_sreg none = nvfx_sr(NVFXSR_NONE, 0); - int mask; - int ai = -1, ci = -1; - int i; - - if (finst->Instruction.Opcode == TGSI_OPCODE_END) - return TRUE; - - vpc->temp_temp_count = 0; - for (i = 0; i < finst->Instruction.NumSrcRegs; i++) { - const struct tgsi_full_src_register *fsrc; - - fsrc = &finst->Src[i]; - if (fsrc->Register.File == TGSI_FILE_TEMPORARY) { - src[i] = tgsi_src(vpc, fsrc); - } - } - - for (i = 0; i < finst->Instruction.NumSrcRegs; i++) { - const struct tgsi_full_src_register *fsrc; - - fsrc = &finst->Src[i]; - switch (fsrc->Register.File) { - case TGSI_FILE_INPUT: - if (ai == -1 || ai == fsrc->Register.Index) { - ai = fsrc->Register.Index; - src[i] = tgsi_src(vpc, fsrc); - } else { - src[i] = temp(vpc); - arith(vpc, VEC, MOV, src[i], MASK_ALL, - tgsi_src(vpc, fsrc), none, none); - } - break; - /*XXX: index comparison is broken now that consts come from - * two different register files. - */ - case TGSI_FILE_CONSTANT: - case TGSI_FILE_IMMEDIATE: - if (ci == -1 || ci == fsrc->Register.Index) { - ci = fsrc->Register.Index; - src[i] = tgsi_src(vpc, fsrc); - } else { - src[i] = temp(vpc); - arith(vpc, VEC, MOV, src[i], MASK_ALL, - tgsi_src(vpc, fsrc), none, none); - } - break; - case TGSI_FILE_TEMPORARY: - /* handled above */ - break; - default: - NOUVEAU_ERR("bad src file\n"); - return FALSE; - } - } - - dst = tgsi_dst(vpc, &finst->Dst[0]); - mask = tgsi_mask(finst->Dst[0].Register.WriteMask); - - switch (finst->Instruction.Opcode) { - case TGSI_OPCODE_ABS: - arith(vpc, VEC, MOV, dst, mask, abs(src[0]), none, none); - break; - case TGSI_OPCODE_ADD: - arith(vpc, VEC, ADD, dst, mask, src[0], none, src[1]); - break; - case TGSI_OPCODE_ARL: - arith(vpc, VEC, ARL, dst, mask, src[0], none, none); - break; - case TGSI_OPCODE_DP3: - arith(vpc, VEC, DP3, dst, mask, src[0], src[1], none); - break; - case TGSI_OPCODE_DP4: - arith(vpc, VEC, DP4, dst, mask, src[0], src[1], none); - break; - case TGSI_OPCODE_DPH: - arith(vpc, VEC, DPH, dst, mask, src[0], src[1], none); - break; - case TGSI_OPCODE_DST: - arith(vpc, VEC, DST, dst, mask, src[0], src[1], none); - break; - case TGSI_OPCODE_EX2: - arith(vpc, SCA, EX2, dst, mask, none, none, src[0]); - break; - case TGSI_OPCODE_EXP: - arith(vpc, SCA, EXP, dst, mask, none, none, src[0]); - break; - case TGSI_OPCODE_FLR: - arith(vpc, VEC, FLR, dst, mask, src[0], none, none); - break; - case TGSI_OPCODE_FRC: - arith(vpc, VEC, FRC, dst, mask, src[0], none, none); - break; - case TGSI_OPCODE_LG2: - arith(vpc, SCA, LG2, dst, mask, none, none, src[0]); - break; - case TGSI_OPCODE_LIT: - arith(vpc, SCA, LIT, dst, mask, none, none, src[0]); - break; - case TGSI_OPCODE_LOG: - arith(vpc, SCA, LOG, dst, mask, none, none, src[0]); - break; - case TGSI_OPCODE_MAD: - arith(vpc, VEC, MAD, dst, mask, src[0], src[1], src[2]); - break; - case TGSI_OPCODE_MAX: - arith(vpc, VEC, MAX, dst, mask, src[0], src[1], none); - break; - case TGSI_OPCODE_MIN: - arith(vpc, VEC, MIN, dst, mask, src[0], src[1], none); - break; - case TGSI_OPCODE_MOV: - arith(vpc, VEC, MOV, dst, mask, src[0], none, none); - break; - case TGSI_OPCODE_MUL: - arith(vpc, VEC, MUL, dst, mask, src[0], src[1], none); - break; - case TGSI_OPCODE_POW: - tmp = temp(vpc); - arith(vpc, SCA, LG2, tmp, MASK_X, none, none, - swz(src[0], X, X, X, X)); - arith(vpc, VEC, MUL, tmp, MASK_X, swz(tmp, X, X, X, X), - swz(src[1], X, X, X, X), none); - arith(vpc, SCA, EX2, dst, mask, none, none, - swz(tmp, X, X, X, X)); - break; - case TGSI_OPCODE_RCP: - arith(vpc, SCA, RCP, dst, mask, none, none, src[0]); - break; - case TGSI_OPCODE_RET: - break; - case TGSI_OPCODE_RSQ: - arith(vpc, SCA, RSQ, dst, mask, none, none, src[0]); - break; - case TGSI_OPCODE_SGE: - arith(vpc, VEC, SGE, dst, mask, src[0], src[1], none); - break; - case TGSI_OPCODE_SGT: - arith(vpc, VEC, SGT, dst, mask, src[0], src[1], none); - break; - case TGSI_OPCODE_SLT: - arith(vpc, VEC, SLT, dst, mask, src[0], src[1], none); - break; - case TGSI_OPCODE_SUB: - arith(vpc, VEC, ADD, dst, mask, src[0], none, neg(src[1])); - break; - case TGSI_OPCODE_XPD: - tmp = temp(vpc); - arith(vpc, VEC, MUL, tmp, mask, - swz(src[0], Z, X, Y, Y), swz(src[1], Y, Z, X, X), none); - arith(vpc, VEC, MAD, dst, (mask & ~MASK_W), - swz(src[0], Y, Z, X, X), swz(src[1], Z, X, Y, Y), - neg(tmp)); - break; - default: - NOUVEAU_ERR("invalid opcode %d\n", finst->Instruction.Opcode); - return FALSE; - } - - return TRUE; -} - -static boolean -nv30_vertprog_parse_decl_output(struct nv30_vpc *vpc, - const struct tgsi_full_declaration *fdec) -{ - int hw; - - switch (fdec->Semantic.Name) { - case TGSI_SEMANTIC_POSITION: - hw = NV30_VP_INST_DEST_POS; - break; - case TGSI_SEMANTIC_COLOR: - if (fdec->Semantic.Index == 0) { - hw = NV30_VP_INST_DEST_COL0; - } else - if (fdec->Semantic.Index == 1) { - hw = NV30_VP_INST_DEST_COL1; - } else { - NOUVEAU_ERR("bad colour semantic index\n"); - return FALSE; - } - break; - case TGSI_SEMANTIC_BCOLOR: - if (fdec->Semantic.Index == 0) { - hw = NV30_VP_INST_DEST_BFC0; - } else - if (fdec->Semantic.Index == 1) { - hw = NV30_VP_INST_DEST_BFC1; - } else { - NOUVEAU_ERR("bad bcolour semantic index\n"); - return FALSE; - } - break; - case TGSI_SEMANTIC_FOG: - hw = NV30_VP_INST_DEST_FOGC; - break; - case TGSI_SEMANTIC_PSIZE: - hw = NV30_VP_INST_DEST_PSZ; - break; - case TGSI_SEMANTIC_GENERIC: - if (fdec->Semantic.Index <= 7) { - hw = NV30_VP_INST_DEST_TC(fdec->Semantic.Index); - } else { - NOUVEAU_ERR("bad generic semantic index\n"); - return FALSE; - } - break; - case TGSI_SEMANTIC_EDGEFLAG: - NOUVEAU_ERR("cannot handle edgeflag output\n"); - return FALSE; - default: - NOUVEAU_ERR("bad output semantic\n"); - return FALSE; - } - - vpc->output_map[fdec->Range.First] = hw; - return TRUE; -} - -static boolean -nv30_vertprog_prepare(struct nv30_vpc *vpc) -{ - struct tgsi_parse_context p; - int nr_imm = 0; - - tgsi_parse_init(&p, vpc->vp->pipe.tokens); - while (!tgsi_parse_end_of_tokens(&p)) { - const union tgsi_full_token *tok = &p.FullToken; - - tgsi_parse_token(&p); - switch(tok->Token.Type) { - case TGSI_TOKEN_TYPE_IMMEDIATE: - nr_imm++; - break; - default: - break; - } - } - tgsi_parse_free(&p); - - if (nr_imm) { - vpc->imm = CALLOC(nr_imm, sizeof(struct nvfx_sreg)); - assert(vpc->imm); - } - - return TRUE; -} - -static void -nv30_vertprog_translate(struct nvfx_context *nvfx, - struct nvfx_vertex_program *vp) -{ - struct tgsi_parse_context parse; - struct nv30_vpc *vpc = NULL; - - tgsi_dump(vp->pipe.tokens,0); - - vpc = CALLOC(1, sizeof(struct nv30_vpc)); - if (!vpc) - return; - vpc->vp = vp; - vpc->high_temp = -1; - - if (!nv30_vertprog_prepare(vpc)) { - FREE(vpc); - return; - } - - tgsi_parse_init(&parse, vp->pipe.tokens); - - while (!tgsi_parse_end_of_tokens(&parse)) { - tgsi_parse_token(&parse); - - switch (parse.FullToken.Token.Type) { - case TGSI_TOKEN_TYPE_DECLARATION: - { - const struct tgsi_full_declaration *fdec; - fdec = &parse.FullToken.FullDeclaration; - switch (fdec->Declaration.File) { - case TGSI_FILE_OUTPUT: - if (!nv30_vertprog_parse_decl_output(vpc, fdec)) - goto out_err; - break; - default: - break; - } - } - break; - case TGSI_TOKEN_TYPE_IMMEDIATE: - { - const struct tgsi_full_immediate *imm; - - imm = &parse.FullToken.FullImmediate; - assert(imm->Immediate.DataType == TGSI_IMM_FLOAT32); - assert(imm->Immediate.NrTokens == 4 + 1); - vpc->imm[vpc->nr_imm++] = - constant(vpc, -1, - imm->u[0].Float, - imm->u[1].Float, - imm->u[2].Float, - imm->u[3].Float); - } - break; - case TGSI_TOKEN_TYPE_INSTRUCTION: - { - const struct tgsi_full_instruction *finst; - finst = &parse.FullToken.FullInstruction; - if (!nv30_vertprog_parse_instruction(vpc, finst)) - goto out_err; - } - break; - default: - break; - } - } - - vp->insns[vp->nr_insns - 1].data[3] |= NVFX_VP_INST_LAST; - vp->translated = TRUE; -out_err: - tgsi_parse_free(&parse); - FREE(vpc); -} - -static boolean -nv30_vertprog_validate(struct nvfx_context *nvfx) -{ - struct pipe_screen *pscreen = nvfx->pipe.screen; - struct nvfx_screen *screen = nvfx->screen; - struct nouveau_channel *chan = screen->base.channel; - struct nouveau_grobj *eng3d = screen->eng3d; - struct nvfx_vertex_program *vp; - struct pipe_buffer *constbuf; - boolean upload_code = FALSE, upload_data = FALSE; - int i; - - vp = nvfx->vertprog; - constbuf = nvfx->constbuf[PIPE_SHADER_VERTEX]; - - /* Translate TGSI shader into hw bytecode */ - if (!vp->translated) { - nv30_vertprog_translate(nvfx, vp); - if (!vp->translated) - return FALSE; - } - - /* Allocate hw vtxprog exec slots */ - if (!vp->exec) { - struct nouveau_resource *heap = nvfx->screen->vp_exec_heap; - struct nouveau_stateobj *so; - uint vplen = vp->nr_insns; - - if (nouveau_resource_alloc(heap, vplen, vp, &vp->exec)) { - while (heap->next && heap->size < vplen) { - struct nvfx_vertex_program *evict; - - evict = heap->next->priv; - nouveau_resource_free(&evict->exec); - } - - if (nouveau_resource_alloc(heap, vplen, vp, &vp->exec)) - assert(0); - } - - so = so_new(1, 1, 0); - so_method(so, eng3d, NV34TCL_VP_START_FROM_ID, 1); - so_data (so, vp->exec->start); - so_ref(so, &vp->so); - so_ref(NULL, &so); - - upload_code = TRUE; - } - - /* Allocate hw vtxprog const slots */ - if (vp->nr_consts && !vp->data) { - struct nouveau_resource *heap = nvfx->screen->vp_data_heap; - - if (nouveau_resource_alloc(heap, vp->nr_consts, vp, &vp->data)) { - while (heap->next && heap->size < vp->nr_consts) { - struct nvfx_vertex_program *evict; - - evict = heap->next->priv; - nouveau_resource_free(&evict->data); - } - - if (nouveau_resource_alloc(heap, vp->nr_consts, vp, - &vp->data)) - assert(0); - } - - /*XXX: handle this some day */ - assert(vp->data->start >= vp->data_start_min); - - upload_data = TRUE; - if (vp->data_start != vp->data->start) - upload_code = TRUE; - } - - /* If exec or data segments moved we need to patch the program to - * fixup offsets and register IDs. - */ - if (vp->exec_start != vp->exec->start) { - for (i = 0; i < vp->nr_insns; i++) { - struct nvfx_vertex_program_exec *vpi = &vp->insns[i]; - - if (vpi->has_branch_offset) { - assert(0); - } - } - - vp->exec_start = vp->exec->start; - } - - if (vp->nr_consts && vp->data_start != vp->data->start) { - for (i = 0; i < vp->nr_insns; i++) { - struct nvfx_vertex_program_exec *vpi = &vp->insns[i]; - - if (vpi->const_index >= 0) { - vpi->data[1] &= ~NV30_VP_INST_CONST_SRC_MASK; - vpi->data[1] |= - (vpi->const_index + vp->data->start) << - NV30_VP_INST_CONST_SRC_SHIFT; - - } - } - - vp->data_start = vp->data->start; - } - - /* Update + Upload constant values */ - if (vp->nr_consts) { - float *map = NULL; - - if (constbuf) { - map = pipe_buffer_map(pscreen, constbuf, - PIPE_BUFFER_USAGE_CPU_READ); - } - - for (i = 0; i < vp->nr_consts; i++) { - struct nvfx_vertex_program_data *vpd = &vp->consts[i]; - - if (vpd->index >= 0) { - if (!upload_data && - !memcmp(vpd->value, &map[vpd->index * 4], - 4 * sizeof(float))) - continue; - memcpy(vpd->value, &map[vpd->index * 4], - 4 * sizeof(float)); - } - - BEGIN_RING(chan, eng3d, NV34TCL_VP_UPLOAD_CONST_ID, 5); - OUT_RING (chan, i + vp->data->start); - OUT_RINGp (chan, (uint32_t *)vpd->value, 4); - } - - if (constbuf) - pipe_buffer_unmap(pscreen, constbuf); - } - - /* Upload vtxprog */ - if (upload_code) { -#if 0 - for (i = 0; i < vp->nr_insns; i++) { - NOUVEAU_MSG("VP inst %d: 0x%08x 0x%08x 0x%08x 0x%08x\n", - i, vp->insns[i].data[0], vp->insns[i].data[1], - vp->insns[i].data[2], vp->insns[i].data[3]); - } -#endif - BEGIN_RING(chan, eng3d, NV34TCL_VP_UPLOAD_FROM_ID, 1); - OUT_RING (chan, vp->exec->start); - for (i = 0; i < vp->nr_insns; i++) { - BEGIN_RING(chan, eng3d, NV34TCL_VP_UPLOAD_INST(0), 4); - OUT_RINGp (chan, vp->insns[i].data, 4); - } - } - - if (vp->so != nvfx->state.hw[NVFX_STATE_VERTPROG]) { - so_ref(vp->so, &nvfx->state.hw[NVFX_STATE_VERTPROG]); - return TRUE; - } - - return FALSE; -} - -void -nv30_vertprog_destroy(struct nvfx_context *nvfx, struct nvfx_vertex_program *vp) -{ - vp->translated = FALSE; - - if (vp->nr_insns) { - FREE(vp->insns); - vp->insns = NULL; - vp->nr_insns = 0; - } - - if (vp->nr_consts) { - FREE(vp->consts); - vp->consts = NULL; - vp->nr_consts = 0; - } - - nouveau_resource_free(&vp->exec); - vp->exec_start = 0; - nouveau_resource_free(&vp->data); - vp->data_start = 0; - vp->data_start_min = 0; - - vp->ir = vp->or = 0; - so_ref(NULL, &vp->so); -} - -struct nvfx_state_entry nv30_state_vertprog = { - .validate = nv30_vertprog_validate, - .dirty = { - .pipe = NVFX_NEW_VERTPROG /*| NVFX_NEW_UCP*/, - .hw = NVFX_STATE_VERTPROG, - } -}; diff --git a/src/gallium/drivers/nv40/Makefile b/src/gallium/drivers/nv40/Makefile index 6908506906..c8f3858c36 100644 --- a/src/gallium/drivers/nv40/Makefile +++ b/src/gallium/drivers/nv40/Makefile @@ -7,8 +7,7 @@ C_SOURCES = \ nv40_context.c \ nv40_fragtex.c \ nv40_screen.c \ - nv40_state.c \ - nv40_vertprog.c + nv40_state.c LIBRARY_INCLUDES = -I$(TOP)/src/gallium/drivers/nvfx diff --git a/src/gallium/drivers/nv40/nv40_context.h b/src/gallium/drivers/nv40/nv40_context.h index 5ea2229fac..8dc87e426f 100644 --- a/src/gallium/drivers/nv40/nv40_context.h +++ b/src/gallium/drivers/nv40/nv40_context.h @@ -5,9 +5,6 @@ /* nv40_fragtex.c */ extern void nv40_fragtex_bind(struct nvfx_context *); - -/* nv40_state.c and friends */ -extern struct nvfx_state_entry nv40_state_vertprog; extern struct nvfx_state_entry nv40_state_fragtex; /* nvfx_context.c */ diff --git a/src/gallium/drivers/nv40/nv40_vertprog.c b/src/gallium/drivers/nv40/nv40_vertprog.c deleted file mode 100644 index 752cd0d1b3..0000000000 --- a/src/gallium/drivers/nv40/nv40_vertprog.c +++ /dev/null @@ -1,1048 +0,0 @@ -#include "pipe/p_context.h" -#include "pipe/p_defines.h" -#include "pipe/p_state.h" -#include "util/u_inlines.h" - -#include "pipe/p_shader_tokens.h" -#include "tgsi/tgsi_parse.h" -#include "tgsi/tgsi_util.h" - -#include "nv40_context.h" -#include "nvfx_state.h" - -/* TODO (at least...): - * 1. Indexed consts + ARL - * 3. NV_vp11, NV_vp2, NV_vp3 features - * - extra arith opcodes - * - branching - * - texture sampling - * - indexed attribs - * - indexed results - * 4. bugs - */ - -#define SWZ_X 0 -#define SWZ_Y 1 -#define SWZ_Z 2 -#define SWZ_W 3 -#define MASK_X 8 -#define MASK_Y 4 -#define MASK_Z 2 -#define MASK_W 1 -#define MASK_ALL (MASK_X|MASK_Y|MASK_Z|MASK_W) -#define DEF_SCALE 0 -#define DEF_CTEST 0 -#include "nv40_shader.h" - -#define swz(s,x,y,z,w) nvfx_sr_swz((s), SWZ_##x, SWZ_##y, SWZ_##z, SWZ_##w) -#define neg(s) nvfx_sr_neg((s)) -#define abs(s) nvfx_sr_abs((s)) - -#define NV40_VP_INST_DEST_CLIP(n) ((~0 - 6) + (n)) - -struct nv40_vpc { - struct nvfx_vertex_program *vp; - - struct nvfx_vertex_program_exec *vpi; - - unsigned r_temps; - unsigned r_temps_discard; - struct nvfx_sreg r_result[PIPE_MAX_SHADER_OUTPUTS]; - struct nvfx_sreg *r_address; - struct nvfx_sreg *r_temp; - - struct nvfx_sreg *imm; - unsigned nr_imm; - - unsigned hpos_idx; -}; - -static struct nvfx_sreg -temp(struct nv40_vpc *vpc) -{ - int idx = ffs(~vpc->r_temps) - 1; - - if (idx < 0) { - NOUVEAU_ERR("out of temps!!\n"); - assert(0); - return nvfx_sr(NVFXSR_TEMP, 0); - } - - vpc->r_temps |= (1 << idx); - vpc->r_temps_discard |= (1 << idx); - return nvfx_sr(NVFXSR_TEMP, idx); -} - -static INLINE void -release_temps(struct nv40_vpc *vpc) -{ - vpc->r_temps &= ~vpc->r_temps_discard; - vpc->r_temps_discard = 0; -} - -static struct nvfx_sreg -constant(struct nv40_vpc *vpc, int pipe, float x, float y, float z, float w) -{ - struct nvfx_vertex_program *vp = vpc->vp; - struct nvfx_vertex_program_data *vpd; - int idx; - - if (pipe >= 0) { - for (idx = 0; idx < vp->nr_consts; idx++) { - if (vp->consts[idx].index == pipe) - return nvfx_sr(NVFXSR_CONST, idx); - } - } - - idx = vp->nr_consts++; - vp->consts = realloc(vp->consts, sizeof(*vpd) * vp->nr_consts); - vpd = &vp->consts[idx]; - - vpd->index = pipe; - vpd->value[0] = x; - vpd->value[1] = y; - vpd->value[2] = z; - vpd->value[3] = w; - return nvfx_sr(NVFXSR_CONST, idx); -} - -#define arith(cc,s,o,d,m,s0,s1,s2) \ - nv40_vp_arith((cc), NVFX_VP_INST_SLOT_##s, NVFX_VP_INST_##s##_OP_##o, (d), (m), (s0), (s1), (s2)) - -static void -emit_src(struct nv40_vpc *vpc, uint32_t *hw, int pos, struct nvfx_sreg src) -{ - struct nvfx_vertex_program *vp = vpc->vp; - uint32_t sr = 0; - - switch (src.type) { - case NVFXSR_TEMP: - sr |= (NV40_VP_SRC_REG_TYPE_TEMP << NV40_VP_SRC_REG_TYPE_SHIFT); - sr |= (src.index << NV40_VP_SRC_TEMP_SRC_SHIFT); - break; - case NVFXSR_INPUT: - sr |= (NV40_VP_SRC_REG_TYPE_INPUT << - NV40_VP_SRC_REG_TYPE_SHIFT); - vp->ir |= (1 << src.index); - hw[1] |= (src.index << NV40_VP_INST_INPUT_SRC_SHIFT); - break; - case NVFXSR_CONST: - sr |= (NV40_VP_SRC_REG_TYPE_CONST << - NV40_VP_SRC_REG_TYPE_SHIFT); - assert(vpc->vpi->const_index == -1 || - vpc->vpi->const_index == src.index); - vpc->vpi->const_index = src.index; - break; - case NVFXSR_NONE: - sr |= (NV40_VP_SRC_REG_TYPE_INPUT << - NV40_VP_SRC_REG_TYPE_SHIFT); - break; - default: - assert(0); - } - - if (src.negate) - sr |= NV40_VP_SRC_NEGATE; - - if (src.abs) - hw[0] |= (1 << (21 + pos)); - - sr |= ((src.swz[0] << NV40_VP_SRC_SWZ_X_SHIFT) | - (src.swz[1] << NV40_VP_SRC_SWZ_Y_SHIFT) | - (src.swz[2] << NV40_VP_SRC_SWZ_Z_SHIFT) | - (src.swz[3] << NV40_VP_SRC_SWZ_W_SHIFT)); - - switch (pos) { - case 0: - hw[1] |= ((sr & NV40_VP_SRC0_HIGH_MASK) >> - NV40_VP_SRC0_HIGH_SHIFT) << NV40_VP_INST_SRC0H_SHIFT; - hw[2] |= (sr & NV40_VP_SRC0_LOW_MASK) << - NV40_VP_INST_SRC0L_SHIFT; - break; - case 1: - hw[2] |= sr << NV40_VP_INST_SRC1_SHIFT; - break; - case 2: - hw[2] |= ((sr & NV40_VP_SRC2_HIGH_MASK) >> - NV40_VP_SRC2_HIGH_SHIFT) << NV40_VP_INST_SRC2H_SHIFT; - hw[3] |= (sr & NV40_VP_SRC2_LOW_MASK) << - NV40_VP_INST_SRC2L_SHIFT; - break; - default: - assert(0); - } -} - -static void -emit_dst(struct nv40_vpc *vpc, uint32_t *hw, int slot, struct nvfx_sreg dst) -{ - struct nvfx_vertex_program *vp = vpc->vp; - - switch (dst.type) { - case NVFXSR_TEMP: - hw[3] |= NV40_VP_INST_DEST_MASK; - if (slot == 0) { - hw[0] |= (dst.index << - NV40_VP_INST_VEC_DEST_TEMP_SHIFT); - } else { - hw[3] |= (dst.index << - NV40_VP_INST_SCA_DEST_TEMP_SHIFT); - } - break; - case NVFXSR_OUTPUT: - switch (dst.index) { - case NV40_VP_INST_DEST_COL0 : vp->or |= (1 << 0); break; - case NV40_VP_INST_DEST_COL1 : vp->or |= (1 << 1); break; - case NV40_VP_INST_DEST_BFC0 : vp->or |= (1 << 2); break; - case NV40_VP_INST_DEST_BFC1 : vp->or |= (1 << 3); break; - case NV40_VP_INST_DEST_FOGC : vp->or |= (1 << 4); break; - case NV40_VP_INST_DEST_PSZ : vp->or |= (1 << 5); break; - case NV40_VP_INST_DEST_TC(0): vp->or |= (1 << 14); break; - case NV40_VP_INST_DEST_TC(1): vp->or |= (1 << 15); break; - case NV40_VP_INST_DEST_TC(2): vp->or |= (1 << 16); break; - case NV40_VP_INST_DEST_TC(3): vp->or |= (1 << 17); break; - case NV40_VP_INST_DEST_TC(4): vp->or |= (1 << 18); break; - case NV40_VP_INST_DEST_TC(5): vp->or |= (1 << 19); break; - case NV40_VP_INST_DEST_TC(6): vp->or |= (1 << 20); break; - case NV40_VP_INST_DEST_TC(7): vp->or |= (1 << 21); break; - case NV40_VP_INST_DEST_CLIP(0): - vp->or |= (1 << 6); - vp->clip_ctrl |= NV34TCL_VP_CLIP_PLANES_ENABLE_PLANE0; - dst.index = NV40_VP_INST_DEST_FOGC; - break; - case NV40_VP_INST_DEST_CLIP(1): - vp->or |= (1 << 7); - vp->clip_ctrl |= NV34TCL_VP_CLIP_PLANES_ENABLE_PLANE1; - dst.index = NV40_VP_INST_DEST_FOGC; - break; - case NV40_VP_INST_DEST_CLIP(2): - vp->or |= (1 << 8); - vp->clip_ctrl |= NV34TCL_VP_CLIP_PLANES_ENABLE_PLANE2; - dst.index = NV40_VP_INST_DEST_FOGC; - break; - case NV40_VP_INST_DEST_CLIP(3): - vp->or |= (1 << 9); - vp->clip_ctrl |= NV34TCL_VP_CLIP_PLANES_ENABLE_PLANE3; - dst.index = NV40_VP_INST_DEST_PSZ; - break; - case NV40_VP_INST_DEST_CLIP(4): - vp->or |= (1 << 10); - vp->clip_ctrl |= NV34TCL_VP_CLIP_PLANES_ENABLE_PLANE4; - dst.index = NV40_VP_INST_DEST_PSZ; - break; - case NV40_VP_INST_DEST_CLIP(5): - vp->or |= (1 << 11); - vp->clip_ctrl |= NV34TCL_VP_CLIP_PLANES_ENABLE_PLANE5; - dst.index = NV40_VP_INST_DEST_PSZ; - break; - default: - break; - } - - hw[3] |= (dst.index << NV40_VP_INST_DEST_SHIFT); - if (slot == 0) { - hw[0] |= NV40_VP_INST_VEC_RESULT; - hw[0] |= NV40_VP_INST_VEC_DEST_TEMP_MASK | (1<<20); - } else { - hw[3] |= NV40_VP_INST_SCA_RESULT; - hw[3] |= NV40_VP_INST_SCA_DEST_TEMP_MASK; - } - break; - default: - assert(0); - } -} - -static void -nv40_vp_arith(struct nv40_vpc *vpc, int slot, int op, - struct nvfx_sreg dst, int mask, - struct nvfx_sreg s0, struct nvfx_sreg s1, - struct nvfx_sreg s2) -{ - struct nvfx_vertex_program *vp = vpc->vp; - uint32_t *hw; - - vp->insns = realloc(vp->insns, ++vp->nr_insns * sizeof(*vpc->vpi)); - vpc->vpi = &vp->insns[vp->nr_insns - 1]; - memset(vpc->vpi, 0, sizeof(*vpc->vpi)); - vpc->vpi->const_index = -1; - - hw = vpc->vpi->data; - - hw[0] |= (NVFX_VP_INST_COND_TR << NV40_VP_INST_COND_SHIFT); - hw[0] |= ((0 << NV40_VP_INST_COND_SWZ_X_SHIFT) | - (1 << NV40_VP_INST_COND_SWZ_Y_SHIFT) | - (2 << NV40_VP_INST_COND_SWZ_Z_SHIFT) | - (3 << NV40_VP_INST_COND_SWZ_W_SHIFT)); - - if (slot == 0) { - hw[1] |= (op << NV40_VP_INST_VEC_OPCODE_SHIFT); - hw[3] |= NV40_VP_INST_SCA_DEST_TEMP_MASK; - hw[3] |= (mask << NV40_VP_INST_VEC_WRITEMASK_SHIFT); - } else { - hw[1] |= (op << NV40_VP_INST_SCA_OPCODE_SHIFT); - hw[0] |= (NV40_VP_INST_VEC_DEST_TEMP_MASK | (1 << 20)); - hw[3] |= (mask << NV40_VP_INST_SCA_WRITEMASK_SHIFT); - } - - emit_dst(vpc, hw, slot, dst); - emit_src(vpc, hw, 0, s0); - emit_src(vpc, hw, 1, s1); - emit_src(vpc, hw, 2, s2); -} - -static INLINE struct nvfx_sreg -tgsi_src(struct nv40_vpc *vpc, const struct tgsi_full_src_register *fsrc) { - struct nvfx_sreg src; - - switch (fsrc->Register.File) { - case TGSI_FILE_INPUT: - src = nvfx_sr(NVFXSR_INPUT, fsrc->Register.Index); - break; - case TGSI_FILE_CONSTANT: - src = constant(vpc, fsrc->Register.Index, 0, 0, 0, 0); - break; - case TGSI_FILE_IMMEDIATE: - src = vpc->imm[fsrc->Register.Index]; - break; - case TGSI_FILE_TEMPORARY: - src = vpc->r_temp[fsrc->Register.Index]; - break; - default: - NOUVEAU_ERR("bad src file\n"); - break; - } - - src.abs = fsrc->Register.Absolute; - src.negate = fsrc->Register.Negate; - src.swz[0] = fsrc->Register.SwizzleX; - src.swz[1] = fsrc->Register.SwizzleY; - src.swz[2] = fsrc->Register.SwizzleZ; - src.swz[3] = fsrc->Register.SwizzleW; - return src; -} - -static INLINE struct nvfx_sreg -tgsi_dst(struct nv40_vpc *vpc, const struct tgsi_full_dst_register *fdst) { - struct nvfx_sreg dst; - - switch (fdst->Register.File) { - case TGSI_FILE_OUTPUT: - dst = vpc->r_result[fdst->Register.Index]; - break; - case TGSI_FILE_TEMPORARY: - dst = vpc->r_temp[fdst->Register.Index]; - break; - case TGSI_FILE_ADDRESS: - dst = vpc->r_address[fdst->Register.Index]; - break; - default: - NOUVEAU_ERR("bad dst file\n"); - break; - } - - return dst; -} - -static INLINE int -tgsi_mask(uint tgsi) -{ - int mask = 0; - - if (tgsi & TGSI_WRITEMASK_X) mask |= MASK_X; - if (tgsi & TGSI_WRITEMASK_Y) mask |= MASK_Y; - if (tgsi & TGSI_WRITEMASK_Z) mask |= MASK_Z; - if (tgsi & TGSI_WRITEMASK_W) mask |= MASK_W; - return mask; -} - -static boolean -src_native_swz(struct nv40_vpc *vpc, const struct tgsi_full_src_register *fsrc, - struct nvfx_sreg *src) -{ - const struct nvfx_sreg none = nvfx_sr(NVFXSR_NONE, 0); - struct nvfx_sreg tgsi = tgsi_src(vpc, fsrc); - uint mask = 0; - uint c; - - for (c = 0; c < 4; c++) { - switch (tgsi_util_get_full_src_register_swizzle(fsrc, c)) { - case TGSI_SWIZZLE_X: - case TGSI_SWIZZLE_Y: - case TGSI_SWIZZLE_Z: - case TGSI_SWIZZLE_W: - mask |= tgsi_mask(1 << c); - break; - default: - assert(0); - } - } - - if (mask == MASK_ALL) - return TRUE; - - *src = temp(vpc); - - if (mask) - arith(vpc, VEC, MOV, *src, mask, tgsi, none, none); - - return FALSE; -} - -static boolean -nv40_vertprog_parse_instruction(struct nv40_vpc *vpc, - const struct tgsi_full_instruction *finst) -{ - struct nvfx_sreg src[3], dst, tmp; - struct nvfx_sreg none = nvfx_sr(NVFXSR_NONE, 0); - int mask; - int ai = -1, ci = -1, ii = -1; - int i; - - if (finst->Instruction.Opcode == TGSI_OPCODE_END) - return TRUE; - - for (i = 0; i < finst->Instruction.NumSrcRegs; i++) { - const struct tgsi_full_src_register *fsrc; - - fsrc = &finst->Src[i]; - if (fsrc->Register.File == TGSI_FILE_TEMPORARY) { - src[i] = tgsi_src(vpc, fsrc); - } - } - - for (i = 0; i < finst->Instruction.NumSrcRegs; i++) { - const struct tgsi_full_src_register *fsrc; - - fsrc = &finst->Src[i]; - - switch (fsrc->Register.File) { - case TGSI_FILE_INPUT: - case TGSI_FILE_CONSTANT: - case TGSI_FILE_TEMPORARY: - if (!src_native_swz(vpc, fsrc, &src[i])) - continue; - break; - default: - break; - } - - switch (fsrc->Register.File) { - case TGSI_FILE_INPUT: - if (ai == -1 || ai == fsrc->Register.Index) { - ai = fsrc->Register.Index; - src[i] = tgsi_src(vpc, fsrc); - } else { - src[i] = temp(vpc); - arith(vpc, VEC, MOV, src[i], MASK_ALL, - tgsi_src(vpc, fsrc), none, none); - } - break; - case TGSI_FILE_CONSTANT: - if ((ci == -1 && ii == -1) || - ci == fsrc->Register.Index) { - ci = fsrc->Register.Index; - src[i] = tgsi_src(vpc, fsrc); - } else { - src[i] = temp(vpc); - arith(vpc, VEC, MOV, src[i], MASK_ALL, - tgsi_src(vpc, fsrc), none, none); - } - break; - case TGSI_FILE_IMMEDIATE: - if ((ci == -1 && ii == -1) || - ii == fsrc->Register.Index) { - ii = fsrc->Register.Index; - src[i] = tgsi_src(vpc, fsrc); - } else { - src[i] = temp(vpc); - arith(vpc, VEC, MOV, src[i], MASK_ALL, - tgsi_src(vpc, fsrc), none, none); - } - break; - case TGSI_FILE_TEMPORARY: - /* handled above */ - break; - default: - NOUVEAU_ERR("bad src file\n"); - return FALSE; - } - } - - dst = tgsi_dst(vpc, &finst->Dst[0]); - mask = tgsi_mask(finst->Dst[0].Register.WriteMask); - - switch (finst->Instruction.Opcode) { - case TGSI_OPCODE_ABS: - arith(vpc, VEC, MOV, dst, mask, abs(src[0]), none, none); - break; - case TGSI_OPCODE_ADD: - arith(vpc, VEC, ADD, dst, mask, src[0], none, src[1]); - break; - case TGSI_OPCODE_ARL: - arith(vpc, VEC, ARL, dst, mask, src[0], none, none); - break; - case TGSI_OPCODE_DP3: - arith(vpc, VEC, DP3, dst, mask, src[0], src[1], none); - break; - case TGSI_OPCODE_DP4: - arith(vpc, VEC, DP4, dst, mask, src[0], src[1], none); - break; - case TGSI_OPCODE_DPH: - arith(vpc, VEC, DPH, dst, mask, src[0], src[1], none); - break; - case TGSI_OPCODE_DST: - arith(vpc, VEC, DST, dst, mask, src[0], src[1], none); - break; - case TGSI_OPCODE_EX2: - arith(vpc, SCA, EX2, dst, mask, none, none, src[0]); - break; - case TGSI_OPCODE_EXP: - arith(vpc, SCA, EXP, dst, mask, none, none, src[0]); - break; - case TGSI_OPCODE_FLR: - arith(vpc, VEC, FLR, dst, mask, src[0], none, none); - break; - case TGSI_OPCODE_FRC: - arith(vpc, VEC, FRC, dst, mask, src[0], none, none); - break; - case TGSI_OPCODE_LG2: - arith(vpc, SCA, LG2, dst, mask, none, none, src[0]); - break; - case TGSI_OPCODE_LIT: - arith(vpc, SCA, LIT, dst, mask, none, none, src[0]); - break; - case TGSI_OPCODE_LOG: - arith(vpc, SCA, LOG, dst, mask, none, none, src[0]); - break; - case TGSI_OPCODE_MAD: - arith(vpc, VEC, MAD, dst, mask, src[0], src[1], src[2]); - break; - case TGSI_OPCODE_MAX: - arith(vpc, VEC, MAX, dst, mask, src[0], src[1], none); - break; - case TGSI_OPCODE_MIN: - arith(vpc, VEC, MIN, dst, mask, src[0], src[1], none); - break; - case TGSI_OPCODE_MOV: - arith(vpc, VEC, MOV, dst, mask, src[0], none, none); - break; - case TGSI_OPCODE_MUL: - arith(vpc, VEC, MUL, dst, mask, src[0], src[1], none); - break; - case TGSI_OPCODE_POW: - tmp = temp(vpc); - arith(vpc, SCA, LG2, tmp, MASK_X, none, none, - swz(src[0], X, X, X, X)); - arith(vpc, VEC, MUL, tmp, MASK_X, swz(tmp, X, X, X, X), - swz(src[1], X, X, X, X), none); - arith(vpc, SCA, EX2, dst, mask, none, none, - swz(tmp, X, X, X, X)); - break; - case TGSI_OPCODE_RCP: - arith(vpc, SCA, RCP, dst, mask, none, none, src[0]); - break; - case TGSI_OPCODE_RET: - break; - case TGSI_OPCODE_RSQ: - arith(vpc, SCA, RSQ, dst, mask, none, none, abs(src[0])); - break; - case TGSI_OPCODE_SGE: - arith(vpc, VEC, SGE, dst, mask, src[0], src[1], none); - break; - case TGSI_OPCODE_SLT: - arith(vpc, VEC, SLT, dst, mask, src[0], src[1], none); - break; - case TGSI_OPCODE_SUB: - arith(vpc, VEC, ADD, dst, mask, src[0], none, neg(src[1])); - break; - case TGSI_OPCODE_XPD: - tmp = temp(vpc); - arith(vpc, VEC, MUL, tmp, mask, - swz(src[0], Z, X, Y, Y), swz(src[1], Y, Z, X, X), none); - arith(vpc, VEC, MAD, dst, (mask & ~MASK_W), - swz(src[0], Y, Z, X, X), swz(src[1], Z, X, Y, Y), - neg(tmp)); - break; - default: - NOUVEAU_ERR("invalid opcode %d\n", finst->Instruction.Opcode); - return FALSE; - } - - release_temps(vpc); - return TRUE; -} - -static boolean -nv40_vertprog_parse_decl_output(struct nv40_vpc *vpc, - const struct tgsi_full_declaration *fdec) -{ - unsigned idx = fdec->Range.First; - int hw; - - switch (fdec->Semantic.Name) { - case TGSI_SEMANTIC_POSITION: - hw = NV40_VP_INST_DEST_POS; - vpc->hpos_idx = idx; - break; - case TGSI_SEMANTIC_COLOR: - if (fdec->Semantic.Index == 0) { - hw = NV40_VP_INST_DEST_COL0; - } else - if (fdec->Semantic.Index == 1) { - hw = NV40_VP_INST_DEST_COL1; - } else { - NOUVEAU_ERR("bad colour semantic index\n"); - return FALSE; - } - break; - case TGSI_SEMANTIC_BCOLOR: - if (fdec->Semantic.Index == 0) { - hw = NV40_VP_INST_DEST_BFC0; - } else - if (fdec->Semantic.Index == 1) { - hw = NV40_VP_INST_DEST_BFC1; - } else { - NOUVEAU_ERR("bad bcolour semantic index\n"); - return FALSE; - } - break; - case TGSI_SEMANTIC_FOG: - hw = NV40_VP_INST_DEST_FOGC; - break; - case TGSI_SEMANTIC_PSIZE: - hw = NV40_VP_INST_DEST_PSZ; - break; - case TGSI_SEMANTIC_GENERIC: - if (fdec->Semantic.Index <= 7) { - hw = NV40_VP_INST_DEST_TC(fdec->Semantic.Index); - } else { - NOUVEAU_ERR("bad generic semantic index\n"); - return FALSE; - } - break; - case TGSI_SEMANTIC_EDGEFLAG: - /* not really an error just a fallback */ - NOUVEAU_ERR("cannot handle edgeflag output\n"); - return FALSE; - default: - NOUVEAU_ERR("bad output semantic\n"); - return FALSE; - } - - vpc->r_result[idx] = nvfx_sr(NVFXSR_OUTPUT, hw); - return TRUE; -} - -static boolean -nv40_vertprog_prepare(struct nv40_vpc *vpc) -{ - struct tgsi_parse_context p; - int high_temp = -1, high_addr = -1, nr_imm = 0, i; - - tgsi_parse_init(&p, vpc->vp->pipe.tokens); - while (!tgsi_parse_end_of_tokens(&p)) { - const union tgsi_full_token *tok = &p.FullToken; - - tgsi_parse_token(&p); - switch(tok->Token.Type) { - case TGSI_TOKEN_TYPE_IMMEDIATE: - nr_imm++; - break; - case TGSI_TOKEN_TYPE_DECLARATION: - { - const struct tgsi_full_declaration *fdec; - - fdec = &p.FullToken.FullDeclaration; - switch (fdec->Declaration.File) { - case TGSI_FILE_TEMPORARY: - if (fdec->Range.Last > high_temp) { - high_temp = - fdec->Range.Last; - } - break; -#if 0 /* this would be nice.. except gallium doesn't track it */ - case TGSI_FILE_ADDRESS: - if (fdec->Range.Last > high_addr) { - high_addr = - fdec->Range.Last; - } - break; -#endif - case TGSI_FILE_OUTPUT: - if (!nv40_vertprog_parse_decl_output(vpc, fdec)) - return FALSE; - break; - default: - break; - } - } - break; -#if 1 /* yay, parse instructions looking for address regs instead */ - case TGSI_TOKEN_TYPE_INSTRUCTION: - { - const struct tgsi_full_instruction *finst; - const struct tgsi_full_dst_register *fdst; - - finst = &p.FullToken.FullInstruction; - fdst = &finst->Dst[0]; - - if (fdst->Register.File == TGSI_FILE_ADDRESS) { - if (fdst->Register.Index > high_addr) - high_addr = fdst->Register.Index; - } - - } - break; -#endif - default: - break; - } - } - tgsi_parse_free(&p); - - if (nr_imm) { - vpc->imm = CALLOC(nr_imm, sizeof(struct nvfx_sreg)); - assert(vpc->imm); - } - - if (++high_temp) { - vpc->r_temp = CALLOC(high_temp, sizeof(struct nvfx_sreg)); - for (i = 0; i < high_temp; i++) - vpc->r_temp[i] = temp(vpc); - } - - if (++high_addr) { - vpc->r_address = CALLOC(high_addr, sizeof(struct nvfx_sreg)); - for (i = 0; i < high_addr; i++) - vpc->r_address[i] = temp(vpc); - } - - vpc->r_temps_discard = 0; - return TRUE; -} - -static void -nv40_vertprog_translate(struct nvfx_context *nvfx, - struct nvfx_vertex_program *vp) -{ - struct tgsi_parse_context parse; - struct nv40_vpc *vpc = NULL; - struct nvfx_sreg none = nvfx_sr(NVFXSR_NONE, 0); - int i; - - vpc = CALLOC(1, sizeof(struct nv40_vpc)); - if (!vpc) - return; - vpc->vp = vp; - - if (!nv40_vertprog_prepare(vpc)) { - FREE(vpc); - return; - } - - /* Redirect post-transform vertex position to a temp if user clip - * planes are enabled. We need to append code to the vtxprog - * to handle clip planes later. - */ - if (vp->ucp.nr) { - vpc->r_result[vpc->hpos_idx] = temp(vpc); - vpc->r_temps_discard = 0; - } - - tgsi_parse_init(&parse, vp->pipe.tokens); - - while (!tgsi_parse_end_of_tokens(&parse)) { - tgsi_parse_token(&parse); - - switch (parse.FullToken.Token.Type) { - case TGSI_TOKEN_TYPE_IMMEDIATE: - { - const struct tgsi_full_immediate *imm; - - imm = &parse.FullToken.FullImmediate; - assert(imm->Immediate.DataType == TGSI_IMM_FLOAT32); - assert(imm->Immediate.NrTokens == 4 + 1); - vpc->imm[vpc->nr_imm++] = - constant(vpc, -1, - imm->u[0].Float, - imm->u[1].Float, - imm->u[2].Float, - imm->u[3].Float); - } - break; - case TGSI_TOKEN_TYPE_INSTRUCTION: - { - const struct tgsi_full_instruction *finst; - finst = &parse.FullToken.FullInstruction; - if (!nv40_vertprog_parse_instruction(vpc, finst)) - goto out_err; - } - break; - default: - break; - } - } - - /* Write out HPOS if it was redirected to a temp earlier */ - if (vpc->r_result[vpc->hpos_idx].type != NVFXSR_OUTPUT) { - struct nvfx_sreg hpos = nvfx_sr(NVFXSR_OUTPUT, - NV40_VP_INST_DEST_POS); - struct nvfx_sreg htmp = vpc->r_result[vpc->hpos_idx]; - - arith(vpc, VEC, MOV, hpos, MASK_ALL, htmp, none, none); - } - - /* Insert code to handle user clip planes */ - for (i = 0; i < vp->ucp.nr; i++) { - struct nvfx_sreg cdst = nvfx_sr(NVFXSR_OUTPUT, - NV40_VP_INST_DEST_CLIP(i)); - struct nvfx_sreg ceqn = constant(vpc, -1, - nvfx->clip.ucp[i][0], - nvfx->clip.ucp[i][1], - nvfx->clip.ucp[i][2], - nvfx->clip.ucp[i][3]); - struct nvfx_sreg htmp = vpc->r_result[vpc->hpos_idx]; - unsigned mask; - - switch (i) { - case 0: case 3: mask = MASK_Y; break; - case 1: case 4: mask = MASK_Z; break; - case 2: case 5: mask = MASK_W; break; - default: - NOUVEAU_ERR("invalid clip dist #%d\n", i); - goto out_err; - } - - arith(vpc, VEC, DP4, cdst, mask, htmp, ceqn, none); - } - - vp->insns[vp->nr_insns - 1].data[3] |= NVFX_VP_INST_LAST; - vp->translated = TRUE; -out_err: - tgsi_parse_free(&parse); - if (vpc->r_temp) - FREE(vpc->r_temp); - if (vpc->r_address) - FREE(vpc->r_address); - if (vpc->imm) - FREE(vpc->imm); - FREE(vpc); -} - -static boolean -nv40_vertprog_validate(struct nvfx_context *nvfx) -{ - struct pipe_screen *pscreen = nvfx->pipe.screen; - struct nvfx_screen *screen = nvfx->screen; - struct nouveau_channel *chan = screen->base.channel; - struct nouveau_grobj *eng3d = screen->eng3d; - struct nvfx_vertex_program *vp; - struct pipe_buffer *constbuf; - boolean upload_code = FALSE, upload_data = FALSE; - int i; - - if (nvfx->render_mode == HW) { - vp = nvfx->vertprog; - constbuf = nvfx->constbuf[PIPE_SHADER_VERTEX]; - - if ((nvfx->dirty & NVFX_NEW_UCP) || - memcmp(&nvfx->clip, &vp->ucp, sizeof(vp->ucp))) { - nv40_vertprog_destroy(nvfx, vp); - memcpy(&vp->ucp, &nvfx->clip, sizeof(vp->ucp)); - } - } else { - vp = nvfx->swtnl.vertprog; - constbuf = NULL; - } - - /* Translate TGSI shader into hw bytecode */ - if (vp->translated) - goto check_gpu_resources; - - nvfx->fallback_swtnl &= ~NVFX_NEW_VERTPROG; - nv40_vertprog_translate(nvfx, vp); - if (!vp->translated) { - nvfx->fallback_swtnl |= NVFX_NEW_VERTPROG; - return FALSE; - } - -check_gpu_resources: - /* Allocate hw vtxprog exec slots */ - if (!vp->exec) { - struct nouveau_resource *heap = nvfx->screen->vp_exec_heap; - struct nouveau_stateobj *so; - uint vplen = vp->nr_insns; - - if (nouveau_resource_alloc(heap, vplen, vp, &vp->exec)) { - while (heap->next && heap->size < vplen) { - struct nvfx_vertex_program *evict; - - evict = heap->next->priv; - nouveau_resource_free(&evict->exec); - } - - if (nouveau_resource_alloc(heap, vplen, vp, &vp->exec)) - assert(0); - } - - so = so_new(3, 4, 0); - so_method(so, eng3d, NV34TCL_VP_START_FROM_ID, 1); - so_data (so, vp->exec->start); - so_method(so, eng3d, NV40TCL_VP_ATTRIB_EN, 2); - so_data (so, vp->ir); - so_data (so, vp->or); - so_method(so, eng3d, NV34TCL_VP_CLIP_PLANES_ENABLE, 1); - so_data (so, vp->clip_ctrl); - so_ref(so, &vp->so); - so_ref(NULL, &so); - - upload_code = TRUE; - } - - /* Allocate hw vtxprog const slots */ - if (vp->nr_consts && !vp->data) { - struct nouveau_resource *heap = nvfx->screen->vp_data_heap; - - if (nouveau_resource_alloc(heap, vp->nr_consts, vp, &vp->data)) { - while (heap->next && heap->size < vp->nr_consts) { - struct nvfx_vertex_program *evict; - - evict = heap->next->priv; - nouveau_resource_free(&evict->data); - } - - if (nouveau_resource_alloc(heap, vp->nr_consts, vp, &vp->data)) - assert(0); - } - - /*XXX: handle this some day */ - assert(vp->data->start >= vp->data_start_min); - - upload_data = TRUE; - if (vp->data_start != vp->data->start) - upload_code = TRUE; - } - - /* If exec or data segments moved we need to patch the program to - * fixup offsets and register IDs. - */ - if (vp->exec_start != vp->exec->start) { - for (i = 0; i < vp->nr_insns; i++) { - struct nvfx_vertex_program_exec *vpi = &vp->insns[i]; - - if (vpi->has_branch_offset) { - assert(0); - } - } - - vp->exec_start = vp->exec->start; - } - - if (vp->nr_consts && vp->data_start != vp->data->start) { - for (i = 0; i < vp->nr_insns; i++) { - struct nvfx_vertex_program_exec *vpi = &vp->insns[i]; - - if (vpi->const_index >= 0) { - vpi->data[1] &= ~NV40_VP_INST_CONST_SRC_MASK; - vpi->data[1] |= - (vpi->const_index + vp->data->start) << - NV40_VP_INST_CONST_SRC_SHIFT; - - } - } - - vp->data_start = vp->data->start; - } - - /* Update + Upload constant values */ - if (vp->nr_consts) { - float *map = NULL; - - if (constbuf) { - map = pipe_buffer_map(pscreen, constbuf, - PIPE_BUFFER_USAGE_CPU_READ); - } - - for (i = 0; i < vp->nr_consts; i++) { - struct nvfx_vertex_program_data *vpd = &vp->consts[i]; - - if (vpd->index >= 0) { - if (!upload_data && - !memcmp(vpd->value, &map[vpd->index * 4], - 4 * sizeof(float))) - continue; - memcpy(vpd->value, &map[vpd->index * 4], - 4 * sizeof(float)); - } - - BEGIN_RING(chan, eng3d, NV34TCL_VP_UPLOAD_CONST_ID, 5); - OUT_RING (chan, i + vp->data->start); - OUT_RINGp (chan, (uint32_t *)vpd->value, 4); - } - - if (constbuf) - pscreen->buffer_unmap(pscreen, constbuf); - } - - /* Upload vtxprog */ - if (upload_code) { -#if 0 - for (i = 0; i < vp->nr_insns; i++) { - NOUVEAU_MSG("VP %d: 0x%08x\n", i, vp->insns[i].data[0]); - NOUVEAU_MSG("VP %d: 0x%08x\n", i, vp->insns[i].data[1]); - NOUVEAU_MSG("VP %d: 0x%08x\n", i, vp->insns[i].data[2]); - NOUVEAU_MSG("VP %d: 0x%08x\n", i, vp->insns[i].data[3]); - } -#endif - BEGIN_RING(chan, eng3d, NV34TCL_VP_UPLOAD_FROM_ID, 1); - OUT_RING (chan, vp->exec->start); - for (i = 0; i < vp->nr_insns; i++) { - BEGIN_RING(chan, eng3d, NV34TCL_VP_UPLOAD_INST(0), 4); - OUT_RINGp (chan, vp->insns[i].data, 4); - } - } - - if (vp->so != nvfx->state.hw[NVFX_STATE_VERTPROG]) { - so_ref(vp->so, &nvfx->state.hw[NVFX_STATE_VERTPROG]); - return TRUE; - } - - return FALSE; -} - -void -nv40_vertprog_destroy(struct nvfx_context *nvfx, struct nvfx_vertex_program *vp) -{ - vp->translated = FALSE; - - if (vp->nr_insns) { - FREE(vp->insns); - vp->insns = NULL; - vp->nr_insns = 0; - } - - if (vp->nr_consts) { - FREE(vp->consts); - vp->consts = NULL; - vp->nr_consts = 0; - } - - nouveau_resource_free(&vp->exec); - vp->exec_start = 0; - nouveau_resource_free(&vp->data); - vp->data_start = 0; - vp->data_start_min = 0; - - vp->ir = vp->or = vp->clip_ctrl = 0; - so_ref(NULL, &vp->so); -} - -struct nvfx_state_entry nv40_state_vertprog = { - .validate = nv40_vertprog_validate, - .dirty = { - .pipe = NVFX_NEW_VERTPROG | NVFX_NEW_UCP, - .hw = NVFX_STATE_VERTPROG, - } -}; - diff --git a/src/gallium/drivers/nvfx/Makefile b/src/gallium/drivers/nvfx/Makefile index 6c4ee17493..a665c7e263 100644 --- a/src/gallium/drivers/nvfx/Makefile +++ b/src/gallium/drivers/nvfx/Makefile @@ -20,6 +20,7 @@ C_SOURCES = \ nvfx_state_zsa.c \ nvfx_surface.c \ nvfx_transfer.c \ - nvfx_vbo.c + nvfx_vbo.c \ + nvfx_vertprog.c include ../../Makefile.template diff --git a/src/gallium/drivers/nvfx/nvfx_context.h b/src/gallium/drivers/nvfx/nvfx_context.h index ab1a1fbbe9..9a4b4631b5 100644 --- a/src/gallium/drivers/nvfx/nvfx_context.h +++ b/src/gallium/drivers/nvfx/nvfx_context.h @@ -190,6 +190,7 @@ extern struct nvfx_state_entry nvfx_state_scissor; extern struct nvfx_state_entry nvfx_state_sr; extern struct nvfx_state_entry nvfx_state_stipple; extern struct nvfx_state_entry nvfx_state_vbo; +extern struct nvfx_state_entry nvfx_state_vertprog; extern struct nvfx_state_entry nvfx_state_viewport; extern struct nvfx_state_entry nvfx_state_vtxfmt; extern struct nvfx_state_entry nvfx_state_zsa; @@ -234,8 +235,7 @@ extern void nvfx_draw_elements(struct pipe_context *pipe, unsigned count); /* nvfx_vertprog.c */ -extern void nv30_vertprog_destroy(struct nvfx_context *, - struct nvfx_vertex_program *); -extern void nv40_vertprog_destroy(struct nvfx_context *, +extern void nvfx_vertprog_destroy(struct nvfx_context *, struct nvfx_vertex_program *); + #endif diff --git a/src/gallium/drivers/nvfx/nvfx_state.c b/src/gallium/drivers/nvfx/nvfx_state.c index 76780dc4f5..7e138afc71 100644 --- a/src/gallium/drivers/nvfx/nvfx_state.c +++ b/src/gallium/drivers/nvfx/nvfx_state.c @@ -370,10 +370,7 @@ nvfx_vp_state_delete(struct pipe_context *pipe, void *hwcso) struct nvfx_vertex_program *vp = hwcso; draw_delete_vertex_shader(nvfx->draw, vp->draw); - if(!nvfx->is_nv4x) - nv30_vertprog_destroy(nvfx, vp); - else - nv40_vertprog_destroy(nvfx, vp); + nvfx_vertprog_destroy(nvfx, vp); FREE((void*)vp->pipe.tokens); FREE(vp); } diff --git a/src/gallium/drivers/nvfx/nvfx_state_emit.c b/src/gallium/drivers/nvfx/nvfx_state_emit.c index 88b86f9fb5..fcbf831050 100644 --- a/src/gallium/drivers/nvfx/nvfx_state_emit.c +++ b/src/gallium/drivers/nvfx/nvfx_state_emit.c @@ -11,7 +11,7 @@ static struct nvfx_state_entry *name##_render_states[] = { \ &nvfx_state_stipple, \ &nvfx_state_fragprog, \ &nvxx##_state_fragtex, \ - &nvxx##_state_vertprog, \ + &nvfx_state_vertprog, \ &nvfx_state_blend, \ &nvfx_state_blend_colour, \ &nvfx_state_zsa, \ diff --git a/src/gallium/drivers/nvfx/nvfx_vertprog.c b/src/gallium/drivers/nvfx/nvfx_vertprog.c new file mode 100644 index 0000000000..730361a982 --- /dev/null +++ b/src/gallium/drivers/nvfx/nvfx_vertprog.c @@ -0,0 +1,1108 @@ +#include "pipe/p_context.h" +#include "pipe/p_defines.h" +#include "pipe/p_state.h" +#include "util/u_inlines.h" + +#include "pipe/p_shader_tokens.h" +#include "tgsi/tgsi_parse.h" +#include "tgsi/tgsi_dump.h" +#include "tgsi/tgsi_util.h" + +#include "nvfx_context.h" +#include "nvfx_state.h" + +/* TODO (at least...): + * 1. Indexed consts + ARL + * 3. NV_vp11, NV_vp2, NV_vp3 features + * - extra arith opcodes + * - branching + * - texture sampling + * - indexed attribs + * - indexed results + * 4. bugs + */ + +#define SWZ_X 0 +#define SWZ_Y 1 +#define SWZ_Z 2 +#define SWZ_W 3 +#define MASK_X 8 +#define MASK_Y 4 +#define MASK_Z 2 +#define MASK_W 1 +#define MASK_ALL (MASK_X|MASK_Y|MASK_Z|MASK_W) +#define DEF_SCALE 0 +#define DEF_CTEST 0 +#include "nv30/nv30_shader.h" +#include "nv40/nv40_shader.h" + +#define swz(s,x,y,z,w) nvfx_sr_swz((s), SWZ_##x, SWZ_##y, SWZ_##z, SWZ_##w) +#define neg(s) nvfx_sr_neg((s)) +#define abs(s) nvfx_sr_abs((s)) + +#define NVFX_VP_INST_DEST_CLIP(n) ((~0 - 6) + (n)) + +struct nvfx_vpc { + struct nvfx_vertex_program *vp; + + struct nvfx_vertex_program_exec *vpi; + + unsigned r_temps; + unsigned r_temps_discard; + struct nvfx_sreg r_result[PIPE_MAX_SHADER_OUTPUTS]; + struct nvfx_sreg *r_address; + struct nvfx_sreg *r_temp; + + struct nvfx_sreg *imm; + unsigned nr_imm; + + unsigned hpos_idx; +}; + +static struct nvfx_sreg +temp(struct nvfx_vpc *vpc) +{ + int idx = ffs(~vpc->r_temps) - 1; + + if (idx < 0) { + NOUVEAU_ERR("out of temps!!\n"); + assert(0); + return nvfx_sr(NVFXSR_TEMP, 0); + } + + vpc->r_temps |= (1 << idx); + vpc->r_temps_discard |= (1 << idx); + return nvfx_sr(NVFXSR_TEMP, idx); +} + +static INLINE void +release_temps(struct nvfx_vpc *vpc) +{ + vpc->r_temps &= ~vpc->r_temps_discard; + vpc->r_temps_discard = 0; +} + +static struct nvfx_sreg +constant(struct nvfx_vpc *vpc, int pipe, float x, float y, float z, float w) +{ + struct nvfx_vertex_program *vp = vpc->vp; + struct nvfx_vertex_program_data *vpd; + int idx; + + if (pipe >= 0) { + for (idx = 0; idx < vp->nr_consts; idx++) { + if (vp->consts[idx].index == pipe) + return nvfx_sr(NVFXSR_CONST, idx); + } + } + + idx = vp->nr_consts++; + vp->consts = realloc(vp->consts, sizeof(*vpd) * vp->nr_consts); + vpd = &vp->consts[idx]; + + vpd->index = pipe; + vpd->value[0] = x; + vpd->value[1] = y; + vpd->value[2] = z; + vpd->value[3] = w; + return nvfx_sr(NVFXSR_CONST, idx); +} + +#define arith(cc,s,o,d,m,s0,s1,s2) \ + nvfx_vp_arith(nvfx, (cc), NVFX_VP_INST_SLOT_##s, NVFX_VP_INST_##s##_OP_##o, (d), (m), (s0), (s1), (s2)) + +static void +emit_src(struct nvfx_context* nvfx, struct nvfx_vpc *vpc, uint32_t *hw, int pos, struct nvfx_sreg src) +{ + struct nvfx_vertex_program *vp = vpc->vp; + uint32_t sr = 0; + + switch (src.type) { + case NVFXSR_TEMP: + sr |= (NVFX_VP(SRC_REG_TYPE_TEMP) << NVFX_VP(SRC_REG_TYPE_SHIFT)); + sr |= (src.index << NVFX_VP(SRC_TEMP_SRC_SHIFT)); + break; + case NVFXSR_INPUT: + sr |= (NVFX_VP(SRC_REG_TYPE_INPUT) << + NVFX_VP(SRC_REG_TYPE_SHIFT)); + vp->ir |= (1 << src.index); + hw[1] |= (src.index << NVFX_VP(INST_INPUT_SRC_SHIFT)); + break; + case NVFXSR_CONST: + sr |= (NVFX_VP(SRC_REG_TYPE_CONST) << + NVFX_VP(SRC_REG_TYPE_SHIFT)); + assert(vpc->vpi->const_index == -1 || + vpc->vpi->const_index == src.index); + vpc->vpi->const_index = src.index; + break; + case NVFXSR_NONE: + sr |= (NVFX_VP(SRC_REG_TYPE_INPUT) << + NVFX_VP(SRC_REG_TYPE_SHIFT)); + break; + default: + assert(0); + } + + if (src.negate) + sr |= NVFX_VP(SRC_NEGATE); + + if (src.abs) + hw[0] |= (1 << (21 + pos)); + + sr |= ((src.swz[0] << NVFX_VP(SRC_SWZ_X_SHIFT)) | + (src.swz[1] << NVFX_VP(SRC_SWZ_Y_SHIFT)) | + (src.swz[2] << NVFX_VP(SRC_SWZ_Z_SHIFT)) | + (src.swz[3] << NVFX_VP(SRC_SWZ_W_SHIFT))); + + switch (pos) { + case 0: + hw[1] |= ((sr & NVFX_VP(SRC0_HIGH_MASK)) >> + NVFX_VP(SRC0_HIGH_SHIFT)) << NVFX_VP(INST_SRC0H_SHIFT); + hw[2] |= (sr & NVFX_VP(SRC0_LOW_MASK)) << + NVFX_VP(INST_SRC0L_SHIFT); + break; + case 1: + hw[2] |= sr << NVFX_VP(INST_SRC1_SHIFT); + break; + case 2: + hw[2] |= ((sr & NVFX_VP(SRC2_HIGH_MASK)) >> + NVFX_VP(SRC2_HIGH_SHIFT)) << NVFX_VP(INST_SRC2H_SHIFT); + hw[3] |= (sr & NVFX_VP(SRC2_LOW_MASK)) << + NVFX_VP(INST_SRC2L_SHIFT); + break; + default: + assert(0); + } +} + +static void +emit_dst(struct nvfx_context* nvfx, struct nvfx_vpc *vpc, uint32_t *hw, int slot, struct nvfx_sreg dst) +{ + struct nvfx_vertex_program *vp = vpc->vp; + + switch (dst.type) { + case NVFXSR_TEMP: + if(!nvfx->is_nv4x) + hw[0] |= (dst.index << NV30_VP_INST_DEST_TEMP_ID_SHIFT); + else { + hw[3] |= NV40_VP_INST_DEST_MASK; + if (slot == 0) { + hw[0] |= (dst.index << + NV40_VP_INST_VEC_DEST_TEMP_SHIFT); + } else { + hw[3] |= (dst.index << + NV40_VP_INST_SCA_DEST_TEMP_SHIFT); + } + } + break; + case NVFXSR_OUTPUT: + /* TODO: this may be wrong because on nv30 COL0 and BFC0 are swapped */ + switch (dst.index) { + case NVFX_VP_INST_DEST_CLIP(0): + vp->or |= (1 << 6); + vp->clip_ctrl |= NV34TCL_VP_CLIP_PLANES_ENABLE_PLANE0; + dst.index = NVFX_VP(INST_DEST_FOGC); + break; + case NVFX_VP_INST_DEST_CLIP(1): + vp->or |= (1 << 7); + vp->clip_ctrl |= NV34TCL_VP_CLIP_PLANES_ENABLE_PLANE1; + dst.index = NVFX_VP(INST_DEST_FOGC); + break; + case NVFX_VP_INST_DEST_CLIP(2): + vp->or |= (1 << 8); + vp->clip_ctrl |= NV34TCL_VP_CLIP_PLANES_ENABLE_PLANE2; + dst.index = NVFX_VP(INST_DEST_FOGC); + break; + case NVFX_VP_INST_DEST_CLIP(3): + vp->or |= (1 << 9); + vp->clip_ctrl |= NV34TCL_VP_CLIP_PLANES_ENABLE_PLANE3; + dst.index = NVFX_VP(INST_DEST_PSZ); + break; + case NVFX_VP_INST_DEST_CLIP(4): + vp->or |= (1 << 10); + vp->clip_ctrl |= NV34TCL_VP_CLIP_PLANES_ENABLE_PLANE4; + dst.index = NVFX_VP(INST_DEST_PSZ); + break; + case NVFX_VP_INST_DEST_CLIP(5): + vp->or |= (1 << 11); + vp->clip_ctrl |= NV34TCL_VP_CLIP_PLANES_ENABLE_PLANE5; + dst.index = NVFX_VP(INST_DEST_PSZ); + break; + default: + if(!nvfx->is_nv4x) { + switch (dst.index) { + case NV30_VP_INST_DEST_COL0 : vp->or |= (1 << 0); break; + case NV30_VP_INST_DEST_COL1 : vp->or |= (1 << 1); break; + case NV30_VP_INST_DEST_BFC0 : vp->or |= (1 << 2); break; + case NV30_VP_INST_DEST_BFC1 : vp->or |= (1 << 3); break; + case NV30_VP_INST_DEST_FOGC: vp->or |= (1 << 4); break; + case NV30_VP_INST_DEST_PSZ : vp->or |= (1 << 5); break; + case NV30_VP_INST_DEST_TC(0): vp->or |= (1 << 14); break; + case NV30_VP_INST_DEST_TC(1): vp->or |= (1 << 15); break; + case NV30_VP_INST_DEST_TC(2): vp->or |= (1 << 16); break; + case NV30_VP_INST_DEST_TC(3): vp->or |= (1 << 17); break; + case NV30_VP_INST_DEST_TC(4): vp->or |= (1 << 18); break; + case NV30_VP_INST_DEST_TC(5): vp->or |= (1 << 19); break; + case NV30_VP_INST_DEST_TC(6): vp->or |= (1 << 20); break; + case NV30_VP_INST_DEST_TC(7): vp->or |= (1 << 21); break; + } + } else { + switch (dst.index) { + case NV40_VP_INST_DEST_COL0 : vp->or |= (1 << 0); break; + case NV40_VP_INST_DEST_COL1 : vp->or |= (1 << 1); break; + case NV40_VP_INST_DEST_BFC0 : vp->or |= (1 << 2); break; + case NV40_VP_INST_DEST_BFC1 : vp->or |= (1 << 3); break; + case NV40_VP_INST_DEST_FOGC: vp->or |= (1 << 4); break; + case NV40_VP_INST_DEST_PSZ : vp->or |= (1 << 5); break; + case NV40_VP_INST_DEST_TC(0): vp->or |= (1 << 14); break; + case NV40_VP_INST_DEST_TC(1): vp->or |= (1 << 15); break; + case NV40_VP_INST_DEST_TC(2): vp->or |= (1 << 16); break; + case NV40_VP_INST_DEST_TC(3): vp->or |= (1 << 17); break; + case NV40_VP_INST_DEST_TC(4): vp->or |= (1 << 18); break; + case NV40_VP_INST_DEST_TC(5): vp->or |= (1 << 19); break; + case NV40_VP_INST_DEST_TC(6): vp->or |= (1 << 20); break; + case NV40_VP_INST_DEST_TC(7): vp->or |= (1 << 21); break; + } + } + break; + } + + if(!nvfx->is_nv4x) { + hw[3] |= (dst.index << NV30_VP_INST_DEST_SHIFT); + hw[0] |= NV30_VP_INST_VEC_DEST_TEMP_MASK | (1<<20); + + /*XXX: no way this is entirely correct, someone needs to + * figure out what exactly it is. + */ + hw[3] |= 0x800; + } else { + hw[3] |= (dst.index << NV40_VP_INST_DEST_SHIFT); + if (slot == 0) { + hw[0] |= NV40_VP_INST_VEC_RESULT; + hw[0] |= NV40_VP_INST_VEC_DEST_TEMP_MASK | (1<<20); + } else { + hw[3] |= NV40_VP_INST_SCA_RESULT; + hw[3] |= NV40_VP_INST_SCA_DEST_TEMP_MASK; + } + } + break; + default: + assert(0); + } +} + +static void +nvfx_vp_arith(struct nvfx_context* nvfx, struct nvfx_vpc *vpc, int slot, int op, + struct nvfx_sreg dst, int mask, + struct nvfx_sreg s0, struct nvfx_sreg s1, + struct nvfx_sreg s2) +{ + struct nvfx_vertex_program *vp = vpc->vp; + uint32_t *hw; + + vp->insns = realloc(vp->insns, ++vp->nr_insns * sizeof(*vpc->vpi)); + vpc->vpi = &vp->insns[vp->nr_insns - 1]; + memset(vpc->vpi, 0, sizeof(*vpc->vpi)); + vpc->vpi->const_index = -1; + + hw = vpc->vpi->data; + + hw[0] |= (NVFX_VP_INST_COND_TR << NVFX_VP(INST_COND_SHIFT)); + hw[0] |= ((0 << NVFX_VP(INST_COND_SWZ_X_SHIFT)) | + (1 << NVFX_VP(INST_COND_SWZ_Y_SHIFT)) | + (2 << NVFX_VP(INST_COND_SWZ_Z_SHIFT)) | + (3 << NVFX_VP(INST_COND_SWZ_W_SHIFT))); + + if(!nvfx->is_nv4x) { + hw[1] |= (op << NV30_VP_INST_VEC_OPCODE_SHIFT); +// hw[3] |= NVFX_VP(INST_SCA_DEST_TEMP_MASK); +// hw[3] |= (mask << NVFX_VP(INST_VEC_WRITEMASK_SHIFT)); + + if (dst.type == NVFXSR_OUTPUT) { + if (slot) + hw[3] |= (mask << NV30_VP_INST_SDEST_WRITEMASK_SHIFT); + else + hw[3] |= (mask << NV30_VP_INST_VDEST_WRITEMASK_SHIFT); + } else { + if (slot) + hw[3] |= (mask << NV30_VP_INST_STEMP_WRITEMASK_SHIFT); + else + hw[3] |= (mask << NV30_VP_INST_VTEMP_WRITEMASK_SHIFT); + } + } else { + if (slot == 0) { + hw[1] |= (op << NV40_VP_INST_VEC_OPCODE_SHIFT); + hw[3] |= NV40_VP_INST_SCA_DEST_TEMP_MASK; + hw[3] |= (mask << NV40_VP_INST_VEC_WRITEMASK_SHIFT); + } else { + hw[1] |= (op << NV40_VP_INST_SCA_OPCODE_SHIFT); + hw[0] |= (NV40_VP_INST_VEC_DEST_TEMP_MASK | (1 << 20)); + hw[3] |= (mask << NV40_VP_INST_SCA_WRITEMASK_SHIFT); + } + } + + emit_dst(nvfx, vpc, hw, slot, dst); + emit_src(nvfx, vpc, hw, 0, s0); + emit_src(nvfx, vpc, hw, 1, s1); + emit_src(nvfx, vpc, hw, 2, s2); +} + +static INLINE struct nvfx_sreg +tgsi_src(struct nvfx_vpc *vpc, const struct tgsi_full_src_register *fsrc) { + struct nvfx_sreg src; + + switch (fsrc->Register.File) { + case TGSI_FILE_INPUT: + src = nvfx_sr(NVFXSR_INPUT, fsrc->Register.Index); + break; + case TGSI_FILE_CONSTANT: + src = constant(vpc, fsrc->Register.Index, 0, 0, 0, 0); + break; + case TGSI_FILE_IMMEDIATE: + src = vpc->imm[fsrc->Register.Index]; + break; + case TGSI_FILE_TEMPORARY: + src = vpc->r_temp[fsrc->Register.Index]; + break; + default: + NOUVEAU_ERR("bad src file\n"); + break; + } + + src.abs = fsrc->Register.Absolute; + src.negate = fsrc->Register.Negate; + src.swz[0] = fsrc->Register.SwizzleX; + src.swz[1] = fsrc->Register.SwizzleY; + src.swz[2] = fsrc->Register.SwizzleZ; + src.swz[3] = fsrc->Register.SwizzleW; + return src; +} + +static INLINE struct nvfx_sreg +tgsi_dst(struct nvfx_vpc *vpc, const struct tgsi_full_dst_register *fdst) { + struct nvfx_sreg dst; + + switch (fdst->Register.File) { + case TGSI_FILE_OUTPUT: + dst = vpc->r_result[fdst->Register.Index]; + break; + case TGSI_FILE_TEMPORARY: + dst = vpc->r_temp[fdst->Register.Index]; + break; + case TGSI_FILE_ADDRESS: + dst = vpc->r_address[fdst->Register.Index]; + break; + default: + NOUVEAU_ERR("bad dst file\n"); + break; + } + + return dst; +} + +static INLINE int +tgsi_mask(uint tgsi) +{ + int mask = 0; + + if (tgsi & TGSI_WRITEMASK_X) mask |= MASK_X; + if (tgsi & TGSI_WRITEMASK_Y) mask |= MASK_Y; + if (tgsi & TGSI_WRITEMASK_Z) mask |= MASK_Z; + if (tgsi & TGSI_WRITEMASK_W) mask |= MASK_W; + return mask; +} + +static boolean +src_native_swz(struct nvfx_context* nvfx, struct nvfx_vpc *vpc, const struct tgsi_full_src_register *fsrc, + struct nvfx_sreg *src) +{ + const struct nvfx_sreg none = nvfx_sr(NVFXSR_NONE, 0); + struct nvfx_sreg tgsi = tgsi_src(vpc, fsrc); + uint mask = 0; + uint c; + + for (c = 0; c < 4; c++) { + switch (tgsi_util_get_full_src_register_swizzle(fsrc, c)) { + case TGSI_SWIZZLE_X: + case TGSI_SWIZZLE_Y: + case TGSI_SWIZZLE_Z: + case TGSI_SWIZZLE_W: + mask |= tgsi_mask(1 << c); + break; + default: + assert(0); + } + } + + if (mask == MASK_ALL) + return TRUE; + + *src = temp(vpc); + + if (mask) + arith(vpc, VEC, MOV, *src, mask, tgsi, none, none); + + return FALSE; +} + +static boolean +nvfx_vertprog_parse_instruction(struct nvfx_context* nvfx, struct nvfx_vpc *vpc, + const struct tgsi_full_instruction *finst) +{ + struct nvfx_sreg src[3], dst, tmp; + struct nvfx_sreg none = nvfx_sr(NVFXSR_NONE, 0); + int mask; + int ai = -1, ci = -1, ii = -1; + int i; + + if (finst->Instruction.Opcode == TGSI_OPCODE_END) + return TRUE; + + for (i = 0; i < finst->Instruction.NumSrcRegs; i++) { + const struct tgsi_full_src_register *fsrc; + + fsrc = &finst->Src[i]; + if (fsrc->Register.File == TGSI_FILE_TEMPORARY) { + src[i] = tgsi_src(vpc, fsrc); + } + } + + for (i = 0; i < finst->Instruction.NumSrcRegs; i++) { + const struct tgsi_full_src_register *fsrc; + + fsrc = &finst->Src[i]; + + switch (fsrc->Register.File) { + case TGSI_FILE_INPUT: + case TGSI_FILE_CONSTANT: + case TGSI_FILE_TEMPORARY: + if (!src_native_swz(nvfx, vpc, fsrc, &src[i])) + continue; + break; + default: + break; + } + + switch (fsrc->Register.File) { + case TGSI_FILE_INPUT: + if (ai == -1 || ai == fsrc->Register.Index) { + ai = fsrc->Register.Index; + src[i] = tgsi_src(vpc, fsrc); + } else { + src[i] = temp(vpc); + arith(vpc, VEC, MOV, src[i], MASK_ALL, + tgsi_src(vpc, fsrc), none, none); + } + break; + case TGSI_FILE_CONSTANT: + if ((ci == -1 && ii == -1) || + ci == fsrc->Register.Index) { + ci = fsrc->Register.Index; + src[i] = tgsi_src(vpc, fsrc); + } else { + src[i] = temp(vpc); + arith(vpc, VEC, MOV, src[i], MASK_ALL, + tgsi_src(vpc, fsrc), none, none); + } + break; + case TGSI_FILE_IMMEDIATE: + if ((ci == -1 && ii == -1) || + ii == fsrc->Register.Index) { + ii = fsrc->Register.Index; + src[i] = tgsi_src(vpc, fsrc); + } else { + src[i] = temp(vpc); + arith(vpc, VEC, MOV, src[i], MASK_ALL, + tgsi_src(vpc, fsrc), none, none); + } + break; + case TGSI_FILE_TEMPORARY: + /* handled above */ + break; + default: + NOUVEAU_ERR("bad src file\n"); + return FALSE; + } + } + + dst = tgsi_dst(vpc, &finst->Dst[0]); + mask = tgsi_mask(finst->Dst[0].Register.WriteMask); + + switch (finst->Instruction.Opcode) { + case TGSI_OPCODE_ABS: + arith(vpc, VEC, MOV, dst, mask, abs(src[0]), none, none); + break; + case TGSI_OPCODE_ADD: + arith(vpc, VEC, ADD, dst, mask, src[0], none, src[1]); + break; + case TGSI_OPCODE_ARL: + arith(vpc, VEC, ARL, dst, mask, src[0], none, none); + break; + case TGSI_OPCODE_DP3: + arith(vpc, VEC, DP3, dst, mask, src[0], src[1], none); + break; + case TGSI_OPCODE_DP4: + arith(vpc, VEC, DP4, dst, mask, src[0], src[1], none); + break; + case TGSI_OPCODE_DPH: + arith(vpc, VEC, DPH, dst, mask, src[0], src[1], none); + break; + case TGSI_OPCODE_DST: + arith(vpc, VEC, DST, dst, mask, src[0], src[1], none); + break; + case TGSI_OPCODE_EX2: + arith(vpc, SCA, EX2, dst, mask, none, none, src[0]); + break; + case TGSI_OPCODE_EXP: + arith(vpc, SCA, EXP, dst, mask, none, none, src[0]); + break; + case TGSI_OPCODE_FLR: + arith(vpc, VEC, FLR, dst, mask, src[0], none, none); + break; + case TGSI_OPCODE_FRC: + arith(vpc, VEC, FRC, dst, mask, src[0], none, none); + break; + case TGSI_OPCODE_LG2: + arith(vpc, SCA, LG2, dst, mask, none, none, src[0]); + break; + case TGSI_OPCODE_LIT: + arith(vpc, SCA, LIT, dst, mask, none, none, src[0]); + break; + case TGSI_OPCODE_LOG: + arith(vpc, SCA, LOG, dst, mask, none, none, src[0]); + break; + case TGSI_OPCODE_MAD: + arith(vpc, VEC, MAD, dst, mask, src[0], src[1], src[2]); + break; + case TGSI_OPCODE_MAX: + arith(vpc, VEC, MAX, dst, mask, src[0], src[1], none); + break; + case TGSI_OPCODE_MIN: + arith(vpc, VEC, MIN, dst, mask, src[0], src[1], none); + break; + case TGSI_OPCODE_MOV: + arith(vpc, VEC, MOV, dst, mask, src[0], none, none); + break; + case TGSI_OPCODE_MUL: + arith(vpc, VEC, MUL, dst, mask, src[0], src[1], none); + break; + case TGSI_OPCODE_POW: + tmp = temp(vpc); + arith(vpc, SCA, LG2, tmp, MASK_X, none, none, + swz(src[0], X, X, X, X)); + arith(vpc, VEC, MUL, tmp, MASK_X, swz(tmp, X, X, X, X), + swz(src[1], X, X, X, X), none); + arith(vpc, SCA, EX2, dst, mask, none, none, + swz(tmp, X, X, X, X)); + break; + case TGSI_OPCODE_RCP: + arith(vpc, SCA, RCP, dst, mask, none, none, src[0]); + break; + case TGSI_OPCODE_RET: + break; + case TGSI_OPCODE_RSQ: + arith(vpc, SCA, RSQ, dst, mask, none, none, abs(src[0])); + break; + case TGSI_OPCODE_SGE: + arith(vpc, VEC, SGE, dst, mask, src[0], src[1], none); + break; + case TGSI_OPCODE_SGT: + arith(vpc, VEC, SGT, dst, mask, src[0], src[1], none); + break; + case TGSI_OPCODE_SLT: + arith(vpc, VEC, SLT, dst, mask, src[0], src[1], none); + break; + case TGSI_OPCODE_SUB: + arith(vpc, VEC, ADD, dst, mask, src[0], none, neg(src[1])); + break; + case TGSI_OPCODE_XPD: + tmp = temp(vpc); + arith(vpc, VEC, MUL, tmp, mask, + swz(src[0], Z, X, Y, Y), swz(src[1], Y, Z, X, X), none); + arith(vpc, VEC, MAD, dst, (mask & ~MASK_W), + swz(src[0], Y, Z, X, X), swz(src[1], Z, X, Y, Y), + neg(tmp)); + break; + default: + NOUVEAU_ERR("invalid opcode %d\n", finst->Instruction.Opcode); + return FALSE; + } + + release_temps(vpc); + return TRUE; +} + +static boolean +nvfx_vertprog_parse_decl_output(struct nvfx_context* nvfx, struct nvfx_vpc *vpc, + const struct tgsi_full_declaration *fdec) +{ + unsigned idx = fdec->Range.First; + int hw; + + switch (fdec->Semantic.Name) { + case TGSI_SEMANTIC_POSITION: + hw = NVFX_VP(INST_DEST_POS); + vpc->hpos_idx = idx; + break; + case TGSI_SEMANTIC_COLOR: + if (fdec->Semantic.Index == 0) { + hw = NVFX_VP(INST_DEST_COL0); + } else + if (fdec->Semantic.Index == 1) { + hw = NVFX_VP(INST_DEST_COL1); + } else { + NOUVEAU_ERR("bad colour semantic index\n"); + return FALSE; + } + break; + case TGSI_SEMANTIC_BCOLOR: + if (fdec->Semantic.Index == 0) { + hw = NVFX_VP(INST_DEST_BFC0); + } else + if (fdec->Semantic.Index == 1) { + hw = NVFX_VP(INST_DEST_BFC1); + } else { + NOUVEAU_ERR("bad bcolour semantic index\n"); + return FALSE; + } + break; + case TGSI_SEMANTIC_FOG: + hw = NVFX_VP(INST_DEST_FOGC); + break; + case TGSI_SEMANTIC_PSIZE: + hw = NVFX_VP(INST_DEST_PSZ); + break; + case TGSI_SEMANTIC_GENERIC: + if (fdec->Semantic.Index <= 7) { + hw = NVFX_VP(INST_DEST_TC(fdec->Semantic.Index)); + } else { + NOUVEAU_ERR("bad generic semantic index\n"); + return FALSE; + } + break; + case TGSI_SEMANTIC_EDGEFLAG: + /* not really an error just a fallback */ + NOUVEAU_ERR("cannot handle edgeflag output\n"); + return FALSE; + default: + NOUVEAU_ERR("bad output semantic\n"); + return FALSE; + } + + vpc->r_result[idx] = nvfx_sr(NVFXSR_OUTPUT, hw); + return TRUE; +} + +static boolean +nvfx_vertprog_prepare(struct nvfx_context* nvfx, struct nvfx_vpc *vpc) +{ + struct tgsi_parse_context p; + int high_temp = -1, high_addr = -1, nr_imm = 0, i; + + tgsi_parse_init(&p, vpc->vp->pipe.tokens); + while (!tgsi_parse_end_of_tokens(&p)) { + const union tgsi_full_token *tok = &p.FullToken; + + tgsi_parse_token(&p); + switch(tok->Token.Type) { + case TGSI_TOKEN_TYPE_IMMEDIATE: + nr_imm++; + break; + case TGSI_TOKEN_TYPE_DECLARATION: + { + const struct tgsi_full_declaration *fdec; + + fdec = &p.FullToken.FullDeclaration; + switch (fdec->Declaration.File) { + case TGSI_FILE_TEMPORARY: + if (fdec->Range.Last > high_temp) { + high_temp = + fdec->Range.Last; + } + break; +#if 0 /* this would be nice.. except gallium doesn't track it */ + case TGSI_FILE_ADDRESS: + if (fdec->Range.Last > high_addr) { + high_addr = + fdec->Range.Last; + } + break; +#endif + case TGSI_FILE_OUTPUT: + if (!nvfx_vertprog_parse_decl_output(nvfx, vpc, fdec)) + return FALSE; + break; + default: + break; + } + } + break; +#if 1 /* yay, parse instructions looking for address regs instead */ + case TGSI_TOKEN_TYPE_INSTRUCTION: + { + const struct tgsi_full_instruction *finst; + const struct tgsi_full_dst_register *fdst; + + finst = &p.FullToken.FullInstruction; + fdst = &finst->Dst[0]; + + if (fdst->Register.File == TGSI_FILE_ADDRESS) { + if (fdst->Register.Index > high_addr) + high_addr = fdst->Register.Index; + } + + } + break; +#endif + default: + break; + } + } + tgsi_parse_free(&p); + + if (nr_imm) { + vpc->imm = CALLOC(nr_imm, sizeof(struct nvfx_sreg)); + assert(vpc->imm); + } + + if (++high_temp) { + vpc->r_temp = CALLOC(high_temp, sizeof(struct nvfx_sreg)); + for (i = 0; i < high_temp; i++) + vpc->r_temp[i] = temp(vpc); + } + + if (++high_addr) { + vpc->r_address = CALLOC(high_addr, sizeof(struct nvfx_sreg)); + for (i = 0; i < high_addr; i++) + vpc->r_address[i] = temp(vpc); + } + + vpc->r_temps_discard = 0; + return TRUE; +} + +static void +nvfx_vertprog_translate(struct nvfx_context *nvfx, + struct nvfx_vertex_program *vp) +{ + struct tgsi_parse_context parse; + struct nvfx_vpc *vpc = NULL; + struct nvfx_sreg none = nvfx_sr(NVFXSR_NONE, 0); + int i; + + vpc = CALLOC(1, sizeof(struct nvfx_vpc)); + if (!vpc) + return; + vpc->vp = vp; + + if (!nvfx_vertprog_prepare(nvfx, vpc)) { + FREE(vpc); + return; + } + + /* Redirect post-transform vertex position to a temp if user clip + * planes are enabled. We need to append code to the vtxprog + * to handle clip planes later. + */ + if (vp->ucp.nr) { + vpc->r_result[vpc->hpos_idx] = temp(vpc); + vpc->r_temps_discard = 0; + } + + tgsi_parse_init(&parse, vp->pipe.tokens); + + while (!tgsi_parse_end_of_tokens(&parse)) { + tgsi_parse_token(&parse); + + switch (parse.FullToken.Token.Type) { + case TGSI_TOKEN_TYPE_IMMEDIATE: + { + const struct tgsi_full_immediate *imm; + + imm = &parse.FullToken.FullImmediate; + assert(imm->Immediate.DataType == TGSI_IMM_FLOAT32); + assert(imm->Immediate.NrTokens == 4 + 1); + vpc->imm[vpc->nr_imm++] = + constant(vpc, -1, + imm->u[0].Float, + imm->u[1].Float, + imm->u[2].Float, + imm->u[3].Float); + } + break; + case TGSI_TOKEN_TYPE_INSTRUCTION: + { + const struct tgsi_full_instruction *finst; + finst = &parse.FullToken.FullInstruction; + if (!nvfx_vertprog_parse_instruction(nvfx, vpc, finst)) + goto out_err; + } + break; + default: + break; + } + } + + /* Write out HPOS if it was redirected to a temp earlier */ + if (vpc->r_result[vpc->hpos_idx].type != NVFXSR_OUTPUT) { + struct nvfx_sreg hpos = nvfx_sr(NVFXSR_OUTPUT, + NVFX_VP(INST_DEST_POS)); + struct nvfx_sreg htmp = vpc->r_result[vpc->hpos_idx]; + + arith(vpc, VEC, MOV, hpos, MASK_ALL, htmp, none, none); + } + + /* Insert code to handle user clip planes */ + for (i = 0; i < vp->ucp.nr; i++) { + struct nvfx_sreg cdst = nvfx_sr(NVFXSR_OUTPUT, + NVFX_VP_INST_DEST_CLIP(i)); + struct nvfx_sreg ceqn = constant(vpc, -1, + nvfx->clip.ucp[i][0], + nvfx->clip.ucp[i][1], + nvfx->clip.ucp[i][2], + nvfx->clip.ucp[i][3]); + struct nvfx_sreg htmp = vpc->r_result[vpc->hpos_idx]; + unsigned mask; + + switch (i) { + case 0: case 3: mask = MASK_Y; break; + case 1: case 4: mask = MASK_Z; break; + case 2: case 5: mask = MASK_W; break; + default: + NOUVEAU_ERR("invalid clip dist #%d\n", i); + goto out_err; + } + + arith(vpc, VEC, DP4, cdst, mask, htmp, ceqn, none); + } + + vp->insns[vp->nr_insns - 1].data[3] |= NVFX_VP_INST_LAST; + vp->translated = TRUE; +out_err: + tgsi_parse_free(&parse); + if (vpc->r_temp) + FREE(vpc->r_temp); + if (vpc->r_address) + FREE(vpc->r_address); + if (vpc->imm) + FREE(vpc->imm); + FREE(vpc); +} + +static boolean +nvfx_vertprog_validate(struct nvfx_context *nvfx) +{ + struct pipe_screen *pscreen = nvfx->pipe.screen; + struct nvfx_screen *screen = nvfx->screen; + struct nouveau_channel *chan = screen->base.channel; + struct nouveau_grobj *eng3d = screen->eng3d; + struct nvfx_vertex_program *vp; + struct pipe_buffer *constbuf; + boolean upload_code = FALSE, upload_data = FALSE; + int i; + + if (nvfx->render_mode == HW) { + vp = nvfx->vertprog; + constbuf = nvfx->constbuf[PIPE_SHADER_VERTEX]; + + if ((nvfx->dirty & NVFX_NEW_UCP) || + memcmp(&nvfx->clip, &vp->ucp, sizeof(vp->ucp))) { + nvfx_vertprog_destroy(nvfx, vp); + memcpy(&vp->ucp, &nvfx->clip, sizeof(vp->ucp)); + } + } else { + vp = nvfx->swtnl.vertprog; + constbuf = NULL; + } + + /* Translate TGSI shader into hw bytecode */ + if (vp->translated) + goto check_gpu_resources; + + nvfx->fallback_swtnl &= ~NVFX_NEW_VERTPROG; + nvfx_vertprog_translate(nvfx, vp); + if (!vp->translated) { + nvfx->fallback_swtnl |= NVFX_NEW_VERTPROG; + return FALSE; + } + +check_gpu_resources: + /* Allocate hw vtxprog exec slots */ + if (!vp->exec) { + struct nouveau_resource *heap = nvfx->screen->vp_exec_heap; + struct nouveau_stateobj *so; + uint vplen = vp->nr_insns; + + if (nouveau_resource_alloc(heap, vplen, vp, &vp->exec)) { + while (heap->next && heap->size < vplen) { + struct nvfx_vertex_program *evict; + + evict = heap->next->priv; + nouveau_resource_free(&evict->exec); + } + + if (nouveau_resource_alloc(heap, vplen, vp, &vp->exec)) + assert(0); + } + + so = so_new(3, 4, 0); + so_method(so, eng3d, NV34TCL_VP_START_FROM_ID, 1); + so_data (so, vp->exec->start); + if(nvfx->is_nv4x) { + so_method(so, eng3d, NV40TCL_VP_ATTRIB_EN, 2); + so_data (so, vp->ir); + so_data (so, vp->or); + } + so_method(so, eng3d, NV34TCL_VP_CLIP_PLANES_ENABLE, 1); + so_data (so, vp->clip_ctrl); + so_ref(so, &vp->so); + so_ref(NULL, &so); + + upload_code = TRUE; + } + + /* Allocate hw vtxprog const slots */ + if (vp->nr_consts && !vp->data) { + struct nouveau_resource *heap = nvfx->screen->vp_data_heap; + + if (nouveau_resource_alloc(heap, vp->nr_consts, vp, &vp->data)) { + while (heap->next && heap->size < vp->nr_consts) { + struct nvfx_vertex_program *evict; + + evict = heap->next->priv; + nouveau_resource_free(&evict->data); + } + + if (nouveau_resource_alloc(heap, vp->nr_consts, vp, &vp->data)) + assert(0); + } + + /*XXX: handle this some day */ + assert(vp->data->start >= vp->data_start_min); + + upload_data = TRUE; + if (vp->data_start != vp->data->start) + upload_code = TRUE; + } + + /* If exec or data segments moved we need to patch the program to + * fixup offsets and register IDs. + */ + if (vp->exec_start != vp->exec->start) { + for (i = 0; i < vp->nr_insns; i++) { + struct nvfx_vertex_program_exec *vpi = &vp->insns[i]; + + if (vpi->has_branch_offset) { + assert(0); + } + } + + vp->exec_start = vp->exec->start; + } + + if (vp->nr_consts && vp->data_start != vp->data->start) { + for (i = 0; i < vp->nr_insns; i++) { + struct nvfx_vertex_program_exec *vpi = &vp->insns[i]; + + if (vpi->const_index >= 0) { + vpi->data[1] &= ~NVFX_VP(INST_CONST_SRC_MASK); + vpi->data[1] |= + (vpi->const_index + vp->data->start) << + NVFX_VP(INST_CONST_SRC_SHIFT); + + } + } + + vp->data_start = vp->data->start; + } + + /* Update + Upload constant values */ + if (vp->nr_consts) { + float *map = NULL; + + if (constbuf) { + map = pipe_buffer_map(pscreen, constbuf, + PIPE_BUFFER_USAGE_CPU_READ); + } + + for (i = 0; i < vp->nr_consts; i++) { + struct nvfx_vertex_program_data *vpd = &vp->consts[i]; + + if (vpd->index >= 0) { + if (!upload_data && + !memcmp(vpd->value, &map[vpd->index * 4], + 4 * sizeof(float))) + continue; + memcpy(vpd->value, &map[vpd->index * 4], + 4 * sizeof(float)); + } + + BEGIN_RING(chan, eng3d, NV34TCL_VP_UPLOAD_CONST_ID, 5); + OUT_RING (chan, i + vp->data->start); + OUT_RINGp (chan, (uint32_t *)vpd->value, 4); + } + + if (constbuf) + pipe_buffer_unmap(pscreen, constbuf); + } + + /* Upload vtxprog */ + if (upload_code) { +#if 0 + for (i = 0; i < vp->nr_insns; i++) { + NOUVEAU_MSG("VP %d: 0x%08x\n", i, vp->insns[i].data[0]); + NOUVEAU_MSG("VP %d: 0x%08x\n", i, vp->insns[i].data[1]); + NOUVEAU_MSG("VP %d: 0x%08x\n", i, vp->insns[i].data[2]); + NOUVEAU_MSG("VP %d: 0x%08x\n", i, vp->insns[i].data[3]); + } +#endif + BEGIN_RING(chan, eng3d, NV34TCL_VP_UPLOAD_FROM_ID, 1); + OUT_RING (chan, vp->exec->start); + for (i = 0; i < vp->nr_insns; i++) { + BEGIN_RING(chan, eng3d, NV34TCL_VP_UPLOAD_INST(0), 4); + OUT_RINGp (chan, vp->insns[i].data, 4); + } + } + + if (vp->so != nvfx->state.hw[NVFX_STATE_VERTPROG]) { + so_ref(vp->so, &nvfx->state.hw[NVFX_STATE_VERTPROG]); + return TRUE; + } + + return FALSE; +} + +void +nvfx_vertprog_destroy(struct nvfx_context *nvfx, struct nvfx_vertex_program *vp) +{ + vp->translated = FALSE; + + if (vp->nr_insns) { + FREE(vp->insns); + vp->insns = NULL; + vp->nr_insns = 0; + } + + if (vp->nr_consts) { + FREE(vp->consts); + vp->consts = NULL; + vp->nr_consts = 0; + } + + nouveau_resource_free(&vp->exec); + vp->exec_start = 0; + nouveau_resource_free(&vp->data); + vp->data_start = 0; + vp->data_start_min = 0; + + vp->ir = vp->or = vp->clip_ctrl = 0; + so_ref(NULL, &vp->so); +} + +struct nvfx_state_entry nvfx_state_vertprog = { + .validate = nvfx_vertprog_validate, + .dirty = { + .pipe = NVFX_NEW_VERTPROG | NVFX_NEW_UCP, + .hw = NVFX_STATE_VERTPROG, + } +}; -- cgit v1.2.3 From 10f464fc1073e8f3b53dbcf2209a2204f4924094 Mon Sep 17 00:00:00 2001 From: Luca Barbieri Date: Sun, 21 Feb 2010 14:31:27 +0100 Subject: nv30, nv40: non-trivially unify nv[34]0_screen.c The files have the same structure but are substantially different. They are unified with appropriate conditionals. --- src/gallium/drivers/nouveau/nouveau_winsys.h | 5 +- src/gallium/drivers/nv30/Makefile | 1 - src/gallium/drivers/nv30/nv30_screen.c | 361 ----------------- src/gallium/drivers/nv40/Makefile | 1 - src/gallium/drivers/nv40/nv40_screen.c | 322 --------------- src/gallium/drivers/nvfx/Makefile | 1 + src/gallium/drivers/nvfx/nvfx_screen.c | 436 +++++++++++++++++++++ .../winsys/drm/nouveau/drm/nouveau_drm_api.c | 4 +- 8 files changed, 439 insertions(+), 692 deletions(-) delete mode 100644 src/gallium/drivers/nv30/nv30_screen.c delete mode 100644 src/gallium/drivers/nv40/nv40_screen.c create mode 100644 src/gallium/drivers/nvfx/nvfx_screen.c (limited to 'src') diff --git a/src/gallium/drivers/nouveau/nouveau_winsys.h b/src/gallium/drivers/nouveau/nouveau_winsys.h index af9ddd558c..bed014b9ce 100644 --- a/src/gallium/drivers/nouveau/nouveau_winsys.h +++ b/src/gallium/drivers/nouveau/nouveau_winsys.h @@ -27,10 +27,7 @@ #define NOUVEAU_BUFFER_USAGE_NO_RENDER (1 << 19) extern struct pipe_screen * -nv30_screen_create(struct pipe_winsys *ws, struct nouveau_device *); - -extern struct pipe_screen * -nv40_screen_create(struct pipe_winsys *ws, struct nouveau_device *); +nvfx_screen_create(struct pipe_winsys *ws, struct nouveau_device *); extern struct pipe_screen * nv50_screen_create(struct pipe_winsys *ws, struct nouveau_device *); diff --git a/src/gallium/drivers/nv30/Makefile b/src/gallium/drivers/nv30/Makefile index b71afbbb9a..ef3ce7eafa 100644 --- a/src/gallium/drivers/nv30/Makefile +++ b/src/gallium/drivers/nv30/Makefile @@ -6,7 +6,6 @@ LIBNAME = nv30 C_SOURCES = \ nv30_context.c \ nv30_fragtex.c \ - nv30_screen.c \ nv30_state.c LIBRARY_INCLUDES = -I$(TOP)/src/gallium/drivers/nvfx diff --git a/src/gallium/drivers/nv30/nv30_screen.c b/src/gallium/drivers/nv30/nv30_screen.c deleted file mode 100644 index 3a48255c18..0000000000 --- a/src/gallium/drivers/nv30/nv30_screen.c +++ /dev/null @@ -1,361 +0,0 @@ -#include "pipe/p_screen.h" -#include "pipe/p_state.h" - -#include "nouveau/nouveau_screen.h" - -#include "nv30_context.h" -#include "nvfx_screen.h" - -#define NV30TCL_CHIPSET_3X_MASK 0x00000003 -#define NV34TCL_CHIPSET_3X_MASK 0x00000010 -#define NV35TCL_CHIPSET_3X_MASK 0x000001e0 - -/* FIXME: It seems I should not include directly ../../winsys/drm/nouveau/drm/nouveau_drm_api.h - * to get the pointer to the context front buffer, so I copied nouveau_winsys here. - * nv30_screen_surface_format_supported() can then use it to enforce creating fbo - * with same number of bits everywhere. - */ -struct nouveau_winsys { - struct pipe_winsys base; - - struct pipe_screen *pscreen; - - struct pipe_surface *front; -}; - -static int -nv30_screen_get_param(struct pipe_screen *pscreen, int param) -{ - switch (param) { - case PIPE_CAP_MAX_TEXTURE_IMAGE_UNITS: - return 8; - case PIPE_CAP_NPOT_TEXTURES: - return 0; - case PIPE_CAP_TWO_SIDED_STENCIL: - return 1; - case PIPE_CAP_GLSL: - return 0; - case PIPE_CAP_ANISOTROPIC_FILTER: - return 1; - case PIPE_CAP_POINT_SPRITE: - return 1; - case PIPE_CAP_MAX_RENDER_TARGETS: - return 2; - case PIPE_CAP_OCCLUSION_QUERY: - return 1; - case PIPE_CAP_TEXTURE_SHADOW_MAP: - return 1; - case PIPE_CAP_MAX_TEXTURE_2D_LEVELS: - return 13; - case PIPE_CAP_MAX_TEXTURE_3D_LEVELS: - return 10; - case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS: - return 13; - case PIPE_CAP_TEXTURE_MIRROR_CLAMP: - return 0; - case PIPE_CAP_TEXTURE_MIRROR_REPEAT: - return 1; - case PIPE_CAP_MAX_VERTEX_TEXTURE_UNITS: - return 0; - case PIPE_CAP_TGSI_CONT_SUPPORTED: - return 0; - case PIPE_CAP_BLEND_EQUATION_SEPARATE: - return 0; - case NOUVEAU_CAP_HW_VTXBUF: - case NOUVEAU_CAP_HW_IDXBUF: - return 1; - case PIPE_CAP_MAX_COMBINED_SAMPLERS: - return 16; - case PIPE_CAP_INDEP_BLEND_ENABLE: - return 0; - case PIPE_CAP_INDEP_BLEND_FUNC: - return 0; - case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT: - case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER: - return 1; - case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT: - case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER: - return 0; - default: - NOUVEAU_ERR("Unknown PIPE_CAP %d\n", param); - return 0; - } -} - -static float -nv30_screen_get_paramf(struct pipe_screen *pscreen, int param) -{ - switch (param) { - case PIPE_CAP_MAX_LINE_WIDTH: - case PIPE_CAP_MAX_LINE_WIDTH_AA: - return 10.0; - case PIPE_CAP_MAX_POINT_WIDTH: - case PIPE_CAP_MAX_POINT_WIDTH_AA: - return 64.0; - case PIPE_CAP_MAX_TEXTURE_ANISOTROPY: - return 8.0; - case PIPE_CAP_MAX_TEXTURE_LOD_BIAS: - return 4.0; - default: - NOUVEAU_ERR("Unknown PIPE_CAP %d\n", param); - return 0.0; - } -} - -static boolean -nv30_screen_surface_format_supported(struct pipe_screen *pscreen, - enum pipe_format format, - enum pipe_texture_target target, - unsigned tex_usage, unsigned geom_flags) -{ - struct pipe_surface *front = ((struct nouveau_winsys *) pscreen->winsys)->front; - - if (tex_usage & PIPE_TEXTURE_USAGE_RENDER_TARGET) { - switch (format) { - case PIPE_FORMAT_B8G8R8A8_UNORM: - case PIPE_FORMAT_B5G6R5_UNORM: - return TRUE; - default: - break; - } - } else - if (tex_usage & PIPE_TEXTURE_USAGE_DEPTH_STENCIL) { - switch (format) { - case PIPE_FORMAT_S8Z24_UNORM: - case PIPE_FORMAT_X8Z24_UNORM: - return TRUE; - case PIPE_FORMAT_Z16_UNORM: - if (front) { - return (front->format == PIPE_FORMAT_B5G6R5_UNORM); - } - return TRUE; - default: - break; - } - } else { - switch (format) { - case PIPE_FORMAT_B8G8R8A8_UNORM: - case PIPE_FORMAT_B5G5R5A1_UNORM: - case PIPE_FORMAT_B4G4R4A4_UNORM: - case PIPE_FORMAT_B5G6R5_UNORM: - case PIPE_FORMAT_L8_UNORM: - case PIPE_FORMAT_A8_UNORM: - case PIPE_FORMAT_I8_UNORM: - case PIPE_FORMAT_L8A8_UNORM: - case PIPE_FORMAT_Z16_UNORM: - case PIPE_FORMAT_S8Z24_UNORM: - return TRUE; - default: - break; - } - } - - return FALSE; -} - -static struct pipe_buffer * -nv30_surface_buffer(struct pipe_surface *surf) -{ - struct nvfx_miptree *mt = (struct nvfx_miptree *)surf->texture; - - return mt->buffer; -} - -static void -nv30_screen_destroy(struct pipe_screen *pscreen) -{ - struct nvfx_screen *screen = nvfx_screen(pscreen); - unsigned i; - - for (i = 0; i < NVFX_STATE_MAX; i++) { - if (screen->state[i]) - so_ref(NULL, &screen->state[i]); - } - - nouveau_resource_destroy(&screen->vp_exec_heap); - nouveau_resource_destroy(&screen->vp_data_heap); - nouveau_resource_destroy(&screen->query_heap); - nouveau_notifier_free(&screen->query); - nouveau_notifier_free(&screen->sync); - nouveau_grobj_free(&screen->eng3d); - nv04_surface_2d_takedown(&screen->eng2d); - - nouveau_screen_fini(&screen->base); - - FREE(pscreen); -} - -struct pipe_screen * -nv30_screen_create(struct pipe_winsys *ws, struct nouveau_device *dev) -{ - struct nvfx_screen *screen = CALLOC_STRUCT(nvfx_screen); - struct nouveau_channel *chan; - struct pipe_screen *pscreen; - struct nouveau_stateobj *so; - unsigned eng3d_class = 0; - int ret, i; - - if (!screen) - return NULL; - pscreen = &screen->base.base; - - ret = nouveau_screen_init(&screen->base, dev); - if (ret) { - nv30_screen_destroy(pscreen); - return NULL; - } - chan = screen->base.channel; - - pscreen->winsys = ws; - pscreen->destroy = nv30_screen_destroy; - pscreen->get_param = nv30_screen_get_param; - pscreen->get_paramf = nv30_screen_get_paramf; - pscreen->is_format_supported = nv30_screen_surface_format_supported; - pscreen->context_create = nv30_create; - - nvfx_screen_init_miptree_functions(pscreen); - - /* 3D object */ - switch (dev->chipset & 0xf0) { - case 0x30: - if (NV30TCL_CHIPSET_3X_MASK & (1 << (dev->chipset & 0x0f))) - eng3d_class = 0x0397; - else - if (NV34TCL_CHIPSET_3X_MASK & (1 << (dev->chipset & 0x0f))) - eng3d_class = 0x0697; - else - if (NV35TCL_CHIPSET_3X_MASK & (1 << (dev->chipset & 0x0f))) - eng3d_class = 0x0497; - break; - default: - break; - } - - if (!eng3d_class) { - NOUVEAU_ERR("Unknown nv3x chipset: nv%02x\n", dev->chipset); - return NULL; - } - - ret = nouveau_grobj_alloc(chan, 0xbeef3097, eng3d_class, - &screen->eng3d); - if (ret) { - NOUVEAU_ERR("Error creating 3D object: %d\n", ret); - return FALSE; - } - - /* 2D engine setup */ - screen->eng2d = nv04_surface_2d_init(&screen->base); - screen->eng2d->buf = nv30_surface_buffer; - - /* Notifier for sync purposes */ - ret = nouveau_notifier_alloc(chan, 0xbeef0301, 1, &screen->sync); - if (ret) { - NOUVEAU_ERR("Error creating notifier object: %d\n", ret); - nv30_screen_destroy(pscreen); - return NULL; - } - - /* Query objects */ - ret = nouveau_notifier_alloc(chan, 0xbeef0302, 32, &screen->query); - if (ret) { - NOUVEAU_ERR("Error initialising query objects: %d\n", ret); - nv30_screen_destroy(pscreen); - return NULL; - } - - ret = nouveau_resource_init(&screen->query_heap, 0, 32); - if (ret) { - NOUVEAU_ERR("Error initialising query object heap: %d\n", ret); - nv30_screen_destroy(pscreen); - return NULL; - } - - /* Vtxprog resources */ - if (nouveau_resource_init(&screen->vp_exec_heap, 0, 256) || - nouveau_resource_init(&screen->vp_data_heap, 0, 256)) { - nv30_screen_destroy(pscreen); - return NULL; - } - - /* Static eng3d initialisation */ - so = so_new(36, 60, 0); - so_method(so, screen->eng3d, NV34TCL_DMA_NOTIFY, 1); - so_data (so, screen->sync->handle); - so_method(so, screen->eng3d, NV34TCL_DMA_TEXTURE0, 2); - so_data (so, chan->vram->handle); - so_data (so, chan->gart->handle); - so_method(so, screen->eng3d, NV34TCL_DMA_COLOR1, 1); - so_data (so, chan->vram->handle); - so_method(so, screen->eng3d, NV34TCL_DMA_COLOR0, 2); - so_data (so, chan->vram->handle); - so_data (so, chan->vram->handle); - so_method(so, screen->eng3d, NV34TCL_DMA_VTXBUF0, 2); - so_data (so, chan->vram->handle); - so_data (so, chan->gart->handle); -/* so_method(so, screen->eng3d, NV34TCL_DMA_FENCE, 2); - so_data (so, 0); - so_data (so, screen->query->handle);*/ - so_method(so, screen->eng3d, NV34TCL_DMA_IN_MEMORY7, 1); - so_data (so, chan->vram->handle); - so_method(so, screen->eng3d, NV34TCL_DMA_IN_MEMORY8, 1); - so_data (so, chan->vram->handle); - - for (i=1; i<8; i++) { - so_method(so, screen->eng3d, NV34TCL_VIEWPORT_CLIP_HORIZ(i), 1); - so_data (so, 0); - so_method(so, screen->eng3d, NV34TCL_VIEWPORT_CLIP_VERT(i), 1); - so_data (so, 0); - } - - so_method(so, screen->eng3d, 0x220, 1); - so_data (so, 1); - - so_method(so, screen->eng3d, 0x03b0, 1); - so_data (so, 0x00100000); - so_method(so, screen->eng3d, 0x1454, 1); - so_data (so, 0); - so_method(so, screen->eng3d, 0x1d80, 1); - so_data (so, 3); - so_method(so, screen->eng3d, 0x1450, 1); - so_data (so, 0x00030004); - - /* NEW */ - so_method(so, screen->eng3d, 0x1e98, 1); - so_data (so, 0); - so_method(so, screen->eng3d, 0x17e0, 3); - so_data (so, fui(0.0)); - so_data (so, fui(0.0)); - so_data (so, fui(1.0)); - so_method(so, screen->eng3d, 0x1f80, 16); - for (i=0; i<16; i++) { - so_data (so, (i==8) ? 0x0000ffff : 0); - } - - so_method(so, screen->eng3d, 0x120, 3); - so_data (so, 0); - so_data (so, 1); - so_data (so, 2); - - so_method(so, screen->eng3d, 0x1d88, 1); - so_data (so, 0x00001200); - - so_method(so, screen->eng3d, NV34TCL_RC_ENABLE, 1); - so_data (so, 0); - - so_method(so, screen->eng3d, NV34TCL_DEPTH_RANGE_NEAR, 2); - so_data (so, fui(0.0)); - so_data (so, fui(1.0)); - - so_method(so, screen->eng3d, NV34TCL_MULTISAMPLE_CONTROL, 1); - so_data (so, 0xffff0000); - - /* enables use of vp rather than fixed-function somehow */ - so_method(so, screen->eng3d, 0x1e94, 1); - so_data (so, 0x13); - - so_emit(chan, so); - so_ref(NULL, &so); - nouveau_pushbuf_flush(chan, 0); - - return pscreen; -} diff --git a/src/gallium/drivers/nv40/Makefile b/src/gallium/drivers/nv40/Makefile index c8f3858c36..a37446d50c 100644 --- a/src/gallium/drivers/nv40/Makefile +++ b/src/gallium/drivers/nv40/Makefile @@ -6,7 +6,6 @@ LIBNAME = nv40 C_SOURCES = \ nv40_context.c \ nv40_fragtex.c \ - nv40_screen.c \ nv40_state.c LIBRARY_INCLUDES = -I$(TOP)/src/gallium/drivers/nvfx diff --git a/src/gallium/drivers/nv40/nv40_screen.c b/src/gallium/drivers/nv40/nv40_screen.c deleted file mode 100644 index 0603b7d1c1..0000000000 --- a/src/gallium/drivers/nv40/nv40_screen.c +++ /dev/null @@ -1,322 +0,0 @@ -#include "pipe/p_screen.h" - -#include "nv40_context.h" -#include "nvfx_screen.h" - -#define NV4X_GRCLASS4097_CHIPSETS 0x00000baf -#define NV4X_GRCLASS4497_CHIPSETS 0x00005450 -#define NV6X_GRCLASS4497_CHIPSETS 0x00000088 - -static int -nv40_screen_get_param(struct pipe_screen *pscreen, int param) -{ - struct nvfx_screen *screen = nvfx_screen(pscreen); - - switch (param) { - case PIPE_CAP_MAX_TEXTURE_IMAGE_UNITS: - return 16; - case PIPE_CAP_NPOT_TEXTURES: - return 1; - case PIPE_CAP_TWO_SIDED_STENCIL: - return 1; - case PIPE_CAP_GLSL: - return 0; - case PIPE_CAP_ANISOTROPIC_FILTER: - return 1; - case PIPE_CAP_POINT_SPRITE: - return 1; - case PIPE_CAP_MAX_RENDER_TARGETS: - return 4; - case PIPE_CAP_OCCLUSION_QUERY: - return 1; - case PIPE_CAP_TEXTURE_SHADOW_MAP: - return 1; - case PIPE_CAP_MAX_TEXTURE_2D_LEVELS: - return 13; - case PIPE_CAP_MAX_TEXTURE_3D_LEVELS: - return 10; - case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS: - return 13; - case PIPE_CAP_TEXTURE_MIRROR_CLAMP: - case PIPE_CAP_TEXTURE_MIRROR_REPEAT: - return 1; - case PIPE_CAP_MAX_VERTEX_TEXTURE_UNITS: - return 0; /* We have 4 - but unsupported currently */ - case PIPE_CAP_TGSI_CONT_SUPPORTED: - return 0; - case PIPE_CAP_BLEND_EQUATION_SEPARATE: - return 1; - case NOUVEAU_CAP_HW_VTXBUF: - return 1; - case NOUVEAU_CAP_HW_IDXBUF: - if (screen->eng3d->grclass == NV40TCL) - return 1; - return 0; - case PIPE_CAP_INDEP_BLEND_ENABLE: - return 0; - case PIPE_CAP_INDEP_BLEND_FUNC: - return 0; - case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT: - case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER: - return 1; - case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT: - case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER: - return 0; - case PIPE_CAP_MAX_COMBINED_SAMPLERS: - return 16; - default: - NOUVEAU_ERR("Unknown PIPE_CAP %d\n", param); - return 0; - } -} - -static float -nv40_screen_get_paramf(struct pipe_screen *pscreen, int param) -{ - switch (param) { - case PIPE_CAP_MAX_LINE_WIDTH: - case PIPE_CAP_MAX_LINE_WIDTH_AA: - return 10.0; - case PIPE_CAP_MAX_POINT_WIDTH: - case PIPE_CAP_MAX_POINT_WIDTH_AA: - return 64.0; - case PIPE_CAP_MAX_TEXTURE_ANISOTROPY: - return 16.0; - case PIPE_CAP_MAX_TEXTURE_LOD_BIAS: - return 16.0; - default: - NOUVEAU_ERR("Unknown PIPE_CAP %d\n", param); - return 0.0; - } -} - -static boolean -nv40_screen_surface_format_supported(struct pipe_screen *pscreen, - enum pipe_format format, - enum pipe_texture_target target, - unsigned tex_usage, unsigned geom_flags) -{ - if (tex_usage & PIPE_TEXTURE_USAGE_RENDER_TARGET) { - switch (format) { - case PIPE_FORMAT_B8G8R8A8_UNORM: - case PIPE_FORMAT_B5G6R5_UNORM: - return TRUE; - default: - break; - } - } else - if (tex_usage & PIPE_TEXTURE_USAGE_DEPTH_STENCIL) { - switch (format) { - case PIPE_FORMAT_S8Z24_UNORM: - case PIPE_FORMAT_X8Z24_UNORM: - case PIPE_FORMAT_Z16_UNORM: - return TRUE; - default: - break; - } - } else { - switch (format) { - case PIPE_FORMAT_B8G8R8A8_UNORM: - case PIPE_FORMAT_B5G5R5A1_UNORM: - case PIPE_FORMAT_B4G4R4A4_UNORM: - case PIPE_FORMAT_B5G6R5_UNORM: - case PIPE_FORMAT_R16_SNORM: - case PIPE_FORMAT_L8_UNORM: - case PIPE_FORMAT_A8_UNORM: - case PIPE_FORMAT_I8_UNORM: - case PIPE_FORMAT_L8A8_UNORM: - case PIPE_FORMAT_Z16_UNORM: - case PIPE_FORMAT_S8Z24_UNORM: - case PIPE_FORMAT_DXT1_RGB: - case PIPE_FORMAT_DXT1_RGBA: - case PIPE_FORMAT_DXT3_RGBA: - case PIPE_FORMAT_DXT5_RGBA: - return TRUE; - default: - break; - } - } - - return FALSE; -} - -static struct pipe_buffer * -nv40_surface_buffer(struct pipe_surface *surf) -{ - struct nvfx_miptree *mt = (struct nvfx_miptree *)surf->texture; - - return mt->buffer; -} - -static void -nv40_screen_destroy(struct pipe_screen *pscreen) -{ - struct nvfx_screen *screen = nvfx_screen(pscreen); - unsigned i; - - for (i = 0; i < NVFX_STATE_MAX; i++) { - if (screen->state[i]) - so_ref(NULL, &screen->state[i]); - } - - nouveau_resource_destroy(&screen->vp_exec_heap); - nouveau_resource_destroy(&screen->vp_data_heap); - nouveau_resource_destroy(&screen->query_heap); - nouveau_notifier_free(&screen->query); - nouveau_notifier_free(&screen->sync); - nouveau_grobj_free(&screen->eng3d); - nv04_surface_2d_takedown(&screen->eng2d); - - nouveau_screen_fini(&screen->base); - - FREE(pscreen); -} - -struct pipe_screen * -nv40_screen_create(struct pipe_winsys *ws, struct nouveau_device *dev) -{ - struct nvfx_screen *screen = CALLOC_STRUCT(nvfx_screen); - struct nouveau_channel *chan; - struct pipe_screen *pscreen; - struct nouveau_stateobj *so; - unsigned eng3d_class = 0; - int ret; - - if (!screen) - return NULL; - - screen->is_nv4x = ~0; - - pscreen = &screen->base.base; - - ret = nouveau_screen_init(&screen->base, dev); - if (ret) { - nv40_screen_destroy(pscreen); - return NULL; - } - chan = screen->base.channel; - - pscreen->winsys = ws; - pscreen->destroy = nv40_screen_destroy; - pscreen->get_param = nv40_screen_get_param; - pscreen->get_paramf = nv40_screen_get_paramf; - pscreen->is_format_supported = nv40_screen_surface_format_supported; - pscreen->context_create = nv40_create; - - nvfx_screen_init_miptree_functions(pscreen); - - /* 3D object */ - switch (dev->chipset & 0xf0) { - case 0x40: - if (NV4X_GRCLASS4097_CHIPSETS & (1 << (dev->chipset & 0x0f))) - eng3d_class = NV40TCL; - else - if (NV4X_GRCLASS4497_CHIPSETS & (1 << (dev->chipset & 0x0f))) - eng3d_class = NV44TCL; - break; - case 0x60: - if (NV6X_GRCLASS4497_CHIPSETS & (1 << (dev->chipset & 0x0f))) - eng3d_class = NV44TCL; - break; - } - - if (!eng3d_class) { - NOUVEAU_ERR("Unknown nv4x chipset: nv%02x\n", dev->chipset); - return NULL; - } - - ret = nouveau_grobj_alloc(chan, 0xbeef3097, eng3d_class, &screen->eng3d); - if (ret) { - NOUVEAU_ERR("Error creating 3D object: %d\n", ret); - return FALSE; - } - - /* 2D engine setup */ - screen->eng2d = nv04_surface_2d_init(&screen->base); - screen->eng2d->buf = nv40_surface_buffer; - - /* Notifier for sync purposes */ - ret = nouveau_notifier_alloc(chan, 0xbeef0301, 1, &screen->sync); - if (ret) { - NOUVEAU_ERR("Error creating notifier object: %d\n", ret); - nv40_screen_destroy(pscreen); - return NULL; - } - - /* Query objects */ - ret = nouveau_notifier_alloc(chan, 0xbeef0302, 32, &screen->query); - if (ret) { - NOUVEAU_ERR("Error initialising query objects: %d\n", ret); - nv40_screen_destroy(pscreen); - return NULL; - } - - nouveau_resource_init(&screen->query_heap, 0, 32); - if (ret) { - NOUVEAU_ERR("Error initialising query object heap: %d\n", ret); - nv40_screen_destroy(pscreen); - return NULL; - } - - /* Vtxprog resources */ - if (nouveau_resource_init(&screen->vp_exec_heap, 0, 512) || - nouveau_resource_init(&screen->vp_data_heap, 0, 256)) { - nv40_screen_destroy(pscreen); - return NULL; - } - - /* Static eng3d initialisation */ - so = so_new(16, 25, 0); - so_method(so, screen->eng3d, NV34TCL_DMA_NOTIFY, 1); - so_data (so, screen->sync->handle); - so_method(so, screen->eng3d, NV34TCL_DMA_TEXTURE0, 2); - so_data (so, chan->vram->handle); - so_data (so, chan->gart->handle); - so_method(so, screen->eng3d, NV34TCL_DMA_COLOR1, 1); - so_data (so, chan->vram->handle); - so_method(so, screen->eng3d, NV34TCL_DMA_COLOR0, 2); - so_data (so, chan->vram->handle); - so_data (so, chan->vram->handle); - so_method(so, screen->eng3d, NV34TCL_DMA_VTXBUF0, 2); - so_data (so, chan->vram->handle); - so_data (so, chan->gart->handle); - so_method(so, screen->eng3d, NV34TCL_DMA_FENCE, 2); - so_data (so, 0); - so_data (so, screen->query->handle); - so_method(so, screen->eng3d, NV34TCL_DMA_IN_MEMORY7, 2); - so_data (so, chan->vram->handle); - so_data (so, chan->vram->handle); - so_method(so, screen->eng3d, NV40TCL_DMA_COLOR2, 2); - so_data (so, chan->vram->handle); - so_data (so, chan->vram->handle); - - so_method(so, screen->eng3d, 0x1ea4, 3); - so_data (so, 0x00000010); - so_data (so, 0x01000100); - so_data (so, 0xff800006); - - /* vtxprog output routing */ - so_method(so, screen->eng3d, 0x1fc4, 1); - so_data (so, 0x06144321); - so_method(so, screen->eng3d, 0x1fc8, 2); - so_data (so, 0xedcba987); - so_data (so, 0x00000021); - so_method(so, screen->eng3d, 0x1fd0, 1); - so_data (so, 0x00171615); - so_method(so, screen->eng3d, 0x1fd4, 1); - so_data (so, 0x001b1a19); - - so_method(so, screen->eng3d, 0x1ef8, 1); - so_data (so, 0x0020ffff); - so_method(so, screen->eng3d, 0x1d64, 1); - so_data (so, 0x00d30000); - so_method(so, screen->eng3d, 0x1e94, 1); - so_data (so, 0x00000001); - - so_emit(chan, so); - so_ref(NULL, &so); - nouveau_pushbuf_flush(chan, 0); - - return pscreen; -} - diff --git a/src/gallium/drivers/nvfx/Makefile b/src/gallium/drivers/nvfx/Makefile index a665c7e263..e2c24ebc3c 100644 --- a/src/gallium/drivers/nvfx/Makefile +++ b/src/gallium/drivers/nvfx/Makefile @@ -9,6 +9,7 @@ C_SOURCES = \ nvfx_fragprog.c \ nvfx_miptree.c \ nvfx_query.c \ + nvfx_screen.c \ nvfx_state.c \ nvfx_state_blend.c \ nvfx_state_emit.c \ diff --git a/src/gallium/drivers/nvfx/nvfx_screen.c b/src/gallium/drivers/nvfx/nvfx_screen.c new file mode 100644 index 0000000000..6132cf94e2 --- /dev/null +++ b/src/gallium/drivers/nvfx/nvfx_screen.c @@ -0,0 +1,436 @@ +#include "pipe/p_screen.h" +#include "pipe/p_state.h" + +#include "nouveau/nouveau_screen.h" + +#include "nv30/nv30_context.h" +#include "nv40/nv40_context.h" +#include "nvfx_screen.h" + +#define NV30TCL_CHIPSET_3X_MASK 0x00000003 +#define NV34TCL_CHIPSET_3X_MASK 0x00000010 +#define NV35TCL_CHIPSET_3X_MASK 0x000001e0 + +/* FIXME: It seems I should not include directly ../../winsys/drm/nouveau/drm/nouveau_drm_api.h +* to get the pointer to the context front buffer, so I copied nouveau_winsys here. +* nv30_screen_surface_format_supported() can then use it to enforce creating fbo +* with same number of bits everywhere. +*/ +struct nouveau_winsys { + struct pipe_winsys base; + + struct pipe_screen *pscreen; + + struct pipe_surface *front; +}; +#define NV4X_GRCLASS4097_CHIPSETS 0x00000baf +#define NV4X_GRCLASS4497_CHIPSETS 0x00005450 +#define NV6X_GRCLASS4497_CHIPSETS 0x00000088 + +static int +nvfx_screen_get_param(struct pipe_screen *pscreen, int param) +{ + struct nvfx_screen *screen = nvfx_screen(pscreen); + + switch (param) { + case PIPE_CAP_MAX_TEXTURE_IMAGE_UNITS: + /* TODO: check this */ + return screen->is_nv4x ? 16 : 8; + case PIPE_CAP_NPOT_TEXTURES: + return !!screen->is_nv4x; + case PIPE_CAP_TWO_SIDED_STENCIL: + return 1; + case PIPE_CAP_GLSL: + return 0; + case PIPE_CAP_ANISOTROPIC_FILTER: + return 1; + case PIPE_CAP_POINT_SPRITE: + return 1; + case PIPE_CAP_MAX_RENDER_TARGETS: + return screen->is_nv4x ? 4 : 2; + case PIPE_CAP_OCCLUSION_QUERY: + return 1; + case PIPE_CAP_TEXTURE_SHADOW_MAP: + return 1; + case PIPE_CAP_MAX_TEXTURE_2D_LEVELS: + return 13; + case PIPE_CAP_MAX_TEXTURE_3D_LEVELS: + return 10; + case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS: + return 13; + case PIPE_CAP_TEXTURE_MIRROR_CLAMP: + return !!screen->is_nv4x; + case PIPE_CAP_TEXTURE_MIRROR_REPEAT: + return 1; + case PIPE_CAP_MAX_VERTEX_TEXTURE_UNITS: + return 0; /* We have 4 on nv40 - but unsupported currently */ + case PIPE_CAP_TGSI_CONT_SUPPORTED: + return 0; + case PIPE_CAP_BLEND_EQUATION_SEPARATE: + return !!screen->is_nv4x; + case NOUVEAU_CAP_HW_VTXBUF: + /* TODO: this is almost surely wrong */ + return !!screen->is_nv4x; + case NOUVEAU_CAP_HW_IDXBUF: + /* TODO: this is also almost surely wrong */ + return screen->is_nv4x && screen->eng3d->grclass == NV40TCL; + case PIPE_CAP_MAX_COMBINED_SAMPLERS: + return 16; + case PIPE_CAP_INDEP_BLEND_ENABLE: + /* TODO: on nv40 we have separate color masks */ + /* TODO: nv40 mrt blending is probably broken */ + return 0; + case PIPE_CAP_INDEP_BLEND_FUNC: + return 0; + case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT: + case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER: + return 1; + case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT: + case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER: + return 0; + default: + NOUVEAU_ERR("Unknown PIPE_CAP %d\n", param); + return 0; + } +} + +static float +nvfx_screen_get_paramf(struct pipe_screen *pscreen, int param) +{ + struct nvfx_screen *screen = nvfx_screen(pscreen); + + switch (param) { + case PIPE_CAP_MAX_LINE_WIDTH: + case PIPE_CAP_MAX_LINE_WIDTH_AA: + return 10.0; + case PIPE_CAP_MAX_POINT_WIDTH: + case PIPE_CAP_MAX_POINT_WIDTH_AA: + return 64.0; + case PIPE_CAP_MAX_TEXTURE_ANISOTROPY: + return screen->is_nv4x ? 16.0 : 8.0; + case PIPE_CAP_MAX_TEXTURE_LOD_BIAS: + return screen->is_nv4x ? 16.0 : 4.0; + default: + NOUVEAU_ERR("Unknown PIPE_CAP %d\n", param); + return 0.0; + } +} + +static boolean +nvfx_screen_surface_format_supported(struct pipe_screen *pscreen, + enum pipe_format format, + enum pipe_texture_target target, + unsigned tex_usage, unsigned geom_flags) +{ + struct nvfx_screen *screen = nvfx_screen(pscreen); + struct pipe_surface *front = ((struct nouveau_winsys *) pscreen->winsys)->front; + + if (tex_usage & PIPE_TEXTURE_USAGE_RENDER_TARGET) { + switch (format) { + case PIPE_FORMAT_B8G8R8A8_UNORM: + case PIPE_FORMAT_B5G6R5_UNORM: + return TRUE; + default: + break; + } + } else + if (tex_usage & PIPE_TEXTURE_USAGE_DEPTH_STENCIL) { + switch (format) { + case PIPE_FORMAT_S8Z24_UNORM: + case PIPE_FORMAT_X8Z24_UNORM: + return TRUE; + case PIPE_FORMAT_Z16_UNORM: + /* TODO: this nv30 limitation probably does not exist */ + if (!screen->is_nv4x && front) + return (front->format == PIPE_FORMAT_B5G6R5_UNORM); + return TRUE; + default: + break; + } + } else { + switch (format) { + case PIPE_FORMAT_B8G8R8A8_UNORM: + case PIPE_FORMAT_B5G5R5A1_UNORM: + case PIPE_FORMAT_B4G4R4A4_UNORM: + case PIPE_FORMAT_B5G6R5_UNORM: + case PIPE_FORMAT_L8_UNORM: + case PIPE_FORMAT_A8_UNORM: + case PIPE_FORMAT_I8_UNORM: + case PIPE_FORMAT_L8A8_UNORM: + case PIPE_FORMAT_Z16_UNORM: + case PIPE_FORMAT_S8Z24_UNORM: + case PIPE_FORMAT_DXT1_RGB: + case PIPE_FORMAT_DXT1_RGBA: + case PIPE_FORMAT_DXT3_RGBA: + case PIPE_FORMAT_DXT5_RGBA: + return TRUE; + /* TODO: does nv30 support this? */ + case PIPE_FORMAT_R16_SNORM: + return !!screen->is_nv4x; + default: + break; + } + } + + return FALSE; +} + +static struct pipe_buffer * +nvfx_surface_buffer(struct pipe_surface *surf) +{ + struct nvfx_miptree *mt = (struct nvfx_miptree *)surf->texture; + + return mt->buffer; +} + +static void +nvfx_screen_destroy(struct pipe_screen *pscreen) +{ + struct nvfx_screen *screen = nvfx_screen(pscreen); + unsigned i; + + for (i = 0; i < NVFX_STATE_MAX; i++) { + if (screen->state[i]) + so_ref(NULL, &screen->state[i]); + } + + nouveau_resource_destroy(&screen->vp_exec_heap); + nouveau_resource_destroy(&screen->vp_data_heap); + nouveau_resource_destroy(&screen->query_heap); + nouveau_notifier_free(&screen->query); + nouveau_notifier_free(&screen->sync); + nouveau_grobj_free(&screen->eng3d); + nv04_surface_2d_takedown(&screen->eng2d); + + nouveau_screen_fini(&screen->base); + + FREE(pscreen); +} + +static void nv30_screen_init(struct nvfx_screen *screen, struct nouveau_stateobj* so) +{ + screen->base.base.context_create = nv30_create; + int i; + + /* TODO: perhaps we should do some of this on nv40 too? */ + for (i=1; i<8; i++) { + so_method(so, screen->eng3d, NV34TCL_VIEWPORT_CLIP_HORIZ(i), 1); + so_data (so, 0); + so_method(so, screen->eng3d, NV34TCL_VIEWPORT_CLIP_VERT(i), 1); + so_data (so, 0); + } + + so_method(so, screen->eng3d, 0x220, 1); + so_data (so, 1); + + so_method(so, screen->eng3d, 0x03b0, 1); + so_data (so, 0x00100000); + so_method(so, screen->eng3d, 0x1454, 1); + so_data (so, 0); + so_method(so, screen->eng3d, 0x1d80, 1); + so_data (so, 3); + so_method(so, screen->eng3d, 0x1450, 1); + so_data (so, 0x00030004); + + /* NEW */ + so_method(so, screen->eng3d, 0x1e98, 1); + so_data (so, 0); + so_method(so, screen->eng3d, 0x17e0, 3); + so_data (so, fui(0.0)); + so_data (so, fui(0.0)); + so_data (so, fui(1.0)); + so_method(so, screen->eng3d, 0x1f80, 16); + for (i=0; i<16; i++) { + so_data (so, (i==8) ? 0x0000ffff : 0); + } + + so_method(so, screen->eng3d, 0x120, 3); + so_data (so, 0); + so_data (so, 1); + so_data (so, 2); + + so_method(so, screen->eng3d, 0x1d88, 1); + so_data (so, 0x00001200); + + so_method(so, screen->eng3d, NV34TCL_RC_ENABLE, 1); + so_data (so, 0); + + so_method(so, screen->eng3d, NV34TCL_DEPTH_RANGE_NEAR, 2); + so_data (so, fui(0.0)); + so_data (so, fui(1.0)); + + so_method(so, screen->eng3d, NV34TCL_MULTISAMPLE_CONTROL, 1); + so_data (so, 0xffff0000); + + /* enables use of vp rather than fixed-function somehow */ + so_method(so, screen->eng3d, 0x1e94, 1); + so_data (so, 0x13); +} + +static void nv40_screen_init(struct nvfx_screen *screen, struct nouveau_stateobj* so) +{ + screen->base.base.context_create = nv40_create; + + so_method(so, screen->eng3d, NV40TCL_DMA_COLOR2, 2); + so_data (so, screen->base.channel->vram->handle); + so_data (so, screen->base.channel->vram->handle); + + so_method(so, screen->eng3d, 0x1ea4, 3); + so_data (so, 0x00000010); + so_data (so, 0x01000100); + so_data (so, 0xff800006); + + /* vtxprog output routing */ + so_method(so, screen->eng3d, 0x1fc4, 1); + so_data (so, 0x06144321); + so_method(so, screen->eng3d, 0x1fc8, 2); + so_data (so, 0xedcba987); + so_data (so, 0x00000021); + so_method(so, screen->eng3d, 0x1fd0, 1); + so_data (so, 0x00171615); + so_method(so, screen->eng3d, 0x1fd4, 1); + so_data (so, 0x001b1a19); + + so_method(so, screen->eng3d, 0x1ef8, 1); + so_data (so, 0x0020ffff); + so_method(so, screen->eng3d, 0x1d64, 1); + so_data (so, 0x00d30000); + so_method(so, screen->eng3d, 0x1e94, 1); + so_data (so, 0x00000001); +} + +struct pipe_screen * +nvfx_screen_create(struct pipe_winsys *ws, struct nouveau_device *dev) +{ + struct nvfx_screen *screen = CALLOC_STRUCT(nvfx_screen); + struct nouveau_channel *chan; + struct pipe_screen *pscreen; + struct nouveau_stateobj *so; + unsigned eng3d_class = 0; + int ret; + + if (!screen) + return NULL; + + pscreen = &screen->base.base; + + ret = nouveau_screen_init(&screen->base, dev); + if (ret) { + nvfx_screen_destroy(pscreen); + return NULL; + } + chan = screen->base.channel; + + pscreen->winsys = ws; + pscreen->destroy = nvfx_screen_destroy; + pscreen->get_param = nvfx_screen_get_param; + pscreen->get_paramf = nvfx_screen_get_paramf; + pscreen->is_format_supported = nvfx_screen_surface_format_supported; + + switch (dev->chipset & 0xf0) { + case 0x30: + if (NV30TCL_CHIPSET_3X_MASK & (1 << (dev->chipset & 0x0f))) + eng3d_class = 0x0397; + else if (NV34TCL_CHIPSET_3X_MASK & (1 << (dev->chipset & 0x0f))) + eng3d_class = 0x0697; + else if (NV35TCL_CHIPSET_3X_MASK & (1 << (dev->chipset & 0x0f))) + eng3d_class = 0x0497; + break; + case 0x40: + if (NV4X_GRCLASS4097_CHIPSETS & (1 << (dev->chipset & 0x0f))) + eng3d_class = NV40TCL; + else if (NV4X_GRCLASS4497_CHIPSETS & (1 << (dev->chipset & 0x0f))) + eng3d_class = NV44TCL; + screen->is_nv4x = ~0; + break; + case 0x60: + if (NV6X_GRCLASS4497_CHIPSETS & (1 << (dev->chipset & 0x0f))) + eng3d_class = NV44TCL; + screen->is_nv4x = ~0; + break; + } + + if (!eng3d_class) { + NOUVEAU_ERR("Unknown nv3x/nv4x chipset: nv%02x\n", dev->chipset); + return NULL; + } + + nvfx_screen_init_miptree_functions(pscreen); + + ret = nouveau_grobj_alloc(chan, 0xbeef3097, eng3d_class, &screen->eng3d); + if (ret) { + NOUVEAU_ERR("Error creating 3D object: %d\n", ret); + return FALSE; + } + + /* 2D engine setup */ + screen->eng2d = nv04_surface_2d_init(&screen->base); + screen->eng2d->buf = nvfx_surface_buffer; + + /* Notifier for sync purposes */ + ret = nouveau_notifier_alloc(chan, 0xbeef0301, 1, &screen->sync); + if (ret) { + NOUVEAU_ERR("Error creating notifier object: %d\n", ret); + nvfx_screen_destroy(pscreen); + return NULL; + } + + /* Query objects */ + ret = nouveau_notifier_alloc(chan, 0xbeef0302, 32, &screen->query); + if (ret) { + NOUVEAU_ERR("Error initialising query objects: %d\n", ret); + nvfx_screen_destroy(pscreen); + return NULL; + } + + ret = nouveau_resource_init(&screen->query_heap, 0, 32); + if (ret) { + NOUVEAU_ERR("Error initialising query object heap: %d\n", ret); + nvfx_screen_destroy(pscreen); + return NULL; + } + + /* Vtxprog resources */ + if (nouveau_resource_init(&screen->vp_exec_heap, 0, screen->is_nv4x ? 512 : 256) || + nouveau_resource_init(&screen->vp_data_heap, 0, 256)) { + nvfx_screen_destroy(pscreen); + return NULL; + } + + /* Static eng3d initialisation */ + /* make the so big and don't worry about exact values + since we it will be thrown away immediately after use */ + so = so_new(256, 256, 0); + so_method(so, screen->eng3d, NV34TCL_DMA_NOTIFY, 1); + so_data (so, screen->sync->handle); + so_method(so, screen->eng3d, NV34TCL_DMA_TEXTURE0, 2); + so_data (so, chan->vram->handle); + so_data (so, chan->gart->handle); + so_method(so, screen->eng3d, NV34TCL_DMA_COLOR1, 1); + so_data (so, chan->vram->handle); + so_method(so, screen->eng3d, NV34TCL_DMA_COLOR0, 2); + so_data (so, chan->vram->handle); + so_data (so, chan->vram->handle); + so_method(so, screen->eng3d, NV34TCL_DMA_VTXBUF0, 2); + so_data (so, chan->vram->handle); + so_data (so, chan->gart->handle); + + so_method(so, screen->eng3d, NV34TCL_DMA_FENCE, 2); + so_data (so, 0); + so_data (so, screen->query->handle); + + so_method(so, screen->eng3d, NV34TCL_DMA_IN_MEMORY7, 2); + so_data (so, chan->vram->handle); + so_data (so, chan->vram->handle); + + if(!screen->is_nv4x) + nv30_screen_init(screen, so); + else + nv40_screen_init(screen, so); + + so_emit(chan, so); + so_ref(NULL, &so); + nouveau_pushbuf_flush(chan, 0); + + return pscreen; +} diff --git a/src/gallium/winsys/drm/nouveau/drm/nouveau_drm_api.c b/src/gallium/winsys/drm/nouveau/drm/nouveau_drm_api.c index 21517b4bb5..716d4bacd3 100644 --- a/src/gallium/winsys/drm/nouveau/drm/nouveau_drm_api.c +++ b/src/gallium/winsys/drm/nouveau/drm/nouveau_drm_api.c @@ -86,11 +86,9 @@ nouveau_drm_create_screen(struct drm_api *api, int fd, switch (dev->chipset & 0xf0) { case 0x30: - init = nv30_screen_create; - break; case 0x40: case 0x60: - init = nv40_screen_create; + init = nvfx_screen_create; break; case 0x50: case 0x80: -- cgit v1.2.3 From 6992be543383ba0850bd813153def24ab4e28911 Mon Sep 17 00:00:00 2001 From: Luca Barbieri Date: Sun, 21 Feb 2010 14:38:04 +0100 Subject: nv30, nv40: fully unify nv[34]0_context.h Move the remaining content to the common header. --- src/gallium/drivers/nv30/nv30_context.c | 2 +- src/gallium/drivers/nv30/nv30_context.h | 14 -------------- src/gallium/drivers/nv30/nv30_fragtex.c | 2 +- src/gallium/drivers/nv40/nv40_context.c | 2 +- src/gallium/drivers/nv40/nv40_context.h | 14 -------------- src/gallium/drivers/nv40/nv40_fragtex.c | 3 +-- src/gallium/drivers/nvfx/nvfx_context.h | 18 ++++++++++++++++++ src/gallium/drivers/nvfx/nvfx_screen.c | 3 +-- src/gallium/drivers/nvfx/nvfx_state_emit.c | 3 +-- 9 files changed, 24 insertions(+), 37 deletions(-) delete mode 100644 src/gallium/drivers/nv30/nv30_context.h delete mode 100644 src/gallium/drivers/nv40/nv40_context.h (limited to 'src') diff --git a/src/gallium/drivers/nv30/nv30_context.c b/src/gallium/drivers/nv30/nv30_context.c index 9ddb331e74..7e3fd83ee0 100644 --- a/src/gallium/drivers/nv30/nv30_context.c +++ b/src/gallium/drivers/nv30/nv30_context.c @@ -1,7 +1,7 @@ #include "draw/draw_context.h" #include "pipe/p_defines.h" -#include "nv30_context.h" +#include "nvfx_context.h" #include "nvfx_screen.h" static void diff --git a/src/gallium/drivers/nv30/nv30_context.h b/src/gallium/drivers/nv30/nv30_context.h deleted file mode 100644 index eacbb1753d..0000000000 --- a/src/gallium/drivers/nv30/nv30_context.h +++ /dev/null @@ -1,14 +0,0 @@ -#ifndef __NV30_CONTEXT_H__ -#define __NV30_CONTEXT_H__ - -#include "nvfx_context.h" - -/* nv30_fragtex.c */ -extern void nv30_fragtex_bind(struct nvfx_context *); -extern struct nvfx_state_entry nv30_state_fragtex; - -/* nvfx_context.c */ -struct pipe_context * -nv30_create(struct pipe_screen *pscreen, void *priv); - -#endif diff --git a/src/gallium/drivers/nv30/nv30_fragtex.c b/src/gallium/drivers/nv30/nv30_fragtex.c index 34e7dd5444..ab39dedae6 100644 --- a/src/gallium/drivers/nv30/nv30_fragtex.c +++ b/src/gallium/drivers/nv30/nv30_fragtex.c @@ -1,6 +1,6 @@ #include "util/u_format.h" -#include "nv30_context.h" +#include "nvfx_context.h" #include "nouveau/nouveau_util.h" #define _(m,tf,ts0x,ts0y,ts0z,ts0w,ts1x,ts1y,ts1z,ts1w) \ diff --git a/src/gallium/drivers/nv40/nv40_context.c b/src/gallium/drivers/nv40/nv40_context.c index 13bd50dd1d..5a526423ac 100644 --- a/src/gallium/drivers/nv40/nv40_context.c +++ b/src/gallium/drivers/nv40/nv40_context.c @@ -1,7 +1,7 @@ #include "draw/draw_context.h" #include "pipe/p_defines.h" -#include "nv40_context.h" +#include "nvfx_context.h" #include "nvfx_screen.h" static void diff --git a/src/gallium/drivers/nv40/nv40_context.h b/src/gallium/drivers/nv40/nv40_context.h deleted file mode 100644 index 8dc87e426f..0000000000 --- a/src/gallium/drivers/nv40/nv40_context.h +++ /dev/null @@ -1,14 +0,0 @@ -#ifndef __NV40_CONTEXT_H__ -#define __NV40_CONTEXT_H__ - -#include "nvfx_context.h" - -/* nv40_fragtex.c */ -extern void nv40_fragtex_bind(struct nvfx_context *); -extern struct nvfx_state_entry nv40_state_fragtex; - -/* nvfx_context.c */ -struct pipe_context * -nv40_create(struct pipe_screen *pscreen, void *priv); - -#endif diff --git a/src/gallium/drivers/nv40/nv40_fragtex.c b/src/gallium/drivers/nv40/nv40_fragtex.c index 0b46a5313b..29257173b8 100644 --- a/src/gallium/drivers/nv40/nv40_fragtex.c +++ b/src/gallium/drivers/nv40/nv40_fragtex.c @@ -1,6 +1,5 @@ #include "util/u_format.h" - -#include "nv40_context.h" +#include "nvfx_context.h" #define _(m,tf,ts0x,ts0y,ts0z,ts0w,ts1x,ts1y,ts1z,ts1w,sx,sy,sz,sw) \ { \ diff --git a/src/gallium/drivers/nvfx/nvfx_context.h b/src/gallium/drivers/nvfx/nvfx_context.h index 9a4b4631b5..46cc7362ea 100644 --- a/src/gallium/drivers/nvfx/nvfx_context.h +++ b/src/gallium/drivers/nvfx/nvfx_context.h @@ -198,6 +198,14 @@ extern struct nvfx_state_entry nvfx_state_zsa; extern void nvfx_init_query_functions(struct nvfx_context *nvfx); extern void nvfx_init_surface_functions(struct nvfx_context *nvfx); +/* nv30_context.c */ +struct pipe_context * +nv30_create(struct pipe_screen *pscreen, void *priv); + +/* nv40_context.c */ +struct pipe_context * +nv40_create(struct pipe_screen *pscreen, void *priv); + /* nvfx_clear.c */ extern void nvfx_clear(struct pipe_context *pipe, unsigned buffers, const float *rgba, double depth, unsigned stencil); @@ -213,6 +221,16 @@ extern void nvfx_draw_elements_swtnl(struct pipe_context *pipe, extern void nvfx_fragprog_destroy(struct nvfx_context *, struct nvfx_fragment_program *); +/* nv30_fragtex.c */ +extern void nv30_init_sampler_functions(struct nvfx_context *nvfx); +extern void nv30_fragtex_bind(struct nvfx_context *); +extern struct nvfx_state_entry nv30_state_fragtex; + +/* nv40_fragtex.c */ +extern void nv40_init_sampler_functions(struct nvfx_context *nvfx); +extern void nv40_fragtex_bind(struct nvfx_context *); +extern struct nvfx_state_entry nv40_state_fragtex; + /* nvfx_state.c */ extern void nvfx_init_state_functions(struct nvfx_context *nvfx); diff --git a/src/gallium/drivers/nvfx/nvfx_screen.c b/src/gallium/drivers/nvfx/nvfx_screen.c index 6132cf94e2..0c906ecb1d 100644 --- a/src/gallium/drivers/nvfx/nvfx_screen.c +++ b/src/gallium/drivers/nvfx/nvfx_screen.c @@ -3,8 +3,7 @@ #include "nouveau/nouveau_screen.h" -#include "nv30/nv30_context.h" -#include "nv40/nv40_context.h" +#include "nvfx_context.h" #include "nvfx_screen.h" #define NV30TCL_CHIPSET_3X_MASK 0x00000003 diff --git a/src/gallium/drivers/nvfx/nvfx_state_emit.c b/src/gallium/drivers/nvfx/nvfx_state_emit.c index fcbf831050..9d28b59074 100644 --- a/src/gallium/drivers/nvfx/nvfx_state_emit.c +++ b/src/gallium/drivers/nvfx/nvfx_state_emit.c @@ -1,5 +1,4 @@ -#include "nv30/nv30_context.h" -#include "nv40/nv40_context.h" +#include "nvfx_context.h" #include "nvfx_state.h" #include "draw/draw_context.h" -- cgit v1.2.3 From da5103c3b382ca08368a19a195a24278596db4cb Mon Sep 17 00:00:00 2001 From: Luca Barbieri Date: Sun, 21 Feb 2010 14:40:32 +0100 Subject: nv30, nv40: unify nv[34]0_context.c They are now almost identical, except for nv30 vs nv40 fragtex initialization. --- src/gallium/drivers/nv30/Makefile | 1 - src/gallium/drivers/nv30/nv30_context.c | 90 --------------------------------- src/gallium/drivers/nv40/Makefile | 1 - src/gallium/drivers/nv40/nv40_context.c | 90 --------------------------------- src/gallium/drivers/nvfx/Makefile | 1 + src/gallium/drivers/nvfx/nvfx_context.c | 90 +++++++++++++++++++++++++++++++++ src/gallium/drivers/nvfx/nvfx_context.h | 8 +-- src/gallium/drivers/nvfx/nvfx_screen.c | 4 +- 8 files changed, 94 insertions(+), 191 deletions(-) delete mode 100644 src/gallium/drivers/nv30/nv30_context.c delete mode 100644 src/gallium/drivers/nv40/nv40_context.c create mode 100644 src/gallium/drivers/nvfx/nvfx_context.c (limited to 'src') diff --git a/src/gallium/drivers/nv30/Makefile b/src/gallium/drivers/nv30/Makefile index ef3ce7eafa..0a20de9e7a 100644 --- a/src/gallium/drivers/nv30/Makefile +++ b/src/gallium/drivers/nv30/Makefile @@ -4,7 +4,6 @@ include $(TOP)/configs/current LIBNAME = nv30 C_SOURCES = \ - nv30_context.c \ nv30_fragtex.c \ nv30_state.c diff --git a/src/gallium/drivers/nv30/nv30_context.c b/src/gallium/drivers/nv30/nv30_context.c deleted file mode 100644 index 7e3fd83ee0..0000000000 --- a/src/gallium/drivers/nv30/nv30_context.c +++ /dev/null @@ -1,90 +0,0 @@ -#include "draw/draw_context.h" -#include "pipe/p_defines.h" - -#include "nvfx_context.h" -#include "nvfx_screen.h" - -static void -nv30_flush(struct pipe_context *pipe, unsigned flags, - struct pipe_fence_handle **fence) -{ - struct nvfx_context *nvfx = nvfx_context(pipe); - struct nvfx_screen *screen = nvfx->screen; - struct nouveau_channel *chan = screen->base.channel; - struct nouveau_grobj *eng3d = screen->eng3d; - - if (flags & PIPE_FLUSH_TEXTURE_CACHE) { - BEGIN_RING(chan, eng3d, 0x1fd8, 1); - OUT_RING (chan, 2); - BEGIN_RING(chan, eng3d, 0x1fd8, 1); - OUT_RING (chan, 1); - } - - FIRE_RING(chan); - if (fence) - *fence = NULL; -} - -static void -nv30_destroy(struct pipe_context *pipe) -{ - struct nvfx_context *nvfx = nvfx_context(pipe); - unsigned i; - - for (i = 0; i < NVFX_STATE_MAX; i++) { - if (nvfx->state.hw[i]) - so_ref(NULL, &nvfx->state.hw[i]); - } - - if (nvfx->draw) - draw_destroy(nvfx->draw); - FREE(nvfx); -} - -struct pipe_context * -nv30_create(struct pipe_screen *pscreen, void *priv) -{ - struct nvfx_screen *screen = nvfx_screen(pscreen); - struct pipe_winsys *ws = pscreen->winsys; - struct nvfx_context *nvfx; - struct nouveau_winsys *nvws = screen->nvws; - - nvfx = CALLOC(1, sizeof(struct nvfx_context)); - if (!nvfx) - return NULL; - nvfx->screen = screen; - - nvfx->nvws = nvws; - - nvfx->pipe.winsys = ws; - nvfx->pipe.screen = pscreen; - nvfx->pipe.priv = priv; - nvfx->pipe.destroy = nv30_destroy; - nvfx->pipe.draw_arrays = nvfx_draw_arrays; - nvfx->pipe.draw_elements = nvfx_draw_elements; - nvfx->pipe.clear = nvfx_clear; - nvfx->pipe.flush = nv30_flush; - - nvfx->pipe.is_texture_referenced = nouveau_is_texture_referenced; - nvfx->pipe.is_buffer_referenced = nouveau_is_buffer_referenced; - - screen->base.channel->user_private = nvfx; - screen->base.channel->flush_notify = nvfx_state_flush_notify; - - nvfx->is_nv4x = screen->is_nv4x; - - nvfx_init_query_functions(nvfx); - nvfx_init_surface_functions(nvfx); - nvfx_init_state_functions(nvfx); - nvfx_init_transfer_functions(nvfx); - - /* Create, configure, and install fallback swtnl path */ - nvfx->draw = draw_create(); - draw_wide_point_threshold(nvfx->draw, 9999999.0); - draw_wide_line_threshold(nvfx->draw, 9999999.0); - draw_enable_line_stipple(nvfx->draw, FALSE); - draw_enable_point_sprites(nvfx->draw, FALSE); - draw_set_rasterize_stage(nvfx->draw, nvfx_draw_render_stage(nvfx)); - - return &nvfx->pipe; -} diff --git a/src/gallium/drivers/nv40/Makefile b/src/gallium/drivers/nv40/Makefile index a37446d50c..6e764512cf 100644 --- a/src/gallium/drivers/nv40/Makefile +++ b/src/gallium/drivers/nv40/Makefile @@ -4,7 +4,6 @@ include $(TOP)/configs/current LIBNAME = nv40 C_SOURCES = \ - nv40_context.c \ nv40_fragtex.c \ nv40_state.c diff --git a/src/gallium/drivers/nv40/nv40_context.c b/src/gallium/drivers/nv40/nv40_context.c deleted file mode 100644 index 5a526423ac..0000000000 --- a/src/gallium/drivers/nv40/nv40_context.c +++ /dev/null @@ -1,90 +0,0 @@ -#include "draw/draw_context.h" -#include "pipe/p_defines.h" - -#include "nvfx_context.h" -#include "nvfx_screen.h" - -static void -nv40_flush(struct pipe_context *pipe, unsigned flags, - struct pipe_fence_handle **fence) -{ - struct nvfx_context *nvfx = nvfx_context(pipe); - struct nvfx_screen *screen = nvfx->screen; - struct nouveau_channel *chan = screen->base.channel; - struct nouveau_grobj *eng3d = screen->eng3d; - - if (flags & PIPE_FLUSH_TEXTURE_CACHE) { - BEGIN_RING(chan, eng3d, 0x1fd8, 1); - OUT_RING (chan, 2); - BEGIN_RING(chan, eng3d, 0x1fd8, 1); - OUT_RING (chan, 1); - } - - FIRE_RING(chan); - if (fence) - *fence = NULL; -} - -static void -nv40_destroy(struct pipe_context *pipe) -{ - struct nvfx_context *nvfx = nvfx_context(pipe); - unsigned i; - - for (i = 0; i < NVFX_STATE_MAX; i++) { - if (nvfx->state.hw[i]) - so_ref(NULL, &nvfx->state.hw[i]); - } - - if (nvfx->draw) - draw_destroy(nvfx->draw); - FREE(nvfx); -} - -struct pipe_context * -nv40_create(struct pipe_screen *pscreen, void *priv) -{ - struct nvfx_screen *screen = nvfx_screen(pscreen); - struct pipe_winsys *ws = pscreen->winsys; - struct nvfx_context *nvfx; - struct nouveau_winsys *nvws = screen->nvws; - - nvfx = CALLOC(1, sizeof(struct nvfx_context)); - if (!nvfx) - return NULL; - nvfx->screen = screen; - - nvfx->nvws = nvws; - - nvfx->pipe.winsys = ws; - nvfx->pipe.priv = priv; - nvfx->pipe.screen = pscreen; - nvfx->pipe.destroy = nv40_destroy; - nvfx->pipe.draw_arrays = nvfx_draw_arrays; - nvfx->pipe.draw_elements = nvfx_draw_elements; - nvfx->pipe.clear = nvfx_clear; - nvfx->pipe.flush = nv40_flush; - - nvfx->pipe.is_texture_referenced = nouveau_is_texture_referenced; - nvfx->pipe.is_buffer_referenced = nouveau_is_buffer_referenced; - - screen->base.channel->user_private = nvfx; - screen->base.channel->flush_notify = nvfx_state_flush_notify; - - nvfx->is_nv4x = screen->is_nv4x; - - nvfx_init_query_functions(nvfx); - nvfx_init_surface_functions(nvfx); - nvfx_init_state_functions(nvfx); - nvfx_init_transfer_functions(nvfx); - - /* Create, configure, and install fallback swtnl path */ - nvfx->draw = draw_create(); - draw_wide_point_threshold(nvfx->draw, 9999999.0); - draw_wide_line_threshold(nvfx->draw, 9999999.0); - draw_enable_line_stipple(nvfx->draw, FALSE); - draw_enable_point_sprites(nvfx->draw, FALSE); - draw_set_rasterize_stage(nvfx->draw, nvfx_draw_render_stage(nvfx)); - - return &nvfx->pipe; -} diff --git a/src/gallium/drivers/nvfx/Makefile b/src/gallium/drivers/nvfx/Makefile index e2c24ebc3c..aa03a155e3 100644 --- a/src/gallium/drivers/nvfx/Makefile +++ b/src/gallium/drivers/nvfx/Makefile @@ -4,6 +4,7 @@ include $(TOP)/configs/current LIBNAME = nvfx C_SOURCES = \ + nvfx_context.c \ nvfx_clear.c \ nvfx_draw.c \ nvfx_fragprog.c \ diff --git a/src/gallium/drivers/nvfx/nvfx_context.c b/src/gallium/drivers/nvfx/nvfx_context.c new file mode 100644 index 0000000000..fc3cbdb558 --- /dev/null +++ b/src/gallium/drivers/nvfx/nvfx_context.c @@ -0,0 +1,90 @@ +#include "draw/draw_context.h" +#include "pipe/p_defines.h" + +#include "nvfx_context.h" +#include "nvfx_screen.h" + +static void +nvfx_flush(struct pipe_context *pipe, unsigned flags, + struct pipe_fence_handle **fence) +{ + struct nvfx_context *nvfx = nvfx_context(pipe); + struct nvfx_screen *screen = nvfx->screen; + struct nouveau_channel *chan = screen->base.channel; + struct nouveau_grobj *eng3d = screen->eng3d; + + if (flags & PIPE_FLUSH_TEXTURE_CACHE) { + BEGIN_RING(chan, eng3d, 0x1fd8, 1); + OUT_RING (chan, 2); + BEGIN_RING(chan, eng3d, 0x1fd8, 1); + OUT_RING (chan, 1); + } + + FIRE_RING(chan); + if (fence) + *fence = NULL; +} + +static void +nvfx_destroy(struct pipe_context *pipe) +{ + struct nvfx_context *nvfx = nvfx_context(pipe); + unsigned i; + + for (i = 0; i < NVFX_STATE_MAX; i++) { + if (nvfx->state.hw[i]) + so_ref(NULL, &nvfx->state.hw[i]); + } + + if (nvfx->draw) + draw_destroy(nvfx->draw); + FREE(nvfx); +} + +struct pipe_context * +nvfx_create(struct pipe_screen *pscreen, void *priv) +{ + struct nvfx_screen *screen = nvfx_screen(pscreen); + struct pipe_winsys *ws = pscreen->winsys; + struct nvfx_context *nvfx; + struct nouveau_winsys *nvws = screen->nvws; + + nvfx = CALLOC(1, sizeof(struct nvfx_context)); + if (!nvfx) + return NULL; + nvfx->screen = screen; + + nvfx->nvws = nvws; + + nvfx->pipe.winsys = ws; + nvfx->pipe.screen = pscreen; + nvfx->pipe.priv = priv; + nvfx->pipe.destroy = nvfx_destroy; + nvfx->pipe.draw_arrays = nvfx_draw_arrays; + nvfx->pipe.draw_elements = nvfx_draw_elements; + nvfx->pipe.clear = nvfx_clear; + nvfx->pipe.flush = nvfx_flush; + + nvfx->pipe.is_texture_referenced = nouveau_is_texture_referenced; + nvfx->pipe.is_buffer_referenced = nouveau_is_buffer_referenced; + + screen->base.channel->user_private = nvfx; + screen->base.channel->flush_notify = nvfx_state_flush_notify; + + nvfx->is_nv4x = screen->is_nv4x; + + nvfx_init_query_functions(nvfx); + nvfx_init_surface_functions(nvfx); + nvfx_init_state_functions(nvfx); + nvfx_init_transfer_functions(nvfx); + + /* Create, configure, and install fallback swtnl path */ + nvfx->draw = draw_create(); + draw_wide_point_threshold(nvfx->draw, 9999999.0); + draw_wide_line_threshold(nvfx->draw, 9999999.0); + draw_enable_line_stipple(nvfx->draw, FALSE); + draw_enable_point_sprites(nvfx->draw, FALSE); + draw_set_rasterize_stage(nvfx->draw, nvfx_draw_render_stage(nvfx)); + + return &nvfx->pipe; +} diff --git a/src/gallium/drivers/nvfx/nvfx_context.h b/src/gallium/drivers/nvfx/nvfx_context.h index 46cc7362ea..0bd37a7ae8 100644 --- a/src/gallium/drivers/nvfx/nvfx_context.h +++ b/src/gallium/drivers/nvfx/nvfx_context.h @@ -198,13 +198,9 @@ extern struct nvfx_state_entry nvfx_state_zsa; extern void nvfx_init_query_functions(struct nvfx_context *nvfx); extern void nvfx_init_surface_functions(struct nvfx_context *nvfx); -/* nv30_context.c */ +/* nvfx_context.c */ struct pipe_context * -nv30_create(struct pipe_screen *pscreen, void *priv); - -/* nv40_context.c */ -struct pipe_context * -nv40_create(struct pipe_screen *pscreen, void *priv); +nvfx_create(struct pipe_screen *pscreen, void *priv); /* nvfx_clear.c */ extern void nvfx_clear(struct pipe_context *pipe, unsigned buffers, diff --git a/src/gallium/drivers/nvfx/nvfx_screen.c b/src/gallium/drivers/nvfx/nvfx_screen.c index 0c906ecb1d..8138715cc7 100644 --- a/src/gallium/drivers/nvfx/nvfx_screen.c +++ b/src/gallium/drivers/nvfx/nvfx_screen.c @@ -208,7 +208,6 @@ nvfx_screen_destroy(struct pipe_screen *pscreen) static void nv30_screen_init(struct nvfx_screen *screen, struct nouveau_stateobj* so) { - screen->base.base.context_create = nv30_create; int i; /* TODO: perhaps we should do some of this on nv40 too? */ @@ -268,8 +267,6 @@ static void nv30_screen_init(struct nvfx_screen *screen, struct nouveau_stateobj static void nv40_screen_init(struct nvfx_screen *screen, struct nouveau_stateobj* so) { - screen->base.base.context_create = nv40_create; - so_method(so, screen->eng3d, NV40TCL_DMA_COLOR2, 2); so_data (so, screen->base.channel->vram->handle); so_data (so, screen->base.channel->vram->handle); @@ -325,6 +322,7 @@ nvfx_screen_create(struct pipe_winsys *ws, struct nouveau_device *dev) pscreen->get_param = nvfx_screen_get_param; pscreen->get_paramf = nvfx_screen_get_paramf; pscreen->is_format_supported = nvfx_screen_surface_format_supported; + pscreen->context_create = nvfx_create; switch (dev->chipset & 0xf0) { case 0x30: -- cgit v1.2.3 From 5bb68e5d174afa7a177c5e972fa80bf66e37f6ab Mon Sep 17 00:00:00 2001 From: Luca Barbieri Date: Sun, 21 Feb 2010 15:07:17 +0100 Subject: nv30, nv40: partially non-trivially unify nv[34]0_fragtex.c The bulk files cannot be unified, but the frontend can and allows to share some code and simplify state_emit.c --- src/gallium/drivers/nv30/nv30_fragtex.c | 45 +-------------------------- src/gallium/drivers/nv40/nv40_fragtex.c | 46 +--------------------------- src/gallium/drivers/nvfx/Makefile | 1 + src/gallium/drivers/nvfx/nvfx_context.h | 7 +++-- src/gallium/drivers/nvfx/nvfx_fragtex.c | 49 ++++++++++++++++++++++++++++++ src/gallium/drivers/nvfx/nvfx_state_emit.c | 22 +++++--------- 6 files changed, 64 insertions(+), 106 deletions(-) create mode 100644 src/gallium/drivers/nvfx/nvfx_fragtex.c (limited to 'src') diff --git a/src/gallium/drivers/nv30/nv30_fragtex.c b/src/gallium/drivers/nv30/nv30_fragtex.c index ab39dedae6..52f7c52a9b 100644 --- a/src/gallium/drivers/nv30/nv30_fragtex.c +++ b/src/gallium/drivers/nv30/nv30_fragtex.c @@ -57,7 +57,7 @@ nv30_fragtex_format(uint pipe_format) } -static struct nouveau_stateobj * +struct nouveau_stateobj * nv30_fragtex_build(struct nvfx_context *nvfx, int unit) { struct nvfx_sampler_state *ps = nvfx->tex_sampler[unit]; @@ -116,46 +116,3 @@ nv30_fragtex_build(struct nvfx_context *nvfx, int unit) return so; } -static boolean -nv30_fragtex_validate(struct nvfx_context *nvfx) -{ - struct nvfx_fragment_program *fp = nvfx->fragprog; - struct nvfx_state *state = &nvfx->state; - struct nouveau_stateobj *so; - unsigned samplers, unit; - - samplers = state->fp_samplers & ~fp->samplers; - while (samplers) { - unit = ffs(samplers) - 1; - samplers &= ~(1 << unit); - - so = so_new(1, 1, 0); - so_method(so, nvfx->screen->eng3d, NV34TCL_TX_ENABLE(unit), 1); - so_data (so, 0); - so_ref(so, &nvfx->state.hw[NVFX_STATE_FRAGTEX0 + unit]); - so_ref(NULL, &so); - state->dirty |= (1ULL << (NVFX_STATE_FRAGTEX0 + unit)); - } - - samplers = nvfx->dirty_samplers & fp->samplers; - while (samplers) { - unit = ffs(samplers) - 1; - samplers &= ~(1 << unit); - - so = nv30_fragtex_build(nvfx, unit); - so_ref(so, &nvfx->state.hw[NVFX_STATE_FRAGTEX0 + unit]); - so_ref(NULL, &so); - state->dirty |= (1ULL << (NVFX_STATE_FRAGTEX0 + unit)); - } - - nvfx->state.fp_samplers = fp->samplers; - return FALSE; -} - -struct nvfx_state_entry nv30_state_fragtex = { - .validate = nv30_fragtex_validate, - .dirty = { - .pipe = NVFX_NEW_SAMPLER | NVFX_NEW_FRAGPROG, - .hw = 0 - } -}; diff --git a/src/gallium/drivers/nv40/nv40_fragtex.c b/src/gallium/drivers/nv40/nv40_fragtex.c index 29257173b8..7615095025 100644 --- a/src/gallium/drivers/nv40/nv40_fragtex.c +++ b/src/gallium/drivers/nv40/nv40_fragtex.c @@ -59,7 +59,7 @@ nv40_fragtex_format(uint pipe_format) } -static struct nouveau_stateobj * +struct nouveau_stateobj * nv40_fragtex_build(struct nvfx_context *nvfx, int unit) { struct nvfx_sampler_state *ps = nvfx->tex_sampler[unit]; @@ -126,47 +126,3 @@ nv40_fragtex_build(struct nvfx_context *nvfx, int unit) return so; } - -static boolean -nv40_fragtex_validate(struct nvfx_context *nvfx) -{ - struct nvfx_fragment_program *fp = nvfx->fragprog; - struct nvfx_state *state = &nvfx->state; - struct nouveau_stateobj *so; - unsigned samplers, unit; - - samplers = state->fp_samplers & ~fp->samplers; - while (samplers) { - unit = ffs(samplers) - 1; - samplers &= ~(1 << unit); - - so = so_new(1, 1, 0); - so_method(so, nvfx->screen->eng3d, NV34TCL_TX_ENABLE(unit), 1); - so_data (so, 0); - so_ref(so, &nvfx->state.hw[NVFX_STATE_FRAGTEX0 + unit]); - state->dirty |= (1ULL << (NVFX_STATE_FRAGTEX0 + unit)); - } - - samplers = nvfx->dirty_samplers & fp->samplers; - while (samplers) { - unit = ffs(samplers) - 1; - samplers &= ~(1 << unit); - - so = nv40_fragtex_build(nvfx, unit); - so_ref(so, &nvfx->state.hw[NVFX_STATE_FRAGTEX0 + unit]); - so_ref(NULL, &so); - state->dirty |= (1ULL << (NVFX_STATE_FRAGTEX0 + unit)); - } - - nvfx->state.fp_samplers = fp->samplers; - return FALSE; -} - -struct nvfx_state_entry nv40_state_fragtex = { - .validate = nv40_fragtex_validate, - .dirty = { - .pipe = NVFX_NEW_SAMPLER | NVFX_NEW_FRAGPROG, - .hw = 0 - } -}; - diff --git a/src/gallium/drivers/nvfx/Makefile b/src/gallium/drivers/nvfx/Makefile index aa03a155e3..51fa34cfad 100644 --- a/src/gallium/drivers/nvfx/Makefile +++ b/src/gallium/drivers/nvfx/Makefile @@ -8,6 +8,7 @@ C_SOURCES = \ nvfx_clear.c \ nvfx_draw.c \ nvfx_fragprog.c \ + nvfx_fragtex.c \ nvfx_miptree.c \ nvfx_query.c \ nvfx_screen.c \ diff --git a/src/gallium/drivers/nvfx/nvfx_context.h b/src/gallium/drivers/nvfx/nvfx_context.h index 0bd37a7ae8..e538904298 100644 --- a/src/gallium/drivers/nvfx/nvfx_context.h +++ b/src/gallium/drivers/nvfx/nvfx_context.h @@ -184,6 +184,7 @@ struct nvfx_state_entry { extern struct nvfx_state_entry nvfx_state_blend; extern struct nvfx_state_entry nvfx_state_blend_colour; extern struct nvfx_state_entry nvfx_state_fragprog; +extern struct nvfx_state_entry nvfx_state_fragtex; extern struct nvfx_state_entry nvfx_state_framebuffer; extern struct nvfx_state_entry nvfx_state_rasterizer; extern struct nvfx_state_entry nvfx_state_scissor; @@ -220,12 +221,14 @@ extern void nvfx_fragprog_destroy(struct nvfx_context *, /* nv30_fragtex.c */ extern void nv30_init_sampler_functions(struct nvfx_context *nvfx); extern void nv30_fragtex_bind(struct nvfx_context *); -extern struct nvfx_state_entry nv30_state_fragtex; +extern struct nouveau_stateobj * +nv30_fragtex_build(struct nvfx_context *nvfx, int unit); /* nv40_fragtex.c */ extern void nv40_init_sampler_functions(struct nvfx_context *nvfx); extern void nv40_fragtex_bind(struct nvfx_context *); -extern struct nvfx_state_entry nv40_state_fragtex; +extern struct nouveau_stateobj * +nv40_fragtex_build(struct nvfx_context *nvfx, int unit); /* nvfx_state.c */ extern void nvfx_init_state_functions(struct nvfx_context *nvfx); diff --git a/src/gallium/drivers/nvfx/nvfx_fragtex.c b/src/gallium/drivers/nvfx/nvfx_fragtex.c new file mode 100644 index 0000000000..84e4eb1004 --- /dev/null +++ b/src/gallium/drivers/nvfx/nvfx_fragtex.c @@ -0,0 +1,49 @@ +#include "nvfx_context.h" + +static boolean +nvfx_fragtex_validate(struct nvfx_context *nvfx) +{ + struct nvfx_fragment_program *fp = nvfx->fragprog; + struct nvfx_state *state = &nvfx->state; + struct nouveau_stateobj *so; + unsigned samplers, unit; + + samplers = state->fp_samplers & ~fp->samplers; + while (samplers) { + unit = ffs(samplers) - 1; + samplers &= ~(1 << unit); + + so = so_new(1, 1, 0); + so_method(so, nvfx->screen->eng3d, NV34TCL_TX_ENABLE(unit), 1); + so_data (so, 0); + so_ref(so, &nvfx->state.hw[NVFX_STATE_FRAGTEX0 + unit]); + so_ref(NULL, &so); + state->dirty |= (1ULL << (NVFX_STATE_FRAGTEX0 + unit)); + } + + samplers = nvfx->dirty_samplers & fp->samplers; + while (samplers) { + unit = ffs(samplers) - 1; + samplers &= ~(1 << unit); + + if(!nvfx->is_nv4x) + so = nv30_fragtex_build(nvfx, unit); + else + so = nv40_fragtex_build(nvfx, unit); + + so_ref(so, &nvfx->state.hw[NVFX_STATE_FRAGTEX0 + unit]); + so_ref(NULL, &so); + state->dirty |= (1ULL << (NVFX_STATE_FRAGTEX0 + unit)); + } + + nvfx->state.fp_samplers = fp->samplers; + return FALSE; +} + +struct nvfx_state_entry nvfx_state_fragtex = { + .validate = nvfx_fragtex_validate, + .dirty = { + .pipe = NVFX_NEW_SAMPLER | NVFX_NEW_FRAGPROG, + .hw = 0 + } +}; diff --git a/src/gallium/drivers/nvfx/nvfx_state_emit.c b/src/gallium/drivers/nvfx/nvfx_state_emit.c index 9d28b59074..72537388ea 100644 --- a/src/gallium/drivers/nvfx/nvfx_state_emit.c +++ b/src/gallium/drivers/nvfx/nvfx_state_emit.c @@ -2,14 +2,14 @@ #include "nvfx_state.h" #include "draw/draw_context.h" -#define RENDER_STATES(name, nvxx, vbo) \ -static struct nvfx_state_entry *name##_render_states[] = { \ +#define RENDER_STATES(name, vbo) \ +static struct nvfx_state_entry *name##render_states[] = { \ &nvfx_state_framebuffer, \ &nvfx_state_rasterizer, \ &nvfx_state_scissor, \ &nvfx_state_stipple, \ &nvfx_state_fragprog, \ - &nvxx##_state_fragtex, \ + &nvfx_state_fragtex, \ &nvfx_state_vertprog, \ &nvfx_state_blend, \ &nvfx_state_blend_colour, \ @@ -20,10 +20,8 @@ static struct nvfx_state_entry *name##_render_states[] = { \ NULL \ } -RENDER_STATES(nv30, nv30, vbo); -RENDER_STATES(nv30_swtnl, nv30, vtxfmt); -RENDER_STATES(nv40, nv40, vbo); -RENDER_STATES(nv40_swtnl, nv40, vtxfmt); +RENDER_STATES(, vbo); +RENDER_STATES(swtnl_, vtxfmt); static void nvfx_state_do_validate(struct nvfx_context *nvfx, @@ -126,10 +124,7 @@ nvfx_state_validate(struct nvfx_context *nvfx) nvfx->render_mode = HW; } - if(!nvfx->is_nv4x) - nvfx_state_do_validate(nvfx, nv30_render_states); - else - nvfx_state_do_validate(nvfx, nv40_render_states); + nvfx_state_do_validate(nvfx, render_states); if (nvfx->fallback_swtnl || nvfx->fallback_swrast) return FALSE; @@ -172,10 +167,7 @@ nvfx_state_validate_swtnl(struct nvfx_context *nvfx) draw_set_vertex_elements(draw, nvfx->vtxelt->num_elements, nvfx->vtxelt->pipe); } - if(!nvfx->is_nv4x) - nvfx_state_do_validate(nvfx, nv30_swtnl_render_states); - else - nvfx_state_do_validate(nvfx, nv40_swtnl_render_states); + nvfx_state_do_validate(nvfx, swtnl_render_states); if (nvfx->fallback_swrast) { NOUVEAU_ERR("swtnl->swrast 0x%08x\n", nvfx->fallback_swrast); -- cgit v1.2.3 From 7d210fa05f286eb19398ac2f8c8f631f6f83c859 Mon Sep 17 00:00:00 2001 From: Luca Barbieri Date: Wed, 24 Feb 2010 15:08:48 +0100 Subject: nv30, nv40: partially non-trivially unify sampler state in nv[34]0_state.c Many things, like texture wrap modes and min/mag filters are common. Some others, like annisotropy and lod settings, are not. --- src/gallium/drivers/nv30/Makefile | 3 +- src/gallium/drivers/nv30/nv30_fragtex.c | 30 +++++ src/gallium/drivers/nv30/nv30_state.c | 179 ------------------------------ src/gallium/drivers/nv40/Makefile | 3 +- src/gallium/drivers/nv40/nv40_fragtex.c | 46 ++++++++ src/gallium/drivers/nv40/nv40_state.c | 190 -------------------------------- src/gallium/drivers/nvfx/nvfx_context.h | 10 +- src/gallium/drivers/nvfx/nvfx_state.c | 49 +++++--- src/gallium/drivers/nvfx/nvfx_state.h | 8 -- src/gallium/drivers/nvfx/nvfx_tex.h | 133 ++++++++++++++++++++++ 10 files changed, 252 insertions(+), 399 deletions(-) delete mode 100644 src/gallium/drivers/nv30/nv30_state.c delete mode 100644 src/gallium/drivers/nv40/nv40_state.c create mode 100644 src/gallium/drivers/nvfx/nvfx_tex.h (limited to 'src') diff --git a/src/gallium/drivers/nv30/Makefile b/src/gallium/drivers/nv30/Makefile index 0a20de9e7a..70741101d6 100644 --- a/src/gallium/drivers/nv30/Makefile +++ b/src/gallium/drivers/nv30/Makefile @@ -4,8 +4,7 @@ include $(TOP)/configs/current LIBNAME = nv30 C_SOURCES = \ - nv30_fragtex.c \ - nv30_state.c + nv30_fragtex.c LIBRARY_INCLUDES = -I$(TOP)/src/gallium/drivers/nvfx diff --git a/src/gallium/drivers/nv30/nv30_fragtex.c b/src/gallium/drivers/nv30/nv30_fragtex.c index 52f7c52a9b..081362d150 100644 --- a/src/gallium/drivers/nv30/nv30_fragtex.c +++ b/src/gallium/drivers/nv30/nv30_fragtex.c @@ -2,6 +2,36 @@ #include "nvfx_context.h" #include "nouveau/nouveau_util.h" +#include "nvfx_tex.h" + +void +nv30_sampler_state_init(struct pipe_context *pipe, + struct nvfx_sampler_state *ps, + const struct pipe_sampler_state *cso) +{ + if (cso->max_anisotropy >= 8) { + ps->en |= NV34TCL_TX_ENABLE_ANISO_8X; + } else + if (cso->max_anisotropy >= 4) { + ps->en |= NV34TCL_TX_ENABLE_ANISO_4X; + } else + if (cso->max_anisotropy >= 2) { + ps->en |= NV34TCL_TX_ENABLE_ANISO_2X; + } + + { + float limit; + + limit = CLAMP(cso->lod_bias, -16.0, 15.0); + ps->filt |= (int)(cso->lod_bias * 256.0) & 0x1fff; + + limit = CLAMP(cso->max_lod, 0.0, 15.0); + ps->en |= (int)(limit) << 14 /*NV34TCL_TX_ENABLE_MIPMAP_MAX_LOD_SHIFT*/; + + limit = CLAMP(cso->min_lod, 0.0, 15.0); + ps->en |= (int)(limit) << 26 /*NV34TCL_TX_ENABLE_MIPMAP_MIN_LOD_SHIFT*/; + } +} #define _(m,tf,ts0x,ts0y,ts0z,ts0w,ts1x,ts1y,ts1z,ts1w) \ { \ diff --git a/src/gallium/drivers/nv30/nv30_state.c b/src/gallium/drivers/nv30/nv30_state.c deleted file mode 100644 index bf96f7cf35..0000000000 --- a/src/gallium/drivers/nv30/nv30_state.c +++ /dev/null @@ -1,179 +0,0 @@ -#include "pipe/p_state.h" -#include "pipe/p_defines.h" -#include "util/u_inlines.h" - -#include "tgsi/tgsi_parse.h" - -#include "nv30_context.h" -#include "nvfx_state.h" - -static INLINE unsigned -wrap_mode(unsigned wrap) { - unsigned ret; - - switch (wrap) { - case PIPE_TEX_WRAP_REPEAT: - ret = NV34TCL_TX_WRAP_S_REPEAT; - break; - case PIPE_TEX_WRAP_MIRROR_REPEAT: - ret = NV34TCL_TX_WRAP_S_MIRRORED_REPEAT; - break; - case PIPE_TEX_WRAP_CLAMP_TO_EDGE: - ret = NV34TCL_TX_WRAP_S_CLAMP_TO_EDGE; - break; - case PIPE_TEX_WRAP_CLAMP_TO_BORDER: - ret = NV34TCL_TX_WRAP_S_CLAMP_TO_BORDER; - break; - case PIPE_TEX_WRAP_CLAMP: - ret = NV34TCL_TX_WRAP_S_CLAMP; - break; -/* case PIPE_TEX_WRAP_MIRROR_CLAMP_TO_EDGE: - ret = NV34TCL_TX_WRAP_S_MIRROR_CLAMP_TO_EDGE; - break; - case PIPE_TEX_WRAP_MIRROR_CLAMP_TO_BORDER: - ret = NV34TCL_TX_WRAP_S_MIRROR_CLAMP_TO_BORDER; - break; - case PIPE_TEX_WRAP_MIRROR_CLAMP: - ret = NV34TCL_TX_WRAP_S_MIRROR_CLAMP; - break;*/ - default: - NOUVEAU_ERR("unknown wrap mode: %d\n", wrap); - ret = NV34TCL_TX_WRAP_S_REPEAT; - break; - } - - return ret >> NV34TCL_TX_WRAP_S_SHIFT; -} - -void * -nv30_sampler_state_create(struct pipe_context *pipe, - const struct pipe_sampler_state *cso) -{ - struct nvfx_sampler_state *ps; - uint32_t filter = 0; - - ps = MALLOC(sizeof(struct nvfx_sampler_state)); - - ps->fmt = 0; - /* TODO: Not all RECTs formats have this bit set, bits 15-8 of format - are the tx format to use. We should store normalized coord flag - in sampler state structure, and set appropriate format in - nvxx_fragtex_build() - */ - /*NV34TCL_TX_FORMAT_RECT*/ - /*if (!cso->normalized_coords) { - ps->fmt |= (1<<14) ; - }*/ - - ps->wrap = ((wrap_mode(cso->wrap_s) << NV34TCL_TX_WRAP_S_SHIFT) | - (wrap_mode(cso->wrap_t) << NV34TCL_TX_WRAP_T_SHIFT) | - (wrap_mode(cso->wrap_r) << NV34TCL_TX_WRAP_R_SHIFT)); - - ps->en = 0; - - if (cso->max_anisotropy >= 8) { - ps->en |= NV34TCL_TX_ENABLE_ANISO_8X; - } else - if (cso->max_anisotropy >= 4) { - ps->en |= NV34TCL_TX_ENABLE_ANISO_4X; - } else - if (cso->max_anisotropy >= 2) { - ps->en |= NV34TCL_TX_ENABLE_ANISO_2X; - } - - switch (cso->mag_img_filter) { - case PIPE_TEX_FILTER_LINEAR: - filter |= NV34TCL_TX_FILTER_MAGNIFY_LINEAR; - break; - case PIPE_TEX_FILTER_NEAREST: - default: - filter |= NV34TCL_TX_FILTER_MAGNIFY_NEAREST; - break; - } - - switch (cso->min_img_filter) { - case PIPE_TEX_FILTER_LINEAR: - switch (cso->min_mip_filter) { - case PIPE_TEX_MIPFILTER_NEAREST: - filter |= NV34TCL_TX_FILTER_MINIFY_LINEAR_MIPMAP_NEAREST; - break; - case PIPE_TEX_MIPFILTER_LINEAR: - filter |= NV34TCL_TX_FILTER_MINIFY_LINEAR_MIPMAP_LINEAR; - break; - case PIPE_TEX_MIPFILTER_NONE: - default: - filter |= NV34TCL_TX_FILTER_MINIFY_LINEAR; - break; - } - break; - case PIPE_TEX_FILTER_NEAREST: - default: - switch (cso->min_mip_filter) { - case PIPE_TEX_MIPFILTER_NEAREST: - filter |= NV34TCL_TX_FILTER_MINIFY_NEAREST_MIPMAP_NEAREST; - break; - case PIPE_TEX_MIPFILTER_LINEAR: - filter |= NV34TCL_TX_FILTER_MINIFY_NEAREST_MIPMAP_LINEAR; - break; - case PIPE_TEX_MIPFILTER_NONE: - default: - filter |= NV34TCL_TX_FILTER_MINIFY_NEAREST; - break; - } - break; - } - - ps->filt = filter; - - { - float limit; - - limit = CLAMP(cso->lod_bias, -16.0, 15.0); - ps->filt |= (int)(cso->lod_bias * 256.0) & 0x1fff; - - limit = CLAMP(cso->max_lod, 0.0, 15.0); - ps->en |= (int)(limit) << 14 /*NV34TCL_TX_ENABLE_MIPMAP_MAX_LOD_SHIFT*/; - - limit = CLAMP(cso->min_lod, 0.0, 15.0); - ps->en |= (int)(limit) << 26 /*NV34TCL_TX_ENABLE_MIPMAP_MIN_LOD_SHIFT*/; - } - - if (cso->compare_mode == PIPE_TEX_COMPARE_R_TO_TEXTURE) { - switch (cso->compare_func) { - case PIPE_FUNC_NEVER: - ps->wrap |= NV34TCL_TX_WRAP_RCOMP_NEVER; - break; - case PIPE_FUNC_GREATER: - ps->wrap |= NV34TCL_TX_WRAP_RCOMP_GREATER; - break; - case PIPE_FUNC_EQUAL: - ps->wrap |= NV34TCL_TX_WRAP_RCOMP_EQUAL; - break; - case PIPE_FUNC_GEQUAL: - ps->wrap |= NV34TCL_TX_WRAP_RCOMP_GEQUAL; - break; - case PIPE_FUNC_LESS: - ps->wrap |= NV34TCL_TX_WRAP_RCOMP_LESS; - break; - case PIPE_FUNC_NOTEQUAL: - ps->wrap |= NV34TCL_TX_WRAP_RCOMP_NOTEQUAL; - break; - case PIPE_FUNC_LEQUAL: - ps->wrap |= NV34TCL_TX_WRAP_RCOMP_LEQUAL; - break; - case PIPE_FUNC_ALWAYS: - ps->wrap |= NV34TCL_TX_WRAP_RCOMP_ALWAYS; - break; - default: - break; - } - } - - ps->bcol = ((float_to_ubyte(cso->border_color[3]) << 24) | - (float_to_ubyte(cso->border_color[0]) << 16) | - (float_to_ubyte(cso->border_color[1]) << 8) | - (float_to_ubyte(cso->border_color[2]) << 0)); - - return (void *)ps; -} - diff --git a/src/gallium/drivers/nv40/Makefile b/src/gallium/drivers/nv40/Makefile index 6e764512cf..8b69f9432d 100644 --- a/src/gallium/drivers/nv40/Makefile +++ b/src/gallium/drivers/nv40/Makefile @@ -4,8 +4,7 @@ include $(TOP)/configs/current LIBNAME = nv40 C_SOURCES = \ - nv40_fragtex.c \ - nv40_state.c + nv40_fragtex.c LIBRARY_INCLUDES = -I$(TOP)/src/gallium/drivers/nvfx diff --git a/src/gallium/drivers/nv40/nv40_fragtex.c b/src/gallium/drivers/nv40/nv40_fragtex.c index 7615095025..5889b5e40d 100644 --- a/src/gallium/drivers/nv40/nv40_fragtex.c +++ b/src/gallium/drivers/nv40/nv40_fragtex.c @@ -1,5 +1,51 @@ #include "util/u_format.h" #include "nvfx_context.h" +#include "nvfx_tex.h" + +void +nv40_sampler_state_init(struct pipe_context *pipe, + struct nvfx_sampler_state *ps, + const struct pipe_sampler_state *cso) +{ + if (cso->max_anisotropy >= 2) { + /* no idea, binary driver sets it, works without it.. meh.. */ + ps->wrap |= (1 << 5); + + if (cso->max_anisotropy >= 16) { + ps->en |= NV40TCL_TEX_ENABLE_ANISO_16X; + } else + if (cso->max_anisotropy >= 12) { + ps->en |= NV40TCL_TEX_ENABLE_ANISO_12X; + } else + if (cso->max_anisotropy >= 10) { + ps->en |= NV40TCL_TEX_ENABLE_ANISO_10X; + } else + if (cso->max_anisotropy >= 8) { + ps->en |= NV40TCL_TEX_ENABLE_ANISO_8X; + } else + if (cso->max_anisotropy >= 6) { + ps->en |= NV40TCL_TEX_ENABLE_ANISO_6X; + } else + if (cso->max_anisotropy >= 4) { + ps->en |= NV40TCL_TEX_ENABLE_ANISO_4X; + } else { + ps->en |= NV40TCL_TEX_ENABLE_ANISO_2X; + } + } + + { + float limit; + + limit = CLAMP(cso->lod_bias, -16.0, 15.0); + ps->filt |= (int)(cso->lod_bias * 256.0) & 0x1fff; + + limit = CLAMP(cso->max_lod, 0.0, 15.0); + ps->en |= (int)(limit * 256.0) << 7; + + limit = CLAMP(cso->min_lod, 0.0, 15.0); + ps->en |= (int)(limit * 256.0) << 19; + } +} #define _(m,tf,ts0x,ts0y,ts0z,ts0w,ts1x,ts1y,ts1z,ts1w,sx,sy,sz,sw) \ { \ diff --git a/src/gallium/drivers/nv40/nv40_state.c b/src/gallium/drivers/nv40/nv40_state.c deleted file mode 100644 index 4d4098bc42..0000000000 --- a/src/gallium/drivers/nv40/nv40_state.c +++ /dev/null @@ -1,190 +0,0 @@ -#include "pipe/p_state.h" -#include "pipe/p_defines.h" -#include "util/u_inlines.h" - -#include "draw/draw_context.h" - -#include "tgsi/tgsi_parse.h" - -#include "nv40_context.h" -#include "nvfx_state.h" - -static INLINE unsigned -wrap_mode(unsigned wrap) { - unsigned ret; - - switch (wrap) { - case PIPE_TEX_WRAP_REPEAT: - ret = NV34TCL_TX_WRAP_S_REPEAT; - break; - case PIPE_TEX_WRAP_MIRROR_REPEAT: - ret = NV34TCL_TX_WRAP_S_MIRRORED_REPEAT; - break; - case PIPE_TEX_WRAP_CLAMP_TO_EDGE: - ret = NV34TCL_TX_WRAP_S_CLAMP_TO_EDGE; - break; - case PIPE_TEX_WRAP_CLAMP_TO_BORDER: - ret = NV34TCL_TX_WRAP_S_CLAMP_TO_BORDER; - break; - case PIPE_TEX_WRAP_CLAMP: - ret = NV34TCL_TX_WRAP_S_CLAMP; - break; - case PIPE_TEX_WRAP_MIRROR_CLAMP_TO_EDGE: - ret = NV40TCL_TEX_WRAP_S_MIRROR_CLAMP_TO_EDGE; - break; - case PIPE_TEX_WRAP_MIRROR_CLAMP_TO_BORDER: - ret = NV40TCL_TEX_WRAP_S_MIRROR_CLAMP_TO_BORDER; - break; - case PIPE_TEX_WRAP_MIRROR_CLAMP: - ret = NV40TCL_TEX_WRAP_S_MIRROR_CLAMP; - break; - default: - NOUVEAU_ERR("unknown wrap mode: %d\n", wrap); - ret = NV34TCL_TX_WRAP_S_REPEAT; - break; - } - - return ret >> NV34TCL_TX_WRAP_S_SHIFT; -} - -void * -nv40_sampler_state_create(struct pipe_context *pipe, - const struct pipe_sampler_state *cso) -{ - struct nvfx_sampler_state *ps; - uint32_t filter = 0; - - ps = MALLOC(sizeof(struct nvfx_sampler_state)); - - ps->fmt = 0; - if (!cso->normalized_coords) - ps->fmt |= NV40TCL_TEX_FORMAT_RECT; - - ps->wrap = ((wrap_mode(cso->wrap_s) << NV34TCL_TX_WRAP_S_SHIFT) | - (wrap_mode(cso->wrap_t) << NV34TCL_TX_WRAP_T_SHIFT) | - (wrap_mode(cso->wrap_r) << NV34TCL_TX_WRAP_R_SHIFT)); - - ps->en = 0; - if (cso->max_anisotropy >= 2) { - /* no idea, binary driver sets it, works without it.. meh.. */ - ps->wrap |= (1 << 5); - - if (cso->max_anisotropy >= 16) { - ps->en |= NV40TCL_TEX_ENABLE_ANISO_16X; - } else - if (cso->max_anisotropy >= 12) { - ps->en |= NV40TCL_TEX_ENABLE_ANISO_12X; - } else - if (cso->max_anisotropy >= 10) { - ps->en |= NV40TCL_TEX_ENABLE_ANISO_10X; - } else - if (cso->max_anisotropy >= 8) { - ps->en |= NV40TCL_TEX_ENABLE_ANISO_8X; - } else - if (cso->max_anisotropy >= 6) { - ps->en |= NV40TCL_TEX_ENABLE_ANISO_6X; - } else - if (cso->max_anisotropy >= 4) { - ps->en |= NV40TCL_TEX_ENABLE_ANISO_4X; - } else { - ps->en |= NV40TCL_TEX_ENABLE_ANISO_2X; - } - } - - switch (cso->mag_img_filter) { - case PIPE_TEX_FILTER_LINEAR: - filter |= NV34TCL_TX_FILTER_MAGNIFY_LINEAR; - break; - case PIPE_TEX_FILTER_NEAREST: - default: - filter |= NV34TCL_TX_FILTER_MAGNIFY_NEAREST; - break; - } - - switch (cso->min_img_filter) { - case PIPE_TEX_FILTER_LINEAR: - switch (cso->min_mip_filter) { - case PIPE_TEX_MIPFILTER_NEAREST: - filter |= NV34TCL_TX_FILTER_MINIFY_LINEAR_MIPMAP_NEAREST; - break; - case PIPE_TEX_MIPFILTER_LINEAR: - filter |= NV34TCL_TX_FILTER_MINIFY_LINEAR_MIPMAP_LINEAR; - break; - case PIPE_TEX_MIPFILTER_NONE: - default: - filter |= NV34TCL_TX_FILTER_MINIFY_LINEAR; - break; - } - break; - case PIPE_TEX_FILTER_NEAREST: - default: - switch (cso->min_mip_filter) { - case PIPE_TEX_MIPFILTER_NEAREST: - filter |= NV34TCL_TX_FILTER_MINIFY_NEAREST_MIPMAP_NEAREST; - break; - case PIPE_TEX_MIPFILTER_LINEAR: - filter |= NV34TCL_TX_FILTER_MINIFY_NEAREST_MIPMAP_LINEAR; - break; - case PIPE_TEX_MIPFILTER_NONE: - default: - filter |= NV34TCL_TX_FILTER_MINIFY_NEAREST; - break; - } - break; - } - - ps->filt = filter; - - { - float limit; - - limit = CLAMP(cso->lod_bias, -16.0, 15.0); - ps->filt |= (int)(cso->lod_bias * 256.0) & 0x1fff; - - limit = CLAMP(cso->max_lod, 0.0, 15.0); - ps->en |= (int)(limit * 256.0) << 7; - - limit = CLAMP(cso->min_lod, 0.0, 15.0); - ps->en |= (int)(limit * 256.0) << 19; - } - - - if (cso->compare_mode == PIPE_TEX_COMPARE_R_TO_TEXTURE) { - switch (cso->compare_func) { - case PIPE_FUNC_NEVER: - ps->wrap |= NV34TCL_TX_WRAP_RCOMP_NEVER; - break; - case PIPE_FUNC_GREATER: - ps->wrap |= NV34TCL_TX_WRAP_RCOMP_GREATER; - break; - case PIPE_FUNC_EQUAL: - ps->wrap |= NV34TCL_TX_WRAP_RCOMP_EQUAL; - break; - case PIPE_FUNC_GEQUAL: - ps->wrap |= NV34TCL_TX_WRAP_RCOMP_GEQUAL; - break; - case PIPE_FUNC_LESS: - ps->wrap |= NV34TCL_TX_WRAP_RCOMP_LESS; - break; - case PIPE_FUNC_NOTEQUAL: - ps->wrap |= NV34TCL_TX_WRAP_RCOMP_NOTEQUAL; - break; - case PIPE_FUNC_LEQUAL: - ps->wrap |= NV34TCL_TX_WRAP_RCOMP_LEQUAL; - break; - case PIPE_FUNC_ALWAYS: - ps->wrap |= NV34TCL_TX_WRAP_RCOMP_ALWAYS; - break; - default: - break; - } - } - - ps->bcol = ((float_to_ubyte(cso->border_color[3]) << 24) | - (float_to_ubyte(cso->border_color[0]) << 16) | - (float_to_ubyte(cso->border_color[1]) << 8) | - (float_to_ubyte(cso->border_color[2]) << 0)); - - return (void *)ps; -} - diff --git a/src/gallium/drivers/nvfx/nvfx_context.h b/src/gallium/drivers/nvfx/nvfx_context.h index e538904298..5eed8a560e 100644 --- a/src/gallium/drivers/nvfx/nvfx_context.h +++ b/src/gallium/drivers/nvfx/nvfx_context.h @@ -219,13 +219,19 @@ extern void nvfx_fragprog_destroy(struct nvfx_context *, struct nvfx_fragment_program *); /* nv30_fragtex.c */ -extern void nv30_init_sampler_functions(struct nvfx_context *nvfx); +extern void +nv30_sampler_state_init(struct pipe_context *pipe, + struct nvfx_sampler_state *ps, + const struct pipe_sampler_state *cso); extern void nv30_fragtex_bind(struct nvfx_context *); extern struct nouveau_stateobj * nv30_fragtex_build(struct nvfx_context *nvfx, int unit); /* nv40_fragtex.c */ -extern void nv40_init_sampler_functions(struct nvfx_context *nvfx); +extern void +nv40_sampler_state_init(struct pipe_context *pipe, + struct nvfx_sampler_state *ps, + const struct pipe_sampler_state *cso); extern void nv40_fragtex_bind(struct nvfx_context *); extern struct nouveau_stateobj * nv40_fragtex_build(struct nvfx_context *nvfx, int unit); diff --git a/src/gallium/drivers/nvfx/nvfx_state.c b/src/gallium/drivers/nvfx/nvfx_state.c index 7e138afc71..88a9d01c50 100644 --- a/src/gallium/drivers/nvfx/nvfx_state.c +++ b/src/gallium/drivers/nvfx/nvfx_state.c @@ -8,6 +8,7 @@ #include "nvfx_context.h" #include "nvfx_state.h" +#include "nvfx_tex.h" static void * nvfx_blend_state_create(struct pipe_context *pipe, @@ -82,8 +83,35 @@ nvfx_blend_state_delete(struct pipe_context *pipe, void *hwcso) FREE(bso); } +static void * +nvfx_sampler_state_create(struct pipe_context *pipe, + const struct pipe_sampler_state *cso) +{ + struct nvfx_context *nvfx = nvfx_context(pipe); + struct nvfx_sampler_state *ps; + + ps = MALLOC(sizeof(struct nvfx_sampler_state)); + + /* on nv30, we use this as an internal flag */ + ps->fmt = cso->normalized_coords ? 0 : NV40TCL_TEX_FORMAT_RECT; + ps->en = 0; + ps->filt = nvfx_tex_filter(cso); + ps->wrap = (nvfx_tex_wrap_mode(cso->wrap_s) << NV34TCL_TX_WRAP_S_SHIFT) | + (nvfx_tex_wrap_mode(cso->wrap_t) << NV34TCL_TX_WRAP_T_SHIFT) | + (nvfx_tex_wrap_mode(cso->wrap_r) << NV34TCL_TX_WRAP_R_SHIFT) | + nvfx_tex_wrap_compare_mode(cso); + ps->bcol = nvfx_tex_border_color(cso->border_color); + + if(nvfx->is_nv4x) + nv40_sampler_state_init(pipe, ps, cso); + else + nv30_sampler_state_init(pipe, ps, cso); + + return (void *)ps; +} + static void -nv40_sampler_state_bind(struct pipe_context *pipe, unsigned nr, void **sampler) +nvfx_sampler_state_bind(struct pipe_context *pipe, unsigned nr, void **sampler) { struct nvfx_context *nvfx = nvfx_context(pipe); unsigned unit; @@ -103,7 +131,7 @@ nv40_sampler_state_bind(struct pipe_context *pipe, unsigned nr, void **sampler) } static void -nv40_sampler_state_delete(struct pipe_context *pipe, void *hwcso) +nvfx_sampler_state_delete(struct pipe_context *pipe, void *hwcso) { FREE(hwcso); } @@ -543,14 +571,6 @@ nvfx_vtxelts_state_bind(struct pipe_context *pipe, void *hwcso) /*nvfx->draw_dirty |= NVFX_NEW_ARRAYS;*/ } -void * -nv30_sampler_state_create(struct pipe_context *pipe, - const struct pipe_sampler_state *cso); - -void * -nv40_sampler_state_create(struct pipe_context *pipe, - const struct pipe_sampler_state *cso); - void nvfx_init_state_functions(struct nvfx_context *nvfx) { @@ -558,12 +578,9 @@ nvfx_init_state_functions(struct nvfx_context *nvfx) nvfx->pipe.bind_blend_state = nvfx_blend_state_bind; nvfx->pipe.delete_blend_state = nvfx_blend_state_delete; - if(nvfx->is_nv4x) - nvfx->pipe.create_sampler_state = nv40_sampler_state_create; - else - nvfx->pipe.create_sampler_state = nv30_sampler_state_create; - nvfx->pipe.bind_fragment_sampler_states = nv40_sampler_state_bind; - nvfx->pipe.delete_sampler_state = nv40_sampler_state_delete; + nvfx->pipe.create_sampler_state = nvfx_sampler_state_create; + nvfx->pipe.bind_fragment_sampler_states = nvfx_sampler_state_bind; + nvfx->pipe.delete_sampler_state = nvfx_sampler_state_delete; nvfx->pipe.set_fragment_sampler_textures = nvfx_set_sampler_texture; nvfx->pipe.create_rasterizer_state = nvfx_rasterizer_state_create; diff --git a/src/gallium/drivers/nvfx/nvfx_state.h b/src/gallium/drivers/nvfx/nvfx_state.h index b243b1020f..e585246879 100644 --- a/src/gallium/drivers/nvfx/nvfx_state.h +++ b/src/gallium/drivers/nvfx/nvfx_state.h @@ -4,14 +4,6 @@ #include "pipe/p_state.h" #include "tgsi/tgsi_scan.h" -struct nvfx_sampler_state { - uint32_t fmt; - uint32_t wrap; - uint32_t en; - uint32_t filt; - uint32_t bcol; -}; - struct nvfx_vertex_program_exec { uint32_t data[4]; boolean has_branch_offset; diff --git a/src/gallium/drivers/nvfx/nvfx_tex.h b/src/gallium/drivers/nvfx/nvfx_tex.h new file mode 100644 index 0000000000..69187a79e7 --- /dev/null +++ b/src/gallium/drivers/nvfx/nvfx_tex.h @@ -0,0 +1,133 @@ +#ifndef NVFX_TEX_H_ +#define NVFX_TEX_H_ + +static inline unsigned +nvfx_tex_wrap_mode(unsigned wrap) { + unsigned ret; + + switch (wrap) { + case PIPE_TEX_WRAP_REPEAT: + ret = NV34TCL_TX_WRAP_S_REPEAT; + break; + case PIPE_TEX_WRAP_MIRROR_REPEAT: + ret = NV34TCL_TX_WRAP_S_MIRRORED_REPEAT; + break; + case PIPE_TEX_WRAP_CLAMP_TO_EDGE: + ret = NV34TCL_TX_WRAP_S_CLAMP_TO_EDGE; + break; + case PIPE_TEX_WRAP_CLAMP_TO_BORDER: + ret = NV34TCL_TX_WRAP_S_CLAMP_TO_BORDER; + break; + case PIPE_TEX_WRAP_CLAMP: + ret = NV34TCL_TX_WRAP_S_CLAMP; + break; + case PIPE_TEX_WRAP_MIRROR_CLAMP_TO_EDGE: + ret = NV40TCL_TEX_WRAP_S_MIRROR_CLAMP_TO_EDGE; + break; + case PIPE_TEX_WRAP_MIRROR_CLAMP_TO_BORDER: + ret = NV40TCL_TEX_WRAP_S_MIRROR_CLAMP_TO_BORDER; + break; + case PIPE_TEX_WRAP_MIRROR_CLAMP: + ret = NV40TCL_TEX_WRAP_S_MIRROR_CLAMP; + break; + default: + NOUVEAU_ERR("unknown wrap mode: %d\n", wrap); + ret = NV34TCL_TX_WRAP_S_REPEAT; + break; + } + + return ret >> NV34TCL_TX_WRAP_S_SHIFT; +} + +static inline unsigned +nvfx_tex_wrap_compare_mode(const struct pipe_sampler_state* cso) +{ + if (cso->compare_mode == PIPE_TEX_COMPARE_R_TO_TEXTURE) { + switch (cso->compare_func) { + case PIPE_FUNC_NEVER: + return NV34TCL_TX_WRAP_RCOMP_NEVER; + case PIPE_FUNC_GREATER: + return NV34TCL_TX_WRAP_RCOMP_GREATER; + case PIPE_FUNC_EQUAL: + return NV34TCL_TX_WRAP_RCOMP_EQUAL; + case PIPE_FUNC_GEQUAL: + return NV34TCL_TX_WRAP_RCOMP_GEQUAL; + case PIPE_FUNC_LESS: + return NV34TCL_TX_WRAP_RCOMP_LESS; + case PIPE_FUNC_NOTEQUAL: + return NV34TCL_TX_WRAP_RCOMP_NOTEQUAL; + case PIPE_FUNC_LEQUAL: + return NV34TCL_TX_WRAP_RCOMP_LEQUAL; + case PIPE_FUNC_ALWAYS: + return NV34TCL_TX_WRAP_RCOMP_ALWAYS; + default: + break; + } + } + return 0; +} + +static inline unsigned nvfx_tex_filter(const struct pipe_sampler_state* cso) +{ + unsigned filter = 0; + switch (cso->mag_img_filter) { + case PIPE_TEX_FILTER_LINEAR: + filter |= NV34TCL_TX_FILTER_MAGNIFY_LINEAR; + break; + case PIPE_TEX_FILTER_NEAREST: + default: + filter |= NV34TCL_TX_FILTER_MAGNIFY_NEAREST; + break; + } + + switch (cso->min_img_filter) { + case PIPE_TEX_FILTER_LINEAR: + switch (cso->min_mip_filter) { + case PIPE_TEX_MIPFILTER_NEAREST: + filter |= NV34TCL_TX_FILTER_MINIFY_LINEAR_MIPMAP_NEAREST; + break; + case PIPE_TEX_MIPFILTER_LINEAR: + filter |= NV34TCL_TX_FILTER_MINIFY_LINEAR_MIPMAP_LINEAR; + break; + case PIPE_TEX_MIPFILTER_NONE: + default: + filter |= NV34TCL_TX_FILTER_MINIFY_LINEAR; + break; + } + break; + case PIPE_TEX_FILTER_NEAREST: + default: + switch (cso->min_mip_filter) { + case PIPE_TEX_MIPFILTER_NEAREST: + filter |= NV34TCL_TX_FILTER_MINIFY_NEAREST_MIPMAP_NEAREST; + break; + case PIPE_TEX_MIPFILTER_LINEAR: + filter |= NV34TCL_TX_FILTER_MINIFY_NEAREST_MIPMAP_LINEAR; + break; + case PIPE_TEX_MIPFILTER_NONE: + default: + filter |= NV34TCL_TX_FILTER_MINIFY_NEAREST; + break; + } + break; + } + return filter; +} + +static inline unsigned nvfx_tex_border_color(const float* border_color) +{ + return ((float_to_ubyte(border_color[3]) << 24) | + (float_to_ubyte(border_color[0]) << 16) | + (float_to_ubyte(border_color[1]) << 8) | + (float_to_ubyte(border_color[2]) << 0)); +} + +struct nvfx_sampler_state { + uint32_t fmt; + uint32_t wrap; + uint32_t en; + uint32_t filt; + uint32_t bcol; +}; + +#endif /* NVFX_TEX_H_ */ -- cgit v1.2.3 From f9d09a2e7859a2cf025d71b7c3cb189edb6688c4 Mon Sep 17 00:00:00 2001 From: Luca Barbieri Date: Sun, 21 Feb 2010 15:13:12 +0100 Subject: nv30, nv40: move last files to nvfx/ and rm -rf nv30 nv40 This is the last nvfx unification patch. nv[34]0_fragtex.c are moved to the common directory nv[34]0_shader.h are renamed to nv[34]0_vertprog.h and moved to the common directory The separate nv30 and nv40 directories are removed from the build system --- configure.ac | 2 +- src/gallium/drivers/nv30/Makefile | 11 -- src/gallium/drivers/nv30/nv30_fragtex.c | 148 ---------------------- src/gallium/drivers/nv30/nv30_shader.h | 169 ------------------------- src/gallium/drivers/nv40/Makefile | 11 -- src/gallium/drivers/nv40/nv40_fragtex.c | 174 -------------------------- src/gallium/drivers/nv40/nv40_shader.h | 178 --------------------------- src/gallium/drivers/nvfx/Makefile | 2 + src/gallium/drivers/nvfx/nv30_fragtex.c | 147 ++++++++++++++++++++++ src/gallium/drivers/nvfx/nv30_vertprog.h | 169 +++++++++++++++++++++++++ src/gallium/drivers/nvfx/nv40_fragtex.c | 174 ++++++++++++++++++++++++++ src/gallium/drivers/nvfx/nv40_vertprog.h | 177 ++++++++++++++++++++++++++ src/gallium/drivers/nvfx/nvfx_draw.c | 4 +- src/gallium/drivers/nvfx/nvfx_vertprog.c | 4 +- src/gallium/winsys/drm/nouveau/dri/Makefile | 8 -- src/gallium/winsys/drm/nouveau/egl/Makefile | 10 +- src/gallium/winsys/drm/nouveau/xorg/Makefile | 10 +- 17 files changed, 676 insertions(+), 722 deletions(-) delete mode 100644 src/gallium/drivers/nv30/Makefile delete mode 100644 src/gallium/drivers/nv30/nv30_fragtex.c delete mode 100644 src/gallium/drivers/nv30/nv30_shader.h delete mode 100644 src/gallium/drivers/nv40/Makefile delete mode 100644 src/gallium/drivers/nv40/nv40_fragtex.c delete mode 100644 src/gallium/drivers/nv40/nv40_shader.h create mode 100644 src/gallium/drivers/nvfx/nv30_fragtex.c create mode 100644 src/gallium/drivers/nvfx/nv30_vertprog.h create mode 100644 src/gallium/drivers/nvfx/nv40_fragtex.c create mode 100644 src/gallium/drivers/nvfx/nv40_vertprog.h (limited to 'src') diff --git a/configure.ac b/configure.ac index eb271e9d51..0f51097ef6 100644 --- a/configure.ac +++ b/configure.ac @@ -1360,7 +1360,7 @@ AC_ARG_ENABLE([gallium-nouveau], [enable_gallium_nouveau=no]) if test "x$enable_gallium_nouveau" = xyes; then GALLIUM_WINSYS_DRM_DIRS="$GALLIUM_WINSYS_DRM_DIRS nouveau" - GALLIUM_DRIVERS_DIRS="$GALLIUM_DRIVERS_DIRS nouveau nvfx nv30 nv40 nv50" + GALLIUM_DRIVERS_DIRS="$GALLIUM_DRIVERS_DIRS nouveau nvfx nv50" fi dnl diff --git a/src/gallium/drivers/nv30/Makefile b/src/gallium/drivers/nv30/Makefile deleted file mode 100644 index 70741101d6..0000000000 --- a/src/gallium/drivers/nv30/Makefile +++ /dev/null @@ -1,11 +0,0 @@ -TOP = ../../../.. -include $(TOP)/configs/current - -LIBNAME = nv30 - -C_SOURCES = \ - nv30_fragtex.c - -LIBRARY_INCLUDES = -I$(TOP)/src/gallium/drivers/nvfx - -include ../../Makefile.template diff --git a/src/gallium/drivers/nv30/nv30_fragtex.c b/src/gallium/drivers/nv30/nv30_fragtex.c deleted file mode 100644 index 081362d150..0000000000 --- a/src/gallium/drivers/nv30/nv30_fragtex.c +++ /dev/null @@ -1,148 +0,0 @@ -#include "util/u_format.h" - -#include "nvfx_context.h" -#include "nouveau/nouveau_util.h" -#include "nvfx_tex.h" - -void -nv30_sampler_state_init(struct pipe_context *pipe, - struct nvfx_sampler_state *ps, - const struct pipe_sampler_state *cso) -{ - if (cso->max_anisotropy >= 8) { - ps->en |= NV34TCL_TX_ENABLE_ANISO_8X; - } else - if (cso->max_anisotropy >= 4) { - ps->en |= NV34TCL_TX_ENABLE_ANISO_4X; - } else - if (cso->max_anisotropy >= 2) { - ps->en |= NV34TCL_TX_ENABLE_ANISO_2X; - } - - { - float limit; - - limit = CLAMP(cso->lod_bias, -16.0, 15.0); - ps->filt |= (int)(cso->lod_bias * 256.0) & 0x1fff; - - limit = CLAMP(cso->max_lod, 0.0, 15.0); - ps->en |= (int)(limit) << 14 /*NV34TCL_TX_ENABLE_MIPMAP_MAX_LOD_SHIFT*/; - - limit = CLAMP(cso->min_lod, 0.0, 15.0); - ps->en |= (int)(limit) << 26 /*NV34TCL_TX_ENABLE_MIPMAP_MIN_LOD_SHIFT*/; - } -} - -#define _(m,tf,ts0x,ts0y,ts0z,ts0w,ts1x,ts1y,ts1z,ts1w) \ -{ \ - TRUE, \ - PIPE_FORMAT_##m, \ - NV34TCL_TX_FORMAT_FORMAT_##tf, \ - (NV34TCL_TX_SWIZZLE_S0_X_##ts0x | NV34TCL_TX_SWIZZLE_S0_Y_##ts0y | \ - NV34TCL_TX_SWIZZLE_S0_Z_##ts0z | NV34TCL_TX_SWIZZLE_S0_W_##ts0w | \ - NV34TCL_TX_SWIZZLE_S1_X_##ts1x | NV34TCL_TX_SWIZZLE_S1_Y_##ts1y | \ - NV34TCL_TX_SWIZZLE_S1_Z_##ts1z | NV34TCL_TX_SWIZZLE_S1_W_##ts1w) \ -} - -struct nv30_texture_format { - boolean defined; - uint pipe; - int format; - int swizzle; -}; - -static struct nv30_texture_format -nv30_texture_formats[] = { - _(B8G8R8X8_UNORM, A8R8G8B8, S1, S1, S1, ONE, X, Y, Z, W), - _(B8G8R8A8_UNORM, A8R8G8B8, S1, S1, S1, S1, X, Y, Z, W), - _(B5G5R5A1_UNORM, A1R5G5B5, S1, S1, S1, S1, X, Y, Z, W), - _(B4G4R4A4_UNORM, A4R4G4B4, S1, S1, S1, S1, X, Y, Z, W), - _(B5G6R5_UNORM , R5G6B5 , S1, S1, S1, ONE, X, Y, Z, W), - _(L8_UNORM , L8 , S1, S1, S1, ONE, X, X, X, X), - _(A8_UNORM , L8 , ZERO, ZERO, ZERO, S1, X, X, X, X), - _(I8_UNORM , L8 , S1, S1, S1, S1, X, X, X, X), - _(L8A8_UNORM , A8L8 , S1, S1, S1, S1, X, X, X, Y), - _(Z16_UNORM , R5G6B5 , S1, S1, S1, ONE, X, X, X, X), - _(S8Z24_UNORM , A8R8G8B8, S1, S1, S1, ONE, X, X, X, X), - _(DXT1_RGB , DXT1 , S1, S1, S1, ONE, X, Y, Z, W), - _(DXT1_RGBA , DXT1 , S1, S1, S1, S1, X, Y, Z, W), - _(DXT3_RGBA , DXT3 , S1, S1, S1, S1, X, Y, Z, W), - _(DXT5_RGBA , DXT5 , S1, S1, S1, S1, X, Y, Z, W), - {}, -}; - -static struct nv30_texture_format * -nv30_fragtex_format(uint pipe_format) -{ - struct nv30_texture_format *tf = nv30_texture_formats; - - while (tf->defined) { - if (tf->pipe == pipe_format) - return tf; - tf++; - } - - NOUVEAU_ERR("unknown texture format %s\n", util_format_name(pipe_format)); - return NULL; -} - - -struct nouveau_stateobj * -nv30_fragtex_build(struct nvfx_context *nvfx, int unit) -{ - struct nvfx_sampler_state *ps = nvfx->tex_sampler[unit]; - struct nvfx_miptree *nv30mt = nvfx->tex_miptree[unit]; - struct pipe_texture *pt = &nv30mt->base; - struct nouveau_bo *bo = nouveau_bo(nv30mt->buffer); - struct nv30_texture_format *tf; - struct nouveau_stateobj *so; - uint32_t txf, txs; - unsigned tex_flags = NOUVEAU_BO_VRAM | NOUVEAU_BO_GART | NOUVEAU_BO_RD; - - tf = nv30_fragtex_format(pt->format); - if (!tf) - return NULL; - - txf = tf->format; - txf |= ((pt->last_level>0) ? NV34TCL_TX_FORMAT_MIPMAP : 0); - txf |= log2i(pt->width0) << NV34TCL_TX_FORMAT_BASE_SIZE_U_SHIFT; - txf |= log2i(pt->height0) << NV34TCL_TX_FORMAT_BASE_SIZE_V_SHIFT; - txf |= log2i(pt->depth0) << NV34TCL_TX_FORMAT_BASE_SIZE_W_SHIFT; - txf |= NV34TCL_TX_FORMAT_NO_BORDER | 0x10000; - - switch (pt->target) { - case PIPE_TEXTURE_CUBE: - txf |= NV34TCL_TX_FORMAT_CUBIC; - /* fall-through */ - case PIPE_TEXTURE_2D: - txf |= NV34TCL_TX_FORMAT_DIMS_2D; - break; - case PIPE_TEXTURE_3D: - txf |= NV34TCL_TX_FORMAT_DIMS_3D; - break; - case PIPE_TEXTURE_1D: - txf |= NV34TCL_TX_FORMAT_DIMS_1D; - break; - default: - NOUVEAU_ERR("Unknown target %d\n", pt->target); - return NULL; - } - - txs = tf->swizzle; - - so = so_new(1, 8, 2); - so_method(so, nvfx->screen->eng3d, NV34TCL_TX_OFFSET(unit), 8); - so_reloc (so, bo, 0, tex_flags | NOUVEAU_BO_LOW, 0, 0); - so_reloc (so, bo, txf, tex_flags | NOUVEAU_BO_OR, - NV34TCL_TX_FORMAT_DMA0, NV34TCL_TX_FORMAT_DMA1); - so_data (so, ps->wrap); - so_data (so, NV34TCL_TX_ENABLE_ENABLE | ps->en); - so_data (so, txs); - so_data (so, ps->filt | 0x2000 /*voodoo*/); - so_data (so, (pt->width0 << NV34TCL_TX_NPOT_SIZE_W_SHIFT) | - pt->height0); - so_data (so, ps->bcol); - - return so; -} - diff --git a/src/gallium/drivers/nv30/nv30_shader.h b/src/gallium/drivers/nv30/nv30_shader.h deleted file mode 100644 index f19efb5aa4..0000000000 --- a/src/gallium/drivers/nv30/nv30_shader.h +++ /dev/null @@ -1,169 +0,0 @@ -#ifndef __NV30_SHADER_H__ -#define __NV30_SHADER_H__ - -/* Vertex programs instruction set - * - * 128bit opcodes, split into 4 32-bit ones for ease of use. - * - * Non-native instructions - * ABS - MOV + NV40_VP_INST0_DEST_ABS - * POW - EX2 + MUL + LG2 - * SUB - ADD, second source negated - * SWZ - MOV - * XPD - - * - * Register access - * - Only one INPUT can be accessed per-instruction (move extras into TEMPs) - * - Only one CONST can be accessed per-instruction (move extras into TEMPs) - * - * Relative Addressing - * According to the value returned for - * MAX_PROGRAM_NATIVE_ADDRESS_REGISTERS_ARB - * - * there are only two address registers available. The destination in the - * ARL instruction is set to TEMP (The temp isn't actually written). - * - * When using vanilla ARB_v_p, the proprietary driver will squish both the - * available ADDRESS regs into the first hardware reg in the X and Y - * components. - * - * To use an address reg as an index into consts, the CONST_SRC is set to - * (const_base + offset) and INDEX_CONST is set. - * - * To access the second address reg use ADDR_REG_SELECT_1. A particular - * component of the address regs is selected with ADDR_SWZ. - * - * Only one address register can be accessed per instruction. - * - * Conditional execution (see NV_vertex_program{2,3} for details) Conditional - * execution of an instruction is enabled by setting COND_TEST_ENABLE, and - * selecting the condition which will allow the test to pass with - * COND_{FL,LT,...}. It is possible to swizzle the values in the condition - * register, which allows for testing against an individual component. - * - * Branching: - * - * The BRA/CAL instructions seem to follow a slightly different opcode - * layout. The destination instruction ID (IADDR) overlaps a source field. - * Instruction ID's seem to be numbered based on the UPLOAD_FROM_ID FIFO - * command, and is incremented automatically on each UPLOAD_INST FIFO - * command. - * - * Conditional branching is achieved by using the condition tests described - * above. There doesn't appear to be dedicated looping instructions, but - * this can be done using a temp reg + conditional branching. - * - * Subroutines may be uploaded before the main program itself, but the first - * executed instruction is determined by the PROGRAM_START_ID FIFO command. - * - */ - -/* DWORD 0 */ - -#define NV30_VP_INST_ADDR_REG_SELECT_1 (1 << 24) -#define NV30_VP_INST_SRC2_ABS (1 << 23) /* guess */ -#define NV30_VP_INST_SRC1_ABS (1 << 22) /* guess */ -#define NV30_VP_INST_SRC0_ABS (1 << 21) /* guess */ -#define NV30_VP_INST_VEC_RESULT (1 << 20) -#define NV30_VP_INST_DEST_TEMP_ID_SHIFT 16 -#define NV30_VP_INST_DEST_TEMP_ID_MASK (0x0F << 16) -#define NV30_VP_INST_COND_UPDATE_ENABLE (1<<15) -#define NV30_VP_INST_VEC_DEST_TEMP_MASK (0xF << 16) -#define NV30_VP_INST_COND_TEST_ENABLE (1<<14) -#define NV30_VP_INST_COND_SHIFT 11 -#define NV30_VP_INST_COND_MASK (0x07 << 11) -#define NV30_VP_INST_COND_SWZ_X_SHIFT 9 -#define NV30_VP_INST_COND_SWZ_X_MASK (0x03 << 9) -#define NV30_VP_INST_COND_SWZ_Y_SHIFT 7 -#define NV30_VP_INST_COND_SWZ_Y_MASK (0x03 << 7) -#define NV30_VP_INST_COND_SWZ_Z_SHIFT 5 -#define NV30_VP_INST_COND_SWZ_Z_MASK (0x03 << 5) -#define NV30_VP_INST_COND_SWZ_W_SHIFT 3 -#define NV30_VP_INST_COND_SWZ_W_MASK (0x03 << 3) -#define NV30_VP_INST_COND_SWZ_ALL_SHIFT 3 -#define NV30_VP_INST_COND_SWZ_ALL_MASK (0xFF << 3) -#define NV30_VP_INST_ADDR_SWZ_SHIFT 1 -#define NV30_VP_INST_ADDR_SWZ_MASK (0x03 << 1) -#define NV30_VP_INST_SCA_OPCODEH_SHIFT 0 -#define NV30_VP_INST_SCA_OPCODEH_MASK (0x01 << 0) - -/* DWORD 1 */ -#define NV30_VP_INST_SCA_OPCODEL_SHIFT 28 -#define NV30_VP_INST_SCA_OPCODEL_MASK (0x0F << 28) -#define NV30_VP_INST_VEC_OPCODE_SHIFT 23 -#define NV30_VP_INST_VEC_OPCODE_MASK (0x1F << 23) -#define NV30_VP_INST_CONST_SRC_SHIFT 14 -#define NV30_VP_INST_CONST_SRC_MASK (0xFF << 14) -#define NV30_VP_INST_INPUT_SRC_SHIFT 9 /*NV20*/ -#define NV30_VP_INST_INPUT_SRC_MASK (0x0F << 9) /*NV20*/ -#define NV30_VP_INST_SRC0H_SHIFT 0 /*NV20*/ -#define NV30_VP_INST_SRC0H_MASK (0x1FF << 0) /*NV20*/ - -/* Please note: the IADDR fields overlap other fields because they are used - * only for branch instructions. See Branching: label above - * - * DWORD 2 - */ -#define NV30_VP_INST_SRC0L_SHIFT 26 /*NV20*/ -#define NV30_VP_INST_SRC0L_MASK (0x3F <<26) /* NV30_VP_SRC0_LOW_MASK << 26 */ -#define NV30_VP_INST_SRC1_SHIFT 11 /*NV20*/ -#define NV30_VP_INST_SRC1_MASK (0x7FFF<<11) /*NV20*/ -#define NV30_VP_INST_SRC2H_SHIFT 0 /*NV20*/ -#define NV30_VP_INST_SRC2H_MASK (0x7FF << 0) /* NV30_VP_SRC2_HIGH_MASK >> 4*/ -#define NV30_VP_INST_IADDR_SHIFT 2 -#define NV30_VP_INST_IADDR_MASK (0xF << 28) /* NV30_VP_SRC2_LOW_MASK << 28 */ - -/* DWORD 3 */ -#define NV30_VP_INST_SRC2L_SHIFT 28 /*NV20*/ -#define NV30_VP_INST_SRC2L_MASK (0x0F <<28) /*NV20*/ -#define NV30_VP_INST_STEMP_WRITEMASK_SHIFT 24 -#define NV30_VP_INST_STEMP_WRITEMASK_MASK (0x0F << 24) -#define NV30_VP_INST_VTEMP_WRITEMASK_SHIFT 20 -#define NV30_VP_INST_VTEMP_WRITEMASK_MASK (0x0F << 20) -#define NV30_VP_INST_SDEST_WRITEMASK_SHIFT 16 -#define NV30_VP_INST_SDEST_WRITEMASK_MASK (0x0F << 16) -#define NV30_VP_INST_VDEST_WRITEMASK_SHIFT 12 /*NV20*/ -#define NV30_VP_INST_VDEST_WRITEMASK_MASK (0x0F << 12) /*NV20*/ -#define NV30_VP_INST_DEST_SHIFT 2 -#define NV30_VP_INST_DEST_MASK (0x0F << 2) -# define NV30_VP_INST_DEST_POS 0 -# define NV30_VP_INST_DEST_BFC0 1 -# define NV30_VP_INST_DEST_BFC1 2 -# define NV30_VP_INST_DEST_COL0 3 -# define NV30_VP_INST_DEST_COL1 4 -# define NV30_VP_INST_DEST_FOGC 5 -# define NV30_VP_INST_DEST_PSZ 6 -# define NV30_VP_INST_DEST_TC(n) (8+n) - -/* Useful to split the source selection regs into their pieces */ -#define NV30_VP_SRC0_HIGH_SHIFT 6 -#define NV30_VP_SRC0_HIGH_MASK 0x00007FC0 -#define NV30_VP_SRC0_LOW_MASK 0x0000003F -#define NV30_VP_SRC2_HIGH_SHIFT 4 -#define NV30_VP_SRC2_HIGH_MASK 0x00007FF0 -#define NV30_VP_SRC2_LOW_MASK 0x0000000F - - -/* Source-register definition - matches NV20 exactly */ -#define NV30_VP_SRC_NEGATE (1<<14) -#define NV30_VP_SRC_SWZ_X_SHIFT 12 -#define NV30_VP_SRC_REG_SWZ_X_MASK (0x03 <<12) -#define NV30_VP_SRC_SWZ_Y_SHIFT 10 -#define NV30_VP_SRC_REG_SWZ_Y_MASK (0x03 <<10) -#define NV30_VP_SRC_SWZ_Z_SHIFT 8 -#define NV30_VP_SRC_REG_SWZ_Z_MASK (0x03 << 8) -#define NV30_VP_SRC_SWZ_W_SHIFT 6 -#define NV30_VP_SRC_REG_SWZ_W_MASK (0x03 << 6) -#define NV30_VP_SRC_REG_SWZ_ALL_SHIFT 6 -#define NV30_VP_SRC_REG_SWZ_ALL_MASK (0xFF << 6) -#define NV30_VP_SRC_TEMP_SRC_SHIFT 2 -#define NV30_VP_SRC_REG_TEMP_ID_MASK (0x0F << 0) -#define NV30_VP_SRC_REG_TYPE_SHIFT 0 -#define NV30_VP_SRC_REG_TYPE_MASK (0x03 << 0) -#define NV30_VP_SRC_REG_TYPE_TEMP 1 -#define NV30_VP_SRC_REG_TYPE_INPUT 2 -#define NV30_VP_SRC_REG_TYPE_CONST 3 /* guess */ - -#include "nvfx_shader.h" - -#endif diff --git a/src/gallium/drivers/nv40/Makefile b/src/gallium/drivers/nv40/Makefile deleted file mode 100644 index 8b69f9432d..0000000000 --- a/src/gallium/drivers/nv40/Makefile +++ /dev/null @@ -1,11 +0,0 @@ -TOP = ../../../.. -include $(TOP)/configs/current - -LIBNAME = nv40 - -C_SOURCES = \ - nv40_fragtex.c - -LIBRARY_INCLUDES = -I$(TOP)/src/gallium/drivers/nvfx - -include ../../Makefile.template diff --git a/src/gallium/drivers/nv40/nv40_fragtex.c b/src/gallium/drivers/nv40/nv40_fragtex.c deleted file mode 100644 index 5889b5e40d..0000000000 --- a/src/gallium/drivers/nv40/nv40_fragtex.c +++ /dev/null @@ -1,174 +0,0 @@ -#include "util/u_format.h" -#include "nvfx_context.h" -#include "nvfx_tex.h" - -void -nv40_sampler_state_init(struct pipe_context *pipe, - struct nvfx_sampler_state *ps, - const struct pipe_sampler_state *cso) -{ - if (cso->max_anisotropy >= 2) { - /* no idea, binary driver sets it, works without it.. meh.. */ - ps->wrap |= (1 << 5); - - if (cso->max_anisotropy >= 16) { - ps->en |= NV40TCL_TEX_ENABLE_ANISO_16X; - } else - if (cso->max_anisotropy >= 12) { - ps->en |= NV40TCL_TEX_ENABLE_ANISO_12X; - } else - if (cso->max_anisotropy >= 10) { - ps->en |= NV40TCL_TEX_ENABLE_ANISO_10X; - } else - if (cso->max_anisotropy >= 8) { - ps->en |= NV40TCL_TEX_ENABLE_ANISO_8X; - } else - if (cso->max_anisotropy >= 6) { - ps->en |= NV40TCL_TEX_ENABLE_ANISO_6X; - } else - if (cso->max_anisotropy >= 4) { - ps->en |= NV40TCL_TEX_ENABLE_ANISO_4X; - } else { - ps->en |= NV40TCL_TEX_ENABLE_ANISO_2X; - } - } - - { - float limit; - - limit = CLAMP(cso->lod_bias, -16.0, 15.0); - ps->filt |= (int)(cso->lod_bias * 256.0) & 0x1fff; - - limit = CLAMP(cso->max_lod, 0.0, 15.0); - ps->en |= (int)(limit * 256.0) << 7; - - limit = CLAMP(cso->min_lod, 0.0, 15.0); - ps->en |= (int)(limit * 256.0) << 19; - } -} - -#define _(m,tf,ts0x,ts0y,ts0z,ts0w,ts1x,ts1y,ts1z,ts1w,sx,sy,sz,sw) \ -{ \ - TRUE, \ - PIPE_FORMAT_##m, \ - NV40TCL_TEX_FORMAT_FORMAT_##tf, \ - (NV34TCL_TX_SWIZZLE_S0_X_##ts0x | NV34TCL_TX_SWIZZLE_S0_Y_##ts0y | \ - NV34TCL_TX_SWIZZLE_S0_Z_##ts0z | NV34TCL_TX_SWIZZLE_S0_W_##ts0w | \ - NV34TCL_TX_SWIZZLE_S1_X_##ts1x | NV34TCL_TX_SWIZZLE_S1_Y_##ts1y | \ - NV34TCL_TX_SWIZZLE_S1_Z_##ts1z | NV34TCL_TX_SWIZZLE_S1_W_##ts1w), \ - ((NV34TCL_TX_FILTER_SIGNED_RED*sx) | (NV34TCL_TX_FILTER_SIGNED_GREEN*sy) | \ - (NV34TCL_TX_FILTER_SIGNED_BLUE*sz) | (NV34TCL_TX_FILTER_SIGNED_ALPHA*sw)) \ -} - -struct nv40_texture_format { - boolean defined; - uint pipe; - int format; - int swizzle; - int sign; -}; - -static struct nv40_texture_format -nv40_texture_formats[] = { - _(B8G8R8X8_UNORM, A8R8G8B8, S1, S1, S1, ONE, X, Y, Z, W, 0, 0, 0, 0), - _(B8G8R8A8_UNORM, A8R8G8B8, S1, S1, S1, S1, X, Y, Z, W, 0, 0, 0, 0), - _(B5G5R5A1_UNORM, A1R5G5B5, S1, S1, S1, S1, X, Y, Z, W, 0, 0, 0, 0), - _(B4G4R4A4_UNORM, A4R4G4B4, S1, S1, S1, S1, X, Y, Z, W, 0, 0, 0, 0), - _(B5G6R5_UNORM , R5G6B5 , S1, S1, S1, ONE, X, Y, Z, W, 0, 0, 0, 0), - _(L8_UNORM , L8 , S1, S1, S1, ONE, X, X, X, X, 0, 0, 0, 0), - _(A8_UNORM , L8 , ZERO, ZERO, ZERO, S1, X, X, X, X, 0, 0, 0, 0), - _(R16_SNORM , A16 , ZERO, ZERO, S1, ONE, X, X, X, Y, 1, 1, 1, 1), - _(I8_UNORM , L8 , S1, S1, S1, S1, X, X, X, X, 0, 0, 0, 0), - _(L8A8_UNORM , A8L8 , S1, S1, S1, S1, X, X, X, Y, 0, 0, 0, 0), - _(Z16_UNORM , Z16 , S1, S1, S1, ONE, X, X, X, X, 0, 0, 0, 0), - _(S8Z24_UNORM , Z24 , S1, S1, S1, ONE, X, X, X, X, 0, 0, 0, 0), - _(DXT1_RGB , DXT1 , S1, S1, S1, ONE, X, Y, Z, W, 0, 0, 0, 0), - _(DXT1_RGBA , DXT1 , S1, S1, S1, S1, X, Y, Z, W, 0, 0, 0, 0), - _(DXT3_RGBA , DXT3 , S1, S1, S1, S1, X, Y, Z, W, 0, 0, 0, 0), - _(DXT5_RGBA , DXT5 , S1, S1, S1, S1, X, Y, Z, W, 0, 0, 0, 0), - {}, -}; - -static struct nv40_texture_format * -nv40_fragtex_format(uint pipe_format) -{ - struct nv40_texture_format *tf = nv40_texture_formats; - - while (tf->defined) { - if (tf->pipe == pipe_format) - return tf; - tf++; - } - - NOUVEAU_ERR("unknown texture format %s\n", util_format_name(pipe_format)); - return NULL; -} - - -struct nouveau_stateobj * -nv40_fragtex_build(struct nvfx_context *nvfx, int unit) -{ - struct nvfx_sampler_state *ps = nvfx->tex_sampler[unit]; - struct nvfx_miptree *nv40mt = nvfx->tex_miptree[unit]; - struct nouveau_bo *bo = nouveau_bo(nv40mt->buffer); - struct pipe_texture *pt = &nv40mt->base; - struct nv40_texture_format *tf; - struct nouveau_stateobj *so; - uint32_t txf, txs, txp; - unsigned tex_flags = NOUVEAU_BO_VRAM | NOUVEAU_BO_GART | NOUVEAU_BO_RD; - - tf = nv40_fragtex_format(pt->format); - if (!tf) - assert(0); - - txf = ps->fmt; - txf |= tf->format | 0x8000; - txf |= ((pt->last_level + 1) << NV40TCL_TEX_FORMAT_MIPMAP_COUNT_SHIFT); - - if (1) /* XXX */ - txf |= NV34TCL_TX_FORMAT_NO_BORDER; - - switch (pt->target) { - case PIPE_TEXTURE_CUBE: - txf |= NV34TCL_TX_FORMAT_CUBIC; - /* fall-through */ - case PIPE_TEXTURE_2D: - txf |= NV34TCL_TX_FORMAT_DIMS_2D; - break; - case PIPE_TEXTURE_3D: - txf |= NV34TCL_TX_FORMAT_DIMS_3D; - break; - case PIPE_TEXTURE_1D: - txf |= NV34TCL_TX_FORMAT_DIMS_1D; - break; - default: - NOUVEAU_ERR("Unknown target %d\n", pt->target); - return NULL; - } - - if (!(pt->tex_usage & NOUVEAU_TEXTURE_USAGE_LINEAR)) { - txp = 0; - } else { - txp = nv40mt->level[0].pitch; - txf |= NV40TCL_TEX_FORMAT_LINEAR; - } - - txs = tf->swizzle; - - so = so_new(2, 9, 2); - so_method(so, nvfx->screen->eng3d, NV34TCL_TX_OFFSET(unit), 8); - so_reloc (so, bo, 0, tex_flags | NOUVEAU_BO_LOW, 0, 0); - so_reloc (so, bo, txf, tex_flags | NOUVEAU_BO_OR, - NV34TCL_TX_FORMAT_DMA0, NV34TCL_TX_FORMAT_DMA1); - so_data (so, ps->wrap); - so_data (so, NV40TCL_TEX_ENABLE_ENABLE | ps->en); - so_data (so, txs); - so_data (so, ps->filt | tf->sign | 0x2000 /*voodoo*/); - so_data (so, (pt->width0 << NV34TCL_TX_NPOT_SIZE_W_SHIFT) | - pt->height0); - so_data (so, ps->bcol); - so_method(so, nvfx->screen->eng3d, NV40TCL_TEX_SIZE1(unit), 1); - so_data (so, (pt->depth0 << NV40TCL_TEX_SIZE1_DEPTH_SHIFT) | txp); - - return so; -} diff --git a/src/gallium/drivers/nv40/nv40_shader.h b/src/gallium/drivers/nv40/nv40_shader.h deleted file mode 100644 index 8d28137e9d..0000000000 --- a/src/gallium/drivers/nv40/nv40_shader.h +++ /dev/null @@ -1,178 +0,0 @@ -#ifndef __NV40_SHADER_H__ -#define __NV40_SHADER_H__ - -/* Vertex programs instruction set - * - * The NV40 instruction set is very similar to NV30. Most fields are in - * a slightly different position in the instruction however. - * - * Merged instructions - * In some cases it is possible to put two instructions into one opcode - * slot. The rules for when this is OK is not entirely clear to me yet. - * - * There are separate writemasks and dest temp register fields for each - * grouping of instructions. There is however only one field with the - * ID of a result register. Writing to temp/result regs is selected by - * setting VEC_RESULT/SCA_RESULT. - * - * Temporary registers - * The source/dest temp register fields have been extended by 1 bit, to - * give a total of 32 temporary registers. - * - * Relative Addressing - * NV40 can use an address register to index into vertex attribute regs. - * This is done by putting the offset value into INPUT_SRC and setting - * the INDEX_INPUT flag. - * - * Conditional execution (see NV_vertex_program{2,3} for details) - * There is a second condition code register on NV40, it's use is enabled - * by setting the COND_REG_SELECT_1 flag. - * - * Texture lookup - * TODO - */ - -/* ---- OPCODE BITS 127:96 / data DWORD 0 --- */ -#define NV40_VP_INST_VEC_RESULT (1 << 30) -/* uncertain.. */ -#define NV40_VP_INST_COND_UPDATE_ENABLE ((1 << 14)|1<<29) -/* use address reg as index into attribs */ -#define NV40_VP_INST_INDEX_INPUT (1 << 27) -#define NV40_VP_INST_COND_REG_SELECT_1 (1 << 25) -#define NV40_VP_INST_ADDR_REG_SELECT_1 (1 << 24) -#define NV40_VP_INST_SRC2_ABS (1 << 23) -#define NV40_VP_INST_SRC1_ABS (1 << 22) -#define NV40_VP_INST_SRC0_ABS (1 << 21) -#define NV40_VP_INST_VEC_DEST_TEMP_SHIFT 15 -#define NV40_VP_INST_VEC_DEST_TEMP_MASK (0x1F << 15) -#define NV40_VP_INST_COND_TEST_ENABLE (1 << 13) -#define NV40_VP_INST_COND_SHIFT 10 -#define NV40_VP_INST_COND_MASK (0x7 << 10) -#define NV40_VP_INST_COND_SWZ_X_SHIFT 8 -#define NV40_VP_INST_COND_SWZ_X_MASK (3 << 8) -#define NV40_VP_INST_COND_SWZ_Y_SHIFT 6 -#define NV40_VP_INST_COND_SWZ_Y_MASK (3 << 6) -#define NV40_VP_INST_COND_SWZ_Z_SHIFT 4 -#define NV40_VP_INST_COND_SWZ_Z_MASK (3 << 4) -#define NV40_VP_INST_COND_SWZ_W_SHIFT 2 -#define NV40_VP_INST_COND_SWZ_W_MASK (3 << 2) -#define NV40_VP_INST_COND_SWZ_ALL_SHIFT 2 -#define NV40_VP_INST_COND_SWZ_ALL_MASK (0xFF << 2) -#define NV40_VP_INST_ADDR_SWZ_SHIFT 0 -#define NV40_VP_INST_ADDR_SWZ_MASK (0x03 << 0) -#define NV40_VP_INST0_KNOWN ( \ - NV40_VP_INST_INDEX_INPUT | \ - NV40_VP_INST_COND_REG_SELECT_1 | \ - NV40_VP_INST_ADDR_REG_SELECT_1 | \ - NV40_VP_INST_SRC2_ABS | \ - NV40_VP_INST_SRC1_ABS | \ - NV40_VP_INST_SRC0_ABS | \ - NV40_VP_INST_VEC_DEST_TEMP_MASK | \ - NV40_VP_INST_COND_TEST_ENABLE | \ - NV40_VP_INST_COND_MASK | \ - NV40_VP_INST_COND_SWZ_ALL_MASK | \ - NV40_VP_INST_ADDR_SWZ_MASK) - -/* ---- OPCODE BITS 95:64 / data DWORD 1 --- */ -#define NV40_VP_INST_VEC_OPCODE_SHIFT 22 -#define NV40_VP_INST_VEC_OPCODE_MASK (0x1F << 22) -#define NV40_VP_INST_SCA_OPCODE_SHIFT 27 -#define NV40_VP_INST_SCA_OPCODE_MASK (0x1F << 27) -#define NV40_VP_INST_CONST_SRC_SHIFT 12 -#define NV40_VP_INST_CONST_SRC_MASK (0xFF << 12) -#define NV40_VP_INST_INPUT_SRC_SHIFT 8 -#define NV40_VP_INST_INPUT_SRC_MASK (0x0F << 8) -#define NV40_VP_INST_SRC0H_SHIFT 0 -#define NV40_VP_INST_SRC0H_MASK (0xFF << 0) -#define NV40_VP_INST1_KNOWN ( \ - NV40_VP_INST_VEC_OPCODE_MASK | \ - NV40_VP_INST_SCA_OPCODE_MASK | \ - NV40_VP_INST_CONST_SRC_MASK | \ - NV40_VP_INST_INPUT_SRC_MASK | \ - NV40_VP_INST_SRC0H_MASK \ - ) - -/* ---- OPCODE BITS 63:32 / data DWORD 2 --- */ -#define NV40_VP_INST_SRC0L_SHIFT 23 -#define NV40_VP_INST_SRC0L_MASK (0x1FF << 23) -#define NV40_VP_INST_SRC1_SHIFT 6 -#define NV40_VP_INST_SRC1_MASK (0x1FFFF << 6) -#define NV40_VP_INST_SRC2H_SHIFT 0 -#define NV40_VP_INST_SRC2H_MASK (0x3F << 0) -#define NV40_VP_INST_IADDRH_SHIFT 0 -#define NV40_VP_INST_IADDRH_MASK (0x1F << 0) - -/* ---- OPCODE BITS 31:0 / data DWORD 3 --- */ -#define NV40_VP_INST_IADDRL_SHIFT 29 -#define NV40_VP_INST_IADDRL_MASK (7 << 29) -#define NV40_VP_INST_SRC2L_SHIFT 21 -#define NV40_VP_INST_SRC2L_MASK (0x7FF << 21) -#define NV40_VP_INST_SCA_WRITEMASK_SHIFT 17 -#define NV40_VP_INST_SCA_WRITEMASK_MASK (0xF << 17) -# define NV40_VP_INST_SCA_WRITEMASK_X (1 << 20) -# define NV40_VP_INST_SCA_WRITEMASK_Y (1 << 19) -# define NV40_VP_INST_SCA_WRITEMASK_Z (1 << 18) -# define NV40_VP_INST_SCA_WRITEMASK_W (1 << 17) -#define NV40_VP_INST_VEC_WRITEMASK_SHIFT 13 -#define NV40_VP_INST_VEC_WRITEMASK_MASK (0xF << 13) -# define NV40_VP_INST_VEC_WRITEMASK_X (1 << 16) -# define NV40_VP_INST_VEC_WRITEMASK_Y (1 << 15) -# define NV40_VP_INST_VEC_WRITEMASK_Z (1 << 14) -# define NV40_VP_INST_VEC_WRITEMASK_W (1 << 13) -#define NV40_VP_INST_SCA_RESULT (1 << 12) -#define NV40_VP_INST_SCA_DEST_TEMP_SHIFT 7 -#define NV40_VP_INST_SCA_DEST_TEMP_MASK (0x1F << 7) -#define NV40_VP_INST_DEST_SHIFT 2 -#define NV40_VP_INST_DEST_MASK (31 << 2) -# define NV40_VP_INST_DEST_POS 0 -# define NV40_VP_INST_DEST_COL0 1 -# define NV40_VP_INST_DEST_COL1 2 -# define NV40_VP_INST_DEST_BFC0 3 -# define NV40_VP_INST_DEST_BFC1 4 -# define NV40_VP_INST_DEST_FOGC 5 -# define NV40_VP_INST_DEST_PSZ 6 -# define NV40_VP_INST_DEST_TC0 7 -# define NV40_VP_INST_DEST_TC(n) (7+n) -# define NV40_VP_INST_DEST_TEMP 0x1F -#define NV40_VP_INST_INDEX_CONST (1 << 1) -#define NV40_VP_INST3_KNOWN ( \ - NV40_VP_INST_SRC2L_MASK |\ - NV40_VP_INST_SCA_WRITEMASK_MASK |\ - NV40_VP_INST_VEC_WRITEMASK_MASK |\ - NV40_VP_INST_SCA_DEST_TEMP_MASK |\ - NV40_VP_INST_DEST_MASK |\ - NV40_VP_INST_INDEX_CONST) - -/* Useful to split the source selection regs into their pieces */ -#define NV40_VP_SRC0_HIGH_SHIFT 9 -#define NV40_VP_SRC0_HIGH_MASK 0x0001FE00 -#define NV40_VP_SRC0_LOW_MASK 0x000001FF -#define NV40_VP_SRC2_HIGH_SHIFT 11 -#define NV40_VP_SRC2_HIGH_MASK 0x0001F800 -#define NV40_VP_SRC2_LOW_MASK 0x000007FF - -/* Source selection - these are the bits you fill NV40_VP_INST_SRCn with */ -#define NV40_VP_SRC_NEGATE (1 << 16) -#define NV40_VP_SRC_SWZ_X_SHIFT 14 -#define NV40_VP_SRC_SWZ_X_MASK (3 << 14) -#define NV40_VP_SRC_SWZ_Y_SHIFT 12 -#define NV40_VP_SRC_SWZ_Y_MASK (3 << 12) -#define NV40_VP_SRC_SWZ_Z_SHIFT 10 -#define NV40_VP_SRC_SWZ_Z_MASK (3 << 10) -#define NV40_VP_SRC_SWZ_W_SHIFT 8 -#define NV40_VP_SRC_SWZ_W_MASK (3 << 8) -#define NV40_VP_SRC_SWZ_ALL_SHIFT 8 -#define NV40_VP_SRC_SWZ_ALL_MASK (0xFF << 8) -#define NV40_VP_SRC_TEMP_SRC_SHIFT 2 -#define NV40_VP_SRC_TEMP_SRC_MASK (0x1F << 2) -#define NV40_VP_SRC_REG_TYPE_SHIFT 0 -#define NV40_VP_SRC_REG_TYPE_MASK (3 << 0) -# define NV40_VP_SRC_REG_TYPE_UNK0 0 -# define NV40_VP_SRC_REG_TYPE_TEMP 1 -# define NV40_VP_SRC_REG_TYPE_INPUT 2 -# define NV40_VP_SRC_REG_TYPE_CONST 3 - -#include "nvfx_shader.h" - -#endif - diff --git a/src/gallium/drivers/nvfx/Makefile b/src/gallium/drivers/nvfx/Makefile index 51fa34cfad..e912177b21 100644 --- a/src/gallium/drivers/nvfx/Makefile +++ b/src/gallium/drivers/nvfx/Makefile @@ -9,6 +9,8 @@ C_SOURCES = \ nvfx_draw.c \ nvfx_fragprog.c \ nvfx_fragtex.c \ + nv30_fragtex.c \ + nv40_fragtex.c \ nvfx_miptree.c \ nvfx_query.c \ nvfx_screen.c \ diff --git a/src/gallium/drivers/nvfx/nv30_fragtex.c b/src/gallium/drivers/nvfx/nv30_fragtex.c new file mode 100644 index 0000000000..2b56f45492 --- /dev/null +++ b/src/gallium/drivers/nvfx/nv30_fragtex.c @@ -0,0 +1,147 @@ +#include "util/u_format.h" + +#include "nvfx_context.h" +#include "nouveau/nouveau_util.h" +#include "nvfx_tex.h" + +void +nv30_sampler_state_init(struct pipe_context *pipe, + struct nvfx_sampler_state *ps, + const struct pipe_sampler_state *cso) +{ + if (cso->max_anisotropy >= 8) { + ps->en |= NV34TCL_TX_ENABLE_ANISO_8X; + } else + if (cso->max_anisotropy >= 4) { + ps->en |= NV34TCL_TX_ENABLE_ANISO_4X; + } else + if (cso->max_anisotropy >= 2) { + ps->en |= NV34TCL_TX_ENABLE_ANISO_2X; + } + + { + float limit; + + limit = CLAMP(cso->lod_bias, -16.0, 15.0); + ps->filt |= (int)(cso->lod_bias * 256.0) & 0x1fff; + + limit = CLAMP(cso->max_lod, 0.0, 15.0); + ps->en |= (int)(limit) << 14 /*NV34TCL_TX_ENABLE_MIPMAP_MAX_LOD_SHIFT*/; + + limit = CLAMP(cso->min_lod, 0.0, 15.0); + ps->en |= (int)(limit) << 26 /*NV34TCL_TX_ENABLE_MIPMAP_MIN_LOD_SHIFT*/; + } +} + +#define _(m,tf,ts0x,ts0y,ts0z,ts0w,ts1x,ts1y,ts1z,ts1w) \ +{ \ + TRUE, \ + PIPE_FORMAT_##m, \ + NV34TCL_TX_FORMAT_FORMAT_##tf, \ + (NV34TCL_TX_SWIZZLE_S0_X_##ts0x | NV34TCL_TX_SWIZZLE_S0_Y_##ts0y | \ + NV34TCL_TX_SWIZZLE_S0_Z_##ts0z | NV34TCL_TX_SWIZZLE_S0_W_##ts0w | \ + NV34TCL_TX_SWIZZLE_S1_X_##ts1x | NV34TCL_TX_SWIZZLE_S1_Y_##ts1y | \ + NV34TCL_TX_SWIZZLE_S1_Z_##ts1z | NV34TCL_TX_SWIZZLE_S1_W_##ts1w) \ +} + +struct nv30_texture_format { + boolean defined; + uint pipe; + int format; + int swizzle; +}; + +static struct nv30_texture_format +nv30_texture_formats[] = { + _(B8G8R8X8_UNORM, A8R8G8B8, S1, S1, S1, ONE, X, Y, Z, W), + _(B8G8R8A8_UNORM, A8R8G8B8, S1, S1, S1, S1, X, Y, Z, W), + _(B5G5R5A1_UNORM, A1R5G5B5, S1, S1, S1, S1, X, Y, Z, W), + _(B4G4R4A4_UNORM, A4R4G4B4, S1, S1, S1, S1, X, Y, Z, W), + _(B5G6R5_UNORM , R5G6B5 , S1, S1, S1, ONE, X, Y, Z, W), + _(L8_UNORM , L8 , S1, S1, S1, ONE, X, X, X, X), + _(A8_UNORM , L8 , ZERO, ZERO, ZERO, S1, X, X, X, X), + _(I8_UNORM , L8 , S1, S1, S1, S1, X, X, X, X), + _(L8A8_UNORM , A8L8 , S1, S1, S1, S1, X, X, X, Y), + _(Z16_UNORM , R5G6B5 , S1, S1, S1, ONE, X, X, X, X), + _(S8Z24_UNORM , A8R8G8B8, S1, S1, S1, ONE, X, X, X, X), + _(DXT1_RGB , DXT1 , S1, S1, S1, ONE, X, Y, Z, W), + _(DXT1_RGBA , DXT1 , S1, S1, S1, S1, X, Y, Z, W), + _(DXT3_RGBA , DXT3 , S1, S1, S1, S1, X, Y, Z, W), + _(DXT5_RGBA , DXT5 , S1, S1, S1, S1, X, Y, Z, W), + {}, +}; + +static struct nv30_texture_format * +nv30_fragtex_format(uint pipe_format) +{ + struct nv30_texture_format *tf = nv30_texture_formats; + + while (tf->defined) { + if (tf->pipe == pipe_format) + return tf; + tf++; + } + + NOUVEAU_ERR("unknown texture format %s\n", util_format_name(pipe_format)); + return NULL; +} + + +struct nouveau_stateobj * +nv30_fragtex_build(struct nvfx_context *nvfx, int unit) +{ + struct nvfx_sampler_state *ps = nvfx->tex_sampler[unit]; + struct nvfx_miptree *nv30mt = nvfx->tex_miptree[unit]; + struct pipe_texture *pt = &nv30mt->base; + struct nouveau_bo *bo = nouveau_bo(nv30mt->buffer); + struct nv30_texture_format *tf; + struct nouveau_stateobj *so; + uint32_t txf, txs; + unsigned tex_flags = NOUVEAU_BO_VRAM | NOUVEAU_BO_GART | NOUVEAU_BO_RD; + + tf = nv30_fragtex_format(pt->format); + if (!tf) + return NULL; + + txf = tf->format; + txf |= ((pt->last_level>0) ? NV34TCL_TX_FORMAT_MIPMAP : 0); + txf |= log2i(pt->width0) << NV34TCL_TX_FORMAT_BASE_SIZE_U_SHIFT; + txf |= log2i(pt->height0) << NV34TCL_TX_FORMAT_BASE_SIZE_V_SHIFT; + txf |= log2i(pt->depth0) << NV34TCL_TX_FORMAT_BASE_SIZE_W_SHIFT; + txf |= NV34TCL_TX_FORMAT_NO_BORDER | 0x10000; + + switch (pt->target) { + case PIPE_TEXTURE_CUBE: + txf |= NV34TCL_TX_FORMAT_CUBIC; + /* fall-through */ + case PIPE_TEXTURE_2D: + txf |= NV34TCL_TX_FORMAT_DIMS_2D; + break; + case PIPE_TEXTURE_3D: + txf |= NV34TCL_TX_FORMAT_DIMS_3D; + break; + case PIPE_TEXTURE_1D: + txf |= NV34TCL_TX_FORMAT_DIMS_1D; + break; + default: + NOUVEAU_ERR("Unknown target %d\n", pt->target); + return NULL; + } + + txs = tf->swizzle; + + so = so_new(1, 8, 2); + so_method(so, nvfx->screen->eng3d, NV34TCL_TX_OFFSET(unit), 8); + so_reloc (so, bo, 0, tex_flags | NOUVEAU_BO_LOW, 0, 0); + so_reloc (so, bo, txf, tex_flags | NOUVEAU_BO_OR, + NV34TCL_TX_FORMAT_DMA0, NV34TCL_TX_FORMAT_DMA1); + so_data (so, ps->wrap); + so_data (so, NV34TCL_TX_ENABLE_ENABLE | ps->en); + so_data (so, txs); + so_data (so, ps->filt | 0x2000 /*voodoo*/); + so_data (so, (pt->width0 << NV34TCL_TX_NPOT_SIZE_W_SHIFT) | + pt->height0); + so_data (so, ps->bcol); + + return so; +} diff --git a/src/gallium/drivers/nvfx/nv30_vertprog.h b/src/gallium/drivers/nvfx/nv30_vertprog.h new file mode 100644 index 0000000000..ec0444c07f --- /dev/null +++ b/src/gallium/drivers/nvfx/nv30_vertprog.h @@ -0,0 +1,169 @@ +#ifndef __NV30_SHADER_H__ +#define __NV30_SHADER_H__ + +/* Vertex programs instruction set + * + * 128bit opcodes, split into 4 32-bit ones for ease of use. + * + * Non-native instructions + * ABS - MOV + NV40_VP_INST0_DEST_ABS + * POW - EX2 + MUL + LG2 + * SUB - ADD, second source negated + * SWZ - MOV + * XPD - + * + * Register access + * - Only one INPUT can be accessed per-instruction (move extras into TEMPs) + * - Only one CONST can be accessed per-instruction (move extras into TEMPs) + * + * Relative Addressing + * According to the value returned for + * MAX_PROGRAM_NATIVE_ADDRESS_REGISTERS_ARB + * + * there are only two address registers available. The destination in the + * ARL instruction is set to TEMP (The temp isn't actually written). + * + * When using vanilla ARB_v_p, the proprietary driver will squish both the + * available ADDRESS regs into the first hardware reg in the X and Y + * components. + * + * To use an address reg as an index into consts, the CONST_SRC is set to + * (const_base + offset) and INDEX_CONST is set. + * + * To access the second address reg use ADDR_REG_SELECT_1. A particular + * component of the address regs is selected with ADDR_SWZ. + * + * Only one address register can be accessed per instruction. + * + * Conditional execution (see NV_vertex_program{2,3} for details) Conditional + * execution of an instruction is enabled by setting COND_TEST_ENABLE, and + * selecting the condition which will allow the test to pass with + * COND_{FL,LT,...}. It is possible to swizzle the values in the condition + * register, which allows for testing against an individual component. + * + * Branching: + * + * The BRA/CAL instructions seem to follow a slightly different opcode + * layout. The destination instruction ID (IADDR) overlaps a source field. + * Instruction ID's seem to be numbered based on the UPLOAD_FROM_ID FIFO + * command, and is incremented automatically on each UPLOAD_INST FIFO + * command. + * + * Conditional branching is achieved by using the condition tests described + * above. There doesn't appear to be dedicated looping instructions, but + * this can be done using a temp reg + conditional branching. + * + * Subroutines may be uploaded before the main program itself, but the first + * executed instruction is determined by the PROGRAM_START_ID FIFO command. + * + */ + +/* DWORD 0 */ + +#define NV30_VP_INST_ADDR_REG_SELECT_1 (1 << 24) +#define NV30_VP_INST_SRC2_ABS (1 << 23) /* guess */ +#define NV30_VP_INST_SRC1_ABS (1 << 22) /* guess */ +#define NV30_VP_INST_SRC0_ABS (1 << 21) /* guess */ +#define NV30_VP_INST_VEC_RESULT (1 << 20) +#define NV30_VP_INST_DEST_TEMP_ID_SHIFT 16 +#define NV30_VP_INST_DEST_TEMP_ID_MASK (0x0F << 16) +#define NV30_VP_INST_COND_UPDATE_ENABLE (1<<15) +#define NV30_VP_INST_VEC_DEST_TEMP_MASK (0xF << 16) +#define NV30_VP_INST_COND_TEST_ENABLE (1<<14) +#define NV30_VP_INST_COND_SHIFT 11 +#define NV30_VP_INST_COND_MASK (0x07 << 11) +#define NV30_VP_INST_COND_SWZ_X_SHIFT 9 +#define NV30_VP_INST_COND_SWZ_X_MASK (0x03 << 9) +#define NV30_VP_INST_COND_SWZ_Y_SHIFT 7 +#define NV30_VP_INST_COND_SWZ_Y_MASK (0x03 << 7) +#define NV30_VP_INST_COND_SWZ_Z_SHIFT 5 +#define NV30_VP_INST_COND_SWZ_Z_MASK (0x03 << 5) +#define NV30_VP_INST_COND_SWZ_W_SHIFT 3 +#define NV30_VP_INST_COND_SWZ_W_MASK (0x03 << 3) +#define NV30_VP_INST_COND_SWZ_ALL_SHIFT 3 +#define NV30_VP_INST_COND_SWZ_ALL_MASK (0xFF << 3) +#define NV30_VP_INST_ADDR_SWZ_SHIFT 1 +#define NV30_VP_INST_ADDR_SWZ_MASK (0x03 << 1) +#define NV30_VP_INST_SCA_OPCODEH_SHIFT 0 +#define NV30_VP_INST_SCA_OPCODEH_MASK (0x01 << 0) + +/* DWORD 1 */ +#define NV30_VP_INST_SCA_OPCODEL_SHIFT 28 +#define NV30_VP_INST_SCA_OPCODEL_MASK (0x0F << 28) +#define NV30_VP_INST_VEC_OPCODE_SHIFT 23 +#define NV30_VP_INST_VEC_OPCODE_MASK (0x1F << 23) +#define NV30_VP_INST_CONST_SRC_SHIFT 14 +#define NV30_VP_INST_CONST_SRC_MASK (0xFF << 14) +#define NV30_VP_INST_INPUT_SRC_SHIFT 9 /*NV20*/ +#define NV30_VP_INST_INPUT_SRC_MASK (0x0F << 9) /*NV20*/ +#define NV30_VP_INST_SRC0H_SHIFT 0 /*NV20*/ +#define NV30_VP_INST_SRC0H_MASK (0x1FF << 0) /*NV20*/ + +/* Please note: the IADDR fields overlap other fields because they are used + * only for branch instructions. See Branching: label above + * + * DWORD 2 + */ +#define NV30_VP_INST_SRC0L_SHIFT 26 /*NV20*/ +#define NV30_VP_INST_SRC0L_MASK (0x3F <<26) /* NV30_VP_SRC0_LOW_MASK << 26 */ +#define NV30_VP_INST_SRC1_SHIFT 11 /*NV20*/ +#define NV30_VP_INST_SRC1_MASK (0x7FFF<<11) /*NV20*/ +#define NV30_VP_INST_SRC2H_SHIFT 0 /*NV20*/ +#define NV30_VP_INST_SRC2H_MASK (0x7FF << 0) /* NV30_VP_SRC2_HIGH_MASK >> 4*/ +#define NV30_VP_INST_IADDR_SHIFT 2 +#define NV30_VP_INST_IADDR_MASK (0xF << 28) /* NV30_VP_SRC2_LOW_MASK << 28 */ + +/* DWORD 3 */ +#define NV30_VP_INST_SRC2L_SHIFT 28 /*NV20*/ +#define NV30_VP_INST_SRC2L_MASK (0x0F <<28) /*NV20*/ +#define NV30_VP_INST_STEMP_WRITEMASK_SHIFT 24 +#define NV30_VP_INST_STEMP_WRITEMASK_MASK (0x0F << 24) +#define NV30_VP_INST_VTEMP_WRITEMASK_SHIFT 20 +#define NV30_VP_INST_VTEMP_WRITEMASK_MASK (0x0F << 20) +#define NV30_VP_INST_SDEST_WRITEMASK_SHIFT 16 +#define NV30_VP_INST_SDEST_WRITEMASK_MASK (0x0F << 16) +#define NV30_VP_INST_VDEST_WRITEMASK_SHIFT 12 /*NV20*/ +#define NV30_VP_INST_VDEST_WRITEMASK_MASK (0x0F << 12) /*NV20*/ +#define NV30_VP_INST_DEST_SHIFT 2 +#define NV30_VP_INST_DEST_MASK (0x0F << 2) +# define NV30_VP_INST_DEST_POS 0 +# define NV30_VP_INST_DEST_BFC0 1 +# define NV30_VP_INST_DEST_BFC1 2 +# define NV30_VP_INST_DEST_COL0 3 +# define NV30_VP_INST_DEST_COL1 4 +# define NV30_VP_INST_DEST_FOGC 5 +# define NV30_VP_INST_DEST_PSZ 6 +# define NV30_VP_INST_DEST_TC(n) (8+n) + +/* Useful to split the source selection regs into their pieces */ +#define NV30_VP_SRC0_HIGH_SHIFT 6 +#define NV30_VP_SRC0_HIGH_MASK 0x00007FC0 +#define NV30_VP_SRC0_LOW_MASK 0x0000003F +#define NV30_VP_SRC2_HIGH_SHIFT 4 +#define NV30_VP_SRC2_HIGH_MASK 0x00007FF0 +#define NV30_VP_SRC2_LOW_MASK 0x0000000F + + +/* Source-register definition - matches NV20 exactly */ +#define NV30_VP_SRC_NEGATE (1<<14) +#define NV30_VP_SRC_SWZ_X_SHIFT 12 +#define NV30_VP_SRC_REG_SWZ_X_MASK (0x03 <<12) +#define NV30_VP_SRC_SWZ_Y_SHIFT 10 +#define NV30_VP_SRC_REG_SWZ_Y_MASK (0x03 <<10) +#define NV30_VP_SRC_SWZ_Z_SHIFT 8 +#define NV30_VP_SRC_REG_SWZ_Z_MASK (0x03 << 8) +#define NV30_VP_SRC_SWZ_W_SHIFT 6 +#define NV30_VP_SRC_REG_SWZ_W_MASK (0x03 << 6) +#define NV30_VP_SRC_REG_SWZ_ALL_SHIFT 6 +#define NV30_VP_SRC_REG_SWZ_ALL_MASK (0xFF << 6) +#define NV30_VP_SRC_TEMP_SRC_SHIFT 2 +#define NV30_VP_SRC_REG_TEMP_ID_MASK (0x0F << 0) +#define NV30_VP_SRC_REG_TYPE_SHIFT 0 +#define NV30_VP_SRC_REG_TYPE_MASK (0x03 << 0) +#define NV30_VP_SRC_REG_TYPE_TEMP 1 +#define NV30_VP_SRC_REG_TYPE_INPUT 2 +#define NV30_VP_SRC_REG_TYPE_CONST 3 /* guess */ + +#include "nvfx_shader.h" + +#endif diff --git a/src/gallium/drivers/nvfx/nv40_fragtex.c b/src/gallium/drivers/nvfx/nv40_fragtex.c new file mode 100644 index 0000000000..5889b5e40d --- /dev/null +++ b/src/gallium/drivers/nvfx/nv40_fragtex.c @@ -0,0 +1,174 @@ +#include "util/u_format.h" +#include "nvfx_context.h" +#include "nvfx_tex.h" + +void +nv40_sampler_state_init(struct pipe_context *pipe, + struct nvfx_sampler_state *ps, + const struct pipe_sampler_state *cso) +{ + if (cso->max_anisotropy >= 2) { + /* no idea, binary driver sets it, works without it.. meh.. */ + ps->wrap |= (1 << 5); + + if (cso->max_anisotropy >= 16) { + ps->en |= NV40TCL_TEX_ENABLE_ANISO_16X; + } else + if (cso->max_anisotropy >= 12) { + ps->en |= NV40TCL_TEX_ENABLE_ANISO_12X; + } else + if (cso->max_anisotropy >= 10) { + ps->en |= NV40TCL_TEX_ENABLE_ANISO_10X; + } else + if (cso->max_anisotropy >= 8) { + ps->en |= NV40TCL_TEX_ENABLE_ANISO_8X; + } else + if (cso->max_anisotropy >= 6) { + ps->en |= NV40TCL_TEX_ENABLE_ANISO_6X; + } else + if (cso->max_anisotropy >= 4) { + ps->en |= NV40TCL_TEX_ENABLE_ANISO_4X; + } else { + ps->en |= NV40TCL_TEX_ENABLE_ANISO_2X; + } + } + + { + float limit; + + limit = CLAMP(cso->lod_bias, -16.0, 15.0); + ps->filt |= (int)(cso->lod_bias * 256.0) & 0x1fff; + + limit = CLAMP(cso->max_lod, 0.0, 15.0); + ps->en |= (int)(limit * 256.0) << 7; + + limit = CLAMP(cso->min_lod, 0.0, 15.0); + ps->en |= (int)(limit * 256.0) << 19; + } +} + +#define _(m,tf,ts0x,ts0y,ts0z,ts0w,ts1x,ts1y,ts1z,ts1w,sx,sy,sz,sw) \ +{ \ + TRUE, \ + PIPE_FORMAT_##m, \ + NV40TCL_TEX_FORMAT_FORMAT_##tf, \ + (NV34TCL_TX_SWIZZLE_S0_X_##ts0x | NV34TCL_TX_SWIZZLE_S0_Y_##ts0y | \ + NV34TCL_TX_SWIZZLE_S0_Z_##ts0z | NV34TCL_TX_SWIZZLE_S0_W_##ts0w | \ + NV34TCL_TX_SWIZZLE_S1_X_##ts1x | NV34TCL_TX_SWIZZLE_S1_Y_##ts1y | \ + NV34TCL_TX_SWIZZLE_S1_Z_##ts1z | NV34TCL_TX_SWIZZLE_S1_W_##ts1w), \ + ((NV34TCL_TX_FILTER_SIGNED_RED*sx) | (NV34TCL_TX_FILTER_SIGNED_GREEN*sy) | \ + (NV34TCL_TX_FILTER_SIGNED_BLUE*sz) | (NV34TCL_TX_FILTER_SIGNED_ALPHA*sw)) \ +} + +struct nv40_texture_format { + boolean defined; + uint pipe; + int format; + int swizzle; + int sign; +}; + +static struct nv40_texture_format +nv40_texture_formats[] = { + _(B8G8R8X8_UNORM, A8R8G8B8, S1, S1, S1, ONE, X, Y, Z, W, 0, 0, 0, 0), + _(B8G8R8A8_UNORM, A8R8G8B8, S1, S1, S1, S1, X, Y, Z, W, 0, 0, 0, 0), + _(B5G5R5A1_UNORM, A1R5G5B5, S1, S1, S1, S1, X, Y, Z, W, 0, 0, 0, 0), + _(B4G4R4A4_UNORM, A4R4G4B4, S1, S1, S1, S1, X, Y, Z, W, 0, 0, 0, 0), + _(B5G6R5_UNORM , R5G6B5 , S1, S1, S1, ONE, X, Y, Z, W, 0, 0, 0, 0), + _(L8_UNORM , L8 , S1, S1, S1, ONE, X, X, X, X, 0, 0, 0, 0), + _(A8_UNORM , L8 , ZERO, ZERO, ZERO, S1, X, X, X, X, 0, 0, 0, 0), + _(R16_SNORM , A16 , ZERO, ZERO, S1, ONE, X, X, X, Y, 1, 1, 1, 1), + _(I8_UNORM , L8 , S1, S1, S1, S1, X, X, X, X, 0, 0, 0, 0), + _(L8A8_UNORM , A8L8 , S1, S1, S1, S1, X, X, X, Y, 0, 0, 0, 0), + _(Z16_UNORM , Z16 , S1, S1, S1, ONE, X, X, X, X, 0, 0, 0, 0), + _(S8Z24_UNORM , Z24 , S1, S1, S1, ONE, X, X, X, X, 0, 0, 0, 0), + _(DXT1_RGB , DXT1 , S1, S1, S1, ONE, X, Y, Z, W, 0, 0, 0, 0), + _(DXT1_RGBA , DXT1 , S1, S1, S1, S1, X, Y, Z, W, 0, 0, 0, 0), + _(DXT3_RGBA , DXT3 , S1, S1, S1, S1, X, Y, Z, W, 0, 0, 0, 0), + _(DXT5_RGBA , DXT5 , S1, S1, S1, S1, X, Y, Z, W, 0, 0, 0, 0), + {}, +}; + +static struct nv40_texture_format * +nv40_fragtex_format(uint pipe_format) +{ + struct nv40_texture_format *tf = nv40_texture_formats; + + while (tf->defined) { + if (tf->pipe == pipe_format) + return tf; + tf++; + } + + NOUVEAU_ERR("unknown texture format %s\n", util_format_name(pipe_format)); + return NULL; +} + + +struct nouveau_stateobj * +nv40_fragtex_build(struct nvfx_context *nvfx, int unit) +{ + struct nvfx_sampler_state *ps = nvfx->tex_sampler[unit]; + struct nvfx_miptree *nv40mt = nvfx->tex_miptree[unit]; + struct nouveau_bo *bo = nouveau_bo(nv40mt->buffer); + struct pipe_texture *pt = &nv40mt->base; + struct nv40_texture_format *tf; + struct nouveau_stateobj *so; + uint32_t txf, txs, txp; + unsigned tex_flags = NOUVEAU_BO_VRAM | NOUVEAU_BO_GART | NOUVEAU_BO_RD; + + tf = nv40_fragtex_format(pt->format); + if (!tf) + assert(0); + + txf = ps->fmt; + txf |= tf->format | 0x8000; + txf |= ((pt->last_level + 1) << NV40TCL_TEX_FORMAT_MIPMAP_COUNT_SHIFT); + + if (1) /* XXX */ + txf |= NV34TCL_TX_FORMAT_NO_BORDER; + + switch (pt->target) { + case PIPE_TEXTURE_CUBE: + txf |= NV34TCL_TX_FORMAT_CUBIC; + /* fall-through */ + case PIPE_TEXTURE_2D: + txf |= NV34TCL_TX_FORMAT_DIMS_2D; + break; + case PIPE_TEXTURE_3D: + txf |= NV34TCL_TX_FORMAT_DIMS_3D; + break; + case PIPE_TEXTURE_1D: + txf |= NV34TCL_TX_FORMAT_DIMS_1D; + break; + default: + NOUVEAU_ERR("Unknown target %d\n", pt->target); + return NULL; + } + + if (!(pt->tex_usage & NOUVEAU_TEXTURE_USAGE_LINEAR)) { + txp = 0; + } else { + txp = nv40mt->level[0].pitch; + txf |= NV40TCL_TEX_FORMAT_LINEAR; + } + + txs = tf->swizzle; + + so = so_new(2, 9, 2); + so_method(so, nvfx->screen->eng3d, NV34TCL_TX_OFFSET(unit), 8); + so_reloc (so, bo, 0, tex_flags | NOUVEAU_BO_LOW, 0, 0); + so_reloc (so, bo, txf, tex_flags | NOUVEAU_BO_OR, + NV34TCL_TX_FORMAT_DMA0, NV34TCL_TX_FORMAT_DMA1); + so_data (so, ps->wrap); + so_data (so, NV40TCL_TEX_ENABLE_ENABLE | ps->en); + so_data (so, txs); + so_data (so, ps->filt | tf->sign | 0x2000 /*voodoo*/); + so_data (so, (pt->width0 << NV34TCL_TX_NPOT_SIZE_W_SHIFT) | + pt->height0); + so_data (so, ps->bcol); + so_method(so, nvfx->screen->eng3d, NV40TCL_TEX_SIZE1(unit), 1); + so_data (so, (pt->depth0 << NV40TCL_TEX_SIZE1_DEPTH_SHIFT) | txp); + + return so; +} diff --git a/src/gallium/drivers/nvfx/nv40_vertprog.h b/src/gallium/drivers/nvfx/nv40_vertprog.h new file mode 100644 index 0000000000..7337293bab --- /dev/null +++ b/src/gallium/drivers/nvfx/nv40_vertprog.h @@ -0,0 +1,177 @@ +#ifndef __NV40_SHADER_H__ +#define __NV40_SHADER_H__ + +/* Vertex programs instruction set + * + * The NV40 instruction set is very similar to NV30. Most fields are in + * a slightly different position in the instruction however. + * + * Merged instructions + * In some cases it is possible to put two instructions into one opcode + * slot. The rules for when this is OK is not entirely clear to me yet. + * + * There are separate writemasks and dest temp register fields for each + * grouping of instructions. There is however only one field with the + * ID of a result register. Writing to temp/result regs is selected by + * setting VEC_RESULT/SCA_RESULT. + * + * Temporary registers + * The source/dest temp register fields have been extended by 1 bit, to + * give a total of 32 temporary registers. + * + * Relative Addressing + * NV40 can use an address register to index into vertex attribute regs. + * This is done by putting the offset value into INPUT_SRC and setting + * the INDEX_INPUT flag. + * + * Conditional execution (see NV_vertex_program{2,3} for details) + * There is a second condition code register on NV40, it's use is enabled + * by setting the COND_REG_SELECT_1 flag. + * + * Texture lookup + * TODO + */ + +/* ---- OPCODE BITS 127:96 / data DWORD 0 --- */ +#define NV40_VP_INST_VEC_RESULT (1 << 30) +/* uncertain.. */ +#define NV40_VP_INST_COND_UPDATE_ENABLE ((1 << 14)|1<<29) +/* use address reg as index into attribs */ +#define NV40_VP_INST_INDEX_INPUT (1 << 27) +#define NV40_VP_INST_COND_REG_SELECT_1 (1 << 25) +#define NV40_VP_INST_ADDR_REG_SELECT_1 (1 << 24) +#define NV40_VP_INST_SRC2_ABS (1 << 23) +#define NV40_VP_INST_SRC1_ABS (1 << 22) +#define NV40_VP_INST_SRC0_ABS (1 << 21) +#define NV40_VP_INST_VEC_DEST_TEMP_SHIFT 15 +#define NV40_VP_INST_VEC_DEST_TEMP_MASK (0x1F << 15) +#define NV40_VP_INST_COND_TEST_ENABLE (1 << 13) +#define NV40_VP_INST_COND_SHIFT 10 +#define NV40_VP_INST_COND_MASK (0x7 << 10) +#define NV40_VP_INST_COND_SWZ_X_SHIFT 8 +#define NV40_VP_INST_COND_SWZ_X_MASK (3 << 8) +#define NV40_VP_INST_COND_SWZ_Y_SHIFT 6 +#define NV40_VP_INST_COND_SWZ_Y_MASK (3 << 6) +#define NV40_VP_INST_COND_SWZ_Z_SHIFT 4 +#define NV40_VP_INST_COND_SWZ_Z_MASK (3 << 4) +#define NV40_VP_INST_COND_SWZ_W_SHIFT 2 +#define NV40_VP_INST_COND_SWZ_W_MASK (3 << 2) +#define NV40_VP_INST_COND_SWZ_ALL_SHIFT 2 +#define NV40_VP_INST_COND_SWZ_ALL_MASK (0xFF << 2) +#define NV40_VP_INST_ADDR_SWZ_SHIFT 0 +#define NV40_VP_INST_ADDR_SWZ_MASK (0x03 << 0) +#define NV40_VP_INST0_KNOWN ( \ + NV40_VP_INST_INDEX_INPUT | \ + NV40_VP_INST_COND_REG_SELECT_1 | \ + NV40_VP_INST_ADDR_REG_SELECT_1 | \ + NV40_VP_INST_SRC2_ABS | \ + NV40_VP_INST_SRC1_ABS | \ + NV40_VP_INST_SRC0_ABS | \ + NV40_VP_INST_VEC_DEST_TEMP_MASK | \ + NV40_VP_INST_COND_TEST_ENABLE | \ + NV40_VP_INST_COND_MASK | \ + NV40_VP_INST_COND_SWZ_ALL_MASK | \ + NV40_VP_INST_ADDR_SWZ_MASK) + +/* ---- OPCODE BITS 95:64 / data DWORD 1 --- */ +#define NV40_VP_INST_VEC_OPCODE_SHIFT 22 +#define NV40_VP_INST_VEC_OPCODE_MASK (0x1F << 22) +#define NV40_VP_INST_SCA_OPCODE_SHIFT 27 +#define NV40_VP_INST_SCA_OPCODE_MASK (0x1F << 27) +#define NV40_VP_INST_CONST_SRC_SHIFT 12 +#define NV40_VP_INST_CONST_SRC_MASK (0xFF << 12) +#define NV40_VP_INST_INPUT_SRC_SHIFT 8 +#define NV40_VP_INST_INPUT_SRC_MASK (0x0F << 8) +#define NV40_VP_INST_SRC0H_SHIFT 0 +#define NV40_VP_INST_SRC0H_MASK (0xFF << 0) +#define NV40_VP_INST1_KNOWN ( \ + NV40_VP_INST_VEC_OPCODE_MASK | \ + NV40_VP_INST_SCA_OPCODE_MASK | \ + NV40_VP_INST_CONST_SRC_MASK | \ + NV40_VP_INST_INPUT_SRC_MASK | \ + NV40_VP_INST_SRC0H_MASK \ + ) + +/* ---- OPCODE BITS 63:32 / data DWORD 2 --- */ +#define NV40_VP_INST_SRC0L_SHIFT 23 +#define NV40_VP_INST_SRC0L_MASK (0x1FF << 23) +#define NV40_VP_INST_SRC1_SHIFT 6 +#define NV40_VP_INST_SRC1_MASK (0x1FFFF << 6) +#define NV40_VP_INST_SRC2H_SHIFT 0 +#define NV40_VP_INST_SRC2H_MASK (0x3F << 0) +#define NV40_VP_INST_IADDRH_SHIFT 0 +#define NV40_VP_INST_IADDRH_MASK (0x1F << 0) + +/* ---- OPCODE BITS 31:0 / data DWORD 3 --- */ +#define NV40_VP_INST_IADDRL_SHIFT 29 +#define NV40_VP_INST_IADDRL_MASK (7 << 29) +#define NV40_VP_INST_SRC2L_SHIFT 21 +#define NV40_VP_INST_SRC2L_MASK (0x7FF << 21) +#define NV40_VP_INST_SCA_WRITEMASK_SHIFT 17 +#define NV40_VP_INST_SCA_WRITEMASK_MASK (0xF << 17) +# define NV40_VP_INST_SCA_WRITEMASK_X (1 << 20) +# define NV40_VP_INST_SCA_WRITEMASK_Y (1 << 19) +# define NV40_VP_INST_SCA_WRITEMASK_Z (1 << 18) +# define NV40_VP_INST_SCA_WRITEMASK_W (1 << 17) +#define NV40_VP_INST_VEC_WRITEMASK_SHIFT 13 +#define NV40_VP_INST_VEC_WRITEMASK_MASK (0xF << 13) +# define NV40_VP_INST_VEC_WRITEMASK_X (1 << 16) +# define NV40_VP_INST_VEC_WRITEMASK_Y (1 << 15) +# define NV40_VP_INST_VEC_WRITEMASK_Z (1 << 14) +# define NV40_VP_INST_VEC_WRITEMASK_W (1 << 13) +#define NV40_VP_INST_SCA_RESULT (1 << 12) +#define NV40_VP_INST_SCA_DEST_TEMP_SHIFT 7 +#define NV40_VP_INST_SCA_DEST_TEMP_MASK (0x1F << 7) +#define NV40_VP_INST_DEST_SHIFT 2 +#define NV40_VP_INST_DEST_MASK (31 << 2) +# define NV40_VP_INST_DEST_POS 0 +# define NV40_VP_INST_DEST_COL0 1 +# define NV40_VP_INST_DEST_COL1 2 +# define NV40_VP_INST_DEST_BFC0 3 +# define NV40_VP_INST_DEST_BFC1 4 +# define NV40_VP_INST_DEST_FOGC 5 +# define NV40_VP_INST_DEST_PSZ 6 +# define NV40_VP_INST_DEST_TC0 7 +# define NV40_VP_INST_DEST_TC(n) (7+n) +# define NV40_VP_INST_DEST_TEMP 0x1F +#define NV40_VP_INST_INDEX_CONST (1 << 1) +#define NV40_VP_INST3_KNOWN ( \ + NV40_VP_INST_SRC2L_MASK |\ + NV40_VP_INST_SCA_WRITEMASK_MASK |\ + NV40_VP_INST_VEC_WRITEMASK_MASK |\ + NV40_VP_INST_SCA_DEST_TEMP_MASK |\ + NV40_VP_INST_DEST_MASK |\ + NV40_VP_INST_INDEX_CONST) + +/* Useful to split the source selection regs into their pieces */ +#define NV40_VP_SRC0_HIGH_SHIFT 9 +#define NV40_VP_SRC0_HIGH_MASK 0x0001FE00 +#define NV40_VP_SRC0_LOW_MASK 0x000001FF +#define NV40_VP_SRC2_HIGH_SHIFT 11 +#define NV40_VP_SRC2_HIGH_MASK 0x0001F800 +#define NV40_VP_SRC2_LOW_MASK 0x000007FF + +/* Source selection - these are the bits you fill NV40_VP_INST_SRCn with */ +#define NV40_VP_SRC_NEGATE (1 << 16) +#define NV40_VP_SRC_SWZ_X_SHIFT 14 +#define NV40_VP_SRC_SWZ_X_MASK (3 << 14) +#define NV40_VP_SRC_SWZ_Y_SHIFT 12 +#define NV40_VP_SRC_SWZ_Y_MASK (3 << 12) +#define NV40_VP_SRC_SWZ_Z_SHIFT 10 +#define NV40_VP_SRC_SWZ_Z_MASK (3 << 10) +#define NV40_VP_SRC_SWZ_W_SHIFT 8 +#define NV40_VP_SRC_SWZ_W_MASK (3 << 8) +#define NV40_VP_SRC_SWZ_ALL_SHIFT 8 +#define NV40_VP_SRC_SWZ_ALL_MASK (0xFF << 8) +#define NV40_VP_SRC_TEMP_SRC_SHIFT 2 +#define NV40_VP_SRC_TEMP_SRC_MASK (0x1F << 2) +#define NV40_VP_SRC_REG_TYPE_SHIFT 0 +#define NV40_VP_SRC_REG_TYPE_MASK (3 << 0) +# define NV40_VP_SRC_REG_TYPE_UNK0 0 +# define NV40_VP_SRC_REG_TYPE_TEMP 1 +# define NV40_VP_SRC_REG_TYPE_INPUT 2 +# define NV40_VP_SRC_REG_TYPE_CONST 3 + +#include "nvfx_shader.h" + +#endif diff --git a/src/gallium/drivers/nvfx/nvfx_draw.c b/src/gallium/drivers/nvfx/nvfx_draw.c index 8700e14329..7308f0667c 100644 --- a/src/gallium/drivers/nvfx/nvfx_draw.c +++ b/src/gallium/drivers/nvfx/nvfx_draw.c @@ -9,8 +9,8 @@ #include "nvfx_context.h" #define NVFX_SHADER_NO_FUCKEDNESS -#include "nv30/nv30_shader.h" -#include "nv40/nv40_shader.h" +#include "nv30_vertprog.h" +#include "nv40_vertprog.h" /* Simple, but crappy, swtnl path, hopefully we wont need to hit this very * often at all. Uses "quadro style" vertex submission + a fixed vertex diff --git a/src/gallium/drivers/nvfx/nvfx_vertprog.c b/src/gallium/drivers/nvfx/nvfx_vertprog.c index 730361a982..3d0e8c23a1 100644 --- a/src/gallium/drivers/nvfx/nvfx_vertprog.c +++ b/src/gallium/drivers/nvfx/nvfx_vertprog.c @@ -33,8 +33,8 @@ #define MASK_ALL (MASK_X|MASK_Y|MASK_Z|MASK_W) #define DEF_SCALE 0 #define DEF_CTEST 0 -#include "nv30/nv30_shader.h" -#include "nv40/nv40_shader.h" +#include "nv30_vertprog.h" +#include "nv40_vertprog.h" #define swz(s,x,y,z,w) nvfx_sr_swz((s), SWZ_##x, SWZ_##y, SWZ_##z, SWZ_##w) #define neg(s) nvfx_sr_neg((s)) diff --git a/src/gallium/winsys/drm/nouveau/dri/Makefile b/src/gallium/winsys/drm/nouveau/dri/Makefile index 0cc60395ff..50ac3f203e 100644 --- a/src/gallium/winsys/drm/nouveau/dri/Makefile +++ b/src/gallium/winsys/drm/nouveau/dri/Makefile @@ -3,18 +3,10 @@ include $(TOP)/configs/current LIBNAME = nouveau_dri.so -# hideous hack --Wl,--start-group: --Wl,--end-group: - PIPE_DRIVERS = \ $(TOP)/src/gallium/state_trackers/dri/libdridrm.a \ $(TOP)/src/gallium/winsys/drm/nouveau/drm/libnouveaudrm.a \ - -Wl,--start-group \ - $(TOP)/src/gallium/drivers/nv30/libnv30.a \ - $(TOP)/src/gallium/drivers/nv40/libnv40.a \ $(TOP)/src/gallium/drivers/nvfx/libnvfx.a \ - -Wl,--end-group \ $(TOP)/src/gallium/drivers/nv50/libnv50.a \ $(TOP)/src/gallium/drivers/nouveau/libnouveau.a diff --git a/src/gallium/winsys/drm/nouveau/egl/Makefile b/src/gallium/winsys/drm/nouveau/egl/Makefile index 0f5e6d64aa..47d1127615 100644 --- a/src/gallium/winsys/drm/nouveau/egl/Makefile +++ b/src/gallium/winsys/drm/nouveau/egl/Makefile @@ -5,17 +5,9 @@ EGL_DRIVER_NAME = nouveau EGL_DRIVER_SOURCES = dummy.c EGL_DRIVER_LIBS = -ldrm_nouveau -# hideous hack --Wl,--start-group: --Wl,--end-group: - EGL_DRIVER_PIPES = \ $(TOP)/src/gallium/winsys/drm/nouveau/drm/libnouveaudrm.a \ - -Wl,--start-group \ - $(TOP)/src/gallium/drivers/nv30/libnv30.a \ - $(TOP)/src/gallium/drivers/nv40/libnv40.a \ - $(TOP)/src/gallium/drivers/nv40/libnvfx.a \ - -Wl,--end-group \ + $(TOP)/src/gallium/drivers/nvfx/libnvfx.a \ $(TOP)/src/gallium/drivers/nv50/libnv50.a \ $(TOP)/src/gallium/drivers/nouveau/libnouveau.a \ $(TOP)/src/gallium/drivers/softpipe/libsoftpipe.a diff --git a/src/gallium/winsys/drm/nouveau/xorg/Makefile b/src/gallium/winsys/drm/nouveau/xorg/Makefile index 0607d82a6e..f7f6fe17dd 100644 --- a/src/gallium/winsys/drm/nouveau/xorg/Makefile +++ b/src/gallium/winsys/drm/nouveau/xorg/Makefile @@ -15,18 +15,10 @@ INCLUDES = \ -I$(TOP)/include \ -I$(TOP)/src/egl/main -# hideous hack --Wl,--start-group: --Wl,--end-group: - LIBS = \ $(TOP)/src/gallium/state_trackers/xorg/libxorgtracker.a \ $(TOP)/src/gallium/winsys/drm/nouveau/drm/libnouveaudrm.a \ - --Wl,--start-group \ - $(TOP)/src/gallium/drivers/nv30/libnv30.a \ - $(TOP)/src/gallium/drivers/nv40/libnv40.a \ - $(TOP)/src/gallium/drivers/nv40/libnvfx.a \ - --Wl,--end-group \ + $(TOP)/src/gallium/drivers/nvfx/libnvfx.a \ $(TOP)/src/gallium/drivers/nv50/libnv50.a \ $(TOP)/src/gallium/drivers/nouveau/libnouveau.a \ $(GALLIUM_AUXILIARIES) -- cgit v1.2.3 From 0192a4a825d3d04b1588bdabad629a9888f325d6 Mon Sep 17 00:00:00 2001 From: Luca Barbieri Date: Tue, 2 Mar 2010 22:51:39 +0100 Subject: nvfx: fix viewport state after bypass removal for swtnl The adjustment of nv30/nv40 after the removal of bypass incorrectly removed the hardware viewport bypass code, which we still need for swtnl and also forgot to remove NVFX_NEW_RAST from pipe. --- src/gallium/drivers/nvfx/nvfx_state_viewport.c | 35 ++++++++++++++++++-------- 1 file changed, 24 insertions(+), 11 deletions(-) (limited to 'src') diff --git a/src/gallium/drivers/nvfx/nvfx_state_viewport.c b/src/gallium/drivers/nvfx/nvfx_state_viewport.c index 72057a80f8..82e0e9220b 100644 --- a/src/gallium/drivers/nvfx/nvfx_state_viewport.c +++ b/src/gallium/drivers/nvfx/nvfx_state_viewport.c @@ -13,16 +13,29 @@ nvfx_state_viewport_validate(struct nvfx_context *nvfx) so = so_new(2, 9, 0); so_method(so, nvfx->screen->eng3d, NV34TCL_VIEWPORT_TRANSLATE_X, 8); - so_data (so, fui(vpt->translate[0])); - so_data (so, fui(vpt->translate[1])); - so_data (so, fui(vpt->translate[2])); - so_data (so, fui(vpt->translate[3])); - so_data (so, fui(vpt->scale[0])); - so_data (so, fui(vpt->scale[1])); - so_data (so, fui(vpt->scale[2])); - so_data (so, fui(vpt->scale[3])); - so_method(so, nvfx->screen->eng3d, 0x1d78, 1); - so_data (so, 1); + if(nvfx->render_mode == HW) { + so_data (so, fui(vpt->translate[0])); + so_data (so, fui(vpt->translate[1])); + so_data (so, fui(vpt->translate[2])); + so_data (so, fui(vpt->translate[3])); + so_data (so, fui(vpt->scale[0])); + so_data (so, fui(vpt->scale[1])); + so_data (so, fui(vpt->scale[2])); + so_data (so, fui(vpt->scale[3])); + so_method(so, nvfx->screen->eng3d, 0x1d78, 1); + so_data (so, 1); + } else { + so_data (so, fui(0.0f)); + so_data (so, fui(0.0f)); + so_data (so, fui(0.0f)); + so_data (so, fui(0.0f)); + so_data (so, fui(1.0f)); + so_data (so, fui(1.0f)); + so_data (so, fui(1.0f)); + so_data (so, fui(1.0f)); + so_method(so, nvfx->screen->eng3d, 0x1d78, 1); + so_data (so, nvfx->is_nv4x ? 0x110 : 1); + } so_ref(so, &nvfx->state.hw[NVFX_STATE_VIEWPORT]); so_ref(NULL, &so); @@ -32,7 +45,7 @@ nvfx_state_viewport_validate(struct nvfx_context *nvfx) struct nvfx_state_entry nvfx_state_viewport = { .validate = nvfx_state_viewport_validate, .dirty = { - .pipe = NVFX_NEW_VIEWPORT | NVFX_NEW_RAST, + .pipe = NVFX_NEW_VIEWPORT, .hw = NVFX_STATE_VIEWPORT } }; -- cgit v1.2.3 From e1580ce4c9ec1175296504c0ae9f26d9d8e0e635 Mon Sep 17 00:00:00 2001 From: Luca Barbieri Date: Mon, 22 Feb 2010 14:13:17 +0100 Subject: nvfx: fix quads drawing The primitive splitting code is totally broken and will be rewritten. Fix the most important bug now though. --- src/gallium/drivers/nouveau/nouveau_util.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'src') diff --git a/src/gallium/drivers/nouveau/nouveau_util.h b/src/gallium/drivers/nouveau/nouveau_util.h index 7f16e31c3f..ab7761a31d 100644 --- a/src/gallium/drivers/nouveau/nouveau_util.h +++ b/src/gallium/drivers/nouveau/nouveau_util.h @@ -33,7 +33,7 @@ nouveau_vbuf_split(unsigned remaining, unsigned overhead, unsigned vpp, max = max - (max % 3); break; case PIPE_PRIM_QUADS: - max = max & 3; + max = max & ~3; break; case PIPE_PRIM_LINE_LOOP: case PIPE_PRIM_LINE_STRIP: -- cgit v1.2.3 From dbe63ed3b688fc1b2714d1418a031210c9e00d3b Mon Sep 17 00:00:00 2001 From: Luca Barbieri Date: Mon, 22 Feb 2010 20:14:32 +0100 Subject: nvfx: move nv04_surface_2d.c into nvfx directory It is only used on pre-nv50 and nvfx is the only Gallium pre-nv50 driver. --- src/gallium/drivers/nouveau/Makefile | 3 +- src/gallium/drivers/nouveau/nv04_surface_2d.c | 546 -------------------------- src/gallium/drivers/nouveau/nv04_surface_2d.h | 37 -- src/gallium/drivers/nvfx/Makefile | 1 + src/gallium/drivers/nvfx/nv04_surface_2d.c | 545 +++++++++++++++++++++++++ src/gallium/drivers/nvfx/nv04_surface_2d.h | 37 ++ src/gallium/drivers/nvfx/nvfx_miptree.c | 2 +- src/gallium/drivers/nvfx/nvfx_screen.h | 2 +- 8 files changed, 586 insertions(+), 587 deletions(-) delete mode 100644 src/gallium/drivers/nouveau/nv04_surface_2d.c delete mode 100644 src/gallium/drivers/nouveau/nv04_surface_2d.h create mode 100644 src/gallium/drivers/nvfx/nv04_surface_2d.c create mode 100644 src/gallium/drivers/nvfx/nv04_surface_2d.h (limited to 'src') diff --git a/src/gallium/drivers/nouveau/Makefile b/src/gallium/drivers/nouveau/Makefile index 0e02680bc6..0cb66041d5 100644 --- a/src/gallium/drivers/nouveau/Makefile +++ b/src/gallium/drivers/nouveau/Makefile @@ -4,7 +4,6 @@ include $(TOP)/configs/current LIBNAME = nouveau C_SOURCES = nouveau_screen.c \ - nouveau_context.c \ - nv04_surface_2d.c + nouveau_context.c include ../../Makefile.template diff --git a/src/gallium/drivers/nouveau/nv04_surface_2d.c b/src/gallium/drivers/nouveau/nv04_surface_2d.c deleted file mode 100644 index 93114465d5..0000000000 --- a/src/gallium/drivers/nouveau/nv04_surface_2d.c +++ /dev/null @@ -1,546 +0,0 @@ -#include "pipe/p_context.h" -#include "pipe/p_format.h" -#include "util/u_format.h" -#include "util/u_math.h" -#include "util/u_memory.h" - -#include "nouveau/nouveau_winsys.h" -#include "nouveau/nouveau_util.h" -#include "nouveau/nouveau_screen.h" -#include "nv04_surface_2d.h" - -static INLINE int -nv04_surface_format(enum pipe_format format) -{ - switch (format) { - case PIPE_FORMAT_A8_UNORM: - case PIPE_FORMAT_L8_UNORM: - case PIPE_FORMAT_I8_UNORM: - return NV04_CONTEXT_SURFACES_2D_FORMAT_Y8; - case PIPE_FORMAT_R16_SNORM: - case PIPE_FORMAT_B5G6R5_UNORM: - case PIPE_FORMAT_Z16_UNORM: - case PIPE_FORMAT_L8A8_UNORM: - return NV04_CONTEXT_SURFACES_2D_FORMAT_R5G6B5; - case PIPE_FORMAT_B8G8R8X8_UNORM: - case PIPE_FORMAT_B8G8R8A8_UNORM: - return NV04_CONTEXT_SURFACES_2D_FORMAT_A8R8G8B8; - case PIPE_FORMAT_S8Z24_UNORM: - case PIPE_FORMAT_X8Z24_UNORM: - return NV04_CONTEXT_SURFACES_2D_FORMAT_Y32; - default: - return -1; - } -} - -static INLINE int -nv04_rect_format(enum pipe_format format) -{ - switch (format) { - case PIPE_FORMAT_A8_UNORM: - return NV04_GDI_RECTANGLE_TEXT_COLOR_FORMAT_A8R8G8B8; - case PIPE_FORMAT_B5G6R5_UNORM: - case PIPE_FORMAT_L8A8_UNORM: - case PIPE_FORMAT_Z16_UNORM: - return NV04_GDI_RECTANGLE_TEXT_COLOR_FORMAT_A16R5G6B5; - case PIPE_FORMAT_B8G8R8X8_UNORM: - case PIPE_FORMAT_B8G8R8A8_UNORM: - case PIPE_FORMAT_S8Z24_UNORM: - case PIPE_FORMAT_X8Z24_UNORM: - return NV04_GDI_RECTANGLE_TEXT_COLOR_FORMAT_A8R8G8B8; - default: - return -1; - } -} - -static INLINE int -nv04_scaled_image_format(enum pipe_format format) -{ - switch (format) { - case PIPE_FORMAT_A8_UNORM: - case PIPE_FORMAT_L8_UNORM: - case PIPE_FORMAT_I8_UNORM: - return NV03_SCALED_IMAGE_FROM_MEMORY_COLOR_FORMAT_Y8; - case PIPE_FORMAT_B5G5R5A1_UNORM: - return NV03_SCALED_IMAGE_FROM_MEMORY_COLOR_FORMAT_A1R5G5B5; - case PIPE_FORMAT_B8G8R8A8_UNORM: - return NV03_SCALED_IMAGE_FROM_MEMORY_COLOR_FORMAT_A8R8G8B8; - case PIPE_FORMAT_B8G8R8X8_UNORM: - return NV03_SCALED_IMAGE_FROM_MEMORY_COLOR_FORMAT_X8R8G8B8; - case PIPE_FORMAT_B5G6R5_UNORM: - case PIPE_FORMAT_R16_SNORM: - case PIPE_FORMAT_L8A8_UNORM: - return NV03_SCALED_IMAGE_FROM_MEMORY_COLOR_FORMAT_R5G6B5; - default: - return -1; - } -} - -static INLINE unsigned -nv04_swizzle_bits_square(unsigned x, unsigned y) -{ - unsigned u = (x & 0x001) << 0 | - (x & 0x002) << 1 | - (x & 0x004) << 2 | - (x & 0x008) << 3 | - (x & 0x010) << 4 | - (x & 0x020) << 5 | - (x & 0x040) << 6 | - (x & 0x080) << 7 | - (x & 0x100) << 8 | - (x & 0x200) << 9 | - (x & 0x400) << 10 | - (x & 0x800) << 11; - - unsigned v = (y & 0x001) << 1 | - (y & 0x002) << 2 | - (y & 0x004) << 3 | - (y & 0x008) << 4 | - (y & 0x010) << 5 | - (y & 0x020) << 6 | - (y & 0x040) << 7 | - (y & 0x080) << 8 | - (y & 0x100) << 9 | - (y & 0x200) << 10 | - (y & 0x400) << 11 | - (y & 0x800) << 12; - return v | u; -} - -/* rectangular swizzled textures are linear concatenations of swizzled square tiles */ -static INLINE unsigned -nv04_swizzle_bits(unsigned x, unsigned y, unsigned w, unsigned h) -{ - unsigned s = MIN2(w, h); - unsigned m = s - 1; - return (((x | y) & ~m) * s) | nv04_swizzle_bits_square(x & m, y & m); -} - -static int -nv04_surface_copy_swizzle(struct nv04_surface_2d *ctx, - struct pipe_surface *dst, int dx, int dy, - struct pipe_surface *src, int sx, int sy, - int w, int h) -{ - struct nouveau_channel *chan = ctx->swzsurf->channel; - struct nouveau_grobj *swzsurf = ctx->swzsurf; - struct nouveau_grobj *sifm = ctx->sifm; - struct nouveau_bo *src_bo = nouveau_bo(ctx->buf(src)); - struct nouveau_bo *dst_bo = nouveau_bo(ctx->buf(dst)); - const unsigned src_pitch = ((struct nv04_surface *)src)->pitch; - /* Max width & height may not be the same on all HW, but must be POT */ - const unsigned max_w = 1024; - const unsigned max_h = 1024; - unsigned sub_w = w > max_w ? max_w : w; - unsigned sub_h = h > max_h ? max_h : h; - unsigned x; - unsigned y; - - /* Swizzled surfaces must be POT */ - assert(util_is_pot(dst->width) && util_is_pot(dst->height)); - - /* If area is too large to copy in one shot we must copy it in POT chunks to meet alignment requirements */ - assert(sub_w == w || util_is_pot(sub_w)); - assert(sub_h == h || util_is_pot(sub_h)); - - MARK_RING (chan, 8 + ((w+sub_w)/sub_w)*((h+sub_h)/sub_h)*17, 2 + - ((w+sub_w)/sub_w)*((h+sub_h)/sub_h)*2); - - BEGIN_RING(chan, swzsurf, NV04_SWIZZLED_SURFACE_DMA_IMAGE, 1); - OUT_RELOCo(chan, dst_bo, - NOUVEAU_BO_GART | NOUVEAU_BO_VRAM | NOUVEAU_BO_WR); - - BEGIN_RING(chan, swzsurf, NV04_SWIZZLED_SURFACE_FORMAT, 1); - OUT_RING (chan, nv04_surface_format(dst->format) | - log2i(dst->width) << NV04_SWIZZLED_SURFACE_FORMAT_BASE_SIZE_U_SHIFT | - log2i(dst->height) << NV04_SWIZZLED_SURFACE_FORMAT_BASE_SIZE_V_SHIFT); - - BEGIN_RING(chan, sifm, NV03_SCALED_IMAGE_FROM_MEMORY_DMA_IMAGE, 1); - OUT_RELOCo(chan, src_bo, - NOUVEAU_BO_GART | NOUVEAU_BO_VRAM | NOUVEAU_BO_RD); - BEGIN_RING(chan, sifm, NV04_SCALED_IMAGE_FROM_MEMORY_SURFACE, 1); - OUT_RING (chan, swzsurf->handle); - - for (y = 0; y < h; y += sub_h) { - sub_h = MIN2(sub_h, h - y); - - for (x = 0; x < w; x += sub_w) { - sub_w = MIN2(sub_w, w - x); - - assert(!(dst->offset & 63)); - - BEGIN_RING(chan, swzsurf, NV04_SWIZZLED_SURFACE_OFFSET, 1); - OUT_RELOCl(chan, dst_bo, dst->offset, - NOUVEAU_BO_GART | NOUVEAU_BO_VRAM | NOUVEAU_BO_WR); - - BEGIN_RING(chan, sifm, NV05_SCALED_IMAGE_FROM_MEMORY_COLOR_CONVERSION, 9); - OUT_RING (chan, NV05_SCALED_IMAGE_FROM_MEMORY_COLOR_CONVERSION_TRUNCATE); - OUT_RING (chan, nv04_scaled_image_format(src->format)); - OUT_RING (chan, NV03_SCALED_IMAGE_FROM_MEMORY_OPERATION_SRCCOPY); - OUT_RING (chan, (x + dx) | ((y + dy) << NV03_SCALED_IMAGE_FROM_MEMORY_CLIP_POINT_Y_SHIFT)); - OUT_RING (chan, sub_h << NV03_SCALED_IMAGE_FROM_MEMORY_CLIP_SIZE_H_SHIFT | sub_w); - OUT_RING (chan, (x + dx) | ((y + dy) << NV03_SCALED_IMAGE_FROM_MEMORY_OUT_POINT_Y_SHIFT)); - OUT_RING (chan, sub_h << NV03_SCALED_IMAGE_FROM_MEMORY_OUT_SIZE_H_SHIFT | sub_w); - OUT_RING (chan, 1 << 20); - OUT_RING (chan, 1 << 20); - - BEGIN_RING(chan, sifm, NV03_SCALED_IMAGE_FROM_MEMORY_SIZE, 4); - OUT_RING (chan, sub_h << NV03_SCALED_IMAGE_FROM_MEMORY_SIZE_H_SHIFT | sub_w); - OUT_RING (chan, src_pitch | - NV03_SCALED_IMAGE_FROM_MEMORY_FORMAT_ORIGIN_CENTER | - NV03_SCALED_IMAGE_FROM_MEMORY_FORMAT_FILTER_POINT_SAMPLE); - OUT_RELOCl(chan, src_bo, src->offset + (sy+y) * src_pitch + (sx+x) * util_format_get_blocksize(src->texture->format), - NOUVEAU_BO_GART | NOUVEAU_BO_VRAM | NOUVEAU_BO_RD); - OUT_RING (chan, 0); - } - } - - return 0; -} - -static int -nv04_surface_copy_m2mf(struct nv04_surface_2d *ctx, - struct pipe_surface *dst, int dx, int dy, - struct pipe_surface *src, int sx, int sy, int w, int h) -{ - struct nouveau_channel *chan = ctx->m2mf->channel; - struct nouveau_grobj *m2mf = ctx->m2mf; - struct nouveau_bo *src_bo = nouveau_bo(ctx->buf(src)); - struct nouveau_bo *dst_bo = nouveau_bo(ctx->buf(dst)); - unsigned src_pitch = ((struct nv04_surface *)src)->pitch; - unsigned dst_pitch = ((struct nv04_surface *)dst)->pitch; - unsigned dst_offset = dst->offset + dy * dst_pitch + - dx * util_format_get_blocksize(dst->texture->format); - unsigned src_offset = src->offset + sy * src_pitch + - sx * util_format_get_blocksize(src->texture->format); - - MARK_RING (chan, 3 + ((h / 2047) + 1) * 9, 2 + ((h / 2047) + 1) * 2); - BEGIN_RING(chan, m2mf, NV04_MEMORY_TO_MEMORY_FORMAT_DMA_BUFFER_IN, 2); - OUT_RELOCo(chan, src_bo, - NOUVEAU_BO_GART | NOUVEAU_BO_VRAM | NOUVEAU_BO_RD); - OUT_RELOCo(chan, dst_bo, - NOUVEAU_BO_GART | NOUVEAU_BO_VRAM | NOUVEAU_BO_WR); - - while (h) { - int count = (h > 2047) ? 2047 : h; - - BEGIN_RING(chan, m2mf, NV04_MEMORY_TO_MEMORY_FORMAT_OFFSET_IN, 8); - OUT_RELOCl(chan, src_bo, src_offset, - NOUVEAU_BO_VRAM | NOUVEAU_BO_GART | NOUVEAU_BO_RD); - OUT_RELOCl(chan, dst_bo, dst_offset, - NOUVEAU_BO_VRAM | NOUVEAU_BO_GART | NOUVEAU_BO_WR); - OUT_RING (chan, src_pitch); - OUT_RING (chan, dst_pitch); - OUT_RING (chan, w * util_format_get_blocksize(src->texture->format)); - OUT_RING (chan, count); - OUT_RING (chan, 0x0101); - OUT_RING (chan, 0); - - h -= count; - src_offset += src_pitch * count; - dst_offset += dst_pitch * count; - } - - return 0; -} - -static int -nv04_surface_copy_blit(struct nv04_surface_2d *ctx, struct pipe_surface *dst, - int dx, int dy, struct pipe_surface *src, int sx, int sy, - int w, int h) -{ - struct nouveau_channel *chan = ctx->surf2d->channel; - struct nouveau_grobj *surf2d = ctx->surf2d; - struct nouveau_grobj *blit = ctx->blit; - struct nouveau_bo *src_bo = nouveau_bo(ctx->buf(src)); - struct nouveau_bo *dst_bo = nouveau_bo(ctx->buf(dst)); - unsigned src_pitch = ((struct nv04_surface *)src)->pitch; - unsigned dst_pitch = ((struct nv04_surface *)dst)->pitch; - int format; - - format = nv04_surface_format(dst->format); - if (format < 0) - return 1; - - MARK_RING (chan, 12, 4); - BEGIN_RING(chan, surf2d, NV04_CONTEXT_SURFACES_2D_DMA_IMAGE_SOURCE, 2); - OUT_RELOCo(chan, src_bo, NOUVEAU_BO_VRAM | NOUVEAU_BO_RD); - OUT_RELOCo(chan, dst_bo, NOUVEAU_BO_VRAM | NOUVEAU_BO_WR); - BEGIN_RING(chan, surf2d, NV04_CONTEXT_SURFACES_2D_FORMAT, 4); - OUT_RING (chan, format); - OUT_RING (chan, (dst_pitch << 16) | src_pitch); - OUT_RELOCl(chan, src_bo, src->offset, NOUVEAU_BO_VRAM | NOUVEAU_BO_RD); - OUT_RELOCl(chan, dst_bo, dst->offset, NOUVEAU_BO_VRAM | NOUVEAU_BO_WR); - - BEGIN_RING(chan, blit, 0x0300, 3); - OUT_RING (chan, (sy << 16) | sx); - OUT_RING (chan, (dy << 16) | dx); - OUT_RING (chan, ( h << 16) | w); - - return 0; -} - -static void -nv04_surface_copy(struct nv04_surface_2d *ctx, struct pipe_surface *dst, - int dx, int dy, struct pipe_surface *src, int sx, int sy, - int w, int h) -{ - unsigned src_pitch = ((struct nv04_surface *)src)->pitch; - unsigned dst_pitch = ((struct nv04_surface *)dst)->pitch; - int src_linear = src->texture->tex_usage & NOUVEAU_TEXTURE_USAGE_LINEAR; - int dst_linear = dst->texture->tex_usage & NOUVEAU_TEXTURE_USAGE_LINEAR; - - assert(src->format == dst->format); - - /* Setup transfer to swizzle the texture to vram if needed */ - if (src_linear && !dst_linear && w > 1 && h > 1) { - nv04_surface_copy_swizzle(ctx, dst, dx, dy, src, sx, sy, w, h); - return; - } - - /* NV_CONTEXT_SURFACES_2D has buffer alignment restrictions, fallback - * to NV_MEMORY_TO_MEMORY_FORMAT in this case. - */ - if ((src->offset & 63) || (dst->offset & 63) || - (src_pitch & 63) || (dst_pitch & 63)) { - nv04_surface_copy_m2mf(ctx, dst, dx, dy, src, sx, sy, w, h); - return; - } - - nv04_surface_copy_blit(ctx, dst, dx, dy, src, sx, sy, w, h); -} - -static void -nv04_surface_fill(struct nv04_surface_2d *ctx, struct pipe_surface *dst, - int dx, int dy, int w, int h, unsigned value) -{ - struct nouveau_channel *chan = ctx->surf2d->channel; - struct nouveau_grobj *surf2d = ctx->surf2d; - struct nouveau_grobj *rect = ctx->rect; - struct nouveau_bo *dst_bo = nouveau_bo(ctx->buf(dst)); - unsigned dst_pitch = ((struct nv04_surface *)dst)->pitch; - int cs2d_format, gdirect_format; - - cs2d_format = nv04_surface_format(dst->format); - assert(cs2d_format >= 0); - - gdirect_format = nv04_rect_format(dst->format); - assert(gdirect_format >= 0); - - MARK_RING (chan, 16, 4); - BEGIN_RING(chan, surf2d, NV04_CONTEXT_SURFACES_2D_DMA_IMAGE_SOURCE, 2); - OUT_RELOCo(chan, dst_bo, NOUVEAU_BO_VRAM | NOUVEAU_BO_WR); - OUT_RELOCo(chan, dst_bo, NOUVEAU_BO_VRAM | NOUVEAU_BO_WR); - BEGIN_RING(chan, surf2d, NV04_CONTEXT_SURFACES_2D_FORMAT, 4); - OUT_RING (chan, cs2d_format); - OUT_RING (chan, (dst_pitch << 16) | dst_pitch); - OUT_RELOCl(chan, dst_bo, dst->offset, NOUVEAU_BO_VRAM | NOUVEAU_BO_WR); - OUT_RELOCl(chan, dst_bo, dst->offset, NOUVEAU_BO_VRAM | NOUVEAU_BO_WR); - - BEGIN_RING(chan, rect, NV04_GDI_RECTANGLE_TEXT_COLOR_FORMAT, 1); - OUT_RING (chan, gdirect_format); - BEGIN_RING(chan, rect, NV04_GDI_RECTANGLE_TEXT_COLOR1_A, 1); - OUT_RING (chan, value); - BEGIN_RING(chan, rect, - NV04_GDI_RECTANGLE_TEXT_UNCLIPPED_RECTANGLE_POINT(0), 2); - OUT_RING (chan, (dx << 16) | dy); - OUT_RING (chan, ( w << 16) | h); -} - -void -nv04_surface_2d_takedown(struct nv04_surface_2d **pctx) -{ - struct nv04_surface_2d *ctx; - - if (!pctx || !*pctx) - return; - ctx = *pctx; - *pctx = NULL; - - nouveau_notifier_free(&ctx->ntfy); - nouveau_grobj_free(&ctx->m2mf); - nouveau_grobj_free(&ctx->surf2d); - nouveau_grobj_free(&ctx->swzsurf); - nouveau_grobj_free(&ctx->rect); - nouveau_grobj_free(&ctx->blit); - nouveau_grobj_free(&ctx->sifm); - - FREE(ctx); -} - -struct nv04_surface_2d * -nv04_surface_2d_init(struct nouveau_screen *screen) -{ - struct nv04_surface_2d *ctx = CALLOC_STRUCT(nv04_surface_2d); - struct nouveau_channel *chan = screen->channel; - unsigned handle = 0x88000000, class; - int ret; - - if (!ctx) - return NULL; - - ret = nouveau_notifier_alloc(chan, handle++, 1, &ctx->ntfy); - if (ret) { - nv04_surface_2d_takedown(&ctx); - return NULL; - } - - ret = nouveau_grobj_alloc(chan, handle++, 0x0039, &ctx->m2mf); - if (ret) { - nv04_surface_2d_takedown(&ctx); - return NULL; - } - - BEGIN_RING(chan, ctx->m2mf, NV04_MEMORY_TO_MEMORY_FORMAT_DMA_NOTIFY, 1); - OUT_RING (chan, ctx->ntfy->handle); - - if (chan->device->chipset < 0x10) - class = NV04_CONTEXT_SURFACES_2D; - else - class = NV10_CONTEXT_SURFACES_2D; - - ret = nouveau_grobj_alloc(chan, handle++, class, &ctx->surf2d); - if (ret) { - nv04_surface_2d_takedown(&ctx); - return NULL; - } - - BEGIN_RING(chan, ctx->surf2d, - NV04_CONTEXT_SURFACES_2D_DMA_IMAGE_SOURCE, 2); - OUT_RING (chan, chan->vram->handle); - OUT_RING (chan, chan->vram->handle); - - if (chan->device->chipset < 0x10) - class = NV04_IMAGE_BLIT; - else - class = NV12_IMAGE_BLIT; - - ret = nouveau_grobj_alloc(chan, handle++, class, &ctx->blit); - if (ret) { - nv04_surface_2d_takedown(&ctx); - return NULL; - } - - BEGIN_RING(chan, ctx->blit, NV01_IMAGE_BLIT_DMA_NOTIFY, 1); - OUT_RING (chan, ctx->ntfy->handle); - BEGIN_RING(chan, ctx->blit, NV04_IMAGE_BLIT_SURFACE, 1); - OUT_RING (chan, ctx->surf2d->handle); - BEGIN_RING(chan, ctx->blit, NV01_IMAGE_BLIT_OPERATION, 1); - OUT_RING (chan, NV01_IMAGE_BLIT_OPERATION_SRCCOPY); - - ret = nouveau_grobj_alloc(chan, handle++, NV04_GDI_RECTANGLE_TEXT, - &ctx->rect); - if (ret) { - nv04_surface_2d_takedown(&ctx); - return NULL; - } - - BEGIN_RING(chan, ctx->rect, NV04_GDI_RECTANGLE_TEXT_DMA_NOTIFY, 1); - OUT_RING (chan, ctx->ntfy->handle); - BEGIN_RING(chan, ctx->rect, NV04_GDI_RECTANGLE_TEXT_SURFACE, 1); - OUT_RING (chan, ctx->surf2d->handle); - BEGIN_RING(chan, ctx->rect, NV04_GDI_RECTANGLE_TEXT_OPERATION, 1); - OUT_RING (chan, NV04_GDI_RECTANGLE_TEXT_OPERATION_SRCCOPY); - BEGIN_RING(chan, ctx->rect, - NV04_GDI_RECTANGLE_TEXT_MONOCHROME_FORMAT, 1); - OUT_RING (chan, NV04_GDI_RECTANGLE_TEXT_MONOCHROME_FORMAT_LE); - - switch (chan->device->chipset & 0xf0) { - case 0x00: - case 0x10: - class = NV04_SWIZZLED_SURFACE; - break; - case 0x20: - class = NV20_SWIZZLED_SURFACE; - break; - case 0x30: - class = NV30_SWIZZLED_SURFACE; - break; - case 0x40: - case 0x60: - class = NV40_SWIZZLED_SURFACE; - break; - default: - /* Famous last words: this really can't happen.. */ - assert(0); - break; - } - - ret = nouveau_grobj_alloc(chan, handle++, class, &ctx->swzsurf); - if (ret) { - nv04_surface_2d_takedown(&ctx); - return NULL; - } - - switch (chan->device->chipset & 0xf0) { - case 0x10: - case 0x20: - class = NV10_SCALED_IMAGE_FROM_MEMORY; - break; - case 0x30: - class = NV30_SCALED_IMAGE_FROM_MEMORY; - break; - case 0x40: - case 0x60: - class = NV40_SCALED_IMAGE_FROM_MEMORY; - break; - default: - class = NV04_SCALED_IMAGE_FROM_MEMORY; - break; - } - - ret = nouveau_grobj_alloc(chan, handle++, class, &ctx->sifm); - if (ret) { - nv04_surface_2d_takedown(&ctx); - return NULL; - } - - ctx->copy = nv04_surface_copy; - ctx->fill = nv04_surface_fill; - return ctx; -} - -struct nv04_surface* -nv04_surface_wrap_for_render(struct pipe_screen *pscreen, struct nv04_surface_2d* eng2d, struct nv04_surface* ns) -{ - int temp_flags; - - // printf("creating temp, flags is %i!\n", flags); - - if(ns->base.usage & PIPE_BUFFER_USAGE_DISCARD) - { - temp_flags = ns->base.usage | PIPE_BUFFER_USAGE_GPU_READ; - ns->base.usage = PIPE_BUFFER_USAGE_GPU_WRITE | NOUVEAU_BUFFER_USAGE_NO_RENDER | PIPE_BUFFER_USAGE_DISCARD; - } - else - { - temp_flags = ns->base.usage | PIPE_BUFFER_USAGE_GPU_READ | PIPE_BUFFER_USAGE_GPU_WRITE; - ns->base.usage = PIPE_BUFFER_USAGE_GPU_WRITE | NOUVEAU_BUFFER_USAGE_NO_RENDER | PIPE_BUFFER_USAGE_GPU_READ; - } - - ns->base.usage = PIPE_BUFFER_USAGE_GPU_READ | PIPE_BUFFER_USAGE_GPU_WRITE; - - struct pipe_texture templ; - memset(&templ, 0, sizeof(templ)); - templ.format = ns->base.texture->format; - templ.target = PIPE_TEXTURE_2D; - templ.width0 = ns->base.width; - templ.height0 = ns->base.height; - templ.depth0 = 1; - templ.last_level = 0; - - // TODO: this is probably wrong and we should specifically handle multisampling somehow once it is implemented - templ.nr_samples = ns->base.texture->nr_samples; - - templ.tex_usage = ns->base.texture->tex_usage | PIPE_TEXTURE_USAGE_RENDER_TARGET; - - struct pipe_texture* temp_tex = pscreen->texture_create(pscreen, &templ); - struct nv04_surface* temp_ns = (struct nv04_surface*)pscreen->get_tex_surface(pscreen, temp_tex, 0, 0, 0, temp_flags); - temp_ns->backing = ns; - - if(ns->base.usage & PIPE_BUFFER_USAGE_GPU_READ) - eng2d->copy(eng2d, &temp_ns->backing->base, 0, 0, &ns->base, 0, 0, ns->base.width, ns->base.height); - - return temp_ns; -} - diff --git a/src/gallium/drivers/nouveau/nv04_surface_2d.h b/src/gallium/drivers/nouveau/nv04_surface_2d.h deleted file mode 100644 index ce696a11a3..0000000000 --- a/src/gallium/drivers/nouveau/nv04_surface_2d.h +++ /dev/null @@ -1,37 +0,0 @@ -#ifndef __NV04_SURFACE_2D_H__ -#define __NV04_SURFACE_2D_H__ - -struct nv04_surface { - struct pipe_surface base; - unsigned pitch; - struct nv04_surface* backing; -}; - -struct nv04_surface_2d { - struct nouveau_notifier *ntfy; - struct nouveau_grobj *surf2d; - struct nouveau_grobj *swzsurf; - struct nouveau_grobj *m2mf; - struct nouveau_grobj *rect; - struct nouveau_grobj *blit; - struct nouveau_grobj *sifm; - - struct pipe_buffer *(*buf)(struct pipe_surface *); - - void (*copy)(struct nv04_surface_2d *, struct pipe_surface *dst, - int dx, int dy, struct pipe_surface *src, int sx, int sy, - int w, int h); - void (*fill)(struct nv04_surface_2d *, struct pipe_surface *dst, - int dx, int dy, int w, int h, unsigned value); -}; - -struct nv04_surface_2d * -nv04_surface_2d_init(struct nouveau_screen *screen); - -void -nv04_surface_2d_takedown(struct nv04_surface_2d **); - -struct nv04_surface* -nv04_surface_wrap_for_render(struct pipe_screen *pscreen, struct nv04_surface_2d* eng2d, struct nv04_surface* ns); - -#endif diff --git a/src/gallium/drivers/nvfx/Makefile b/src/gallium/drivers/nvfx/Makefile index e912177b21..dfe97e6ed5 100644 --- a/src/gallium/drivers/nvfx/Makefile +++ b/src/gallium/drivers/nvfx/Makefile @@ -4,6 +4,7 @@ include $(TOP)/configs/current LIBNAME = nvfx C_SOURCES = \ + nv04_surface_2d.c \ nvfx_context.c \ nvfx_clear.c \ nvfx_draw.c \ diff --git a/src/gallium/drivers/nvfx/nv04_surface_2d.c b/src/gallium/drivers/nvfx/nv04_surface_2d.c new file mode 100644 index 0000000000..ed18c9f24d --- /dev/null +++ b/src/gallium/drivers/nvfx/nv04_surface_2d.c @@ -0,0 +1,545 @@ +#include "pipe/p_context.h" +#include "pipe/p_format.h" +#include "util/u_format.h" +#include "util/u_math.h" +#include "util/u_memory.h" + +#include "nouveau/nouveau_winsys.h" +#include "nouveau/nouveau_util.h" +#include "nouveau/nouveau_screen.h" +#include "nv04_surface_2d.h" + +static INLINE int +nv04_surface_format(enum pipe_format format) +{ + switch (format) { + case PIPE_FORMAT_A8_UNORM: + case PIPE_FORMAT_L8_UNORM: + case PIPE_FORMAT_I8_UNORM: + return NV04_CONTEXT_SURFACES_2D_FORMAT_Y8; + case PIPE_FORMAT_R16_SNORM: + case PIPE_FORMAT_B5G6R5_UNORM: + case PIPE_FORMAT_Z16_UNORM: + case PIPE_FORMAT_L8A8_UNORM: + return NV04_CONTEXT_SURFACES_2D_FORMAT_R5G6B5; + case PIPE_FORMAT_B8G8R8X8_UNORM: + case PIPE_FORMAT_B8G8R8A8_UNORM: + return NV04_CONTEXT_SURFACES_2D_FORMAT_A8R8G8B8; + case PIPE_FORMAT_S8Z24_UNORM: + case PIPE_FORMAT_X8Z24_UNORM: + return NV04_CONTEXT_SURFACES_2D_FORMAT_Y32; + default: + return -1; + } +} + +static INLINE int +nv04_rect_format(enum pipe_format format) +{ + switch (format) { + case PIPE_FORMAT_A8_UNORM: + return NV04_GDI_RECTANGLE_TEXT_COLOR_FORMAT_A8R8G8B8; + case PIPE_FORMAT_B5G6R5_UNORM: + case PIPE_FORMAT_L8A8_UNORM: + case PIPE_FORMAT_Z16_UNORM: + return NV04_GDI_RECTANGLE_TEXT_COLOR_FORMAT_A16R5G6B5; + case PIPE_FORMAT_B8G8R8X8_UNORM: + case PIPE_FORMAT_B8G8R8A8_UNORM: + case PIPE_FORMAT_S8Z24_UNORM: + case PIPE_FORMAT_X8Z24_UNORM: + return NV04_GDI_RECTANGLE_TEXT_COLOR_FORMAT_A8R8G8B8; + default: + return -1; + } +} + +static INLINE int +nv04_scaled_image_format(enum pipe_format format) +{ + switch (format) { + case PIPE_FORMAT_A8_UNORM: + case PIPE_FORMAT_L8_UNORM: + case PIPE_FORMAT_I8_UNORM: + return NV03_SCALED_IMAGE_FROM_MEMORY_COLOR_FORMAT_Y8; + case PIPE_FORMAT_B5G5R5A1_UNORM: + return NV03_SCALED_IMAGE_FROM_MEMORY_COLOR_FORMAT_A1R5G5B5; + case PIPE_FORMAT_B8G8R8A8_UNORM: + return NV03_SCALED_IMAGE_FROM_MEMORY_COLOR_FORMAT_A8R8G8B8; + case PIPE_FORMAT_B8G8R8X8_UNORM: + return NV03_SCALED_IMAGE_FROM_MEMORY_COLOR_FORMAT_X8R8G8B8; + case PIPE_FORMAT_B5G6R5_UNORM: + case PIPE_FORMAT_R16_SNORM: + case PIPE_FORMAT_L8A8_UNORM: + return NV03_SCALED_IMAGE_FROM_MEMORY_COLOR_FORMAT_R5G6B5; + default: + return -1; + } +} + +static INLINE unsigned +nv04_swizzle_bits_square(unsigned x, unsigned y) +{ + unsigned u = (x & 0x001) << 0 | + (x & 0x002) << 1 | + (x & 0x004) << 2 | + (x & 0x008) << 3 | + (x & 0x010) << 4 | + (x & 0x020) << 5 | + (x & 0x040) << 6 | + (x & 0x080) << 7 | + (x & 0x100) << 8 | + (x & 0x200) << 9 | + (x & 0x400) << 10 | + (x & 0x800) << 11; + + unsigned v = (y & 0x001) << 1 | + (y & 0x002) << 2 | + (y & 0x004) << 3 | + (y & 0x008) << 4 | + (y & 0x010) << 5 | + (y & 0x020) << 6 | + (y & 0x040) << 7 | + (y & 0x080) << 8 | + (y & 0x100) << 9 | + (y & 0x200) << 10 | + (y & 0x400) << 11 | + (y & 0x800) << 12; + return v | u; +} + +/* rectangular swizzled textures are linear concatenations of swizzled square tiles */ +static INLINE unsigned +nv04_swizzle_bits(unsigned x, unsigned y, unsigned w, unsigned h) +{ + unsigned s = MIN2(w, h); + unsigned m = s - 1; + return (((x | y) & ~m) * s) | nv04_swizzle_bits_square(x & m, y & m); +} + +static int +nv04_surface_copy_swizzle(struct nv04_surface_2d *ctx, + struct pipe_surface *dst, int dx, int dy, + struct pipe_surface *src, int sx, int sy, + int w, int h) +{ + struct nouveau_channel *chan = ctx->swzsurf->channel; + struct nouveau_grobj *swzsurf = ctx->swzsurf; + struct nouveau_grobj *sifm = ctx->sifm; + struct nouveau_bo *src_bo = nouveau_bo(ctx->buf(src)); + struct nouveau_bo *dst_bo = nouveau_bo(ctx->buf(dst)); + const unsigned src_pitch = ((struct nv04_surface *)src)->pitch; + /* Max width & height may not be the same on all HW, but must be POT */ + const unsigned max_w = 1024; + const unsigned max_h = 1024; + unsigned sub_w = w > max_w ? max_w : w; + unsigned sub_h = h > max_h ? max_h : h; + unsigned x; + unsigned y; + + /* Swizzled surfaces must be POT */ + assert(util_is_pot(dst->width) && util_is_pot(dst->height)); + + /* If area is too large to copy in one shot we must copy it in POT chunks to meet alignment requirements */ + assert(sub_w == w || util_is_pot(sub_w)); + assert(sub_h == h || util_is_pot(sub_h)); + + MARK_RING (chan, 8 + ((w+sub_w)/sub_w)*((h+sub_h)/sub_h)*17, 2 + + ((w+sub_w)/sub_w)*((h+sub_h)/sub_h)*2); + + BEGIN_RING(chan, swzsurf, NV04_SWIZZLED_SURFACE_DMA_IMAGE, 1); + OUT_RELOCo(chan, dst_bo, + NOUVEAU_BO_GART | NOUVEAU_BO_VRAM | NOUVEAU_BO_WR); + + BEGIN_RING(chan, swzsurf, NV04_SWIZZLED_SURFACE_FORMAT, 1); + OUT_RING (chan, nv04_surface_format(dst->format) | + log2i(dst->width) << NV04_SWIZZLED_SURFACE_FORMAT_BASE_SIZE_U_SHIFT | + log2i(dst->height) << NV04_SWIZZLED_SURFACE_FORMAT_BASE_SIZE_V_SHIFT); + + BEGIN_RING(chan, sifm, NV03_SCALED_IMAGE_FROM_MEMORY_DMA_IMAGE, 1); + OUT_RELOCo(chan, src_bo, + NOUVEAU_BO_GART | NOUVEAU_BO_VRAM | NOUVEAU_BO_RD); + BEGIN_RING(chan, sifm, NV04_SCALED_IMAGE_FROM_MEMORY_SURFACE, 1); + OUT_RING (chan, swzsurf->handle); + + for (y = 0; y < h; y += sub_h) { + sub_h = MIN2(sub_h, h - y); + + for (x = 0; x < w; x += sub_w) { + sub_w = MIN2(sub_w, w - x); + + assert(!(dst->offset & 63)); + + BEGIN_RING(chan, swzsurf, NV04_SWIZZLED_SURFACE_OFFSET, 1); + OUT_RELOCl(chan, dst_bo, dst->offset, + NOUVEAU_BO_GART | NOUVEAU_BO_VRAM | NOUVEAU_BO_WR); + + BEGIN_RING(chan, sifm, NV05_SCALED_IMAGE_FROM_MEMORY_COLOR_CONVERSION, 9); + OUT_RING (chan, NV05_SCALED_IMAGE_FROM_MEMORY_COLOR_CONVERSION_TRUNCATE); + OUT_RING (chan, nv04_scaled_image_format(src->format)); + OUT_RING (chan, NV03_SCALED_IMAGE_FROM_MEMORY_OPERATION_SRCCOPY); + OUT_RING (chan, (x + dx) | ((y + dy) << NV03_SCALED_IMAGE_FROM_MEMORY_CLIP_POINT_Y_SHIFT)); + OUT_RING (chan, sub_h << NV03_SCALED_IMAGE_FROM_MEMORY_CLIP_SIZE_H_SHIFT | sub_w); + OUT_RING (chan, (x + dx) | ((y + dy) << NV03_SCALED_IMAGE_FROM_MEMORY_OUT_POINT_Y_SHIFT)); + OUT_RING (chan, sub_h << NV03_SCALED_IMAGE_FROM_MEMORY_OUT_SIZE_H_SHIFT | sub_w); + OUT_RING (chan, 1 << 20); + OUT_RING (chan, 1 << 20); + + BEGIN_RING(chan, sifm, NV03_SCALED_IMAGE_FROM_MEMORY_SIZE, 4); + OUT_RING (chan, sub_h << NV03_SCALED_IMAGE_FROM_MEMORY_SIZE_H_SHIFT | sub_w); + OUT_RING (chan, src_pitch | + NV03_SCALED_IMAGE_FROM_MEMORY_FORMAT_ORIGIN_CENTER | + NV03_SCALED_IMAGE_FROM_MEMORY_FORMAT_FILTER_POINT_SAMPLE); + OUT_RELOCl(chan, src_bo, src->offset + (sy+y) * src_pitch + (sx+x) * util_format_get_blocksize(src->texture->format), + NOUVEAU_BO_GART | NOUVEAU_BO_VRAM | NOUVEAU_BO_RD); + OUT_RING (chan, 0); + } + } + + return 0; +} + +static int +nv04_surface_copy_m2mf(struct nv04_surface_2d *ctx, + struct pipe_surface *dst, int dx, int dy, + struct pipe_surface *src, int sx, int sy, int w, int h) +{ + struct nouveau_channel *chan = ctx->m2mf->channel; + struct nouveau_grobj *m2mf = ctx->m2mf; + struct nouveau_bo *src_bo = nouveau_bo(ctx->buf(src)); + struct nouveau_bo *dst_bo = nouveau_bo(ctx->buf(dst)); + unsigned src_pitch = ((struct nv04_surface *)src)->pitch; + unsigned dst_pitch = ((struct nv04_surface *)dst)->pitch; + unsigned dst_offset = dst->offset + dy * dst_pitch + + dx * util_format_get_blocksize(dst->texture->format); + unsigned src_offset = src->offset + sy * src_pitch + + sx * util_format_get_blocksize(src->texture->format); + + MARK_RING (chan, 3 + ((h / 2047) + 1) * 9, 2 + ((h / 2047) + 1) * 2); + BEGIN_RING(chan, m2mf, NV04_MEMORY_TO_MEMORY_FORMAT_DMA_BUFFER_IN, 2); + OUT_RELOCo(chan, src_bo, + NOUVEAU_BO_GART | NOUVEAU_BO_VRAM | NOUVEAU_BO_RD); + OUT_RELOCo(chan, dst_bo, + NOUVEAU_BO_GART | NOUVEAU_BO_VRAM | NOUVEAU_BO_WR); + + while (h) { + int count = (h > 2047) ? 2047 : h; + + BEGIN_RING(chan, m2mf, NV04_MEMORY_TO_MEMORY_FORMAT_OFFSET_IN, 8); + OUT_RELOCl(chan, src_bo, src_offset, + NOUVEAU_BO_VRAM | NOUVEAU_BO_GART | NOUVEAU_BO_RD); + OUT_RELOCl(chan, dst_bo, dst_offset, + NOUVEAU_BO_VRAM | NOUVEAU_BO_GART | NOUVEAU_BO_WR); + OUT_RING (chan, src_pitch); + OUT_RING (chan, dst_pitch); + OUT_RING (chan, w * util_format_get_blocksize(src->texture->format)); + OUT_RING (chan, count); + OUT_RING (chan, 0x0101); + OUT_RING (chan, 0); + + h -= count; + src_offset += src_pitch * count; + dst_offset += dst_pitch * count; + } + + return 0; +} + +static int +nv04_surface_copy_blit(struct nv04_surface_2d *ctx, struct pipe_surface *dst, + int dx, int dy, struct pipe_surface *src, int sx, int sy, + int w, int h) +{ + struct nouveau_channel *chan = ctx->surf2d->channel; + struct nouveau_grobj *surf2d = ctx->surf2d; + struct nouveau_grobj *blit = ctx->blit; + struct nouveau_bo *src_bo = nouveau_bo(ctx->buf(src)); + struct nouveau_bo *dst_bo = nouveau_bo(ctx->buf(dst)); + unsigned src_pitch = ((struct nv04_surface *)src)->pitch; + unsigned dst_pitch = ((struct nv04_surface *)dst)->pitch; + int format; + + format = nv04_surface_format(dst->format); + if (format < 0) + return 1; + + MARK_RING (chan, 12, 4); + BEGIN_RING(chan, surf2d, NV04_CONTEXT_SURFACES_2D_DMA_IMAGE_SOURCE, 2); + OUT_RELOCo(chan, src_bo, NOUVEAU_BO_VRAM | NOUVEAU_BO_RD); + OUT_RELOCo(chan, dst_bo, NOUVEAU_BO_VRAM | NOUVEAU_BO_WR); + BEGIN_RING(chan, surf2d, NV04_CONTEXT_SURFACES_2D_FORMAT, 4); + OUT_RING (chan, format); + OUT_RING (chan, (dst_pitch << 16) | src_pitch); + OUT_RELOCl(chan, src_bo, src->offset, NOUVEAU_BO_VRAM | NOUVEAU_BO_RD); + OUT_RELOCl(chan, dst_bo, dst->offset, NOUVEAU_BO_VRAM | NOUVEAU_BO_WR); + + BEGIN_RING(chan, blit, 0x0300, 3); + OUT_RING (chan, (sy << 16) | sx); + OUT_RING (chan, (dy << 16) | dx); + OUT_RING (chan, ( h << 16) | w); + + return 0; +} + +static void +nv04_surface_copy(struct nv04_surface_2d *ctx, struct pipe_surface *dst, + int dx, int dy, struct pipe_surface *src, int sx, int sy, + int w, int h) +{ + unsigned src_pitch = ((struct nv04_surface *)src)->pitch; + unsigned dst_pitch = ((struct nv04_surface *)dst)->pitch; + int src_linear = src->texture->tex_usage & NOUVEAU_TEXTURE_USAGE_LINEAR; + int dst_linear = dst->texture->tex_usage & NOUVEAU_TEXTURE_USAGE_LINEAR; + + assert(src->format == dst->format); + + /* Setup transfer to swizzle the texture to vram if needed */ + if (src_linear && !dst_linear && w > 1 && h > 1) { + nv04_surface_copy_swizzle(ctx, dst, dx, dy, src, sx, sy, w, h); + return; + } + + /* NV_CONTEXT_SURFACES_2D has buffer alignment restrictions, fallback + * to NV_MEMORY_TO_MEMORY_FORMAT in this case. + */ + if ((src->offset & 63) || (dst->offset & 63) || + (src_pitch & 63) || (dst_pitch & 63)) { + nv04_surface_copy_m2mf(ctx, dst, dx, dy, src, sx, sy, w, h); + return; + } + + nv04_surface_copy_blit(ctx, dst, dx, dy, src, sx, sy, w, h); +} + +static void +nv04_surface_fill(struct nv04_surface_2d *ctx, struct pipe_surface *dst, + int dx, int dy, int w, int h, unsigned value) +{ + struct nouveau_channel *chan = ctx->surf2d->channel; + struct nouveau_grobj *surf2d = ctx->surf2d; + struct nouveau_grobj *rect = ctx->rect; + struct nouveau_bo *dst_bo = nouveau_bo(ctx->buf(dst)); + unsigned dst_pitch = ((struct nv04_surface *)dst)->pitch; + int cs2d_format, gdirect_format; + + cs2d_format = nv04_surface_format(dst->format); + assert(cs2d_format >= 0); + + gdirect_format = nv04_rect_format(dst->format); + assert(gdirect_format >= 0); + + MARK_RING (chan, 16, 4); + BEGIN_RING(chan, surf2d, NV04_CONTEXT_SURFACES_2D_DMA_IMAGE_SOURCE, 2); + OUT_RELOCo(chan, dst_bo, NOUVEAU_BO_VRAM | NOUVEAU_BO_WR); + OUT_RELOCo(chan, dst_bo, NOUVEAU_BO_VRAM | NOUVEAU_BO_WR); + BEGIN_RING(chan, surf2d, NV04_CONTEXT_SURFACES_2D_FORMAT, 4); + OUT_RING (chan, cs2d_format); + OUT_RING (chan, (dst_pitch << 16) | dst_pitch); + OUT_RELOCl(chan, dst_bo, dst->offset, NOUVEAU_BO_VRAM | NOUVEAU_BO_WR); + OUT_RELOCl(chan, dst_bo, dst->offset, NOUVEAU_BO_VRAM | NOUVEAU_BO_WR); + + BEGIN_RING(chan, rect, NV04_GDI_RECTANGLE_TEXT_COLOR_FORMAT, 1); + OUT_RING (chan, gdirect_format); + BEGIN_RING(chan, rect, NV04_GDI_RECTANGLE_TEXT_COLOR1_A, 1); + OUT_RING (chan, value); + BEGIN_RING(chan, rect, + NV04_GDI_RECTANGLE_TEXT_UNCLIPPED_RECTANGLE_POINT(0), 2); + OUT_RING (chan, (dx << 16) | dy); + OUT_RING (chan, ( w << 16) | h); +} + +void +nv04_surface_2d_takedown(struct nv04_surface_2d **pctx) +{ + struct nv04_surface_2d *ctx; + + if (!pctx || !*pctx) + return; + ctx = *pctx; + *pctx = NULL; + + nouveau_notifier_free(&ctx->ntfy); + nouveau_grobj_free(&ctx->m2mf); + nouveau_grobj_free(&ctx->surf2d); + nouveau_grobj_free(&ctx->swzsurf); + nouveau_grobj_free(&ctx->rect); + nouveau_grobj_free(&ctx->blit); + nouveau_grobj_free(&ctx->sifm); + + FREE(ctx); +} + +struct nv04_surface_2d * +nv04_surface_2d_init(struct nouveau_screen *screen) +{ + struct nv04_surface_2d *ctx = CALLOC_STRUCT(nv04_surface_2d); + struct nouveau_channel *chan = screen->channel; + unsigned handle = 0x88000000, class; + int ret; + + if (!ctx) + return NULL; + + ret = nouveau_notifier_alloc(chan, handle++, 1, &ctx->ntfy); + if (ret) { + nv04_surface_2d_takedown(&ctx); + return NULL; + } + + ret = nouveau_grobj_alloc(chan, handle++, 0x0039, &ctx->m2mf); + if (ret) { + nv04_surface_2d_takedown(&ctx); + return NULL; + } + + BEGIN_RING(chan, ctx->m2mf, NV04_MEMORY_TO_MEMORY_FORMAT_DMA_NOTIFY, 1); + OUT_RING (chan, ctx->ntfy->handle); + + if (chan->device->chipset < 0x10) + class = NV04_CONTEXT_SURFACES_2D; + else + class = NV10_CONTEXT_SURFACES_2D; + + ret = nouveau_grobj_alloc(chan, handle++, class, &ctx->surf2d); + if (ret) { + nv04_surface_2d_takedown(&ctx); + return NULL; + } + + BEGIN_RING(chan, ctx->surf2d, + NV04_CONTEXT_SURFACES_2D_DMA_IMAGE_SOURCE, 2); + OUT_RING (chan, chan->vram->handle); + OUT_RING (chan, chan->vram->handle); + + if (chan->device->chipset < 0x10) + class = NV04_IMAGE_BLIT; + else + class = NV12_IMAGE_BLIT; + + ret = nouveau_grobj_alloc(chan, handle++, class, &ctx->blit); + if (ret) { + nv04_surface_2d_takedown(&ctx); + return NULL; + } + + BEGIN_RING(chan, ctx->blit, NV01_IMAGE_BLIT_DMA_NOTIFY, 1); + OUT_RING (chan, ctx->ntfy->handle); + BEGIN_RING(chan, ctx->blit, NV04_IMAGE_BLIT_SURFACE, 1); + OUT_RING (chan, ctx->surf2d->handle); + BEGIN_RING(chan, ctx->blit, NV01_IMAGE_BLIT_OPERATION, 1); + OUT_RING (chan, NV01_IMAGE_BLIT_OPERATION_SRCCOPY); + + ret = nouveau_grobj_alloc(chan, handle++, NV04_GDI_RECTANGLE_TEXT, + &ctx->rect); + if (ret) { + nv04_surface_2d_takedown(&ctx); + return NULL; + } + + BEGIN_RING(chan, ctx->rect, NV04_GDI_RECTANGLE_TEXT_DMA_NOTIFY, 1); + OUT_RING (chan, ctx->ntfy->handle); + BEGIN_RING(chan, ctx->rect, NV04_GDI_RECTANGLE_TEXT_SURFACE, 1); + OUT_RING (chan, ctx->surf2d->handle); + BEGIN_RING(chan, ctx->rect, NV04_GDI_RECTANGLE_TEXT_OPERATION, 1); + OUT_RING (chan, NV04_GDI_RECTANGLE_TEXT_OPERATION_SRCCOPY); + BEGIN_RING(chan, ctx->rect, + NV04_GDI_RECTANGLE_TEXT_MONOCHROME_FORMAT, 1); + OUT_RING (chan, NV04_GDI_RECTANGLE_TEXT_MONOCHROME_FORMAT_LE); + + switch (chan->device->chipset & 0xf0) { + case 0x00: + case 0x10: + class = NV04_SWIZZLED_SURFACE; + break; + case 0x20: + class = NV20_SWIZZLED_SURFACE; + break; + case 0x30: + class = NV30_SWIZZLED_SURFACE; + break; + case 0x40: + case 0x60: + class = NV40_SWIZZLED_SURFACE; + break; + default: + /* Famous last words: this really can't happen.. */ + assert(0); + break; + } + + ret = nouveau_grobj_alloc(chan, handle++, class, &ctx->swzsurf); + if (ret) { + nv04_surface_2d_takedown(&ctx); + return NULL; + } + + switch (chan->device->chipset & 0xf0) { + case 0x10: + case 0x20: + class = NV10_SCALED_IMAGE_FROM_MEMORY; + break; + case 0x30: + class = NV30_SCALED_IMAGE_FROM_MEMORY; + break; + case 0x40: + case 0x60: + class = NV40_SCALED_IMAGE_FROM_MEMORY; + break; + default: + class = NV04_SCALED_IMAGE_FROM_MEMORY; + break; + } + + ret = nouveau_grobj_alloc(chan, handle++, class, &ctx->sifm); + if (ret) { + nv04_surface_2d_takedown(&ctx); + return NULL; + } + + ctx->copy = nv04_surface_copy; + ctx->fill = nv04_surface_fill; + return ctx; +} + +struct nv04_surface* +nv04_surface_wrap_for_render(struct pipe_screen *pscreen, struct nv04_surface_2d* eng2d, struct nv04_surface* ns) +{ + int temp_flags; + + // printf("creating temp, flags is %i!\n", flags); + + if(ns->base.usage & PIPE_BUFFER_USAGE_DISCARD) + { + temp_flags = ns->base.usage | PIPE_BUFFER_USAGE_GPU_READ; + ns->base.usage = PIPE_BUFFER_USAGE_GPU_WRITE | NOUVEAU_BUFFER_USAGE_NO_RENDER | PIPE_BUFFER_USAGE_DISCARD; + } + else + { + temp_flags = ns->base.usage | PIPE_BUFFER_USAGE_GPU_READ | PIPE_BUFFER_USAGE_GPU_WRITE; + ns->base.usage = PIPE_BUFFER_USAGE_GPU_WRITE | NOUVEAU_BUFFER_USAGE_NO_RENDER | PIPE_BUFFER_USAGE_GPU_READ; + } + + ns->base.usage = PIPE_BUFFER_USAGE_GPU_READ | PIPE_BUFFER_USAGE_GPU_WRITE; + + struct pipe_texture templ; + memset(&templ, 0, sizeof(templ)); + templ.format = ns->base.texture->format; + templ.target = PIPE_TEXTURE_2D; + templ.width0 = ns->base.width; + templ.height0 = ns->base.height; + templ.depth0 = 1; + templ.last_level = 0; + + // TODO: this is probably wrong and we should specifically handle multisampling somehow once it is implemented + templ.nr_samples = ns->base.texture->nr_samples; + + templ.tex_usage = ns->base.texture->tex_usage | PIPE_TEXTURE_USAGE_RENDER_TARGET; + + struct pipe_texture* temp_tex = pscreen->texture_create(pscreen, &templ); + struct nv04_surface* temp_ns = (struct nv04_surface*)pscreen->get_tex_surface(pscreen, temp_tex, 0, 0, 0, temp_flags); + temp_ns->backing = ns; + + if(ns->base.usage & PIPE_BUFFER_USAGE_GPU_READ) + eng2d->copy(eng2d, &temp_ns->backing->base, 0, 0, &ns->base, 0, 0, ns->base.width, ns->base.height); + + return temp_ns; +} diff --git a/src/gallium/drivers/nvfx/nv04_surface_2d.h b/src/gallium/drivers/nvfx/nv04_surface_2d.h new file mode 100644 index 0000000000..ce696a11a3 --- /dev/null +++ b/src/gallium/drivers/nvfx/nv04_surface_2d.h @@ -0,0 +1,37 @@ +#ifndef __NV04_SURFACE_2D_H__ +#define __NV04_SURFACE_2D_H__ + +struct nv04_surface { + struct pipe_surface base; + unsigned pitch; + struct nv04_surface* backing; +}; + +struct nv04_surface_2d { + struct nouveau_notifier *ntfy; + struct nouveau_grobj *surf2d; + struct nouveau_grobj *swzsurf; + struct nouveau_grobj *m2mf; + struct nouveau_grobj *rect; + struct nouveau_grobj *blit; + struct nouveau_grobj *sifm; + + struct pipe_buffer *(*buf)(struct pipe_surface *); + + void (*copy)(struct nv04_surface_2d *, struct pipe_surface *dst, + int dx, int dy, struct pipe_surface *src, int sx, int sy, + int w, int h); + void (*fill)(struct nv04_surface_2d *, struct pipe_surface *dst, + int dx, int dy, int w, int h, unsigned value); +}; + +struct nv04_surface_2d * +nv04_surface_2d_init(struct nouveau_screen *screen); + +void +nv04_surface_2d_takedown(struct nv04_surface_2d **); + +struct nv04_surface* +nv04_surface_wrap_for_render(struct pipe_screen *pscreen, struct nv04_surface_2d* eng2d, struct nv04_surface* ns); + +#endif diff --git a/src/gallium/drivers/nvfx/nvfx_miptree.c b/src/gallium/drivers/nvfx/nvfx_miptree.c index 5dced8dae4..0f5ed61aab 100644 --- a/src/gallium/drivers/nvfx/nvfx_miptree.c +++ b/src/gallium/drivers/nvfx/nvfx_miptree.c @@ -5,7 +5,7 @@ #include "util/u_math.h" #include "nvfx_context.h" -#include "../nouveau/nv04_surface_2d.h" +#include "nv04_surface_2d.h" diff --git a/src/gallium/drivers/nvfx/nvfx_screen.h b/src/gallium/drivers/nvfx/nvfx_screen.h index e076b876b0..c0b4b9899d 100644 --- a/src/gallium/drivers/nvfx/nvfx_screen.h +++ b/src/gallium/drivers/nvfx/nvfx_screen.h @@ -2,7 +2,7 @@ #define __NVFX_SCREEN_H__ #include "nouveau/nouveau_screen.h" -#include "nouveau/nv04_surface_2d.h" +#include "nv04_surface_2d.h" struct nvfx_screen { struct nouveau_screen base; -- cgit v1.2.3 From d40a069206ea76feafe35c417d79c8bd5d62b4c1 Mon Sep 17 00:00:00 2001 From: Luca Barbieri Date: Mon, 22 Feb 2010 11:44:31 +0100 Subject: nvfx: add NOUVEAU_SWTNL to force swtnl at runtime Replace the FORCE_SWTNL macro with a NOUVEAU_SWTNL environment variable. --- src/gallium/drivers/nvfx/nvfx_vbo.c | 13 ++++++++++--- 1 file changed, 10 insertions(+), 3 deletions(-) (limited to 'src') diff --git a/src/gallium/drivers/nvfx/nvfx_vbo.c b/src/gallium/drivers/nvfx/nvfx_vbo.c index 9d501ef1da..54369f9b64 100644 --- a/src/gallium/drivers/nvfx/nvfx_vbo.c +++ b/src/gallium/drivers/nvfx/nvfx_vbo.c @@ -10,7 +10,14 @@ #include "nouveau/nouveau_pushbuf.h" #include "nouveau/nouveau_util.h" -#define FORCE_SWTNL 0 +static boolean +nvfx_force_swtnl(struct nvfx_context *nvfx) +{ + static int force_swtnl = -1; + if(force_swtnl < 0) + force_swtnl = debug_get_bool_option("NOUVEAU_SWTNL", 0); + return force_swtnl; +} static INLINE int nvfx_vbo_format_to_hw(enum pipe_format pipe, unsigned *fmt, unsigned *ncomp) @@ -175,7 +182,7 @@ nvfx_draw_arrays(struct pipe_context *pipe, unsigned restart = 0; nvfx_vbo_set_idxbuf(nvfx, NULL, 0); - if (FORCE_SWTNL || !nvfx_state_validate(nvfx)) { + if (nvfx_force_swtnl(nvfx) || !nvfx_state_validate(nvfx)) { nvfx_draw_elements_swtnl(pipe, NULL, 0, mode, start, count); return; @@ -465,7 +472,7 @@ nvfx_draw_elements(struct pipe_context *pipe, boolean idxbuf; idxbuf = nvfx_vbo_set_idxbuf(nvfx, indexBuffer, indexSize); - if (FORCE_SWTNL || !nvfx_state_validate(nvfx)) { + if (nvfx_force_swtnl(nvfx) || !nvfx_state_validate(nvfx)) { nvfx_draw_elements_swtnl(pipe, NULL, 0, mode, start, count); return; -- cgit v1.2.3 From ad2d0c26393760ebc7af52de9f693654381431f3 Mon Sep 17 00:00:00 2001 From: Luca Barbieri Date: Mon, 22 Feb 2010 12:35:18 +0100 Subject: nvfx: draw: create draw vp with ureg This avoids duplicating the vertex program generation logic and makes the same code work for both nv30 and nv40. --- src/gallium/drivers/nvfx/nvfx_draw.c | 67 +++++++++++++----------------------- 1 file changed, 24 insertions(+), 43 deletions(-) (limited to 'src') diff --git a/src/gallium/drivers/nvfx/nvfx_draw.c b/src/gallium/drivers/nvfx/nvfx_draw.c index 7308f0667c..494d5435d6 100644 --- a/src/gallium/drivers/nvfx/nvfx_draw.c +++ b/src/gallium/drivers/nvfx/nvfx_draw.c @@ -1,5 +1,6 @@ #include "pipe/p_shader_tokens.h" #include "util/u_inlines.h" +#include "tgsi/tgsi_ureg.h" #include "util/u_pack_color.h" @@ -173,50 +174,30 @@ nvfx_render_destroy(struct draw_stage *draw) FREE(draw); } -static INLINE void -emit_mov(struct nvfx_vertex_program *vp, - unsigned dst, unsigned src, unsigned vor, unsigned mask) -{ - struct nvfx_vertex_program_exec *inst; - - vp->insns = realloc(vp->insns, - sizeof(struct nvfx_vertex_program_exec) * - ++vp->nr_insns); - inst = &vp->insns[vp->nr_insns - 1]; - - inst->data[0] = 0x401f9c6c; - inst->data[1] = 0x0040000d | (src << 8); - inst->data[2] = 0x8106c083; - inst->data[3] = 0x6041ff80 | (dst << 2) | (mask << 13); - inst->const_index = -1; - inst->has_branch_offset = FALSE; - - vp->ir |= (1 << src); - if (vor != ~0) - vp->or |= (1 << vor); -} - static struct nvfx_vertex_program * -create_drawvp(struct nvfx_context *nvfx) +nvfx_create_drawvp(struct nvfx_context *nvfx) { - struct nvfx_vertex_program *vp = CALLOC_STRUCT(nvfx_vertex_program); - unsigned i; - - // nv30 support comes in a later patch - assert(nvfx->is_nv4x); - - emit_mov(vp, NVFX_VP(INST_DEST_POS), 0, ~0, 0xf); - emit_mov(vp, NVFX_VP(INST_DEST_COL0), 3, 0, 0xf); - emit_mov(vp, NVFX_VP(INST_DEST_COL1), 4, 1, 0xf); - emit_mov(vp, NVFX_VP(INST_DEST_BFC0), 3, 2, 0xf); - emit_mov(vp, NVFX_VP(INST_DEST_BFC1), 4, 3, 0xf); - emit_mov(vp, NVFX_VP(INST_DEST_FOGC), 5, 4, 0x8); - for (i = 0; i < 8; i++) - emit_mov(vp, NVFX_VP(INST_DEST_TC(i)), 8 + i, 14 + i, 0xf); - - vp->insns[vp->nr_insns - 1].data[3] |= 1; - vp->translated = TRUE; - return vp; + struct ureg_program *ureg; + uint i; + + ureg = ureg_create( TGSI_PROCESSOR_VERTEX ); + if (ureg == NULL) + return NULL; + + ureg_MOV(ureg, ureg_DECL_output(ureg, TGSI_SEMANTIC_POSITION, 0), ureg_DECL_vs_input(ureg, 0)); + ureg_MOV(ureg, ureg_DECL_output(ureg, TGSI_SEMANTIC_COLOR, 0), ureg_DECL_vs_input(ureg, 3)); + ureg_MOV(ureg, ureg_DECL_output(ureg, TGSI_SEMANTIC_COLOR, 1), ureg_DECL_vs_input(ureg, 4)); + ureg_MOV(ureg, ureg_DECL_output(ureg, TGSI_SEMANTIC_BCOLOR, 0), ureg_DECL_vs_input(ureg, 3)); + ureg_MOV(ureg, ureg_DECL_output(ureg, TGSI_SEMANTIC_BCOLOR, 1), ureg_DECL_vs_input(ureg, 4)); + ureg_MOV(ureg, + ureg_writemask(ureg_DECL_output(ureg, TGSI_SEMANTIC_FOG, 1), TGSI_WRITEMASK_X), + ureg_DECL_vs_input(ureg, 5)); + for (i = 0; i < 8; ++i) + ureg_MOV(ureg, ureg_DECL_output(ureg, TGSI_SEMANTIC_GENERIC, i), ureg_DECL_vs_input(ureg, 8 + i)); + + ureg_END( ureg ); + + return ureg_create_shader_and_destroy( ureg, &nvfx->pipe ); } struct draw_stage * @@ -225,7 +206,7 @@ nvfx_draw_render_stage(struct nvfx_context *nvfx) struct nvfx_render_stage *render = CALLOC_STRUCT(nvfx_render_stage); if (!nvfx->swtnl.vertprog) - nvfx->swtnl.vertprog = create_drawvp(nvfx); + nvfx->swtnl.vertprog = nvfx_create_drawvp(nvfx); render->nvfx = nvfx; render->stage.draw = nvfx->draw; -- cgit v1.2.3 From ac7ae8bc6ae0d364103d655482a522c12504816b Mon Sep 17 00:00:00 2001 From: Luca Barbieri Date: Mon, 22 Feb 2010 13:15:24 +0100 Subject: nvfx: draw: make perspective corrective texturing work We must divide everything in the position by w, and emit position as a 4-component vector. Not sure why we must divide, but it works (see progs/redbook/checker). --- src/gallium/drivers/nvfx/nvfx_draw.c | 9 ++++++++- 1 file changed, 8 insertions(+), 1 deletion(-) (limited to 'src') diff --git a/src/gallium/drivers/nvfx/nvfx_draw.c b/src/gallium/drivers/nvfx/nvfx_draw.c index 494d5435d6..4e0575885d 100644 --- a/src/gallium/drivers/nvfx/nvfx_draw.c +++ b/src/gallium/drivers/nvfx/nvfx_draw.c @@ -67,6 +67,13 @@ nvfx_render_vertex(struct nvfx_context *nvfx, const struct vertex_header *v) OUT_RING (chan, fui(v->data[idx][2])); OUT_RING (chan, fui(v->data[idx][3])); break; + case 0xff: + BEGIN_RING(chan, eng3d, NV34TCL_VTX_ATTR_4F_X(hw), 4); + OUT_RING (chan, fui(v->data[idx][0] / v->data[idx][3])); + OUT_RING (chan, fui(v->data[idx][1] / v->data[idx][3])); + OUT_RING (chan, fui(v->data[idx][2] / v->data[idx][3])); + OUT_RING (chan, fui(1.0f / v->data[idx][3])); + break; case EMIT_4UB: BEGIN_RING(chan, eng3d, NV34TCL_VTX_ATTR_4UB(hw), 1); OUT_RING (chan, pack_ub4(float_to_ubyte(v->data[idx][0]), @@ -330,7 +337,7 @@ nvfx_state_vtxfmt_validate(struct nvfx_context *nvfx) emit_attrib(nvfx, 5, EMIT_1F, TGSI_SEMANTIC_FOG, 0); } - emit_attrib(nvfx, 0, EMIT_3F, TGSI_SEMANTIC_POSITION, 0); + emit_attrib(nvfx, 0, 0xff, TGSI_SEMANTIC_POSITION, 0); return FALSE; } -- cgit v1.2.3 From 152dffd3e196208a85148c4a2f7a9a6df44f3bff Mon Sep 17 00:00:00 2001 From: Luca Barbieri Date: Mon, 22 Feb 2010 13:18:10 +0100 Subject: nvfx: draw: emit color as floating point Don't lose precision by converting to u8. --- src/gallium/drivers/nvfx/nvfx_draw.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'src') diff --git a/src/gallium/drivers/nvfx/nvfx_draw.c b/src/gallium/drivers/nvfx/nvfx_draw.c index 4e0575885d..aea0baadf9 100644 --- a/src/gallium/drivers/nvfx/nvfx_draw.c +++ b/src/gallium/drivers/nvfx/nvfx_draw.c @@ -324,7 +324,7 @@ nvfx_state_vtxfmt_validate(struct nvfx_context *nvfx) for (i = 0; i < 2; i++) { if (!(colour & (1 << i))) continue; - emit_attrib(nvfx, 3 + i, EMIT_4UB, TGSI_SEMANTIC_COLOR, i); + emit_attrib(nvfx, 3 + i, EMIT_4F, TGSI_SEMANTIC_COLOR, i); } for (i = 0; i < 8; i++) { -- cgit v1.2.3 From a174db480b9dbe3ae3475ce0cf4b3591234e8f05 Mon Sep 17 00:00:00 2001 From: Luca Barbieri Date: Mon, 22 Feb 2010 13:22:24 +0100 Subject: nvfx: draw: make swtnl draw_elements actually work. It was totally broken: the index buffer was passed as NULL! --- src/gallium/drivers/nvfx/nvfx_vbo.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'src') diff --git a/src/gallium/drivers/nvfx/nvfx_vbo.c b/src/gallium/drivers/nvfx/nvfx_vbo.c index 54369f9b64..257087f8f6 100644 --- a/src/gallium/drivers/nvfx/nvfx_vbo.c +++ b/src/gallium/drivers/nvfx/nvfx_vbo.c @@ -473,7 +473,7 @@ nvfx_draw_elements(struct pipe_context *pipe, idxbuf = nvfx_vbo_set_idxbuf(nvfx, indexBuffer, indexSize); if (nvfx_force_swtnl(nvfx) || !nvfx_state_validate(nvfx)) { - nvfx_draw_elements_swtnl(pipe, NULL, 0, + nvfx_draw_elements_swtnl(pipe, indexBuffer, indexSize, mode, start, count); return; } -- cgit v1.2.3 From 49f2a89956203a99be37a6fb18a1fab79c5e5429 Mon Sep 17 00:00:00 2001 From: Luca Barbieri Date: Sun, 21 Feb 2010 18:17:03 +0100 Subject: nvfx: clean up shader header Currently the behavior of shader.h depends on some constants that are defined differently in vertex and fragment programs. This patch cleans that up by splitting the relevant symbols in vertex program and fragment program variants --- src/gallium/drivers/nvfx/nvfx_draw.c | 1 - src/gallium/drivers/nvfx/nvfx_fragprog.c | 91 +++++++++++++------------------- src/gallium/drivers/nvfx/nvfx_shader.h | 56 ++++++++++++++------ src/gallium/drivers/nvfx/nvfx_vertprog.c | 47 ++++++----------- 4 files changed, 92 insertions(+), 103 deletions(-) (limited to 'src') diff --git a/src/gallium/drivers/nvfx/nvfx_draw.c b/src/gallium/drivers/nvfx/nvfx_draw.c index aea0baadf9..5379b29efd 100644 --- a/src/gallium/drivers/nvfx/nvfx_draw.c +++ b/src/gallium/drivers/nvfx/nvfx_draw.c @@ -9,7 +9,6 @@ #include "draw/draw_pipe.h" #include "nvfx_context.h" -#define NVFX_SHADER_NO_FUCKEDNESS #include "nv30_vertprog.h" #include "nv40_vertprog.h" diff --git a/src/gallium/drivers/nvfx/nvfx_fragprog.c b/src/gallium/drivers/nvfx/nvfx_fragprog.c index ecc193877b..8066528a5b 100644 --- a/src/gallium/drivers/nvfx/nvfx_fragprog.c +++ b/src/gallium/drivers/nvfx/nvfx_fragprog.c @@ -8,25 +8,8 @@ #include "tgsi/tgsi_util.h" #include "nvfx_context.h" - -#define SWZ_X 0 -#define SWZ_Y 1 -#define SWZ_Z 2 -#define SWZ_W 3 -#define MASK_X 1 -#define MASK_Y 2 -#define MASK_Z 4 -#define MASK_W 8 -#define MASK_ALL (MASK_X|MASK_Y|MASK_Z|MASK_W) -#define DEF_SCALE NVFX_FP_OP_DST_SCALE_1X -#define DEF_CTEST NVFX_FP_OP_COND_TR #include "nvfx_shader.h" -#define swz(s,x,y,z,w) nvfx_sr_swz((s), SWZ_##x, SWZ_##y, SWZ_##z, SWZ_##w) -#define neg(s) nvfx_sr_neg((s)) -#define abs(s) nvfx_sr_abs((s)) -#define scale(s,v) nvfx_sr_scale((s), NVFX_FP_OP_DST_SCALE_##v) - #define MAX_CONSTS 128 #define MAX_IMM 32 struct nvfx_fpc { @@ -308,10 +291,10 @@ tgsi_mask(uint tgsi) { int mask = 0; - if (tgsi & TGSI_WRITEMASK_X) mask |= MASK_X; - if (tgsi & TGSI_WRITEMASK_Y) mask |= MASK_Y; - if (tgsi & TGSI_WRITEMASK_Z) mask |= MASK_Z; - if (tgsi & TGSI_WRITEMASK_W) mask |= MASK_W; + if (tgsi & TGSI_WRITEMASK_X) mask |= NVFX_FP_MASK_X; + if (tgsi & TGSI_WRITEMASK_Y) mask |= NVFX_FP_MASK_Y; + if (tgsi & TGSI_WRITEMASK_Z) mask |= NVFX_FP_MASK_Z; + if (tgsi & TGSI_WRITEMASK_W) mask |= NVFX_FP_MASK_W; return mask; } @@ -337,7 +320,7 @@ src_native_swz(struct nvfx_fpc *fpc, const struct tgsi_full_src_register *fsrc, } } - if (mask == MASK_ALL) + if (mask == NVFX_FP_MASK_ALL) return TRUE; *src = temp(fpc); @@ -393,7 +376,7 @@ nvfx_fragprog_parse_instruction(struct nvfx_context* nvfx, struct nvfx_fpc *fpc, src[i] = tgsi_src(fpc, fsrc); } else { src[i] = temp(fpc); - arith(fpc, 0, MOV, src[i], MASK_ALL, + arith(fpc, 0, MOV, src[i], NVFX_FP_MASK_ALL, tgsi_src(fpc, fsrc), none, none); } break; @@ -404,7 +387,7 @@ nvfx_fragprog_parse_instruction(struct nvfx_context* nvfx, struct nvfx_fpc *fpc, src[i] = tgsi_src(fpc, fsrc); } else { src[i] = temp(fpc); - arith(fpc, 0, MOV, src[i], MASK_ALL, + arith(fpc, 0, MOV, src[i], NVFX_FP_MASK_ALL, tgsi_src(fpc, fsrc), none, none); } break; @@ -415,7 +398,7 @@ nvfx_fragprog_parse_instruction(struct nvfx_context* nvfx, struct nvfx_fpc *fpc, src[i] = tgsi_src(fpc, fsrc); } else { src[i] = temp(fpc); - arith(fpc, 0, MOV, src[i], MASK_ALL, + arith(fpc, 0, MOV, src[i], NVFX_FP_MASK_ALL, tgsi_src(fpc, fsrc), none, none); } break; @@ -448,22 +431,22 @@ nvfx_fragprog_parse_instruction(struct nvfx_context* nvfx, struct nvfx_fpc *fpc, tmp = nvfx_sr(NVFXSR_NONE, 0); tmp.cc_update = 1; arith(fpc, 0, MOV, tmp, 0xf, src[0], none, none); - dst.cc_test = NVFX_VP_INST_COND_GE; + dst.cc_test = NVFX_COND_GE; arith(fpc, sat, MOV, dst, mask, src[2], none, none); - dst.cc_test = NVFX_VP_INST_COND_LT; + dst.cc_test = NVFX_COND_LT; arith(fpc, sat, MOV, dst, mask, src[1], none, none); break; case TGSI_OPCODE_COS: arith(fpc, sat, COS, dst, mask, src[0], none, none); break; case TGSI_OPCODE_DDX: - if (mask & (MASK_Z | MASK_W)) { + if (mask & (NVFX_FP_MASK_Z | NVFX_FP_MASK_W)) { tmp = temp(fpc); - arith(fpc, sat, DDX, tmp, MASK_X | MASK_Y, + arith(fpc, sat, DDX, tmp, NVFX_FP_MASK_X | NVFX_FP_MASK_Y, swz(src[0], Z, W, Z, W), none, none); - arith(fpc, 0, MOV, tmp, MASK_Z | MASK_W, + arith(fpc, 0, MOV, tmp, NVFX_FP_MASK_Z | NVFX_FP_MASK_W, swz(tmp, X, Y, X, Y), none, none); - arith(fpc, sat, DDX, tmp, MASK_X | MASK_Y, src[0], + arith(fpc, sat, DDX, tmp, NVFX_FP_MASK_X | NVFX_FP_MASK_Y, src[0], none, none); arith(fpc, 0, MOV, dst, mask, tmp, none, none); } else { @@ -471,13 +454,13 @@ nvfx_fragprog_parse_instruction(struct nvfx_context* nvfx, struct nvfx_fpc *fpc, } break; case TGSI_OPCODE_DDY: - if (mask & (MASK_Z | MASK_W)) { + if (mask & (NVFX_FP_MASK_Z | NVFX_FP_MASK_W)) { tmp = temp(fpc); - arith(fpc, sat, DDY, tmp, MASK_X | MASK_Y, + arith(fpc, sat, DDY, tmp, NVFX_FP_MASK_X | NVFX_FP_MASK_Y, swz(src[0], Z, W, Z, W), none, none); - arith(fpc, 0, MOV, tmp, MASK_Z | MASK_W, + arith(fpc, 0, MOV, tmp, NVFX_FP_MASK_Z | NVFX_FP_MASK_W, swz(tmp, X, Y, X, Y), none, none); - arith(fpc, sat, DDY, tmp, MASK_X | MASK_Y, src[0], + arith(fpc, sat, DDY, tmp, NVFX_FP_MASK_X | NVFX_FP_MASK_Y, src[0], none, none); arith(fpc, 0, MOV, dst, mask, tmp, none, none); } else { @@ -492,7 +475,7 @@ nvfx_fragprog_parse_instruction(struct nvfx_context* nvfx, struct nvfx_fpc *fpc, break; case TGSI_OPCODE_DPH: tmp = temp(fpc); - arith(fpc, 0, DP3, tmp, MASK_X, src[0], src[1], none); + arith(fpc, 0, DP3, tmp, NVFX_FP_MASK_X, src[0], src[1], none); arith(fpc, sat, ADD, dst, mask, swz(tmp, X, X, X, X), swz(src[1], W, W, W, W), none); break; @@ -514,8 +497,8 @@ nvfx_fragprog_parse_instruction(struct nvfx_context* nvfx, struct nvfx_fpc *fpc, case TGSI_OPCODE_KIL: dst = nvfx_sr(NVFXSR_NONE, 0); dst.cc_update = 1; - arith(fpc, 0, MOV, dst, MASK_ALL, src[0], none, none); - dst.cc_update = 0; dst.cc_test = NVFX_FP_OP_COND_LT; + arith(fpc, 0, MOV, dst, NVFX_FP_MASK_ALL, src[0], none, none); + dst.cc_update = 0; dst.cc_test = NVFX_COND_LT; arith(fpc, 0, KIL, dst, 0, none, none, none); break; case TGSI_OPCODE_LG2: @@ -551,9 +534,9 @@ nvfx_fragprog_parse_instruction(struct nvfx_context* nvfx, struct nvfx_fpc *fpc, arith(fpc, sat, POW_NV30, dst, mask, src[0], src[1], none); else { tmp = temp(fpc); - arith(fpc, 0, LG2, tmp, MASK_X, + arith(fpc, 0, LG2, tmp, NVFX_FP_MASK_X, swz(src[0], X, X, X, X), none, none); - arith(fpc, 0, MUL, tmp, MASK_X, swz(tmp, X, X, X, X), + arith(fpc, 0, MUL, tmp, NVFX_FP_MASK_X, swz(tmp, X, X, X, X), swz(src[1], X, X, X, X), none); arith(fpc, sat, EX2, dst, mask, swz(tmp, X, X, X, X), none, none); @@ -570,9 +553,9 @@ nvfx_fragprog_parse_instruction(struct nvfx_context* nvfx, struct nvfx_fpc *fpc, arith(fpc, 0, RFL_NV30, dst, mask, src[0], src[1], none); else { tmp = temp(fpc); - arith(fpc, 0, DP3, tmp, MASK_X, src[0], src[0], none); - arith(fpc, 0, DP3, tmp, MASK_Y, src[0], src[1], none); - arith(fpc, 0, DIV, scale(tmp, 2X), MASK_Z, + arith(fpc, 0, DP3, tmp, NVFX_FP_MASK_X, src[0], src[0], none); + arith(fpc, 0, DP3, tmp, NVFX_FP_MASK_Y, src[0], src[1], none); + arith(fpc, 0, DIV, scale(tmp, 2X), NVFX_FP_MASK_Z, swz(tmp, Y, Y, Y, Y), swz(tmp, X, X, X, X), none); arith(fpc, sat, MAD, dst, mask, swz(tmp, Z, Z, Z, Z), src[0], neg(src[1])); @@ -583,7 +566,7 @@ nvfx_fragprog_parse_instruction(struct nvfx_context* nvfx, struct nvfx_fpc *fpc, arith(fpc, sat, RSQ_NV30, dst, mask, abs(swz(src[0], X, X, X, X)), none, none); else { tmp = temp(fpc); - arith(fpc, 0, LG2, scale(tmp, INV_2X), MASK_X, + arith(fpc, 0, LG2, scale(tmp, INV_2X), NVFX_FP_MASK_X, abs(swz(src[0], X, X, X, X)), none, none); arith(fpc, sat, EX2, dst, mask, neg(swz(tmp, X, X, X, X)), none, none); @@ -591,25 +574,25 @@ nvfx_fragprog_parse_instruction(struct nvfx_context* nvfx, struct nvfx_fpc *fpc, break; case TGSI_OPCODE_SCS: /* avoid overwriting the source */ - if(src[0].swz[SWZ_X] != SWZ_X) + if(src[0].swz[NVFX_SWZ_X] != NVFX_SWZ_X) { - if (mask & MASK_X) { - arith(fpc, sat, COS, dst, MASK_X, + if (mask & NVFX_FP_MASK_X) { + arith(fpc, sat, COS, dst, NVFX_FP_MASK_X, swz(src[0], X, X, X, X), none, none); } - if (mask & MASK_Y) { - arith(fpc, sat, SIN, dst, MASK_Y, + if (mask & NVFX_FP_MASK_Y) { + arith(fpc, sat, SIN, dst, NVFX_FP_MASK_Y, swz(src[0], X, X, X, X), none, none); } } else { - if (mask & MASK_Y) { - arith(fpc, sat, SIN, dst, MASK_Y, + if (mask & NVFX_FP_MASK_Y) { + arith(fpc, sat, SIN, dst, NVFX_FP_MASK_Y, swz(src[0], X, X, X, X), none, none); } - if (mask & MASK_X) { - arith(fpc, sat, COS, dst, MASK_X, + if (mask & NVFX_FP_MASK_X) { + arith(fpc, sat, COS, dst, NVFX_FP_MASK_X, swz(src[0], X, X, X, X), none, none); } } @@ -657,7 +640,7 @@ nvfx_fragprog_parse_instruction(struct nvfx_context* nvfx, struct nvfx_fpc *fpc, tmp = temp(fpc); arith(fpc, 0, MUL, tmp, mask, swz(src[0], Z, X, Y, Y), swz(src[1], Y, Z, X, X), none); - arith(fpc, sat, MAD, dst, (mask & ~MASK_W), + arith(fpc, sat, MAD, dst, (mask & ~NVFX_FP_MASK_W), swz(src[0], Y, Z, X, X), swz(src[1], Z, X, Y, Y), neg(tmp)); break; diff --git a/src/gallium/drivers/nvfx/nvfx_shader.h b/src/gallium/drivers/nvfx/nvfx_shader.h index 191131a40a..0b2f044f7f 100644 --- a/src/gallium/drivers/nvfx/nvfx_shader.h +++ b/src/gallium/drivers/nvfx/nvfx_shader.h @@ -9,15 +9,6 @@ #define NVFX_VP_INST_SLOT_VEC 0 #define NVFX_VP_INST_SLOT_SCA 1 -#define NVFX_VP_INST_COND_FL 0 /* guess */ -#define NVFX_VP_INST_COND_LT 1 -#define NVFX_VP_INST_COND_EQ 2 -#define NVFX_VP_INST_COND_LE 3 -#define NVFX_VP_INST_COND_GT 4 -#define NVFX_VP_INST_COND_NE 5 -#define NVFX_VP_INST_COND_GE 6 -#define NVFX_VP_INST_COND_TR 7 /* guess */ - #define NVFX_VP_INST_IN_POS 0 /* These seem to match the bindings specified in */ #define NVFX_VP_INST_IN_WEIGHT 1 /* the ARB_v_p spec (2.14.3.1) */ #define NVFX_VP_INST_IN_NORMAL 2 @@ -327,13 +318,45 @@ # define NVFX_FP_SWIZZLE_W 3 #define NVFX_FP_REG_NEGATE (1 << 17) -#ifndef NVFX_SHADER_NO_FUCKEDNESS #define NVFXSR_NONE 0 #define NVFXSR_OUTPUT 1 #define NVFXSR_INPUT 2 #define NVFXSR_TEMP 3 #define NVFXSR_CONST 4 +#define NVFX_COND_FL 0 +#define NVFX_COND_LT 1 +#define NVFX_COND_EQ 2 +#define NVFX_COND_LE 3 +#define NVFX_COND_GT 4 +#define NVFX_COND_NE 5 +#define NVFX_COND_GE 6 +#define NVFX_COND_TR 7 + +/* Yes, this are ordered differently... */ + +#define NVFX_VP_MASK_X 8 +#define NVFX_VP_MASK_Y 4 +#define NVFX_VP_MASK_Z 2 +#define NVFX_VP_MASK_W 1 +#define NVFX_VP_MASK_ALL 0xf + +#define NVFX_FP_MASK_X 1 +#define NVFX_FP_MASK_Y 2 +#define NVFX_FP_MASK_Z 4 +#define NVFX_FP_MASK_W 8 +#define NVFX_FP_MASK_ALL 0xf + +#define NVFX_SWZ_X 0 +#define NVFX_SWZ_Y 1 +#define NVFX_SWZ_Z 2 +#define NVFX_SWZ_W 3 + +#define swz(s,x,y,z,w) nvfx_sr_swz((s), NVFX_SWZ_##x, NVFX_SWZ_##y, NVFX_SWZ_##z, NVFX_SWZ_##w) +#define neg(s) nvfx_sr_neg((s)) +#define abs(s) nvfx_sr_abs((s)) +#define scale(s,v) nvfx_sr_scale((s), NVFX_FP_OP_DST_SCALE_##v) + struct nvfx_sreg { int type; int index; @@ -357,13 +380,13 @@ nvfx_sr(int type, int index) struct nvfx_sreg temp = { .type = type, .index = index, - .dst_scale = DEF_SCALE, + .dst_scale = 0, .abs = 0, .negate = 0, .swz = { 0, 1, 2, 3 }, .cc_update = 0, .cc_update_reg = 0, - .cc_test = DEF_CTEST, + .cc_test = NVFX_COND_TR, .cc_test_reg = 0, .cc_swz = { 0, 1, 2, 3 }, }; @@ -375,10 +398,10 @@ nvfx_sr_swz(struct nvfx_sreg src, int x, int y, int z, int w) { struct nvfx_sreg dst = src; - dst.swz[SWZ_X] = src.swz[x]; - dst.swz[SWZ_Y] = src.swz[y]; - dst.swz[SWZ_Z] = src.swz[z]; - dst.swz[SWZ_W] = src.swz[w]; + dst.swz[NVFX_SWZ_X] = src.swz[x]; + dst.swz[NVFX_SWZ_Y] = src.swz[y]; + dst.swz[NVFX_SWZ_Z] = src.swz[z]; + dst.swz[NVFX_SWZ_W] = src.swz[w]; return dst; } @@ -402,6 +425,5 @@ nvfx_sr_scale(struct nvfx_sreg src, int scale) src.dst_scale = scale; return src; } -#endif #endif diff --git a/src/gallium/drivers/nvfx/nvfx_vertprog.c b/src/gallium/drivers/nvfx/nvfx_vertprog.c index 3d0e8c23a1..e5e49bf0c2 100644 --- a/src/gallium/drivers/nvfx/nvfx_vertprog.c +++ b/src/gallium/drivers/nvfx/nvfx_vertprog.c @@ -22,24 +22,9 @@ * 4. bugs */ -#define SWZ_X 0 -#define SWZ_Y 1 -#define SWZ_Z 2 -#define SWZ_W 3 -#define MASK_X 8 -#define MASK_Y 4 -#define MASK_Z 2 -#define MASK_W 1 -#define MASK_ALL (MASK_X|MASK_Y|MASK_Z|MASK_W) -#define DEF_SCALE 0 -#define DEF_CTEST 0 #include "nv30_vertprog.h" #include "nv40_vertprog.h" -#define swz(s,x,y,z,w) nvfx_sr_swz((s), SWZ_##x, SWZ_##y, SWZ_##z, SWZ_##w) -#define neg(s) nvfx_sr_neg((s)) -#define abs(s) nvfx_sr_abs((s)) - #define NVFX_VP_INST_DEST_CLIP(n) ((~0 - 6) + (n)) struct nvfx_vpc { @@ -307,7 +292,7 @@ nvfx_vp_arith(struct nvfx_context* nvfx, struct nvfx_vpc *vpc, int slot, int op, hw = vpc->vpi->data; - hw[0] |= (NVFX_VP_INST_COND_TR << NVFX_VP(INST_COND_SHIFT)); + hw[0] |= (NVFX_COND_TR << NVFX_VP(INST_COND_SHIFT)); hw[0] |= ((0 << NVFX_VP(INST_COND_SWZ_X_SHIFT)) | (1 << NVFX_VP(INST_COND_SWZ_Y_SHIFT)) | (2 << NVFX_VP(INST_COND_SWZ_Z_SHIFT)) | @@ -405,10 +390,10 @@ tgsi_mask(uint tgsi) { int mask = 0; - if (tgsi & TGSI_WRITEMASK_X) mask |= MASK_X; - if (tgsi & TGSI_WRITEMASK_Y) mask |= MASK_Y; - if (tgsi & TGSI_WRITEMASK_Z) mask |= MASK_Z; - if (tgsi & TGSI_WRITEMASK_W) mask |= MASK_W; + if (tgsi & TGSI_WRITEMASK_X) mask |= NVFX_VP_MASK_X; + if (tgsi & TGSI_WRITEMASK_Y) mask |= NVFX_VP_MASK_Y; + if (tgsi & TGSI_WRITEMASK_Z) mask |= NVFX_VP_MASK_Z; + if (tgsi & TGSI_WRITEMASK_W) mask |= NVFX_VP_MASK_W; return mask; } @@ -434,7 +419,7 @@ src_native_swz(struct nvfx_context* nvfx, struct nvfx_vpc *vpc, const struct tgs } } - if (mask == MASK_ALL) + if (mask == NVFX_VP_MASK_ALL) return TRUE; *src = temp(vpc); @@ -490,7 +475,7 @@ nvfx_vertprog_parse_instruction(struct nvfx_context* nvfx, struct nvfx_vpc *vpc, src[i] = tgsi_src(vpc, fsrc); } else { src[i] = temp(vpc); - arith(vpc, VEC, MOV, src[i], MASK_ALL, + arith(vpc, VEC, MOV, src[i], NVFX_VP_MASK_ALL, tgsi_src(vpc, fsrc), none, none); } break; @@ -501,7 +486,7 @@ nvfx_vertprog_parse_instruction(struct nvfx_context* nvfx, struct nvfx_vpc *vpc, src[i] = tgsi_src(vpc, fsrc); } else { src[i] = temp(vpc); - arith(vpc, VEC, MOV, src[i], MASK_ALL, + arith(vpc, VEC, MOV, src[i], NVFX_VP_MASK_ALL, tgsi_src(vpc, fsrc), none, none); } break; @@ -512,7 +497,7 @@ nvfx_vertprog_parse_instruction(struct nvfx_context* nvfx, struct nvfx_vpc *vpc, src[i] = tgsi_src(vpc, fsrc); } else { src[i] = temp(vpc); - arith(vpc, VEC, MOV, src[i], MASK_ALL, + arith(vpc, VEC, MOV, src[i], NVFX_VP_MASK_ALL, tgsi_src(vpc, fsrc), none, none); } break; @@ -588,9 +573,9 @@ nvfx_vertprog_parse_instruction(struct nvfx_context* nvfx, struct nvfx_vpc *vpc, break; case TGSI_OPCODE_POW: tmp = temp(vpc); - arith(vpc, SCA, LG2, tmp, MASK_X, none, none, + arith(vpc, SCA, LG2, tmp, NVFX_VP_MASK_X, none, none, swz(src[0], X, X, X, X)); - arith(vpc, VEC, MUL, tmp, MASK_X, swz(tmp, X, X, X, X), + arith(vpc, VEC, MUL, tmp, NVFX_VP_MASK_X, swz(tmp, X, X, X, X), swz(src[1], X, X, X, X), none); arith(vpc, SCA, EX2, dst, mask, none, none, swz(tmp, X, X, X, X)); @@ -619,7 +604,7 @@ nvfx_vertprog_parse_instruction(struct nvfx_context* nvfx, struct nvfx_vpc *vpc, tmp = temp(vpc); arith(vpc, VEC, MUL, tmp, mask, swz(src[0], Z, X, Y, Y), swz(src[1], Y, Z, X, X), none); - arith(vpc, VEC, MAD, dst, (mask & ~MASK_W), + arith(vpc, VEC, MAD, dst, (mask & ~NVFX_VP_MASK_W), swz(src[0], Y, Z, X, X), swz(src[1], Z, X, Y, Y), neg(tmp)); break; @@ -849,7 +834,7 @@ nvfx_vertprog_translate(struct nvfx_context *nvfx, NVFX_VP(INST_DEST_POS)); struct nvfx_sreg htmp = vpc->r_result[vpc->hpos_idx]; - arith(vpc, VEC, MOV, hpos, MASK_ALL, htmp, none, none); + arith(vpc, VEC, MOV, hpos, NVFX_VP_MASK_ALL, htmp, none, none); } /* Insert code to handle user clip planes */ @@ -865,9 +850,9 @@ nvfx_vertprog_translate(struct nvfx_context *nvfx, unsigned mask; switch (i) { - case 0: case 3: mask = MASK_Y; break; - case 1: case 4: mask = MASK_Z; break; - case 2: case 5: mask = MASK_W; break; + case 0: case 3: mask = NVFX_VP_MASK_Y; break; + case 1: case 4: mask = NVFX_VP_MASK_Z; break; + case 2: case 5: mask = NVFX_VP_MASK_W; break; default: NOUVEAU_ERR("invalid clip dist #%d\n", i); goto out_err; -- cgit v1.2.3 From 9b3a908736130a62d79305586364f625a88a69ee Mon Sep 17 00:00:00 2001 From: Luca Barbieri Date: Sat, 13 Mar 2010 17:42:57 +0100 Subject: nvfx: remove src_native_swz, which was a no-op src_native_swz was used to translate 0/1 swizzles back when Gallium supported them. That support was later removed from Gallium, and the function currently always returns true. Remove it. --- src/gallium/drivers/nvfx/nvfx_fragprog.c | 44 -------------------------------- src/gallium/drivers/nvfx/nvfx_vertprog.c | 44 -------------------------------- 2 files changed, 88 deletions(-) (limited to 'src') diff --git a/src/gallium/drivers/nvfx/nvfx_fragprog.c b/src/gallium/drivers/nvfx/nvfx_fragprog.c index 8066528a5b..76351430f4 100644 --- a/src/gallium/drivers/nvfx/nvfx_fragprog.c +++ b/src/gallium/drivers/nvfx/nvfx_fragprog.c @@ -298,39 +298,6 @@ tgsi_mask(uint tgsi) return mask; } -static boolean -src_native_swz(struct nvfx_fpc *fpc, const struct tgsi_full_src_register *fsrc, - struct nvfx_sreg *src) -{ - const struct nvfx_sreg none = nvfx_sr(NVFXSR_NONE, 0); - struct nvfx_sreg tgsi = tgsi_src(fpc, fsrc); - uint mask = 0; - uint c; - - for (c = 0; c < 4; c++) { - switch (tgsi_util_get_full_src_register_swizzle(fsrc, c)) { - case TGSI_SWIZZLE_X: - case TGSI_SWIZZLE_Y: - case TGSI_SWIZZLE_Z: - case TGSI_SWIZZLE_W: - mask |= (1 << c); - break; - default: - assert(0); - } - } - - if (mask == NVFX_FP_MASK_ALL) - return TRUE; - - *src = temp(fpc); - - if (mask) - arith(fpc, 0, MOV, *src, mask, tgsi, none, none); - - return FALSE; -} - static boolean nvfx_fragprog_parse_instruction(struct nvfx_context* nvfx, struct nvfx_fpc *fpc, const struct tgsi_full_instruction *finst) @@ -358,17 +325,6 @@ nvfx_fragprog_parse_instruction(struct nvfx_context* nvfx, struct nvfx_fpc *fpc, fsrc = &finst->Src[i]; - switch (fsrc->Register.File) { - case TGSI_FILE_INPUT: - case TGSI_FILE_CONSTANT: - case TGSI_FILE_TEMPORARY: - if (!src_native_swz(fpc, fsrc, &src[i])) - continue; - break; - default: - break; - } - switch (fsrc->Register.File) { case TGSI_FILE_INPUT: if (ai == -1 || ai == fsrc->Register.Index) { diff --git a/src/gallium/drivers/nvfx/nvfx_vertprog.c b/src/gallium/drivers/nvfx/nvfx_vertprog.c index e5e49bf0c2..2d243be16a 100644 --- a/src/gallium/drivers/nvfx/nvfx_vertprog.c +++ b/src/gallium/drivers/nvfx/nvfx_vertprog.c @@ -397,39 +397,6 @@ tgsi_mask(uint tgsi) return mask; } -static boolean -src_native_swz(struct nvfx_context* nvfx, struct nvfx_vpc *vpc, const struct tgsi_full_src_register *fsrc, - struct nvfx_sreg *src) -{ - const struct nvfx_sreg none = nvfx_sr(NVFXSR_NONE, 0); - struct nvfx_sreg tgsi = tgsi_src(vpc, fsrc); - uint mask = 0; - uint c; - - for (c = 0; c < 4; c++) { - switch (tgsi_util_get_full_src_register_swizzle(fsrc, c)) { - case TGSI_SWIZZLE_X: - case TGSI_SWIZZLE_Y: - case TGSI_SWIZZLE_Z: - case TGSI_SWIZZLE_W: - mask |= tgsi_mask(1 << c); - break; - default: - assert(0); - } - } - - if (mask == NVFX_VP_MASK_ALL) - return TRUE; - - *src = temp(vpc); - - if (mask) - arith(vpc, VEC, MOV, *src, mask, tgsi, none, none); - - return FALSE; -} - static boolean nvfx_vertprog_parse_instruction(struct nvfx_context* nvfx, struct nvfx_vpc *vpc, const struct tgsi_full_instruction *finst) @@ -457,17 +424,6 @@ nvfx_vertprog_parse_instruction(struct nvfx_context* nvfx, struct nvfx_vpc *vpc, fsrc = &finst->Src[i]; - switch (fsrc->Register.File) { - case TGSI_FILE_INPUT: - case TGSI_FILE_CONSTANT: - case TGSI_FILE_TEMPORARY: - if (!src_native_swz(nvfx, vpc, fsrc, &src[i])) - continue; - break; - default: - break; - } - switch (fsrc->Register.File) { case TGSI_FILE_INPUT: if (ai == -1 || ai == fsrc->Register.Index) { -- cgit v1.2.3 From a899c5a76ee056e237b19d97afaadd84bca9649f Mon Sep 17 00:00:00 2001 From: Ben Skeggs Date: Mon, 15 Mar 2010 16:52:25 +1000 Subject: nv50: reset vbo_fifo before each validate --- src/gallium/drivers/nv50/nv50_vbo.c | 1 + 1 file changed, 1 insertion(+) (limited to 'src') diff --git a/src/gallium/drivers/nv50/nv50_vbo.c b/src/gallium/drivers/nv50/nv50_vbo.c index 6b9c1ee231..5047286806 100644 --- a/src/gallium/drivers/nv50/nv50_vbo.c +++ b/src/gallium/drivers/nv50/nv50_vbo.c @@ -549,6 +549,7 @@ nv50_vbo_validate(struct nv50_context *nv50) if (nv50->vtxbuf_nr == 0) return NULL; + nv50->vbo_fifo = 0; if (nv50->screen->force_push || nv50->vertprog->cfg.edgeflag_in < 16) nv50->vbo_fifo = 0xffff; -- cgit v1.2.3 From 68e58a96e80865878e6881dc4d34fcc3ec24eb19 Mon Sep 17 00:00:00 2001 From: Dave Airlie Date: Fri, 12 Feb 2010 15:39:51 +1000 Subject: r300g: rebuild screen/winsys interface This creates a cleaner winsys and drop the simple screen stuff. It makes r300g use pb_bufmgr structs. It also tries to avoid overheads from mapping too often. v5: clean warnings v6: break out of cache check on first buffer - since most likely the first busy one implies all after it are busy. v7: cleanup a bit v8-merged: drop cman for now to just get all the interface changes in first. rework to changes that happened upstream Signed-off-by: Dave Airlie --- src/gallium/drivers/r300/Makefile | 1 + src/gallium/drivers/r300/r300_context.c | 34 +- src/gallium/drivers/r300/r300_context.h | 9 +- src/gallium/drivers/r300/r300_cs.h | 22 +- src/gallium/drivers/r300/r300_emit.c | 73 ++-- src/gallium/drivers/r300/r300_render.c | 20 +- src/gallium/drivers/r300/r300_screen.c | 30 +- src/gallium/drivers/r300/r300_screen.h | 5 +- src/gallium/drivers/r300/r300_screen_buffer.c | 314 ++++++++++++++++++ src/gallium/drivers/r300/r300_screen_buffer.h | 99 ++++++ src/gallium/drivers/r300/r300_state.c | 28 +- src/gallium/drivers/r300/r300_texture.c | 52 ++- src/gallium/drivers/r300/r300_texture.h | 4 +- src/gallium/drivers/r300/r300_transfer.c | 12 +- src/gallium/drivers/r300/r300_winsys.h | 146 +++++++- src/gallium/winsys/drm/radeon/core/Makefile | 2 +- src/gallium/winsys/drm/radeon/core/radeon_buffer.h | 66 ++-- src/gallium/winsys/drm/radeon/core/radeon_drm.c | 41 ++- src/gallium/winsys/drm/radeon/core/radeon_drm.h | 16 + .../winsys/drm/radeon/core/radeon_drm_buffer.c | 368 +++++++++++++++++++++ src/gallium/winsys/drm/radeon/core/radeon_r300.c | 301 +++++++++++++---- src/gallium/winsys/drm/radeon/core/radeon_r300.h | 2 +- src/gallium/winsys/drm/radeon/core/radeon_winsys.h | 99 ++---- 23 files changed, 1465 insertions(+), 279 deletions(-) create mode 100644 src/gallium/drivers/r300/r300_screen_buffer.c create mode 100644 src/gallium/drivers/r300/r300_screen_buffer.h create mode 100644 src/gallium/winsys/drm/radeon/core/radeon_drm_buffer.c (limited to 'src') diff --git a/src/gallium/drivers/r300/Makefile b/src/gallium/drivers/r300/Makefile index 61b54af4dd..a6529b2060 100644 --- a/src/gallium/drivers/r300/Makefile +++ b/src/gallium/drivers/r300/Makefile @@ -14,6 +14,7 @@ C_SOURCES = \ r300_query.c \ r300_render.c \ r300_screen.c \ + r300_screen_buffer.c \ r300_state.c \ r300_state_derived.c \ r300_state_invariant.c \ diff --git a/src/gallium/drivers/r300/r300_context.c b/src/gallium/drivers/r300/r300_context.c index ed24fb54ab..d994a46ccf 100644 --- a/src/gallium/drivers/r300/r300_context.c +++ b/src/gallium/drivers/r300/r300_context.c @@ -24,6 +24,7 @@ #include "util/u_memory.h" #include "util/u_simple_list.h" +#include "util/u_upload_mgr.h" #include "r300_blit.h" #include "r300_context.h" @@ -55,6 +56,9 @@ static void r300_destroy_context(struct pipe_context* context) FREE(query); } + u_upload_destroy(r300->upload_vb); + u_upload_destroy(r300->upload_ib); + FREE(r300->blend_color_state.state); FREE(r300->clip_state.state); FREE(r300->fb_state.state); @@ -72,8 +76,7 @@ r300_is_texture_referenced(struct pipe_context *pipe, struct pipe_texture *texture, unsigned face, unsigned level) { - return pipe->is_buffer_referenced(pipe, - ((struct r300_texture *)texture)->buffer); + return 0; } static unsigned int @@ -157,14 +160,14 @@ struct pipe_context* r300_create_context(struct pipe_screen* screen, { struct r300_context* r300 = CALLOC_STRUCT(r300_context); struct r300_screen* r300screen = r300_screen(screen); - struct radeon_winsys* radeon_winsys = r300screen->radeon_winsys; + struct r300_winsys_screen *rws = r300screen->rws; if (!r300) return NULL; - r300->winsys = radeon_winsys; + r300->rws = rws; - r300->context.winsys = (struct pipe_winsys*)radeon_winsys; + r300->context.winsys = (struct pipe_winsys*)rws; r300->context.screen = screen; r300->context.priv = priv; @@ -214,10 +217,29 @@ struct pipe_context* r300_create_context(struct pipe_screen* screen, r300->invariant_state.dirty = TRUE; - r300->winsys->set_flush_cb(r300->winsys, r300_flush_cb, r300); + rws->set_flush_cb(r300->rws, r300_flush_cb, r300); r300->dirty_hw++; r300->blitter = util_blitter_create(&r300->context); + r300->upload_ib = u_upload_create(screen, + 32 * 1024, 16, + PIPE_BUFFER_USAGE_INDEX); + + if (r300->upload_ib == NULL) + goto no_upload_ib; + + r300->upload_vb = u_upload_create(screen, + 128 * 1024, 16, + PIPE_BUFFER_USAGE_VERTEX); + if (r300->upload_vb == NULL) + goto no_upload_vb; + return &r300->context; + + no_upload_ib: + u_upload_destroy(r300->upload_ib); + no_upload_vb: + FREE(r300); + return NULL; } diff --git a/src/gallium/drivers/r300/r300_context.h b/src/gallium/drivers/r300/r300_context.h index 03b09603c7..db2f74e074 100644 --- a/src/gallium/drivers/r300/r300_context.h +++ b/src/gallium/drivers/r300/r300_context.h @@ -32,6 +32,7 @@ #include "r300_screen.h" +struct u_upload_mgr; struct r300_context; struct r300_fragment_shader; @@ -268,7 +269,7 @@ struct r300_texture { boolean is_npot; /* Pipe buffer backing this texture. */ - struct pipe_buffer* buffer; + struct r300_winsys_buffer *buffer; /* Registers carrying texture format data. */ struct r300_texture_format_state state; @@ -302,7 +303,7 @@ struct r300_context { struct pipe_context context; /* The interface to the windowing system, etc. */ - struct radeon_winsys* winsys; + struct r300_winsys_screen *rws; /* Draw module. Used mostly for SW TCL. */ struct draw_context* draw; /* Accelerated blit support. */ @@ -368,6 +369,7 @@ struct r300_context { int vertex_buffer_max_index; /* Vertex elements for Gallium. */ struct r300_vertex_element_state *velems; + bool any_user_vbs; /* Vertex info for Draw. */ struct vertex_info vertex_info; @@ -388,6 +390,9 @@ struct r300_context { uint32_t zbuffer_bpp; /* Whether scissor is enabled. */ boolean scissor_enabled; + /* upload managers */ + struct u_upload_mgr *upload_vb; + struct u_upload_mgr *upload_ib; }; /* Convenience cast wrapper. */ diff --git a/src/gallium/drivers/r300/r300_cs.h b/src/gallium/drivers/r300/r300_cs.h index 151f72b0fe..ad07efbffd 100644 --- a/src/gallium/drivers/r300/r300_cs.h +++ b/src/gallium/drivers/r300/r300_cs.h @@ -51,7 +51,7 @@ #define CS_LOCALS(context) \ struct r300_context* const cs_context_copy = (context); \ - struct radeon_winsys* cs_winsys = cs_context_copy->winsys; \ + struct r300_winsys_screen *cs_winsys = cs_context_copy->rws; \ int cs_count = 0; (void) cs_count; #define CHECK_CS(size) \ @@ -105,22 +105,34 @@ cs_count--; \ } while (0) -#define OUT_CS_RELOC(bo, offset, rd, wd, flags) do { \ +#define OUT_CS_BUF_RELOC(bo, offset, rd, wd, flags) do { \ DBG(cs_context_copy, DBG_CS, "r300: writing relocation for buffer %p, offset %d, " \ "domains (%d, %d, %d)\n", \ bo, offset, rd, wd, flags); \ assert(bo); \ cs_winsys->write_cs_dword(cs_winsys, offset); \ - cs_winsys->write_cs_reloc(cs_winsys, bo, rd, wd, flags); \ + r300_buffer_write_reloc(cs_winsys, r300_buffer(bo), rd, wd, flags); \ cs_count -= 3; \ } while (0) -#define OUT_CS_RELOC_NO_OFFSET(bo, rd, wd, flags) do { \ + +#define OUT_CS_TEX_RELOC(tex, offset, rd, wd, flags) do { \ + DBG(cs_context_copy, DBG_CS, "r300: writing relocation for texture %p, offset %d, " \ + "domains (%d, %d, %d)\n", \ + tex, offset, rd, wd, flags); \ + assert(tex); \ + cs_winsys->write_cs_dword(cs_winsys, offset); \ + r300_texture_write_reloc(cs_winsys, tex, rd, wd, flags); \ + cs_count -= 3; \ +} while (0) + + +#define OUT_CS_BUF_RELOC_NO_OFFSET(bo, rd, wd, flags) do { \ DBG(cs_context_copy, DBG_CS, "r300: writing relocation for buffer %p, " \ "domains (%d, %d, %d)\n", \ bo, rd, wd, flags); \ assert(bo); \ - cs_winsys->write_cs_reloc(cs_winsys, bo, rd, wd, flags); \ + r300_buffer_write_reloc(cs_winsys, r300_buffer(bo), rd, wd, flags); \ cs_count -= 2; \ } while (0) diff --git a/src/gallium/drivers/r300/r300_emit.c b/src/gallium/drivers/r300/r300_emit.c index f8242625fe..d8c64dd900 100644 --- a/src/gallium/drivers/r300/r300_emit.c +++ b/src/gallium/drivers/r300/r300_emit.c @@ -32,6 +32,8 @@ #include "r300_emit.h" #include "r300_fs.h" #include "r300_screen.h" +#include "r300_screen_buffer.h" +#include "r300_state_inlines.h" #include "r300_vs.h" void r300_emit_blend_state(struct r300_context* r300, @@ -415,10 +417,10 @@ void r300_emit_fb_state(struct r300_context* r300, unsigned size, void* state) assert(tex && tex->buffer && "cbuf is marked, but NULL!"); OUT_CS_REG_SEQ(R300_RB3D_COLOROFFSET0 + (4 * i), 1); - OUT_CS_RELOC(tex->buffer, surf->offset, 0, RADEON_GEM_DOMAIN_VRAM, 0); + OUT_CS_TEX_RELOC(tex, surf->offset, 0, RADEON_GEM_DOMAIN_VRAM, 0); OUT_CS_REG_SEQ(R300_RB3D_COLORPITCH0 + (4 * i), 1); - OUT_CS_RELOC(tex->buffer, tex->fb_state.colorpitch[surf->level], + OUT_CS_TEX_RELOC(tex, tex->fb_state.colorpitch[surf->level], 0, RADEON_GEM_DOMAIN_VRAM, 0); OUT_CS_REG(R300_US_OUT_FMT_0 + (4 * i), tex->fb_state.us_out_fmt); @@ -434,12 +436,12 @@ void r300_emit_fb_state(struct r300_context* r300, unsigned size, void* state) assert(tex && tex->buffer && "zsbuf is marked, but NULL!"); OUT_CS_REG_SEQ(R300_ZB_DEPTHOFFSET, 1); - OUT_CS_RELOC(tex->buffer, surf->offset, 0, RADEON_GEM_DOMAIN_VRAM, 0); + OUT_CS_TEX_RELOC(tex, surf->offset, 0, RADEON_GEM_DOMAIN_VRAM, 0); OUT_CS_REG(R300_ZB_FORMAT, tex->fb_state.zb_format); OUT_CS_REG_SEQ(R300_ZB_DEPTHPITCH, 1); - OUT_CS_RELOC(tex->buffer, tex->fb_state.depthpitch[surf->level], + OUT_CS_TEX_RELOC(tex, tex->fb_state.depthpitch[surf->level], 0, RADEON_GEM_DOMAIN_VRAM, 0); } @@ -491,13 +493,13 @@ static void r300_emit_query_finish(struct r300_context *r300, /* pipe 3 only */ OUT_CS_REG(R300_SU_REG_DEST, 1 << 3); OUT_CS_REG_SEQ(R300_ZB_ZPASS_ADDR, 1); - OUT_CS_RELOC(r300->oqbo, query->offset + (sizeof(uint32_t) * 3), + OUT_CS_BUF_RELOC(r300->oqbo, query->offset + (sizeof(uint32_t) * 3), 0, RADEON_GEM_DOMAIN_GTT, 0); case 3: /* pipe 2 only */ OUT_CS_REG(R300_SU_REG_DEST, 1 << 2); OUT_CS_REG_SEQ(R300_ZB_ZPASS_ADDR, 1); - OUT_CS_RELOC(r300->oqbo, query->offset + (sizeof(uint32_t) * 2), + OUT_CS_BUF_RELOC(r300->oqbo, query->offset + (sizeof(uint32_t) * 2), 0, RADEON_GEM_DOMAIN_GTT, 0); case 2: /* pipe 1 only */ @@ -505,13 +507,13 @@ static void r300_emit_query_finish(struct r300_context *r300, OUT_CS_REG(R300_SU_REG_DEST, 1 << (caps->high_second_pipe ? 3 : 1)); OUT_CS_REG_SEQ(R300_ZB_ZPASS_ADDR, 1); - OUT_CS_RELOC(r300->oqbo, query->offset + (sizeof(uint32_t) * 1), + OUT_CS_BUF_RELOC(r300->oqbo, query->offset + (sizeof(uint32_t) * 1), 0, RADEON_GEM_DOMAIN_GTT, 0); case 1: /* pipe 0 only */ OUT_CS_REG(R300_SU_REG_DEST, 1 << 0); OUT_CS_REG_SEQ(R300_ZB_ZPASS_ADDR, 1); - OUT_CS_RELOC(r300->oqbo, query->offset + (sizeof(uint32_t) * 0), + OUT_CS_BUF_RELOC(r300->oqbo, query->offset + (sizeof(uint32_t) * 0), 0, RADEON_GEM_DOMAIN_GTT, 0); break; default: @@ -533,7 +535,7 @@ static void rv530_emit_query_single(struct r300_context *r300, BEGIN_CS(8); OUT_CS_REG(RV530_FG_ZBREG_DEST, RV530_FG_ZBREG_DEST_PIPE_SELECT_0); OUT_CS_REG_SEQ(R300_ZB_ZPASS_ADDR, 1); - OUT_CS_RELOC(r300->oqbo, query->offset, 0, RADEON_GEM_DOMAIN_GTT, 0); + OUT_CS_BUF_RELOC(r300->oqbo, query->offset, 0, RADEON_GEM_DOMAIN_GTT, 0); OUT_CS_REG(RV530_FG_ZBREG_DEST, RV530_FG_ZBREG_DEST_PIPE_SELECT_ALL); END_CS; } @@ -546,10 +548,10 @@ static void rv530_emit_query_double(struct r300_context *r300, BEGIN_CS(14); OUT_CS_REG(RV530_FG_ZBREG_DEST, RV530_FG_ZBREG_DEST_PIPE_SELECT_0); OUT_CS_REG_SEQ(R300_ZB_ZPASS_ADDR, 1); - OUT_CS_RELOC(r300->oqbo, query->offset, 0, RADEON_GEM_DOMAIN_GTT, 0); + OUT_CS_BUF_RELOC(r300->oqbo, query->offset, 0, RADEON_GEM_DOMAIN_GTT, 0); OUT_CS_REG(RV530_FG_ZBREG_DEST, RV530_FG_ZBREG_DEST_PIPE_SELECT_1); OUT_CS_REG_SEQ(R300_ZB_ZPASS_ADDR, 1); - OUT_CS_RELOC(r300->oqbo, query->offset + sizeof(uint32_t), 0, RADEON_GEM_DOMAIN_GTT, 0); + OUT_CS_BUF_RELOC(r300->oqbo, query->offset + sizeof(uint32_t), 0, RADEON_GEM_DOMAIN_GTT, 0); OUT_CS_REG(RV530_FG_ZBREG_DEST, RV530_FG_ZBREG_DEST_PIPE_SELECT_ALL); END_CS; } @@ -747,7 +749,7 @@ void r300_emit_textures_state(struct r300_context *r300, OUT_CS_REG(R300_TX_FORMAT2_0 + (i * 4), texstate->format[2]); OUT_CS_REG_SEQ(R300_TX_OFFSET_0 + (i * 4), 1); - OUT_CS_RELOC(allstate->textures[i]->buffer, texstate->tile_config, + OUT_CS_TEX_RELOC(allstate->textures[i], texstate->tile_config, RADEON_GEM_DOMAIN_GTT | RADEON_GEM_DOMAIN_VRAM, 0, 0); } } @@ -788,8 +790,8 @@ void r300_emit_aos(struct r300_context* r300, unsigned offset) } for (i = 0; i < aos_count; i++) { - OUT_CS_RELOC_NO_OFFSET(vbuf[velem[i].vertex_buffer_index].buffer, - RADEON_GEM_DOMAIN_GTT, 0, 0); + OUT_CS_BUF_RELOC_NO_OFFSET(vbuf[velem[i].vertex_buffer_index].buffer, + RADEON_GEM_DOMAIN_GTT, 0, 0); } END_CS; } @@ -814,7 +816,7 @@ void r300_emit_vertex_buffer(struct r300_context* r300) OUT_CS(r300->vertex_info.size | (r300->vertex_info.size << 8)); OUT_CS(r300->vbo_offset); - OUT_CS_RELOC(r300->vbo, 0, RADEON_GEM_DOMAIN_GTT, 0, 0); + OUT_CS_BUF_RELOC(r300->vbo, 0, RADEON_GEM_DOMAIN_GTT, 0, 0); END_CS; } @@ -1009,16 +1011,22 @@ void r300_emit_buffer_validate(struct r300_context *r300, unsigned i; boolean invalid = FALSE; + /* upload buffers first */ + if (r300->any_user_vbs) { + r300_upload_user_buffers(r300); + r300->any_user_vbs = false; + } + /* Clean out BOs. */ - r300->winsys->reset_bos(r300->winsys); + r300->rws->reset_bos(r300->rws); validate: /* Color buffers... */ for (i = 0; i < fb->nr_cbufs; i++) { tex = (struct r300_texture*)fb->cbufs[i]->texture; assert(tex && tex->buffer && "cbuf is marked, but NULL!"); - if (!r300->winsys->add_buffer(r300->winsys, tex->buffer, - 0, RADEON_GEM_DOMAIN_VRAM)) { + if (!r300_add_texture(r300->rws, tex, + 0, RADEON_GEM_DOMAIN_VRAM)) { r300->context.flush(&r300->context, 0, NULL); goto validate; } @@ -1027,8 +1035,8 @@ validate: if (fb->zsbuf) { tex = (struct r300_texture*)fb->zsbuf->texture; assert(tex && tex->buffer && "zsbuf is marked, but NULL!"); - if (!r300->winsys->add_buffer(r300->winsys, tex->buffer, - 0, RADEON_GEM_DOMAIN_VRAM)) { + if (!r300_add_texture(r300->rws, tex, + 0, RADEON_GEM_DOMAIN_VRAM)) { r300->context.flush(&r300->context, 0, NULL); goto validate; } @@ -1038,24 +1046,24 @@ validate: tex = texstate->textures[i]; if (!tex || !texstate->sampler_states[i]) continue; - if (!r300->winsys->add_buffer(r300->winsys, tex->buffer, - RADEON_GEM_DOMAIN_GTT | RADEON_GEM_DOMAIN_VRAM, 0)) { + if (!r300_add_texture(r300->rws, tex, + RADEON_GEM_DOMAIN_GTT | RADEON_GEM_DOMAIN_VRAM, 0)) { r300->context.flush(&r300->context, 0, NULL); goto validate; } } /* ...occlusion query buffer... */ if (r300->dirty_state & R300_NEW_QUERY) { - if (!r300->winsys->add_buffer(r300->winsys, r300->oqbo, - 0, RADEON_GEM_DOMAIN_GTT)) { + if (!r300_add_buffer(r300->rws, r300->oqbo, + 0, RADEON_GEM_DOMAIN_GTT)) { r300->context.flush(&r300->context, 0, NULL); goto validate; } } /* ...vertex buffer for SWTCL path... */ if (r300->vbo) { - if (!r300->winsys->add_buffer(r300->winsys, r300->vbo, - RADEON_GEM_DOMAIN_GTT, 0)) { + if (!r300_add_buffer(r300->rws, r300->vbo, + RADEON_GEM_DOMAIN_GTT, 0)) { r300->context.flush(&r300->context, 0, NULL); goto validate; } @@ -1065,23 +1073,22 @@ validate: for (i = 0; i < r300->velems->count; i++) { pbuf = vbuf[velem[i].vertex_buffer_index].buffer; - if (!r300->winsys->add_buffer(r300->winsys, pbuf, - RADEON_GEM_DOMAIN_GTT, 0)) { - r300->context.flush(&r300->context, 0, NULL); + if (!r300_add_buffer(r300->rws, pbuf, + RADEON_GEM_DOMAIN_GTT, 0)) { + r300->context.flush(&r300->context, 0, NULL); goto validate; } } } /* ...and index buffer for HWTCL path. */ if (index_buffer) { - if (!r300->winsys->add_buffer(r300->winsys, index_buffer, - RADEON_GEM_DOMAIN_GTT, 0)) { + if (!r300_add_buffer(r300->rws, index_buffer, + RADEON_GEM_DOMAIN_GTT, 0)) { r300->context.flush(&r300->context, 0, NULL); goto validate; } } - - if (!r300->winsys->validate(r300->winsys)) { + if (!r300->rws->validate(r300->rws)) { r300->context.flush(&r300->context, 0, NULL); if (invalid) { /* Well, hell. */ diff --git a/src/gallium/drivers/r300/r300_render.c b/src/gallium/drivers/r300/r300_render.c index 971e7f3521..47100c83b0 100644 --- a/src/gallium/drivers/r300/r300_render.c +++ b/src/gallium/drivers/r300/r300_render.c @@ -30,10 +30,12 @@ #include "util/u_format.h" #include "util/u_memory.h" +#include "util/u_upload_mgr.h" #include "util/u_prim.h" #include "r300_cs.h" #include "r300_context.h" +#include "r300_screen_buffer.h" #include "r300_emit.h" #include "r300_reg.h" #include "r300_render.h" @@ -123,7 +125,7 @@ static uint32_t r300_provoking_vertex_fixes(struct r300_context *r300, static boolean r300_reserve_cs_space(struct r300_context *r300, unsigned dwords) { - if (!r300->winsys->check_cs(r300->winsys, dwords)) { + if (!r300->rws->check_cs(r300->rws, dwords)) { r300->context.flush(&r300->context, 0, NULL); return TRUE; } @@ -153,15 +155,14 @@ static boolean immd_is_good_idea(struct r300_context *r300, if (!checked[vbi]) { vbuf = &r300->vertex_buffer[vbi]; - if (r300->winsys->is_buffer_referenced(r300->winsys, - vbuf->buffer)) { + if (r300_buffer_is_referenced(r300, + vbuf->buffer)) { /* It's a very bad idea to map it... */ return FALSE; } checked[vbi] = TRUE; } } - return TRUE; } @@ -345,8 +346,8 @@ static void r300_emit_draw_elements(struct r300_context *r300, OUT_CS(R300_INDX_BUFFER_ONE_REG_WR | (R300_VAP_PORT_IDX0 >> 2) | (0 << R300_INDX_BUFFER_SKIP_SHIFT)); OUT_CS(offset_dwords << 2); - OUT_CS_RELOC(indexBuffer, count_dwords, - RADEON_GEM_DOMAIN_GTT, 0, 0); + OUT_CS_BUF_RELOC(indexBuffer, count_dwords, + RADEON_GEM_DOMAIN_GTT, 0, 0); END_CS; } @@ -413,12 +414,16 @@ void r300_draw_range_elements(struct pipe_context* pipe, r300_update_derived_state(r300); + r300_upload_index_buffer(r300, &indexBuffer, indexSize, start, count); + /* 128 dwords for emit_aos and emit_draw_elements */ r300_reserve_cs_space(r300, r300_get_num_dirty_dwords(r300) + 128); r300_emit_buffer_validate(r300, TRUE, indexBuffer); r300_emit_dirty_state(r300); r300_emit_aos(r300, 0); + u_upload_flush(r300->upload_vb); + u_upload_flush(r300->upload_ib); if (alt_num_verts || count <= 65535) { r300_emit_draw_elements(r300, indexBuffer, indexSize, minIndex, maxIndex, mode, start, count); @@ -441,7 +446,7 @@ void r300_draw_range_elements(struct pipe_context* pipe, } if (indexBuffer != orgIndexBuffer) { - pipe->screen->buffer_destroy(indexBuffer); + pipe_buffer_reference( &indexBuffer, NULL ); } } @@ -505,6 +510,7 @@ void r300_draw_arrays(struct pipe_context* pipe, unsigned mode, } } while (count); } + u_upload_flush(r300->upload_vb); } } diff --git a/src/gallium/drivers/r300/r300_screen.c b/src/gallium/drivers/r300/r300_screen.c index b6282fccd7..3e31688f8e 100644 --- a/src/gallium/drivers/r300/r300_screen.c +++ b/src/gallium/drivers/r300/r300_screen.c @@ -23,13 +23,14 @@ #include "util/u_format.h" #include "util/u_memory.h" -#include "util/u_simple_screen.h" #include "r300_context.h" #include "r300_texture.h" #include "radeon_winsys.h" +#include "r300_screen_buffer.h" + /* Return the identifier behind whom the brave coders responsible for this * amalgamation of code, sweat, and duct tape, routinely obscure their names. * @@ -253,15 +254,19 @@ static boolean r300_is_format_supported(struct pipe_screen* screen, static void r300_destroy_screen(struct pipe_screen* pscreen) { struct r300_screen* r300screen = r300_screen(pscreen); + struct r300_winsys_screen *rws = r300_winsys_screen(pscreen); + + if (rws) + rws->destroy(rws); FREE(r300screen->caps); FREE(r300screen); } -struct pipe_screen* r300_create_screen(struct radeon_winsys* radeon_winsys) +struct pipe_screen* r300_create_screen(struct r300_winsys_screen *rws) { - struct r300_screen* r300screen = CALLOC_STRUCT(r300_screen); - struct r300_capabilities* caps = CALLOC_STRUCT(r300_capabilities); + struct r300_screen *r300screen = CALLOC_STRUCT(r300_screen); + struct r300_capabilities *caps = CALLOC_STRUCT(r300_capabilities); if (!r300screen || !caps) { FREE(r300screen); @@ -269,16 +274,16 @@ struct pipe_screen* r300_create_screen(struct radeon_winsys* radeon_winsys) return NULL; } - caps->pci_id = radeon_winsys->pci_id; - caps->num_frag_pipes = radeon_winsys->gb_pipes; - caps->num_z_pipes = radeon_winsys->z_pipes; + caps->pci_id = rws->get_value(rws, R300_VID_PCI_ID); + caps->num_frag_pipes = rws->get_value(rws, R300_VID_GB_PIPES); + caps->num_z_pipes = rws->get_value(rws, R300_VID_Z_PIPES); r300_init_debug(r300screen); r300_parse_chipset(caps); r300screen->caps = caps; - r300screen->radeon_winsys = radeon_winsys; - r300screen->screen.winsys = (struct pipe_winsys*)radeon_winsys; + r300screen->rws = rws; + r300screen->screen.winsys = (struct pipe_winsys*)rws; r300screen->screen.destroy = r300_destroy_screen; r300screen->screen.get_name = r300_get_name; r300screen->screen.get_vendor = r300_get_vendor; @@ -288,8 +293,13 @@ struct pipe_screen* r300_create_screen(struct radeon_winsys* radeon_winsys) r300screen->screen.context_create = r300_create_context; r300_init_screen_texture_functions(&r300screen->screen); - u_simple_screen_init(&r300screen->screen); + r300_screen_init_buffer_functions(r300screen); return &r300screen->screen; } +struct r300_winsys_screen * +r300_winsys_screen(struct pipe_screen *screen) +{ + return r300_screen(screen)->rws; +} diff --git a/src/gallium/drivers/r300/r300_screen.h b/src/gallium/drivers/r300/r300_screen.h index abc1303e12..1ccc0bfb7a 100644 --- a/src/gallium/drivers/r300/r300_screen.h +++ b/src/gallium/drivers/r300/r300_screen.h @@ -36,7 +36,7 @@ struct r300_screen { /* Parent class */ struct pipe_screen screen; - struct radeon_winsys* radeon_winsys; + struct r300_winsys_screen *rws; /* Chipset capabilities */ struct r300_capabilities* caps; @@ -51,9 +51,6 @@ static INLINE struct r300_screen* r300_screen(struct pipe_screen* screen) { return (struct r300_screen*)screen; } -/* Creates a new r300 screen. */ -struct pipe_screen* r300_create_screen(struct radeon_winsys* radeon_winsys); - /* Debug functionality. */ /** diff --git a/src/gallium/drivers/r300/r300_screen_buffer.c b/src/gallium/drivers/r300/r300_screen_buffer.c new file mode 100644 index 0000000000..b97d0d76a4 --- /dev/null +++ b/src/gallium/drivers/r300/r300_screen_buffer.c @@ -0,0 +1,314 @@ +/* + * Copyright 2010 Red Hat Inc. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * on the rights to use, copy, modify, merge, publish, distribute, sub + * license, and/or sell copies of the Software, and to permit persons to whom + * the Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL + * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, + * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR + * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE + * USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * Authors: Dave Airlie + */ +#include + +#include "util/u_inlines.h" +#include "util/u_format.h" +#include "util/u_memory.h" +#include "util/u_upload_mgr.h" +#include "util/u_math.h" + +#include "r300_screen_buffer.h" + +#include "r300_winsys.h" + +boolean r300_buffer_is_referenced(struct r300_context *r300, + struct pipe_buffer *buf) +{ + struct r300_buffer *rbuf = r300_buffer(buf); + if (r300_buffer_is_user_buffer(buf)) + return FALSE; + + return r300->rws->is_buffer_referenced(r300->rws, rbuf->buf); + +} +int r300_upload_index_buffer(struct r300_context *r300, + struct pipe_buffer **index_buffer, + unsigned index_size, + unsigned start, + unsigned count) +{ + struct pipe_buffer *upload_buffer = NULL; + unsigned index_offset = start * index_size; + int ret = 0; + + if (r300_buffer_is_user_buffer(*index_buffer)) { + ret = u_upload_buffer(r300->upload_ib, + index_offset, + count * index_size, + *index_buffer, + &index_offset, + &upload_buffer); + if (ret) { + goto done; + } + *index_buffer = upload_buffer; + } + done: + // if (upload_buffer) + // pipe_buffer_reference(&upload_buffer, NULL); + return ret; +} + +int r300_upload_user_buffers(struct r300_context *r300) +{ + enum pipe_error ret = PIPE_OK; + int i, nr; + + nr = r300->vertex_buffer_count; + + for (i = 0; i < nr; i++) { + + if (r300_buffer_is_user_buffer(r300->vertex_buffer[i].buffer)) { + struct pipe_buffer *upload_buffer = NULL; + unsigned offset = 0; /*r300->vertex_buffer[i].buffer_offset * 4;*/ + unsigned size = r300->vertex_buffer[i].buffer->size; + unsigned upload_offset; + ret = u_upload_buffer(r300->upload_vb, + offset, size, + r300->vertex_buffer[i].buffer, + &upload_offset, &upload_buffer); + if (ret) + return ret; + + pipe_buffer_reference(&r300->vertex_buffer[i].buffer, NULL); + r300->vertex_buffer[i].buffer = upload_buffer; + r300->vertex_buffer[i].buffer_offset = upload_offset; + } + } + return ret; +} + +static struct r300_winsys_buffer * +r300_winsys_buffer_create(struct r300_screen *r300screen, + unsigned alignment, + unsigned usage, + unsigned size) +{ + struct r300_winsys_screen *rws = r300screen->rws; + struct r300_winsys_buffer *buf; + + buf = rws->buffer_create(rws, alignment, usage, size); + return buf; +} + +static void r300_winsys_buffer_destroy(struct r300_screen *r300screen, + struct r300_buffer *rbuf) +{ + struct r300_winsys_screen *rws = r300screen->rws; + + if (rbuf->buf) { + rws->buffer_reference(rws, &rbuf->buf, NULL); + rbuf->buf = NULL; + } +} + +static struct pipe_buffer *r300_buffer_create(struct pipe_screen *screen, + unsigned alignment, + unsigned usage, + unsigned size) +{ + struct r300_screen *r300screen = r300_screen(screen); + struct r300_buffer *rbuf; + + rbuf = CALLOC_STRUCT(r300_buffer); + if (!rbuf) + goto error1; + + rbuf->magic = R300_BUFFER_MAGIC; + + pipe_reference_init(&rbuf->base.reference, 1); + rbuf->base.screen = screen; + rbuf->base.alignment = alignment; + rbuf->base.usage = usage; + rbuf->base.size = size; + + rbuf->buf = r300_winsys_buffer_create(r300screen, + alignment, + usage, + size); + + if (!rbuf->buf) + goto error2; + + return &rbuf->base; +error2: + FREE(rbuf); +error1: + return NULL; +} + + +static struct pipe_buffer *r300_user_buffer_create(struct pipe_screen *screen, + void *ptr, + unsigned bytes) +{ + struct r300_buffer *rbuf; + + rbuf = CALLOC_STRUCT(r300_buffer); + if (!rbuf) + goto no_rbuf; + + rbuf->magic = R300_BUFFER_MAGIC; + + pipe_reference_init(&rbuf->base.reference, 1); + rbuf->base.screen = screen; + rbuf->base.alignment = 1; + rbuf->base.usage = 0; + rbuf->base.size = bytes; + + rbuf->user_buffer = ptr; + return &rbuf->base; + +no_rbuf: + return NULL; +} + +static void r300_buffer_destroy(struct pipe_buffer *buf) +{ + struct r300_screen *r300screen = r300_screen(buf->screen); + struct r300_buffer *rbuf = r300_buffer(buf); + + r300_winsys_buffer_destroy(r300screen, rbuf); + FREE(rbuf); +} + +static void * +r300_buffer_map_range(struct pipe_screen *screen, + struct pipe_buffer *buf, + unsigned offset, unsigned length, + unsigned usage ) +{ + struct r300_screen *r300screen = r300_screen(screen); + struct r300_winsys_screen *rws = r300screen->rws; + struct r300_buffer *rbuf = r300_buffer(buf); + void *map; + int flush = 0; + int i; + + if (rbuf->user_buffer) + return rbuf->user_buffer; + + if (rbuf->base.usage & PIPE_BUFFER_USAGE_CONSTANT) + goto just_map; + + /* check if the mapping is to a range we already flushed */ + if (usage & PIPE_BUFFER_USAGE_DISCARD) { + for (i = 0; i < rbuf->num_ranges; i++) { + + if ((offset >= rbuf->ranges[i].start) && + (offset < rbuf->ranges[i].end)) + flush = 1; + + if (flush) { + /* unreference this hw buffer and allocate a new one */ + rws->buffer_reference(rws, &rbuf->buf, NULL); + + rbuf->num_ranges = 0; + rbuf->map = NULL; + rbuf->buf = r300_winsys_buffer_create(r300screen, + rbuf->base.alignment, + rbuf->base.usage, + rbuf->base.size); + break; + } + } + } +just_map: + map = rws->buffer_map(rws, rbuf->buf, usage | R300_USAGE_FLAG_DONT_SYNC); + + return map; +} + +static void +r300_buffer_flush_mapped_range( struct pipe_screen *screen, + struct pipe_buffer *buf, + unsigned offset, + unsigned length ) +{ + struct r300_buffer *rbuf = r300_buffer(buf); + int i; + + if (rbuf->user_buffer) + return; + + if (rbuf->base.usage & PIPE_BUFFER_USAGE_CONSTANT) + return; + + /* mark the range as used */ + for(i = 0; i < rbuf->num_ranges; ++i) { + if(offset <= rbuf->ranges[i].end && rbuf->ranges[i].start <= (offset+length)) { + rbuf->ranges[i].start = MIN2(rbuf->ranges[i].start, offset); + rbuf->ranges[i].end = MAX2(rbuf->ranges[i].end, (offset+length)); + return; + } + } + + rbuf->ranges[rbuf->num_ranges].start = offset; + rbuf->ranges[rbuf->num_ranges].end = offset+length; + rbuf->num_ranges++; +} + +static void * +r300_buffer_map(struct pipe_screen *screen, + struct pipe_buffer *buf, + unsigned usage) +{ + struct r300_screen *r300screen = r300_screen(screen); + struct r300_winsys_screen *rws = r300screen->rws; + struct r300_buffer *rbuf = r300_buffer(buf); + void *map; + + if (rbuf->user_buffer) + return rbuf->user_buffer; + + map = rws->buffer_map(rws, rbuf->buf, usage); + + return map; +} + +static void +r300_buffer_unmap(struct pipe_screen *screen, + struct pipe_buffer *buf) +{ + struct r300_screen *r300screen = r300_screen(screen); + struct r300_winsys_screen *rws = r300screen->rws; + struct r300_buffer *rbuf = r300_buffer(buf); + + if (rbuf->buf) { + rws->buffer_unmap(rws, rbuf->buf); + } +} + +void r300_screen_init_buffer_functions(struct r300_screen *r300screen) +{ + r300screen->screen.buffer_create = r300_buffer_create; + r300screen->screen.user_buffer_create = r300_user_buffer_create; + r300screen->screen.buffer_map = r300_buffer_map; + r300screen->screen.buffer_map_range = r300_buffer_map_range; + r300screen->screen.buffer_flush_mapped_range = r300_buffer_flush_mapped_range; + r300screen->screen.buffer_unmap = r300_buffer_unmap; + r300screen->screen.buffer_destroy = r300_buffer_destroy; +} diff --git a/src/gallium/drivers/r300/r300_screen_buffer.h b/src/gallium/drivers/r300/r300_screen_buffer.h new file mode 100644 index 0000000000..0cf349c25c --- /dev/null +++ b/src/gallium/drivers/r300/r300_screen_buffer.h @@ -0,0 +1,99 @@ +#ifndef R300_SCREEN_BUFFER_H +#define R300_SCREEN_BUFFER_H +#include +#include "pipe/p_compiler.h" +#include "pipe/p_state.h" +#include "r300_screen.h" + +#include "r300_winsys.h" +#include "r300_context.h" + +#define R300_BUFFER_MAGIC 0xabcd1234 + +struct r300_buffer_range { + uint32_t start; + uint32_t end; +}; +#define R300_BUFFER_MAX_RANGES 32 + +struct r300_buffer +{ + struct pipe_buffer base; + + uint32_t magic; + + struct r300_winsys_buffer *buf; + + void *user_buffer; + struct r300_buffer_range ranges[R300_BUFFER_MAX_RANGES]; + unsigned num_ranges; + + void *map; +}; + +static INLINE struct r300_buffer * +r300_buffer(struct pipe_buffer *buffer) +{ + if (buffer) { + assert(((struct r300_buffer *)buffer)->magic == R300_BUFFER_MAGIC); + return (struct r300_buffer *)buffer; + } + return NULL; +} + +static INLINE boolean +r300_buffer_is_user_buffer(struct pipe_buffer *buffer) +{ + return r300_buffer(buffer)->user_buffer ? true : false; +} + +static INLINE boolean r300_add_buffer(struct r300_winsys_screen *rws, + struct pipe_buffer *buffer, + int rd, int wr) +{ + struct r300_buffer *buf = r300_buffer(buffer); + + if (!buf->buf) + return true; + + return rws->add_buffer(rws, buf->buf, rd, wr); +} + + +static INLINE boolean r300_add_texture(struct r300_winsys_screen *rws, + struct r300_texture *tex, + int rd, int wr) +{ + return rws->add_buffer(rws, tex->buffer, rd, wr); +} + +void r300_screen_init_buffer_functions(struct r300_screen *r300screen); + +static INLINE void r300_buffer_write_reloc(struct r300_winsys_screen *rws, + struct r300_buffer *buf, + uint32_t rd, uint32_t wd, uint32_t flags) +{ + if (!buf->buf) + return; + + rws->write_cs_reloc(rws, buf->buf, rd, wd, flags); +} + +static INLINE void r300_texture_write_reloc(struct r300_winsys_screen *rws, + struct r300_texture *texture, + uint32_t rd, uint32_t wd, uint32_t flags) +{ + rws->write_cs_reloc(rws, texture->buffer, rd, wd, flags); +} + +int r300_upload_user_buffers(struct r300_context *r300); + +int r300_upload_index_buffer(struct r300_context *r300, + struct pipe_buffer **index_buffer, + unsigned index_size, + unsigned start, + unsigned count); + +boolean r300_buffer_is_referenced(struct r300_context *r300, + struct pipe_buffer *buf); +#endif diff --git a/src/gallium/drivers/r300/r300_state.c b/src/gallium/drivers/r300/r300_state.c index 3098145dfb..712e9280e3 100644 --- a/src/gallium/drivers/r300/r300_state.c +++ b/src/gallium/drivers/r300/r300_state.c @@ -34,6 +34,7 @@ #include "r300_context.h" #include "r300_reg.h" #include "r300_screen.h" +#include "r300_screen_buffer.h" #include "r300_state_inlines.h" #include "r300_fs.h" #include "r300_vs.h" @@ -525,7 +526,7 @@ static void r300_fb_update_tiling_flags(struct r300_context *r300, tex = (struct r300_texture*)old_state->cbufs[i]->texture; if (tex) { - r300->winsys->buffer_set_tiling(r300->winsys, tex->buffer, + r300->rws->buffer_set_tiling(r300->rws, tex->buffer, tex->pitch[0], tex->microtile != 0, tex->macrotile != 0); @@ -537,7 +538,7 @@ static void r300_fb_update_tiling_flags(struct r300_context *r300, tex = (struct r300_texture*)old_state->zsbuf->texture; if (tex) { - r300->winsys->buffer_set_tiling(r300->winsys, tex->buffer, + r300->rws->buffer_set_tiling(r300->rws, tex->buffer, tex->pitch[0], tex->microtile != 0, tex->macrotile != 0); @@ -549,7 +550,7 @@ static void r300_fb_update_tiling_flags(struct r300_context *r300, tex = (struct r300_texture*)new_state->cbufs[i]->texture; level = new_state->cbufs[i]->level; - r300->winsys->buffer_set_tiling(r300->winsys, tex->buffer, + r300->rws->buffer_set_tiling(r300->rws, tex->buffer, tex->pitch[level], tex->microtile != 0, tex->mip_macrotile[level] != 0); @@ -558,7 +559,7 @@ static void r300_fb_update_tiling_flags(struct r300_context *r300, tex = (struct r300_texture*)new_state->zsbuf->texture; level = new_state->zsbuf->level; - r300->winsys->buffer_set_tiling(r300->winsys, tex->buffer, + r300->rws->buffer_set_tiling(r300->rws, tex->buffer, tex->pitch[level], tex->microtile != 0, tex->mip_macrotile[level] != 0); @@ -1040,17 +1041,30 @@ static void r300_set_vertex_buffers(struct pipe_context* pipe, const struct pipe_vertex_buffer* buffers) { struct r300_context* r300 = r300_context(pipe); - unsigned i, max_index = (1 << 24) - 1; + int i; + unsigned max_index = (1 << 24) - 1; + boolean any_user_buffer = false; - memcpy(r300->vertex_buffer, buffers, - sizeof(struct pipe_vertex_buffer) * count); + if (count == r300->vertex_buffer_count && + memcmp(r300->vertex_buffer, buffers, count * sizeof(buffers[0])) == 0) + return; for (i = 0; i < count; i++) { + pipe_buffer_reference(&r300->vertex_buffer[i].buffer, buffers[i].buffer); + if (r300_buffer_is_user_buffer(buffers[i].buffer)) + any_user_buffer = true; max_index = MIN2(buffers[i].max_index, max_index); } + for ( ; i < r300->vertex_buffer_count; i++) + pipe_buffer_reference(&r300->vertex_buffer[i].buffer, NULL); + + memcpy(r300->vertex_buffer, buffers, + sizeof(struct pipe_vertex_buffer) * count); + r300->vertex_buffer_count = count; r300->vertex_buffer_max_index = max_index; + r300->any_user_vbs = any_user_buffer; if (r300->draw) { draw_flush(r300->draw); diff --git a/src/gallium/drivers/r300/r300_texture.c b/src/gallium/drivers/r300/r300_texture.c index 04124afd4d..7c7656068b 100644 --- a/src/gallium/drivers/r300/r300_texture.c +++ b/src/gallium/drivers/r300/r300_texture.c @@ -773,7 +773,7 @@ static struct pipe_texture* r300_texture_create(struct pipe_screen* screen, { struct r300_texture* tex = CALLOC_STRUCT(r300_texture); struct r300_screen* rscreen = r300_screen(screen); - struct radeon_winsys* winsys = (struct radeon_winsys*)screen->winsys; + struct r300_winsys_screen *rws = (struct r300_winsys_screen *)screen->winsys; if (!tex) { return NULL; @@ -790,13 +790,13 @@ static struct pipe_texture* r300_texture_create(struct pipe_screen* screen, r300_setup_miptree(rscreen, tex); r300_setup_texture_state(rscreen, tex); - tex->buffer = screen->buffer_create(screen, 2048, - PIPE_BUFFER_USAGE_PIXEL, - tex->size); - winsys->buffer_set_tiling(winsys, tex->buffer, - tex->pitch[0], - tex->microtile != R300_BUFFER_LINEAR, - tex->macrotile != R300_BUFFER_LINEAR); + tex->buffer = rws->buffer_create(rws, 2048, + PIPE_BUFFER_USAGE_PIXEL, + tex->size); + rws->buffer_set_tiling(rws, tex->buffer, + tex->pitch[0], + tex->microtile != R300_BUFFER_LINEAR, + tex->macrotile != R300_BUFFER_LINEAR); if (!tex->buffer) { FREE(tex); @@ -809,9 +809,9 @@ static struct pipe_texture* r300_texture_create(struct pipe_screen* screen, static void r300_texture_destroy(struct pipe_texture* texture) { struct r300_texture* tex = (struct r300_texture*)texture; + struct r300_winsys_screen *rws = (struct r300_winsys_screen *)texture->screen->winsys; - pipe_buffer_reference(&tex->buffer, NULL); - + rws->buffer_reference(rws, &tex->buffer, NULL); FREE(tex); } @@ -857,9 +857,9 @@ static struct pipe_texture* const struct pipe_texture* base, struct winsys_handle *whandle) { - struct radeon_winsys* winsys = (struct radeon_winsys*)screen->winsys; + struct r300_winsys_screen *rws = (struct r300_winsys_screen*)screen->winsys; struct r300_screen* rscreen = r300_screen(screen); - struct pipe_buffer *buffer; + struct r300_winsys_buffer *buffer; struct r300_texture* tex; unsigned stride; @@ -870,7 +870,7 @@ static struct pipe_texture* return NULL; } - buffer = winsys->buffer_from_handle(winsys, screen, whandle, &stride); + buffer = rws->buffer_from_handle(rws, screen, whandle, &stride); if (!buffer) { return NULL; } @@ -901,7 +901,7 @@ static boolean struct pipe_texture *texture, struct winsys_handle *whandle) { - struct radeon_winsys* winsys = (struct radeon_winsys*)screen->winsys; + struct r300_winsys_screen *rws = (struct r300_winsys_screen *)screen->winsys; struct r300_texture* tex = (struct r300_texture*)texture; unsigned stride; @@ -911,7 +911,7 @@ static boolean stride = r300_texture_get_stride(r300_screen(screen), tex, 0); - winsys->buffer_get_handle(winsys, tex->buffer, stride, whandle); + rws->buffer_get_handle(rws, tex->buffer, stride, whandle); return TRUE; } @@ -977,3 +977,25 @@ void r300_init_screen_texture_functions(struct pipe_screen* screen) screen->video_surface_destroy= r300_video_surface_destroy; } +boolean r300_get_texture_buffer(struct pipe_screen* screen, + struct pipe_texture* texture, + struct r300_winsys_buffer** buffer, + unsigned* stride) +{ + struct r300_texture* tex = (struct r300_texture*)texture; + struct r300_winsys_screen *rws = (struct r300_winsys_screen *)screen->winsys; + struct r300_winsys_buffer *buf; + + if (!tex) { + return FALSE; + } + + rws->buffer_reference(rws, &buf, tex->buffer); + + if (stride) { + *stride = r300_texture_get_stride(r300_screen(screen), tex, 0); + } + + *buffer = buf; + return TRUE; +} diff --git a/src/gallium/drivers/r300/r300_texture.h b/src/gallium/drivers/r300/r300_texture.h index 138b62784e..60c7fa8342 100644 --- a/src/gallium/drivers/r300/r300_texture.h +++ b/src/gallium/drivers/r300/r300_texture.h @@ -63,8 +63,8 @@ r300_video_surface(struct pipe_video_surface *pvs) /* Used internally for texture_is_referenced() */ boolean r300_get_texture_buffer(struct pipe_screen* screen, - struct pipe_texture* texture, - struct pipe_buffer** buffer, + struct pipe_texture *texture, + struct r300_winsys_buffer** buffer, unsigned* stride); #endif /* R300_TEXTURE_H */ diff --git a/src/gallium/drivers/r300/r300_transfer.c b/src/gallium/drivers/r300/r300_transfer.c index 495e3dee76..987a040698 100644 --- a/src/gallium/drivers/r300/r300_transfer.c +++ b/src/gallium/drivers/r300/r300_transfer.c @@ -26,6 +26,8 @@ #include "r300_texture.h" #include "r300_screen.h" +#include "r300_winsys.h" + #include "util/u_memory.h" #include "util/u_format.h" @@ -225,6 +227,7 @@ static void r300_tex_transfer_destroy(struct pipe_context *ctx, static void* r300_transfer_map(struct pipe_context *ctx, struct pipe_transfer *transfer) { + struct r300_winsys_screen *rws = (struct r300_winsys_screen *)ctx->winsys; struct r300_transfer *r300transfer = r300_transfer(transfer); struct r300_texture *tex = (struct r300_texture*)transfer->texture; char *map; @@ -233,12 +236,12 @@ static void* r300_transfer_map(struct pipe_context *ctx, if (r300transfer->detiled_texture) { /* The detiled texture is of the same size as the region being mapped * (no offset needed). */ - return pipe_buffer_map(ctx->screen, + return rws->buffer_map(rws, r300transfer->detiled_texture->buffer, pipe_transfer_buffer_flags(transfer)); } else { /* Tiling is disabled. */ - map = pipe_buffer_map(ctx->screen, tex->buffer, + map = rws->buffer_map(rws, tex->buffer, pipe_transfer_buffer_flags(transfer)); if (!map) { @@ -254,13 +257,14 @@ static void* r300_transfer_map(struct pipe_context *ctx, static void r300_transfer_unmap(struct pipe_context *ctx, struct pipe_transfer *transfer) { + struct r300_winsys_screen *rws = (struct r300_winsys_screen *)ctx->winsys; struct r300_transfer *r300transfer = r300_transfer(transfer); struct r300_texture *tex = (struct r300_texture*)transfer->texture; if (r300transfer->detiled_texture) { - pipe_buffer_unmap(ctx->screen, r300transfer->detiled_texture->buffer); + rws->buffer_unmap(rws, r300transfer->detiled_texture->buffer); } else { - pipe_buffer_unmap(ctx->screen, tex->buffer); + rws->buffer_unmap(rws, tex->buffer); } } diff --git a/src/gallium/drivers/r300/r300_winsys.h b/src/gallium/drivers/r300/r300_winsys.h index ddf2b79003..e5183a8239 100644 --- a/src/gallium/drivers/r300/r300_winsys.h +++ b/src/gallium/drivers/r300/r300_winsys.h @@ -23,10 +23,6 @@ #ifndef R300_WINSYS_H #define R300_WINSYS_H -#ifdef __cplusplus -extern "C" { -#endif - /* The public interface header for the r300 pipe driver. * Any winsys hosting this pipe needs to implement r300_winsys and then * call r300_create_screen to start things. */ @@ -34,14 +30,146 @@ extern "C" { #include "pipe/p_defines.h" #include "pipe/p_state.h" -struct radeon_winsys; +struct r300_winsys_screen; /* Creates a new r300 screen. */ -struct pipe_screen* r300_create_screen(struct radeon_winsys* radeon_winsys); +struct pipe_screen* r300_create_screen(struct r300_winsys_screen *rws); + +struct r300_winsys_buffer; + + +boolean r300_get_texture_buffer(struct pipe_screen* screen, + struct pipe_texture* texture, + struct r300_winsys_buffer** buffer, + unsigned *stride); + +enum r300_value_id { + R300_VID_PCI_ID, + R300_VID_GB_PIPES, + R300_VID_Z_PIPES, +}; + +#define R300_USAGE_FLAG_DONT_SYNC (1 << 17) + +struct r300_winsys_screen { + void (*destroy)(struct r300_winsys_screen *ws); + + /** + * Buffer management. Buffer attributes are mostly fixed over its lifetime. + * + * Remember that gallium gets to choose the interface it needs, and the + * window systems must then implement that interface (rather than the + * other way around...). + * + * usage is a bitmask of R300_WINSYS_BUFFER_USAGE_PIXEL/VERTEX/INDEX/CONSTANT. This + * usage argument is only an optimization hint, not a guarantee, therefore + * proper behavior must be observed in all circumstances. + * + * alignment indicates the client's alignment requirements, eg for + * SSE instructions. + */ + struct r300_winsys_buffer *(*buffer_create)(struct r300_winsys_screen *ws, + unsigned alignment, + unsigned usage, + unsigned size); + + /** + * Map the entire data store of a buffer object into the client's address. + * flags is bitmask of R300_WINSYS_BUFFER_USAGE_CPU_READ/WRITE flags. + */ + void *(*buffer_map)( struct r300_winsys_screen *ws, + struct r300_winsys_buffer *buf, + unsigned usage); + + void (*buffer_unmap)( struct r300_winsys_screen *ws, + struct r300_winsys_buffer *buf ); + + void (*buffer_destroy)( struct r300_winsys_buffer *buf ); + + + void (*buffer_reference)(struct r300_winsys_screen *rws, + struct r300_winsys_buffer **pdst, + struct r300_winsys_buffer *src); + + boolean (*buffer_references)(struct r300_winsys_buffer *a, + struct r300_winsys_buffer *b); + + void (*buffer_flush_range)(struct r300_winsys_screen *rws, + struct r300_winsys_buffer *buf, + unsigned offset, + unsigned length); + + /* Add a pipe_buffer to the list of buffer objects to validate. */ + boolean (*add_buffer)(struct r300_winsys_screen *winsys, + struct r300_winsys_buffer *buf, + uint32_t rd, + uint32_t wd); + + + /* Revalidate all currently setup pipe_buffers. + * Returns TRUE if a flush is required. */ + boolean (*validate)(struct r300_winsys_screen* winsys); + + /* Check to see if there's room for commands. */ + boolean (*check_cs)(struct r300_winsys_screen* winsys, int size); + + /* Start a command emit. */ + void (*begin_cs)(struct r300_winsys_screen* winsys, + int size, + const char* file, + const char* function, + int line); + + /* Write a dword to the command buffer. */ + void (*write_cs_dword)(struct r300_winsys_screen* winsys, uint32_t dword); + + /* Write a relocated dword to the command buffer. */ + void (*write_cs_reloc)(struct r300_winsys_screen *winsys, + struct r300_winsys_buffer *buf, + uint32_t rd, + uint32_t wd, + uint32_t flags); + + /* Finish a command emit. */ + void (*end_cs)(struct r300_winsys_screen* winsys, + const char* file, + const char* function, + int line); + + /* Flush the CS. */ + void (*flush_cs)(struct r300_winsys_screen* winsys); + + /* winsys flush - callback from winsys when flush required */ + void (*set_flush_cb)(struct r300_winsys_screen *winsys, + void (*flush_cb)(void *), void *data); + + void (*reset_bos)(struct r300_winsys_screen *winsys); + + void (*buffer_set_tiling)(struct r300_winsys_screen *winsys, + struct r300_winsys_buffer *buffer, + uint32_t pitch, + boolean microtiled, + boolean macrotiled); + + uint32_t (*get_value)(struct r300_winsys_screen *winsys, + enum r300_value_id vid); + + struct r300_winsys_buffer *(*buffer_from_handle)(struct r300_winsys_screen *winsys, + struct pipe_screen *screen, + struct winsys_handle *whandle, + unsigned *stride); + boolean (*buffer_get_handle)(struct r300_winsys_screen *winsys, + struct r300_winsys_buffer *buffer, + unsigned stride, + struct winsys_handle *whandle); + + boolean (*is_buffer_referenced)(struct r300_winsys_screen *winsys, + struct r300_winsys_buffer *buffer); + +}; -#ifdef __cplusplus -} -#endif +struct r300_winsys_screen * +r300_winsys_screen(struct pipe_screen *screen); #endif /* R300_WINSYS_H */ diff --git a/src/gallium/winsys/drm/radeon/core/Makefile b/src/gallium/winsys/drm/radeon/core/Makefile index 860cbb6dbf..13bbbf730d 100644 --- a/src/gallium/winsys/drm/radeon/core/Makefile +++ b/src/gallium/winsys/drm/radeon/core/Makefile @@ -5,7 +5,7 @@ include $(TOP)/configs/current LIBNAME = radeonwinsys C_SOURCES = \ - radeon_buffer.c \ + radeon_drm_buffer.c \ radeon_drm.c \ radeon_r300.c diff --git a/src/gallium/winsys/drm/radeon/core/radeon_buffer.h b/src/gallium/winsys/drm/radeon/core/radeon_buffer.h index f776e2d900..e1fcfcfcca 100644 --- a/src/gallium/winsys/drm/radeon/core/radeon_buffer.h +++ b/src/gallium/winsys/drm/radeon/core/radeon_buffer.h @@ -30,48 +30,56 @@ #ifndef RADEON_BUFFER_H #define RADEON_BUFFER_H +#include + +#include "pipe/p_defines.h" +#include "util/u_inlines.h" + #include "pipebuffer/pb_buffer.h" +#include "pipebuffer/pb_bufmgr.h" #include "radeon_bo.h" #include "radeon_cs.h" #include "radeon_winsys.h" -struct radeon_pipe_buffer { - struct pipe_buffer base; - /* Pointer to GPU-backed BO. */ - struct radeon_bo *bo; - /* Pointer to fallback PB buffer. */ - struct pb_buffer *pb; - boolean flinked; - uint32_t flink; -}; #define RADEON_MAX_BOS 24 -struct radeon_winsys_priv { - /* DRM FD */ - int fd; +static INLINE struct pb_buffer * +radeon_pb_buffer(struct r300_winsys_buffer *buffer) +{ + return (struct pb_buffer *)buffer; +} - /* Radeon BO manager. */ - struct radeon_bo_manager* bom; +static INLINE struct r300_winsys_buffer * +radeon_libdrm_winsys_buffer(struct pb_buffer *buffer) +{ + return (struct r300_winsys_buffer *)buffer; +} - /* Radeon CS manager. */ - struct radeon_cs_manager* csm; +struct pb_manager * +radeon_drm_bufmgr_create(struct radeon_libdrm_winsys *rws); - /* Current CS. */ - struct radeon_cs* cs; +boolean radeon_drm_bufmgr_add_buffer(struct pb_buffer *_buf, + uint32_t rd, uint32_t wd); - /* Flush CB */ - void (*flush_cb)(void *); - void *flush_data; -}; -struct radeon_winsys* radeon_pipe_winsys(int fb); -#if 0 -struct pipe_surface *radeon_surface_from_handle(struct radeon_context *radeon_context, - uint32_t handle, - enum pipe_format format, - int w, int h, int pitch); -#endif +void radeon_drm_bufmgr_write_reloc(struct pb_buffer *_buf, + uint32_t rd, uint32_t wd, + uint32_t flags); + +struct radeon_libdrm_winsys* radeon_pipe_winsys(int fd); + +struct pb_buffer *radeon_drm_bufmgr_create_buffer_from_handle(struct pb_manager *_mgr, + uint32_t handle); + +void radeon_drm_bufmgr_set_tiling(struct pb_buffer *_buf, boolean microtiled, boolean macrotiled, uint32_t pitch); + +void radeon_drm_bufmgr_flush_maps(struct pb_manager *_mgr); + +boolean radeon_drm_bufmgr_get_handle(struct pb_buffer *_buf, + struct winsys_handle *whandle); + +boolean radeon_drm_bufmgr_is_buffer_referenced(struct pb_buffer *_buf); #endif diff --git a/src/gallium/winsys/drm/radeon/core/radeon_drm.c b/src/gallium/winsys/drm/radeon/core/radeon_drm.c index 97edb6a47e..d70173e805 100644 --- a/src/gallium/winsys/drm/radeon/core/radeon_drm.c +++ b/src/gallium/winsys/drm/radeon/core/radeon_drm.c @@ -41,8 +41,22 @@ #include "xf86drm.h" #include +static struct radeon_libdrm_winsys * +radeon_winsys_create(int fd) +{ + struct radeon_libdrm_winsys *rws; + + rws = CALLOC_STRUCT(radeon_libdrm_winsys); + if (rws == NULL) { + return NULL; + } + + rws->fd = fd; + return rws; +} + /* Helper function to do the ioctls needed for setup and init. */ -static void do_ioctls(int fd, struct radeon_winsys* winsys) +static void do_ioctls(int fd, struct radeon_libdrm_winsys* winsys) { struct drm_radeon_gem_info gem_info = {0}; struct drm_radeon_info info = {0}; @@ -133,19 +147,28 @@ struct pipe_screen* radeon_create_screen(struct drm_api* api, int drmFB, struct drm_create_screen_arg *arg) { - struct radeon_winsys* rwinsys = radeon_pipe_winsys(drmFB); - do_ioctls(drmFB, rwinsys); + struct radeon_libdrm_winsys* rws; + boolean ret; + + rws = radeon_winsys_create(drmFB); + if (!rws) + return NULL; + + do_ioctls(drmFB, rws); /* The state tracker can organize a softpipe fallback if no hw * driver is found. */ - if (is_r3xx(rwinsys->pci_id)) { - radeon_setup_winsys(drmFB, rwinsys); - return r300_create_screen(rwinsys); - } else { - FREE(rwinsys); - return NULL; + if (is_r3xx(rws->pci_id)) { + ret = radeon_setup_winsys(drmFB, rws); + if (ret == FALSE) + goto fail; + return r300_create_screen(&rws->base); } + +fail: + FREE(rws); + return NULL; } static void radeon_drm_api_destroy(struct drm_api *api) diff --git a/src/gallium/winsys/drm/radeon/core/radeon_drm.h b/src/gallium/winsys/drm/radeon/core/radeon_drm.h index 78451b6f01..2dc077c052 100644 --- a/src/gallium/winsys/drm/radeon/core/radeon_drm.h +++ b/src/gallium/winsys/drm/radeon/core/radeon_drm.h @@ -37,6 +37,22 @@ struct pipe_screen* radeon_create_screen(struct drm_api* api, int drmFB, struct drm_create_screen_arg *arg); +boolean radeon_buffer_from_texture(struct drm_api* api, + struct pipe_screen* screen, + struct pipe_texture* texture, + struct pipe_buffer** buffer, + unsigned* stride); + +boolean radeon_handle_from_buffer(struct drm_api* api, + struct pipe_screen* screen, + struct pipe_buffer* buffer, + unsigned* handle); + +boolean radeon_global_handle_from_buffer(struct drm_api* api, + struct pipe_screen* screen, + struct pipe_buffer* buffer, + unsigned* handle); + void radeon_destroy_drm_api(struct drm_api* api); /* Guess at whether this chipset should use r300g. diff --git a/src/gallium/winsys/drm/radeon/core/radeon_drm_buffer.c b/src/gallium/winsys/drm/radeon/core/radeon_drm_buffer.c new file mode 100644 index 0000000000..cc56a2bb8f --- /dev/null +++ b/src/gallium/winsys/drm/radeon/core/radeon_drm_buffer.c @@ -0,0 +1,368 @@ + +#include +#include "radeon_drm.h" +#include "radeon_bo_gem.h" +#include "radeon_cs_gem.h" +#include "radeon_buffer.h" + +#include "util/u_inlines.h" +#include "util/u_memory.h" +#include "util/u_simple_list.h" +#include "pipebuffer/pb_buffer.h" +#include "pipebuffer/pb_bufmgr.h" + +#include "radeon_winsys.h" +struct radeon_drm_bufmgr; + +struct radeon_drm_buffer { + struct pb_buffer base; + struct radeon_drm_bufmgr *mgr; + + struct radeon_bo *bo; + + boolean flinked; + uint32_t flink; + + boolean mapped; + struct radeon_drm_buffer *next, *prev; +}; + +extern const struct pb_vtbl radeon_drm_buffer_vtbl; + + +static INLINE struct radeon_drm_buffer * +radeon_drm_buffer(struct pb_buffer *buf) +{ + assert(buf); + assert(buf->vtbl == &radeon_drm_buffer_vtbl); + return (struct radeon_drm_buffer *)buf; +} + +struct radeon_drm_bufmgr { + struct pb_manager base; + struct radeon_libdrm_winsys *rws; + struct radeon_drm_buffer buffer_map_list; +}; + +static INLINE struct radeon_drm_bufmgr * +radeon_drm_bufmgr(struct pb_manager *mgr) +{ + assert(mgr); + return (struct radeon_drm_bufmgr *)mgr; +} + +static void +radeon_drm_buffer_destroy(struct pb_buffer *_buf) +{ + struct radeon_drm_buffer *buf = radeon_drm_buffer(_buf); + + if (buf->mapped) { + remove_from_list(buf); + radeon_bo_unmap(buf->bo); + buf->mapped = false; + } + radeon_bo_unref(buf->bo); + + FREE(buf); +} + +static void * +radeon_drm_buffer_map(struct pb_buffer *_buf, + unsigned flags) +{ + struct radeon_drm_buffer *buf = radeon_drm_buffer(_buf); + int write; + + if (buf->mapped) + return buf->bo->ptr; + + if (flags & PIPE_BUFFER_USAGE_DONTBLOCK) { + uint32_t domain; + + if (radeon_bo_is_busy(buf->bo, &domain)) + return NULL; + } + + + if (radeon_bo_is_referenced_by_cs(buf->bo, buf->mgr->rws->cs)) { + buf->mgr->rws->flush_cb(buf->mgr->rws->flush_data); + } + + if (flags & PIPE_BUFFER_USAGE_CPU_WRITE) { + write = 1; + } + + if (radeon_bo_map(buf->bo, write)) { + return NULL; + } + buf->mapped = true; + insert_at_tail(&buf->mgr->buffer_map_list, buf); + return buf->bo->ptr; +} + +static void +radeon_drm_buffer_unmap(struct pb_buffer *_buf) +{ + (void)_buf; +} + +static void +radeon_drm_buffer_get_base_buffer(struct pb_buffer *buf, + struct pb_buffer **base_buf, + unsigned *offset) +{ + *base_buf = buf; + *offset = 0; +} + + +static enum pipe_error +radeon_drm_buffer_validate(struct pb_buffer *_buf, + struct pb_validate *vl, + unsigned flags) +{ + /* Always pinned */ + return PIPE_OK; +} + +static void +radeon_drm_buffer_fence(struct pb_buffer *buf, + struct pipe_fence_handle *fence) +{ +} + +const struct pb_vtbl radeon_drm_buffer_vtbl = { + radeon_drm_buffer_destroy, + radeon_drm_buffer_map, + radeon_drm_buffer_unmap, + radeon_drm_buffer_validate, + radeon_drm_buffer_fence, + radeon_drm_buffer_get_base_buffer, +}; + + +static uint32_t radeon_domain_from_usage(unsigned usage) +{ + uint32_t domain = 0; + + if (usage & PIPE_BUFFER_USAGE_GPU_WRITE) { + domain |= RADEON_GEM_DOMAIN_VRAM; + } + if (usage & PIPE_BUFFER_USAGE_PIXEL) { + domain |= RADEON_GEM_DOMAIN_VRAM; + } + if (usage & PIPE_BUFFER_USAGE_VERTEX) { + domain |= RADEON_GEM_DOMAIN_GTT; + } + if (usage & PIPE_BUFFER_USAGE_INDEX) { + domain |= RADEON_GEM_DOMAIN_GTT; + } + + return domain; +} + +struct pb_buffer *radeon_drm_bufmgr_create_buffer_from_handle(struct pb_manager *_mgr, + uint32_t handle) +{ + struct radeon_drm_bufmgr *mgr = radeon_drm_bufmgr(_mgr); + struct radeon_libdrm_winsys *rws = mgr->rws; + struct radeon_drm_buffer *buf; + struct radeon_bo *bo; + + bo = radeon_bo_open(rws->bom, handle, 0, + 0, 0, 0); + if (bo == NULL) + return NULL; + + buf = CALLOC_STRUCT(radeon_drm_buffer); + if (!buf) { + radeon_bo_unref(bo); + return NULL; + } + + make_empty_list(buf); + + pipe_reference_init(&buf->base.base.reference, 1); + buf->base.base.alignment = 0; + buf->base.base.usage = PIPE_BUFFER_USAGE_PIXEL; + buf->base.base.size = 0; + buf->base.vtbl = &radeon_drm_buffer_vtbl; + buf->mgr = mgr; + + buf->bo = bo; + + return &buf->base; +} + +static struct pb_buffer * +radeon_drm_bufmgr_create_buffer(struct pb_manager *_mgr, + pb_size size, + const struct pb_desc *desc) +{ + struct radeon_drm_bufmgr *mgr = radeon_drm_bufmgr(_mgr); + struct radeon_libdrm_winsys *rws = mgr->rws; + struct radeon_drm_buffer *buf; + uint32_t domain; + + buf = CALLOC_STRUCT(radeon_drm_buffer); + if (!buf) + goto error1; + + pipe_reference_init(&buf->base.base.reference, 1); + buf->base.base.alignment = desc->alignment; + buf->base.base.usage = desc->usage; + buf->base.base.size = size; + buf->base.vtbl = &radeon_drm_buffer_vtbl; + buf->mgr = mgr; + + make_empty_list(buf); + domain = radeon_domain_from_usage(desc->usage); + buf->bo = radeon_bo_open(rws->bom, 0, size, + desc->alignment, domain, 0); + if (buf->bo == NULL) + goto error2; + + return &buf->base; + + error2: + FREE(buf); + error1: + return NULL; +} + +static void +radeon_drm_bufmgr_flush(struct pb_manager *mgr) +{ + /* NOP */ +} + +static void +radeon_drm_bufmgr_destroy(struct pb_manager *_mgr) +{ + struct radeon_drm_bufmgr *mgr = radeon_drm_bufmgr(_mgr); + FREE(mgr); +} + +struct pb_manager * +radeon_drm_bufmgr_create(struct radeon_libdrm_winsys *rws) +{ + struct radeon_drm_bufmgr *mgr; + + mgr = CALLOC_STRUCT(radeon_drm_bufmgr); + if (!mgr) + return NULL; + + mgr->base.destroy = radeon_drm_bufmgr_destroy; + mgr->base.create_buffer = radeon_drm_bufmgr_create_buffer; + mgr->base.flush = radeon_drm_bufmgr_flush; + + mgr->rws = rws; + make_empty_list(&mgr->buffer_map_list); + return &mgr->base; +} + +static struct radeon_drm_buffer *get_drm_buffer(struct pb_buffer *_buf) +{ + struct radeon_drm_buffer *buf; + if (_buf->vtbl == &radeon_drm_buffer_vtbl) { + buf = radeon_drm_buffer(_buf); + } else { + struct pb_buffer *base_buf; + pb_size offset; + pb_get_base_buffer(_buf, &base_buf, &offset); + + buf = radeon_drm_buffer(base_buf); + } + return buf; +} + +boolean radeon_drm_bufmgr_get_handle(struct pb_buffer *_buf, + struct winsys_handle *whandle) +{ + int retval, fd; + struct drm_gem_flink flink; + struct radeon_drm_buffer *buf = get_drm_buffer(_buf); + if (whandle->type == DRM_API_HANDLE_TYPE_SHARED) { + if (!buf->flinked) { + fd = buf->mgr->rws->fd; + flink.handle = buf->bo->handle; + + retval = ioctl(fd, DRM_IOCTL_GEM_FLINK, &flink); + if (retval) { + return false; + } + + buf->flinked = TRUE; + buf->flink = flink.name; + } + whandle->handle = buf->flink; + } else if (whandle->type == DRM_API_HANDLE_TYPE_KMS) { + whandle->handle = buf->bo->handle; + } + return TRUE; +} + + +void radeon_drm_bufmgr_set_tiling(struct pb_buffer *_buf, boolean microtiled, boolean macrotiled, uint32_t pitch) +{ + struct radeon_drm_buffer *buf = get_drm_buffer(_buf); + uint32_t flags = 0; + + if (microtiled) + flags |= RADEON_BO_FLAGS_MICRO_TILE; + if (macrotiled) + flags |= RADEON_BO_FLAGS_MACRO_TILE; + + radeon_bo_set_tiling(buf->bo, flags, pitch); + +} + +boolean radeon_drm_bufmgr_add_buffer(struct pb_buffer *_buf, + uint32_t rd, uint32_t wd) +{ + struct radeon_drm_buffer *buf = get_drm_buffer(_buf); + radeon_cs_space_add_persistent_bo(buf->mgr->rws->cs, buf->bo, + rd, wd); + return true; +} + +void radeon_drm_bufmgr_write_reloc(struct pb_buffer *_buf, + uint32_t rd, uint32_t wd, + uint32_t flags) +{ + struct radeon_drm_buffer *buf = get_drm_buffer(_buf); + int retval; + + retval = radeon_cs_write_reloc(buf->mgr->rws->cs, + buf->bo, rd, wd, flags); + if (retval) { + debug_printf("radeon: Relocation of %p (%d, %d, %d) failed!\n", + buf, rd, wd, flags); + } +} + +boolean radeon_drm_bufmgr_is_buffer_referenced(struct pb_buffer *_buf) +{ + struct radeon_drm_buffer *buf = get_drm_buffer(_buf); + uint32_t domain; + + return (radeon_bo_is_referenced_by_cs(buf->bo, buf->mgr->rws->cs) || + radeon_bo_is_busy(buf->bo, &domain)); +} + + +void radeon_drm_bufmgr_flush_maps(struct pb_manager *_mgr) +{ + struct radeon_drm_bufmgr *mgr = radeon_drm_bufmgr(_mgr); + struct radeon_drm_buffer *rpb, *t_rpb; + + foreach_s(rpb, t_rpb, &mgr->buffer_map_list) { + rpb->mapped = 0; + radeon_bo_unmap(rpb->bo); + remove_from_list(rpb); + } + + make_empty_list(&mgr->buffer_map_list); + + +} diff --git a/src/gallium/winsys/drm/radeon/core/radeon_r300.c b/src/gallium/winsys/drm/radeon/core/radeon_r300.c index 122bd21354..5b82a776a8 100644 --- a/src/gallium/winsys/drm/radeon/core/radeon_r300.c +++ b/src/gallium/winsys/drm/radeon/core/radeon_r300.c @@ -23,31 +23,139 @@ #include "radeon_r300.h" #include "radeon_buffer.h" +#include "radeon_bo_gem.h" #include "radeon_cs_gem.h" +#include "state_tracker/drm_api.h" -static void radeon_set_flush_cb(struct radeon_winsys *winsys, +static struct r300_winsys_buffer * +radeon_r300_winsys_buffer_create(struct r300_winsys_screen *rws, + unsigned alignment, + unsigned usage, + unsigned size) +{ + struct radeon_libdrm_winsys *ws = radeon_winsys_screen(rws); + struct pb_desc desc; + struct pb_manager *provider; + struct pb_buffer *buffer; + + memset(&desc, 0, sizeof(desc)); + desc.alignment = alignment; + desc.usage = usage; + + if (usage & PIPE_BUFFER_USAGE_CONSTANT) + provider = ws->mman; + else + provider = ws->kman; + buffer = provider->create_buffer(provider, size, &desc); + if (!buffer) + return NULL; + + return radeon_libdrm_winsys_buffer(buffer); +} + +static void radeon_r300_winsys_buffer_destroy(struct r300_winsys_buffer *buf) +{ + struct pb_buffer *_buf = radeon_pb_buffer(buf); + + pb_destroy(_buf); +} +static void radeon_r300_winsys_buffer_set_tiling(struct r300_winsys_screen *rws, + struct r300_winsys_buffer *buf, + uint32_t pitch, + boolean microtiled, + boolean macrotiled) +{ + struct pb_buffer *_buf = radeon_pb_buffer(buf); + radeon_drm_bufmgr_set_tiling(_buf, microtiled, macrotiled, pitch); +} + +static void *radeon_r300_winsys_buffer_map(struct r300_winsys_screen *ws, + struct r300_winsys_buffer *buf, + unsigned usage) +{ + struct pb_buffer *_buf = radeon_pb_buffer(buf); + + return pb_map(_buf, usage); +} + +static void radeon_r300_winsys_buffer_unmap(struct r300_winsys_screen *ws, + struct r300_winsys_buffer *buf) +{ + struct pb_buffer *_buf = radeon_pb_buffer(buf); + + pb_unmap(_buf); +} + +static void radeon_r300_winsys_buffer_reference(struct r300_winsys_screen *rws, + struct r300_winsys_buffer **pdst, + struct r300_winsys_buffer *src) +{ + struct pb_buffer *_src = radeon_pb_buffer(src); + struct pb_buffer *_dst = radeon_pb_buffer(*pdst); + + pb_reference(&_dst, _src); + + *pdst = radeon_libdrm_winsys_buffer(_dst); +} + +static boolean radeon_r300_winsys_is_buffer_referenced(struct r300_winsys_screen *rws, + struct r300_winsys_buffer *buf) +{ + struct pb_buffer *_buf = radeon_pb_buffer(buf); + + return radeon_drm_bufmgr_is_buffer_referenced(_buf); +} + +static struct r300_winsys_buffer *radeon_r300_winsys_buffer_from_handle(struct r300_winsys_screen *rws, + struct pipe_screen *screen, + struct winsys_handle *whandle, + unsigned *stride) +{ + struct radeon_libdrm_winsys *ws = radeon_winsys_screen(rws); + struct pb_buffer *_buf; + + _buf = radeon_drm_bufmgr_create_buffer_from_handle(ws->kman, whandle->handle); + *stride = whandle->stride; + return radeon_libdrm_winsys_buffer(_buf); +} + +static boolean radeon_r300_winsys_buffer_get_handle(struct r300_winsys_screen *rws, + struct r300_winsys_buffer *buffer, + unsigned stride, + struct winsys_handle *whandle) +{ + struct pb_buffer *_buf = radeon_pb_buffer(buffer); + boolean ret; + ret = radeon_drm_bufmgr_get_handle(_buf, whandle); + if (ret) + whandle->stride = stride; + return ret; +} + +static void radeon_set_flush_cb(struct r300_winsys_screen *rws, void (*flush_cb)(void *), void *data) { - winsys->priv->flush_cb = flush_cb; - winsys->priv->flush_data = data; - radeon_cs_space_set_flush(winsys->priv->cs, flush_cb, data); + struct radeon_libdrm_winsys *ws = radeon_winsys_screen(rws); + ws->flush_cb = flush_cb; + ws->flush_data = data; + radeon_cs_space_set_flush(ws->cs, flush_cb, data); } -static boolean radeon_add_buffer(struct radeon_winsys* winsys, - struct pipe_buffer* pbuffer, +static boolean radeon_add_buffer(struct r300_winsys_screen *rws, + struct r300_winsys_buffer *buf, uint32_t rd, uint32_t wd) { - struct radeon_bo* bo = ((struct radeon_pipe_buffer*)pbuffer)->bo; + struct pb_buffer *_buf = radeon_pb_buffer(buf); - radeon_cs_space_add_persistent_bo(winsys->priv->cs, bo, rd, wd); - return TRUE; + return radeon_drm_bufmgr_add_buffer(_buf, rd, wd); } -static boolean radeon_validate(struct radeon_winsys* winsys) +static boolean radeon_validate(struct r300_winsys_screen *rws) { - if (radeon_cs_space_check(winsys->priv->cs) < 0) { + struct radeon_libdrm_winsys *ws = radeon_winsys_screen(rws); + if (radeon_cs_space_check(ws->cs) < 0) { return FALSE; } @@ -55,108 +163,175 @@ static boolean radeon_validate(struct radeon_winsys* winsys) return TRUE; } -static boolean radeon_check_cs(struct radeon_winsys* winsys, int size) +static boolean radeon_check_cs(struct r300_winsys_screen *rws, int size) { - struct radeon_cs* cs = winsys->priv->cs; + struct radeon_libdrm_winsys *ws = radeon_winsys_screen(rws); + struct radeon_cs *cs = ws->cs; - return radeon_validate(winsys) && cs->cdw + size <= cs->ndw; + return radeon_validate(rws) && cs->cdw + size <= cs->ndw; } -static void radeon_begin_cs(struct radeon_winsys* winsys, +static void radeon_begin_cs(struct r300_winsys_screen *rws, int size, const char* file, const char* function, int line) { - radeon_cs_begin(winsys->priv->cs, size, file, function, line); + struct radeon_libdrm_winsys *ws = radeon_winsys_screen(rws); + radeon_cs_begin(ws->cs, size, file, function, line); } -static void radeon_write_cs_dword(struct radeon_winsys* winsys, +static void radeon_write_cs_dword(struct r300_winsys_screen *rws, uint32_t dword) { - radeon_cs_write_dword(winsys->priv->cs, dword); + struct radeon_libdrm_winsys *ws = radeon_winsys_screen(rws); + radeon_cs_write_dword(ws->cs, dword); } -static void radeon_write_cs_reloc(struct radeon_winsys* winsys, - struct pipe_buffer* pbuffer, +static void radeon_write_cs_reloc(struct r300_winsys_screen *rws, + struct r300_winsys_buffer *buf, uint32_t rd, uint32_t wd, uint32_t flags) { - int retval = 0; - struct radeon_pipe_buffer* radeon_buffer = - (struct radeon_pipe_buffer*)pbuffer; - - assert(!radeon_buffer->pb); - - retval = radeon_cs_write_reloc(winsys->priv->cs, radeon_buffer->bo, - rd, wd, flags); - - if (retval) { - debug_printf("radeon: Relocation of %p (%d, %d, %d) failed!\n", - pbuffer, rd, wd, flags); - } + struct pb_buffer *_buf = radeon_pb_buffer(buf); + radeon_drm_bufmgr_write_reloc(_buf, rd, wd, flags); } -static void radeon_reset_bos(struct radeon_winsys *winsys) +static void radeon_reset_bos(struct r300_winsys_screen *rws) { - radeon_cs_space_reset_bos(winsys->priv->cs); + struct radeon_libdrm_winsys *ws = radeon_winsys_screen(rws); + radeon_cs_space_reset_bos(ws->cs); } -static void radeon_end_cs(struct radeon_winsys* winsys, +static void radeon_end_cs(struct r300_winsys_screen *rws, const char* file, const char* function, int line) { - radeon_cs_end(winsys->priv->cs, file, function, line); + struct radeon_libdrm_winsys *ws = radeon_winsys_screen(rws); + radeon_cs_end(ws->cs, file, function, line); } -static void radeon_flush_cs(struct radeon_winsys* winsys) +static void radeon_flush_cs(struct r300_winsys_screen *rws) { + struct radeon_libdrm_winsys *ws = radeon_winsys_screen(rws); int retval; /* Don't flush a zero-sized CS. */ - if (!winsys->priv->cs->cdw) { + if (!ws->cs->cdw) { return; } + radeon_drm_bufmgr_flush_maps(ws->kman); /* Emit the CS. */ - retval = radeon_cs_emit(winsys->priv->cs); + retval = radeon_cs_emit(ws->cs); if (retval) { debug_printf("radeon: Bad CS, dumping...\n"); - radeon_cs_print(winsys->priv->cs, stderr); + radeon_cs_print(ws->cs, stderr); } /* Reset CS. * Someday, when we care about performance, we should really find a way * to rotate between two or three CS objects so that the GPU can be * spinning through one CS while another one is being filled. */ - radeon_cs_erase(winsys->priv->cs); + radeon_cs_erase(ws->cs); } -void -radeon_setup_winsys(int fd, struct radeon_winsys* winsys) +static uint32_t radeon_get_value(struct r300_winsys_screen *rws, + enum r300_value_id id) { - struct radeon_winsys_priv* priv = winsys->priv; + struct radeon_libdrm_winsys *ws = (struct radeon_libdrm_winsys *)rws; - priv->csm = radeon_cs_manager_gem_ctor(fd); + switch(id) { + case R300_VID_PCI_ID: + return ws->pci_id; + case R300_VID_GB_PIPES: + return ws->gb_pipes; + case R300_VID_Z_PIPES: + return ws->z_pipes; + } + return 0; +} + +static void +radeon_winsys_destroy(struct r300_winsys_screen *rws) +{ + struct radeon_libdrm_winsys *ws = (struct radeon_libdrm_winsys *)rws; + radeon_cs_destroy(ws->cs); + + ws->kman->destroy(ws->kman); + ws->mman->destroy(ws->mman); + + radeon_bo_manager_gem_dtor(ws->bom); + radeon_cs_manager_gem_dtor(ws->csm); +} + +boolean +radeon_setup_winsys(int fd, struct radeon_libdrm_winsys* ws) +{ + + ws->csm = radeon_cs_manager_gem_ctor(fd); + if (!ws->csm) + goto fail; + ws->bom = radeon_bo_manager_gem_ctor(fd); + if (!ws->bom) + goto fail; + ws->kman = radeon_drm_bufmgr_create(ws); + if (!ws->kman) + goto fail; + + ws->mman = pb_malloc_bufmgr_create(); + if (!ws->mman) + goto fail; /* Size limit on IBs is 64 kibibytes. */ - priv->cs = radeon_cs_create(priv->csm, 1024 * 64 / 4); - radeon_cs_set_limit(priv->cs, - RADEON_GEM_DOMAIN_GTT, winsys->gart_size); - radeon_cs_set_limit(priv->cs, - RADEON_GEM_DOMAIN_VRAM, winsys->vram_size); - - winsys->add_buffer = radeon_add_buffer; - winsys->validate = radeon_validate; - - winsys->check_cs = radeon_check_cs; - winsys->begin_cs = radeon_begin_cs; - winsys->write_cs_dword = radeon_write_cs_dword; - winsys->write_cs_reloc = radeon_write_cs_reloc; - winsys->end_cs = radeon_end_cs; - winsys->flush_cs = radeon_flush_cs; - winsys->reset_bos = radeon_reset_bos; - winsys->set_flush_cb = radeon_set_flush_cb; + ws->cs = radeon_cs_create(ws->csm, 1024 * 64 / 4); + if (!ws->cs) + goto fail; + radeon_cs_set_limit(ws->cs, + RADEON_GEM_DOMAIN_GTT, ws->gart_size); + radeon_cs_set_limit(ws->cs, + RADEON_GEM_DOMAIN_VRAM, ws->vram_size); + + ws->base.add_buffer = radeon_add_buffer; + ws->base.validate = radeon_validate; + ws->base.destroy = radeon_winsys_destroy; + ws->base.check_cs = radeon_check_cs; + ws->base.begin_cs = radeon_begin_cs; + ws->base.write_cs_dword = radeon_write_cs_dword; + ws->base.write_cs_reloc = radeon_write_cs_reloc; + ws->base.end_cs = radeon_end_cs; + ws->base.flush_cs = radeon_flush_cs; + ws->base.reset_bos = radeon_reset_bos; + ws->base.set_flush_cb = radeon_set_flush_cb; + ws->base.get_value = radeon_get_value; + + ws->base.buffer_create = radeon_r300_winsys_buffer_create; + ws->base.buffer_destroy = radeon_r300_winsys_buffer_destroy; + ws->base.buffer_set_tiling = radeon_r300_winsys_buffer_set_tiling; + ws->base.buffer_map = radeon_r300_winsys_buffer_map; + ws->base.buffer_unmap = radeon_r300_winsys_buffer_unmap; + ws->base.buffer_reference = radeon_r300_winsys_buffer_reference; + ws->base.buffer_from_handle = radeon_r300_winsys_buffer_from_handle; + ws->base.buffer_get_handle = radeon_r300_winsys_buffer_get_handle; + ws->base.is_buffer_referenced = radeon_r300_winsys_is_buffer_referenced; + return TRUE; + +fail: + if (ws->csm) + radeon_cs_manager_gem_dtor(ws->csm); + + if (ws->bom) + radeon_bo_manager_gem_dtor(ws->bom); + + + if (ws->kman) + ws->kman->destroy(ws->kman); + if (ws->mman) + ws->mman->destroy(ws->mman); + + if (ws->cs) + radeon_cs_destroy(ws->cs); + return FALSE; } diff --git a/src/gallium/winsys/drm/radeon/core/radeon_r300.h b/src/gallium/winsys/drm/radeon/core/radeon_r300.h index e655dc32c8..2703464ad8 100644 --- a/src/gallium/winsys/drm/radeon/core/radeon_r300.h +++ b/src/gallium/winsys/drm/radeon/core/radeon_r300.h @@ -25,6 +25,6 @@ #include "radeon_winsys.h" -void radeon_setup_winsys(int fd, struct radeon_winsys* winsys); +boolean radeon_setup_winsys(int fd, struct radeon_libdrm_winsys* winsys); #endif /* RADEON_R300_H */ diff --git a/src/gallium/winsys/drm/radeon/core/radeon_winsys.h b/src/gallium/winsys/drm/radeon/core/radeon_winsys.h index 887a381cc4..16cc701ad6 100644 --- a/src/gallium/winsys/drm/radeon/core/radeon_winsys.h +++ b/src/gallium/winsys/drm/radeon/core/radeon_winsys.h @@ -30,16 +30,15 @@ #ifndef RADEON_WINSYS_H #define RADEON_WINSYS_H -#include "util/u_simple_screen.h" +#include "r300_winsys.h" -struct radeon_winsys_priv; - -struct radeon_winsys { +struct radeon_libdrm_winsys { /* Parent class. */ - struct pipe_winsys base; + struct r300_winsys_screen base; + + struct pb_manager *kman; - /* Winsys private */ - struct radeon_winsys_priv* priv; + struct pb_manager *mman; /* PCI ID */ uint32_t pci_id; @@ -56,71 +55,27 @@ struct radeon_winsys { /* VRAM size. */ uint32_t vram_size; - /* Create a buffer from a winsys handle. */ - struct pipe_buffer *(*buffer_from_handle)(struct radeon_winsys *winsys, - struct pipe_screen *screen, - struct winsys_handle *whandle, - unsigned *stride); - - /* Get the handle from a buffer. */ - boolean (*buffer_get_handle)(struct radeon_winsys *winsys, - struct pipe_buffer *buffer, - unsigned stride, - struct winsys_handle *whandle); - - /* Add a pipe_buffer to the list of buffer objects to validate. */ - boolean (*add_buffer)(struct radeon_winsys* winsys, - struct pipe_buffer* pbuffer, - uint32_t rd, - uint32_t wd); - - /* Revalidate all currently setup pipe_buffers. - * Returns TRUE if a flush is required. */ - boolean (*validate)(struct radeon_winsys* winsys); - - /* Check to see if there's room for commands. */ - boolean (*check_cs)(struct radeon_winsys* winsys, int size); - - /* Start a command emit. */ - void (*begin_cs)(struct radeon_winsys* winsys, - int size, - const char* file, - const char* function, - int line); - - /* Write a dword to the command buffer. */ - void (*write_cs_dword)(struct radeon_winsys* winsys, uint32_t dword); - - /* Write a relocated dword to the command buffer. */ - void (*write_cs_reloc)(struct radeon_winsys* winsys, - struct pipe_buffer* bo, - uint32_t rd, - uint32_t wd, - uint32_t flags); - - /* Finish a command emit. */ - void (*end_cs)(struct radeon_winsys* winsys, - const char* file, - const char* function, - int line); - - /* Flush the CS. */ - void (*flush_cs)(struct radeon_winsys* winsys); - - /* winsys flush - callback from winsys when flush required */ - void (*set_flush_cb)(struct radeon_winsys *winsys, - void (*flush_cb)(void *), void *data); - - void (*reset_bos)(struct radeon_winsys *winsys); - - void (*buffer_set_tiling)(struct radeon_winsys* winsys, - struct pipe_buffer* buffer, - uint32_t pitch, - boolean microtiled, - boolean macrotiled); - - boolean (*is_buffer_referenced)(struct radeon_winsys *winsys, - struct pipe_buffer *buffer); + /* DRM FD */ + int fd; + + /* Radeon BO manager. */ + struct radeon_bo_manager *bom; + + /* Radeon CS manager. */ + struct radeon_cs_manager *csm; + + /* Current CS. */ + struct radeon_cs *cs; + + /* Flush CB */ + void (*flush_cb)(void *); + void *flush_data; }; +static INLINE struct radeon_libdrm_winsys * +radeon_winsys_screen(struct r300_winsys_screen *base) +{ + return (struct radeon_libdrm_winsys *)base; +} + #endif -- cgit v1.2.3