From c607a664dd005c001afda1fff1a68d41925fa86e Mon Sep 17 00:00:00 2001 From: Dave Airlie Date: Sun, 22 Mar 2009 19:11:46 +1000 Subject: radeon fbo: add draw offset calcs --- src/mesa/drivers/dri/r300/r300_cmdbuf.c | 3 ++- src/mesa/drivers/dri/radeon/radeon_common.c | 3 +++ src/mesa/drivers/dri/radeon/radeon_common_context.h | 2 ++ src/mesa/drivers/dri/radeon/radeon_fbo.c | 9 +++++++-- 4 files changed, 14 insertions(+), 3 deletions(-) (limited to 'src') diff --git a/src/mesa/drivers/dri/r300/r300_cmdbuf.c b/src/mesa/drivers/dri/r300/r300_cmdbuf.c index 2c6618fc60..d85f106c11 100644 --- a/src/mesa/drivers/dri/r300/r300_cmdbuf.c +++ b/src/mesa/drivers/dri/r300/r300_cmdbuf.c @@ -213,6 +213,7 @@ static void emit_cb_offset(GLcontext *ctx, struct radeon_state_atom * atom) BATCH_LOCALS(&r300->radeon); struct radeon_renderbuffer *rrb; uint32_t cbpitch; + uint32_t offset = r300->radeon.state.color.draw_offset; rrb = radeon_get_colorbuffer(&r300->radeon); if (!rrb || !rrb->bo) { @@ -231,7 +232,7 @@ static void emit_cb_offset(GLcontext *ctx, struct radeon_state_atom * atom) BEGIN_BATCH_NO_AUTOSTATE(6); OUT_BATCH_REGSEQ(R300_RB3D_COLOROFFSET0, 1); - OUT_BATCH_RELOC(0, rrb->bo, 0, 0, RADEON_GEM_DOMAIN_VRAM, 0); + OUT_BATCH_RELOC(offset, rrb->bo, offset, 0, RADEON_GEM_DOMAIN_VRAM, 0); OUT_BATCH_REGSEQ(R300_RB3D_COLORPITCH0, 1); OUT_BATCH(cbpitch); END_BATCH(); diff --git a/src/mesa/drivers/dri/radeon/radeon_common.c b/src/mesa/drivers/dri/radeon/radeon_common.c index 4d7f91e356..4fd54c06c3 100644 --- a/src/mesa/drivers/dri/radeon/radeon_common.c +++ b/src/mesa/drivers/dri/radeon/radeon_common.c @@ -619,6 +619,7 @@ void radeon_draw_buffer(GLcontext *ctx, struct gl_framebuffer *fb) radeonContextPtr radeon = RADEON_CONTEXT(ctx); struct radeon_renderbuffer *rrbDepth = NULL, *rrbStencil = NULL, *rrbColor = NULL; + uint32_t offset = 0; if (!fb) { @@ -667,6 +668,7 @@ void radeon_draw_buffer(GLcontext *ctx, struct gl_framebuffer *fb) /* user FBO in theory */ struct radeon_renderbuffer *rrb; rrb = (void *)fb->_ColorDrawBuffers[0]; + offset = rrb->draw_offset; rrbColor = rrb; radeon->constant_cliprect = GL_TRUE; } @@ -737,6 +739,7 @@ void radeon_draw_buffer(GLcontext *ctx, struct gl_framebuffer *fb) radeon->state.depth.rrb = rrbDepth; radeon->state.color.rrb = rrbColor; + radeon->state.color.draw_offset = offset; /* update viewport since it depends on window size */ if (ctx->Driver.Viewport) { diff --git a/src/mesa/drivers/dri/radeon/radeon_common_context.h b/src/mesa/drivers/dri/radeon/radeon_common_context.h index e5ada622b0..612cc97f25 100644 --- a/src/mesa/drivers/dri/radeon/radeon_common_context.h +++ b/src/mesa/drivers/dri/radeon/radeon_common_context.h @@ -82,6 +82,7 @@ struct radeon_renderbuffer unsigned int width; unsigned int height; + uint32_t draw_offset; /* FBO */ /* boo Xorg 6.8.2 compat */ int has_surface; @@ -117,6 +118,7 @@ struct radeon_colorbuffer_state { GLuint clear; int roundEnable; struct radeon_renderbuffer *rrb; + uint32_t draw_offset; /* offset into color renderbuffer - FBOs */ }; struct radeon_depthbuffer_state { diff --git a/src/mesa/drivers/dri/radeon/radeon_fbo.c b/src/mesa/drivers/dri/radeon/radeon_fbo.c index a55a563340..7342f2295e 100644 --- a/src/mesa/drivers/dri/radeon/radeon_fbo.c +++ b/src/mesa/drivers/dri/radeon/radeon_fbo.c @@ -377,24 +377,28 @@ radeon_update_wrapper(GLcontext *ctx, struct radeon_renderbuffer *rrb, struct gl_texture_image *texImage) { if (texImage->TexFormat == &_mesa_texformat_argb8888) { + rrb->cpp = 4; rrb->base._ActualFormat = GL_RGBA8; rrb->base._BaseFormat = GL_RGBA; rrb->base.DataType = GL_UNSIGNED_BYTE; DBG("Render to RGBA8 texture OK\n"); } else if (texImage->TexFormat == &_mesa_texformat_rgb565) { + rrb->cpp = 2; rrb->base._ActualFormat = GL_RGB5; rrb->base._BaseFormat = GL_RGB; rrb->base.DataType = GL_UNSIGNED_SHORT; DBG("Render to RGB5 texture OK\n"); } else if (texImage->TexFormat == &_mesa_texformat_z16) { + rrb->cpp = 2; rrb->base._ActualFormat = GL_DEPTH_COMPONENT16; rrb->base._BaseFormat = GL_DEPTH_COMPONENT; rrb->base.DataType = GL_UNSIGNED_SHORT; DBG("Render to DEPTH16 texture OK\n"); } else if (texImage->TexFormat == &_mesa_texformat_s8_z24) { + rrb->cpp = 4; rrb->base._ActualFormat = GL_DEPTH24_STENCIL8_EXT; rrb->base._BaseFormat = GL_DEPTH_STENCIL_EXT; rrb->base.DataType = GL_UNSIGNED_INT_24_8_EXT; @@ -406,6 +410,7 @@ radeon_update_wrapper(GLcontext *ctx, struct radeon_renderbuffer *rrb, return GL_FALSE; } + rrb->pitch = texImage->Width * rrb->cpp; rrb->base.InternalFormat = rrb->base._ActualFormat; rrb->base.Width = texImage->Width; rrb->base.Height = texImage->Height; @@ -488,7 +493,7 @@ radeon_render_texture(GLcontext * ctx, return; } - DBG("Begin render texture tid %x tex=%u w=%d h=%d refcount=%d\n", + fprintf(stderr,"Begin render texture tid %x tex=%u w=%d h=%d refcount=%d\n", _glthread_GetID(), att->Texture->Name, newImage->Width, newImage->Height, rrb->base.RefCount); @@ -514,7 +519,7 @@ radeon_render_texture(GLcontext * ctx, } /* store that offset in the region */ - //TODO radeon_image->mt->draw_offset = imageOffset; + rrb->draw_offset = imageOffset; /* update drawing region, etc */ radeon_draw_buffer(ctx, fb); -- cgit v1.2.3