From d2e3942531478eadb637f2f2d71ac7ed923d1003 Mon Sep 17 00:00:00 2001 From: Luca Barbieri Date: Mon, 18 Jan 2010 18:20:45 +0100 Subject: nvfx: add missing vertprog setcond instructions Trivially adds SEQ, SGT, SLE, SNE, SFL, STR and SSG which were missing. --- src/gallium/drivers/nvfx/nvfx_vertprog.c | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) (limited to 'src') diff --git a/src/gallium/drivers/nvfx/nvfx_vertprog.c b/src/gallium/drivers/nvfx/nvfx_vertprog.c index 6b847f3cbf..ef47e013fa 100644 --- a/src/gallium/drivers/nvfx/nvfx_vertprog.c +++ b/src/gallium/drivers/nvfx/nvfx_vertprog.c @@ -544,15 +544,33 @@ nvfx_vertprog_parse_instruction(struct nvfx_context* nvfx, struct nvfx_vpc *vpc, case TGSI_OPCODE_RSQ: arith(vpc, SCA, RSQ, dst, mask, none, none, abs(src[0])); break; + case TGSI_OPCODE_SEQ: + arith(vpc, VEC, SEQ, dst, mask, src[0], src[1], none); + break; + case TGSI_OPCODE_SFL: + arith(vpc, VEC, SFL, dst, mask, src[0], src[1], none); + break; case TGSI_OPCODE_SGE: arith(vpc, VEC, SGE, dst, mask, src[0], src[1], none); break; case TGSI_OPCODE_SGT: arith(vpc, VEC, SGT, dst, mask, src[0], src[1], none); break; + case TGSI_OPCODE_SLE: + arith(vpc, VEC, SLE, dst, mask, src[0], src[1], none); + break; case TGSI_OPCODE_SLT: arith(vpc, VEC, SLT, dst, mask, src[0], src[1], none); break; + case TGSI_OPCODE_SNE: + arith(vpc, VEC, SNE, dst, mask, src[0], src[1], none); + break; + case TGSI_OPCODE_SSG: + arith(vpc, VEC, SSG, dst, mask, src[0], src[1], none); + break; + case TGSI_OPCODE_STR: + arith(vpc, VEC, STR, dst, mask, src[0], src[1], none); + break; case TGSI_OPCODE_SUB: arith(vpc, VEC, ADD, dst, mask, src[0], none, neg(src[1])); break; -- cgit v1.2.3