/*
 * Copyright 2008 Ben Skeggs
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the "Software"),
 * to deal in the Software without restriction, including without limitation
 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
 * and/or sell copies of the Software, and to permit persons to whom the
 * Software is furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice shall be included in
 * all copies or substantial portions of the Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 * THE AUTHORS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
 * OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
 * SOFTWARE.
 */

#include "pipe/p_context.h"
#include "pipe/p_state.h"
#include "util/u_inlines.h"
#include "util/u_format.h"

#include "nv50_context.h"

#define NV50_USING_LOATHED_EDGEFLAG(ctx) ((ctx)->vertprog->cfg.edgeflag_in < 16)

static INLINE unsigned
nv50_prim(unsigned mode)
{
	switch (mode) {
	case PIPE_PRIM_POINTS: return NV50TCL_VERTEX_BEGIN_POINTS;
	case PIPE_PRIM_LINES: return NV50TCL_VERTEX_BEGIN_LINES;
	case PIPE_PRIM_LINE_LOOP: return NV50TCL_VERTEX_BEGIN_LINE_LOOP;
	case PIPE_PRIM_LINE_STRIP: return NV50TCL_VERTEX_BEGIN_LINE_STRIP;
	case PIPE_PRIM_TRIANGLES: return NV50TCL_VERTEX_BEGIN_TRIANGLES;
	case PIPE_PRIM_TRIANGLE_STRIP:
		return NV50TCL_VERTEX_BEGIN_TRIANGLE_STRIP;
	case PIPE_PRIM_TRIANGLE_FAN: return NV50TCL_VERTEX_BEGIN_TRIANGLE_FAN;
	case PIPE_PRIM_QUADS: return NV50TCL_VERTEX_BEGIN_QUADS;
	case PIPE_PRIM_QUAD_STRIP: return NV50TCL_VERTEX_BEGIN_QUAD_STRIP;
	case PIPE_PRIM_POLYGON: return NV50TCL_VERTEX_BEGIN_POLYGON;
	case PIPE_PRIM_LINES_ADJACENCY:
		return NV50TCL_VERTEX_BEGIN_LINES_ADJACENCY;
	case PIPE_PRIM_LINE_STRIP_ADJACENCY:
		return NV50TCL_VERTEX_BEGIN_LINE_STRIP_ADJACENCY;
	case PIPE_PRIM_TRIANGLES_ADJACENCY:
		return NV50TCL_VERTEX_BEGIN_TRIANGLES_ADJACENCY;
	case PIPE_PRIM_TRIANGLE_STRIP_ADJACENCY:
		return NV50TCL_VERTEX_BEGIN_TRIANGLE_STRIP_ADJACENCY;
	default:
		break;
	}

	NOUVEAU_ERR("invalid primitive type %d\n", mode);
	return NV50TCL_VERTEX_BEGIN_POINTS;
}

static INLINE uint32_t
nv50_vbo_type_to_hw(enum pipe_format format)
{
	const struct util_format_description *desc;

	desc = util_format_description(format);
	assert(desc);

	switch (desc->channel[0].type) {
	case UTIL_FORMAT_TYPE_FLOAT:
		return NV50TCL_VERTEX_ARRAY_ATTRIB_TYPE_FLOAT;
	case UTIL_FORMAT_TYPE_UNSIGNED:
		if (desc->channel[0].normalized) {
			return NV50TCL_VERTEX_ARRAY_ATTRIB_TYPE_UNORM;
		}
		return NV50TCL_VERTEX_ARRAY_ATTRIB_TYPE_USCALED;
	case UTIL_FORMAT_TYPE_SIGNED:
		if (desc->channel[0].normalized) {
			return NV50TCL_VERTEX_ARRAY_ATTRIB_TYPE_SNORM;
		}
		return NV50TCL_VERTEX_ARRAY_ATTRIB_TYPE_SSCALED;
	/*
	case PIPE_FORMAT_TYPE_UINT:
		return NV50TCL_VERTEX_ARRAY_ATTRIB_TYPE_UINT;
	case PIPE_FORMAT_TYPE_SINT:
		return NV50TCL_VERTEX_ARRAY_ATTRIB_TYPE_SINT; */
	default:
		return 0;
	}
}

static INLINE uint32_t
nv50_vbo_size_to_hw(unsigned size, unsigned nr_c)
{
	static const uint32_t hw_values[] = {
		0, 0, 0, 0,
		NV50TCL_VERTEX_ARRAY_ATTRIB_FORMAT_8,
		NV50TCL_VERTEX_ARRAY_ATTRIB_FORMAT_8_8,
		NV50TCL_VERTEX_ARRAY_ATTRIB_FORMAT_8_8_8,
		NV50TCL_VERTEX_ARRAY_ATTRIB_FORMAT_8_8_8_8,
		NV50TCL_VERTEX_ARRAY_ATTRIB_FORMAT_16,
		NV50TCL_VERTEX_ARRAY_ATTRIB_FORMAT_16_16,
		NV50TCL_VERTEX_ARRAY_ATTRIB_FORMAT_16_16_16,
		NV50TCL_VERTEX_ARRAY_ATTRIB_FORMAT_16_16_16_16,
		0, 0, 0, 0,
		NV50TCL_VERTEX_ARRAY_ATTRIB_FORMAT_32,
		NV50TCL_VERTEX_ARRAY_ATTRIB_FORMAT_32_32,
		NV50TCL_VERTEX_ARRAY_ATTRIB_FORMAT_32_32_32,
		NV50TCL_VERTEX_ARRAY_ATTRIB_FORMAT_32_32_32_32 };

	/* we'd also have R11G11B10 and R10G10B10A2 */

	assert(nr_c > 0 && nr_c <= 4);

	if (size > 32)
		return 0;
	size >>= (3 - 2);

	return hw_values[size + (nr_c - 1)];
}

static INLINE uint32_t
nv50_vbo_vtxelt_to_hw(struct pipe_vertex_element *ve)
{
	uint32_t hw_type, hw_size;
	enum pipe_format pf = ve->src_format;
	const struct util_format_description *desc;
	unsigned size, nr_components;

	desc = util_format_description(pf);
	assert(desc);

	size = util_format_get_component_bits(pf, UTIL_FORMAT_COLORSPACE_RGB, 0);
	nr_components = util_format_get_nr_components(pf);

	hw_type = nv50_vbo_type_to_hw(pf);
	hw_size = nv50_vbo_size_to_hw(size, nr_components);

	if (!hw_type || !hw_size) {
		NOUVEAU_ERR("unsupported vbo format: %s\n", util_format_name(pf));
		abort();
		return 0x24e80000;
	}

	if (desc->swizzle[0] == UTIL_FORMAT_SWIZZLE_Z) /* BGRA */
		hw_size |= (1 << 31); /* no real swizzle bits :-( */

	return (hw_type | hw_size);
}

static void
nv50_set_static_vtxattr(struct nv50_context *nv50, unsigned i, void *data)
{
	struct nouveau_grobj *tesla = nv50->screen->tesla;
	struct nouveau_channel *chan = tesla->channel;
	float v[4];
	enum pipe_format pf = nv50->vtxelt->pipe[i].src_format;
	unsigned nr_components = util_format_get_nr_components(pf);

	util_format_read_4f(pf, v, 0, data, 0, 0, 0, 1, 1);

	switch (nr_components) {
	case 4:
		BEGIN_RING(chan, tesla, NV50TCL_VTX_ATTR_4F_X(i), 4);
		OUT_RINGf (chan, v[0]);
		OUT_RINGf (chan, v[1]);
		OUT_RINGf (chan, v[2]);
		OUT_RINGf (chan, v[3]);
		break;
	case 3:
		BEGIN_RING(chan, tesla, NV50TCL_VTX_ATTR_3F_X(i), 3);
		OUT_RINGf (chan, v[0]);
		OUT_RINGf (chan, v[1]);
		OUT_RINGf (chan, v[2]);
		break;
	case 2:
		BEGIN_RING(chan, tesla, NV50TCL_VTX_ATTR_2F_X(i), 2);
		OUT_RINGf (chan, v[0]);
		OUT_RINGf (chan, v[1]);
		break;
	case 1:
		BEGIN_RING(chan, tesla, NV50TCL_VTX_ATTR_1F(i), 1);
		OUT_RINGf (chan, v[0]);
		break;
	default:
		assert(0);
		break;
	}
}

static unsigned
init_per_instance_arrays(struct nv50_context *nv50,
			 unsigned startInstance,
			 unsigned pos[16], unsigned step[16])
{
	struct nouveau_grobj *tesla = nv50->screen->tesla;
	struct nouveau_channel *chan = tesla->channel;
	struct nouveau_bo *bo;
	struct nouveau_stateobj *so;
	unsigned i, b, count = 0, num_elements = nv50->vtxelt->num_elements;
	const uint32_t rl = NOUVEAU_BO_VRAM | NOUVEAU_BO_GART | NOUVEAU_BO_RD;

	so = so_new(num_elements, num_elements * 2, num_elements * 2);

	for (i = 0; i < nv50->vtxelt->num_elements; ++i) {
		if (!nv50->vtxelt->pipe[i].instance_divisor)
			continue;
		++count;
		b = nv50->vtxelt->pipe[i].vertex_buffer_index;

		pos[i] = nv50->vtxelt->pipe[i].src_offset +
			nv50->vtxbuf[b].buffer_offset +
			startInstance * nv50->vtxbuf[b].stride;

		if (!startInstance) {
			step[i] = 0;
			continue;
		}
		step[i] = startInstance %
			nv50->vtxelt->pipe[i].instance_divisor;

		bo = nouveau_bo(nv50->vtxbuf[b].buffer);

		so_method(so, tesla, NV50TCL_VERTEX_ARRAY_START_HIGH(i), 2);
		so_reloc (so, bo, pos[i], rl | NOUVEAU_BO_HIGH, 0, 0);
		so_reloc (so, bo, pos[i], rl | NOUVEAU_BO_LOW, 0, 0);
	}

	if (count && startInstance) {
		so_ref (so, &nv50->state.instbuf); /* for flush notify */
		so_emit(chan, nv50->state.instbuf);
	}
	so_ref (NULL, &so);

	return count;
}

static void
step_per_instance_arrays(struct nv50_context *nv50,
			 unsigned pos[16], unsigned step[16])
{
	struct nouveau_grobj *tesla = nv50->screen->tesla;
	struct nouveau_channel *chan = tesla->channel;
	struct nouveau_bo *bo;
	struct nouveau_stateobj *so;
	unsigned i, b, num_elements = nv50->vtxelt->num_elements;
	const uint32_t rl = NOUVEAU_BO_VRAM | NOUVEAU_BO_GART | NOUVEAU_BO_RD;

	so = so_new(num_elements, num_elements * 2, num_elements * 2);

	for (i = 0; i < nv50->vtxelt->num_elements; ++i) {
		if (!nv50->vtxelt->pipe[i].instance_divisor)
			continue;
		b = nv50->vtxelt->pipe[i].vertex_buffer_index;

		if (++step[i] == nv50->vtxelt->pipe[i].instance_divisor) {
			step[i] = 0;
			pos[i] += nv50->vtxbuf[b].stride;
		}

		bo = nouveau_bo(nv50->vtxbuf[b].buffer);

		so_method(so, tesla, NV50TCL_VERTEX_ARRAY_START_HIGH(i), 2);
		so_reloc (so, bo, pos[i], rl | NOUVEAU_BO_HIGH, 0, 0);
		so_reloc (so, bo, pos[i], rl | NOUVEAU_BO_LOW, 0, 0);
	}

	so_ref (so, &nv50->state.instbuf); /* for flush notify */
	so_ref (NULL, &so);

	so_emit(chan, nv50->state.instbuf);
}

void
nv50_draw_arrays_instanced(struct pipe_context *pipe,
			   unsigned mode, unsigned start, unsigned count,
			   unsigned startInstance, unsigned instanceCount)
{
	struct nv50_context *nv50 = nv50_context(pipe);
	struct nouveau_channel *chan = nv50->screen->tesla->channel;
	struct nouveau_grobj *tesla = nv50->screen->tesla;
	unsigned i, nz_divisors;
	unsigned step[16], pos[16];

	if (!nv50_state_validate(nv50, 0))
		return;
	chan->flush_notify = nv50_state_flush_notify;

	nz_divisors = init_per_instance_arrays(nv50, startInstance, pos, step);

	BEGIN_RING(chan, tesla, NV50TCL_CB_ADDR, 2);
	OUT_RING  (chan, NV50_CB_AUX | (24 << 8));
	OUT_RING  (chan, startInstance);

	BEGIN_RING(chan, tesla, NV50TCL_VERTEX_BEGIN, 1);
	OUT_RING  (chan, nv50_prim(mode));
	BEGIN_RING(chan, tesla, NV50TCL_VERTEX_BUFFER_FIRST, 2);
	OUT_RING  (chan, start);
	OUT_RING  (chan, count);
	BEGIN_RING(chan, tesla, NV50TCL_VERTEX_END, 1);
	OUT_RING  (chan, 0);

	for (i = 1; i < instanceCount; i++) {
		if (nz_divisors) /* any non-zero array divisors ? */
			step_per_instance_arrays(nv50, pos, step);

		BEGIN_RING(chan, tesla, NV50TCL_VERTEX_BEGIN, 1);
		OUT_RING  (chan, nv50_prim(mode) | (1 << 28));
		BEGIN_RING(chan, tesla, NV50TCL_VERTEX_BUFFER_FIRST, 2);
		OUT_RING  (chan, start);
		OUT_RING  (chan, count);
		BEGIN_RING(chan, tesla, NV50TCL_VERTEX_END, 1);
		OUT_RING  (chan, 0);
	}

	chan->flush_notify = NULL;

	so_ref(NULL, &nv50->state.instbuf);
}

void
nv50_draw_arrays(struct pipe_context *pipe, unsigned mode, unsigned start,
		 unsigned count)
{
	struct nv50_context *nv50 = nv50_context(pipe);
	struct nouveau_channel *chan = nv50->screen->tesla->channel;
	struct nouveau_grobj *tesla = nv50->screen->tesla;

	if (!nv50_state_validate(nv50, 11))
		return;
	chan->flush_notify = nv50_state_flush_notify;

	BEGIN_RING(chan, tesla, NV50TCL_VERTEX_BEGIN, 1);
	OUT_RING  (chan, nv50_prim(mode));
	BEGIN_RING(chan, tesla, NV50TCL_VERTEX_BUFFER_FIRST, 2);
	OUT_RING  (chan, start);
	OUT_RING  (chan, count);
	BEGIN_RING(chan, tesla, NV50TCL_VERTEX_END, 1);
	OUT_RING  (chan, 0);

	chan->flush_notify = NULL;
}

static INLINE boolean
nv50_draw_elements_inline_u08(struct nv50_context *nv50, uint8_t *map,
			      unsigned start, unsigned count)
{
	struct nouveau_channel *chan = nv50->screen->tesla->channel;
	struct nouveau_grobj *tesla = nv50->screen->tesla;

	map += start;

	if (count & 1) {
		BEGIN_RING(chan, tesla, NV50TCL_VB_ELEMENT_U32, 1);
		OUT_RING  (chan, map[0]);
		map++;
		count--;
	}

	while (count) {
		unsigned nr = count > 2046 ? 2046 : count;
		int i;

		BEGIN_RING_NI(chan, tesla, NV50TCL_VB_ELEMENT_U16, nr >> 1);
		for (i = 0; i < nr; i += 2)
			OUT_RING  (chan, (map[i + 1] << 16) | map[i]);

		count -= nr;
		map += nr;
	}
	return TRUE;
}

static INLINE boolean
nv50_draw_elements_inline_u16(struct nv50_context *nv50, uint16_t *map,
			      unsigned start, unsigned count)
{
	struct nouveau_channel *chan = nv50->screen->tesla->channel;
	struct nouveau_grobj *tesla = nv50->screen->tesla;

	map += start;

	if (count & 1) {
		BEGIN_RING(chan, tesla, NV50TCL_VB_ELEMENT_U32, 1);
		OUT_RING  (chan, map[0]);
		map++;
		count--;
	}

	while (count) {
		unsigned nr = count > 2046 ? 2046 : count;
		int i;

		BEGIN_RING_NI(chan, tesla, NV50TCL_VB_ELEMENT_U16, nr >> 1);
		for (i = 0; i < nr; i += 2)
			OUT_RING  (chan, (map[i + 1] << 16) | map[i]);

		count -= nr;
		map += nr;
	}
	return TRUE;
}

static INLINE boolean
nv50_draw_elements_inline_u32(struct nv50_context *nv50, uint32_t *map,
			      unsigned start, unsigned count)
{
	struct nouveau_channel *chan = nv50->screen->tesla->channel;
	struct nouveau_grobj *tesla = nv50->screen->tesla;

	map += start;

	while (count) {
		unsigned nr = count > 2047 ? 2047 : count;

		BEGIN_RING_NI(chan, tesla, NV50TCL_VB_ELEMENT_U32, nr);
		OUT_RINGp (chan, map, nr);

		count -= nr;
		map += nr;
	}
	return TRUE;
}

static INLINE void
nv50_draw_elements_inline(struct nv50_context *nv50,
			  void *map, unsigned indexSize,
			  unsigned start, unsigned count)
{
	switch (indexSize) {
	case 1:
		nv50_draw_elements_inline_u08(nv50, map, start, count);
		break;
	case 2:
		nv50_draw_elements_inline_u16(nv50, map, start, count);
		break;
	case 4:
		nv50_draw_elements_inline_u32(nv50, map, start, count);
		break;
	}
}

void
nv50_draw_elements_instanced(struct pipe_context *pipe,
			     struct pipe_buffer *indexBuffer,
			     unsigned indexSize,
			     unsigned mode, unsigned start, unsigned count,
			     unsigned startInstance, unsigned instanceCount)
{
	struct nv50_context *nv50 = nv50_context(pipe);
	struct nouveau_grobj *tesla = nv50->screen->tesla;
	struct nouveau_channel *chan = tesla->channel;
	struct pipe_screen *pscreen = pipe->screen;
	void *map;
	unsigned i, nz_divisors;
	unsigned step[16], pos[16];

	map = pipe_buffer_map(pscreen, indexBuffer, PIPE_BUFFER_USAGE_CPU_READ);

	if (!nv50_state_validate(nv50, 0))
		return;
	chan->flush_notify = nv50_state_flush_notify;

	nz_divisors = init_per_instance_arrays(nv50, startInstance, pos, step);

	BEGIN_RING(chan, tesla, NV50TCL_CB_ADDR, 2);
	OUT_RING  (chan, NV50_CB_AUX | (24 << 8));
	OUT_RING  (chan, startInstance);

	BEGIN_RING(chan, tesla, NV50TCL_VERTEX_BEGIN, 1);
	OUT_RING  (chan, nv50_prim(mode));

	nv50_draw_elements_inline(nv50, map, indexSize, start, count);

	BEGIN_RING(chan, tesla, NV50TCL_VERTEX_END, 1);
	OUT_RING  (chan, 0);

	for (i = 1; i < instanceCount; ++i) {
		if (nz_divisors) /* any non-zero array divisors ? */
			step_per_instance_arrays(nv50, pos, step);

		BEGIN_RING(chan, tesla, NV50TCL_VERTEX_BEGIN, 1);
		OUT_RING  (chan, nv50_prim(mode) | (1 << 28));

		nv50_draw_elements_inline(nv50, map, indexSize, start, count);

		BEGIN_RING(chan, tesla, NV50TCL_VERTEX_END, 1);
		OUT_RING  (chan, 0);
	}

	chan->flush_notify = NULL;

	so_ref(NULL, &nv50->state.instbuf);
}

void
nv50_draw_elements(struct pipe_context *pipe,
		   struct pipe_buffer *indexBuffer, unsigned indexSize,
		   unsigned mode, unsigned start, unsigned count)
{
	struct nv50_context *nv50 = nv50_context(pipe);
	struct nouveau_channel *chan = nv50->screen->tesla->channel;
	struct nouveau_grobj *tesla = nv50->screen->tesla;
	struct pipe_screen *pscreen = pipe->screen;
	void *map;
	
	if (!nv50_state_validate(nv50, 14))
		return;
	chan->flush_notify = nv50_state_flush_notify;

	BEGIN_RING(chan, tesla, NV50TCL_VERTEX_BEGIN, 1);
	OUT_RING  (chan, nv50_prim(mode));

	if (indexSize == 4) {
		BEGIN_RING(chan, tesla, NV50TCL_VB_ELEMENT_U32 | 0x30000, 0);
		OUT_RING  (chan, count);
		nouveau_pushbuf_submit(chan, nouveau_bo(indexBuffer),
				       start << 2, count << 2);
	} else
	if (indexSize == 2) {
		unsigned vb_start = (start & ~1);
		unsigned vb_end = (start + count + 1) & ~1;
		unsigned dwords = (vb_end - vb_start) >> 1;

		BEGIN_RING(chan, tesla, NV50TCL_VB_ELEMENT_U16_SETUP, 1);
		OUT_RING  (chan, ((start & 1) << 31) | count);
		BEGIN_RING(chan, tesla, NV50TCL_VB_ELEMENT_U16 | 0x30000, 0);
		OUT_RING  (chan, dwords);
		nouveau_pushbuf_submit(chan, nouveau_bo(indexBuffer),
				       vb_start << 1, dwords << 2);
		BEGIN_RING(chan, tesla, NV50TCL_VB_ELEMENT_U16_SETUP, 1);
		OUT_RING  (chan, 0);
	} else {
		map = pipe_buffer_map(pscreen, indexBuffer,
				      PIPE_BUFFER_USAGE_CPU_READ);
		nv50_draw_elements_inline(nv50, map, indexSize, start, count);
		pipe_buffer_unmap(pscreen, indexBuffer);
	}

	BEGIN_RING(chan, tesla, NV50TCL_VERTEX_END, 1);
	OUT_RING  (chan, 0);
	chan->flush_notify = NULL;
}

static INLINE boolean
nv50_vbo_static_attrib(struct nv50_context *nv50, unsigned attrib,
		       struct nouveau_stateobj **pso,
		       struct pipe_vertex_element *ve,
		       struct pipe_vertex_buffer *vb)

{
	struct nouveau_stateobj *so;
	struct nouveau_grobj *tesla = nv50->screen->tesla;
	struct nouveau_bo *bo = nouveau_bo(vb->buffer);
	float v[4];
	int ret;
	unsigned nr_components = util_format_get_nr_components(ve->src_format);

	ret = nouveau_bo_map(bo, NOUVEAU_BO_RD);
	if (ret)
		return FALSE;

	util_format_read_4f(ve->src_format, v, 0, (uint8_t *)bo->map +
			    (vb->buffer_offset + ve->src_offset), 0,
			    0, 0, 1, 1);
	so = *pso;
	if (!so)
		*pso = so = so_new(nv50->vtxelt->num_elements,
				   nv50->vtxelt->num_elements * 4, 0);

	switch (nr_components) {
	case 4:
		so_method(so, tesla, NV50TCL_VTX_ATTR_4F_X(attrib), 4);
		so_data  (so, fui(v[0]));
		so_data  (so, fui(v[1]));
		so_data  (so, fui(v[2]));
		so_data  (so, fui(v[3]));
		break;
	case 3:
		so_method(so, tesla, NV50TCL_VTX_ATTR_3F_X(attrib), 3);
		so_data  (so, fui(v[0]));
		so_data  (so, fui(v[1]));
		so_data  (so, fui(v[2]));
		break;
	case 2:
		so_method(so, tesla, NV50TCL_VTX_ATTR_2F_X(attrib), 2);
		so_data  (so, fui(v[0]));
		so_data  (so, fui(v[1]));
		break;
	case 1:
		if (attrib == nv50->vertprog->cfg.edgeflag_in) {
			so_method(so, tesla, NV50TCL_EDGEFLAG_ENABLE, 1);
			so_data  (so, v[0] ? 1 : 0);
		}
		so_method(so, tesla, NV50TCL_VTX_ATTR_1F(attrib), 1);
		so_data  (so, fui(v[0]));
		break;
	default:
		nouveau_bo_unmap(bo);
		return FALSE;
	}

	nouveau_bo_unmap(bo);
	return TRUE;
}

void
nv50_vtxelt_construct(struct nv50_vtxelt_stateobj *cso)
{
	unsigned i;

	for (i = 0; i < cso->num_elements; ++i) {
		struct pipe_vertex_element *ve = &cso->pipe[i];

		cso->hw[i] = nv50_vbo_vtxelt_to_hw(ve);
	}
}

struct nouveau_stateobj *
nv50_vbo_validate(struct nv50_context *nv50)
{
	struct nouveau_grobj *tesla = nv50->screen->tesla;
	struct nouveau_stateobj *vtxbuf, *vtxfmt, *vtxattr;
	unsigned i, n_ve;

	/* don't validate if Gallium took away our buffers */
	if (nv50->vtxbuf_nr == 0)
		return NULL;

	assert(!NV50_USING_LOATHED_EDGEFLAG(nv50));

	n_ve = MAX2(nv50->vtxelt->num_elements, nv50->state.vtxelt_nr);

	vtxattr = NULL;
	vtxbuf = so_new(n_ve * 2, n_ve * 5, nv50->vtxelt->num_elements * 4);
	vtxfmt = so_new(1, n_ve, 0);
	so_method(vtxfmt, tesla, NV50TCL_VERTEX_ARRAY_ATTRIB(0), n_ve);

	for (i = 0; i < nv50->vtxelt->num_elements; i++) {
		struct pipe_vertex_element *ve = &nv50->vtxelt->pipe[i];
		struct pipe_vertex_buffer *vb =
			&nv50->vtxbuf[ve->vertex_buffer_index];
		struct nouveau_bo *bo = nouveau_bo(vb->buffer);
		uint32_t hw = nv50->vtxelt->hw[i];

		if (!vb->stride &&
		    nv50_vbo_static_attrib(nv50, i, &vtxattr, ve, vb)) {
			so_data(vtxfmt, hw | (1 << 4));

			so_method(vtxbuf, tesla,
				  NV50TCL_VERTEX_ARRAY_FORMAT(i), 1);
			so_data  (vtxbuf, 0);
			continue;
		}

		so_data(vtxfmt, hw | i);

		so_method(vtxbuf, tesla, NV50TCL_VERTEX_ARRAY_FORMAT(i), 3);
		so_data  (vtxbuf, 0x20000000 |
			  (ve->instance_divisor ? 0 : vb->stride));
		so_reloc (vtxbuf, bo, vb->buffer_offset +
			  ve->src_offset, NOUVEAU_BO_VRAM | NOUVEAU_BO_GART |
			  NOUVEAU_BO_RD | NOUVEAU_BO_HIGH, 0, 0);
		so_reloc (vtxbuf, bo, vb->buffer_offset +
			  ve->src_offset, NOUVEAU_BO_VRAM | NOUVEAU_BO_GART |
			  NOUVEAU_BO_RD | NOUVEAU_BO_LOW, 0, 0);

		/* vertex array limits */
		so_method(vtxbuf, tesla, NV50TCL_VERTEX_ARRAY_LIMIT_HIGH(i), 2);
		so_reloc (vtxbuf, bo, vb->buffer->size - 1,
			  NOUVEAU_BO_VRAM | NOUVEAU_BO_GART | NOUVEAU_BO_RD |
			  NOUVEAU_BO_HIGH, 0, 0);
		so_reloc (vtxbuf, bo, vb->buffer->size - 1,
			  NOUVEAU_BO_VRAM | NOUVEAU_BO_GART | NOUVEAU_BO_RD |
			  NOUVEAU_BO_LOW, 0, 0);
	}
	for (; i < n_ve; ++i) {
		so_data  (vtxfmt, 0x7e080010);

		so_method(vtxbuf, tesla, NV50TCL_VERTEX_ARRAY_FORMAT(i), 1);
		so_data  (vtxbuf, 0);
	}
	nv50->state.vtxelt_nr = nv50->vtxelt->num_elements;

	so_ref (vtxbuf, &nv50->state.vtxbuf);
	so_ref (vtxattr, &nv50->state.vtxattr);
	so_ref (NULL, &vtxbuf);
	so_ref (NULL, &vtxattr);
	return vtxfmt;
}