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/*
* Copyright 2010 Jerome Glisse <glisse@freedesktop.org>
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* on the rights to use, copy, modify, merge, publish, distribute, sub
* license, and/or sell copies of the Software, and to permit persons to whom
* the Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice (including the next
* paragraph) shall be included in all copies or substantial portions of the
* Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
* THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
* DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
* OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
* USE OR OTHER DEALINGS IN THE SOFTWARE.
*
* Authors:
* Jerome Glisse
* Corbin Simpson
*/
#include <stdio.h>
#include "util/u_inlines.h"
#include "util/u_format.h"
#include "util/u_memory.h"
#include "r600_screen.h"
#include "r600_context.h"
#include "r600_public.h"
#include "r600_resource.h"
#include "r600_state_inlines.h"
static const char* r600_get_vendor(struct pipe_screen* pscreen)
{
return "X.Org";
}
static const char* r600_get_name(struct pipe_screen* pscreen)
{
struct r600_screen *screen = r600_screen(pscreen);
enum radeon_family family = radeon_get_family(screen->rw);
if (family >= CHIP_R600 && family < CHIP_RV770)
return "R600 (HD2XXX,HD3XXX)";
else
return "R700 (HD4XXX)";
}
static int r600_get_param(struct pipe_screen* pscreen, enum pipe_cap param)
{
switch (param) {
/* Supported features (boolean caps). */
case PIPE_CAP_NPOT_TEXTURES:
case PIPE_CAP_TWO_SIDED_STENCIL:
case PIPE_CAP_GLSL:
case PIPE_CAP_DUAL_SOURCE_BLEND:
case PIPE_CAP_ANISOTROPIC_FILTER:
case PIPE_CAP_POINT_SPRITE:
case PIPE_CAP_OCCLUSION_QUERY:
case PIPE_CAP_TEXTURE_SHADOW_MAP:
case PIPE_CAP_TEXTURE_MIRROR_CLAMP:
case PIPE_CAP_TEXTURE_MIRROR_REPEAT:
case PIPE_CAP_BLEND_EQUATION_SEPARATE:
case PIPE_CAP_SM3:
case PIPE_CAP_TEXTURE_SWIZZLE:
case PIPE_CAP_INDEP_BLEND_ENABLE:
case PIPE_CAP_DEPTHSTENCIL_CLEAR_SEPARATE:
return 1;
/* Unsupported features (boolean caps). */
case PIPE_CAP_TIMER_QUERY:
case PIPE_CAP_TGSI_CONT_SUPPORTED:
case PIPE_CAP_STREAM_OUTPUT:
case PIPE_CAP_INDEP_BLEND_FUNC: /* FIXME allow this */
case PIPE_CAP_GEOMETRY_SHADER4:
case PIPE_CAP_DEPTH_CLAMP: /* FIXME allow this */
return 0;
/* Texturing. */
case PIPE_CAP_MAX_TEXTURE_2D_LEVELS:
case PIPE_CAP_MAX_TEXTURE_3D_LEVELS:
case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS:
return 14;
case PIPE_CAP_MAX_VERTEX_TEXTURE_UNITS:
/* FIXME allow this once infrastructure is there */
return 0;
case PIPE_CAP_MAX_TEXTURE_IMAGE_UNITS:
case PIPE_CAP_MAX_COMBINED_SAMPLERS:
return 16;
/* Render targets. */
case PIPE_CAP_MAX_RENDER_TARGETS:
/* FIXME some r6xx are buggy and can only do 4 */
return 8;
/* Fragment coordinate conventions. */
case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT:
case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER:
return 1;
case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT:
case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER:
return 0;
/* Shader limits. */
case PIPE_CAP_MAX_VS_INSTRUCTIONS:
return 16384; //max native instructions, not greater than max instructions
case PIPE_CAP_MAX_VS_ALU_INSTRUCTIONS:
case PIPE_CAP_MAX_VS_TEX_INSTRUCTIONS:
case PIPE_CAP_MAX_VS_TEX_INDIRECTIONS:
return 16384;
case PIPE_CAP_MAX_FS_INSTRUCTIONS:
return 16384; //max program native instructions
case PIPE_CAP_MAX_FS_ALU_INSTRUCTIONS:
return 16384; //max program native ALU instructions
case PIPE_CAP_MAX_FS_TEX_INSTRUCTIONS:
return 16384; //max program native texture instructions
case PIPE_CAP_MAX_FS_TEX_INDIRECTIONS:
return 2048; //max program native texture indirections
case PIPE_CAP_MAX_VS_CONTROL_FLOW_DEPTH:
case PIPE_CAP_MAX_FS_CONTROL_FLOW_DEPTH:
return 8; /* FIXME */
case PIPE_CAP_MAX_VS_INPUTS:
return 16; //max native attributes
case PIPE_CAP_MAX_FS_INPUTS:
return 10; //max native attributes
case PIPE_CAP_MAX_VS_TEMPS:
return 256; //max native temporaries
case PIPE_CAP_MAX_FS_TEMPS:
return 256; //max native temporaries
case PIPE_CAP_MAX_VS_ADDRS:
case PIPE_CAP_MAX_FS_ADDRS:
return 1; //max native address registers/* FIXME Isn't this equal to TEMPS? */
case PIPE_CAP_MAX_VS_CONSTS:
return 256; //max native parameters
case PIPE_CAP_MAX_FS_CONSTS:
return 256; //max program native parameters
case PIPE_CAP_MAX_CONST_BUFFERS:
return 1;
case PIPE_CAP_MAX_CONST_BUFFER_SIZE: /* in bytes */
return 4096;
case PIPE_CAP_MAX_PREDICATE_REGISTERS:
case PIPE_CAP_MAX_VS_PREDS:
case PIPE_CAP_MAX_FS_PREDS:
return 0; /* FIXME */
default:
R600_ERR("r600: unknown param %d\n", param);
return 0;
}
}
static float r600_get_paramf(struct pipe_screen* pscreen, enum pipe_cap param)
{
switch (param) {
case PIPE_CAP_MAX_LINE_WIDTH:
case PIPE_CAP_MAX_LINE_WIDTH_AA:
case PIPE_CAP_MAX_POINT_WIDTH:
case PIPE_CAP_MAX_POINT_WIDTH_AA:
return 8192.0f;
case PIPE_CAP_MAX_TEXTURE_ANISOTROPY:
return 16.0f;
case PIPE_CAP_MAX_TEXTURE_LOD_BIAS:
return 16.0f;
default:
R600_ERR("r600: unsupported paramf %d\n", param);
return 0.0f;
}
}
static boolean r600_is_format_supported(struct pipe_screen* screen,
enum pipe_format format,
enum pipe_texture_target target,
unsigned sample_count,
unsigned usage,
unsigned geom_flags)
{
unsigned retval = 0;
if (target >= PIPE_MAX_TEXTURE_TYPES) {
R600_ERR("r600: unsupported texture type %d\n", target);
return FALSE;
}
/* Multisample */
if (sample_count > 1)
return FALSE;
if ((usage & PIPE_BIND_SAMPLER_VIEW) &&
r600_is_sampler_format_supported(format)) {
retval |= PIPE_BIND_SAMPLER_VIEW;
}
if ((usage & (PIPE_BIND_RENDER_TARGET |
PIPE_BIND_DISPLAY_TARGET |
PIPE_BIND_SCANOUT |
PIPE_BIND_SHARED)) &&
r600_is_colorbuffer_format_supported(format)) {
retval |= usage &
(PIPE_BIND_RENDER_TARGET |
PIPE_BIND_DISPLAY_TARGET |
PIPE_BIND_SCANOUT |
PIPE_BIND_SHARED);
}
if ((usage & PIPE_BIND_DEPTH_STENCIL) &&
r600_is_zs_format_supported(format)) {
retval |= PIPE_BIND_DEPTH_STENCIL;
}
if ((usage & PIPE_BIND_VERTEX_BUFFER) &&
r600_is_vertex_format_supported(format))
retval |= PIPE_BIND_VERTEX_BUFFER;
if (usage & PIPE_BIND_TRANSFER_READ)
retval |= PIPE_BIND_TRANSFER_READ;
if (usage & PIPE_BIND_TRANSFER_WRITE)
retval |= PIPE_BIND_TRANSFER_WRITE;
return retval == usage;
}
static void r600_destroy_screen(struct pipe_screen* pscreen)
{
struct r600_screen* rscreen = r600_screen(pscreen);
if (rscreen == NULL)
return;
FREE(rscreen);
}
struct pipe_screen *r600_screen_create(struct radeon *rw)
{
struct r600_screen* rscreen;
rscreen = CALLOC_STRUCT(r600_screen);
if (rscreen == NULL) {
return NULL;
}
rscreen->rw = rw;
rscreen->screen.winsys = (struct pipe_winsys*)rw;
rscreen->screen.destroy = r600_destroy_screen;
rscreen->screen.get_name = r600_get_name;
rscreen->screen.get_vendor = r600_get_vendor;
rscreen->screen.get_param = r600_get_param;
rscreen->screen.get_paramf = r600_get_paramf;
rscreen->screen.is_format_supported = r600_is_format_supported;
rscreen->screen.context_create = r600_create_context;
r600_init_screen_texture_functions(&rscreen->screen);
r600_init_screen_resource_functions(rscreen);
return &rscreen->screen;
}
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