1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
|
#include "pipe/draw/draw_context.h"
#include "pipe/p_defines.h"
#include "pipe/p_winsys.h"
#include "pipe/p_util.h"
#include "nv40_context.h"
#define NV4X_GRCLASS4097_CHIPSETS 0x00000baf
#define NV4X_GRCLASS4497_CHIPSETS 0x00005450
#define NV6X_GRCLASS4497_CHIPSETS 0x00000088
static const char *
nv40_get_name(struct pipe_context *pipe)
{
struct nv40_context *nv40 = nv40_context(pipe);
static char buffer[128];
snprintf(buffer, sizeof(buffer), "NV%02X", nv40->chipset);
return buffer;
}
static const char *
nv40_get_vendor(struct pipe_context *pipe)
{
return "nouveau";
}
static int
nv40_get_param(struct pipe_context *pipe, int param)
{
switch (param) {
case PIPE_CAP_MAX_TEXTURE_IMAGE_UNITS:
return 16;
case PIPE_CAP_NPOT_TEXTURES:
return 1;
case PIPE_CAP_TWO_SIDED_STENCIL:
return 1;
case PIPE_CAP_GLSL:
return 0;
case PIPE_CAP_S3TC:
return 0;
case PIPE_CAP_ANISOTROPIC_FILTER:
return 1;
case PIPE_CAP_POINT_SPRITE:
return 1;
case PIPE_CAP_MAX_RENDER_TARGETS:
return 4;
case PIPE_CAP_OCCLUSION_QUERY:
return 1;
case PIPE_CAP_TEXTURE_SHADOW_MAP:
return 1;
case PIPE_CAP_MAX_TEXTURE_2D_LEVELS:
return 13;
case PIPE_CAP_MAX_TEXTURE_3D_LEVELS:
return 10;
case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS:
return 13;
default:
NOUVEAU_ERR("Unknown PIPE_CAP %d\n", param);
return 0;
}
}
static float
nv40_get_paramf(struct pipe_context *pipe, int param)
{
switch (param) {
case PIPE_CAP_MAX_LINE_WIDTH:
case PIPE_CAP_MAX_LINE_WIDTH_AA:
return 10.0;
case PIPE_CAP_MAX_POINT_WIDTH:
case PIPE_CAP_MAX_POINT_WIDTH_AA:
return 64.0;
case PIPE_CAP_MAX_TEXTURE_ANISOTROPY:
return 16.0;
case PIPE_CAP_MAX_TEXTURE_LOD_BIAS:
return 16.0;
case PIPE_CAP_BITMAP_TEXCOORD_BIAS:
return 0.0;
default:
NOUVEAU_ERR("Unknown PIPE_CAP %d\n", param);
return 0.0;
}
}
static void
nv40_flush(struct pipe_context *pipe, unsigned flags)
{
struct nv40_context *nv40 = nv40_context(pipe);
struct nouveau_winsys *nvws = nv40->nvws;
if (flags & PIPE_FLUSH_TEXTURE_CACHE) {
BEGIN_RING(curie, 0x1fd8, 1);
OUT_RING (2);
BEGIN_RING(curie, 0x1fd8, 1);
OUT_RING (1);
}
if (flags & PIPE_FLUSH_WAIT) {
nvws->notifier_reset(nv40->hw->sync, 0);
BEGIN_RING(curie, 0x104, 1);
OUT_RING (0);
BEGIN_RING(curie, 0x100, 1);
OUT_RING (0);
}
FIRE_RING();
if (flags & PIPE_FLUSH_WAIT)
nvws->notifier_wait(nv40->hw->sync, 0, 0, 2000);
}
static void
nv40_channel_takedown(struct nv40_channel_context *cnv40)
{
struct nouveau_winsys *nvws = cnv40->nvws;
nvws->res_free(&cnv40->vp_exec_heap);
nvws->res_free(&cnv40->vp_data_heap);
nvws->res_free(&cnv40->query_heap);
nvws->notifier_free(&cnv40->query);
nvws->notifier_free(&cnv40->sync);
nvws->grobj_free(&cnv40->curie);
free(cnv40);
}
static struct nv40_channel_context *
nv40_channel_init(struct pipe_winsys *ws, struct nouveau_winsys *nvws,
unsigned chipset)
{
struct nv40_channel_context *cnv40 = NULL;
struct nouveau_stateobj *so;
unsigned curie_class = 0;
int ret;
switch (chipset & 0xf0) {
case 0x40:
if (NV4X_GRCLASS4097_CHIPSETS & (1 << (chipset & 0x0f)))
curie_class = NV40TCL;
else
if (NV4X_GRCLASS4497_CHIPSETS & (1 << (chipset & 0x0f)))
curie_class = NV44TCL;
break;
case 0x60:
if (NV6X_GRCLASS4497_CHIPSETS & (1 << (chipset & 0x0f)))
curie_class = NV44TCL;
break;
default:
break;
}
if (!curie_class) {
NOUVEAU_ERR("Unknown nv4x chipset: nv%02x\n", chipset);
return NULL;
}
cnv40 = calloc(1, sizeof(struct nv40_channel_context));
if (!cnv40)
return NULL;
cnv40->chipset = chipset;
cnv40->nvws = nvws;
/* Notifier for sync purposes */
ret = nvws->notifier_alloc(nvws, 1, &cnv40->sync);
if (ret) {
NOUVEAU_ERR("Error creating notifier object: %d\n", ret);
nv40_channel_takedown(cnv40);
return NULL;
}
/* Query objects */
ret = nvws->notifier_alloc(nvws, 32, &cnv40->query);
if (ret) {
NOUVEAU_ERR("Error initialising query objects: %d\n", ret);
nv40_channel_takedown(cnv40);
return NULL;
}
ret = nvws->res_init(&cnv40->query_heap, 0, 32);
if (ret) {
NOUVEAU_ERR("Error initialising query object heap: %d\n", ret);
nv40_channel_takedown(cnv40);
return NULL;
}
/* Vtxprog resources */
if (nvws->res_init(&cnv40->vp_exec_heap, 0, 512) ||
nvws->res_init(&cnv40->vp_data_heap, 0, 256)) {
nv40_channel_takedown(cnv40);
return NULL;
}
/* 3D object */
ret = nvws->grobj_alloc(nvws, curie_class, &cnv40->curie);
if (ret) {
NOUVEAU_ERR("Error creating 3D object: %d\n", ret);
return FALSE;
}
/* Static curie initialisation */
so = so_new(128, 0);
so_method(so, cnv40->curie, NV40TCL_DMA_NOTIFY, 1);
so_data (so, cnv40->sync->handle);
so_method(so, cnv40->curie, NV40TCL_DMA_TEXTURE0, 2);
so_data (so, nvws->channel->vram->handle);
so_data (so, nvws->channel->gart->handle);
so_method(so, cnv40->curie, NV40TCL_DMA_COLOR1, 1);
so_data (so, nvws->channel->vram->handle);
so_method(so, cnv40->curie, NV40TCL_DMA_COLOR0, 2);
so_data (so, nvws->channel->vram->handle);
so_data (so, nvws->channel->vram->handle);
so_method(so, cnv40->curie, NV40TCL_DMA_VTXBUF0, 2);
so_data (so, nvws->channel->vram->handle);
so_data (so, nvws->channel->gart->handle);
so_method(so, cnv40->curie, NV40TCL_DMA_FENCE, 2);
so_data (so, 0);
so_data (so, cnv40->query->handle);
so_method(so, cnv40->curie, NV40TCL_DMA_UNK01AC, 2);
so_data (so, nvws->channel->vram->handle);
so_data (so, nvws->channel->vram->handle);
so_method(so, cnv40->curie, NV40TCL_DMA_COLOR2, 2);
so_data (so, nvws->channel->vram->handle);
so_data (so, nvws->channel->vram->handle);
so_method(so, cnv40->curie, 0x1ea4, 3);
so_data (so, 0x00000010);
so_data (so, 0x01000100);
so_data (so, 0xff800006);
/* vtxprog output routing */
so_method(so, cnv40->curie, 0x1fc4, 1);
so_data (so, 0x06144321);
so_method(so, cnv40->curie, 0x1fc8, 2);
so_data (so, 0xedcba987);
so_data (so, 0x00000021);
so_method(so, cnv40->curie, 0x1fd0, 1);
so_data (so, 0x00171615);
so_method(so, cnv40->curie, 0x1fd4, 1);
so_data (so, 0x001b1a19);
so_method(so, cnv40->curie, 0x1ef8, 1);
so_data (so, 0x0020ffff);
so_method(so, cnv40->curie, 0x1d64, 1);
so_data (so, 0x00d30000);
so_method(so, cnv40->curie, 0x1e94, 1);
so_data (so, 0x00000001);
so_emit(nvws, so);
so_ref(NULL, &so);
nvws->push_flush(nvws->channel, 0);
return cnv40;
}
static void
nv40_destroy(struct pipe_context *pipe)
{
struct nv40_context *nv40 = nv40_context(pipe);
if (nv40->draw)
draw_destroy(nv40->draw);
if (nv40->hw) {
if (--nv40->hw->refcount == 0)
nv40_channel_takedown(nv40->hw);
}
free(nv40);
}
struct pipe_context *
nv40_create(struct pipe_winsys *ws, struct nouveau_winsys *nvws,
unsigned chipset)
{
struct nv40_context *nv40;
nv40 = calloc(1, sizeof(struct nv40_context));
if (!nv40)
return NULL;
nv40->hw = nv40_channel_init(ws, nvws, chipset);
if (!nv40->hw) {
nv40_destroy(&nv40->pipe);
return NULL;
}
nv40->chipset = chipset;
nv40->nvws = nvws;
nv40->pipe.winsys = ws;
nv40->pipe.destroy = nv40_destroy;
nv40->pipe.get_name = nv40_get_name;
nv40->pipe.get_vendor = nv40_get_vendor;
nv40->pipe.get_param = nv40_get_param;
nv40->pipe.get_paramf = nv40_get_paramf;
nv40->pipe.draw_arrays = nv40_draw_arrays;
nv40->pipe.draw_elements = nv40_draw_elements;
nv40->pipe.clear = nv40_clear;
nv40->pipe.flush = nv40_flush;
nv40_init_query_functions(nv40);
nv40_init_surface_functions(nv40);
nv40_init_state_functions(nv40);
nv40_init_miptree_functions(nv40);
nv40->draw = draw_create();
assert(nv40->draw);
draw_set_rasterize_stage(nv40->draw, nv40_draw_render_stage(nv40));
return &nv40->pipe;
}
|
