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authorGustavo Zacarias <gustavo@zacarias.com.ar>2012-01-05 16:31:43 -0300
committerPeter Korsgaard <jacmet@sunsite.dk>2012-01-07 20:46:11 +0100
commit5a6087d62e5c2a272278606ebf1cc62830cf4c68 (patch)
tree965b155a8b887704f2d321e544c183152d4a5fb5 /package
parentc2c06aad27b59dc85d8747a05433aae51781a775 (diff)
toolchain: add powerpc SPE ABI support
Add the ability for buildroot to build an SPE ABI enabled toolchain. This is mandatory for e500v1/v2 cores since they don't support classic FPU mode as the e500mc does. Useful for Freescale's PowerQUICC III and single/dual-core QorIQ line of processors. The new TARGET_ABI variable is used rather than TARGET_CFLAGS for uclibc's UCLIBC_EXTRA_CFLAGS to avoid breakish CFLAGS leaking in, a good example being -mthumb for ARM. Signed-off-by: Gustavo Zacarias <gustavo@zacarias.com.ar> Signed-off-by: Peter Korsgaard <jacmet@sunsite.dk>
Diffstat (limited to 'package')
-rw-r--r--package/Makefile.in17
1 files changed, 16 insertions, 1 deletions
diff --git a/package/Makefile.in b/package/Makefile.in
index c3af5d3ea..dc8d0383c 100644
--- a/package/Makefile.in
+++ b/package/Makefile.in
@@ -31,6 +31,21 @@ ABI=eabi
endif
endif
+# For FSL PowerPC there's SPE
+ifeq ($(BR2_powerpc_SPE),y)
+ABI=spe
+# MPC8540s are e500v1 with single precision FP
+ifeq ($(BR2_powerpc_8540),y)
+TARGET_ABI+=-mabi=spe -mfloat-gprs=single -Wa,-me500
+endif
+ifeq ($(BR2_powerpc_8548),y)
+TARGET_ABI+=-mabi=spe -mfloat-gprs=double -Wa,-me500x2
+endif
+ifeq ($(BR2_powerpc_e500mc),y)
+TARGET_ABI+=-mabi=spe -mfloat-gprs=double -Wa,-me500mc
+endif
+endif
+
REAL_GNU_TARGET_NAME=$(ARCH)-unknown-linux-$(LIBC)$(ABI)
STAGING_DIR=$(HOST_DIR)/usr/$(REAL_GNU_TARGET_NAME)/sysroot
@@ -60,7 +75,7 @@ ifeq ($(BR2_DEBUG_3),y)
TARGET_DEBUGGING=-g3
endif
-TARGET_CFLAGS=$(TARGET_OPTIMIZATION) $(TARGET_DEBUGGING)
+TARGET_CFLAGS=$(TARGET_ABI) $(TARGET_OPTIMIZATION) $(TARGET_DEBUGGING)
ifneq ($(BR2_PREFER_STATIC_LIB),y)
ifeq ($(BR2_x86_64),y)