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-rw-r--r--sources/gcc/3.4.2/100-uclibc-conf.patch2
-rw-r--r--sources/gcc/3.4.2/400-mips-delay-slot.patch46
-rw-r--r--sources/gcc/3.4.2/400-mips-pr17565.patch102
-rw-r--r--sources/gcc/3.4.2/401-ppc-eabi-typo.patch20
4 files changed, 123 insertions, 47 deletions
diff --git a/sources/gcc/3.4.2/100-uclibc-conf.patch b/sources/gcc/3.4.2/100-uclibc-conf.patch
index c7752129c..10108103e 100644
--- a/sources/gcc/3.4.2/100-uclibc-conf.patch
+++ b/sources/gcc/3.4.2/100-uclibc-conf.patch
@@ -288,7 +288,7 @@ diff -urN gcc-3.4.1-dist/gcc/config/t-linux-uclibc gcc-3.4.1/gcc/config/t-linux-
+
+# Override t-slibgcc-elf-ver to export some libgcc symbols with
+# the symbol versions that glibc used.
-+SHLIB_MAPFILES += $(srcdir)/config/libgcc-glibc.ver
++#SHLIB_MAPFILES += $(srcdir)/config/libgcc-glibc.ver
+
+# Use unwind-dw2-fde
+LIB2ADDEH = $(srcdir)/unwind-dw2.c $(srcdir)/unwind-dw2-fde.c \
diff --git a/sources/gcc/3.4.2/400-mips-delay-slot.patch b/sources/gcc/3.4.2/400-mips-delay-slot.patch
deleted file mode 100644
index 8111dba18..000000000
--- a/sources/gcc/3.4.2/400-mips-delay-slot.patch
+++ /dev/null
@@ -1,46 +0,0 @@
-http://www.linux-mips.org/archives/linux-mips/2004-09/msg00000.html
-
-Atsushi Nemoto <anemo@mba.ocn.ne.jp> writes:
->/ Is this a get_user's problem or gcc's?/
-
-The latter. gcc is putting the empty asm:
-
- __asm__ ("":"=r" (__gu_val));
-
-into the delay slot of the call.
-
-Part of the problem is that gcc estimates the length of an asm to be the
-number of instruction separators + 1. This means that it estimates the
-asm above to be one instruction long, which is perhaps a little silly
-for an empty string.
-
-But the real problem is that gcc should never trust this estimate anyway,
-since each "instruction" could obviously be a multi-instruction macro.
-gcc should certainly never put asms into delay slots.
-
-FWIW, I don't think the bug is specific to 3.3 or 3.4. It could
-probably trigger for other gcc versions too. It is highly dependent
-on scheduling though.
-
-The attached 3.4.x patch fixes the problem there, but if you want to work
-around it for old versions, just avoid using empty asms if you can,
-or make them volatile if you can't.
-
-Of course, the problem isn't confined to empty asms. If you have an asm
-with a single, multi-instruction macro, gcc might try putting that in a
-delay slot too. You should at least get an assembler warning in that case.
-
-Richard
-
-
---- gcc-3.4.1/gcc/config/mips/mips.md-orig 2004-09-02 10:38:36.000000000 -0500
-+++ gcc-3.4.1/gcc/config/mips/mips.md 2004-09-02 10:38:42.000000000 -0500
-@@ -251,7 +251,7 @@
-
- ;; Can the instruction be put into a delay slot?
- (define_attr "can_delay" "no,yes"
-- (if_then_else (and (eq_attr "type" "!branch,call,jump")
-+ (if_then_else (and (eq_attr "type" "!branch,call,jump,multi")
- (and (eq_attr "hazard" "none")
- (eq_attr "single_insn" "yes")))
- (const_string "yes")
diff --git a/sources/gcc/3.4.2/400-mips-pr17565.patch b/sources/gcc/3.4.2/400-mips-pr17565.patch
new file mode 100644
index 000000000..7ae6aa56f
--- /dev/null
+++ b/sources/gcc/3.4.2/400-mips-pr17565.patch
@@ -0,0 +1,102 @@
+[committed] Fix target/17565: asms in delay slots
+
+ * From: Richard Sandiford <rsandifo at redhat dot com>
+ * To: gcc-patches at gcc dot gnu dot org
+ * Date: Mon, 20 Sep 2004 07:55:58 +0100
+ * Subject: [committed] Fix target/17565: asms in delay slots
+
+The MIPS port was allowing asms to be put into delay slots if the
+compiler guesses they are only one instruction long. This is wrong
+because of the possibility of it containing macros.
+
+The problem can be reproduced as an assembler warning
+in the following testcase:
+
+int foo (int n)
+{
+ register int k asm ("$16") = n;
+ if (k > 0)
+ {
+ bar ();
+ asm ("li %0,0x12345678" : "=r" (k));
+ }
+ return k;
+}
+
+because the multi-instruction asm statement goes into the delay
+slot of the call to bar().
+
+This is reduced from a much more serious linux problem. Linux is fond
+of using empty asm statements, and since gcc estimates empty asms to be
+one instruction long, they too might be put into delay slots. This
+actually has the effect of putting the following instruction into the
+delay slot instead. Since there's no assembler warning, the problem was
+only detected as a run-time failure.
+
+The fix is simple: set the asm value of "can_delay" to "no".
+Tested on mipsisa64-elf, applied to mainline.
+
+This problem goes back to at least 2.95, so it isn't technically a
+regression. On the other hand, it's the kind of bug that could trigger
+for different types of code in different releases, so I'm sure there's
+a testcase that fails (say) in 3.4 and not in 2.95. Will probably ask
+Mark for permission to backport to 3.4.
+
+Richard
+
+
+ PR target/17565
+ * config/mips/mips.md (define_asm_attributes): Set can_delay to no.
+
+testsuite/
+ * gcc.target/mips/asm-1.c: New test.
+
+Index: config/mips/mips.md
+===================================================================
+RCS file: /cvs/gcc/gcc/gcc/config/mips/mips.md,v
+retrieving revision 1.306
+diff -c -p -F^\([(a-zA-Z0-9_]\|#define\) -r1.306 mips.md
+*** gcc/gcc/config/mips/mips.md 13 Sep 2004 19:32:05 -0000 1.306
+--- gcc/gcc/config/mips/mips.md 20 Sep 2004 06:52:31 -0000
+*************** (define_attr "may_clobber_hilo" "no,yes"
+*** 266,272 ****
+
+ ;; Describe a user's asm statement.
+ (define_asm_attributes
+! [(set_attr "type" "multi")])
+
+ ;; .........................
+ ;;
+--- 266,273 ----
+
+ ;; Describe a user's asm statement.
+ (define_asm_attributes
+! [(set_attr "type" "multi")
+! (set_attr "can_delay" "no")])
+
+ ;; .........................
+ ;;
+Index: testsuite/gcc.target/mips/asm-1.c
+===================================================================
+RCS file: testsuite/gcc.target/mips/asm-1.c
+diff -N testsuite/gcc.target/mips/asm-1.c
+*** gcc/gcc/testsuite/gcc.target/mips/asm-1.c 1 Jan 1970 00:00:00 -0000
+--- gcc/gcc/testsuite/gcc.target/mips/asm-1.c 20 Sep 2004 06:52:31 -0000
+***************
+*** 0 ****
+--- 1,14 ----
++ /* PR target/17565. GCC used to put the asm into the delay slot
++ of the call. */
++ /* { dg-do assemble } */
++ /* { dg-options "-O" } */
++ int foo (int n)
++ {
++ register int k asm ("$16") = n;
++ if (k > 0)
++ {
++ bar ();
++ asm ("li %0,0x12345678" : "=r" (k));
++ }
++ return k;
++ }
+
diff --git a/sources/gcc/3.4.2/401-ppc-eabi-typo.patch b/sources/gcc/3.4.2/401-ppc-eabi-typo.patch
new file mode 100644
index 000000000..dbb856868
--- /dev/null
+++ b/sources/gcc/3.4.2/401-ppc-eabi-typo.patch
@@ -0,0 +1,20 @@
+revision 1.12
+date: 2004/07/16 15:13:40; author: segher; state: Exp; lines: +1 -1
+ * config/rs6000/eabi.asm (__eabi_convert): Fix typo (cmpi vs. cmpwi).
+Index: gcc/config/rs6000/eabi.asm
+===================================================================
+RCS file: /cvs/gcc/gcc/gcc/config/rs6000/eabi.asm,v
+retrieving revision 1.11
+retrieving revision 1.12
+diff -u -b -B -w -p -r1.11 -r1.12
+--- gcc/gcc/config/rs6000/eabi.asm 20 Sep 2002 23:46:58 -0000 1.11
++++ gcc/gcc/config/rs6000/eabi.asm 16 Jul 2004 15:13:40 -0000 1.12
+@@ -252,7 +252,7 @@ FUNC_START(__eabi_convert)
+
+ .Lcvt:
+ lwzu 6,4(3) /* pointer to convert */
+- cmpi 0,6,0
++ cmpwi 0,6,0
+ beq- .Lcvt2 /* if pointer is null, don't convert */
+
+ add 6,6,12 /* convert pointer */