diff options
Diffstat (limited to 'target/device/Atmel/arch-avr32/kernel-patches-2.6.24')
5 files changed, 21091 insertions, 0 deletions
diff --git a/target/device/Atmel/arch-avr32/kernel-patches-2.6.24/linux-2.6.24-100-avr32-git.1.patch b/target/device/Atmel/arch-avr32/kernel-patches-2.6.24/linux-2.6.24-100-avr32-git.1.patch new file mode 100644 index 000000000..173000063 --- /dev/null +++ b/target/device/Atmel/arch-avr32/kernel-patches-2.6.24/linux-2.6.24-100-avr32-git.1.patch @@ -0,0 +1,16922 @@ +diff -Nrup linux-2.6.24/arch/arm/mach-at91/at91sam9261_devices.c linux-avr32/arch/arm/mach-at91/at91sam9261_devices.c +--- linux-2.6.24/arch/arm/mach-at91/at91sam9261_devices.c 2008-01-24 17:58:37.000000000 -0500 ++++ linux-avr32/arch/arm/mach-at91/at91sam9261_devices.c 2008-02-01 14:51:35.000000000 -0500 +@@ -530,6 +530,20 @@ void __init at91_add_device_lcdc(struct + at91_set_B_periph(AT91_PIN_PB27, 0); /* LCDD22 */ + at91_set_B_periph(AT91_PIN_PB28, 0); /* LCDD23 */ + ++#ifdef CONFIG_FB_INTSRAM ++ { ++ void __iomem *fb; ++ struct resource *fb_res = &lcdc_resources[2]; ++ size_t fb_len = fb_res->end - fb_res->start + 1; ++ ++ fb = ioremap_writecombine(fb_res->start, fb_len); ++ if (fb) { ++ memset(fb, 0, fb_len); ++ iounmap(fb, fb_len); ++ } ++ } ++#endif ++ + lcdc_data = *data; + platform_device_register(&at91_lcdc_device); + } +diff -Nrup linux-2.6.24/arch/arm/mach-at91/at91sam9rl_devices.c linux-avr32/arch/arm/mach-at91/at91sam9rl_devices.c +--- linux-2.6.24/arch/arm/mach-at91/at91sam9rl_devices.c 2008-01-24 17:58:37.000000000 -0500 ++++ linux-avr32/arch/arm/mach-at91/at91sam9rl_devices.c 2008-02-01 14:51:35.000000000 -0500 +@@ -375,6 +375,20 @@ void __init at91_add_device_lcdc(struct + at91_set_B_periph(AT91_PIN_PC24, 0); /* LCDD22 */ + at91_set_B_periph(AT91_PIN_PC25, 0); /* LCDD23 */ + ++#ifdef CONFIG_FB_INTSRAM ++ { ++ void __iomem *fb; ++ struct resource *fb_res = &lcdc_resources[2]; ++ size_t fb_len = fb_res->end - fb_res->start + 1; ++ ++ fb = ioremap_writecombine(fb_res->start, fb_len); ++ if (fb) { ++ memset(fb, 0, fb_len); ++ iounmap(fb, fb_len); ++ } ++ } ++#endif ++ + lcdc_data = *data; + platform_device_register(&at91_lcdc_device); + } +diff -Nrup linux-2.6.24/arch/avr32/boards/atngw100/Kconfig linux-avr32/arch/avr32/boards/atngw100/Kconfig +--- linux-2.6.24/arch/avr32/boards/atngw100/Kconfig 1969-12-31 19:00:00.000000000 -0500 ++++ linux-avr32/arch/avr32/boards/atngw100/Kconfig 2008-02-01 14:51:35.000000000 -0500 +@@ -0,0 +1,12 @@ ++# NGW100 customization ++ ++config BOARD_ATNGW100_I2C_GPIO ++ bool "Use GPIO for i2c instead of built-in TWI module" ++ help ++ The driver for the built-in TWI module has been plagued by ++ various problems, while the i2c-gpio driver is based on the ++ trusty old i2c-algo-bit bitbanging engine, making it work ++ on pretty much any setup. ++ ++ Choose 'Y' here if you're having i2c-related problems and ++ want to rule out the i2c bus driver. +diff -Nrup linux-2.6.24/arch/avr32/boards/atngw100/setup.c linux-avr32/arch/avr32/boards/atngw100/setup.c +--- linux-2.6.24/arch/avr32/boards/atngw100/setup.c 2008-01-24 17:58:37.000000000 -0500 ++++ linux-avr32/arch/avr32/boards/atngw100/setup.c 2008-02-01 14:51:35.000000000 -0500 +@@ -20,7 +20,7 @@ + #include <asm/io.h> + #include <asm/setup.h> + +-#include <asm/arch/at32ap7000.h> ++#include <asm/arch/at32ap700x.h> + #include <asm/arch/board.h> + #include <asm/arch/init.h> + #include <asm/arch/portmux.h> +@@ -42,6 +42,11 @@ static struct spi_board_info spi0_board_ + }, + }; + ++static struct mci_platform_data __initdata mci0_data = { ++ .detect_pin = GPIO_PIN_PC(25), ++ .wp_pin = GPIO_PIN_PE(0), ++}; ++ + /* + * The next two functions should go away as the boot loader is + * supposed to initialize the macb address registers with a valid +@@ -124,6 +129,7 @@ static struct platform_device ngw_gpio_l + } + }; + ++#ifdef CONFIG_BOARD_ATNGW100_I2C_GPIO + static struct i2c_gpio_platform_data i2c_gpio_data = { + .sda_pin = GPIO_PIN_PA(6), + .scl_pin = GPIO_PIN_PA(7), +@@ -139,6 +145,7 @@ static struct platform_device i2c_gpio_d + .platform_data = &i2c_gpio_data, + }, + }; ++#endif + + static int __init atngw100_init(void) + { +@@ -157,6 +164,7 @@ static int __init atngw100_init(void) + set_hw_addr(at32_add_device_eth(1, ð_data[1])); + + at32_add_device_spi(0, spi0_board_info, ARRAY_SIZE(spi0_board_info)); ++ at32_add_device_mci(0, &mci0_data); + at32_add_device_usba(0, NULL); + + for (i = 0; i < ARRAY_SIZE(ngw_leds); i++) { +@@ -165,11 +173,15 @@ static int __init atngw100_init(void) + } + platform_device_register(&ngw_gpio_leds); + ++#ifdef CONFIG_BOARD_ATNGW100_I2C_GPIO + at32_select_gpio(i2c_gpio_data.sda_pin, + AT32_GPIOF_MULTIDRV | AT32_GPIOF_OUTPUT | AT32_GPIOF_HIGH); + at32_select_gpio(i2c_gpio_data.scl_pin, + AT32_GPIOF_MULTIDRV | AT32_GPIOF_OUTPUT | AT32_GPIOF_HIGH); + platform_device_register(&i2c_gpio_device); ++#else ++ at32_add_device_twi(0); ++#endif + + return 0; + } +diff -Nrup linux-2.6.24/arch/avr32/boards/atstk1000/atstk1000.h linux-avr32/arch/avr32/boards/atstk1000/atstk1000.h +--- linux-2.6.24/arch/avr32/boards/atstk1000/atstk1000.h 2008-01-24 17:58:37.000000000 -0500 ++++ linux-avr32/arch/avr32/boards/atstk1000/atstk1000.h 2008-02-01 14:51:35.000000000 -0500 +@@ -12,4 +12,6 @@ + + extern struct atmel_lcdfb_info atstk1000_lcdc_data; + ++void atstk1000_setup_j2_leds(void); ++ + #endif /* __ARCH_AVR32_BOARDS_ATSTK1000_ATSTK1000_H */ +diff -Nrup linux-2.6.24/arch/avr32/boards/atstk1000/atstk1002.c linux-avr32/arch/avr32/boards/atstk1000/atstk1002.c +--- linux-2.6.24/arch/avr32/boards/atstk1000/atstk1002.c 2008-01-24 17:58:37.000000000 -0500 ++++ linux-avr32/arch/avr32/boards/atstk1000/atstk1002.c 2008-02-01 14:51:35.000000000 -0500 +@@ -11,7 +11,6 @@ + #include <linux/etherdevice.h> + #include <linux/init.h> + #include <linux/kernel.h> +-#include <linux/leds.h> + #include <linux/platform_device.h> + #include <linux/string.h> + #include <linux/types.h> +@@ -22,7 +21,7 @@ + + #include <asm/io.h> + #include <asm/setup.h> +-#include <asm/arch/at32ap7000.h> ++#include <asm/arch/at32ap700x.h> + #include <asm/arch/board.h> + #include <asm/arch/init.h> + #include <asm/arch/portmux.h> +@@ -49,18 +48,16 @@ static struct eth_platform_data __initda + }, + }; + +-#ifndef CONFIG_BOARD_ATSTK1002_SW1_CUSTOM +-#ifndef CONFIG_BOARD_ATSTK1002_SW3_CUSTOM ++#ifdef CONFIG_BOARD_ATSTK1000_EXTDAC + static struct at73c213_board_info at73c213_data = { + .ssc_id = 0, + .shortname = "AVR32 STK1000 external DAC", + }; + #endif +-#endif + +-#ifndef CONFIG_BOARD_ATSTK1002_SW1_CUSTOM ++#ifndef CONFIG_BOARD_ATSTK100X_SW1_CUSTOM + static struct spi_board_info spi0_board_info[] __initdata = { +-#ifndef CONFIG_BOARD_ATSTK1002_SW3_CUSTOM ++#ifdef CONFIG_BOARD_ATSTK1000_EXTDAC + { + /* AT73C213 */ + .modalias = "at73c213", +@@ -80,12 +77,25 @@ static struct spi_board_info spi0_board_ + }; + #endif + +-#ifdef CONFIG_BOARD_ATSTK1002_SPI1 ++#ifdef CONFIG_BOARD_ATSTK100X_SPI1 + static struct spi_board_info spi1_board_info[] __initdata = { { + /* patch in custom entries here */ + } }; + #endif + ++static struct cf_platform_data __initdata cf0_data = { ++#ifdef CONFIG_BOARD_ATSTK1000_CF_HACKS ++ .detect_pin = CONFIG_BOARD_ATSTK1000_CF_DETECT_PIN, ++ .reset_pin = CONFIG_BOARD_ATSTK1000_CF_RESET_PIN, ++#else ++ .detect_pin = GPIO_PIN_NONE, ++ .reset_pin = GPIO_PIN_NONE, ++#endif ++ .vcc_pin = GPIO_PIN_NONE, ++ .ready_pin = GPIO_PIN_PB(27), ++ .cs = 4, ++}; ++ + /* + * The next two functions should go away as the boot loader is + * supposed to initialize the macb address registers with a valid +@@ -141,68 +151,8 @@ static void __init set_hw_addr(struct pl + clk_put(pclk); + } + +-#ifdef CONFIG_BOARD_ATSTK1002_J2_LED +- +-static struct gpio_led stk_j2_led[] = { +-#ifdef CONFIG_BOARD_ATSTK1002_J2_LED8 +-#define LEDSTRING "J2 jumpered to LED8" +- { .name = "led0:amber", .gpio = GPIO_PIN_PB( 8), }, +- { .name = "led1:amber", .gpio = GPIO_PIN_PB( 9), }, +- { .name = "led2:amber", .gpio = GPIO_PIN_PB(10), }, +- { .name = "led3:amber", .gpio = GPIO_PIN_PB(13), }, +- { .name = "led4:amber", .gpio = GPIO_PIN_PB(14), }, +- { .name = "led5:amber", .gpio = GPIO_PIN_PB(15), }, +- { .name = "led6:amber", .gpio = GPIO_PIN_PB(16), }, +- { .name = "led7:amber", .gpio = GPIO_PIN_PB(30), +- .default_trigger = "heartbeat", }, +-#else /* RGB */ +-#define LEDSTRING "J2 jumpered to RGB LEDs" +- { .name = "r1:red", .gpio = GPIO_PIN_PB( 8), }, +- { .name = "g1:green", .gpio = GPIO_PIN_PB(10), }, +- { .name = "b1:blue", .gpio = GPIO_PIN_PB(14), }, +- +- { .name = "r2:red", .gpio = GPIO_PIN_PB( 9), +- .default_trigger = "heartbeat", }, +- { .name = "g2:green", .gpio = GPIO_PIN_PB(13), }, +- { .name = "b2:blue", .gpio = GPIO_PIN_PB(15), +- .default_trigger = "heartbeat", }, +- /* PB16, PB30 unused */ +-#endif +-}; +- +-static struct gpio_led_platform_data stk_j2_led_data = { +- .num_leds = ARRAY_SIZE(stk_j2_led), +- .leds = stk_j2_led, +-}; +- +-static struct platform_device stk_j2_led_dev = { +- .name = "leds-gpio", +- .id = 2, /* gpio block J2 */ +- .dev = { +- .platform_data = &stk_j2_led_data, +- }, +-}; +- +-static void setup_j2_leds(void) +-{ +- unsigned i; +- +- for (i = 0; i < ARRAY_SIZE(stk_j2_led); i++) +- at32_select_gpio(stk_j2_led[i].gpio, AT32_GPIOF_OUTPUT); +- +- printk("STK1002: " LEDSTRING "\n"); +- platform_device_register(&stk_j2_led_dev); +-} +- +-#else +-static void setup_j2_leds(void) +-{ +-} +-#endif +- +-#ifndef CONFIG_BOARD_ATSTK1002_SW1_CUSTOM +-#ifndef CONFIG_BOARD_ATSTK1002_SW3_CUSTOM +-static void __init at73c213_set_clk(struct at73c213_board_info *info) ++#ifdef CONFIG_BOARD_ATSTK1000_EXTDAC ++static void __init atstk1002_setup_extdac(void) + { + struct clk *gclk; + struct clk *pll; +@@ -220,7 +170,7 @@ static void __init at73c213_set_clk(stru + } + + at32_select_periph(GPIO_PIN_PA(30), GPIO_PERIPH_A, 0); +- info->dac_clk = gclk; ++ at73c213_data.dac_clk = gclk; + + err_set_clk: + clk_put(pll); +@@ -229,12 +179,16 @@ err_pll: + err_gclk: + return; + } +-#endif +-#endif ++#else ++static void __init atstk1002_setup_extdac(void) ++{ ++ ++} ++#endif /* CONFIG_BOARD_ATSTK1000_EXTDAC */ + + void __init setup_board(void) + { +-#ifdef CONFIG_BOARD_ATSTK1002_SW2_CUSTOM ++#ifdef CONFIG_BOARD_ATSTK100X_SW2_CUSTOM + at32_map_usart(0, 1); /* USART 0/B: /dev/ttyS1, IRDA */ + #else + at32_map_usart(1, 0); /* USART 1/A: /dev/ttyS0, DB9 */ +@@ -271,7 +225,7 @@ static int __init atstk1002_init(void) + + at32_add_system_devices(); + +-#ifdef CONFIG_BOARD_ATSTK1002_SW2_CUSTOM ++#ifdef CONFIG_BOARD_ATSTK100X_SW2_CUSTOM + at32_add_device_usart(1); + #else + at32_add_device_usart(0); +@@ -281,12 +235,16 @@ static int __init atstk1002_init(void) + #ifndef CONFIG_BOARD_ATSTK1002_SW6_CUSTOM + set_hw_addr(at32_add_device_eth(0, ð_data[0])); + #endif +-#ifndef CONFIG_BOARD_ATSTK1002_SW1_CUSTOM ++#ifndef CONFIG_BOARD_ATSTK100X_SW1_CUSTOM + at32_add_device_spi(0, spi0_board_info, ARRAY_SIZE(spi0_board_info)); + #endif +-#ifdef CONFIG_BOARD_ATSTK1002_SPI1 ++#ifdef CONFIG_BOARD_ATSTK100X_SPI1 + at32_add_device_spi(1, spi1_board_info, ARRAY_SIZE(spi1_board_info)); + #endif ++ at32_add_device_twi(0); ++#ifndef CONFIG_BOARD_ATSTK100X_SW2_CUSTOM ++ at32_add_device_mci(0, NULL); ++#endif + #ifdef CONFIG_BOARD_ATSTK1002_SW5_CUSTOM + set_hw_addr(at32_add_device_eth(1, ð_data[1])); + #else +@@ -294,17 +252,18 @@ static int __init atstk1002_init(void) + fbmem_start, fbmem_size); + #endif + at32_add_device_usba(0, NULL); +-#ifndef CONFIG_BOARD_ATSTK1002_SW3_CUSTOM ++#ifdef CONFIG_BOARD_ATSTK100X_ENABLE_AC97 ++ at32_add_device_ac97c(0); ++#else ++ at32_add_device_abdac(0); ++#endif ++#ifndef CONFIG_BOARD_ATSTK100X_SW3_CUSTOM + at32_add_device_ssc(0, ATMEL_SSC_TX); + #endif ++ at32_add_device_cf(0, 2, &cf0_data); + +- setup_j2_leds(); +- +-#ifndef CONFIG_BOARD_ATSTK1002_SW3_CUSTOM +-#ifndef CONFIG_BOARD_ATSTK1002_SW1_CUSTOM +- at73c213_set_clk(&at73c213_data); +-#endif +-#endif ++ atstk1000_setup_j2_leds(); ++ atstk1002_setup_extdac(); + + return 0; + } +diff -Nrup linux-2.6.24/arch/avr32/boards/atstk1000/atstk1003.c linux-avr32/arch/avr32/boards/atstk1000/atstk1003.c +--- linux-2.6.24/arch/avr32/boards/atstk1000/atstk1003.c 1969-12-31 19:00:00.000000000 -0500 ++++ linux-avr32/arch/avr32/boards/atstk1000/atstk1003.c 2008-02-01 14:51:35.000000000 -0500 +@@ -0,0 +1,181 @@ ++/* ++ * ATSTK1003 daughterboard-specific init code ++ * ++ * Copyright (C) 2007 Atmel Corporation ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation. ++ */ ++#include <linux/clk.h> ++#include <linux/err.h> ++#include <linux/init.h> ++#include <linux/kernel.h> ++#include <linux/platform_device.h> ++#include <linux/string.h> ++#include <linux/types.h> ++ ++#include <linux/spi/at73c213.h> ++#include <linux/spi/spi.h> ++ ++#include <asm/setup.h> ++ ++#include <asm/arch/at32ap700x.h> ++#include <asm/arch/board.h> ++#include <asm/arch/init.h> ++#include <asm/arch/portmux.h> ++ ++#include "atstk1000.h" ++ ++#ifdef CONFIG_BOARD_ATSTK1000_EXTDAC ++static struct at73c213_board_info at73c213_data = { ++ .ssc_id = 0, ++ .shortname = "AVR32 STK1000 external DAC", ++}; ++#endif ++ ++#ifndef CONFIG_BOARD_ATSTK100X_SW1_CUSTOM ++static struct spi_board_info spi0_board_info[] __initdata = { ++#ifdef CONFIG_BOARD_ATSTK1000_EXTDAC ++ { ++ /* AT73C213 */ ++ .modalias = "at73c213", ++ .max_speed_hz = 200000, ++ .chip_select = 0, ++ .mode = SPI_MODE_1, ++ .platform_data = &at73c213_data, ++ }, ++#endif ++ /* ++ * We can control the LTV350QV LCD panel, but it isn't much ++ * point since we don't have an LCD controller... ++ */ ++}; ++#endif ++ ++#ifdef CONFIG_BOARD_ATSTK100X_SPI1 ++static struct spi_board_info spi1_board_info[] __initdata = { { ++ /* patch in custom entries here */ ++} }; ++#endif ++ ++static struct cf_platform_data __initdata cf0_data = { ++#ifdef CONFIG_BOARD_ATSTK1000_CF_HACKS ++ .detect_pin = CONFIG_BOARD_ATSTK1000_CF_DETECT_PIN, ++ .reset_pin = CONFIG_BOARD_ATSTK1000_CF_RESET_PIN, ++#else ++ .detect_pin = GPIO_PIN_NONE, ++ .reset_pin = GPIO_PIN_NONE, ++#endif ++ .vcc_pin = GPIO_PIN_NONE, ++ .ready_pin = GPIO_PIN_PB(27), ++ .cs = 4, ++}; ++ ++#ifdef CONFIG_BOARD_ATSTK1000_EXTDAC ++static void __init atstk1003_setup_extdac(void) ++{ ++ struct clk *gclk; ++ struct clk *pll; ++ ++ gclk = clk_get(NULL, "gclk0"); ++ if (IS_ERR(gclk)) ++ goto err_gclk; ++ pll = clk_get(NULL, "pll0"); ++ if (IS_ERR(pll)) ++ goto err_pll; ++ ++ if (clk_set_parent(gclk, pll)) { ++ pr_debug("STK1000: failed to set pll0 as parent for DAC clock\n"); ++ goto err_set_clk; ++ } ++ ++ at32_select_periph(GPIO_PIN_PA(30), GPIO_PERIPH_A, 0); ++ at73c213_data.dac_clk = gclk; ++ ++err_set_clk: ++ clk_put(pll); ++err_pll: ++ clk_put(gclk); ++err_gclk: ++ return; ++} ++#else ++static void __init atstk1003_setup_extdac(void) ++{ ++ ++} ++#endif /* CONFIG_BOARD_ATSTK1000_EXTDAC */ ++ ++void __init setup_board(void) ++{ ++#ifdef CONFIG_BOARD_ATSTK100X_SW2_CUSTOM ++ at32_map_usart(0, 1); /* USART 0/B: /dev/ttyS1, IRDA */ ++#else ++ at32_map_usart(1, 0); /* USART 1/A: /dev/ttyS0, DB9 */ ++#endif ++ /* USART 2/unused: expansion connector */ ++ at32_map_usart(3, 2); /* USART 3/C: /dev/ttyS2, DB9 */ ++ ++ at32_setup_serial_console(0); ++} ++ ++static int __init atstk1003_init(void) ++{ ++ /* ++ * ATSTK1000 uses 32-bit SDRAM interface. Reserve the ++ * SDRAM-specific pins so that nobody messes with them. ++ */ ++ at32_reserve_pin(GPIO_PIN_PE(0)); /* DATA[16] */ ++ at32_reserve_pin(GPIO_PIN_PE(1)); /* DATA[17] */ ++ at32_reserve_pin(GPIO_PIN_PE(2)); /* DATA[18] */ ++ at32_reserve_pin(GPIO_PIN_PE(3)); /* DATA[19] */ ++ at32_reserve_pin(GPIO_PIN_PE(4)); /* DATA[20] */ ++ at32_reserve_pin(GPIO_PIN_PE(5)); /* DATA[21] */ ++ at32_reserve_pin(GPIO_PIN_PE(6)); /* DATA[22] */ ++ at32_reserve_pin(GPIO_PIN_PE(7)); /* DATA[23] */ ++ at32_reserve_pin(GPIO_PIN_PE(8)); /* DATA[24] */ ++ at32_reserve_pin(GPIO_PIN_PE(9)); /* DATA[25] */ ++ at32_reserve_pin(GPIO_PIN_PE(10)); /* DATA[26] */ ++ at32_reserve_pin(GPIO_PIN_PE(11)); /* DATA[27] */ ++ at32_reserve_pin(GPIO_PIN_PE(12)); /* DATA[28] */ ++ at32_reserve_pin(GPIO_PIN_PE(13)); /* DATA[29] */ ++ at32_reserve_pin(GPIO_PIN_PE(14)); /* DATA[30] */ ++ at32_reserve_pin(GPIO_PIN_PE(15)); /* DATA[31] */ ++ at32_reserve_pin(GPIO_PIN_PE(26)); /* SDCS */ ++ ++ at32_add_system_devices(); ++ ++#ifdef CONFIG_BOARD_ATSTK100X_SW2_CUSTOM ++ at32_add_device_usart(1); ++#else ++ at32_add_device_usart(0); ++#endif ++ at32_add_device_usart(2); ++ ++#ifndef CONFIG_BOARD_ATSTK100X_SW1_CUSTOM ++ at32_add_device_spi(0, spi0_board_info, ARRAY_SIZE(spi0_board_info)); ++#endif ++#ifdef CONFIG_BOARD_ATSTK100X_SPI1 ++ at32_add_device_spi(1, spi1_board_info, ARRAY_SIZE(spi1_board_info)); ++#endif ++#ifndef CONFIG_BOARD_ATSTK100X_SW2_CUSTOM ++ at32_add_device_mci(0, NULL); ++#endif ++ at32_add_device_usba(0, NULL); ++#ifdef CONFIG_BOARD_ATSTK100X_ENABLE_AC97 ++ at32_add_device_ac97c(0); ++#else ++ at32_add_device_abdac(0); ++#endif ++#ifndef CONFIG_BOARD_ATSTK100X_SW3_CUSTOM ++ at32_add_device_ssc(0, ATMEL_SSC_TX); ++#endif ++ at32_add_device_cf(0, 2, &cf0_data); ++ ++ atstk1000_setup_j2_leds(); ++ atstk1003_setup_extdac(); ++ ++ return 0; ++} ++postcore_initcall(atstk1003_init); +diff -Nrup linux-2.6.24/arch/avr32/boards/atstk1000/atstk1004.c linux-avr32/arch/avr32/boards/atstk1000/atstk1004.c +--- linux-2.6.24/arch/avr32/boards/atstk1000/atstk1004.c 1969-12-31 19:00:00.000000000 -0500 ++++ linux-avr32/arch/avr32/boards/atstk1000/atstk1004.c 2008-02-01 14:51:35.000000000 -0500 +@@ -0,0 +1,152 @@ ++/* ++ * ATSTK1003 daughterboard-specific init code ++ * ++ * Copyright (C) 2007 Atmel Corporation ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation. ++ */ ++#include <linux/clk.h> ++#include <linux/err.h> ++#include <linux/init.h> ++#include <linux/kernel.h> ++#include <linux/platform_device.h> ++#include <linux/string.h> ++#include <linux/types.h> ++ ++#include <linux/spi/at73c213.h> ++#include <linux/spi/spi.h> ++ ++#include <video/atmel_lcdc.h> ++ ++#include <asm/setup.h> ++ ++#include <asm/arch/at32ap700x.h> ++#include <asm/arch/board.h> ++#include <asm/arch/init.h> ++#include <asm/arch/portmux.h> ++ ++#include "atstk1000.h" ++ ++#ifdef CONFIG_BOARD_ATSTK1000_EXTDAC ++static struct at73c213_board_info at73c213_data = { ++ .ssc_id = 0, ++ .shortname = "AVR32 STK1000 external DAC", ++}; ++#endif ++ ++#ifndef CONFIG_BOARD_ATSTK100X_SW1_CUSTOM ++static struct spi_board_info spi0_board_info[] __initdata = { ++#ifdef CONFIG_BOARD_ATSTK1000_EXTDAC ++ { ++ /* AT73C213 */ ++ .modalias = "at73c213", ++ .max_speed_hz = 200000, ++ .chip_select = 0, ++ .mode = SPI_MODE_1, ++ .platform_data = &at73c213_data, ++ }, ++#endif ++ { ++ /* QVGA display */ ++ .modalias = "ltv350qv", ++ .max_speed_hz = 16000000, ++ .chip_select = 1, ++ .mode = SPI_MODE_3, ++ }, ++}; ++#endif ++ ++#ifdef CONFIG_BOARD_ATSTK100X_SPI1 ++static struct spi_board_info spi1_board_info[] __initdata = { { ++ /* patch in custom entries here */ ++} }; ++#endif ++ ++#ifdef CONFIG_BOARD_ATSTK1000_EXTDAC ++static void __init atstk1004_setup_extdac(void) ++{ ++ struct clk *gclk; ++ struct clk *pll; ++ ++ gclk = clk_get(NULL, "gclk0"); ++ if (IS_ERR(gclk)) ++ goto err_gclk; ++ pll = clk_get(NULL, "pll0"); ++ if (IS_ERR(pll)) ++ goto err_pll; ++ ++ if (clk_set_parent(gclk, pll)) { ++ pr_debug("STK1000: failed to set pll0 as parent for DAC clock\n"); ++ goto err_set_clk; ++ } ++ ++ at32_select_periph(GPIO_PIN_PA(30), GPIO_PERIPH_A, 0); ++ at73c213_data.dac_clk = gclk; ++ ++err_set_clk: ++ clk_put(pll); ++err_pll: ++ clk_put(gclk); ++err_gclk: ++ return; ++} ++#else ++static void __init atstk1004_setup_extdac(void) ++{ ++ ++} ++#endif /* CONFIG_BOARD_ATSTK1000_EXTDAC */ ++ ++void __init setup_board(void) ++{ ++#ifdef CONFIG_BOARD_ATSTK100X_SW2_CUSTOM ++ at32_map_usart(0, 1); /* USART 0/B: /dev/ttyS1, IRDA */ ++#else ++ at32_map_usart(1, 0); /* USART 1/A: /dev/ttyS0, DB9 */ ++#endif ++ /* USART 2/unused: expansion connector */ ++ at32_map_usart(3, 2); /* USART 3/C: /dev/ttyS2, DB9 */ ++ ++ at32_setup_serial_console(0); ++} ++ ++static int __init atstk1004_init(void) ++{ ++ at32_add_system_devices(); ++ ++#ifdef CONFIG_BOARD_ATSTK100X_SW2_CUSTOM ++ at32_add_device_usart(1); ++#else ++ at32_add_device_usart(0); ++#endif ++ at32_add_device_usart(2); ++ ++#ifndef CONFIG_BOARD_ATSTK100X_SW1_CUSTOM ++ at32_add_device_spi(0, spi0_board_info, ARRAY_SIZE(spi0_board_info)); ++#endif ++#ifdef CONFIG_BOARD_ATSTK100X_SPI1 ++ at32_add_device_spi(1, spi1_board_info, ARRAY_SIZE(spi1_board_info)); ++#endif ++#ifndef CONFIG_BOARD_ATSTK100X_SW2_CUSTOM ++ at32_add_device_mci(0, NULL); ++#endif ++ at32_add_device_lcdc(0, &atstk1000_lcdc_data, ++ fbmem_start, fbmem_size); ++ at32_add_device_usba(0, NULL); ++#ifdef CONFIG_BOARD_ATSTK100X_ENABLE_AC97 ++ at32_add_device_ac97c(0); ++#else ++ at32_add_device_abdac(0); ++#endif ++#ifndef CONFIG_BOARD_ATSTK100X_SW3_CUSTOM ++ at32_add_device_ssc(0, ATMEL_SSC_TX); ++#endif ++ ++ atstk1000_setup_j2_leds(); ++ atstk1004_setup_extdac(); ++ ++ return 0; ++} ++postcore_initcall(atstk1004_init); +diff -Nrup linux-2.6.24/arch/avr32/boards/atstk1000/Kconfig linux-avr32/arch/avr32/boards/atstk1000/Kconfig +--- linux-2.6.24/arch/avr32/boards/atstk1000/Kconfig 2008-01-24 17:58:37.000000000 -0500 ++++ linux-avr32/arch/avr32/boards/atstk1000/Kconfig 2008-02-01 14:51:35.000000000 -0500 +@@ -1,34 +1,53 @@ + # STK1000 customization + +-if BOARD_ATSTK1002 ++if BOARD_ATSTK1000 + +-config BOARD_ATSTK1002_CUSTOM +- bool "Non-default STK-1002 jumper settings" ++choice ++ prompt "ATSTK1000 CPU daughterboard type" ++ default BOARD_ATSTK1002 ++ ++config BOARD_ATSTK1002 ++ bool "ATSTK1002" ++ select CPU_AT32AP7000 ++ ++config BOARD_ATSTK1003 ++ bool "ATSTK1003" ++ select CPU_AT32AP7001 ++ ++config BOARD_ATSTK1004 ++ bool "ATSTK1004" ++ select CPU_AT32AP7002 ++ ++endchoice ++ ++ ++config BOARD_ATSTK100X_CUSTOM ++ bool "Non-default STK1002/STK1003/STK1004 jumper settings" + help + You will normally leave the jumpers on the CPU card at their + default settings. If you need to use certain peripherals, + you will need to change some of those jumpers. + +-if BOARD_ATSTK1002_CUSTOM ++if BOARD_ATSTK100X_CUSTOM + +-config BOARD_ATSTK1002_SW1_CUSTOM ++config BOARD_ATSTK100X_SW1_CUSTOM + bool "SW1: use SSC1 (not SPI0)" + help + This also prevents using the external DAC as an audio interface, + and means you can't initialize the on-board QVGA display. + +-config BOARD_ATSTK1002_SW2_CUSTOM ++config BOARD_ATSTK100X_SW2_CUSTOM + bool "SW2: use IRDA or TIMER0 (not UART-A, MMC/SD, and PS2-A)" + help + If you change this you'll want an updated boot loader putting + the console on UART-C not UART-A. + +-config BOARD_ATSTK1002_SW3_CUSTOM ++config BOARD_ATSTK100X_SW3_CUSTOM + bool "SW3: use TIMER1 (not SSC0 and GCLK)" + help + This also prevents using the external DAC as an audio interface. + +-config BOARD_ATSTK1002_SW4_CUSTOM ++config BOARD_ATSTK100X_SW4_CUSTOM + bool "SW4: use ISI/Camera (not GPIOs, SPI1, and PS2-B)" + help + To use the camera interface you'll need a custom card (on the +@@ -36,27 +55,29 @@ config BOARD_ATSTK1002_SW4_CUSTOM + + config BOARD_ATSTK1002_SW5_CUSTOM + bool "SW5: use MACB1 (not LCDC)" ++ depends on BOARD_ATSTK1002 + + config BOARD_ATSTK1002_SW6_CUSTOM + bool "SW6: more GPIOs (not MACB0)" ++ depends on BOARD_ATSTK1002 + + endif # custom + +-config BOARD_ATSTK1002_SPI1 ++config BOARD_ATSTK100X_SPI1 + bool "Configure SPI1 controller" +- depends on !BOARD_ATSTK1002_SW4_CUSTOM ++ depends on !BOARD_ATSTK100X_SW4_CUSTOM + help + All the signals for the second SPI controller are available on + GPIO lines and accessed through the J1 jumper block. Say "y" + here to configure that SPI controller. + +-config BOARD_ATSTK1002_J2_LED ++config BOARD_ATSTK1000_J2_LED + bool +- default BOARD_ATSTK1002_J2_LED8 || BOARD_ATSTK1002_J2_RGB ++ default BOARD_ATSTK1000_J2_LED8 || BOARD_ATSTK1000_J2_RGB + + choice + prompt "LEDs connected to J2:" +- depends on LEDS_GPIO && !BOARD_ATSTK1002_SW4_CUSTOM ++ depends on LEDS_GPIO && !BOARD_ATSTK100X_SW4_CUSTOM + optional + help + Select this if you have jumpered the J2 jumper block to the +@@ -64,16 +85,64 @@ choice + IDC cable. A default "heartbeat" trigger is provided, but + you can of course override this. + +-config BOARD_ATSTK1002_J2_LED8 ++config BOARD_ATSTK1000_J2_LED8 + bool "LED0..LED7" + help + Select this if J2 is jumpered to LED0..LED7 amber leds. + +-config BOARD_ATSTK1002_J2_RGB ++config BOARD_ATSTK1000_J2_RGB + bool "RGB leds" + help + Select this if J2 is jumpered to the RGB leds. + + endchoice + +-endif # stk 1002 ++config BOARD_ATSTK1000_EXTDAC ++ bool ++ depends on !BOARD_ATSTK100X_SW1_CUSTOM && !BOARD_ATSTK100X_SW3_CUSTOM ++ default y ++ ++config BOARD_ATSTK100X_ENABLE_AC97 ++ bool "Use AC97C instead of ABDAC" ++ help ++ Select this if you want to use the built-in AC97 controller ++ instead of the built-in Audio Bitstream DAC. These share ++ the same I/O pins on the AP7000, so both can't be enabled ++ at the same time. ++ ++ Note that the STK1000 kit doesn't ship with an AC97 codec on ++ board, so say N unless you've got an expansion board with an ++ AC97 codec on it that you want to use. ++ ++config BOARD_ATSTK1000_CF_HACKS ++ bool "ATSTK1000 CompactFlash hacks" ++ depends on !BOARD_ATSTK100X_SW4_CUSTOM ++ help ++ Select this if you have re-routed the CompactFlash RESET and ++ CD signals to GPIOs on your STK1000. This is necessary for ++ reset and card detection to work properly, although some CF ++ cards may be able to cope without reset. ++ ++config BOARD_ATSTK1000_CF_RESET_PIN ++ hex "CompactFlash RESET pin" ++ default 0x30 ++ depends on BOARD_ATSTK1000_CF_HACKS ++ help ++ Select which GPIO pin to use for the CompactFlash RESET ++ signal. This is specified as a hexadecimal number and should ++ be defined as 0x20 * gpio_port + pin. ++ ++ The default is 0x30, which is pin 16 on PIOB, aka GPIO14. ++ ++config BOARD_ATSTK1000_CF_DETECT_PIN ++ hex "CompactFlash DETECT pin" ++ default 0x3e ++ depends on BOARD_ATSTK1000_CF_HACKS ++ help ++ Select which GPIO pin to use for the CompactFlash CD ++ signal. This is specified as a hexadecimal number and should ++ be defined as 0x20 * gpio_port + pin. ++ ++ The default is 0x3e, which is pin 30 on PIOB, aka GPIO15. ++ ++endif # stk 1000 +diff -Nrup linux-2.6.24/arch/avr32/boards/atstk1000/Makefile linux-avr32/arch/avr32/boards/atstk1000/Makefile +--- linux-2.6.24/arch/avr32/boards/atstk1000/Makefile 2008-01-24 17:58:37.000000000 -0500 ++++ linux-avr32/arch/avr32/boards/atstk1000/Makefile 2008-02-01 14:51:35.000000000 -0500 +@@ -1,2 +1,4 @@ + obj-y += setup.o flash.o + obj-$(CONFIG_BOARD_ATSTK1002) += atstk1002.o ++obj-$(CONFIG_BOARD_ATSTK1003) += atstk1003.o ++obj-$(CONFIG_BOARD_ATSTK1004) += atstk1004.o +diff -Nrup linux-2.6.24/arch/avr32/boards/atstk1000/setup.c linux-avr32/arch/avr32/boards/atstk1000/setup.c +--- linux-2.6.24/arch/avr32/boards/atstk1000/setup.c 2008-01-24 17:58:37.000000000 -0500 ++++ linux-avr32/arch/avr32/boards/atstk1000/setup.c 2008-02-01 14:51:35.000000000 -0500 +@@ -10,13 +10,17 @@ + #include <linux/bootmem.h> + #include <linux/fb.h> + #include <linux/init.h> ++#include <linux/platform_device.h> + #include <linux/types.h> + #include <linux/linkage.h> + + #include <video/atmel_lcdc.h> + + #include <asm/setup.h> ++ ++#include <asm/arch/at32ap700x.h> + #include <asm/arch/board.h> ++#include <asm/arch/portmux.h> + + #include "atstk1000.h" + +@@ -61,3 +65,63 @@ struct atmel_lcdfb_info __initdata atstk + .default_monspecs = &atstk1000_default_monspecs, + .guard_time = 2, + }; ++ ++#ifdef CONFIG_BOARD_ATSTK1000_J2_LED ++#include <linux/leds.h> ++ ++static struct gpio_led stk1000_j2_led[] = { ++#ifdef CONFIG_BOARD_ATSTK1000_J2_LED8 ++#define LEDSTRING "J2 jumpered to LED8" ++ { .name = "led0:amber", .gpio = GPIO_PIN_PB( 8), }, ++ { .name = "led1:amber", .gpio = GPIO_PIN_PB( 9), }, ++ { .name = "led2:amber", .gpio = GPIO_PIN_PB(10), }, ++ { .name = "led3:amber", .gpio = GPIO_PIN_PB(13), }, ++ { .name = "led4:amber", .gpio = GPIO_PIN_PB(14), }, ++ { .name = "led5:amber", .gpio = GPIO_PIN_PB(15), }, ++ { .name = "led6:amber", .gpio = GPIO_PIN_PB(16), }, ++ { .name = "led7:amber", .gpio = GPIO_PIN_PB(30), ++ .default_trigger = "heartbeat", }, ++#else /* RGB */ ++#define LEDSTRING "J2 jumpered to RGB LEDs" ++ { .name = "r1:red", .gpio = GPIO_PIN_PB( 8), }, ++ { .name = "g1:green", .gpio = GPIO_PIN_PB(10), }, ++ { .name = "b1:blue", .gpio = GPIO_PIN_PB(14), }, ++ ++ { .name = "r2:red", .gpio = GPIO_PIN_PB( 9), ++ .default_trigger = "heartbeat", }, ++ { .name = "g2:green", .gpio = GPIO_PIN_PB(13), }, ++ { .name = "b2:blue", .gpio = GPIO_PIN_PB(15), ++ .default_trigger = "heartbeat", }, ++ /* PB16, PB30 unused */ ++#endif ++}; ++ ++static struct gpio_led_platform_data stk1000_j2_led_data = { ++ .num_leds = ARRAY_SIZE(stk1000_j2_led), ++ .leds = stk1000_j2_led, ++}; ++ ++static struct platform_device stk1000_j2_led_dev = { ++ .name = "leds-gpio", ++ .id = 2, /* gpio block J2 */ ++ .dev = { ++ .platform_data = &stk1000_j2_led_data, ++ }, ++}; ++ ++void __init atstk1000_setup_j2_leds(void) ++{ ++ unsigned i; ++ ++ for (i = 0; i < ARRAY_SIZE(stk1000_j2_led); i++) ++ at32_select_gpio(stk1000_j2_led[i].gpio, AT32_GPIOF_OUTPUT); ++ ++ printk("STK1000: " LEDSTRING "\n"); ++ platform_device_register(&stk1000_j2_led_dev); ++} ++#else /* CONFIG_BOARD_ATSTK1000_J2_LED */ ++void __init atstk1000_setup_j2_leds(void) ++{ ++ ++} ++#endif /* CONFIG_BOARD_ATSTK1000_J2_LED */ +diff -Nrup linux-2.6.24/arch/avr32/configs/atngw100_defconfig linux-avr32/arch/avr32/configs/atngw100_defconfig +--- linux-2.6.24/arch/avr32/configs/atngw100_defconfig 2008-01-24 17:58:37.000000000 -0500 ++++ linux-avr32/arch/avr32/configs/atngw100_defconfig 2008-02-01 14:51:35.000000000 -0500 +@@ -1,46 +1,51 @@ + # + # Automatically generated make config: don't edit +-# Linux kernel version: 2.6.22-rc5 +-# Sat Jun 23 15:40:05 2007 ++# Linux kernel version: 2.6.24-rc7 ++# Wed Jan 9 23:20:41 2008 + # + CONFIG_AVR32=y + CONFIG_GENERIC_GPIO=y + CONFIG_GENERIC_HARDIRQS=y ++CONFIG_STACKTRACE_SUPPORT=y ++CONFIG_LOCKDEP_SUPPORT=y ++CONFIG_TRACE_IRQFLAGS_SUPPORT=y + CONFIG_HARDIRQS_SW_RESEND=y + CONFIG_GENERIC_IRQ_PROBE=y + CONFIG_RWSEM_GENERIC_SPINLOCK=y + CONFIG_GENERIC_TIME=y ++# CONFIG_RWSEM_XCHGADD_ALGORITHM is not set + # CONFIG_ARCH_HAS_ILOG2_U32 is not set + # CONFIG_ARCH_HAS_ILOG2_U64 is not set ++CONFIG_ARCH_SUPPORTS_OPROFILE=y + CONFIG_GENERIC_HWEIGHT=y + CONFIG_GENERIC_CALIBRATE_DELAY=y + CONFIG_GENERIC_BUG=y + CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" + + # +-# Code maturity level options ++# General setup + # + CONFIG_EXPERIMENTAL=y + CONFIG_BROKEN_ON_SMP=y + CONFIG_INIT_ENV_ARG_LIMIT=32 +- +-# +-# General setup +-# + CONFIG_LOCALVERSION="" + # CONFIG_LOCALVERSION_AUTO is not set + CONFIG_SWAP=y + CONFIG_SYSVIPC=y +-# CONFIG_IPC_NS is not set + CONFIG_SYSVIPC_SYSCTL=y + CONFIG_POSIX_MQUEUE=y + CONFIG_BSD_PROCESS_ACCT=y + CONFIG_BSD_PROCESS_ACCT_V3=y + # CONFIG_TASKSTATS is not set +-# CONFIG_UTS_NS is not set ++# CONFIG_USER_NS is not set ++# CONFIG_PID_NS is not set + # CONFIG_AUDIT is not set + # CONFIG_IKCONFIG is not set + CONFIG_LOG_BUF_SHIFT=14 ++# CONFIG_CGROUPS is not set ++CONFIG_FAIR_GROUP_SCHED=y ++CONFIG_FAIR_USER_SCHED=y ++# CONFIG_FAIR_CGROUP_SCHED is not set + CONFIG_SYSFS_DEPRECATED=y + # CONFIG_RELAY is not set + CONFIG_BLK_DEV_INITRD=y +@@ -61,35 +66,28 @@ CONFIG_FUTEX=y + CONFIG_ANON_INODES=y + CONFIG_EPOLL=y + CONFIG_SIGNALFD=y +-CONFIG_TIMERFD=y + CONFIG_EVENTFD=y + CONFIG_SHMEM=y + CONFIG_VM_EVENT_COUNTERS=y +-# CONFIG_SLUB_DEBUG is not set ++CONFIG_SLUB_DEBUG=y + # CONFIG_SLAB is not set + CONFIG_SLUB=y + # CONFIG_SLOB is not set ++CONFIG_SLABINFO=y + CONFIG_RT_MUTEXES=y + # CONFIG_TINY_SHMEM is not set + CONFIG_BASE_SMALL=1 +- +-# +-# Loadable module support +-# + CONFIG_MODULES=y + CONFIG_MODULE_UNLOAD=y + CONFIG_MODULE_FORCE_UNLOAD=y + # CONFIG_MODVERSIONS is not set + # CONFIG_MODULE_SRCVERSION_ALL is not set + CONFIG_KMOD=y +- +-# +-# Block layer +-# + CONFIG_BLOCK=y + # CONFIG_LBD is not set + # CONFIG_BLK_DEV_IO_TRACE is not set + # CONFIG_LSF is not set ++# CONFIG_BLK_DEV_BSG is not set + + # + # IO Schedulers +@@ -111,6 +109,7 @@ CONFIG_SUBARCH_AVR32B=y + CONFIG_MMU=y + CONFIG_PERFORMANCE_COUNTERS=y + CONFIG_PLATFORM_AT32AP=y ++CONFIG_CPU_AT32AP700X=y + CONFIG_CPU_AT32AP7000=y + # CONFIG_BOARD_ATSTK1000 is not set + CONFIG_BOARD_ATNGW100=y +@@ -119,9 +118,9 @@ CONFIG_LOADER_U_BOOT=y + # + # Atmel AVR32 AP options + # +-# CONFIG_AP7000_32_BIT_SMC is not set +-CONFIG_AP7000_16_BIT_SMC=y +-# CONFIG_AP7000_8_BIT_SMC is not set ++# CONFIG_AP700X_32_BIT_SMC is not set ++CONFIG_AP700X_16_BIT_SMC=y ++# CONFIG_AP700X_8_BIT_SMC is not set + CONFIG_LOAD_ADDRESS=0x10000000 + CONFIG_ENTRY_ADDRESS=0x90000000 + CONFIG_PHYS_OFFSET=0x10000000 +@@ -141,9 +140,11 @@ CONFIG_FLATMEM_MANUAL=y + CONFIG_FLATMEM=y + CONFIG_FLAT_NODE_MEM_MAP=y + # CONFIG_SPARSEMEM_STATIC is not set ++# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set + CONFIG_SPLIT_PTLOCK_CPUS=4 + # CONFIG_RESOURCES_64BIT is not set + CONFIG_ZONE_DMA_FLAG=0 ++CONFIG_VIRT_TO_BUS=y + # CONFIG_OWNERSHIP_TRACE is not set + # CONFIG_HZ_100 is not set + CONFIG_HZ_250=y +@@ -153,13 +154,31 @@ CONFIG_HZ=250 + CONFIG_CMDLINE="" + + # +-# Bus options ++# Power management options + # +-# CONFIG_ARCH_SUPPORTS_MSI is not set + + # +-# PCCARD (PCMCIA/CardBus) support ++# CPU Frequency scaling ++# ++CONFIG_CPU_FREQ=y ++CONFIG_CPU_FREQ_TABLE=y ++# CONFIG_CPU_FREQ_DEBUG is not set ++# CONFIG_CPU_FREQ_STAT is not set ++CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y ++# CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set ++# CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND is not set ++# CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set ++CONFIG_CPU_FREQ_GOV_PERFORMANCE=y ++# CONFIG_CPU_FREQ_GOV_POWERSAVE is not set ++CONFIG_CPU_FREQ_GOV_USERSPACE=y ++CONFIG_CPU_FREQ_GOV_ONDEMAND=y ++# CONFIG_CPU_FREQ_GOV_CONSERVATIVE is not set ++CONFIG_CPU_FREQ_AT32AP=y ++ ++# ++# Bus options + # ++# CONFIG_ARCH_SUPPORTS_MSI is not set + # CONFIG_PCCARD is not set + + # +@@ -213,6 +232,7 @@ CONFIG_INET_TUNNEL=y + CONFIG_INET_XFRM_MODE_TRANSPORT=y + CONFIG_INET_XFRM_MODE_TUNNEL=y + CONFIG_INET_XFRM_MODE_BEET=y ++# CONFIG_INET_LRO is not set + CONFIG_INET_DIAG=y + CONFIG_INET_TCP_DIAG=y + # CONFIG_TCP_CONG_ADVANCED is not set +@@ -240,6 +260,7 @@ CONFIG_IPV6_SIT=y + # CONFIG_NETWORK_SECMARK is not set + CONFIG_NETFILTER=y + # CONFIG_NETFILTER_DEBUG is not set ++CONFIG_BRIDGE_NETFILTER=y + + # + # Core Netfilter Configuration +@@ -252,6 +273,7 @@ CONFIG_NF_CONNTRACK_MARK=y + # CONFIG_NF_CONNTRACK_EVENTS is not set + CONFIG_NF_CT_PROTO_GRE=m + # CONFIG_NF_CT_PROTO_SCTP is not set ++# CONFIG_NF_CT_PROTO_UDPLITE is not set + CONFIG_NF_CONNTRACK_AMANDA=m + CONFIG_NF_CONNTRACK_FTP=m + CONFIG_NF_CONNTRACK_H323=m +@@ -269,9 +291,11 @@ CONFIG_NETFILTER_XT_TARGET_MARK=m + CONFIG_NETFILTER_XT_TARGET_NFQUEUE=m + CONFIG_NETFILTER_XT_TARGET_NFLOG=m + # CONFIG_NETFILTER_XT_TARGET_NOTRACK is not set ++# CONFIG_NETFILTER_XT_TARGET_TRACE is not set + CONFIG_NETFILTER_XT_TARGET_TCPMSS=m + CONFIG_NETFILTER_XT_MATCH_COMMENT=m + CONFIG_NETFILTER_XT_MATCH_CONNBYTES=m ++# CONFIG_NETFILTER_XT_MATCH_CONNLIMIT is not set + CONFIG_NETFILTER_XT_MATCH_CONNMARK=m + CONFIG_NETFILTER_XT_MATCH_CONNTRACK=m + # CONFIG_NETFILTER_XT_MATCH_DCCP is not set +@@ -284,6 +308,7 @@ CONFIG_NETFILTER_XT_MATCH_MAC=m + CONFIG_NETFILTER_XT_MATCH_MARK=m + CONFIG_NETFILTER_XT_MATCH_POLICY=m + CONFIG_NETFILTER_XT_MATCH_MULTIPORT=m ++# CONFIG_NETFILTER_XT_MATCH_PHYSDEV is not set + CONFIG_NETFILTER_XT_MATCH_PKTTYPE=m + CONFIG_NETFILTER_XT_MATCH_QUOTA=m + CONFIG_NETFILTER_XT_MATCH_REALM=m +@@ -292,6 +317,8 @@ CONFIG_NETFILTER_XT_MATCH_STATE=m + CONFIG_NETFILTER_XT_MATCH_STATISTIC=m + CONFIG_NETFILTER_XT_MATCH_STRING=m + CONFIG_NETFILTER_XT_MATCH_TCPMSS=m ++# CONFIG_NETFILTER_XT_MATCH_TIME is not set ++# CONFIG_NETFILTER_XT_MATCH_U32 is not set + CONFIG_NETFILTER_XT_MATCH_HASHLIMIT=m + + # +@@ -359,13 +386,19 @@ CONFIG_IP6_NF_TARGET_REJECT=m + CONFIG_IP6_NF_MANGLE=m + CONFIG_IP6_NF_TARGET_HL=m + CONFIG_IP6_NF_RAW=m ++ ++# ++# Bridge: Netfilter Configuration ++# ++# CONFIG_BRIDGE_NF_EBTABLES is not set + # CONFIG_IP_DCCP is not set + # CONFIG_IP_SCTP is not set + # CONFIG_TIPC is not set + # CONFIG_ATM is not set +-# CONFIG_BRIDGE is not set ++CONFIG_BRIDGE=m + CONFIG_VLAN_8021Q=m + # CONFIG_DECNET is not set ++CONFIG_LLC=m + # CONFIG_LLC2 is not set + # CONFIG_IPX is not set + # CONFIG_ATALK is not set +@@ -373,10 +406,6 @@ CONFIG_VLAN_8021Q=m + # CONFIG_LAPB is not set + # CONFIG_ECONET is not set + # CONFIG_WAN_ROUTER is not set +- +-# +-# QoS and/or fair queueing +-# + # CONFIG_NET_SCHED is not set + CONFIG_NET_CLS_ROUTE=y + +@@ -384,6 +413,7 @@ CONFIG_NET_CLS_ROUTE=y + # Network testing + # + # CONFIG_NET_PKTGEN is not set ++# CONFIG_NET_TCPPROBE is not set + # CONFIG_HAMRADIO is not set + # CONFIG_IRDA is not set + # CONFIG_BT is not set +@@ -397,6 +427,7 @@ CONFIG_NET_CLS_ROUTE=y + # CONFIG_MAC80211 is not set + # CONFIG_IEEE80211 is not set + # CONFIG_RFKILL is not set ++# CONFIG_NET_9P is not set + + # + # Device Drivers +@@ -405,16 +436,13 @@ CONFIG_NET_CLS_ROUTE=y + # + # Generic Driver Options + # ++CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" + CONFIG_STANDALONE=y + # CONFIG_PREVENT_FIRMWARE_BUILD is not set + # CONFIG_FW_LOADER is not set + # CONFIG_DEBUG_DRIVER is not set + # CONFIG_DEBUG_DEVRES is not set + # CONFIG_SYS_HYPERVISOR is not set +- +-# +-# Connector - unified userspace <-> kernelspace linker +-# + # CONFIG_CONNECTOR is not set + CONFIG_MTD=y + # CONFIG_MTD_DEBUG is not set +@@ -434,6 +462,7 @@ CONFIG_MTD_BLOCK=y + # CONFIG_INFTL is not set + # CONFIG_RFD_FTL is not set + # CONFIG_SSFDC is not set ++# CONFIG_MTD_OOPS is not set + + # + # RAM/ROM/Flash chip drivers +@@ -493,20 +522,8 @@ CONFIG_MTD_DATAFLASH=y + # UBI - Unsorted block images + # + # CONFIG_MTD_UBI is not set +- +-# +-# Parallel port support +-# + # CONFIG_PARPORT is not set +- +-# +-# Plug and Play support +-# +-# CONFIG_PNPACPI is not set +- +-# +-# Block devices +-# ++CONFIG_BLK_DEV=y + # CONFIG_BLK_DEV_COW_COMMON is not set + CONFIG_BLK_DEV_LOOP=m + # CONFIG_BLK_DEV_CRYPTOLOOP is not set +@@ -517,11 +534,7 @@ CONFIG_BLK_DEV_RAM_SIZE=4096 + CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024 + # CONFIG_CDROM_PKTCDVD is not set + # CONFIG_ATA_OVER_ETH is not set +- +-# +-# Misc devices +-# +-# CONFIG_BLINK is not set ++# CONFIG_MISC_DEVICES is not set + # CONFIG_IDE is not set + + # +@@ -529,30 +542,42 @@ CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024 + # + # CONFIG_RAID_ATTRS is not set + # CONFIG_SCSI is not set ++# CONFIG_SCSI_DMA is not set + # CONFIG_SCSI_NETLINK is not set + # CONFIG_ATA is not set +- +-# +-# Multi-device support (RAID and LVM) +-# + # CONFIG_MD is not set +- +-# +-# Network device support +-# + CONFIG_NETDEVICES=y ++# CONFIG_NETDEVICES_MULTIQUEUE is not set + # CONFIG_DUMMY is not set + # CONFIG_BONDING is not set ++# CONFIG_MACVLAN is not set + # CONFIG_EQUALIZER is not set + CONFIG_TUN=m +-# CONFIG_PHYLIB is not set ++# CONFIG_VETH is not set ++CONFIG_PHYLIB=y + + # +-# Ethernet (10 or 100Mbit) ++# MII PHY device drivers + # ++# CONFIG_MARVELL_PHY is not set ++# CONFIG_DAVICOM_PHY is not set ++# CONFIG_QSEMI_PHY is not set ++# CONFIG_LXT_PHY is not set ++# CONFIG_CICADA_PHY is not set ++# CONFIG_VITESSE_PHY is not set ++# CONFIG_SMSC_PHY is not set ++# CONFIG_BROADCOM_PHY is not set ++# CONFIG_ICPLUS_PHY is not set ++# CONFIG_FIXED_PHY is not set ++# CONFIG_MDIO_BITBANG is not set + CONFIG_NET_ETHERNET=y +-CONFIG_MII=y ++# CONFIG_MII is not set + CONFIG_MACB=y ++# CONFIG_IBM_NEW_EMAC_ZMII is not set ++# CONFIG_IBM_NEW_EMAC_RGMII is not set ++# CONFIG_IBM_NEW_EMAC_TAH is not set ++# CONFIG_IBM_NEW_EMAC_EMAC4 is not set ++# CONFIG_B44 is not set + # CONFIG_NETDEV_1000 is not set + # CONFIG_NETDEV_10000 is not set + +@@ -571,21 +596,14 @@ CONFIG_PPP_DEFLATE=m + CONFIG_PPP_BSDCOMP=m + CONFIG_PPP_MPPE=m + CONFIG_PPPOE=m ++# CONFIG_PPPOL2TP is not set + # CONFIG_SLIP is not set + CONFIG_SLHC=m + # CONFIG_SHAPER is not set + # CONFIG_NETCONSOLE is not set + # CONFIG_NETPOLL is not set + # CONFIG_NET_POLL_CONTROLLER is not set +- +-# +-# ISDN subsystem +-# + # CONFIG_ISDN is not set +- +-# +-# Telephony Support +-# + # CONFIG_PHONE is not set + + # +@@ -620,23 +638,50 @@ CONFIG_SERIAL_CORE=y + CONFIG_SERIAL_CORE_CONSOLE=y + CONFIG_UNIX98_PTYS=y + # CONFIG_LEGACY_PTYS is not set +- +-# +-# IPMI +-# + # CONFIG_IPMI_HANDLER is not set +-# CONFIG_WATCHDOG is not set + # CONFIG_HW_RANDOM is not set + # CONFIG_RTC is not set + # CONFIG_GEN_RTC is not set + # CONFIG_R3964 is not set + # CONFIG_RAW_DRIVER is not set +- +-# +-# TPM devices +-# + # CONFIG_TCG_TPM is not set +-# CONFIG_I2C is not set ++CONFIG_I2C=m ++CONFIG_I2C_BOARDINFO=y ++CONFIG_I2C_CHARDEV=m ++ ++# ++# I2C Algorithms ++# ++CONFIG_I2C_ALGOBIT=m ++# CONFIG_I2C_ALGOPCF is not set ++# CONFIG_I2C_ALGOPCA is not set ++ ++# ++# I2C Hardware Bus support ++# ++CONFIG_I2C_GPIO=m ++# CONFIG_I2C_OCORES is not set ++# CONFIG_I2C_PARPORT_LIGHT is not set ++# CONFIG_I2C_SIMTEC is not set ++# CONFIG_I2C_TAOS_EVM is not set ++# CONFIG_I2C_STUB is not set ++ ++# ++# Miscellaneous I2C Chip support ++# ++# CONFIG_SENSORS_DS1337 is not set ++# CONFIG_SENSORS_DS1374 is not set ++# CONFIG_DS1682 is not set ++# CONFIG_SENSORS_EEPROM is not set ++# CONFIG_SENSORS_PCF8574 is not set ++# CONFIG_SENSORS_PCA9539 is not set ++# CONFIG_SENSORS_PCF8591 is not set ++# CONFIG_SENSORS_MAX6875 is not set ++# CONFIG_SENSORS_TSL2550 is not set ++# CONFIG_I2C_DEBUG_CORE is not set ++# CONFIG_I2C_DEBUG_ALGO is not set ++# CONFIG_I2C_DEBUG_BUS is not set ++# CONFIG_I2C_DEBUG_CHIP is not set + + # + # SPI support +@@ -655,13 +700,25 @@ CONFIG_SPI_ATMEL=y + # SPI Protocol Masters + # + # CONFIG_SPI_AT25 is not set +-# CONFIG_SPI_SPIDEV is not set ++CONFIG_SPI_SPIDEV=m ++# CONFIG_SPI_TLE62X0 is not set ++# CONFIG_W1 is not set ++# CONFIG_POWER_SUPPLY is not set ++# CONFIG_HWMON is not set ++CONFIG_WATCHDOG=y ++# CONFIG_WATCHDOG_NOWAYOUT is not set + + # +-# Dallas's 1-wire bus ++# Watchdog Device Drivers + # +-# CONFIG_W1 is not set +-# CONFIG_HWMON is not set ++# CONFIG_SOFT_WATCHDOG is not set ++CONFIG_AT32AP700X_WDT=y ++ ++# ++# Sonics Silicon Backplane ++# ++CONFIG_SSB_POSSIBLE=y ++# CONFIG_SSB is not set + + # + # Multifunction device drivers +@@ -678,23 +735,21 @@ CONFIG_SPI_ATMEL=y + # + # Graphics support + # ++# CONFIG_VGASTATE is not set ++# CONFIG_VIDEO_OUTPUT_CONTROL is not set ++# CONFIG_FB is not set + # CONFIG_BACKLIGHT_LCD_SUPPORT is not set + + # + # Display device support + # + # CONFIG_DISPLAY_SUPPORT is not set +-# CONFIG_VGASTATE is not set +-# CONFIG_FB is not set + + # + # Sound + # + # CONFIG_SOUND is not set +- +-# +-# USB support +-# ++CONFIG_USB_SUPPORT=y + # CONFIG_USB_ARCH_HAS_HCD is not set + # CONFIG_USB_ARCH_HAS_OHCI is not set + # CONFIG_USB_ARCH_HAS_EHCI is not set +@@ -706,12 +761,47 @@ CONFIG_SPI_ATMEL=y + # + # USB Gadget Support + # +-# CONFIG_USB_GADGET is not set +-# CONFIG_MMC is not set ++CONFIG_USB_GADGET=y ++# CONFIG_USB_GADGET_DEBUG is not set ++# CONFIG_USB_GADGET_DEBUG_FILES is not set ++CONFIG_USB_GADGET_SELECTED=y ++# CONFIG_USB_GADGET_AMD5536UDC is not set ++CONFIG_USB_GADGET_ATMEL_USBA=y ++CONFIG_USB_ATMEL_USBA=y ++# CONFIG_USB_GADGET_FSL_USB2 is not set ++# CONFIG_USB_GADGET_NET2280 is not set ++# CONFIG_USB_GADGET_PXA2XX is not set ++# CONFIG_USB_GADGET_M66592 is not set ++# CONFIG_USB_GADGET_GOKU is not set ++# CONFIG_USB_GADGET_LH7A40X is not set ++# CONFIG_USB_GADGET_OMAP is not set ++# CONFIG_USB_GADGET_S3C2410 is not set ++# CONFIG_USB_GADGET_AT91 is not set ++# CONFIG_USB_GADGET_DUMMY_HCD is not set ++CONFIG_USB_GADGET_DUALSPEED=y ++CONFIG_USB_ZERO=m ++CONFIG_USB_ETH=m ++CONFIG_USB_ETH_RNDIS=y ++CONFIG_USB_GADGETFS=m ++CONFIG_USB_FILE_STORAGE=m ++# CONFIG_USB_FILE_STORAGE_TEST is not set ++CONFIG_USB_G_SERIAL=m ++# CONFIG_USB_MIDI_GADGET is not set ++CONFIG_MMC=m ++# CONFIG_MMC_DEBUG is not set ++# CONFIG_MMC_UNSAFE_RESUME is not set ++ ++# ++# MMC/SD Card Drivers ++# ++CONFIG_MMC_BLOCK=m ++CONFIG_MMC_BLOCK_BOUNCE=y ++# CONFIG_SDIO_UART is not set + + # +-# LED devices ++# MMC/SD Host Controller Drivers + # ++CONFIG_MMC_SPI=m + CONFIG_NEW_LEDS=y + CONFIG_LEDS_CLASS=y + +@@ -726,53 +816,71 @@ CONFIG_LEDS_GPIO=y + CONFIG_LEDS_TRIGGERS=y + CONFIG_LEDS_TRIGGER_TIMER=y + CONFIG_LEDS_TRIGGER_HEARTBEAT=y +- ++CONFIG_RTC_LIB=y ++CONFIG_RTC_CLASS=y ++CONFIG_RTC_HCTOSYS=y ++CONFIG_RTC_HCTOSYS_DEVICE="rtc0" ++# CONFIG_RTC_DEBUG is not set + + # +-# LED drivers +-# +- +-# +-# LED Triggers +-# +- +-# +-# InfiniBand support ++# RTC interfaces + # ++CONFIG_RTC_INTF_SYSFS=y ++CONFIG_RTC_INTF_PROC=y ++CONFIG_RTC_INTF_DEV=y ++# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set ++# CONFIG_RTC_DRV_TEST is not set + + # +-# EDAC - error detection and reporting (RAS) (EXPERIMENTAL) ++# I2C RTC drivers + # ++# CONFIG_RTC_DRV_DS1307 is not set ++# CONFIG_RTC_DRV_DS1374 is not set ++# CONFIG_RTC_DRV_DS1672 is not set ++# CONFIG_RTC_DRV_MAX6900 is not set ++# CONFIG_RTC_DRV_RS5C372 is not set ++# CONFIG_RTC_DRV_ISL1208 is not set ++# CONFIG_RTC_DRV_X1205 is not set ++# CONFIG_RTC_DRV_PCF8563 is not set ++# CONFIG_RTC_DRV_PCF8583 is not set ++# CONFIG_RTC_DRV_M41T80 is not set + + # +-# Real Time Clock ++# SPI RTC drivers + # +-# CONFIG_RTC_CLASS is not set ++# CONFIG_RTC_DRV_RS5C348 is not set ++# CONFIG_RTC_DRV_MAX6902 is not set + + # +-# DMA Engine support ++# Platform RTC drivers + # +-# CONFIG_DMA_ENGINE is not set ++# CONFIG_RTC_DRV_DS1553 is not set ++# CONFIG_RTC_DRV_STK17TA8 is not set ++# CONFIG_RTC_DRV_DS1742 is not set ++# CONFIG_RTC_DRV_M48T86 is not set ++# CONFIG_RTC_DRV_M48T59 is not set ++# CONFIG_RTC_DRV_V3020 is not set + + # +-# DMA Clients ++# on-CPU RTC drivers + # ++CONFIG_RTC_DRV_AT32AP700X=y + + # +-# DMA Devices ++# Userspace I/O + # ++# CONFIG_UIO is not set + + # + # File systems + # +-CONFIG_EXT2_FS=y ++CONFIG_EXT2_FS=m + # CONFIG_EXT2_FS_XATTR is not set + # CONFIG_EXT2_FS_XIP is not set +-CONFIG_EXT3_FS=y ++CONFIG_EXT3_FS=m + # CONFIG_EXT3_FS_XATTR is not set + # CONFIG_EXT4DEV_FS is not set +-CONFIG_JBD=y +-# CONFIG_JBD_DEBUG is not set ++CONFIG_JBD=m + # CONFIG_REISERFS_FS is not set + # CONFIG_JFS_FS is not set + # CONFIG_FS_POSIX_ACL is not set +@@ -781,7 +889,8 @@ CONFIG_JBD=y + # CONFIG_OCFS2_FS is not set + # CONFIG_MINIX_FS is not set + # CONFIG_ROMFS_FS is not set +-# CONFIG_INOTIFY is not set ++CONFIG_INOTIFY=y ++CONFIG_INOTIFY_USER=y + # CONFIG_QUOTA is not set + # CONFIG_DNOTIFY is not set + # CONFIG_AUTOFS_FS is not set +@@ -814,8 +923,7 @@ CONFIG_SYSFS=y + CONFIG_TMPFS=y + # CONFIG_TMPFS_POSIX_ACL is not set + # CONFIG_HUGETLB_PAGE is not set +-CONFIG_RAMFS=y +-CONFIG_CONFIGFS_FS=y ++CONFIG_CONFIGFS_FS=m + + # + # Miscellaneous filesystems +@@ -830,10 +938,12 @@ CONFIG_CONFIGFS_FS=y + CONFIG_JFFS2_FS=y + CONFIG_JFFS2_FS_DEBUG=0 + CONFIG_JFFS2_FS_WRITEBUFFER=y ++# CONFIG_JFFS2_FS_WBUF_VERIFY is not set + # CONFIG_JFFS2_SUMMARY is not set + # CONFIG_JFFS2_FS_XATTR is not set + # CONFIG_JFFS2_COMPRESSION_OPTIONS is not set + CONFIG_JFFS2_ZLIB=y ++# CONFIG_JFFS2_LZO is not set + CONFIG_JFFS2_RTIME=y + # CONFIG_JFFS2_RUBIN is not set + # CONFIG_CRAMFS is not set +@@ -842,19 +952,21 @@ CONFIG_JFFS2_RTIME=y + # CONFIG_QNX4FS_FS is not set + # CONFIG_SYSV_FS is not set + # CONFIG_UFS_FS is not set +- +-# +-# Network File Systems +-# ++CONFIG_NETWORK_FILESYSTEMS=y + CONFIG_NFS_FS=y + CONFIG_NFS_V3=y + # CONFIG_NFS_V3_ACL is not set + # CONFIG_NFS_V4 is not set + # CONFIG_NFS_DIRECTIO is not set +-# CONFIG_NFSD is not set ++CONFIG_NFSD=m ++CONFIG_NFSD_V3=y ++# CONFIG_NFSD_V3_ACL is not set ++# CONFIG_NFSD_V4 is not set ++CONFIG_NFSD_TCP=y + CONFIG_ROOT_NFS=y + CONFIG_LOCKD=y + CONFIG_LOCKD_V4=y ++CONFIG_EXPORTFS=m + CONFIG_NFS_COMMON=y + CONFIG_SUNRPC=y + # CONFIG_SUNRPC_BIND34 is not set +@@ -871,23 +983,18 @@ CONFIG_CIFS=m + # CONFIG_NCP_FS is not set + # CONFIG_CODA_FS is not set + # CONFIG_AFS_FS is not set +-# CONFIG_9P_FS is not set + + # + # Partition Types + # + # CONFIG_PARTITION_ADVANCED is not set + CONFIG_MSDOS_PARTITION=y +- +-# +-# Native Language Support +-# +-CONFIG_NLS=y ++CONFIG_NLS=m + CONFIG_NLS_DEFAULT="iso8859-1" +-# CONFIG_NLS_CODEPAGE_437 is not set ++CONFIG_NLS_CODEPAGE_437=m + # CONFIG_NLS_CODEPAGE_737 is not set + # CONFIG_NLS_CODEPAGE_775 is not set +-CONFIG_NLS_CODEPAGE_850=y ++CONFIG_NLS_CODEPAGE_850=m + # CONFIG_NLS_CODEPAGE_852 is not set + # CONFIG_NLS_CODEPAGE_855 is not set + # CONFIG_NLS_CODEPAGE_857 is not set +@@ -908,7 +1015,7 @@ CONFIG_NLS_CODEPAGE_850=y + # CONFIG_NLS_CODEPAGE_1250 is not set + # CONFIG_NLS_CODEPAGE_1251 is not set + # CONFIG_NLS_ASCII is not set +-CONFIG_NLS_ISO8859_1=y ++CONFIG_NLS_ISO8859_1=m + # CONFIG_NLS_ISO8859_2 is not set + # CONFIG_NLS_ISO8859_3 is not set + # CONFIG_NLS_ISO8859_4 is not set +@@ -921,18 +1028,19 @@ CONFIG_NLS_ISO8859_1=y + # CONFIG_NLS_ISO8859_15 is not set + # CONFIG_NLS_KOI8_R is not set + # CONFIG_NLS_KOI8_U is not set +-CONFIG_NLS_UTF8=y +- +-# +-# Distributed Lock Manager +-# ++CONFIG_NLS_UTF8=m + # CONFIG_DLM is not set ++CONFIG_INSTRUMENTATION=y ++CONFIG_PROFILING=y ++CONFIG_OPROFILE=m ++CONFIG_KPROBES=y ++# CONFIG_MARKERS is not set + + # + # Kernel hacking + # +-CONFIG_TRACE_IRQFLAGS_SUPPORT=y + # CONFIG_PRINTK_TIME is not set ++CONFIG_ENABLE_WARN_DEPRECATED=y + CONFIG_ENABLE_MUST_CHECK=y + CONFIG_MAGIC_SYSRQ=y + # CONFIG_UNUSED_SYMBOLS is not set +@@ -941,12 +1049,17 @@ CONFIG_MAGIC_SYSRQ=y + CONFIG_DEBUG_KERNEL=y + # CONFIG_DEBUG_SHIRQ is not set + CONFIG_DETECT_SOFTLOCKUP=y ++CONFIG_SCHED_DEBUG=y + # CONFIG_SCHEDSTATS is not set + # CONFIG_TIMER_STATS is not set ++# CONFIG_SLUB_DEBUG_ON is not set + # CONFIG_DEBUG_RT_MUTEXES is not set + # CONFIG_RT_MUTEX_TESTER is not set + # CONFIG_DEBUG_SPINLOCK is not set + # CONFIG_DEBUG_MUTEXES is not set ++# CONFIG_DEBUG_LOCK_ALLOC is not set ++# CONFIG_PROVE_LOCKING is not set ++# CONFIG_LOCK_STAT is not set + # CONFIG_DEBUG_SPINLOCK_SLEEP is not set + # CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set + # CONFIG_DEBUG_KOBJECT is not set +@@ -954,21 +1067,21 @@ CONFIG_DEBUG_BUGVERBOSE=y + # CONFIG_DEBUG_INFO is not set + # CONFIG_DEBUG_VM is not set + # CONFIG_DEBUG_LIST is not set ++# CONFIG_DEBUG_SG is not set + CONFIG_FRAME_POINTER=y + # CONFIG_FORCED_INLINING is not set ++# CONFIG_BOOT_PRINTK_DELAY is not set + # CONFIG_RCU_TORTURE_TEST is not set ++# CONFIG_LKDTM is not set + # CONFIG_FAULT_INJECTION is not set +-# CONFIG_KPROBES is not set ++# CONFIG_SAMPLES is not set + + # + # Security options + # + # CONFIG_KEYS is not set + # CONFIG_SECURITY is not set +- +-# +-# Cryptographic options +-# ++# CONFIG_SECURITY_FILE_CAPABILITIES is not set + CONFIG_CRYPTO=y + CONFIG_CRYPTO_ALGAPI=y + CONFIG_CRYPTO_BLKCIPHER=y +@@ -989,6 +1102,7 @@ CONFIG_CRYPTO_ECB=m + CONFIG_CRYPTO_CBC=y + CONFIG_CRYPTO_PCBC=m + # CONFIG_CRYPTO_LRW is not set ++# CONFIG_CRYPTO_XTS is not set + # CONFIG_CRYPTO_CRYPTD is not set + CONFIG_CRYPTO_DES=y + # CONFIG_CRYPTO_FCRYPT is not set +@@ -1002,15 +1116,14 @@ CONFIG_CRYPTO_DES=y + CONFIG_CRYPTO_ARC4=m + # CONFIG_CRYPTO_KHAZAD is not set + # CONFIG_CRYPTO_ANUBIS is not set ++# CONFIG_CRYPTO_SEED is not set + CONFIG_CRYPTO_DEFLATE=y + # CONFIG_CRYPTO_MICHAEL_MIC is not set + # CONFIG_CRYPTO_CRC32C is not set + # CONFIG_CRYPTO_CAMELLIA is not set + # CONFIG_CRYPTO_TEST is not set +- +-# +-# Hardware crypto devices +-# ++# CONFIG_CRYPTO_AUTHENC is not set ++CONFIG_CRYPTO_HW=y + + # + # Library routines +@@ -1018,8 +1131,9 @@ CONFIG_CRYPTO_DEFLATE=y + CONFIG_BITREVERSE=y + CONFIG_CRC_CCITT=m + # CONFIG_CRC16 is not set +-# CONFIG_CRC_ITU_T is not set ++CONFIG_CRC_ITU_T=m + CONFIG_CRC32=y ++CONFIG_CRC7=m + # CONFIG_LIBCRC32C is not set + CONFIG_ZLIB_INFLATE=y + CONFIG_ZLIB_DEFLATE=y +diff -Nrup linux-2.6.24/arch/avr32/configs/atstk1002_defconfig linux-avr32/arch/avr32/configs/atstk1002_defconfig +--- linux-2.6.24/arch/avr32/configs/atstk1002_defconfig 2008-01-24 17:58:37.000000000 -0500 ++++ linux-avr32/arch/avr32/configs/atstk1002_defconfig 2008-02-01 14:51:35.000000000 -0500 +@@ -1,48 +1,48 @@ + # + # Automatically generated make config: don't edit +-# Linux kernel version: 2.6.22-rc5 +-# Sat Jun 23 15:32:08 2007 ++# Linux kernel version: 2.6.24-rc7 ++# Wed Jan 9 23:07:43 2008 + # + CONFIG_AVR32=y + CONFIG_GENERIC_GPIO=y + CONFIG_GENERIC_HARDIRQS=y ++CONFIG_STACKTRACE_SUPPORT=y ++CONFIG_LOCKDEP_SUPPORT=y ++CONFIG_TRACE_IRQFLAGS_SUPPORT=y + CONFIG_HARDIRQS_SW_RESEND=y + CONFIG_GENERIC_IRQ_PROBE=y + CONFIG_RWSEM_GENERIC_SPINLOCK=y + CONFIG_GENERIC_TIME=y ++# CONFIG_RWSEM_XCHGADD_ALGORITHM is not set + # CONFIG_ARCH_HAS_ILOG2_U32 is not set + # CONFIG_ARCH_HAS_ILOG2_U64 is not set ++CONFIG_ARCH_SUPPORTS_OPROFILE=y + CONFIG_GENERIC_HWEIGHT=y + CONFIG_GENERIC_CALIBRATE_DELAY=y + CONFIG_GENERIC_BUG=y + CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" + + # +-# Code maturity level options ++# General setup + # + CONFIG_EXPERIMENTAL=y + CONFIG_BROKEN_ON_SMP=y + CONFIG_INIT_ENV_ARG_LIMIT=32 +- +-# +-# General setup +-# + CONFIG_LOCALVERSION="" + # CONFIG_LOCALVERSION_AUTO is not set + CONFIG_SWAP=y + CONFIG_SYSVIPC=y +-# CONFIG_IPC_NS is not set + CONFIG_SYSVIPC_SYSCTL=y + CONFIG_POSIX_MQUEUE=y +-CONFIG_BSD_PROCESS_ACCT=y +-CONFIG_BSD_PROCESS_ACCT_V3=y +-CONFIG_TASKSTATS=y +-CONFIG_TASK_DELAY_ACCT=y +-# CONFIG_TASK_XACCT is not set +-# CONFIG_UTS_NS is not set +-CONFIG_AUDIT=y ++# CONFIG_BSD_PROCESS_ACCT is not set ++# CONFIG_TASKSTATS is not set ++# CONFIG_USER_NS is not set ++# CONFIG_PID_NS is not set ++# CONFIG_AUDIT is not set + # CONFIG_IKCONFIG is not set + CONFIG_LOG_BUF_SHIFT=14 ++# CONFIG_CGROUPS is not set ++# CONFIG_FAIR_GROUP_SCHED is not set + CONFIG_SYSFS_DEPRECATED=y + CONFIG_RELAY=y + CONFIG_BLK_DEV_INITRD=y +@@ -63,35 +63,28 @@ CONFIG_FUTEX=y + CONFIG_ANON_INODES=y + CONFIG_EPOLL=y + CONFIG_SIGNALFD=y +-CONFIG_TIMERFD=y + CONFIG_EVENTFD=y + CONFIG_SHMEM=y + CONFIG_VM_EVENT_COUNTERS=y +-# CONFIG_SLUB_DEBUG is not set ++CONFIG_SLUB_DEBUG=y + # CONFIG_SLAB is not set + CONFIG_SLUB=y + # CONFIG_SLOB is not set ++CONFIG_SLABINFO=y + CONFIG_RT_MUTEXES=y + # CONFIG_TINY_SHMEM is not set + CONFIG_BASE_SMALL=1 +- +-# +-# Loadable module support +-# + CONFIG_MODULES=y + CONFIG_MODULE_UNLOAD=y + # CONFIG_MODULE_FORCE_UNLOAD is not set + # CONFIG_MODVERSIONS is not set + # CONFIG_MODULE_SRCVERSION_ALL is not set + # CONFIG_KMOD is not set +- +-# +-# Block layer +-# + CONFIG_BLOCK=y + # CONFIG_LBD is not set + # CONFIG_BLK_DEV_IO_TRACE is not set + # CONFIG_LSF is not set ++# CONFIG_BLK_DEV_BSG is not set + + # + # IO Schedulers +@@ -99,12 +92,12 @@ CONFIG_BLOCK=y + CONFIG_IOSCHED_NOOP=y + # CONFIG_IOSCHED_AS is not set + # CONFIG_IOSCHED_DEADLINE is not set +-# CONFIG_IOSCHED_CFQ is not set ++CONFIG_IOSCHED_CFQ=y + # CONFIG_DEFAULT_AS is not set + # CONFIG_DEFAULT_DEADLINE is not set +-# CONFIG_DEFAULT_CFQ is not set +-CONFIG_DEFAULT_NOOP=y +-CONFIG_DEFAULT_IOSCHED="noop" ++CONFIG_DEFAULT_CFQ=y ++# CONFIG_DEFAULT_NOOP is not set ++CONFIG_DEFAULT_IOSCHED="cfq" + + # + # System Type and features +@@ -113,18 +106,27 @@ CONFIG_SUBARCH_AVR32B=y + CONFIG_MMU=y + CONFIG_PERFORMANCE_COUNTERS=y + CONFIG_PLATFORM_AT32AP=y ++CONFIG_CPU_AT32AP700X=y + CONFIG_CPU_AT32AP7000=y +-CONFIG_BOARD_ATSTK1002=y + CONFIG_BOARD_ATSTK1000=y + # CONFIG_BOARD_ATNGW100 is not set ++CONFIG_BOARD_ATSTK1002=y ++# CONFIG_BOARD_ATSTK1003 is not set ++# CONFIG_BOARD_ATSTK1004 is not set ++# CONFIG_BOARD_ATSTK100X_CUSTOM is not set ++# CONFIG_BOARD_ATSTK100X_SPI1 is not set ++# CONFIG_BOARD_ATSTK1000_J2_LED is not set ++# CONFIG_BOARD_ATSTK1000_J2_LED8 is not set ++# CONFIG_BOARD_ATSTK1000_J2_RGB is not set ++CONFIG_BOARD_ATSTK1000_EXTDAC=y + CONFIG_LOADER_U_BOOT=y + + # + # Atmel AVR32 AP options + # +-# CONFIG_AP7000_32_BIT_SMC is not set +-CONFIG_AP7000_16_BIT_SMC=y +-# CONFIG_AP7000_8_BIT_SMC is not set ++# CONFIG_AP700X_32_BIT_SMC is not set ++CONFIG_AP700X_16_BIT_SMC=y ++# CONFIG_AP700X_8_BIT_SMC is not set + CONFIG_LOAD_ADDRESS=0x10000000 + CONFIG_ENTRY_ADDRESS=0x90000000 + CONFIG_PHYS_OFFSET=0x10000000 +@@ -144,9 +146,11 @@ CONFIG_FLATMEM_MANUAL=y + CONFIG_FLATMEM=y + CONFIG_FLAT_NODE_MEM_MAP=y + # CONFIG_SPARSEMEM_STATIC is not set ++# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set + CONFIG_SPLIT_PTLOCK_CPUS=4 + # CONFIG_RESOURCES_64BIT is not set + CONFIG_ZONE_DMA_FLAG=0 ++CONFIG_VIRT_TO_BUS=y + # CONFIG_OWNERSHIP_TRACE is not set + # CONFIG_HZ_100 is not set + CONFIG_HZ_250=y +@@ -156,13 +160,31 @@ CONFIG_HZ=250 + CONFIG_CMDLINE="" + + # +-# Bus options ++# Power management options + # +-# CONFIG_ARCH_SUPPORTS_MSI is not set + + # +-# PCCARD (PCMCIA/CardBus) support ++# CPU Frequency scaling ++# ++CONFIG_CPU_FREQ=y ++CONFIG_CPU_FREQ_TABLE=y ++# CONFIG_CPU_FREQ_DEBUG is not set ++# CONFIG_CPU_FREQ_STAT is not set ++CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y ++# CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set ++# CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND is not set ++# CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set ++CONFIG_CPU_FREQ_GOV_PERFORMANCE=y ++# CONFIG_CPU_FREQ_GOV_POWERSAVE is not set ++CONFIG_CPU_FREQ_GOV_USERSPACE=y ++CONFIG_CPU_FREQ_GOV_ONDEMAND=y ++# CONFIG_CPU_FREQ_GOV_CONSERVATIVE is not set ++CONFIG_CPU_FREQ_AT32AP=y ++ ++# ++# Bus options + # ++# CONFIG_ARCH_SUPPORTS_MSI is not set + # CONFIG_PCCARD is not set + + # +@@ -182,7 +204,12 @@ CONFIG_NET=y + CONFIG_PACKET=y + CONFIG_PACKET_MMAP=y + CONFIG_UNIX=y +-# CONFIG_NET_KEY is not set ++CONFIG_XFRM=y ++CONFIG_XFRM_USER=m ++# CONFIG_XFRM_SUB_POLICY is not set ++# CONFIG_XFRM_MIGRATE is not set ++CONFIG_NET_KEY=m ++# CONFIG_NET_KEY_MIGRATE is not set + CONFIG_INET=y + # CONFIG_IP_MULTICAST is not set + # CONFIG_IP_ADVANCED_ROUTER is not set +@@ -191,36 +218,52 @@ CONFIG_IP_PNP=y + CONFIG_IP_PNP_DHCP=y + # CONFIG_IP_PNP_BOOTP is not set + # CONFIG_IP_PNP_RARP is not set +-# CONFIG_NET_IPIP is not set +-# CONFIG_NET_IPGRE is not set ++CONFIG_NET_IPIP=m ++CONFIG_NET_IPGRE=m + # CONFIG_ARPD is not set + # CONFIG_SYN_COOKIES is not set +-# CONFIG_INET_AH is not set +-# CONFIG_INET_ESP is not set ++CONFIG_INET_AH=m ++CONFIG_INET_ESP=m + # CONFIG_INET_IPCOMP is not set + # CONFIG_INET_XFRM_TUNNEL is not set +-# CONFIG_INET_TUNNEL is not set +-# CONFIG_INET_XFRM_MODE_TRANSPORT is not set +-# CONFIG_INET_XFRM_MODE_TUNNEL is not set +-# CONFIG_INET_XFRM_MODE_BEET is not set ++CONFIG_INET_TUNNEL=m ++CONFIG_INET_XFRM_MODE_TRANSPORT=m ++CONFIG_INET_XFRM_MODE_TUNNEL=m ++CONFIG_INET_XFRM_MODE_BEET=m ++# CONFIG_INET_LRO is not set + CONFIG_INET_DIAG=y + CONFIG_INET_TCP_DIAG=y + # CONFIG_TCP_CONG_ADVANCED is not set + CONFIG_TCP_CONG_CUBIC=y + CONFIG_DEFAULT_TCP_CONG="cubic" + # CONFIG_TCP_MD5SIG is not set +-# CONFIG_IPV6 is not set +-# CONFIG_INET6_XFRM_TUNNEL is not set +-# CONFIG_INET6_TUNNEL is not set ++CONFIG_IPV6=m ++# CONFIG_IPV6_PRIVACY is not set ++# CONFIG_IPV6_ROUTER_PREF is not set ++# CONFIG_IPV6_OPTIMISTIC_DAD is not set ++CONFIG_INET6_AH=m ++CONFIG_INET6_ESP=m ++CONFIG_INET6_IPCOMP=m ++# CONFIG_IPV6_MIP6 is not set ++CONFIG_INET6_XFRM_TUNNEL=m ++CONFIG_INET6_TUNNEL=m ++CONFIG_INET6_XFRM_MODE_TRANSPORT=m ++CONFIG_INET6_XFRM_MODE_TUNNEL=m ++CONFIG_INET6_XFRM_MODE_BEET=m ++# CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION is not set ++CONFIG_IPV6_SIT=m ++CONFIG_IPV6_TUNNEL=m ++# CONFIG_IPV6_MULTIPLE_TABLES is not set + # CONFIG_NETWORK_SECMARK is not set + # CONFIG_NETFILTER is not set + # CONFIG_IP_DCCP is not set + # CONFIG_IP_SCTP is not set + # CONFIG_TIPC is not set + # CONFIG_ATM is not set +-# CONFIG_BRIDGE is not set ++CONFIG_BRIDGE=m + # CONFIG_VLAN_8021Q is not set + # CONFIG_DECNET is not set ++CONFIG_LLC=m + # CONFIG_LLC2 is not set + # CONFIG_IPX is not set + # CONFIG_ATALK is not set +@@ -228,16 +271,13 @@ CONFIG_DEFAULT_TCP_CONG="cubic" + # CONFIG_LAPB is not set + # CONFIG_ECONET is not set + # CONFIG_WAN_ROUTER is not set +- +-# +-# QoS and/or fair queueing +-# + # CONFIG_NET_SCHED is not set + + # + # Network testing + # + # CONFIG_NET_PKTGEN is not set ++# CONFIG_NET_TCPPROBE is not set + # CONFIG_HAMRADIO is not set + # CONFIG_IRDA is not set + # CONFIG_BT is not set +@@ -251,6 +291,7 @@ CONFIG_DEFAULT_TCP_CONG="cubic" + # CONFIG_MAC80211 is not set + # CONFIG_IEEE80211 is not set + # CONFIG_RFKILL is not set ++# CONFIG_NET_9P is not set + + # + # Device Drivers +@@ -259,16 +300,13 @@ CONFIG_DEFAULT_TCP_CONG="cubic" + # + # Generic Driver Options + # ++CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" + CONFIG_STANDALONE=y + # CONFIG_PREVENT_FIRMWARE_BUILD is not set + # CONFIG_FW_LOADER is not set + # CONFIG_DEBUG_DRIVER is not set + # CONFIG_DEBUG_DEVRES is not set + # CONFIG_SYS_HYPERVISOR is not set +- +-# +-# Connector - unified userspace <-> kernelspace linker +-# + # CONFIG_CONNECTOR is not set + CONFIG_MTD=y + # CONFIG_MTD_DEBUG is not set +@@ -288,6 +326,7 @@ CONFIG_MTD_BLOCK=y + # CONFIG_INFTL is not set + # CONFIG_RFD_FTL is not set + # CONFIG_SSFDC is not set ++# CONFIG_MTD_OOPS is not set + + # + # RAM/ROM/Flash chip drivers +@@ -327,6 +366,8 @@ CONFIG_MTD_PHYSMAP_BANKWIDTH=2 + # + # Self-contained MTD device drivers + # ++CONFIG_MTD_DATAFLASH=m ++CONFIG_MTD_M25P80=m + # CONFIG_MTD_SLRAM is not set + # CONFIG_MTD_PHRAM is not set + # CONFIG_MTD_MTDRAM is not set +@@ -345,20 +386,8 @@ CONFIG_MTD_PHYSMAP_BANKWIDTH=2 + # UBI - Unsorted block images + # + # CONFIG_MTD_UBI is not set +- +-# +-# Parallel port support +-# + # CONFIG_PARPORT is not set +- +-# +-# Plug and Play support +-# +-# CONFIG_PNPACPI is not set +- +-# +-# Block devices +-# ++CONFIG_BLK_DEV=y + # CONFIG_BLK_DEV_COW_COMMON is not set + CONFIG_BLK_DEV_LOOP=m + # CONFIG_BLK_DEV_CRYPTOLOOP is not set +@@ -369,42 +398,87 @@ CONFIG_BLK_DEV_RAM_SIZE=4096 + CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024 + # CONFIG_CDROM_PKTCDVD is not set + # CONFIG_ATA_OVER_ETH is not set +- +-# +-# Misc devices +-# +-# CONFIG_BLINK is not set ++CONFIG_MISC_DEVICES=y ++# CONFIG_EEPROM_93CX6 is not set ++CONFIG_ATMEL_SSC=m + # CONFIG_IDE is not set + + # + # SCSI device support + # + # CONFIG_RAID_ATTRS is not set +-# CONFIG_SCSI is not set ++CONFIG_SCSI=m ++CONFIG_SCSI_DMA=y ++# CONFIG_SCSI_TGT is not set + # CONFIG_SCSI_NETLINK is not set +-# CONFIG_ATA is not set ++# CONFIG_SCSI_PROC_FS is not set + + # +-# Multi-device support (RAID and LVM) ++# SCSI support type (disk, tape, CD-ROM) + # +-# CONFIG_MD is not set ++CONFIG_BLK_DEV_SD=m ++# CONFIG_CHR_DEV_ST is not set ++# CONFIG_CHR_DEV_OSST is not set ++CONFIG_BLK_DEV_SR=m ++# CONFIG_BLK_DEV_SR_VENDOR is not set ++# CONFIG_CHR_DEV_SG is not set ++# CONFIG_CHR_DEV_SCH is not set ++ ++# ++# Some SCSI devices (e.g. CD jukebox) support multiple LUNs ++# ++# CONFIG_SCSI_MULTI_LUN is not set ++# CONFIG_SCSI_CONSTANTS is not set ++# CONFIG_SCSI_LOGGING is not set ++# CONFIG_SCSI_SCAN_ASYNC is not set ++CONFIG_SCSI_WAIT_SCAN=m + + # +-# Network device support ++# SCSI Transports + # ++# CONFIG_SCSI_SPI_ATTRS is not set ++# CONFIG_SCSI_FC_ATTRS is not set ++# CONFIG_SCSI_ISCSI_ATTRS is not set ++# CONFIG_SCSI_SAS_LIBSAS is not set ++# CONFIG_SCSI_SRP_ATTRS is not set ++# CONFIG_SCSI_LOWLEVEL is not set ++CONFIG_ATA=m ++# CONFIG_ATA_NONSTANDARD is not set ++CONFIG_PATA_AT32=m ++# CONFIG_PATA_PLATFORM is not set ++# CONFIG_MD is not set + CONFIG_NETDEVICES=y +-CONFIG_DUMMY=y ++# CONFIG_NETDEVICES_MULTIQUEUE is not set ++# CONFIG_DUMMY is not set + # CONFIG_BONDING is not set ++# CONFIG_MACVLAN is not set + # CONFIG_EQUALIZER is not set + CONFIG_TUN=m +-# CONFIG_PHYLIB is not set ++# CONFIG_VETH is not set ++CONFIG_PHYLIB=y + + # +-# Ethernet (10 or 100Mbit) ++# MII PHY device drivers + # ++# CONFIG_MARVELL_PHY is not set ++# CONFIG_DAVICOM_PHY is not set ++# CONFIG_QSEMI_PHY is not set ++# CONFIG_LXT_PHY is not set ++# CONFIG_CICADA_PHY is not set ++# CONFIG_VITESSE_PHY is not set ++# CONFIG_SMSC_PHY is not set ++# CONFIG_BROADCOM_PHY is not set ++# CONFIG_ICPLUS_PHY is not set ++# CONFIG_FIXED_PHY is not set ++# CONFIG_MDIO_BITBANG is not set + CONFIG_NET_ETHERNET=y +-CONFIG_MII=y ++# CONFIG_MII is not set + CONFIG_MACB=y ++# CONFIG_IBM_NEW_EMAC_ZMII is not set ++# CONFIG_IBM_NEW_EMAC_RGMII is not set ++# CONFIG_IBM_NEW_EMAC_TAH is not set ++# CONFIG_IBM_NEW_EMAC_EMAC4 is not set ++# CONFIG_B44 is not set + # CONFIG_NETDEV_1000 is not set + # CONFIG_NETDEV_10000 is not set + +@@ -423,27 +497,54 @@ CONFIG_PPP_DEFLATE=m + CONFIG_PPP_BSDCOMP=m + # CONFIG_PPP_MPPE is not set + # CONFIG_PPPOE is not set ++# CONFIG_PPPOL2TP is not set + # CONFIG_SLIP is not set + CONFIG_SLHC=m + # CONFIG_SHAPER is not set + # CONFIG_NETCONSOLE is not set + # CONFIG_NETPOLL is not set + # CONFIG_NET_POLL_CONTROLLER is not set +- +-# +-# ISDN subsystem +-# + # CONFIG_ISDN is not set +- +-# +-# Telephony Support +-# + # CONFIG_PHONE is not set + + # + # Input device support + # +-# CONFIG_INPUT is not set ++CONFIG_INPUT=m ++# CONFIG_INPUT_FF_MEMLESS is not set ++CONFIG_INPUT_POLLDEV=m ++ ++# ++# Userland interfaces ++# ++CONFIG_INPUT_MOUSEDEV=m ++CONFIG_INPUT_MOUSEDEV_PSAUX=y ++CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 ++CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 ++# CONFIG_INPUT_JOYDEV is not set ++CONFIG_INPUT_EVDEV=m ++# CONFIG_INPUT_EVBUG is not set ++ ++# ++# Input Device Drivers ++# ++CONFIG_INPUT_KEYBOARD=y ++# CONFIG_KEYBOARD_ATKBD is not set ++# CONFIG_KEYBOARD_SUNKBD is not set ++# CONFIG_KEYBOARD_LKKBD is not set ++# CONFIG_KEYBOARD_XTKBD is not set ++# CONFIG_KEYBOARD_NEWTON is not set ++# CONFIG_KEYBOARD_STOWAWAY is not set ++CONFIG_KEYBOARD_GPIO=m ++CONFIG_INPUT_MOUSE=y ++# CONFIG_MOUSE_PS2 is not set ++# CONFIG_MOUSE_SERIAL is not set ++# CONFIG_MOUSE_VSXXXAA is not set ++CONFIG_MOUSE_GPIO=m ++# CONFIG_INPUT_JOYSTICK is not set ++# CONFIG_INPUT_TABLET is not set ++# CONFIG_INPUT_TOUCHSCREEN is not set ++# CONFIG_INPUT_MISC is not set + + # + # Hardware I/O ports +@@ -472,35 +573,87 @@ CONFIG_SERIAL_CORE=y + CONFIG_SERIAL_CORE_CONSOLE=y + CONFIG_UNIX98_PTYS=y + # CONFIG_LEGACY_PTYS is not set +- +-# +-# IPMI +-# + # CONFIG_IPMI_HANDLER is not set +-# CONFIG_WATCHDOG is not set + # CONFIG_HW_RANDOM is not set + # CONFIG_RTC is not set + # CONFIG_GEN_RTC is not set + # CONFIG_R3964 is not set + # CONFIG_RAW_DRIVER is not set ++# CONFIG_TCG_TPM is not set ++CONFIG_I2C=m ++CONFIG_I2C_BOARDINFO=y ++CONFIG_I2C_CHARDEV=m ++ ++# ++# I2C Algorithms ++# ++CONFIG_I2C_ALGOBIT=m ++# CONFIG_I2C_ALGOPCF is not set ++# CONFIG_I2C_ALGOPCA is not set ++ ++# ++# I2C Hardware Bus support ++# ++CONFIG_I2C_GPIO=m ++# CONFIG_I2C_OCORES is not set ++# CONFIG_I2C_PARPORT_LIGHT is not set ++# CONFIG_I2C_SIMTEC is not set ++# CONFIG_I2C_TAOS_EVM is not set ++# CONFIG_I2C_STUB is not set ++ ++# ++# Miscellaneous I2C Chip support ++# ++# CONFIG_SENSORS_DS1337 is not set ++# CONFIG_SENSORS_DS1374 is not set ++# CONFIG_DS1682 is not set ++# CONFIG_SENSORS_EEPROM is not set ++# CONFIG_SENSORS_PCF8574 is not set ++# CONFIG_SENSORS_PCA9539 is not set ++# CONFIG_SENSORS_PCF8591 is not set ++# CONFIG_SENSORS_MAX6875 is not set ++# CONFIG_SENSORS_TSL2550 is not set ++# CONFIG_I2C_DEBUG_CORE is not set ++# CONFIG_I2C_DEBUG_ALGO is not set ++# CONFIG_I2C_DEBUG_BUS is not set ++# CONFIG_I2C_DEBUG_CHIP is not set + + # +-# TPM devices ++# SPI support + # +-# CONFIG_TCG_TPM is not set +-# CONFIG_I2C is not set ++CONFIG_SPI=y ++# CONFIG_SPI_DEBUG is not set ++CONFIG_SPI_MASTER=y + + # +-# SPI support ++# SPI Master Controller Drivers + # +-# CONFIG_SPI is not set +-# CONFIG_SPI_MASTER is not set ++CONFIG_SPI_ATMEL=y ++# CONFIG_SPI_BITBANG is not set + + # +-# Dallas's 1-wire bus ++# SPI Protocol Masters + # ++# CONFIG_SPI_AT25 is not set ++CONFIG_SPI_SPIDEV=m ++# CONFIG_SPI_TLE62X0 is not set + # CONFIG_W1 is not set ++# CONFIG_POWER_SUPPLY is not set + # CONFIG_HWMON is not set ++CONFIG_WATCHDOG=y ++# CONFIG_WATCHDOG_NOWAYOUT is not set ++ ++# ++# Watchdog Device Drivers ++# ++# CONFIG_SOFT_WATCHDOG is not set ++CONFIG_AT32AP700X_WDT=y ++ ++# ++# Sonics Silicon Backplane ++# ++CONFIG_SSB_POSSIBLE=y ++# CONFIG_SSB is not set + + # + # Multifunction device drivers +@@ -517,23 +670,94 @@ CONFIG_UNIX98_PTYS=y + # + # Graphics support + # +-# CONFIG_BACKLIGHT_LCD_SUPPORT is not set ++# CONFIG_VGASTATE is not set ++# CONFIG_VIDEO_OUTPUT_CONTROL is not set ++CONFIG_FB=y ++# CONFIG_FIRMWARE_EDID is not set ++# CONFIG_FB_DDC is not set ++CONFIG_FB_CFB_FILLRECT=y ++CONFIG_FB_CFB_COPYAREA=y ++CONFIG_FB_CFB_IMAGEBLIT=y ++# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set ++# CONFIG_FB_SYS_FILLRECT is not set ++# CONFIG_FB_SYS_COPYAREA is not set ++# CONFIG_FB_SYS_IMAGEBLIT is not set ++# CONFIG_FB_SYS_FOPS is not set ++CONFIG_FB_DEFERRED_IO=y ++# CONFIG_FB_SVGALIB is not set ++# CONFIG_FB_MACMODES is not set ++# CONFIG_FB_BACKLIGHT is not set ++# CONFIG_FB_MODE_HELPERS is not set ++# CONFIG_FB_TILEBLITTING is not set ++ ++# ++# Frame buffer hardware drivers ++# ++# CONFIG_FB_S1D13XXX is not set ++CONFIG_FB_ATMEL=y ++# CONFIG_FB_VIRTUAL is not set ++CONFIG_BACKLIGHT_LCD_SUPPORT=y ++CONFIG_LCD_CLASS_DEVICE=y ++CONFIG_LCD_LTV350QV=y ++# CONFIG_BACKLIGHT_CLASS_DEVICE is not set + + # + # Display device support + # + # CONFIG_DISPLAY_SUPPORT is not set +-# CONFIG_VGASTATE is not set +-# CONFIG_FB is not set ++# CONFIG_LOGO is not set + + # + # Sound + # +-# CONFIG_SOUND is not set ++CONFIG_SOUND=m ++ ++# ++# Advanced Linux Sound Architecture ++# ++CONFIG_SND=m ++CONFIG_SND_TIMER=m ++CONFIG_SND_PCM=m ++# CONFIG_SND_SEQUENCER is not set ++CONFIG_SND_OSSEMUL=y ++CONFIG_SND_MIXER_OSS=m ++CONFIG_SND_PCM_OSS=m ++CONFIG_SND_PCM_OSS_PLUGINS=y ++# CONFIG_SND_DYNAMIC_MINORS is not set ++# CONFIG_SND_SUPPORT_OLD_API is not set ++# CONFIG_SND_VERBOSE_PROCFS is not set ++# CONFIG_SND_VERBOSE_PRINTK is not set ++# CONFIG_SND_DEBUG is not set ++ ++# ++# Generic devices ++# ++# CONFIG_SND_DUMMY is not set ++# CONFIG_SND_MTPAV is not set ++# CONFIG_SND_SERIAL_U16550 is not set ++# CONFIG_SND_MPU401 is not set ++ ++# ++# SPI devices ++# ++CONFIG_SND_AT73C213=m ++CONFIG_SND_AT73C213_TARGET_BITRATE=48000 ++ ++# ++# System on Chip audio support ++# ++# CONFIG_SND_SOC is not set ++ ++# ++# SoC Audio support for SuperH ++# + + # +-# USB support ++# Open Sound System + # ++# CONFIG_SOUND_PRIME is not set ++# CONFIG_HID_SUPPORT is not set ++CONFIG_USB_SUPPORT=y + # CONFIG_USB_ARCH_HAS_HCD is not set + # CONFIG_USB_ARCH_HAS_OHCI is not set + # CONFIG_USB_ARCH_HAS_EHCI is not set +@@ -545,47 +769,116 @@ CONFIG_UNIX98_PTYS=y + # + # USB Gadget Support + # +-# CONFIG_USB_GADGET is not set +-# CONFIG_MMC is not set +- +-# +-# LED devices +-# +-# CONFIG_NEW_LEDS is not set ++CONFIG_USB_GADGET=y ++# CONFIG_USB_GADGET_DEBUG is not set ++# CONFIG_USB_GADGET_DEBUG_FILES is not set ++# CONFIG_USB_GADGET_DEBUG_FS is not set ++CONFIG_USB_GADGET_SELECTED=y ++# CONFIG_USB_GADGET_AMD5536UDC is not set ++CONFIG_USB_GADGET_ATMEL_USBA=y ++CONFIG_USB_ATMEL_USBA=y ++# CONFIG_USB_GADGET_FSL_USB2 is not set ++# CONFIG_USB_GADGET_NET2280 is not set ++# CONFIG_USB_GADGET_PXA2XX is not set ++# CONFIG_USB_GADGET_M66592 is not set ++# CONFIG_USB_GADGET_GOKU is not set ++# CONFIG_USB_GADGET_LH7A40X is not set ++# CONFIG_USB_GADGET_OMAP is not set ++# CONFIG_USB_GADGET_S3C2410 is not set ++# CONFIG_USB_GADGET_AT91 is not set ++# CONFIG_USB_GADGET_DUMMY_HCD is not set ++CONFIG_USB_GADGET_DUALSPEED=y ++CONFIG_USB_ZERO=m ++CONFIG_USB_ETH=m ++CONFIG_USB_ETH_RNDIS=y ++CONFIG_USB_GADGETFS=m ++CONFIG_USB_FILE_STORAGE=m ++# CONFIG_USB_FILE_STORAGE_TEST is not set ++CONFIG_USB_G_SERIAL=m ++# CONFIG_USB_MIDI_GADGET is not set ++CONFIG_MMC=m ++# CONFIG_MMC_DEBUG is not set ++# CONFIG_MMC_UNSAFE_RESUME is not set ++ ++# ++# MMC/SD Card Drivers ++# ++CONFIG_MMC_BLOCK=m ++CONFIG_MMC_BLOCK_BOUNCE=y ++# CONFIG_SDIO_UART is not set ++ ++# ++# MMC/SD Host Controller Drivers ++# ++CONFIG_MMC_SPI=m ++CONFIG_NEW_LEDS=y ++CONFIG_LEDS_CLASS=m + + # + # LED drivers + # ++CONFIG_LEDS_GPIO=m + + # + # LED Triggers + # ++CONFIG_LEDS_TRIGGERS=y ++CONFIG_LEDS_TRIGGER_TIMER=m ++CONFIG_LEDS_TRIGGER_HEARTBEAT=m ++CONFIG_RTC_LIB=y ++CONFIG_RTC_CLASS=y ++CONFIG_RTC_HCTOSYS=y ++CONFIG_RTC_HCTOSYS_DEVICE="rtc0" ++# CONFIG_RTC_DEBUG is not set + + # +-# InfiniBand support ++# RTC interfaces + # ++CONFIG_RTC_INTF_SYSFS=y ++CONFIG_RTC_INTF_PROC=y ++CONFIG_RTC_INTF_DEV=y ++# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set ++# CONFIG_RTC_DRV_TEST is not set + + # +-# EDAC - error detection and reporting (RAS) (EXPERIMENTAL) ++# I2C RTC drivers + # ++# CONFIG_RTC_DRV_DS1307 is not set ++# CONFIG_RTC_DRV_DS1374 is not set ++# CONFIG_RTC_DRV_DS1672 is not set ++# CONFIG_RTC_DRV_MAX6900 is not set ++# CONFIG_RTC_DRV_RS5C372 is not set ++# CONFIG_RTC_DRV_ISL1208 is not set ++# CONFIG_RTC_DRV_X1205 is not set ++# CONFIG_RTC_DRV_PCF8563 is not set ++# CONFIG_RTC_DRV_PCF8583 is not set ++# CONFIG_RTC_DRV_M41T80 is not set + + # +-# Real Time Clock ++# SPI RTC drivers + # +-# CONFIG_RTC_CLASS is not set ++# CONFIG_RTC_DRV_RS5C348 is not set ++# CONFIG_RTC_DRV_MAX6902 is not set + + # +-# DMA Engine support ++# Platform RTC drivers + # +-# CONFIG_DMA_ENGINE is not set ++# CONFIG_RTC_DRV_DS1553 is not set ++# CONFIG_RTC_DRV_STK17TA8 is not set ++# CONFIG_RTC_DRV_DS1742 is not set ++# CONFIG_RTC_DRV_M48T86 is not set ++# CONFIG_RTC_DRV_M48T59 is not set ++# CONFIG_RTC_DRV_V3020 is not set + + # +-# DMA Clients ++# on-CPU RTC drivers + # ++CONFIG_RTC_DRV_AT32AP700X=y + + # +-# DMA Devices ++# Userspace I/O + # ++# CONFIG_UIO is not set + + # + # File systems +@@ -593,8 +886,11 @@ CONFIG_UNIX98_PTYS=y + CONFIG_EXT2_FS=m + # CONFIG_EXT2_FS_XATTR is not set + # CONFIG_EXT2_FS_XIP is not set +-# CONFIG_EXT3_FS is not set ++CONFIG_EXT3_FS=m ++# CONFIG_EXT3_FS_XATTR is not set + # CONFIG_EXT4DEV_FS is not set ++CONFIG_JBD=m ++# CONFIG_JBD_DEBUG is not set + # CONFIG_REISERFS_FS is not set + # CONFIG_JFS_FS is not set + # CONFIG_FS_POSIX_ACL is not set +@@ -609,7 +905,7 @@ CONFIG_INOTIFY_USER=y + # CONFIG_DNOTIFY is not set + # CONFIG_AUTOFS_FS is not set + # CONFIG_AUTOFS4_FS is not set +-# CONFIG_FUSE_FS is not set ++CONFIG_FUSE_FS=m + + # + # CD-ROM/DVD Filesystems +@@ -637,8 +933,7 @@ CONFIG_SYSFS=y + CONFIG_TMPFS=y + # CONFIG_TMPFS_POSIX_ACL is not set + # CONFIG_HUGETLB_PAGE is not set +-CONFIG_RAMFS=y +-CONFIG_CONFIGFS_FS=m ++# CONFIG_CONFIGFS_FS is not set + + # + # Miscellaneous filesystems +@@ -652,11 +947,12 @@ CONFIG_CONFIGFS_FS=m + # CONFIG_EFS_FS is not set + CONFIG_JFFS2_FS=y + CONFIG_JFFS2_FS_DEBUG=0 +-CONFIG_JFFS2_FS_WRITEBUFFER=y ++# CONFIG_JFFS2_FS_WRITEBUFFER is not set + # CONFIG_JFFS2_SUMMARY is not set + # CONFIG_JFFS2_FS_XATTR is not set + # CONFIG_JFFS2_COMPRESSION_OPTIONS is not set + CONFIG_JFFS2_ZLIB=y ++# CONFIG_JFFS2_LZO is not set + CONFIG_JFFS2_RTIME=y + # CONFIG_JFFS2_RUBIN is not set + # CONFIG_CRAMFS is not set +@@ -665,10 +961,7 @@ CONFIG_JFFS2_RTIME=y + # CONFIG_QNX4FS_FS is not set + # CONFIG_SYSV_FS is not set + # CONFIG_UFS_FS is not set +- +-# +-# Network File Systems +-# ++CONFIG_NETWORK_FILESYSTEMS=y + CONFIG_NFS_FS=y + CONFIG_NFS_V3=y + # CONFIG_NFS_V3_ACL is not set +@@ -688,17 +981,12 @@ CONFIG_SUNRPC=y + # CONFIG_NCP_FS is not set + # CONFIG_CODA_FS is not set + # CONFIG_AFS_FS is not set +-# CONFIG_9P_FS is not set + + # + # Partition Types + # + # CONFIG_PARTITION_ADVANCED is not set + CONFIG_MSDOS_PARTITION=y +- +-# +-# Native Language Support +-# + CONFIG_NLS=m + CONFIG_NLS_DEFAULT="iso8859-1" + CONFIG_NLS_CODEPAGE_437=m +@@ -739,17 +1027,18 @@ CONFIG_NLS_ISO8859_1=m + # CONFIG_NLS_KOI8_R is not set + # CONFIG_NLS_KOI8_U is not set + CONFIG_NLS_UTF8=m +- +-# +-# Distributed Lock Manager +-# + # CONFIG_DLM is not set ++CONFIG_INSTRUMENTATION=y ++CONFIG_PROFILING=y ++CONFIG_OPROFILE=m ++CONFIG_KPROBES=y ++# CONFIG_MARKERS is not set + + # + # Kernel hacking + # +-CONFIG_TRACE_IRQFLAGS_SUPPORT=y + # CONFIG_PRINTK_TIME is not set ++CONFIG_ENABLE_WARN_DEPRECATED=y + CONFIG_ENABLE_MUST_CHECK=y + CONFIG_MAGIC_SYSRQ=y + # CONFIG_UNUSED_SYMBOLS is not set +@@ -758,12 +1047,17 @@ CONFIG_DEBUG_FS=y + CONFIG_DEBUG_KERNEL=y + # CONFIG_DEBUG_SHIRQ is not set + CONFIG_DETECT_SOFTLOCKUP=y ++CONFIG_SCHED_DEBUG=y + # CONFIG_SCHEDSTATS is not set + # CONFIG_TIMER_STATS is not set ++# CONFIG_SLUB_DEBUG_ON is not set + # CONFIG_DEBUG_RT_MUTEXES is not set + # CONFIG_RT_MUTEX_TESTER is not set + # CONFIG_DEBUG_SPINLOCK is not set + # CONFIG_DEBUG_MUTEXES is not set ++# CONFIG_DEBUG_LOCK_ALLOC is not set ++# CONFIG_PROVE_LOCKING is not set ++# CONFIG_LOCK_STAT is not set + # CONFIG_DEBUG_SPINLOCK_SLEEP is not set + # CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set + # CONFIG_DEBUG_KOBJECT is not set +@@ -771,22 +1065,63 @@ CONFIG_DEBUG_BUGVERBOSE=y + # CONFIG_DEBUG_INFO is not set + # CONFIG_DEBUG_VM is not set + # CONFIG_DEBUG_LIST is not set ++# CONFIG_DEBUG_SG is not set + CONFIG_FRAME_POINTER=y + CONFIG_FORCED_INLINING=y ++# CONFIG_BOOT_PRINTK_DELAY is not set + # CONFIG_RCU_TORTURE_TEST is not set ++# CONFIG_LKDTM is not set + # CONFIG_FAULT_INJECTION is not set +-# CONFIG_KPROBES is not set ++# CONFIG_SAMPLES is not set + + # + # Security options + # + # CONFIG_KEYS is not set + # CONFIG_SECURITY is not set +- +-# +-# Cryptographic options +-# +-# CONFIG_CRYPTO is not set ++# CONFIG_SECURITY_FILE_CAPABILITIES is not set ++CONFIG_CRYPTO=y ++CONFIG_CRYPTO_ALGAPI=m ++CONFIG_CRYPTO_BLKCIPHER=m ++CONFIG_CRYPTO_HASH=m ++CONFIG_CRYPTO_MANAGER=m ++CONFIG_CRYPTO_HMAC=m ++# CONFIG_CRYPTO_XCBC is not set ++# CONFIG_CRYPTO_NULL is not set ++# CONFIG_CRYPTO_MD4 is not set ++CONFIG_CRYPTO_MD5=m ++CONFIG_CRYPTO_SHA1=m ++# CONFIG_CRYPTO_SHA256 is not set ++# CONFIG_CRYPTO_SHA512 is not set ++# CONFIG_CRYPTO_WP512 is not set ++# CONFIG_CRYPTO_TGR192 is not set ++# CONFIG_CRYPTO_GF128MUL is not set ++# CONFIG_CRYPTO_ECB is not set ++CONFIG_CRYPTO_CBC=m ++# CONFIG_CRYPTO_PCBC is not set ++# CONFIG_CRYPTO_LRW is not set ++# CONFIG_CRYPTO_XTS is not set ++# CONFIG_CRYPTO_CRYPTD is not set ++CONFIG_CRYPTO_DES=m ++# CONFIG_CRYPTO_FCRYPT is not set ++# CONFIG_CRYPTO_BLOWFISH is not set ++# CONFIG_CRYPTO_TWOFISH is not set ++# CONFIG_CRYPTO_SERPENT is not set ++# CONFIG_CRYPTO_AES is not set ++# CONFIG_CRYPTO_CAST5 is not set ++# CONFIG_CRYPTO_CAST6 is not set ++# CONFIG_CRYPTO_TEA is not set ++# CONFIG_CRYPTO_ARC4 is not set ++# CONFIG_CRYPTO_KHAZAD is not set ++# CONFIG_CRYPTO_ANUBIS is not set ++# CONFIG_CRYPTO_SEED is not set ++CONFIG_CRYPTO_DEFLATE=m ++# CONFIG_CRYPTO_MICHAEL_MIC is not set ++# CONFIG_CRYPTO_CRC32C is not set ++# CONFIG_CRYPTO_CAMELLIA is not set ++# CONFIG_CRYPTO_TEST is not set ++# CONFIG_CRYPTO_AUTHENC is not set ++# CONFIG_CRYPTO_HW is not set + + # + # Library routines +@@ -794,10 +1129,10 @@ CONFIG_FORCED_INLINING=y + CONFIG_BITREVERSE=y + CONFIG_CRC_CCITT=m + # CONFIG_CRC16 is not set +-# CONFIG_CRC_ITU_T is not set ++CONFIG_CRC_ITU_T=m + CONFIG_CRC32=y ++CONFIG_CRC7=m + # CONFIG_LIBCRC32C is not set +-CONFIG_AUDIT_GENERIC=y + CONFIG_ZLIB_INFLATE=y + CONFIG_ZLIB_DEFLATE=y + CONFIG_PLIST=y +diff -Nrup linux-2.6.24/arch/avr32/configs/atstk1003_defconfig linux-avr32/arch/avr32/configs/atstk1003_defconfig +--- linux-2.6.24/arch/avr32/configs/atstk1003_defconfig 1969-12-31 19:00:00.000000000 -0500 ++++ linux-avr32/arch/avr32/configs/atstk1003_defconfig 2008-02-01 14:51:35.000000000 -0500 +@@ -0,0 +1,1015 @@ ++# ++# Automatically generated make config: don't edit ++# Linux kernel version: 2.6.24-rc7 ++# Wed Jan 9 22:54:34 2008 ++# ++CONFIG_AVR32=y ++CONFIG_GENERIC_GPIO=y ++CONFIG_GENERIC_HARDIRQS=y ++CONFIG_STACKTRACE_SUPPORT=y ++CONFIG_LOCKDEP_SUPPORT=y ++CONFIG_TRACE_IRQFLAGS_SUPPORT=y ++CONFIG_HARDIRQS_SW_RESEND=y ++CONFIG_GENERIC_IRQ_PROBE=y ++CONFIG_RWSEM_GENERIC_SPINLOCK=y ++CONFIG_GENERIC_TIME=y ++# CONFIG_RWSEM_XCHGADD_ALGORITHM is not set ++# CONFIG_ARCH_HAS_ILOG2_U32 is not set ++# CONFIG_ARCH_HAS_ILOG2_U64 is not set ++CONFIG_ARCH_SUPPORTS_OPROFILE=y ++CONFIG_GENERIC_HWEIGHT=y ++CONFIG_GENERIC_CALIBRATE_DELAY=y ++CONFIG_GENERIC_BUG=y ++CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" ++ ++# ++# General setup ++# ++CONFIG_EXPERIMENTAL=y ++CONFIG_BROKEN_ON_SMP=y ++CONFIG_INIT_ENV_ARG_LIMIT=32 ++CONFIG_LOCALVERSION="" ++# CONFIG_LOCALVERSION_AUTO is not set ++CONFIG_SWAP=y ++CONFIG_SYSVIPC=y ++CONFIG_SYSVIPC_SYSCTL=y ++CONFIG_POSIX_MQUEUE=y ++CONFIG_BSD_PROCESS_ACCT=y ++CONFIG_BSD_PROCESS_ACCT_V3=y ++CONFIG_TASKSTATS=y ++CONFIG_TASK_DELAY_ACCT=y ++# CONFIG_TASK_XACCT is not set ++# CONFIG_USER_NS is not set ++# CONFIG_PID_NS is not set ++CONFIG_AUDIT=y ++# CONFIG_IKCONFIG is not set ++CONFIG_LOG_BUF_SHIFT=14 ++# CONFIG_CGROUPS is not set ++CONFIG_FAIR_GROUP_SCHED=y ++CONFIG_FAIR_USER_SCHED=y ++# CONFIG_FAIR_CGROUP_SCHED is not set ++CONFIG_SYSFS_DEPRECATED=y ++CONFIG_RELAY=y ++CONFIG_BLK_DEV_INITRD=y ++CONFIG_INITRAMFS_SOURCE="" ++CONFIG_CC_OPTIMIZE_FOR_SIZE=y ++CONFIG_SYSCTL=y ++CONFIG_EMBEDDED=y ++# CONFIG_SYSCTL_SYSCALL is not set ++CONFIG_KALLSYMS=y ++# CONFIG_KALLSYMS_ALL is not set ++# CONFIG_KALLSYMS_EXTRA_PASS is not set ++CONFIG_HOTPLUG=y ++CONFIG_PRINTK=y ++CONFIG_BUG=y ++CONFIG_ELF_CORE=y ++# CONFIG_BASE_FULL is not set ++CONFIG_FUTEX=y ++CONFIG_ANON_INODES=y ++CONFIG_EPOLL=y ++CONFIG_SIGNALFD=y ++CONFIG_EVENTFD=y ++CONFIG_SHMEM=y ++CONFIG_VM_EVENT_COUNTERS=y ++# CONFIG_SLUB_DEBUG is not set ++# CONFIG_SLAB is not set ++CONFIG_SLUB=y ++# CONFIG_SLOB is not set ++CONFIG_SLABINFO=y ++CONFIG_RT_MUTEXES=y ++# CONFIG_TINY_SHMEM is not set ++CONFIG_BASE_SMALL=1 ++CONFIG_MODULES=y ++CONFIG_MODULE_UNLOAD=y ++# CONFIG_MODULE_FORCE_UNLOAD is not set ++# CONFIG_MODVERSIONS is not set ++# CONFIG_MODULE_SRCVERSION_ALL is not set ++# CONFIG_KMOD is not set ++CONFIG_BLOCK=y ++# CONFIG_LBD is not set ++# CONFIG_BLK_DEV_IO_TRACE is not set ++# CONFIG_LSF is not set ++# CONFIG_BLK_DEV_BSG is not set ++ ++# ++# IO Schedulers ++# ++CONFIG_IOSCHED_NOOP=y ++# CONFIG_IOSCHED_AS is not set ++# CONFIG_IOSCHED_DEADLINE is not set ++CONFIG_IOSCHED_CFQ=y ++# CONFIG_DEFAULT_AS is not set ++# CONFIG_DEFAULT_DEADLINE is not set ++CONFIG_DEFAULT_CFQ=y ++# CONFIG_DEFAULT_NOOP is not set ++CONFIG_DEFAULT_IOSCHED="cfq" ++ ++# ++# System Type and features ++# ++CONFIG_SUBARCH_AVR32B=y ++CONFIG_MMU=y ++CONFIG_PERFORMANCE_COUNTERS=y ++CONFIG_PLATFORM_AT32AP=y ++CONFIG_CPU_AT32AP700X=y ++CONFIG_CPU_AT32AP7001=y ++CONFIG_BOARD_ATSTK1000=y ++# CONFIG_BOARD_ATNGW100 is not set ++# CONFIG_BOARD_ATSTK1002 is not set ++CONFIG_BOARD_ATSTK1003=y ++# CONFIG_BOARD_ATSTK1004 is not set ++# CONFIG_BOARD_ATSTK100X_CUSTOM is not set ++# CONFIG_BOARD_ATSTK100X_SPI1 is not set ++# CONFIG_BOARD_ATSTK1000_J2_LED is not set ++# CONFIG_BOARD_ATSTK1000_J2_LED8 is not set ++# CONFIG_BOARD_ATSTK1000_J2_RGB is not set ++CONFIG_BOARD_ATSTK1000_EXTDAC=y ++CONFIG_LOADER_U_BOOT=y ++ ++# ++# Atmel AVR32 AP options ++# ++# CONFIG_AP700X_32_BIT_SMC is not set ++CONFIG_AP700X_16_BIT_SMC=y ++# CONFIG_AP700X_8_BIT_SMC is not set ++CONFIG_LOAD_ADDRESS=0x10000000 ++CONFIG_ENTRY_ADDRESS=0x90000000 ++CONFIG_PHYS_OFFSET=0x10000000 ++CONFIG_PREEMPT_NONE=y ++# CONFIG_PREEMPT_VOLUNTARY is not set ++# CONFIG_PREEMPT is not set ++# CONFIG_HAVE_ARCH_BOOTMEM_NODE is not set ++# CONFIG_ARCH_HAVE_MEMORY_PRESENT is not set ++# CONFIG_NEED_NODE_MEMMAP_SIZE is not set ++CONFIG_ARCH_FLATMEM_ENABLE=y ++# CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set ++# CONFIG_ARCH_SPARSEMEM_ENABLE is not set ++CONFIG_SELECT_MEMORY_MODEL=y ++CONFIG_FLATMEM_MANUAL=y ++# CONFIG_DISCONTIGMEM_MANUAL is not set ++# CONFIG_SPARSEMEM_MANUAL is not set ++CONFIG_FLATMEM=y ++CONFIG_FLAT_NODE_MEM_MAP=y ++# CONFIG_SPARSEMEM_STATIC is not set ++# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set ++CONFIG_SPLIT_PTLOCK_CPUS=4 ++# CONFIG_RESOURCES_64BIT is not set ++CONFIG_ZONE_DMA_FLAG=0 ++CONFIG_VIRT_TO_BUS=y ++# CONFIG_OWNERSHIP_TRACE is not set ++# CONFIG_HZ_100 is not set ++CONFIG_HZ_250=y ++# CONFIG_HZ_300 is not set ++# CONFIG_HZ_1000 is not set ++CONFIG_HZ=250 ++CONFIG_CMDLINE="" ++ ++# ++# Power management options ++# ++ ++# ++# CPU Frequency scaling ++# ++CONFIG_CPU_FREQ=y ++CONFIG_CPU_FREQ_TABLE=y ++# CONFIG_CPU_FREQ_DEBUG is not set ++# CONFIG_CPU_FREQ_STAT is not set ++CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y ++# CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set ++# CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND is not set ++# CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set ++CONFIG_CPU_FREQ_GOV_PERFORMANCE=y ++# CONFIG_CPU_FREQ_GOV_POWERSAVE is not set ++CONFIG_CPU_FREQ_GOV_USERSPACE=y ++CONFIG_CPU_FREQ_GOV_ONDEMAND=y ++# CONFIG_CPU_FREQ_GOV_CONSERVATIVE is not set ++CONFIG_CPU_FREQ_AT32AP=y ++ ++# ++# Bus options ++# ++# CONFIG_ARCH_SUPPORTS_MSI is not set ++# CONFIG_PCCARD is not set ++ ++# ++# Executable file formats ++# ++CONFIG_BINFMT_ELF=y ++# CONFIG_BINFMT_MISC is not set ++ ++# ++# Networking ++# ++CONFIG_NET=y ++ ++# ++# Networking options ++# ++CONFIG_PACKET=y ++CONFIG_PACKET_MMAP=y ++CONFIG_UNIX=y ++# CONFIG_NET_KEY is not set ++CONFIG_INET=y ++# CONFIG_IP_MULTICAST is not set ++# CONFIG_IP_ADVANCED_ROUTER is not set ++CONFIG_IP_FIB_HASH=y ++# CONFIG_IP_PNP is not set ++# CONFIG_NET_IPIP is not set ++# CONFIG_NET_IPGRE is not set ++# CONFIG_ARPD is not set ++# CONFIG_SYN_COOKIES is not set ++# CONFIG_INET_AH is not set ++# CONFIG_INET_ESP is not set ++# CONFIG_INET_IPCOMP is not set ++# CONFIG_INET_XFRM_TUNNEL is not set ++# CONFIG_INET_TUNNEL is not set ++# CONFIG_INET_XFRM_MODE_TRANSPORT is not set ++# CONFIG_INET_XFRM_MODE_TUNNEL is not set ++# CONFIG_INET_XFRM_MODE_BEET is not set ++# CONFIG_INET_LRO is not set ++# CONFIG_INET_DIAG is not set ++# CONFIG_TCP_CONG_ADVANCED is not set ++CONFIG_TCP_CONG_CUBIC=y ++CONFIG_DEFAULT_TCP_CONG="cubic" ++# CONFIG_TCP_MD5SIG is not set ++# CONFIG_IPV6 is not set ++# CONFIG_INET6_XFRM_TUNNEL is not set ++# CONFIG_INET6_TUNNEL is not set ++# CONFIG_NETWORK_SECMARK is not set ++# CONFIG_NETFILTER is not set ++# CONFIG_IP_DCCP is not set ++# CONFIG_IP_SCTP is not set ++# CONFIG_TIPC is not set ++# CONFIG_ATM is not set ++# CONFIG_BRIDGE is not set ++# CONFIG_VLAN_8021Q is not set ++# CONFIG_DECNET is not set ++# CONFIG_LLC2 is not set ++# CONFIG_IPX is not set ++# CONFIG_ATALK is not set ++# CONFIG_X25 is not set ++# CONFIG_LAPB is not set ++# CONFIG_ECONET is not set ++# CONFIG_WAN_ROUTER is not set ++# CONFIG_NET_SCHED is not set ++ ++# ++# Network testing ++# ++# CONFIG_NET_PKTGEN is not set ++# CONFIG_NET_TCPPROBE is not set ++# CONFIG_HAMRADIO is not set ++# CONFIG_IRDA is not set ++# CONFIG_BT is not set ++# CONFIG_AF_RXRPC is not set ++ ++# ++# Wireless ++# ++# CONFIG_CFG80211 is not set ++# CONFIG_WIRELESS_EXT is not set ++# CONFIG_MAC80211 is not set ++# CONFIG_IEEE80211 is not set ++# CONFIG_RFKILL is not set ++# CONFIG_NET_9P is not set ++ ++# ++# Device Drivers ++# ++ ++# ++# Generic Driver Options ++# ++CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" ++CONFIG_STANDALONE=y ++# CONFIG_PREVENT_FIRMWARE_BUILD is not set ++# CONFIG_FW_LOADER is not set ++# CONFIG_DEBUG_DRIVER is not set ++# CONFIG_DEBUG_DEVRES is not set ++# CONFIG_SYS_HYPERVISOR is not set ++# CONFIG_CONNECTOR is not set ++CONFIG_MTD=y ++# CONFIG_MTD_DEBUG is not set ++# CONFIG_MTD_CONCAT is not set ++CONFIG_MTD_PARTITIONS=y ++# CONFIG_MTD_REDBOOT_PARTS is not set ++CONFIG_MTD_CMDLINE_PARTS=y ++ ++# ++# User Modules And Translation Layers ++# ++CONFIG_MTD_CHAR=y ++CONFIG_MTD_BLKDEVS=y ++CONFIG_MTD_BLOCK=y ++# CONFIG_FTL is not set ++# CONFIG_NFTL is not set ++# CONFIG_INFTL is not set ++# CONFIG_RFD_FTL is not set ++# CONFIG_SSFDC is not set ++# CONFIG_MTD_OOPS is not set ++ ++# ++# RAM/ROM/Flash chip drivers ++# ++CONFIG_MTD_CFI=y ++# CONFIG_MTD_JEDECPROBE is not set ++CONFIG_MTD_GEN_PROBE=y ++# CONFIG_MTD_CFI_ADV_OPTIONS is not set ++CONFIG_MTD_MAP_BANK_WIDTH_1=y ++CONFIG_MTD_MAP_BANK_WIDTH_2=y ++CONFIG_MTD_MAP_BANK_WIDTH_4=y ++# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set ++# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set ++# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set ++CONFIG_MTD_CFI_I1=y ++CONFIG_MTD_CFI_I2=y ++# CONFIG_MTD_CFI_I4 is not set ++# CONFIG_MTD_CFI_I8 is not set ++# CONFIG_MTD_CFI_INTELEXT is not set ++CONFIG_MTD_CFI_AMDSTD=y ++# CONFIG_MTD_CFI_STAA is not set ++CONFIG_MTD_CFI_UTIL=y ++# CONFIG_MTD_RAM is not set ++# CONFIG_MTD_ROM is not set ++# CONFIG_MTD_ABSENT is not set ++ ++# ++# Mapping drivers for chip access ++# ++# CONFIG_MTD_COMPLEX_MAPPINGS is not set ++CONFIG_MTD_PHYSMAP=y ++CONFIG_MTD_PHYSMAP_START=0x8000000 ++CONFIG_MTD_PHYSMAP_LEN=0x0 ++CONFIG_MTD_PHYSMAP_BANKWIDTH=2 ++# CONFIG_MTD_PLATRAM is not set ++ ++# ++# Self-contained MTD device drivers ++# ++CONFIG_MTD_DATAFLASH=m ++CONFIG_MTD_M25P80=m ++# CONFIG_MTD_SLRAM is not set ++# CONFIG_MTD_PHRAM is not set ++# CONFIG_MTD_MTDRAM is not set ++# CONFIG_MTD_BLOCK2MTD is not set ++ ++# ++# Disk-On-Chip Device Drivers ++# ++# CONFIG_MTD_DOC2000 is not set ++# CONFIG_MTD_DOC2001 is not set ++# CONFIG_MTD_DOC2001PLUS is not set ++# CONFIG_MTD_NAND is not set ++# CONFIG_MTD_ONENAND is not set ++ ++# ++# UBI - Unsorted block images ++# ++# CONFIG_MTD_UBI is not set ++# CONFIG_PARPORT is not set ++CONFIG_BLK_DEV=y ++# CONFIG_BLK_DEV_COW_COMMON is not set ++CONFIG_BLK_DEV_LOOP=m ++# CONFIG_BLK_DEV_CRYPTOLOOP is not set ++CONFIG_BLK_DEV_NBD=m ++CONFIG_BLK_DEV_RAM=m ++CONFIG_BLK_DEV_RAM_COUNT=16 ++CONFIG_BLK_DEV_RAM_SIZE=4096 ++CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024 ++# CONFIG_CDROM_PKTCDVD is not set ++# CONFIG_ATA_OVER_ETH is not set ++CONFIG_MISC_DEVICES=y ++# CONFIG_EEPROM_93CX6 is not set ++CONFIG_ATMEL_SSC=m ++# CONFIG_IDE is not set ++ ++# ++# SCSI device support ++# ++# CONFIG_RAID_ATTRS is not set ++CONFIG_SCSI=m ++CONFIG_SCSI_DMA=y ++# CONFIG_SCSI_TGT is not set ++# CONFIG_SCSI_NETLINK is not set ++# CONFIG_SCSI_PROC_FS is not set ++ ++# ++# SCSI support type (disk, tape, CD-ROM) ++# ++CONFIG_BLK_DEV_SD=m ++# CONFIG_CHR_DEV_ST is not set ++# CONFIG_CHR_DEV_OSST is not set ++CONFIG_BLK_DEV_SR=m ++# CONFIG_BLK_DEV_SR_VENDOR is not set ++# CONFIG_CHR_DEV_SG is not set ++# CONFIG_CHR_DEV_SCH is not set ++ ++# ++# Some SCSI devices (e.g. CD jukebox) support multiple LUNs ++# ++# CONFIG_SCSI_MULTI_LUN is not set ++# CONFIG_SCSI_CONSTANTS is not set ++# CONFIG_SCSI_LOGGING is not set ++# CONFIG_SCSI_SCAN_ASYNC is not set ++CONFIG_SCSI_WAIT_SCAN=m ++ ++# ++# SCSI Transports ++# ++# CONFIG_SCSI_SPI_ATTRS is not set ++# CONFIG_SCSI_FC_ATTRS is not set ++# CONFIG_SCSI_ISCSI_ATTRS is not set ++# CONFIG_SCSI_SAS_LIBSAS is not set ++# CONFIG_SCSI_SRP_ATTRS is not set ++CONFIG_SCSI_LOWLEVEL=y ++# CONFIG_ISCSI_TCP is not set ++# CONFIG_SCSI_DEBUG is not set ++CONFIG_ATA=m ++# CONFIG_ATA_NONSTANDARD is not set ++CONFIG_PATA_AT32=m ++# CONFIG_PATA_PLATFORM is not set ++# CONFIG_MD is not set ++CONFIG_NETDEVICES=y ++# CONFIG_NETDEVICES_MULTIQUEUE is not set ++# CONFIG_DUMMY is not set ++# CONFIG_BONDING is not set ++# CONFIG_MACVLAN is not set ++# CONFIG_EQUALIZER is not set ++# CONFIG_TUN is not set ++# CONFIG_VETH is not set ++# CONFIG_NET_ETHERNET is not set ++# CONFIG_NETDEV_1000 is not set ++# CONFIG_NETDEV_10000 is not set ++ ++# ++# Wireless LAN ++# ++# CONFIG_WLAN_PRE80211 is not set ++# CONFIG_WLAN_80211 is not set ++# CONFIG_WAN is not set ++CONFIG_PPP=m ++# CONFIG_PPP_MULTILINK is not set ++# CONFIG_PPP_FILTER is not set ++CONFIG_PPP_ASYNC=m ++# CONFIG_PPP_SYNC_TTY is not set ++CONFIG_PPP_DEFLATE=m ++CONFIG_PPP_BSDCOMP=m ++# CONFIG_PPP_MPPE is not set ++# CONFIG_PPPOE is not set ++# CONFIG_PPPOL2TP is not set ++# CONFIG_SLIP is not set ++CONFIG_SLHC=m ++# CONFIG_SHAPER is not set ++# CONFIG_NETCONSOLE is not set ++# CONFIG_NETPOLL is not set ++# CONFIG_NET_POLL_CONTROLLER is not set ++# CONFIG_ISDN is not set ++# CONFIG_PHONE is not set ++ ++# ++# Input device support ++# ++CONFIG_INPUT=m ++# CONFIG_INPUT_FF_MEMLESS is not set ++CONFIG_INPUT_POLLDEV=m ++ ++# ++# Userland interfaces ++# ++CONFIG_INPUT_MOUSEDEV=m ++CONFIG_INPUT_MOUSEDEV_PSAUX=y ++CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 ++CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 ++# CONFIG_INPUT_JOYDEV is not set ++# CONFIG_INPUT_EVDEV is not set ++# CONFIG_INPUT_EVBUG is not set ++ ++# ++# Input Device Drivers ++# ++CONFIG_INPUT_KEYBOARD=y ++# CONFIG_KEYBOARD_ATKBD is not set ++# CONFIG_KEYBOARD_SUNKBD is not set ++# CONFIG_KEYBOARD_LKKBD is not set ++# CONFIG_KEYBOARD_XTKBD is not set ++# CONFIG_KEYBOARD_NEWTON is not set ++# CONFIG_KEYBOARD_STOWAWAY is not set ++CONFIG_KEYBOARD_GPIO=m ++CONFIG_INPUT_MOUSE=y ++# CONFIG_MOUSE_PS2 is not set ++# CONFIG_MOUSE_SERIAL is not set ++# CONFIG_MOUSE_VSXXXAA is not set ++CONFIG_MOUSE_GPIO=m ++# CONFIG_INPUT_JOYSTICK is not set ++# CONFIG_INPUT_TABLET is not set ++# CONFIG_INPUT_TOUCHSCREEN is not set ++# CONFIG_INPUT_MISC is not set ++ ++# ++# Hardware I/O ports ++# ++# CONFIG_SERIO is not set ++# CONFIG_GAMEPORT is not set ++ ++# ++# Character devices ++# ++# CONFIG_VT is not set ++# CONFIG_SERIAL_NONSTANDARD is not set ++ ++# ++# Serial drivers ++# ++# CONFIG_SERIAL_8250 is not set ++ ++# ++# Non-8250 serial port support ++# ++CONFIG_SERIAL_ATMEL=y ++CONFIG_SERIAL_ATMEL_CONSOLE=y ++# CONFIG_SERIAL_ATMEL_TTYAT is not set ++CONFIG_SERIAL_CORE=y ++CONFIG_SERIAL_CORE_CONSOLE=y ++CONFIG_UNIX98_PTYS=y ++# CONFIG_LEGACY_PTYS is not set ++# CONFIG_IPMI_HANDLER is not set ++# CONFIG_HW_RANDOM is not set ++# CONFIG_RTC is not set ++# CONFIG_GEN_RTC is not set ++# CONFIG_R3964 is not set ++# CONFIG_RAW_DRIVER is not set ++# CONFIG_TCG_TPM is not set ++CONFIG_I2C=m ++CONFIG_I2C_BOARDINFO=y ++CONFIG_I2C_CHARDEV=m ++ ++# ++# I2C Algorithms ++# ++CONFIG_I2C_ALGOBIT=m ++# CONFIG_I2C_ALGOPCF is not set ++# CONFIG_I2C_ALGOPCA is not set ++ ++# ++# I2C Hardware Bus support ++# ++CONFIG_I2C_GPIO=m ++# CONFIG_I2C_OCORES is not set ++# CONFIG_I2C_PARPORT_LIGHT is not set ++# CONFIG_I2C_SIMTEC is not set ++# CONFIG_I2C_TAOS_EVM is not set ++# CONFIG_I2C_STUB is not set ++ ++# ++# Miscellaneous I2C Chip support ++# ++# CONFIG_SENSORS_DS1337 is not set ++# CONFIG_SENSORS_DS1374 is not set ++# CONFIG_DS1682 is not set ++# CONFIG_SENSORS_EEPROM is not set ++# CONFIG_SENSORS_PCF8574 is not set ++# CONFIG_SENSORS_PCA9539 is not set ++# CONFIG_SENSORS_PCF8591 is not set ++# CONFIG_SENSORS_MAX6875 is not set ++# CONFIG_SENSORS_TSL2550 is not set ++# CONFIG_I2C_DEBUG_CORE is not set ++# CONFIG_I2C_DEBUG_ALGO is not set ++# CONFIG_I2C_DEBUG_BUS is not set ++# CONFIG_I2C_DEBUG_CHIP is not set ++ ++# ++# SPI support ++# ++CONFIG_SPI=y ++# CONFIG_SPI_DEBUG is not set ++CONFIG_SPI_MASTER=y ++ ++# ++# SPI Master Controller Drivers ++# ++CONFIG_SPI_ATMEL=y ++# CONFIG_SPI_BITBANG is not set ++ ++# ++# SPI Protocol Masters ++# ++# CONFIG_SPI_AT25 is not set ++CONFIG_SPI_SPIDEV=m ++# CONFIG_SPI_TLE62X0 is not set ++# CONFIG_W1 is not set ++# CONFIG_POWER_SUPPLY is not set ++# CONFIG_HWMON is not set ++CONFIG_WATCHDOG=y ++# CONFIG_WATCHDOG_NOWAYOUT is not set ++ ++# ++# Watchdog Device Drivers ++# ++# CONFIG_SOFT_WATCHDOG is not set ++CONFIG_AT32AP700X_WDT=y ++ ++# ++# Sonics Silicon Backplane ++# ++CONFIG_SSB_POSSIBLE=y ++# CONFIG_SSB is not set ++ ++# ++# Multifunction device drivers ++# ++# CONFIG_MFD_SM501 is not set ++ ++# ++# Multimedia devices ++# ++# CONFIG_VIDEO_DEV is not set ++# CONFIG_DVB_CORE is not set ++# CONFIG_DAB is not set ++ ++# ++# Graphics support ++# ++# CONFIG_VGASTATE is not set ++# CONFIG_VIDEO_OUTPUT_CONTROL is not set ++# CONFIG_FB is not set ++# CONFIG_BACKLIGHT_LCD_SUPPORT is not set ++ ++# ++# Display device support ++# ++# CONFIG_DISPLAY_SUPPORT is not set ++ ++# ++# Sound ++# ++CONFIG_SOUND=m ++ ++# ++# Advanced Linux Sound Architecture ++# ++CONFIG_SND=m ++CONFIG_SND_TIMER=m ++CONFIG_SND_PCM=m ++# CONFIG_SND_SEQUENCER is not set ++CONFIG_SND_OSSEMUL=y ++CONFIG_SND_MIXER_OSS=m ++CONFIG_SND_PCM_OSS=m ++CONFIG_SND_PCM_OSS_PLUGINS=y ++# CONFIG_SND_DYNAMIC_MINORS is not set ++CONFIG_SND_SUPPORT_OLD_API=y ++CONFIG_SND_VERBOSE_PROCFS=y ++# CONFIG_SND_VERBOSE_PRINTK is not set ++# CONFIG_SND_DEBUG is not set ++ ++# ++# Generic devices ++# ++# CONFIG_SND_DUMMY is not set ++# CONFIG_SND_MTPAV is not set ++# CONFIG_SND_SERIAL_U16550 is not set ++# CONFIG_SND_MPU401 is not set ++ ++# ++# SPI devices ++# ++CONFIG_SND_AT73C213=m ++CONFIG_SND_AT73C213_TARGET_BITRATE=48000 ++ ++# ++# System on Chip audio support ++# ++# CONFIG_SND_SOC is not set ++ ++# ++# SoC Audio support for SuperH ++# ++ ++# ++# Open Sound System ++# ++# CONFIG_SOUND_PRIME is not set ++# CONFIG_HID_SUPPORT is not set ++CONFIG_USB_SUPPORT=y ++# CONFIG_USB_ARCH_HAS_HCD is not set ++# CONFIG_USB_ARCH_HAS_OHCI is not set ++# CONFIG_USB_ARCH_HAS_EHCI is not set ++ ++# ++# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' ++# ++ ++# ++# USB Gadget Support ++# ++CONFIG_USB_GADGET=y ++# CONFIG_USB_GADGET_DEBUG is not set ++# CONFIG_USB_GADGET_DEBUG_FILES is not set ++CONFIG_USB_GADGET_DEBUG_FS=y ++CONFIG_USB_GADGET_SELECTED=y ++# CONFIG_USB_GADGET_AMD5536UDC is not set ++CONFIG_USB_GADGET_ATMEL_USBA=y ++CONFIG_USB_ATMEL_USBA=y ++# CONFIG_USB_GADGET_FSL_USB2 is not set ++# CONFIG_USB_GADGET_NET2280 is not set ++# CONFIG_USB_GADGET_PXA2XX is not set ++# CONFIG_USB_GADGET_M66592 is not set ++# CONFIG_USB_GADGET_GOKU is not set ++# CONFIG_USB_GADGET_LH7A40X is not set ++# CONFIG_USB_GADGET_OMAP is not set ++# CONFIG_USB_GADGET_S3C2410 is not set ++# CONFIG_USB_GADGET_AT91 is not set ++# CONFIG_USB_GADGET_DUMMY_HCD is not set ++CONFIG_USB_GADGET_DUALSPEED=y ++CONFIG_USB_ZERO=m ++CONFIG_USB_ETH=m ++CONFIG_USB_ETH_RNDIS=y ++CONFIG_USB_GADGETFS=m ++CONFIG_USB_FILE_STORAGE=m ++# CONFIG_USB_FILE_STORAGE_TEST is not set ++CONFIG_USB_G_SERIAL=m ++# CONFIG_USB_MIDI_GADGET is not set ++CONFIG_MMC=m ++# CONFIG_MMC_DEBUG is not set ++# CONFIG_MMC_UNSAFE_RESUME is not set ++ ++# ++# MMC/SD Card Drivers ++# ++CONFIG_MMC_BLOCK=m ++# CONFIG_MMC_BLOCK_BOUNCE is not set ++# CONFIG_SDIO_UART is not set ++ ++# ++# MMC/SD Host Controller Drivers ++# ++CONFIG_MMC_SPI=m ++CONFIG_NEW_LEDS=y ++CONFIG_LEDS_CLASS=y ++ ++# ++# LED drivers ++# ++CONFIG_LEDS_GPIO=y ++ ++# ++# LED Triggers ++# ++CONFIG_LEDS_TRIGGERS=y ++CONFIG_LEDS_TRIGGER_TIMER=y ++CONFIG_LEDS_TRIGGER_HEARTBEAT=y ++CONFIG_RTC_LIB=y ++CONFIG_RTC_CLASS=y ++CONFIG_RTC_HCTOSYS=y ++CONFIG_RTC_HCTOSYS_DEVICE="rtc0" ++# CONFIG_RTC_DEBUG is not set ++ ++# ++# RTC interfaces ++# ++CONFIG_RTC_INTF_SYSFS=y ++CONFIG_RTC_INTF_PROC=y ++CONFIG_RTC_INTF_DEV=y ++# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set ++# CONFIG_RTC_DRV_TEST is not set ++ ++# ++# I2C RTC drivers ++# ++# CONFIG_RTC_DRV_DS1307 is not set ++# CONFIG_RTC_DRV_DS1374 is not set ++# CONFIG_RTC_DRV_DS1672 is not set ++# CONFIG_RTC_DRV_MAX6900 is not set ++# CONFIG_RTC_DRV_RS5C372 is not set ++# CONFIG_RTC_DRV_ISL1208 is not set ++# CONFIG_RTC_DRV_X1205 is not set ++# CONFIG_RTC_DRV_PCF8563 is not set ++# CONFIG_RTC_DRV_PCF8583 is not set ++# CONFIG_RTC_DRV_M41T80 is not set ++ ++# ++# SPI RTC drivers ++# ++# CONFIG_RTC_DRV_RS5C348 is not set ++# CONFIG_RTC_DRV_MAX6902 is not set ++ ++# ++# Platform RTC drivers ++# ++# CONFIG_RTC_DRV_DS1553 is not set ++# CONFIG_RTC_DRV_STK17TA8 is not set ++# CONFIG_RTC_DRV_DS1742 is not set ++# CONFIG_RTC_DRV_M48T86 is not set ++# CONFIG_RTC_DRV_M48T59 is not set ++# CONFIG_RTC_DRV_V3020 is not set ++ ++# ++# on-CPU RTC drivers ++# ++CONFIG_RTC_DRV_AT32AP700X=y ++ ++# ++# Userspace I/O ++# ++CONFIG_UIO=m ++ ++# ++# File systems ++# ++CONFIG_EXT2_FS=m ++# CONFIG_EXT2_FS_XATTR is not set ++# CONFIG_EXT2_FS_XIP is not set ++CONFIG_EXT3_FS=m ++# CONFIG_EXT3_FS_XATTR is not set ++# CONFIG_EXT4DEV_FS is not set ++CONFIG_JBD=m ++# CONFIG_JBD_DEBUG is not set ++# CONFIG_REISERFS_FS is not set ++# CONFIG_JFS_FS is not set ++# CONFIG_FS_POSIX_ACL is not set ++# CONFIG_XFS_FS is not set ++# CONFIG_GFS2_FS is not set ++# CONFIG_OCFS2_FS is not set ++# CONFIG_MINIX_FS is not set ++# CONFIG_ROMFS_FS is not set ++CONFIG_INOTIFY=y ++CONFIG_INOTIFY_USER=y ++# CONFIG_QUOTA is not set ++# CONFIG_DNOTIFY is not set ++# CONFIG_AUTOFS_FS is not set ++# CONFIG_AUTOFS4_FS is not set ++CONFIG_FUSE_FS=m ++ ++# ++# CD-ROM/DVD Filesystems ++# ++# CONFIG_ISO9660_FS is not set ++# CONFIG_UDF_FS is not set ++ ++# ++# DOS/FAT/NT Filesystems ++# ++CONFIG_FAT_FS=m ++CONFIG_MSDOS_FS=m ++CONFIG_VFAT_FS=m ++CONFIG_FAT_DEFAULT_CODEPAGE=437 ++CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" ++# CONFIG_NTFS_FS is not set ++ ++# ++# Pseudo filesystems ++# ++CONFIG_PROC_FS=y ++CONFIG_PROC_KCORE=y ++CONFIG_PROC_SYSCTL=y ++CONFIG_SYSFS=y ++CONFIG_TMPFS=y ++# CONFIG_TMPFS_POSIX_ACL is not set ++# CONFIG_HUGETLB_PAGE is not set ++CONFIG_CONFIGFS_FS=m ++ ++# ++# Miscellaneous filesystems ++# ++# CONFIG_ADFS_FS is not set ++# CONFIG_AFFS_FS is not set ++# CONFIG_HFS_FS is not set ++# CONFIG_HFSPLUS_FS is not set ++# CONFIG_BEFS_FS is not set ++# CONFIG_BFS_FS is not set ++# CONFIG_EFS_FS is not set ++CONFIG_JFFS2_FS=y ++CONFIG_JFFS2_FS_DEBUG=0 ++CONFIG_JFFS2_FS_WRITEBUFFER=y ++# CONFIG_JFFS2_FS_WBUF_VERIFY is not set ++# CONFIG_JFFS2_SUMMARY is not set ++# CONFIG_JFFS2_FS_XATTR is not set ++# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set ++CONFIG_JFFS2_ZLIB=y ++# CONFIG_JFFS2_LZO is not set ++CONFIG_JFFS2_RTIME=y ++# CONFIG_JFFS2_RUBIN is not set ++# CONFIG_CRAMFS is not set ++# CONFIG_VXFS_FS is not set ++# CONFIG_HPFS_FS is not set ++# CONFIG_QNX4FS_FS is not set ++# CONFIG_SYSV_FS is not set ++# CONFIG_UFS_FS is not set ++# CONFIG_NETWORK_FILESYSTEMS is not set ++ ++# ++# Partition Types ++# ++# CONFIG_PARTITION_ADVANCED is not set ++CONFIG_MSDOS_PARTITION=y ++CONFIG_NLS=m ++CONFIG_NLS_DEFAULT="iso8859-1" ++CONFIG_NLS_CODEPAGE_437=m ++# CONFIG_NLS_CODEPAGE_737 is not set ++# CONFIG_NLS_CODEPAGE_775 is not set ++# CONFIG_NLS_CODEPAGE_850 is not set ++# CONFIG_NLS_CODEPAGE_852 is not set ++# CONFIG_NLS_CODEPAGE_855 is not set ++# CONFIG_NLS_CODEPAGE_857 is not set ++# CONFIG_NLS_CODEPAGE_860 is not set ++# CONFIG_NLS_CODEPAGE_861 is not set ++# CONFIG_NLS_CODEPAGE_862 is not set ++# CONFIG_NLS_CODEPAGE_863 is not set ++# CONFIG_NLS_CODEPAGE_864 is not set ++# CONFIG_NLS_CODEPAGE_865 is not set ++# CONFIG_NLS_CODEPAGE_866 is not set ++# CONFIG_NLS_CODEPAGE_869 is not set ++# CONFIG_NLS_CODEPAGE_936 is not set ++# CONFIG_NLS_CODEPAGE_950 is not set ++# CONFIG_NLS_CODEPAGE_932 is not set ++# CONFIG_NLS_CODEPAGE_949 is not set ++# CONFIG_NLS_CODEPAGE_874 is not set ++# CONFIG_NLS_ISO8859_8 is not set ++# CONFIG_NLS_CODEPAGE_1250 is not set ++# CONFIG_NLS_CODEPAGE_1251 is not set ++# CONFIG_NLS_ASCII is not set ++CONFIG_NLS_ISO8859_1=m ++# CONFIG_NLS_ISO8859_2 is not set ++# CONFIG_NLS_ISO8859_3 is not set ++# CONFIG_NLS_ISO8859_4 is not set ++# CONFIG_NLS_ISO8859_5 is not set ++# CONFIG_NLS_ISO8859_6 is not set ++# CONFIG_NLS_ISO8859_7 is not set ++# CONFIG_NLS_ISO8859_9 is not set ++# CONFIG_NLS_ISO8859_13 is not set ++# CONFIG_NLS_ISO8859_14 is not set ++# CONFIG_NLS_ISO8859_15 is not set ++# CONFIG_NLS_KOI8_R is not set ++# CONFIG_NLS_KOI8_U is not set ++CONFIG_NLS_UTF8=m ++# CONFIG_DLM is not set ++CONFIG_INSTRUMENTATION=y ++CONFIG_PROFILING=y ++CONFIG_OPROFILE=m ++CONFIG_KPROBES=y ++# CONFIG_MARKERS is not set ++ ++# ++# Kernel hacking ++# ++# CONFIG_PRINTK_TIME is not set ++CONFIG_ENABLE_WARN_DEPRECATED=y ++CONFIG_ENABLE_MUST_CHECK=y ++CONFIG_MAGIC_SYSRQ=y ++# CONFIG_UNUSED_SYMBOLS is not set ++CONFIG_DEBUG_FS=y ++# CONFIG_HEADERS_CHECK is not set ++CONFIG_DEBUG_KERNEL=y ++# CONFIG_DEBUG_SHIRQ is not set ++CONFIG_DETECT_SOFTLOCKUP=y ++CONFIG_SCHED_DEBUG=y ++# CONFIG_SCHEDSTATS is not set ++# CONFIG_TIMER_STATS is not set ++# CONFIG_DEBUG_RT_MUTEXES is not set ++# CONFIG_RT_MUTEX_TESTER is not set ++# CONFIG_DEBUG_SPINLOCK is not set ++# CONFIG_DEBUG_MUTEXES is not set ++# CONFIG_DEBUG_LOCK_ALLOC is not set ++# CONFIG_PROVE_LOCKING is not set ++# CONFIG_LOCK_STAT is not set ++# CONFIG_DEBUG_SPINLOCK_SLEEP is not set ++# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set ++# CONFIG_DEBUG_KOBJECT is not set ++CONFIG_DEBUG_BUGVERBOSE=y ++# CONFIG_DEBUG_INFO is not set ++# CONFIG_DEBUG_VM is not set ++# CONFIG_DEBUG_LIST is not set ++# CONFIG_DEBUG_SG is not set ++CONFIG_FRAME_POINTER=y ++CONFIG_FORCED_INLINING=y ++# CONFIG_BOOT_PRINTK_DELAY is not set ++# CONFIG_RCU_TORTURE_TEST is not set ++# CONFIG_LKDTM is not set ++# CONFIG_FAULT_INJECTION is not set ++# CONFIG_SAMPLES is not set ++ ++# ++# Security options ++# ++# CONFIG_KEYS is not set ++# CONFIG_SECURITY is not set ++# CONFIG_SECURITY_FILE_CAPABILITIES is not set ++# CONFIG_CRYPTO is not set ++ ++# ++# Library routines ++# ++CONFIG_BITREVERSE=y ++CONFIG_CRC_CCITT=m ++# CONFIG_CRC16 is not set ++CONFIG_CRC_ITU_T=m ++CONFIG_CRC32=y ++CONFIG_CRC7=m ++# CONFIG_LIBCRC32C is not set ++CONFIG_AUDIT_GENERIC=y ++CONFIG_ZLIB_INFLATE=y ++CONFIG_ZLIB_DEFLATE=y ++CONFIG_PLIST=y ++CONFIG_HAS_IOMEM=y ++CONFIG_HAS_IOPORT=y ++CONFIG_HAS_DMA=y +diff -Nrup linux-2.6.24/arch/avr32/configs/atstk1004_defconfig linux-avr32/arch/avr32/configs/atstk1004_defconfig +--- linux-2.6.24/arch/avr32/configs/atstk1004_defconfig 1969-12-31 19:00:00.000000000 -0500 ++++ linux-avr32/arch/avr32/configs/atstk1004_defconfig 2008-02-01 14:51:35.000000000 -0500 +@@ -0,0 +1,621 @@ ++# ++# Automatically generated make config: don't edit ++# Linux kernel version: 2.6.24-rc7 ++# Wed Jan 9 23:04:20 2008 ++# ++CONFIG_AVR32=y ++CONFIG_GENERIC_GPIO=y ++CONFIG_GENERIC_HARDIRQS=y ++CONFIG_STACKTRACE_SUPPORT=y ++CONFIG_LOCKDEP_SUPPORT=y ++CONFIG_TRACE_IRQFLAGS_SUPPORT=y ++CONFIG_HARDIRQS_SW_RESEND=y ++CONFIG_GENERIC_IRQ_PROBE=y ++CONFIG_RWSEM_GENERIC_SPINLOCK=y ++CONFIG_GENERIC_TIME=y ++# CONFIG_RWSEM_XCHGADD_ALGORITHM is not set ++# CONFIG_ARCH_HAS_ILOG2_U32 is not set ++# CONFIG_ARCH_HAS_ILOG2_U64 is not set ++CONFIG_ARCH_SUPPORTS_OPROFILE=y ++CONFIG_GENERIC_HWEIGHT=y ++CONFIG_GENERIC_CALIBRATE_DELAY=y ++CONFIG_GENERIC_BUG=y ++CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" ++ ++# ++# General setup ++# ++CONFIG_EXPERIMENTAL=y ++CONFIG_BROKEN_ON_SMP=y ++CONFIG_INIT_ENV_ARG_LIMIT=32 ++CONFIG_LOCALVERSION="" ++# CONFIG_LOCALVERSION_AUTO is not set ++# CONFIG_SYSVIPC is not set ++# CONFIG_POSIX_MQUEUE is not set ++# CONFIG_BSD_PROCESS_ACCT is not set ++# CONFIG_TASKSTATS is not set ++# CONFIG_USER_NS is not set ++# CONFIG_PID_NS is not set ++# CONFIG_AUDIT is not set ++# CONFIG_IKCONFIG is not set ++CONFIG_LOG_BUF_SHIFT=14 ++# CONFIG_CGROUPS is not set ++# CONFIG_FAIR_GROUP_SCHED is not set ++CONFIG_SYSFS_DEPRECATED=y ++# CONFIG_RELAY is not set ++# CONFIG_BLK_DEV_INITRD is not set ++CONFIG_CC_OPTIMIZE_FOR_SIZE=y ++CONFIG_SYSCTL=y ++CONFIG_EMBEDDED=y ++# CONFIG_SYSCTL_SYSCALL is not set ++CONFIG_KALLSYMS=y ++# CONFIG_KALLSYMS_EXTRA_PASS is not set ++CONFIG_HOTPLUG=y ++CONFIG_PRINTK=y ++CONFIG_BUG=y ++CONFIG_ELF_CORE=y ++# CONFIG_BASE_FULL is not set ++# CONFIG_FUTEX is not set ++# CONFIG_EPOLL is not set ++# CONFIG_SIGNALFD is not set ++# CONFIG_EVENTFD is not set ++CONFIG_SHMEM=y ++CONFIG_VM_EVENT_COUNTERS=y ++# CONFIG_SLAB is not set ++# CONFIG_SLUB is not set ++CONFIG_SLOB=y ++# CONFIG_TINY_SHMEM is not set ++CONFIG_BASE_SMALL=1 ++# CONFIG_MODULES is not set ++# CONFIG_BLOCK is not set ++ ++# ++# System Type and features ++# ++CONFIG_SUBARCH_AVR32B=y ++CONFIG_MMU=y ++CONFIG_PERFORMANCE_COUNTERS=y ++CONFIG_PLATFORM_AT32AP=y ++CONFIG_CPU_AT32AP700X=y ++CONFIG_CPU_AT32AP7002=y ++CONFIG_BOARD_ATSTK1000=y ++# CONFIG_BOARD_ATNGW100 is not set ++# CONFIG_BOARD_ATSTK1002 is not set ++# CONFIG_BOARD_ATSTK1003 is not set ++CONFIG_BOARD_ATSTK1004=y ++# CONFIG_BOARD_ATSTK100X_CUSTOM is not set ++# CONFIG_BOARD_ATSTK100X_SPI1 is not set ++# CONFIG_BOARD_ATSTK1000_J2_LED is not set ++CONFIG_BOARD_ATSTK1000_EXTDAC=y ++CONFIG_LOADER_U_BOOT=y ++ ++# ++# Atmel AVR32 AP options ++# ++# CONFIG_AP700X_32_BIT_SMC is not set ++CONFIG_AP700X_16_BIT_SMC=y ++# CONFIG_AP700X_8_BIT_SMC is not set ++CONFIG_LOAD_ADDRESS=0x10000000 ++CONFIG_ENTRY_ADDRESS=0x90000000 ++CONFIG_PHYS_OFFSET=0x10000000 ++CONFIG_PREEMPT_NONE=y ++# CONFIG_PREEMPT_VOLUNTARY is not set ++# CONFIG_PREEMPT is not set ++# CONFIG_HAVE_ARCH_BOOTMEM_NODE is not set ++# CONFIG_ARCH_HAVE_MEMORY_PRESENT is not set ++# CONFIG_NEED_NODE_MEMMAP_SIZE is not set ++CONFIG_ARCH_FLATMEM_ENABLE=y ++# CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set ++# CONFIG_ARCH_SPARSEMEM_ENABLE is not set ++CONFIG_SELECT_MEMORY_MODEL=y ++CONFIG_FLATMEM_MANUAL=y ++# CONFIG_DISCONTIGMEM_MANUAL is not set ++# CONFIG_SPARSEMEM_MANUAL is not set ++CONFIG_FLATMEM=y ++CONFIG_FLAT_NODE_MEM_MAP=y ++# CONFIG_SPARSEMEM_STATIC is not set ++# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set ++CONFIG_SPLIT_PTLOCK_CPUS=4 ++# CONFIG_RESOURCES_64BIT is not set ++CONFIG_ZONE_DMA_FLAG=0 ++CONFIG_VIRT_TO_BUS=y ++# CONFIG_OWNERSHIP_TRACE is not set ++# CONFIG_HZ_100 is not set ++CONFIG_HZ_250=y ++# CONFIG_HZ_300 is not set ++# CONFIG_HZ_1000 is not set ++CONFIG_HZ=250 ++CONFIG_CMDLINE="" ++ ++# ++# Power management options ++# ++ ++# ++# CPU Frequency scaling ++# ++CONFIG_CPU_FREQ=y ++CONFIG_CPU_FREQ_TABLE=y ++# CONFIG_CPU_FREQ_DEBUG is not set ++# CONFIG_CPU_FREQ_STAT is not set ++CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y ++# CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set ++# CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND is not set ++# CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set ++CONFIG_CPU_FREQ_GOV_PERFORMANCE=y ++# CONFIG_CPU_FREQ_GOV_POWERSAVE is not set ++CONFIG_CPU_FREQ_GOV_USERSPACE=y ++CONFIG_CPU_FREQ_GOV_ONDEMAND=y ++# CONFIG_CPU_FREQ_GOV_CONSERVATIVE is not set ++CONFIG_CPU_FREQ_AT32AP=y ++ ++# ++# Bus options ++# ++# CONFIG_ARCH_SUPPORTS_MSI is not set ++# CONFIG_PCCARD is not set ++ ++# ++# Executable file formats ++# ++CONFIG_BINFMT_ELF=y ++# CONFIG_BINFMT_MISC is not set ++ ++# ++# Networking ++# ++CONFIG_NET=y ++ ++# ++# Networking options ++# ++CONFIG_PACKET=y ++CONFIG_PACKET_MMAP=y ++CONFIG_UNIX=y ++# CONFIG_NET_KEY is not set ++CONFIG_INET=y ++# CONFIG_IP_MULTICAST is not set ++# CONFIG_IP_ADVANCED_ROUTER is not set ++CONFIG_IP_FIB_HASH=y ++# CONFIG_IP_PNP is not set ++# CONFIG_NET_IPIP is not set ++# CONFIG_NET_IPGRE is not set ++# CONFIG_ARPD is not set ++# CONFIG_SYN_COOKIES is not set ++# CONFIG_INET_AH is not set ++# CONFIG_INET_ESP is not set ++# CONFIG_INET_IPCOMP is not set ++# CONFIG_INET_XFRM_TUNNEL is not set ++# CONFIG_INET_TUNNEL is not set ++# CONFIG_INET_XFRM_MODE_TRANSPORT is not set ++# CONFIG_INET_XFRM_MODE_TUNNEL is not set ++# CONFIG_INET_XFRM_MODE_BEET is not set ++# CONFIG_INET_LRO is not set ++# CONFIG_INET_DIAG is not set ++# CONFIG_TCP_CONG_ADVANCED is not set ++CONFIG_TCP_CONG_CUBIC=y ++CONFIG_DEFAULT_TCP_CONG="cubic" ++# CONFIG_TCP_MD5SIG is not set ++# CONFIG_IPV6 is not set ++# CONFIG_INET6_XFRM_TUNNEL is not set ++# CONFIG_INET6_TUNNEL is not set ++# CONFIG_NETWORK_SECMARK is not set ++# CONFIG_NETFILTER is not set ++# CONFIG_IP_DCCP is not set ++# CONFIG_IP_SCTP is not set ++# CONFIG_TIPC is not set ++# CONFIG_ATM is not set ++# CONFIG_BRIDGE is not set ++# CONFIG_VLAN_8021Q is not set ++# CONFIG_DECNET is not set ++# CONFIG_LLC2 is not set ++# CONFIG_IPX is not set ++# CONFIG_ATALK is not set ++# CONFIG_X25 is not set ++# CONFIG_LAPB is not set ++# CONFIG_ECONET is not set ++# CONFIG_WAN_ROUTER is not set ++# CONFIG_NET_SCHED is not set ++ ++# ++# Network testing ++# ++# CONFIG_NET_PKTGEN is not set ++# CONFIG_HAMRADIO is not set ++# CONFIG_IRDA is not set ++# CONFIG_BT is not set ++# CONFIG_AF_RXRPC is not set ++ ++# ++# Wireless ++# ++# CONFIG_CFG80211 is not set ++# CONFIG_WIRELESS_EXT is not set ++# CONFIG_MAC80211 is not set ++# CONFIG_IEEE80211 is not set ++# CONFIG_RFKILL is not set ++# CONFIG_NET_9P is not set ++ ++# ++# Device Drivers ++# ++ ++# ++# Generic Driver Options ++# ++CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" ++CONFIG_STANDALONE=y ++# CONFIG_PREVENT_FIRMWARE_BUILD is not set ++# CONFIG_FW_LOADER is not set ++# CONFIG_SYS_HYPERVISOR is not set ++# CONFIG_CONNECTOR is not set ++CONFIG_MTD=y ++# CONFIG_MTD_DEBUG is not set ++# CONFIG_MTD_CONCAT is not set ++CONFIG_MTD_PARTITIONS=y ++# CONFIG_MTD_REDBOOT_PARTS is not set ++CONFIG_MTD_CMDLINE_PARTS=y ++ ++# ++# User Modules And Translation Layers ++# ++CONFIG_MTD_CHAR=y ++# CONFIG_MTD_OOPS is not set ++ ++# ++# RAM/ROM/Flash chip drivers ++# ++CONFIG_MTD_CFI=y ++# CONFIG_MTD_JEDECPROBE is not set ++CONFIG_MTD_GEN_PROBE=y ++# CONFIG_MTD_CFI_ADV_OPTIONS is not set ++CONFIG_MTD_MAP_BANK_WIDTH_1=y ++CONFIG_MTD_MAP_BANK_WIDTH_2=y ++CONFIG_MTD_MAP_BANK_WIDTH_4=y ++# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set ++# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set ++# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set ++CONFIG_MTD_CFI_I1=y ++CONFIG_MTD_CFI_I2=y ++# CONFIG_MTD_CFI_I4 is not set ++# CONFIG_MTD_CFI_I8 is not set ++# CONFIG_MTD_CFI_INTELEXT is not set ++CONFIG_MTD_CFI_AMDSTD=y ++# CONFIG_MTD_CFI_STAA is not set ++CONFIG_MTD_CFI_UTIL=y ++# CONFIG_MTD_RAM is not set ++# CONFIG_MTD_ROM is not set ++# CONFIG_MTD_ABSENT is not set ++ ++# ++# Mapping drivers for chip access ++# ++# CONFIG_MTD_COMPLEX_MAPPINGS is not set ++CONFIG_MTD_PHYSMAP=y ++CONFIG_MTD_PHYSMAP_START=0x8000000 ++CONFIG_MTD_PHYSMAP_LEN=0x0 ++CONFIG_MTD_PHYSMAP_BANKWIDTH=2 ++# CONFIG_MTD_PLATRAM is not set ++ ++# ++# Self-contained MTD device drivers ++# ++# CONFIG_MTD_DATAFLASH is not set ++# CONFIG_MTD_M25P80 is not set ++# CONFIG_MTD_SLRAM is not set ++# CONFIG_MTD_PHRAM is not set ++# CONFIG_MTD_MTDRAM is not set ++ ++# ++# Disk-On-Chip Device Drivers ++# ++# CONFIG_MTD_DOC2000 is not set ++# CONFIG_MTD_DOC2001 is not set ++# CONFIG_MTD_DOC2001PLUS is not set ++# CONFIG_MTD_NAND is not set ++# CONFIG_MTD_ONENAND is not set ++ ++# ++# UBI - Unsorted block images ++# ++# CONFIG_MTD_UBI is not set ++# CONFIG_PARPORT is not set ++# CONFIG_MISC_DEVICES is not set ++ ++# ++# SCSI device support ++# ++# CONFIG_SCSI_DMA is not set ++# CONFIG_SCSI_NETLINK is not set ++# CONFIG_NETDEVICES is not set ++# CONFIG_ISDN is not set ++# CONFIG_PHONE is not set ++ ++# ++# Input device support ++# ++# CONFIG_INPUT is not set ++ ++# ++# Hardware I/O ports ++# ++# CONFIG_SERIO is not set ++# CONFIG_GAMEPORT is not set ++ ++# ++# Character devices ++# ++# CONFIG_VT is not set ++# CONFIG_SERIAL_NONSTANDARD is not set ++ ++# ++# Serial drivers ++# ++# CONFIG_SERIAL_8250 is not set ++ ++# ++# Non-8250 serial port support ++# ++CONFIG_SERIAL_ATMEL=y ++CONFIG_SERIAL_ATMEL_CONSOLE=y ++# CONFIG_SERIAL_ATMEL_TTYAT is not set ++CONFIG_SERIAL_CORE=y ++CONFIG_SERIAL_CORE_CONSOLE=y ++CONFIG_UNIX98_PTYS=y ++# CONFIG_LEGACY_PTYS is not set ++# CONFIG_IPMI_HANDLER is not set ++# CONFIG_HW_RANDOM is not set ++# CONFIG_RTC is not set ++# CONFIG_GEN_RTC is not set ++# CONFIG_R3964 is not set ++# CONFIG_TCG_TPM is not set ++# CONFIG_I2C is not set ++ ++# ++# SPI support ++# ++CONFIG_SPI=y ++CONFIG_SPI_MASTER=y ++ ++# ++# SPI Master Controller Drivers ++# ++CONFIG_SPI_ATMEL=y ++# CONFIG_SPI_BITBANG is not set ++ ++# ++# SPI Protocol Masters ++# ++# CONFIG_SPI_AT25 is not set ++# CONFIG_SPI_SPIDEV is not set ++# CONFIG_SPI_TLE62X0 is not set ++# CONFIG_W1 is not set ++# CONFIG_POWER_SUPPLY is not set ++# CONFIG_HWMON is not set ++CONFIG_WATCHDOG=y ++# CONFIG_WATCHDOG_NOWAYOUT is not set ++ ++# ++# Watchdog Device Drivers ++# ++# CONFIG_SOFT_WATCHDOG is not set ++CONFIG_AT32AP700X_WDT=y ++ ++# ++# Sonics Silicon Backplane ++# ++CONFIG_SSB_POSSIBLE=y ++# CONFIG_SSB is not set ++ ++# ++# Multifunction device drivers ++# ++# CONFIG_MFD_SM501 is not set ++ ++# ++# Multimedia devices ++# ++# CONFIG_VIDEO_DEV is not set ++# CONFIG_DVB_CORE is not set ++# CONFIG_DAB is not set ++ ++# ++# Graphics support ++# ++# CONFIG_VGASTATE is not set ++# CONFIG_VIDEO_OUTPUT_CONTROL is not set ++CONFIG_FB=y ++# CONFIG_FIRMWARE_EDID is not set ++# CONFIG_FB_DDC is not set ++CONFIG_FB_CFB_FILLRECT=y ++CONFIG_FB_CFB_COPYAREA=y ++CONFIG_FB_CFB_IMAGEBLIT=y ++# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set ++# CONFIG_FB_SYS_FILLRECT is not set ++# CONFIG_FB_SYS_COPYAREA is not set ++# CONFIG_FB_SYS_IMAGEBLIT is not set ++# CONFIG_FB_SYS_FOPS is not set ++CONFIG_FB_DEFERRED_IO=y ++# CONFIG_FB_SVGALIB is not set ++# CONFIG_FB_MACMODES is not set ++# CONFIG_FB_BACKLIGHT is not set ++# CONFIG_FB_MODE_HELPERS is not set ++# CONFIG_FB_TILEBLITTING is not set ++ ++# ++# Frame buffer hardware drivers ++# ++# CONFIG_FB_S1D13XXX is not set ++CONFIG_FB_ATMEL=y ++# CONFIG_FB_VIRTUAL is not set ++CONFIG_BACKLIGHT_LCD_SUPPORT=y ++CONFIG_LCD_CLASS_DEVICE=y ++CONFIG_LCD_LTV350QV=y ++# CONFIG_BACKLIGHT_CLASS_DEVICE is not set ++ ++# ++# Display device support ++# ++# CONFIG_DISPLAY_SUPPORT is not set ++# CONFIG_LOGO is not set ++ ++# ++# Sound ++# ++# CONFIG_SOUND is not set ++CONFIG_USB_SUPPORT=y ++# CONFIG_USB_ARCH_HAS_HCD is not set ++# CONFIG_USB_ARCH_HAS_OHCI is not set ++# CONFIG_USB_ARCH_HAS_EHCI is not set ++ ++# ++# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' ++# ++ ++# ++# USB Gadget Support ++# ++CONFIG_USB_GADGET=y ++# CONFIG_USB_GADGET_DEBUG_FILES is not set ++CONFIG_USB_GADGET_SELECTED=y ++# CONFIG_USB_GADGET_AMD5536UDC is not set ++CONFIG_USB_GADGET_ATMEL_USBA=y ++CONFIG_USB_ATMEL_USBA=y ++# CONFIG_USB_GADGET_FSL_USB2 is not set ++# CONFIG_USB_GADGET_NET2280 is not set ++# CONFIG_USB_GADGET_PXA2XX is not set ++# CONFIG_USB_GADGET_M66592 is not set ++# CONFIG_USB_GADGET_GOKU is not set ++# CONFIG_USB_GADGET_LH7A40X is not set ++# CONFIG_USB_GADGET_OMAP is not set ++# CONFIG_USB_GADGET_S3C2410 is not set ++# CONFIG_USB_GADGET_AT91 is not set ++# CONFIG_USB_GADGET_DUMMY_HCD is not set ++CONFIG_USB_GADGET_DUALSPEED=y ++# CONFIG_USB_ZERO is not set ++CONFIG_USB_ETH=y ++# CONFIG_USB_ETH_RNDIS is not set ++# CONFIG_USB_GADGETFS is not set ++# CONFIG_USB_FILE_STORAGE is not set ++# CONFIG_USB_G_SERIAL is not set ++# CONFIG_USB_MIDI_GADGET is not set ++# CONFIG_MMC is not set ++# CONFIG_NEW_LEDS is not set ++CONFIG_RTC_LIB=y ++CONFIG_RTC_CLASS=y ++CONFIG_RTC_HCTOSYS=y ++CONFIG_RTC_HCTOSYS_DEVICE="rtc0" ++# CONFIG_RTC_DEBUG is not set ++ ++# ++# RTC interfaces ++# ++CONFIG_RTC_INTF_SYSFS=y ++# CONFIG_RTC_INTF_PROC is not set ++CONFIG_RTC_INTF_DEV=y ++# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set ++# CONFIG_RTC_DRV_TEST is not set ++ ++# ++# SPI RTC drivers ++# ++# CONFIG_RTC_DRV_RS5C348 is not set ++# CONFIG_RTC_DRV_MAX6902 is not set ++ ++# ++# Platform RTC drivers ++# ++# CONFIG_RTC_DRV_DS1553 is not set ++# CONFIG_RTC_DRV_STK17TA8 is not set ++# CONFIG_RTC_DRV_DS1742 is not set ++# CONFIG_RTC_DRV_M48T86 is not set ++# CONFIG_RTC_DRV_M48T59 is not set ++# CONFIG_RTC_DRV_V3020 is not set ++ ++# ++# on-CPU RTC drivers ++# ++CONFIG_RTC_DRV_AT32AP700X=y ++ ++# ++# Userspace I/O ++# ++# CONFIG_UIO is not set ++ ++# ++# File systems ++# ++# CONFIG_INOTIFY is not set ++# CONFIG_QUOTA is not set ++# CONFIG_DNOTIFY is not set ++# CONFIG_AUTOFS_FS is not set ++# CONFIG_AUTOFS4_FS is not set ++# CONFIG_FUSE_FS is not set ++ ++# ++# Pseudo filesystems ++# ++CONFIG_PROC_FS=y ++CONFIG_PROC_KCORE=y ++CONFIG_PROC_SYSCTL=y ++CONFIG_SYSFS=y ++CONFIG_TMPFS=y ++# CONFIG_TMPFS_POSIX_ACL is not set ++# CONFIG_HUGETLB_PAGE is not set ++# CONFIG_CONFIGFS_FS is not set ++ ++# ++# Miscellaneous filesystems ++# ++CONFIG_JFFS2_FS=y ++CONFIG_JFFS2_FS_DEBUG=0 ++# CONFIG_JFFS2_FS_WRITEBUFFER is not set ++# CONFIG_JFFS2_SUMMARY is not set ++# CONFIG_JFFS2_FS_XATTR is not set ++# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set ++CONFIG_JFFS2_ZLIB=y ++# CONFIG_JFFS2_LZO is not set ++CONFIG_JFFS2_RTIME=y ++# CONFIG_JFFS2_RUBIN is not set ++# CONFIG_NETWORK_FILESYSTEMS is not set ++# CONFIG_NLS is not set ++# CONFIG_DLM is not set ++# CONFIG_INSTRUMENTATION is not set ++ ++# ++# Kernel hacking ++# ++# CONFIG_PRINTK_TIME is not set ++CONFIG_ENABLE_WARN_DEPRECATED=y ++CONFIG_ENABLE_MUST_CHECK=y ++CONFIG_MAGIC_SYSRQ=y ++# CONFIG_UNUSED_SYMBOLS is not set ++# CONFIG_DEBUG_FS is not set ++# CONFIG_HEADERS_CHECK is not set ++# CONFIG_DEBUG_KERNEL is not set ++# CONFIG_DEBUG_BUGVERBOSE is not set ++# CONFIG_SAMPLES is not set ++ ++# ++# Security options ++# ++# CONFIG_KEYS is not set ++# CONFIG_SECURITY is not set ++# CONFIG_SECURITY_FILE_CAPABILITIES is not set ++# CONFIG_CRYPTO is not set ++ ++# ++# Library routines ++# ++CONFIG_BITREVERSE=y ++# CONFIG_CRC_CCITT is not set ++# CONFIG_CRC16 is not set ++# CONFIG_CRC_ITU_T is not set ++CONFIG_CRC32=y ++# CONFIG_CRC7 is not set ++# CONFIG_LIBCRC32C is not set ++CONFIG_ZLIB_INFLATE=y ++CONFIG_ZLIB_DEFLATE=y ++CONFIG_HAS_IOMEM=y ++CONFIG_HAS_IOPORT=y ++CONFIG_HAS_DMA=y +diff -Nrup linux-2.6.24/arch/avr32/drivers/dw-dmac.c linux-avr32/arch/avr32/drivers/dw-dmac.c +--- linux-2.6.24/arch/avr32/drivers/dw-dmac.c 1969-12-31 19:00:00.000000000 -0500 ++++ linux-avr32/arch/avr32/drivers/dw-dmac.c 2008-02-01 14:51:35.000000000 -0500 +@@ -0,0 +1,761 @@ ++/* ++ * Driver for the Synopsys DesignWare DMA Controller ++ * ++ * Copyright (C) 2005-2006 Atmel Corporation ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation. ++ */ ++#include <linux/clk.h> ++#include <linux/device.h> ++#include <linux/dma-mapping.h> ++#include <linux/dmapool.h> ++#include <linux/init.h> ++#include <linux/interrupt.h> ++#include <linux/module.h> ++#include <linux/platform_device.h> ++ ++#include <asm/dma-controller.h> ++#include <asm/io.h> ++ ++#include "dw-dmac.h" ++ ++#define DMAC_NR_CHANNELS 3 ++#define DMAC_MAX_BLOCKSIZE 4095 ++ ++enum { ++ CH_STATE_FREE = 0, ++ CH_STATE_ALLOCATED, ++ CH_STATE_BUSY, ++}; ++ ++struct dw_dma_lli { ++ dma_addr_t sar; ++ dma_addr_t dar; ++ dma_addr_t llp; ++ u32 ctllo; ++ u32 ctlhi; ++ u32 sstat; ++ u32 dstat; ++}; ++ ++struct dw_dma_block { ++ struct dw_dma_lli *lli_vaddr; ++ dma_addr_t lli_dma_addr; ++}; ++ ++struct dw_dma_channel { ++ unsigned int state; ++ int is_cyclic; ++ struct dma_request_sg *req_sg; ++ struct dma_request_cyclic *req_cyclic; ++ unsigned int nr_blocks; ++ int direction; ++ struct dw_dma_block *block; ++}; ++ ++struct dw_dma_controller { ++ spinlock_t lock; ++ void * __iomem regs; ++ struct dma_pool *lli_pool; ++ struct clk *hclk; ++ struct dma_controller dma; ++ struct dw_dma_channel channel[DMAC_NR_CHANNELS]; ++}; ++#define to_dw_dmac(dmac) container_of(dmac, struct dw_dma_controller, dma) ++ ++#define dmac_writel_hi(dmac, reg, value) \ ++ __raw_writel((value), (dmac)->regs + DW_DMAC_##reg + 4) ++#define dmac_readl_hi(dmac, reg) \ ++ __raw_readl((dmac)->regs + DW_DMAC_##reg + 4) ++#define dmac_writel_lo(dmac, reg, value) \ ++ __raw_writel((value), (dmac)->regs + DW_DMAC_##reg) ++#define dmac_readl_lo(dmac, reg) \ ++ __raw_readl((dmac)->regs + DW_DMAC_##reg) ++#define dmac_chan_writel_hi(dmac, chan, reg, value) \ ++ __raw_writel((value), ((dmac)->regs + 0x58 * (chan) \ ++ + DW_DMAC_CHAN_##reg + 4)) ++#define dmac_chan_readl_hi(dmac, chan, reg) \ ++ __raw_readl((dmac)->regs + 0x58 * (chan) + DW_DMAC_CHAN_##reg + 4) ++#define dmac_chan_writel_lo(dmac, chan, reg, value) \ ++ __raw_writel((value), (dmac)->regs + 0x58 * (chan) + DW_DMAC_CHAN_##reg) ++#define dmac_chan_readl_lo(dmac, chan, reg) \ ++ __raw_readl((dmac)->regs + 0x58 * (chan) + DW_DMAC_CHAN_##reg) ++#define set_channel_bit(dmac, reg, chan) \ ++ dmac_writel_lo(dmac, reg, (1 << (chan)) | (1 << ((chan) + 8))) ++#define clear_channel_bit(dmac, reg, chan) \ ++ dmac_writel_lo(dmac, reg, (0 << (chan)) | (1 << ((chan) + 8))) ++ ++static int dmac_alloc_channel(struct dma_controller *_dmac) ++{ ++ struct dw_dma_controller *dmac = to_dw_dmac(_dmac); ++ struct dw_dma_channel *chan; ++ unsigned long flags; ++ int i; ++ ++ spin_lock_irqsave(&dmac->lock, flags); ++ for (i = 0; i < DMAC_NR_CHANNELS; i++) ++ if (dmac->channel[i].state == CH_STATE_FREE) ++ break; ++ ++ if (i < DMAC_NR_CHANNELS) { ++ chan = &dmac->channel[i]; ++ chan->state = CH_STATE_ALLOCATED; ++ } else { ++ i = -EBUSY; ++ } ++ ++ spin_unlock_irqrestore(&dmac->lock, flags); ++ ++ return i; ++} ++ ++static void dmac_release_channel(struct dma_controller *_dmac, int channel) ++{ ++ struct dw_dma_controller *dmac = to_dw_dmac(_dmac); ++ ++ BUG_ON(channel >= DMAC_NR_CHANNELS ++ || dmac->channel[channel].state != CH_STATE_ALLOCATED); ++ ++ dmac->channel[channel].state = CH_STATE_FREE; ++} ++ ++static struct dw_dma_block *allocate_blocks(struct dw_dma_controller *dmac, ++ unsigned int nr_blocks) ++{ ++ struct dw_dma_block *block; ++ void *p; ++ unsigned int i; ++ ++ block = kmalloc(nr_blocks * sizeof(*block), ++ GFP_KERNEL); ++ if (unlikely(!block)) ++ return NULL; ++ ++ for (i = 0; i < nr_blocks; i++) { ++ p = dma_pool_alloc(dmac->lli_pool, GFP_KERNEL, ++ &block[i].lli_dma_addr); ++ block[i].lli_vaddr = p; ++ if (unlikely(!p)) ++ goto fail; ++ } ++ ++ return block; ++ ++fail: ++ for (i = 0; i < nr_blocks; i++) { ++ if (!block[i].lli_vaddr) ++ break; ++ dma_pool_free(dmac->lli_pool, block[i].lli_vaddr, ++ block[i].lli_dma_addr); ++ } ++ kfree(block); ++ return NULL; ++} ++ ++static void cleanup_channel(struct dw_dma_controller *dmac, ++ struct dw_dma_channel *chan) ++{ ++ unsigned int i; ++ ++ if (chan->nr_blocks > 1) { ++ for (i = 0; i < chan->nr_blocks; i++) ++ dma_pool_free(dmac->lli_pool, chan->block[i].lli_vaddr, ++ chan->block[i].lli_dma_addr); ++ kfree(chan->block); ++ } ++ ++ chan->state = CH_STATE_ALLOCATED; ++} ++ ++static int dmac_prepare_request_sg(struct dma_controller *_dmac, ++ struct dma_request_sg *req) ++{ ++ struct dw_dma_controller *dmac = to_dw_dmac(_dmac); ++ struct dw_dma_channel *chan; ++ unsigned long ctlhi, ctllo, cfghi, cfglo; ++ unsigned long block_size; ++ unsigned int nr_blocks; ++ int ret, i, direction; ++ unsigned long flags; ++ ++ spin_lock_irqsave(&dmac->lock, flags); ++ ++ ret = -EINVAL; ++ if (req->req.channel >= DMAC_NR_CHANNELS ++ || dmac->channel[req->req.channel].state != CH_STATE_ALLOCATED ++ || req->block_size > DMAC_MAX_BLOCKSIZE) { ++ spin_unlock_irqrestore(&dmac->lock, flags); ++ return -EINVAL; ++ } ++ ++ chan = &dmac->channel[req->req.channel]; ++ chan->state = CH_STATE_BUSY; ++ chan->req_sg = req; ++ chan->is_cyclic = 0; ++ ++ /* ++ * We have marked the channel as busy, so no need to keep the ++ * lock as long as we only touch the channel-specific ++ * registers ++ */ ++ spin_unlock_irqrestore(&dmac->lock, flags); ++ ++ /* ++ * There may be limitations in the driver and/or the DMA ++ * controller that prevents us from sending a whole ++ * scatterlist item in one go. Taking this into account, ++ * calculate the number of block transfers we need to set up. ++ * ++ * FIXME: Let the peripheral driver know about the maximum ++ * block size we support. We really don't want to use a ++ * different block size than what was suggested by the ++ * peripheral. ++ * ++ * Each block will get its own Linked List Item (LLI) below. ++ */ ++ block_size = req->block_size; ++ nr_blocks = req->nr_blocks; ++ pr_debug("block_size %lu, nr_blocks %u nr_sg = %u\n", ++ block_size, nr_blocks, req->nr_sg); ++ ++ BUG_ON(nr_blocks == 0); ++ chan->nr_blocks = nr_blocks; ++ ++ ret = -EINVAL; ++ cfglo = cfghi = 0; ++ switch (req->direction) { ++ case DMA_DIR_MEM_TO_PERIPH: ++ direction = DMA_TO_DEVICE; ++ cfghi = req->periph_id << (43 - 32); ++ break; ++ ++ case DMA_DIR_PERIPH_TO_MEM: ++ direction = DMA_FROM_DEVICE; ++ cfghi = req->periph_id << (39 - 32); ++ break; ++ default: ++ goto out_unclaim_channel; ++ } ++ ++ chan->direction = direction; ++ ++ dmac_chan_writel_hi(dmac, req->req.channel, CFG, cfghi); ++ dmac_chan_writel_lo(dmac, req->req.channel, CFG, cfglo); ++ ++ ctlhi = block_size >> req->width; ++ ctllo = ((req->direction << 20) ++ // | (1 << 14) | (1 << 11) // source/dest burst trans len ++ | (req->width << 4) | (req->width << 1) ++ | (1 << 0)); // interrupt enable ++ ++ if (nr_blocks == 1) { ++ /* Only one block: No need to use block chaining */ ++ if (direction == DMA_TO_DEVICE) { ++ dmac_chan_writel_lo(dmac, req->req.channel, SAR, ++ req->sg->dma_address); ++ dmac_chan_writel_lo(dmac, req->req.channel, DAR, ++ req->data_reg); ++ ctllo |= 2 << 7; // no dst increment ++ } else { ++ dmac_chan_writel_lo(dmac, req->req.channel, SAR, ++ req->data_reg); ++ dmac_chan_writel_lo(dmac, req->req.channel, DAR, ++ req->sg->dma_address); ++ ctllo |= 2 << 9; // no src increment ++ } ++ dmac_chan_writel_lo(dmac, req->req.channel, CTL, ctllo); ++ dmac_chan_writel_hi(dmac, req->req.channel, CTL, ctlhi); ++ pr_debug("ctl hi:lo 0x%lx:%lx\n", ctlhi, ctllo); ++ } else { ++ struct dw_dma_lli *lli, *lli_prev = NULL; ++ int j = 0, offset = 0; ++ ++ ret = -ENOMEM; ++ chan->block = allocate_blocks(dmac, nr_blocks); ++ if (!chan->block) ++ goto out_unclaim_channel; ++ ++ if (direction == DMA_TO_DEVICE) ++ ctllo |= 1 << 28 | 1 << 27 | 2 << 7; ++ else ++ ctllo |= 1 << 28 | 1 << 27 | 2 << 9; ++ ++ /* ++ * Map scatterlist items to blocks. One scatterlist ++ * item may need more than one block for the reasons ++ * mentioned above. ++ */ ++ for (i = 0; i < nr_blocks; i++) { ++ lli = chan->block[i].lli_vaddr; ++ if (lli_prev) { ++ lli_prev->llp = chan->block[i].lli_dma_addr; ++ pr_debug("lli[%d] (0x%p/0x%x): 0x%x 0x%x 0x%x 0x%x 0x%x\n", ++ i - 1, chan->block[i - 1].lli_vaddr, ++ chan->block[i - 1].lli_dma_addr, ++ lli_prev->sar, lli_prev->dar, lli_prev->llp, ++ lli_prev->ctllo, lli_prev->ctlhi); ++ } ++ lli->llp = 0; ++ lli->ctllo = ctllo; ++ lli->ctlhi = ctlhi; ++ if (direction == DMA_TO_DEVICE) { ++ lli->sar = req->sg[j].dma_address + offset; ++ lli->dar = req->data_reg; ++ } else { ++ lli->sar = req->data_reg; ++ lli->dar = req->sg[j].dma_address + offset; ++ } ++ lli_prev = lli; ++ ++ offset += block_size; ++ if (offset > req->sg[j].length) { ++ j++; ++ offset = 0; ++ } ++ } ++ ++ pr_debug("lli[%d] (0x%p/0x%x): 0x%x 0x%x 0x%x 0x%x 0x%x\n", ++ i - 1, chan->block[i - 1].lli_vaddr, ++ chan->block[i - 1].lli_dma_addr, lli_prev->sar, ++ lli_prev->dar, lli_prev->llp, ++ lli_prev->ctllo, lli_prev->ctlhi); ++ ++ /* ++ * SAR, DAR and CTL are initialized from the LLI. We ++ * only have to enable the LLI bits in CTL. ++ */ ++ dmac_chan_writel_hi(dmac, req->req.channel, CTL, 0); ++ dmac_chan_writel_lo(dmac, req->req.channel, LLP, ++ chan->block[0].lli_dma_addr); ++ dmac_chan_writel_lo(dmac, req->req.channel, CTL, 1 << 28 | 1 << 27); ++ } ++ ++ set_channel_bit(dmac, MASK_XFER, req->req.channel); ++ set_channel_bit(dmac, MASK_ERROR, req->req.channel); ++ if (req->req.block_complete) ++ set_channel_bit(dmac, MASK_BLOCK, req->req.channel); ++ else ++ clear_channel_bit(dmac, MASK_BLOCK, req->req.channel); ++ ++ return 0; ++ ++out_unclaim_channel: ++ chan->state = CH_STATE_ALLOCATED; ++ return ret; ++} ++ ++static int dmac_prepare_request_cyclic(struct dma_controller *_dmac, ++ struct dma_request_cyclic *req) ++{ ++ struct dw_dma_controller *dmac = to_dw_dmac(_dmac); ++ struct dw_dma_channel *chan; ++ unsigned long ctlhi, ctllo, cfghi, cfglo; ++ unsigned long block_size; ++ int ret, i, direction; ++ unsigned long flags; ++ ++ spin_lock_irqsave(&dmac->lock, flags); ++ ++ block_size = (req->buffer_size/req->periods) >> req->width; ++ ++ ret = -EINVAL; ++ if (req->req.channel >= DMAC_NR_CHANNELS ++ || dmac->channel[req->req.channel].state != CH_STATE_ALLOCATED ++ || (req->periods == 0) ++ || block_size > DMAC_MAX_BLOCKSIZE) { ++ spin_unlock_irqrestore(&dmac->lock, flags); ++ return -EINVAL; ++ } ++ ++ chan = &dmac->channel[req->req.channel]; ++ chan->state = CH_STATE_BUSY; ++ chan->is_cyclic = 1; ++ chan->req_cyclic = req; ++ ++ /* ++ * We have marked the channel as busy, so no need to keep the ++ * lock as long as we only touch the channel-specific ++ * registers ++ */ ++ spin_unlock_irqrestore(&dmac->lock, flags); ++ ++ /* ++ Setup ++ */ ++ BUG_ON(req->buffer_size % req->periods); ++ /* printk(KERN_INFO "block_size = %lu, periods = %u\n", block_size, req->periods); */ ++ ++ chan->nr_blocks = req->periods; ++ ++ ret = -EINVAL; ++ cfglo = cfghi = 0; ++ switch (req->direction) { ++ case DMA_DIR_MEM_TO_PERIPH: ++ direction = DMA_TO_DEVICE; ++ cfghi = req->periph_id << (43 - 32); ++ break; ++ ++ case DMA_DIR_PERIPH_TO_MEM: ++ direction = DMA_FROM_DEVICE; ++ cfghi = req->periph_id << (39 - 32); ++ break; ++ default: ++ goto out_unclaim_channel; ++ } ++ ++ chan->direction = direction; ++ ++ dmac_chan_writel_hi(dmac, req->req.channel, CFG, cfghi); ++ dmac_chan_writel_lo(dmac, req->req.channel, CFG, cfglo); ++ ++ ctlhi = block_size; ++ ctllo = ((req->direction << 20) ++ | (req->width << 4) | (req->width << 1) ++ | (1 << 0)); // interrupt enable ++ ++ { ++ struct dw_dma_lli *lli = NULL, *lli_prev = NULL; ++ ++ ret = -ENOMEM; ++ chan->block = allocate_blocks(dmac, req->periods); ++ if (!chan->block) ++ goto out_unclaim_channel; ++ ++ if (direction == DMA_TO_DEVICE) ++ ctllo |= 1 << 28 | 1 << 27 | 2 << 7; ++ else ++ ctllo |= 1 << 28 | 1 << 27 | 2 << 9; ++ ++ /* ++ * Set up a linked list items where each period gets ++ * an item. The linked list item for the last period ++ * points back to the star of the buffer making a ++ * cyclic buffer. ++ */ ++ for (i = 0; i < req->periods; i++) { ++ lli = chan->block[i].lli_vaddr; ++ if (lli_prev) { ++ lli_prev->llp = chan->block[i].lli_dma_addr; ++ /* printk(KERN_INFO "lli[%d] (0x%p/0x%x): 0x%x 0x%x 0x%x 0x%x 0x%x\n", ++ i - 1, chan->block[i - 1].lli_vaddr, ++ chan->block[i - 1].lli_dma_addr, ++ lli_prev->sar, lli_prev->dar, lli_prev->llp, ++ lli_prev->ctllo, lli_prev->ctlhi);*/ ++ } ++ lli->llp = 0; ++ lli->ctllo = ctllo; ++ lli->ctlhi = ctlhi; ++ if (direction == DMA_TO_DEVICE) { ++ lli->sar = req->buffer_start + i*(block_size << req->width); ++ lli->dar = req->data_reg; ++ } else { ++ lli->sar = req->data_reg; ++ lli->dar = req->buffer_start + i*(block_size << req->width); ++ } ++ lli_prev = lli; ++ } ++ lli->llp = chan->block[0].lli_dma_addr; ++ ++ /*printk(KERN_INFO "lli[%d] (0x%p/0x%x): 0x%x 0x%x 0x%x 0x%x 0x%x\n", ++ i - 1, chan->block[i - 1].lli_vaddr, ++ chan->block[i - 1].lli_dma_addr, lli_prev->sar, ++ lli_prev->dar, lli_prev->llp, ++ lli_prev->ctllo, lli_prev->ctlhi); */ ++ ++ /* ++ * SAR, DAR and CTL are initialized from the LLI. We ++ * only have to enable the LLI bits in CTL. ++ */ ++ dmac_chan_writel_lo(dmac, req->req.channel, LLP, ++ chan->block[0].lli_dma_addr); ++ dmac_chan_writel_lo(dmac, req->req.channel, CTL, 1 << 28 | 1 << 27); ++ } ++ ++ clear_channel_bit(dmac, MASK_XFER, req->req.channel); ++ set_channel_bit(dmac, MASK_ERROR, req->req.channel); ++ if (req->req.block_complete) ++ set_channel_bit(dmac, MASK_BLOCK, req->req.channel); ++ else ++ clear_channel_bit(dmac, MASK_BLOCK, req->req.channel); ++ ++ return 0; ++ ++out_unclaim_channel: ++ chan->state = CH_STATE_ALLOCATED; ++ return ret; ++} ++ ++static int dmac_start_request(struct dma_controller *_dmac, ++ unsigned int channel) ++{ ++ struct dw_dma_controller *dmac = to_dw_dmac(_dmac); ++ ++ BUG_ON(channel >= DMAC_NR_CHANNELS); ++ ++ set_channel_bit(dmac, CH_EN, channel); ++ ++ return 0; ++} ++ ++static dma_addr_t dmac_get_current_pos(struct dma_controller *_dmac, ++ unsigned int channel) ++{ ++ struct dw_dma_controller *dmac = to_dw_dmac(_dmac); ++ struct dw_dma_channel *chan; ++ dma_addr_t current_pos; ++ ++ BUG_ON(channel >= DMAC_NR_CHANNELS); ++ ++ chan = &dmac->channel[channel]; ++ ++ switch (chan->direction) { ++ case DMA_TO_DEVICE: ++ current_pos = dmac_chan_readl_lo(dmac, channel, SAR); ++ break; ++ case DMA_FROM_DEVICE: ++ current_pos = dmac_chan_readl_lo(dmac, channel, DAR); ++ break; ++ default: ++ return 0; ++ } ++ ++ ++ if (!current_pos) { ++ if (chan->is_cyclic) { ++ current_pos = chan->req_cyclic->buffer_start; ++ } else { ++ current_pos = chan->req_sg->sg->dma_address; ++ } ++ } ++ ++ return current_pos; ++} ++ ++ ++static int dmac_stop_request(struct dma_controller *_dmac, ++ unsigned int channel) ++{ ++ struct dw_dma_controller *dmac = to_dw_dmac(_dmac); ++ struct dw_dma_channel *chan; ++ ++ BUG_ON(channel >= DMAC_NR_CHANNELS); ++ ++ chan = &dmac->channel[channel]; ++ pr_debug("stop: st%u s%08x d%08x l%08x ctl0x%08x:0x%08x\n", ++ chan->state, dmac_chan_readl_lo(dmac, channel, SAR), ++ dmac_chan_readl_lo(dmac, channel, DAR), ++ dmac_chan_readl_lo(dmac, channel, LLP), ++ dmac_chan_readl_hi(dmac, channel, CTL), ++ dmac_chan_readl_lo(dmac, channel, CTL)); ++ ++ if (chan->state == CH_STATE_BUSY) { ++ clear_channel_bit(dmac, CH_EN, channel); ++ cleanup_channel(dmac, &dmac->channel[channel]); ++ } ++ ++ return 0; ++} ++ ++ ++static void dmac_block_complete(struct dw_dma_controller *dmac) ++{ ++ struct dw_dma_channel *chan; ++ unsigned long status, chanid; ++ ++ status = dmac_readl_lo(dmac, STATUS_BLOCK); ++ ++ while (status) { ++ struct dma_request *req; ++ chanid = __ffs(status); ++ chan = &dmac->channel[chanid]; ++ ++ if (chan->is_cyclic) { ++ BUG_ON(!chan->req_cyclic ++ || !chan->req_cyclic->req.block_complete); ++ req = &chan->req_cyclic->req; ++ } else { ++ BUG_ON(!chan->req_sg || !chan->req_sg->req.block_complete); ++ req = &chan->req_sg->req; ++ } ++ dmac_writel_lo(dmac, CLEAR_BLOCK, 1 << chanid); ++ req->block_complete(req); ++ status = dmac_readl_lo(dmac, STATUS_BLOCK); ++ } ++} ++ ++static void dmac_xfer_complete(struct dw_dma_controller *dmac) ++{ ++ struct dw_dma_channel *chan; ++ struct dma_request *req; ++ unsigned long status, chanid; ++ ++ status = dmac_readl_lo(dmac, STATUS_XFER); ++ ++ while (status) { ++ chanid = __ffs(status); ++ chan = &dmac->channel[chanid]; ++ ++ dmac_writel_lo(dmac, CLEAR_XFER, 1 << chanid); ++ ++ req = &chan->req_sg->req; ++ BUG_ON(!req); ++ cleanup_channel(dmac, chan); ++ if (req->xfer_complete) ++ req->xfer_complete(req); ++ ++ status = dmac_readl_lo(dmac, STATUS_XFER); ++ } ++} ++ ++static void dmac_error(struct dw_dma_controller *dmac) ++{ ++ struct dw_dma_channel *chan; ++ unsigned long status, chanid; ++ ++ status = dmac_readl_lo(dmac, STATUS_ERROR); ++ ++ while (status) { ++ struct dma_request *req; ++ ++ chanid = __ffs(status); ++ chan = &dmac->channel[chanid]; ++ ++ dmac_writel_lo(dmac, CLEAR_ERROR, 1 << chanid); ++ clear_channel_bit(dmac, CH_EN, chanid); ++ ++ if (chan->is_cyclic) { ++ BUG_ON(!chan->req_cyclic); ++ req = &chan->req_cyclic->req; ++ } else { ++ BUG_ON(!chan->req_sg); ++ req = &chan->req_sg->req; ++ } ++ ++ cleanup_channel(dmac, chan); ++ if (req->error) ++ req->error(req); ++ ++ status = dmac_readl_lo(dmac, STATUS_XFER); ++ } ++} ++ ++static irqreturn_t dmac_interrupt(int irq, void *dev_id) ++{ ++ struct dw_dma_controller *dmac = dev_id; ++ unsigned long status; ++ int ret = IRQ_NONE; ++ ++ spin_lock(&dmac->lock); ++ ++ status = dmac_readl_lo(dmac, STATUS_INT); ++ ++ while (status) { ++ ret = IRQ_HANDLED; ++ if (status & 0x10) ++ dmac_error(dmac); ++ if (status & 0x02) ++ dmac_block_complete(dmac); ++ if (status & 0x01) ++ dmac_xfer_complete(dmac); ++ ++ status = dmac_readl_lo(dmac, STATUS_INT); ++ } ++ ++ spin_unlock(&dmac->lock); ++ return ret; ++} ++ ++static int __devinit dmac_probe(struct platform_device *pdev) ++{ ++ struct dw_dma_controller *dmac; ++ struct resource *regs; ++ int ret; ++ ++ regs = platform_get_resource(pdev, IORESOURCE_MEM, 0); ++ if (!regs) ++ return -ENXIO; ++ ++ dmac = kmalloc(sizeof(*dmac), GFP_KERNEL); ++ if (!dmac) ++ return -ENOMEM; ++ memset(dmac, 0, sizeof(*dmac)); ++ ++ dmac->hclk = clk_get(&pdev->dev, "hclk"); ++ if (IS_ERR(dmac->hclk)) { ++ ret = PTR_ERR(dmac->hclk); ++ goto out_free_dmac; ++ } ++ clk_enable(dmac->hclk); ++ ++ ret = -ENOMEM; ++ dmac->lli_pool = dma_pool_create("dmac", &pdev->dev, ++ sizeof(struct dw_dma_lli), 4, 0); ++ if (!dmac->lli_pool) ++ goto out_disable_clk; ++ ++ spin_lock_init(&dmac->lock); ++ dmac->dma.dev = &pdev->dev; ++ dmac->dma.alloc_channel = dmac_alloc_channel; ++ dmac->dma.release_channel = dmac_release_channel; ++ dmac->dma.prepare_request_sg = dmac_prepare_request_sg; ++ dmac->dma.prepare_request_cyclic = dmac_prepare_request_cyclic; ++ dmac->dma.start_request = dmac_start_request; ++ dmac->dma.stop_request = dmac_stop_request; ++ dmac->dma.get_current_pos = dmac_get_current_pos; ++ ++ dmac->regs = ioremap(regs->start, regs->end - regs->start + 1); ++ if (!dmac->regs) ++ goto out_free_pool; ++ ++ ret = request_irq(platform_get_irq(pdev, 0), dmac_interrupt, ++ IRQF_SAMPLE_RANDOM, pdev->name, dmac); ++ if (ret) ++ goto out_unmap_regs; ++ ++ /* Enable the DMA controller */ ++ dmac_writel_lo(dmac, CFG, 1); ++ ++ register_dma_controller(&dmac->dma); ++ ++ printk(KERN_INFO ++ "dmac%d: DesignWare DMA controller at 0x%p irq %d\n", ++ dmac->dma.id, dmac->regs, platform_get_irq(pdev, 0)); ++ ++ return 0; ++ ++out_unmap_regs: ++ iounmap(dmac->regs); ++out_free_pool: ++ dma_pool_destroy(dmac->lli_pool); ++out_disable_clk: ++ clk_disable(dmac->hclk); ++ clk_put(dmac->hclk); ++out_free_dmac: ++ kfree(dmac); ++ return ret; ++} ++ ++static struct platform_driver dmac_driver = { ++ .probe = dmac_probe, ++ .driver = { ++ .name = "dmaca", ++ }, ++}; ++ ++static int __init dmac_init(void) ++{ ++ return platform_driver_register(&dmac_driver); ++} ++subsys_initcall(dmac_init); ++ ++static void __exit dmac_exit(void) ++{ ++ platform_driver_unregister(&dmac_driver); ++} ++module_exit(dmac_exit); ++ ++MODULE_DESCRIPTION("Synopsys DesignWare DMA Controller driver"); ++MODULE_AUTHOR("Haavard Skinnemoen <hskinnemoen@atmel.com>"); ++MODULE_LICENSE("GPL"); +diff -Nrup linux-2.6.24/arch/avr32/drivers/dw-dmac.h linux-avr32/arch/avr32/drivers/dw-dmac.h +--- linux-2.6.24/arch/avr32/drivers/dw-dmac.h 1969-12-31 19:00:00.000000000 -0500 ++++ linux-avr32/arch/avr32/drivers/dw-dmac.h 2008-02-01 14:51:35.000000000 -0500 +@@ -0,0 +1,42 @@ ++/* ++ * Driver for the Synopsys DesignWare DMA Controller ++ * ++ * Copyright (C) 2005-2006 Atmel Corporation ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation. ++ */ ++#ifndef __AVR32_DW_DMAC_H__ ++#define __AVR32_DW_DMAC_H__ ++ ++#define DW_DMAC_CFG 0x398 ++#define DW_DMAC_CH_EN 0x3a0 ++ ++#define DW_DMAC_STATUS_XFER 0x2e8 ++#define DW_DMAC_STATUS_BLOCK 0x2f0 ++#define DW_DMAC_STATUS_ERROR 0x308 ++ ++#define DW_DMAC_MASK_XFER 0x310 ++#define DW_DMAC_MASK_BLOCK 0x318 ++#define DW_DMAC_MASK_ERROR 0x330 ++ ++#define DW_DMAC_CLEAR_XFER 0x338 ++#define DW_DMAC_CLEAR_BLOCK 0x340 ++#define DW_DMAC_CLEAR_ERROR 0x358 ++ ++#define DW_DMAC_STATUS_INT 0x360 ++ ++#define DW_DMAC_CHAN_SAR 0x000 ++#define DW_DMAC_CHAN_DAR 0x008 ++#define DW_DMAC_CHAN_LLP 0x010 ++#define DW_DMAC_CHAN_CTL 0x018 ++#define DW_DMAC_CHAN_SSTAT 0x020 ++#define DW_DMAC_CHAN_DSTAT 0x028 ++#define DW_DMAC_CHAN_SSTATAR 0x030 ++#define DW_DMAC_CHAN_DSTATAR 0x038 ++#define DW_DMAC_CHAN_CFG 0x040 ++#define DW_DMAC_CHAN_SGR 0x048 ++#define DW_DMAC_CHAN_DSR 0x050 ++ ++#endif /* __AVR32_DW_DMAC_H__ */ +diff -Nrup linux-2.6.24/arch/avr32/drivers/Makefile linux-avr32/arch/avr32/drivers/Makefile +--- linux-2.6.24/arch/avr32/drivers/Makefile 1969-12-31 19:00:00.000000000 -0500 ++++ linux-avr32/arch/avr32/drivers/Makefile 2008-02-01 14:51:35.000000000 -0500 +@@ -0,0 +1 @@ ++obj-$(CONFIG_DW_DMAC) += dw-dmac.o +diff -Nrup linux-2.6.24/arch/avr32/Kconfig linux-avr32/arch/avr32/Kconfig +--- linux-2.6.24/arch/avr32/Kconfig 2008-01-24 17:58:37.000000000 -0500 ++++ linux-avr32/arch/avr32/Kconfig 2008-02-01 14:51:35.000000000 -0500 +@@ -54,6 +54,9 @@ config ARCH_HAS_ILOG2_U32 + config ARCH_HAS_ILOG2_U64 + def_bool n + ++config ARCH_SUPPORTS_OPROFILE ++ def_bool y ++ + config GENERIC_HWEIGHT + def_bool y + +@@ -81,19 +84,23 @@ config PLATFORM_AT32AP + select MMU + select PERFORMANCE_COUNTERS + +-choice +- prompt "AVR32 CPU type" +- default CPU_AT32AP7000 ++# ++# CPU types ++# + +-config CPU_AT32AP7000 +- bool "AT32AP7000" ++# AP7000 derivatives ++config CPU_AT32AP700X ++ bool + select PLATFORM_AT32AP +-endchoice +- +-# +-# CPU Daughterboards for ATSTK1000 +-config BOARD_ATSTK1002 ++config CPU_AT32AP7000 ++ bool ++ select CPU_AT32AP700X ++config CPU_AT32AP7001 + bool ++ select CPU_AT32AP700X ++config CPU_AT32AP7002 ++ bool ++ select CPU_AT32AP700X + + choice + prompt "AVR32 board type" +@@ -101,15 +108,18 @@ choice + + config BOARD_ATSTK1000 + bool "ATSTK1000 evaluation board" +- select BOARD_ATSTK1002 if CPU_AT32AP7000 + + config BOARD_ATNGW100 + bool "ATNGW100 Network Gateway" ++ select CPU_AT32AP7000 + endchoice + + if BOARD_ATSTK1000 + source "arch/avr32/boards/atstk1000/Kconfig" + endif ++if BOARD_ATNGW100 ++source "arch/avr32/boards/atngw100/Kconfig" ++endif + + choice + prompt "Boot loader type" +@@ -123,15 +133,15 @@ source "arch/avr32/mach-at32ap/Kconfig" + + config LOAD_ADDRESS + hex +- default 0x10000000 if LOADER_U_BOOT=y && CPU_AT32AP7000=y ++ default 0x10000000 if LOADER_U_BOOT=y && CPU_AT32AP700X=y + + config ENTRY_ADDRESS + hex +- default 0x90000000 if LOADER_U_BOOT=y && CPU_AT32AP7000=y ++ default 0x90000000 if LOADER_U_BOOT=y && CPU_AT32AP700X=y + + config PHYS_OFFSET + hex +- default 0x10000000 if CPU_AT32AP7000=y ++ default 0x10000000 if CPU_AT32AP700X=y + + source "kernel/Kconfig.preempt" + +@@ -163,6 +173,20 @@ config OWNERSHIP_TRACE + enabling Nexus-compliant debuggers to keep track of the PID of the + currently executing task. + ++config NMI_DEBUGGING ++ bool "NMI Debugging" ++ default n ++ help ++ Say Y here and pass the nmi_debug command-line parameter to ++ the kernel to turn on NMI debugging. Depending on the value ++ of the nmi_debug option, various pieces of information will ++ be dumped to the console when a Non-Maskable Interrupt ++ happens. ++ ++config DW_DMAC ++ tristate "Synopsys DesignWare DMA Controller support" ++ default y if CPU_AT32AP7000 ++ + # FPU emulation goes here + + source "kernel/Kconfig.hz" +@@ -219,6 +243,8 @@ source "drivers/Kconfig" + + source "fs/Kconfig" + ++source "kernel/Kconfig.instrumentation" ++ + source "arch/avr32/Kconfig.debug" + + source "security/Kconfig" +diff -Nrup linux-2.6.24/arch/avr32/Kconfig.debug linux-avr32/arch/avr32/Kconfig.debug +--- linux-2.6.24/arch/avr32/Kconfig.debug 2008-01-24 17:58:37.000000000 -0500 ++++ linux-avr32/arch/avr32/Kconfig.debug 2008-02-01 14:51:35.000000000 -0500 +@@ -6,14 +6,4 @@ config TRACE_IRQFLAGS_SUPPORT + + source "lib/Kconfig.debug" + +-config KPROBES +- bool "Kprobes" +- depends on DEBUG_KERNEL +- help +- Kprobes allows you to trap at almost any kernel address and +- execute a callback function. register_kprobe() establishes +- a probepoint and specifies the callback. Kprobes is useful +- for kernel debugging, non-intrusive instrumentation and testing. +- If in doubt, say "N". +- + endmenu +diff -Nrup linux-2.6.24/arch/avr32/kernel/cpu.c linux-avr32/arch/avr32/kernel/cpu.c +--- linux-2.6.24/arch/avr32/kernel/cpu.c 2008-01-24 17:58:37.000000000 -0500 ++++ linux-avr32/arch/avr32/kernel/cpu.c 2008-02-01 14:51:35.000000000 -0500 +@@ -13,6 +13,7 @@ + #include <linux/percpu.h> + #include <linux/param.h> + #include <linux/errno.h> ++#include <linux/clk.h> + + #include <asm/setup.h> + #include <asm/sysreg.h> +@@ -187,9 +188,20 @@ static int __init topology_init(void) + + subsys_initcall(topology_init); + ++struct chip_id_map { ++ u16 mid; ++ u16 pn; ++ const char *name; ++}; ++ ++static const struct chip_id_map chip_names[] = { ++ { .mid = 0x1f, .pn = 0x1e82, .name = "AT32AP700x" }, ++}; ++#define NR_CHIP_NAMES ARRAY_SIZE(chip_names) ++ + static const char *cpu_names[] = { + "Morgan", +- "AP7000", ++ "AP7", + }; + #define NR_CPU_NAMES ARRAY_SIZE(cpu_names) + +@@ -206,12 +218,32 @@ static const char *mmu_types[] = { + "MPU" + }; + ++static const char *cpu_feature_flags[] = { ++ "rmw", "dsp", "simd", "ocd", "perfctr", "java", "fpu", ++}; ++ ++static const char *get_chip_name(struct avr32_cpuinfo *cpu) ++{ ++ unsigned int i; ++ unsigned int mid = avr32_get_manufacturer_id(cpu); ++ unsigned int pn = avr32_get_product_number(cpu); ++ ++ for (i = 0; i < NR_CHIP_NAMES; i++) { ++ if (chip_names[i].mid == mid && chip_names[i].pn == pn) ++ return chip_names[i].name; ++ } ++ ++ return "(unknown)"; ++} ++ + void __init setup_processor(void) + { + unsigned long config0, config1; + unsigned long features; + unsigned cpu_id, cpu_rev, arch_id, arch_rev, mmu_type; ++ unsigned device_id; + unsigned tmp; ++ unsigned i; + + config0 = sysreg_read(CONFIG0); + config1 = sysreg_read(CONFIG1); +@@ -221,11 +253,14 @@ void __init setup_processor(void) + arch_rev = SYSREG_BFEXT(AR, config0); + mmu_type = SYSREG_BFEXT(MMUT, config0); + ++ device_id = ocd_read(DID); ++ + boot_cpu_data.arch_type = arch_id; + boot_cpu_data.cpu_type = cpu_id; + boot_cpu_data.arch_revision = arch_rev; + boot_cpu_data.cpu_revision = cpu_rev; + boot_cpu_data.tlb_config = mmu_type; ++ boot_cpu_data.device_id = device_id; + + tmp = SYSREG_BFEXT(ILSZ, config1); + if (tmp) { +@@ -247,41 +282,34 @@ void __init setup_processor(void) + return; + } + +- printk ("CPU: %s [%02x] revision %d (%s revision %d)\n", ++ printk ("CPU: %s chip revision %c\n", get_chip_name(&boot_cpu_data), ++ avr32_get_chip_revision(&boot_cpu_data) + 'A'); ++ printk ("CPU: %s [%02x] core revision %d (%s arch revision %d)\n", + cpu_names[cpu_id], cpu_id, cpu_rev, + arch_names[arch_id], arch_rev); + printk ("CPU: MMU configuration: %s\n", mmu_types[mmu_type]); + + printk ("CPU: features:"); + features = 0; +- if (config0 & SYSREG_BIT(CONFIG0_R)) { ++ if (config0 & SYSREG_BIT(CONFIG0_R)) + features |= AVR32_FEATURE_RMW; +- printk(" rmw"); +- } +- if (config0 & SYSREG_BIT(CONFIG0_D)) { ++ if (config0 & SYSREG_BIT(CONFIG0_D)) + features |= AVR32_FEATURE_DSP; +- printk(" dsp"); +- } +- if (config0 & SYSREG_BIT(CONFIG0_S)) { ++ if (config0 & SYSREG_BIT(CONFIG0_S)) + features |= AVR32_FEATURE_SIMD; +- printk(" simd"); +- } +- if (config0 & SYSREG_BIT(CONFIG0_O)) { ++ if (config0 & SYSREG_BIT(CONFIG0_O)) + features |= AVR32_FEATURE_OCD; +- printk(" ocd"); +- } +- if (config0 & SYSREG_BIT(CONFIG0_P)) { ++ if (config0 & SYSREG_BIT(CONFIG0_P)) + features |= AVR32_FEATURE_PCTR; +- printk(" perfctr"); +- } +- if (config0 & SYSREG_BIT(CONFIG0_J)) { ++ if (config0 & SYSREG_BIT(CONFIG0_J)) + features |= AVR32_FEATURE_JAVA; +- printk(" java"); +- } +- if (config0 & SYSREG_BIT(CONFIG0_F)) { ++ if (config0 & SYSREG_BIT(CONFIG0_F)) + features |= AVR32_FEATURE_FPU; +- printk(" fpu"); +- } ++ ++ for (i = 0; i < ARRAY_SIZE(cpu_feature_flags); i++) ++ if (features & (1 << i)) ++ printk(" %s", cpu_feature_flags[i]); ++ + printk("\n"); + boot_cpu_data.features = features; + } +@@ -291,6 +319,8 @@ static int c_show(struct seq_file *m, vo + { + unsigned int icache_size, dcache_size; + unsigned int cpu = smp_processor_id(); ++ unsigned int freq; ++ unsigned int i; + + icache_size = boot_cpu_data.icache.ways * + boot_cpu_data.icache.sets * +@@ -301,15 +331,21 @@ static int c_show(struct seq_file *m, vo + + seq_printf(m, "processor\t: %d\n", cpu); + ++ seq_printf(m, "chip type\t: %s revision %c\n", ++ get_chip_name(&boot_cpu_data), ++ avr32_get_chip_revision(&boot_cpu_data) + 'A'); + if (boot_cpu_data.arch_type < NR_ARCH_NAMES) +- seq_printf(m, "cpu family\t: %s revision %d\n", ++ seq_printf(m, "cpu arch\t: %s revision %d\n", + arch_names[boot_cpu_data.arch_type], + boot_cpu_data.arch_revision); + if (boot_cpu_data.cpu_type < NR_CPU_NAMES) +- seq_printf(m, "cpu type\t: %s revision %d\n", ++ seq_printf(m, "cpu core\t: %s revision %d\n", + cpu_names[boot_cpu_data.cpu_type], + boot_cpu_data.cpu_revision); + ++ freq = (clk_get_rate(boot_cpu_data.clk) + 500) / 1000; ++ seq_printf(m, "cpu MHz\t\t: %u.%03u\n", freq / 1000, freq % 1000); ++ + seq_printf(m, "i-cache\t\t: %dK (%u ways x %u sets x %u)\n", + icache_size >> 10, + boot_cpu_data.icache.ways, +@@ -320,7 +356,13 @@ static int c_show(struct seq_file *m, vo + boot_cpu_data.dcache.ways, + boot_cpu_data.dcache.sets, + boot_cpu_data.dcache.linesz); +- seq_printf(m, "bogomips\t: %lu.%02lu\n", ++ ++ seq_printf(m, "features\t:"); ++ for (i = 0; i < ARRAY_SIZE(cpu_feature_flags); i++) ++ if (boot_cpu_data.features & (1 << i)) ++ seq_printf(m, " %s", cpu_feature_flags[i]); ++ ++ seq_printf(m, "\nbogomips\t: %lu.%02lu\n", + boot_cpu_data.loops_per_jiffy / (500000/HZ), + (boot_cpu_data.loops_per_jiffy / (5000/HZ)) % 100); + +@@ -343,7 +385,7 @@ static void c_stop(struct seq_file *m, v + + } + +-struct seq_operations cpuinfo_op = { ++const struct seq_operations cpuinfo_op = { + .start = c_start, + .next = c_next, + .stop = c_stop, +diff -Nrup linux-2.6.24/arch/avr32/kernel/dma-controller.c linux-avr32/arch/avr32/kernel/dma-controller.c +--- linux-2.6.24/arch/avr32/kernel/dma-controller.c 1969-12-31 19:00:00.000000000 -0500 ++++ linux-avr32/arch/avr32/kernel/dma-controller.c 2008-02-01 14:51:35.000000000 -0500 +@@ -0,0 +1,34 @@ ++/* ++ * Preliminary DMA controller framework for AVR32 ++ * ++ * Copyright (C) 2005-2006 Atmel Corporation ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation. ++ */ ++#include <asm/dma-controller.h> ++ ++static LIST_HEAD(controllers); ++ ++int register_dma_controller(struct dma_controller *dmac) ++{ ++ static int next_id; ++ ++ dmac->id = next_id++; ++ list_add_tail(&dmac->list, &controllers); ++ ++ return 0; ++} ++EXPORT_SYMBOL(register_dma_controller); ++ ++struct dma_controller *find_dma_controller(int id) ++{ ++ struct dma_controller *dmac; ++ ++ list_for_each_entry(dmac, &controllers, list) ++ if (dmac->id == id) ++ return dmac; ++ return NULL; ++} ++EXPORT_SYMBOL(find_dma_controller); +diff -Nrup linux-2.6.24/arch/avr32/kernel/irq.c linux-avr32/arch/avr32/kernel/irq.c +--- linux-2.6.24/arch/avr32/kernel/irq.c 2008-01-24 17:58:37.000000000 -0500 ++++ linux-avr32/arch/avr32/kernel/irq.c 2008-02-01 14:51:35.000000000 -0500 +@@ -25,6 +25,17 @@ void ack_bad_irq(unsigned int irq) + printk("unexpected IRQ %u\n", irq); + } + ++/* May be overridden by platform code */ ++int __weak nmi_enable(void) ++{ ++ return -ENOSYS; ++} ++ ++void __weak nmi_disable(void) ++{ ++ ++} ++ + #ifdef CONFIG_PROC_FS + int show_interrupts(struct seq_file *p, void *v) + { +diff -Nrup linux-2.6.24/arch/avr32/kernel/kprobes.c linux-avr32/arch/avr32/kernel/kprobes.c +--- linux-2.6.24/arch/avr32/kernel/kprobes.c 2008-01-24 17:58:37.000000000 -0500 ++++ linux-avr32/arch/avr32/kernel/kprobes.c 2008-02-01 14:51:35.000000000 -0500 +@@ -48,6 +48,7 @@ int __kprobes arch_prepare_kprobe(struct + void __kprobes arch_arm_kprobe(struct kprobe *p) + { + pr_debug("arming kprobe at %p\n", p->addr); ++ ocd_enable(NULL); + *p->addr = BREAKPOINT_INSTRUCTION; + flush_icache_range((unsigned long)p->addr, + (unsigned long)p->addr + sizeof(kprobe_opcode_t)); +@@ -56,6 +57,7 @@ void __kprobes arch_arm_kprobe(struct kp + void __kprobes arch_disarm_kprobe(struct kprobe *p) + { + pr_debug("disarming kprobe at %p\n", p->addr); ++ ocd_disable(NULL); + *p->addr = p->opcode; + flush_icache_range((unsigned long)p->addr, + (unsigned long)p->addr + sizeof(kprobe_opcode_t)); +@@ -260,9 +262,6 @@ int __kprobes longjmp_break_handler(stru + + int __init arch_init_kprobes(void) + { +- printk("KPROBES: Enabling monitor mode (MM|DBE)...\n"); +- ocd_write(DC, (1 << OCD_DC_MM_BIT) | (1 << OCD_DC_DBE_BIT)); +- + /* TODO: Register kretprobe trampoline */ + return 0; + } +diff -Nrup linux-2.6.24/arch/avr32/kernel/Makefile linux-avr32/arch/avr32/kernel/Makefile +--- linux-2.6.24/arch/avr32/kernel/Makefile 2008-01-24 17:58:37.000000000 -0500 ++++ linux-avr32/arch/avr32/kernel/Makefile 2008-02-01 14:51:35.000000000 -0500 +@@ -6,9 +6,11 @@ extra-y := head.o vmlinux.lds + + obj-$(CONFIG_SUBARCH_AVR32B) += entry-avr32b.o + obj-y += syscall_table.o syscall-stubs.o irq.o +-obj-y += setup.o traps.o semaphore.o ptrace.o ++obj-y += setup.o traps.o semaphore.o ocd.o ptrace.o + obj-y += signal.o sys_avr32.o process.o time.o + obj-y += init_task.o switch_to.o cpu.o ++obj-y += dma-controller.o + obj-$(CONFIG_MODULES) += module.o avr32_ksyms.o + obj-$(CONFIG_KPROBES) += kprobes.o + obj-$(CONFIG_STACKTRACE) += stacktrace.o ++obj-$(CONFIG_NMI_DEBUGGING) += nmi_debug.o +diff -Nrup linux-2.6.24/arch/avr32/kernel/nmi_debug.c linux-avr32/arch/avr32/kernel/nmi_debug.c +--- linux-2.6.24/arch/avr32/kernel/nmi_debug.c 1969-12-31 19:00:00.000000000 -0500 ++++ linux-avr32/arch/avr32/kernel/nmi_debug.c 2008-02-01 14:51:35.000000000 -0500 +@@ -0,0 +1,82 @@ ++/* ++ * Copyright (C) 2007 Atmel Corporation ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation. ++ */ ++#include <linux/delay.h> ++#include <linux/kdebug.h> ++#include <linux/notifier.h> ++#include <linux/sched.h> ++ ++#include <asm/irq.h> ++ ++enum nmi_action { ++ NMI_SHOW_STATE = 1 << 0, ++ NMI_SHOW_REGS = 1 << 1, ++ NMI_DIE = 1 << 2, ++ NMI_DEBOUNCE = 1 << 3, ++}; ++ ++static unsigned long nmi_actions; ++ ++static int nmi_debug_notify(struct notifier_block *self, ++ unsigned long val, void *data) ++{ ++ struct die_args *args = data; ++ ++ if (likely(val != DIE_NMI)) ++ return NOTIFY_DONE; ++ ++ if (nmi_actions & NMI_SHOW_STATE) ++ show_state(); ++ if (nmi_actions & NMI_SHOW_REGS) ++ show_regs(args->regs); ++ if (nmi_actions & NMI_DEBOUNCE) ++ mdelay(10); ++ if (nmi_actions & NMI_DIE) ++ return NOTIFY_BAD; ++ ++ return NOTIFY_OK; ++} ++ ++static struct notifier_block nmi_debug_nb = { ++ .notifier_call = nmi_debug_notify, ++}; ++ ++static int __init nmi_debug_setup(char *str) ++{ ++ char *p, *sep; ++ ++ register_die_notifier(&nmi_debug_nb); ++ if (nmi_enable()) { ++ printk(KERN_WARNING "Unable to enable NMI.\n"); ++ return 0; ++ } ++ ++ if (*str != '=') ++ return 0; ++ ++ for (p = str + 1; *p; p = sep + 1) { ++ sep = strchr(p, ','); ++ if (sep) ++ *sep = 0; ++ if (strcmp(p, "state") == 0) ++ nmi_actions |= NMI_SHOW_STATE; ++ else if (strcmp(p, "regs") == 0) ++ nmi_actions |= NMI_SHOW_REGS; ++ else if (strcmp(p, "debounce") == 0) ++ nmi_actions |= NMI_DEBOUNCE; ++ else if (strcmp(p, "die") == 0) ++ nmi_actions |= NMI_DIE; ++ else ++ printk(KERN_WARNING "NMI: Unrecognized action `%s'\n", ++ p); ++ if (!sep) ++ break; ++ } ++ ++ return 0; ++} ++__setup("nmi_debug", nmi_debug_setup); +diff -Nrup linux-2.6.24/arch/avr32/kernel/ocd.c linux-avr32/arch/avr32/kernel/ocd.c +--- linux-2.6.24/arch/avr32/kernel/ocd.c 1969-12-31 19:00:00.000000000 -0500 ++++ linux-avr32/arch/avr32/kernel/ocd.c 2008-02-01 14:51:35.000000000 -0500 +@@ -0,0 +1,163 @@ ++/* ++ * Copyright (C) 2007 Atmel Corporation ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation. ++ */ ++#include <linux/init.h> ++#include <linux/sched.h> ++#include <linux/spinlock.h> ++ ++#include <asm/ocd.h> ++ ++static long ocd_count; ++static spinlock_t ocd_lock; ++ ++/** ++ * ocd_enable - enable on-chip debugging ++ * @child: task to be debugged ++ * ++ * If @child is non-NULL, ocd_enable() first checks if debugging has ++ * already been enabled for @child, and if it has, does nothing. ++ * ++ * If @child is NULL (e.g. when debugging the kernel), or debugging ++ * has not already been enabled for it, ocd_enable() increments the ++ * reference count and enables the debugging hardware. ++ */ ++void ocd_enable(struct task_struct *child) ++{ ++ u32 dc; ++ ++ if (child) ++ pr_debug("ocd_enable: child=%s [%u]\n", ++ child->comm, child->pid); ++ else ++ pr_debug("ocd_enable (no child)\n"); ++ ++ if (!child || !test_and_set_tsk_thread_flag(child, TIF_DEBUG)) { ++ spin_lock(&ocd_lock); ++ ocd_count++; ++ dc = ocd_read(DC); ++ dc |= (1 << OCD_DC_MM_BIT) | (1 << OCD_DC_DBE_BIT); ++ ocd_write(DC, dc); ++ spin_unlock(&ocd_lock); ++ } ++} ++ ++/** ++ * ocd_disable - disable on-chip debugging ++ * @child: task that was being debugged, but isn't anymore ++ * ++ * If @child is non-NULL, ocd_disable() checks if debugging is enabled ++ * for @child, and if it isn't, does nothing. ++ * ++ * If @child is NULL (e.g. when debugging the kernel), or debugging is ++ * enabled, ocd_disable() decrements the reference count, and if it ++ * reaches zero, disables the debugging hardware. ++ */ ++void ocd_disable(struct task_struct *child) ++{ ++ u32 dc; ++ ++ if (!child) ++ pr_debug("ocd_disable (no child)\n"); ++ else if (test_tsk_thread_flag(child, TIF_DEBUG)) ++ pr_debug("ocd_disable: child=%s [%u]\n", ++ child->comm, child->pid); ++ ++ if (!child || test_and_clear_tsk_thread_flag(child, TIF_DEBUG)) { ++ spin_lock(&ocd_lock); ++ ocd_count--; ++ ++ WARN_ON(ocd_count < 0); ++ ++ if (ocd_count <= 0) { ++ dc = ocd_read(DC); ++ dc &= ~((1 << OCD_DC_MM_BIT) | (1 << OCD_DC_DBE_BIT)); ++ ocd_write(DC, dc); ++ } ++ spin_unlock(&ocd_lock); ++ } ++} ++ ++#ifdef CONFIG_DEBUG_FS ++#include <linux/debugfs.h> ++#include <linux/module.h> ++ ++static struct dentry *ocd_debugfs_root; ++static struct dentry *ocd_debugfs_DC; ++static struct dentry *ocd_debugfs_DS; ++static struct dentry *ocd_debugfs_count; ++ ++static u64 ocd_DC_get(void *data) ++{ ++ return ocd_read(DC); ++} ++static void ocd_DC_set(void *data, u64 val) ++{ ++ ocd_write(DC, val); ++} ++DEFINE_SIMPLE_ATTRIBUTE(fops_DC, ocd_DC_get, ocd_DC_set, "0x%08llx\n"); ++ ++static u64 ocd_DS_get(void *data) ++{ ++ return ocd_read(DS); ++} ++DEFINE_SIMPLE_ATTRIBUTE(fops_DS, ocd_DS_get, NULL, "0x%08llx\n"); ++ ++static u64 ocd_count_get(void *data) ++{ ++ return ocd_count; ++} ++DEFINE_SIMPLE_ATTRIBUTE(fops_count, ocd_count_get, NULL, "%lld\n"); ++ ++static void ocd_debugfs_init(void) ++{ ++ struct dentry *root; ++ ++ root = debugfs_create_dir("ocd", NULL); ++ if (IS_ERR(root) || !root) ++ goto err_root; ++ ocd_debugfs_root = root; ++ ++ ocd_debugfs_DC = debugfs_create_file("DC", S_IRUSR | S_IWUSR, ++ root, NULL, &fops_DC); ++ if (!ocd_debugfs_DC) ++ goto err_DC; ++ ++ ocd_debugfs_DS = debugfs_create_file("DS", S_IRUSR, root, ++ NULL, &fops_DS); ++ if (!ocd_debugfs_DS) ++ goto err_DS; ++ ++ ocd_debugfs_count = debugfs_create_file("count", S_IRUSR, root, ++ NULL, &fops_count); ++ if (!ocd_debugfs_count) ++ goto err_count; ++ ++ return; ++ ++err_count: ++ debugfs_remove(ocd_debugfs_DS); ++err_DS: ++ debugfs_remove(ocd_debugfs_DC); ++err_DC: ++ debugfs_remove(ocd_debugfs_root); ++err_root: ++ printk(KERN_WARNING "OCD: Failed to create debugfs entries\n"); ++} ++#else ++static inline void ocd_debugfs_init(void) ++{ ++ ++} ++#endif ++ ++static int __init ocd_init(void) ++{ ++ spin_lock_init(&ocd_lock); ++ ocd_debugfs_init(); ++ return 0; ++} ++arch_initcall(ocd_init); +diff -Nrup linux-2.6.24/arch/avr32/kernel/process.c linux-avr32/arch/avr32/kernel/process.c +--- linux-2.6.24/arch/avr32/kernel/process.c 2008-01-24 17:58:37.000000000 -0500 ++++ linux-avr32/arch/avr32/kernel/process.c 2008-02-01 14:51:35.000000000 -0500 +@@ -103,7 +103,7 @@ EXPORT_SYMBOL(kernel_thread); + */ + void exit_thread(void) + { +- /* nothing to do */ ++ ocd_disable(current); + } + + void flush_thread(void) +@@ -345,6 +345,9 @@ int copy_thread(int nr, unsigned long cl + p->thread.cpu_context.ksp = (unsigned long)childregs; + p->thread.cpu_context.pc = (unsigned long)ret_from_fork; + ++ if ((clone_flags & CLONE_PTRACE) && test_thread_flag(TIF_DEBUG)) ++ ocd_enable(p); ++ + return 0; + } + +diff -Nrup linux-2.6.24/arch/avr32/kernel/ptrace.c linux-avr32/arch/avr32/kernel/ptrace.c +--- linux-2.6.24/arch/avr32/kernel/ptrace.c 2008-01-24 17:58:37.000000000 -0500 ++++ linux-avr32/arch/avr32/kernel/ptrace.c 2008-02-01 14:51:35.000000000 -0500 +@@ -58,6 +58,7 @@ void ptrace_disable(struct task_struct * + { + clear_tsk_thread_flag(child, TIF_SINGLE_STEP); + clear_tsk_thread_flag(child, TIF_BREAKPOINT); ++ ocd_disable(child); + } + + /* +@@ -144,10 +145,6 @@ long arch_ptrace(struct task_struct *chi + { + int ret; + +- pr_debug("ptrace: Enabling monitor mode...\n"); +- ocd_write(DC, ocd_read(DC) | (1 << OCD_DC_MM_BIT) +- | (1 << OCD_DC_DBE_BIT)); +- + switch (request) { + /* Read the word at location addr in the child process */ + case PTRACE_PEEKTEXT: +diff -Nrup linux-2.6.24/arch/avr32/kernel/setup.c linux-avr32/arch/avr32/kernel/setup.c +--- linux-2.6.24/arch/avr32/kernel/setup.c 2008-01-24 17:58:37.000000000 -0500 ++++ linux-avr32/arch/avr32/kernel/setup.c 2008-02-01 14:51:35.000000000 -0500 +@@ -273,6 +273,8 @@ static int __init early_parse_fbmem(char + printk(KERN_WARNING + "Failed to allocate framebuffer memory\n"); + fbmem_size = 0; ++ } else { ++ memset(__va(fbmem_start), 0, fbmem_size); + } + } + +diff -Nrup linux-2.6.24/arch/avr32/kernel/signal.c linux-avr32/arch/avr32/kernel/signal.c +--- linux-2.6.24/arch/avr32/kernel/signal.c 2008-01-24 17:58:37.000000000 -0500 ++++ linux-avr32/arch/avr32/kernel/signal.c 2008-02-01 14:51:35.000000000 -0500 +@@ -270,19 +270,12 @@ int do_signal(struct pt_regs *regs, sigs + if (!user_mode(regs)) + return 0; + +- if (try_to_freeze()) { +- signr = 0; +- if (!signal_pending(current)) +- goto no_signal; +- } +- + if (test_thread_flag(TIF_RESTORE_SIGMASK)) + oldset = ¤t->saved_sigmask; + else if (!oldset) + oldset = ¤t->blocked; + + signr = get_signal_to_deliver(&info, &ka, regs, NULL); +-no_signal: + if (syscall) { + switch (regs->r12) { + case -ERESTART_RESTARTBLOCK: +diff -Nrup linux-2.6.24/arch/avr32/kernel/traps.c linux-avr32/arch/avr32/kernel/traps.c +--- linux-2.6.24/arch/avr32/kernel/traps.c 2008-01-24 17:58:37.000000000 -0500 ++++ linux-avr32/arch/avr32/kernel/traps.c 2008-02-01 14:51:35.000000000 -0500 +@@ -9,6 +9,7 @@ + #include <linux/bug.h> + #include <linux/init.h> + #include <linux/kallsyms.h> ++#include <linux/kdebug.h> + #include <linux/module.h> + #include <linux/notifier.h> + #include <linux/sched.h> +@@ -107,9 +108,23 @@ void _exception(long signr, struct pt_re + + asmlinkage void do_nmi(unsigned long ecr, struct pt_regs *regs) + { +- printk(KERN_ALERT "Got Non-Maskable Interrupt, dumping regs\n"); +- show_regs_log_lvl(regs, KERN_ALERT); +- show_stack_log_lvl(current, regs->sp, regs, KERN_ALERT); ++ int ret; ++ ++ nmi_enter(); ++ ++ ret = notify_die(DIE_NMI, "NMI", regs, 0, ecr, SIGINT); ++ switch (ret) { ++ case NOTIFY_OK: ++ case NOTIFY_STOP: ++ return; ++ case NOTIFY_BAD: ++ die("Fatal Non-Maskable Interrupt", regs, SIGINT); ++ default: ++ break; ++ } ++ ++ printk(KERN_ALERT "Got NMI, but nobody cared. Disabling...\n"); ++ nmi_disable(); + } + + asmlinkage void do_critical_exception(unsigned long ecr, struct pt_regs *regs) +diff -Nrup linux-2.6.24/arch/avr32/mach-at32ap/at32ap7000.c linux-avr32/arch/avr32/mach-at32ap/at32ap7000.c +--- linux-2.6.24/arch/avr32/mach-at32ap/at32ap7000.c 2008-01-24 17:58:37.000000000 -0500 ++++ linux-avr32/arch/avr32/mach-at32ap/at32ap7000.c 1969-12-31 19:00:00.000000000 -0500 +@@ -1,1730 +0,0 @@ +-/* +- * Copyright (C) 2005-2006 Atmel Corporation +- * +- * This program is free software; you can redistribute it and/or modify +- * it under the terms of the GNU General Public License version 2 as +- * published by the Free Software Foundation. +- */ +-#include <linux/clk.h> +-#include <linux/fb.h> +-#include <linux/init.h> +-#include <linux/platform_device.h> +-#include <linux/dma-mapping.h> +-#include <linux/spi/spi.h> +- +-#include <asm/io.h> +- +-#include <asm/arch/at32ap7000.h> +-#include <asm/arch/board.h> +-#include <asm/arch/portmux.h> +- +-#include <video/atmel_lcdc.h> +- +-#include "clock.h" +-#include "hmatrix.h" +-#include "pio.h" +-#include "pm.h" +- +- +-#define PBMEM(base) \ +- { \ +- .start = base, \ +- .end = base + 0x3ff, \ +- .flags = IORESOURCE_MEM, \ +- } +-#define IRQ(num) \ +- { \ +- .start = num, \ +- .end = num, \ +- .flags = IORESOURCE_IRQ, \ +- } +-#define NAMED_IRQ(num, _name) \ +- { \ +- .start = num, \ +- .end = num, \ +- .name = _name, \ +- .flags = IORESOURCE_IRQ, \ +- } +- +-/* REVISIT these assume *every* device supports DMA, but several +- * don't ... tc, smc, pio, rtc, watchdog, pwm, ps2, and more. +- */ +-#define DEFINE_DEV(_name, _id) \ +-static u64 _name##_id##_dma_mask = DMA_32BIT_MASK; \ +-static struct platform_device _name##_id##_device = { \ +- .name = #_name, \ +- .id = _id, \ +- .dev = { \ +- .dma_mask = &_name##_id##_dma_mask, \ +- .coherent_dma_mask = DMA_32BIT_MASK, \ +- }, \ +- .resource = _name##_id##_resource, \ +- .num_resources = ARRAY_SIZE(_name##_id##_resource), \ +-} +-#define DEFINE_DEV_DATA(_name, _id) \ +-static u64 _name##_id##_dma_mask = DMA_32BIT_MASK; \ +-static struct platform_device _name##_id##_device = { \ +- .name = #_name, \ +- .id = _id, \ +- .dev = { \ +- .dma_mask = &_name##_id##_dma_mask, \ +- .platform_data = &_name##_id##_data, \ +- .coherent_dma_mask = DMA_32BIT_MASK, \ +- }, \ +- .resource = _name##_id##_resource, \ +- .num_resources = ARRAY_SIZE(_name##_id##_resource), \ +-} +- +-#define select_peripheral(pin, periph, flags) \ +- at32_select_periph(GPIO_PIN_##pin, GPIO_##periph, flags) +- +-#define DEV_CLK(_name, devname, bus, _index) \ +-static struct clk devname##_##_name = { \ +- .name = #_name, \ +- .dev = &devname##_device.dev, \ +- .parent = &bus##_clk, \ +- .mode = bus##_clk_mode, \ +- .get_rate = bus##_clk_get_rate, \ +- .index = _index, \ +-} +- +-static DEFINE_SPINLOCK(pm_lock); +- +-unsigned long at32ap7000_osc_rates[3] = { +- [0] = 32768, +- /* FIXME: these are ATSTK1002-specific */ +- [1] = 20000000, +- [2] = 12000000, +-}; +- +-static unsigned long osc_get_rate(struct clk *clk) +-{ +- return at32ap7000_osc_rates[clk->index]; +-} +- +-static unsigned long pll_get_rate(struct clk *clk, unsigned long control) +-{ +- unsigned long div, mul, rate; +- +- if (!(control & PM_BIT(PLLEN))) +- return 0; +- +- div = PM_BFEXT(PLLDIV, control) + 1; +- mul = PM_BFEXT(PLLMUL, control) + 1; +- +- rate = clk->parent->get_rate(clk->parent); +- rate = (rate + div / 2) / div; +- rate *= mul; +- +- return rate; +-} +- +-static unsigned long pll0_get_rate(struct clk *clk) +-{ +- u32 control; +- +- control = pm_readl(PLL0); +- +- return pll_get_rate(clk, control); +-} +- +-static unsigned long pll1_get_rate(struct clk *clk) +-{ +- u32 control; +- +- control = pm_readl(PLL1); +- +- return pll_get_rate(clk, control); +-} +- +-/* +- * The AT32AP7000 has five primary clock sources: One 32kHz +- * oscillator, two crystal oscillators and two PLLs. +- */ +-static struct clk osc32k = { +- .name = "osc32k", +- .get_rate = osc_get_rate, +- .users = 1, +- .index = 0, +-}; +-static struct clk osc0 = { +- .name = "osc0", +- .get_rate = osc_get_rate, +- .users = 1, +- .index = 1, +-}; +-static struct clk osc1 = { +- .name = "osc1", +- .get_rate = osc_get_rate, +- .index = 2, +-}; +-static struct clk pll0 = { +- .name = "pll0", +- .get_rate = pll0_get_rate, +- .parent = &osc0, +-}; +-static struct clk pll1 = { +- .name = "pll1", +- .get_rate = pll1_get_rate, +- .parent = &osc0, +-}; +- +-/* +- * The main clock can be either osc0 or pll0. The boot loader may +- * have chosen one for us, so we don't really know which one until we +- * have a look at the SM. +- */ +-static struct clk *main_clock; +- +-/* +- * Synchronous clocks are generated from the main clock. The clocks +- * must satisfy the constraint +- * fCPU >= fHSB >= fPB +- * i.e. each clock must not be faster than its parent. +- */ +-static unsigned long bus_clk_get_rate(struct clk *clk, unsigned int shift) +-{ +- return main_clock->get_rate(main_clock) >> shift; +-}; +- +-static void cpu_clk_mode(struct clk *clk, int enabled) +-{ +- unsigned long flags; +- u32 mask; +- +- spin_lock_irqsave(&pm_lock, flags); +- mask = pm_readl(CPU_MASK); +- if (enabled) +- mask |= 1 << clk->index; +- else +- mask &= ~(1 << clk->index); +- pm_writel(CPU_MASK, mask); +- spin_unlock_irqrestore(&pm_lock, flags); +-} +- +-static unsigned long cpu_clk_get_rate(struct clk *clk) +-{ +- unsigned long cksel, shift = 0; +- +- cksel = pm_readl(CKSEL); +- if (cksel & PM_BIT(CPUDIV)) +- shift = PM_BFEXT(CPUSEL, cksel) + 1; +- +- return bus_clk_get_rate(clk, shift); +-} +- +-static long cpu_clk_set_rate(struct clk *clk, unsigned long rate, int apply) +-{ +- u32 control; +- unsigned long parent_rate, child_div, actual_rate, div; +- +- parent_rate = clk->parent->get_rate(clk->parent); +- control = pm_readl(CKSEL); +- +- if (control & PM_BIT(HSBDIV)) +- child_div = 1 << (PM_BFEXT(HSBSEL, control) + 1); +- else +- child_div = 1; +- +- if (rate > 3 * (parent_rate / 4) || child_div == 1) { +- actual_rate = parent_rate; +- control &= ~PM_BIT(CPUDIV); +- } else { +- unsigned int cpusel; +- div = (parent_rate + rate / 2) / rate; +- if (div > child_div) +- div = child_div; +- cpusel = (div > 1) ? (fls(div) - 2) : 0; +- control = PM_BIT(CPUDIV) | PM_BFINS(CPUSEL, cpusel, control); +- actual_rate = parent_rate / (1 << (cpusel + 1)); +- } +- +- pr_debug("clk %s: new rate %lu (actual rate %lu)\n", +- clk->name, rate, actual_rate); +- +- if (apply) +- pm_writel(CKSEL, control); +- +- return actual_rate; +-} +- +-static void hsb_clk_mode(struct clk *clk, int enabled) +-{ +- unsigned long flags; +- u32 mask; +- +- spin_lock_irqsave(&pm_lock, flags); +- mask = pm_readl(HSB_MASK); +- if (enabled) +- mask |= 1 << clk->index; +- else +- mask &= ~(1 << clk->index); +- pm_writel(HSB_MASK, mask); +- spin_unlock_irqrestore(&pm_lock, flags); +-} +- +-static unsigned long hsb_clk_get_rate(struct clk *clk) +-{ +- unsigned long cksel, shift = 0; +- +- cksel = pm_readl(CKSEL); +- if (cksel & PM_BIT(HSBDIV)) +- shift = PM_BFEXT(HSBSEL, cksel) + 1; +- +- return bus_clk_get_rate(clk, shift); +-} +- +-static void pba_clk_mode(struct clk *clk, int enabled) +-{ +- unsigned long flags; +- u32 mask; +- +- spin_lock_irqsave(&pm_lock, flags); +- mask = pm_readl(PBA_MASK); +- if (enabled) +- mask |= 1 << clk->index; +- else +- mask &= ~(1 << clk->index); +- pm_writel(PBA_MASK, mask); +- spin_unlock_irqrestore(&pm_lock, flags); +-} +- +-static unsigned long pba_clk_get_rate(struct clk *clk) +-{ +- unsigned long cksel, shift = 0; +- +- cksel = pm_readl(CKSEL); +- if (cksel & PM_BIT(PBADIV)) +- shift = PM_BFEXT(PBASEL, cksel) + 1; +- +- return bus_clk_get_rate(clk, shift); +-} +- +-static void pbb_clk_mode(struct clk *clk, int enabled) +-{ +- unsigned long flags; +- u32 mask; +- +- spin_lock_irqsave(&pm_lock, flags); +- mask = pm_readl(PBB_MASK); +- if (enabled) +- mask |= 1 << clk->index; +- else +- mask &= ~(1 << clk->index); +- pm_writel(PBB_MASK, mask); +- spin_unlock_irqrestore(&pm_lock, flags); +-} +- +-static unsigned long pbb_clk_get_rate(struct clk *clk) +-{ +- unsigned long cksel, shift = 0; +- +- cksel = pm_readl(CKSEL); +- if (cksel & PM_BIT(PBBDIV)) +- shift = PM_BFEXT(PBBSEL, cksel) + 1; +- +- return bus_clk_get_rate(clk, shift); +-} +- +-static struct clk cpu_clk = { +- .name = "cpu", +- .get_rate = cpu_clk_get_rate, +- .set_rate = cpu_clk_set_rate, +- .users = 1, +-}; +-static struct clk hsb_clk = { +- .name = "hsb", +- .parent = &cpu_clk, +- .get_rate = hsb_clk_get_rate, +-}; +-static struct clk pba_clk = { +- .name = "pba", +- .parent = &hsb_clk, +- .mode = hsb_clk_mode, +- .get_rate = pba_clk_get_rate, +- .index = 1, +-}; +-static struct clk pbb_clk = { +- .name = "pbb", +- .parent = &hsb_clk, +- .mode = hsb_clk_mode, +- .get_rate = pbb_clk_get_rate, +- .users = 1, +- .index = 2, +-}; +- +-/* -------------------------------------------------------------------- +- * Generic Clock operations +- * -------------------------------------------------------------------- */ +- +-static void genclk_mode(struct clk *clk, int enabled) +-{ +- u32 control; +- +- control = pm_readl(GCCTRL(clk->index)); +- if (enabled) +- control |= PM_BIT(CEN); +- else +- control &= ~PM_BIT(CEN); +- pm_writel(GCCTRL(clk->index), control); +-} +- +-static unsigned long genclk_get_rate(struct clk *clk) +-{ +- u32 control; +- unsigned long div = 1; +- +- control = pm_readl(GCCTRL(clk->index)); +- if (control & PM_BIT(DIVEN)) +- div = 2 * (PM_BFEXT(DIV, control) + 1); +- +- return clk->parent->get_rate(clk->parent) / div; +-} +- +-static long genclk_set_rate(struct clk *clk, unsigned long rate, int apply) +-{ +- u32 control; +- unsigned long parent_rate, actual_rate, div; +- +- parent_rate = clk->parent->get_rate(clk->parent); +- control = pm_readl(GCCTRL(clk->index)); +- +- if (rate > 3 * parent_rate / 4) { +- actual_rate = parent_rate; +- control &= ~PM_BIT(DIVEN); +- } else { +- div = (parent_rate + rate) / (2 * rate) - 1; +- control = PM_BFINS(DIV, div, control) | PM_BIT(DIVEN); +- actual_rate = parent_rate / (2 * (div + 1)); +- } +- +- dev_dbg(clk->dev, "clk %s: new rate %lu (actual rate %lu)\n", +- clk->name, rate, actual_rate); +- +- if (apply) +- pm_writel(GCCTRL(clk->index), control); +- +- return actual_rate; +-} +- +-int genclk_set_parent(struct clk *clk, struct clk *parent) +-{ +- u32 control; +- +- dev_dbg(clk->dev, "clk %s: new parent %s (was %s)\n", +- clk->name, parent->name, clk->parent->name); +- +- control = pm_readl(GCCTRL(clk->index)); +- +- if (parent == &osc1 || parent == &pll1) +- control |= PM_BIT(OSCSEL); +- else if (parent == &osc0 || parent == &pll0) +- control &= ~PM_BIT(OSCSEL); +- else +- return -EINVAL; +- +- if (parent == &pll0 || parent == &pll1) +- control |= PM_BIT(PLLSEL); +- else +- control &= ~PM_BIT(PLLSEL); +- +- pm_writel(GCCTRL(clk->index), control); +- clk->parent = parent; +- +- return 0; +-} +- +-static void __init genclk_init_parent(struct clk *clk) +-{ +- u32 control; +- struct clk *parent; +- +- BUG_ON(clk->index > 7); +- +- control = pm_readl(GCCTRL(clk->index)); +- if (control & PM_BIT(OSCSEL)) +- parent = (control & PM_BIT(PLLSEL)) ? &pll1 : &osc1; +- else +- parent = (control & PM_BIT(PLLSEL)) ? &pll0 : &osc0; +- +- clk->parent = parent; +-} +- +-/* -------------------------------------------------------------------- +- * System peripherals +- * -------------------------------------------------------------------- */ +-static struct resource at32_pm0_resource[] = { +- { +- .start = 0xfff00000, +- .end = 0xfff0007f, +- .flags = IORESOURCE_MEM, +- }, +- IRQ(20), +-}; +- +-static struct resource at32ap700x_rtc0_resource[] = { +- { +- .start = 0xfff00080, +- .end = 0xfff000af, +- .flags = IORESOURCE_MEM, +- }, +- IRQ(21), +-}; +- +-static struct resource at32_wdt0_resource[] = { +- { +- .start = 0xfff000b0, +- .end = 0xfff000cf, +- .flags = IORESOURCE_MEM, +- }, +-}; +- +-static struct resource at32_eic0_resource[] = { +- { +- .start = 0xfff00100, +- .end = 0xfff0013f, +- .flags = IORESOURCE_MEM, +- }, +- IRQ(19), +-}; +- +-DEFINE_DEV(at32_pm, 0); +-DEFINE_DEV(at32ap700x_rtc, 0); +-DEFINE_DEV(at32_wdt, 0); +-DEFINE_DEV(at32_eic, 0); +- +-/* +- * Peripheral clock for PM, RTC, WDT and EIC. PM will ensure that this +- * is always running. +- */ +-static struct clk at32_pm_pclk = { +- .name = "pclk", +- .dev = &at32_pm0_device.dev, +- .parent = &pbb_clk, +- .mode = pbb_clk_mode, +- .get_rate = pbb_clk_get_rate, +- .users = 1, +- .index = 0, +-}; +- +-static struct resource intc0_resource[] = { +- PBMEM(0xfff00400), +-}; +-struct platform_device at32_intc0_device = { +- .name = "intc", +- .id = 0, +- .resource = intc0_resource, +- .num_resources = ARRAY_SIZE(intc0_resource), +-}; +-DEV_CLK(pclk, at32_intc0, pbb, 1); +- +-static struct clk ebi_clk = { +- .name = "ebi", +- .parent = &hsb_clk, +- .mode = hsb_clk_mode, +- .get_rate = hsb_clk_get_rate, +- .users = 1, +-}; +-static struct clk hramc_clk = { +- .name = "hramc", +- .parent = &hsb_clk, +- .mode = hsb_clk_mode, +- .get_rate = hsb_clk_get_rate, +- .users = 1, +- .index = 3, +-}; +- +-static struct resource smc0_resource[] = { +- PBMEM(0xfff03400), +-}; +-DEFINE_DEV(smc, 0); +-DEV_CLK(pclk, smc0, pbb, 13); +-DEV_CLK(mck, smc0, hsb, 0); +- +-static struct platform_device pdc_device = { +- .name = "pdc", +- .id = 0, +-}; +-DEV_CLK(hclk, pdc, hsb, 4); +-DEV_CLK(pclk, pdc, pba, 16); +- +-static struct clk pico_clk = { +- .name = "pico", +- .parent = &cpu_clk, +- .mode = cpu_clk_mode, +- .get_rate = cpu_clk_get_rate, +- .users = 1, +-}; +- +-static struct resource dmaca0_resource[] = { +- { +- .start = 0xff200000, +- .end = 0xff20ffff, +- .flags = IORESOURCE_MEM, +- }, +- IRQ(2), +-}; +-DEFINE_DEV(dmaca, 0); +-DEV_CLK(hclk, dmaca0, hsb, 10); +- +-/* -------------------------------------------------------------------- +- * HMATRIX +- * -------------------------------------------------------------------- */ +- +-static struct clk hmatrix_clk = { +- .name = "hmatrix_clk", +- .parent = &pbb_clk, +- .mode = pbb_clk_mode, +- .get_rate = pbb_clk_get_rate, +- .index = 2, +- .users = 1, +-}; +-#define HMATRIX_BASE ((void __iomem *)0xfff00800) +- +-#define hmatrix_readl(reg) \ +- __raw_readl((HMATRIX_BASE) + HMATRIX_##reg) +-#define hmatrix_writel(reg,value) \ +- __raw_writel((value), (HMATRIX_BASE) + HMATRIX_##reg) +- +-/* +- * Set bits in the HMATRIX Special Function Register (SFR) used by the +- * External Bus Interface (EBI). This can be used to enable special +- * features like CompactFlash support, NAND Flash support, etc. on +- * certain chipselects. +- */ +-static inline void set_ebi_sfr_bits(u32 mask) +-{ +- u32 sfr; +- +- clk_enable(&hmatrix_clk); +- sfr = hmatrix_readl(SFR4); +- sfr |= mask; +- hmatrix_writel(SFR4, sfr); +- clk_disable(&hmatrix_clk); +-} +- +-/* -------------------------------------------------------------------- +- * System Timer/Counter (TC) +- * -------------------------------------------------------------------- */ +-static struct resource at32_systc0_resource[] = { +- PBMEM(0xfff00c00), +- IRQ(22), +-}; +-struct platform_device at32_systc0_device = { +- .name = "systc", +- .id = 0, +- .resource = at32_systc0_resource, +- .num_resources = ARRAY_SIZE(at32_systc0_resource), +-}; +-DEV_CLK(pclk, at32_systc0, pbb, 3); +- +-/* -------------------------------------------------------------------- +- * PIO +- * -------------------------------------------------------------------- */ +- +-static struct resource pio0_resource[] = { +- PBMEM(0xffe02800), +- IRQ(13), +-}; +-DEFINE_DEV(pio, 0); +-DEV_CLK(mck, pio0, pba, 10); +- +-static struct resource pio1_resource[] = { +- PBMEM(0xffe02c00), +- IRQ(14), +-}; +-DEFINE_DEV(pio, 1); +-DEV_CLK(mck, pio1, pba, 11); +- +-static struct resource pio2_resource[] = { +- PBMEM(0xffe03000), +- IRQ(15), +-}; +-DEFINE_DEV(pio, 2); +-DEV_CLK(mck, pio2, pba, 12); +- +-static struct resource pio3_resource[] = { +- PBMEM(0xffe03400), +- IRQ(16), +-}; +-DEFINE_DEV(pio, 3); +-DEV_CLK(mck, pio3, pba, 13); +- +-static struct resource pio4_resource[] = { +- PBMEM(0xffe03800), +- IRQ(17), +-}; +-DEFINE_DEV(pio, 4); +-DEV_CLK(mck, pio4, pba, 14); +- +-void __init at32_add_system_devices(void) +-{ +- platform_device_register(&at32_pm0_device); +- platform_device_register(&at32_intc0_device); +- platform_device_register(&at32ap700x_rtc0_device); +- platform_device_register(&at32_wdt0_device); +- platform_device_register(&at32_eic0_device); +- platform_device_register(&smc0_device); +- platform_device_register(&pdc_device); +- platform_device_register(&dmaca0_device); +- +- platform_device_register(&at32_systc0_device); +- +- platform_device_register(&pio0_device); +- platform_device_register(&pio1_device); +- platform_device_register(&pio2_device); +- platform_device_register(&pio3_device); +- platform_device_register(&pio4_device); +-} +- +-/* -------------------------------------------------------------------- +- * USART +- * -------------------------------------------------------------------- */ +- +-static struct atmel_uart_data atmel_usart0_data = { +- .use_dma_tx = 1, +- .use_dma_rx = 1, +-}; +-static struct resource atmel_usart0_resource[] = { +- PBMEM(0xffe00c00), +- IRQ(6), +-}; +-DEFINE_DEV_DATA(atmel_usart, 0); +-DEV_CLK(usart, atmel_usart0, pba, 3); +- +-static struct atmel_uart_data atmel_usart1_data = { +- .use_dma_tx = 1, +- .use_dma_rx = 1, +-}; +-static struct resource atmel_usart1_resource[] = { +- PBMEM(0xffe01000), +- IRQ(7), +-}; +-DEFINE_DEV_DATA(atmel_usart, 1); +-DEV_CLK(usart, atmel_usart1, pba, 4); +- +-static struct atmel_uart_data atmel_usart2_data = { +- .use_dma_tx = 1, +- .use_dma_rx = 1, +-}; +-static struct resource atmel_usart2_resource[] = { +- PBMEM(0xffe01400), +- IRQ(8), +-}; +-DEFINE_DEV_DATA(atmel_usart, 2); +-DEV_CLK(usart, atmel_usart2, pba, 5); +- +-static struct atmel_uart_data atmel_usart3_data = { +- .use_dma_tx = 1, +- .use_dma_rx = 1, +-}; +-static struct resource atmel_usart3_resource[] = { +- PBMEM(0xffe01800), +- IRQ(9), +-}; +-DEFINE_DEV_DATA(atmel_usart, 3); +-DEV_CLK(usart, atmel_usart3, pba, 6); +- +-static inline void configure_usart0_pins(void) +-{ +- select_peripheral(PA(8), PERIPH_B, 0); /* RXD */ +- select_peripheral(PA(9), PERIPH_B, 0); /* TXD */ +-} +- +-static inline void configure_usart1_pins(void) +-{ +- select_peripheral(PA(17), PERIPH_A, 0); /* RXD */ +- select_peripheral(PA(18), PERIPH_A, 0); /* TXD */ +-} +- +-static inline void configure_usart2_pins(void) +-{ +- select_peripheral(PB(26), PERIPH_B, 0); /* RXD */ +- select_peripheral(PB(27), PERIPH_B, 0); /* TXD */ +-} +- +-static inline void configure_usart3_pins(void) +-{ +- select_peripheral(PB(18), PERIPH_B, 0); /* RXD */ +- select_peripheral(PB(17), PERIPH_B, 0); /* TXD */ +-} +- +-static struct platform_device *__initdata at32_usarts[4]; +- +-void __init at32_map_usart(unsigned int hw_id, unsigned int line) +-{ +- struct platform_device *pdev; +- +- switch (hw_id) { +- case 0: +- pdev = &atmel_usart0_device; +- configure_usart0_pins(); +- break; +- case 1: +- pdev = &atmel_usart1_device; +- configure_usart1_pins(); +- break; +- case 2: +- pdev = &atmel_usart2_device; +- configure_usart2_pins(); +- break; +- case 3: +- pdev = &atmel_usart3_device; +- configure_usart3_pins(); +- break; +- default: +- return; +- } +- +- if (PXSEG(pdev->resource[0].start) == P4SEG) { +- /* Addresses in the P4 segment are permanently mapped 1:1 */ +- struct atmel_uart_data *data = pdev->dev.platform_data; +- data->regs = (void __iomem *)pdev->resource[0].start; +- } +- +- pdev->id = line; +- at32_usarts[line] = pdev; +-} +- +-struct platform_device *__init at32_add_device_usart(unsigned int id) +-{ +- platform_device_register(at32_usarts[id]); +- return at32_usarts[id]; +-} +- +-struct platform_device *atmel_default_console_device; +- +-void __init at32_setup_serial_console(unsigned int usart_id) +-{ +- atmel_default_console_device = at32_usarts[usart_id]; +-} +- +-/* -------------------------------------------------------------------- +- * Ethernet +- * -------------------------------------------------------------------- */ +- +-static struct eth_platform_data macb0_data; +-static struct resource macb0_resource[] = { +- PBMEM(0xfff01800), +- IRQ(25), +-}; +-DEFINE_DEV_DATA(macb, 0); +-DEV_CLK(hclk, macb0, hsb, 8); +-DEV_CLK(pclk, macb0, pbb, 6); +- +-static struct eth_platform_data macb1_data; +-static struct resource macb1_resource[] = { +- PBMEM(0xfff01c00), +- IRQ(26), +-}; +-DEFINE_DEV_DATA(macb, 1); +-DEV_CLK(hclk, macb1, hsb, 9); +-DEV_CLK(pclk, macb1, pbb, 7); +- +-struct platform_device *__init +-at32_add_device_eth(unsigned int id, struct eth_platform_data *data) +-{ +- struct platform_device *pdev; +- +- switch (id) { +- case 0: +- pdev = &macb0_device; +- +- select_peripheral(PC(3), PERIPH_A, 0); /* TXD0 */ +- select_peripheral(PC(4), PERIPH_A, 0); /* TXD1 */ +- select_peripheral(PC(7), PERIPH_A, 0); /* TXEN */ +- select_peripheral(PC(8), PERIPH_A, 0); /* TXCK */ +- select_peripheral(PC(9), PERIPH_A, 0); /* RXD0 */ +- select_peripheral(PC(10), PERIPH_A, 0); /* RXD1 */ +- select_peripheral(PC(13), PERIPH_A, 0); /* RXER */ +- select_peripheral(PC(15), PERIPH_A, 0); /* RXDV */ +- select_peripheral(PC(16), PERIPH_A, 0); /* MDC */ +- select_peripheral(PC(17), PERIPH_A, 0); /* MDIO */ +- +- if (!data->is_rmii) { +- select_peripheral(PC(0), PERIPH_A, 0); /* COL */ +- select_peripheral(PC(1), PERIPH_A, 0); /* CRS */ +- select_peripheral(PC(2), PERIPH_A, 0); /* TXER */ +- select_peripheral(PC(5), PERIPH_A, 0); /* TXD2 */ +- select_peripheral(PC(6), PERIPH_A, 0); /* TXD3 */ +- select_peripheral(PC(11), PERIPH_A, 0); /* RXD2 */ +- select_peripheral(PC(12), PERIPH_A, 0); /* RXD3 */ +- select_peripheral(PC(14), PERIPH_A, 0); /* RXCK */ +- select_peripheral(PC(18), PERIPH_A, 0); /* SPD */ +- } +- break; +- +- case 1: +- pdev = &macb1_device; +- +- select_peripheral(PD(13), PERIPH_B, 0); /* TXD0 */ +- select_peripheral(PD(14), PERIPH_B, 0); /* TXD1 */ +- select_peripheral(PD(11), PERIPH_B, 0); /* TXEN */ +- select_peripheral(PD(12), PERIPH_B, 0); /* TXCK */ +- select_peripheral(PD(10), PERIPH_B, 0); /* RXD0 */ +- select_peripheral(PD(6), PERIPH_B, 0); /* RXD1 */ +- select_peripheral(PD(5), PERIPH_B, 0); /* RXER */ +- select_peripheral(PD(4), PERIPH_B, 0); /* RXDV */ +- select_peripheral(PD(3), PERIPH_B, 0); /* MDC */ +- select_peripheral(PD(2), PERIPH_B, 0); /* MDIO */ +- +- if (!data->is_rmii) { +- select_peripheral(PC(19), PERIPH_B, 0); /* COL */ +- select_peripheral(PC(23), PERIPH_B, 0); /* CRS */ +- select_peripheral(PC(26), PERIPH_B, 0); /* TXER */ +- select_peripheral(PC(27), PERIPH_B, 0); /* TXD2 */ +- select_peripheral(PC(28), PERIPH_B, 0); /* TXD3 */ +- select_peripheral(PC(29), PERIPH_B, 0); /* RXD2 */ +- select_peripheral(PC(30), PERIPH_B, 0); /* RXD3 */ +- select_peripheral(PC(24), PERIPH_B, 0); /* RXCK */ +- select_peripheral(PD(15), PERIPH_B, 0); /* SPD */ +- } +- break; +- +- default: +- return NULL; +- } +- +- memcpy(pdev->dev.platform_data, data, sizeof(struct eth_platform_data)); +- platform_device_register(pdev); +- +- return pdev; +-} +- +-/* -------------------------------------------------------------------- +- * SPI +- * -------------------------------------------------------------------- */ +-static struct resource atmel_spi0_resource[] = { +- PBMEM(0xffe00000), +- IRQ(3), +-}; +-DEFINE_DEV(atmel_spi, 0); +-DEV_CLK(spi_clk, atmel_spi0, pba, 0); +- +-static struct resource atmel_spi1_resource[] = { +- PBMEM(0xffe00400), +- IRQ(4), +-}; +-DEFINE_DEV(atmel_spi, 1); +-DEV_CLK(spi_clk, atmel_spi1, pba, 1); +- +-static void __init +-at32_spi_setup_slaves(unsigned int bus_num, struct spi_board_info *b, +- unsigned int n, const u8 *pins) +-{ +- unsigned int pin, mode; +- +- for (; n; n--, b++) { +- b->bus_num = bus_num; +- if (b->chip_select >= 4) +- continue; +- pin = (unsigned)b->controller_data; +- if (!pin) { +- pin = pins[b->chip_select]; +- b->controller_data = (void *)pin; +- } +- mode = AT32_GPIOF_OUTPUT; +- if (!(b->mode & SPI_CS_HIGH)) +- mode |= AT32_GPIOF_HIGH; +- at32_select_gpio(pin, mode); +- } +-} +- +-struct platform_device *__init +-at32_add_device_spi(unsigned int id, struct spi_board_info *b, unsigned int n) +-{ +- /* +- * Manage the chipselects as GPIOs, normally using the same pins +- * the SPI controller expects; but boards can use other pins. +- */ +- static u8 __initdata spi0_pins[] = +- { GPIO_PIN_PA(3), GPIO_PIN_PA(4), +- GPIO_PIN_PA(5), GPIO_PIN_PA(20), }; +- static u8 __initdata spi1_pins[] = +- { GPIO_PIN_PB(2), GPIO_PIN_PB(3), +- GPIO_PIN_PB(4), GPIO_PIN_PA(27), }; +- struct platform_device *pdev; +- +- switch (id) { +- case 0: +- pdev = &atmel_spi0_device; +- select_peripheral(PA(0), PERIPH_A, 0); /* MISO */ +- select_peripheral(PA(1), PERIPH_A, 0); /* MOSI */ +- select_peripheral(PA(2), PERIPH_A, 0); /* SCK */ +- at32_spi_setup_slaves(0, b, n, spi0_pins); +- break; +- +- case 1: +- pdev = &atmel_spi1_device; +- select_peripheral(PB(0), PERIPH_B, 0); /* MISO */ +- select_peripheral(PB(1), PERIPH_B, 0); /* MOSI */ +- select_peripheral(PB(5), PERIPH_B, 0); /* SCK */ +- at32_spi_setup_slaves(1, b, n, spi1_pins); +- break; +- +- default: +- return NULL; +- } +- +- spi_register_board_info(b, n); +- platform_device_register(pdev); +- return pdev; +-} +- +-/* -------------------------------------------------------------------- +- * TWI +- * -------------------------------------------------------------------- */ +-static struct resource atmel_twi0_resource[] __initdata = { +- PBMEM(0xffe00800), +- IRQ(5), +-}; +-static struct clk atmel_twi0_pclk = { +- .name = "twi_pclk", +- .parent = &pba_clk, +- .mode = pba_clk_mode, +- .get_rate = pba_clk_get_rate, +- .index = 2, +-}; +- +-struct platform_device *__init at32_add_device_twi(unsigned int id) +-{ +- struct platform_device *pdev; +- +- if (id != 0) +- return NULL; +- +- pdev = platform_device_alloc("atmel_twi", id); +- if (!pdev) +- return NULL; +- +- if (platform_device_add_resources(pdev, atmel_twi0_resource, +- ARRAY_SIZE(atmel_twi0_resource))) +- goto err_add_resources; +- +- select_peripheral(PA(6), PERIPH_A, 0); /* SDA */ +- select_peripheral(PA(7), PERIPH_A, 0); /* SDL */ +- +- atmel_twi0_pclk.dev = &pdev->dev; +- +- platform_device_add(pdev); +- return pdev; +- +-err_add_resources: +- platform_device_put(pdev); +- return NULL; +-} +- +-/* -------------------------------------------------------------------- +- * MMC +- * -------------------------------------------------------------------- */ +-static struct resource atmel_mci0_resource[] __initdata = { +- PBMEM(0xfff02400), +- IRQ(28), +-}; +-static struct clk atmel_mci0_pclk = { +- .name = "mci_clk", +- .parent = &pbb_clk, +- .mode = pbb_clk_mode, +- .get_rate = pbb_clk_get_rate, +- .index = 9, +-}; +- +-struct platform_device *__init at32_add_device_mci(unsigned int id) +-{ +- struct platform_device *pdev; +- +- if (id != 0) +- return NULL; +- +- pdev = platform_device_alloc("atmel_mci", id); +- if (!pdev) +- return NULL; +- +- if (platform_device_add_resources(pdev, atmel_mci0_resource, +- ARRAY_SIZE(atmel_mci0_resource))) +- goto err_add_resources; +- +- select_peripheral(PA(10), PERIPH_A, 0); /* CLK */ +- select_peripheral(PA(11), PERIPH_A, 0); /* CMD */ +- select_peripheral(PA(12), PERIPH_A, 0); /* DATA0 */ +- select_peripheral(PA(13), PERIPH_A, 0); /* DATA1 */ +- select_peripheral(PA(14), PERIPH_A, 0); /* DATA2 */ +- select_peripheral(PA(15), PERIPH_A, 0); /* DATA3 */ +- +- atmel_mci0_pclk.dev = &pdev->dev; +- +- platform_device_add(pdev); +- return pdev; +- +-err_add_resources: +- platform_device_put(pdev); +- return NULL; +-} +- +-/* -------------------------------------------------------------------- +- * LCDC +- * -------------------------------------------------------------------- */ +-static struct atmel_lcdfb_info atmel_lcdfb0_data; +-static struct resource atmel_lcdfb0_resource[] = { +- { +- .start = 0xff000000, +- .end = 0xff000fff, +- .flags = IORESOURCE_MEM, +- }, +- IRQ(1), +- { +- /* Placeholder for pre-allocated fb memory */ +- .start = 0x00000000, +- .end = 0x00000000, +- .flags = 0, +- }, +-}; +-DEFINE_DEV_DATA(atmel_lcdfb, 0); +-DEV_CLK(hck1, atmel_lcdfb0, hsb, 7); +-static struct clk atmel_lcdfb0_pixclk = { +- .name = "lcdc_clk", +- .dev = &atmel_lcdfb0_device.dev, +- .mode = genclk_mode, +- .get_rate = genclk_get_rate, +- .set_rate = genclk_set_rate, +- .set_parent = genclk_set_parent, +- .index = 7, +-}; +- +-struct platform_device *__init +-at32_add_device_lcdc(unsigned int id, struct atmel_lcdfb_info *data, +- unsigned long fbmem_start, unsigned long fbmem_len) +-{ +- struct platform_device *pdev; +- struct atmel_lcdfb_info *info; +- struct fb_monspecs *monspecs; +- struct fb_videomode *modedb; +- unsigned int modedb_size; +- +- /* +- * Do a deep copy of the fb data, monspecs and modedb. Make +- * sure all allocations are done before setting up the +- * portmux. +- */ +- monspecs = kmemdup(data->default_monspecs, +- sizeof(struct fb_monspecs), GFP_KERNEL); +- if (!monspecs) +- return NULL; +- +- modedb_size = sizeof(struct fb_videomode) * monspecs->modedb_len; +- modedb = kmemdup(monspecs->modedb, modedb_size, GFP_KERNEL); +- if (!modedb) +- goto err_dup_modedb; +- monspecs->modedb = modedb; +- +- switch (id) { +- case 0: +- pdev = &atmel_lcdfb0_device; +- select_peripheral(PC(19), PERIPH_A, 0); /* CC */ +- select_peripheral(PC(20), PERIPH_A, 0); /* HSYNC */ +- select_peripheral(PC(21), PERIPH_A, 0); /* PCLK */ +- select_peripheral(PC(22), PERIPH_A, 0); /* VSYNC */ +- select_peripheral(PC(23), PERIPH_A, 0); /* DVAL */ +- select_peripheral(PC(24), PERIPH_A, 0); /* MODE */ +- select_peripheral(PC(25), PERIPH_A, 0); /* PWR */ +- select_peripheral(PC(26), PERIPH_A, 0); /* DATA0 */ +- select_peripheral(PC(27), PERIPH_A, 0); /* DATA1 */ +- select_peripheral(PC(28), PERIPH_A, 0); /* DATA2 */ +- select_peripheral(PC(29), PERIPH_A, 0); /* DATA3 */ +- select_peripheral(PC(30), PERIPH_A, 0); /* DATA4 */ +- select_peripheral(PC(31), PERIPH_A, 0); /* DATA5 */ +- select_peripheral(PD(0), PERIPH_A, 0); /* DATA6 */ +- select_peripheral(PD(1), PERIPH_A, 0); /* DATA7 */ +- select_peripheral(PD(2), PERIPH_A, 0); /* DATA8 */ +- select_peripheral(PD(3), PERIPH_A, 0); /* DATA9 */ +- select_peripheral(PD(4), PERIPH_A, 0); /* DATA10 */ +- select_peripheral(PD(5), PERIPH_A, 0); /* DATA11 */ +- select_peripheral(PD(6), PERIPH_A, 0); /* DATA12 */ +- select_peripheral(PD(7), PERIPH_A, 0); /* DATA13 */ +- select_peripheral(PD(8), PERIPH_A, 0); /* DATA14 */ +- select_peripheral(PD(9), PERIPH_A, 0); /* DATA15 */ +- select_peripheral(PD(10), PERIPH_A, 0); /* DATA16 */ +- select_peripheral(PD(11), PERIPH_A, 0); /* DATA17 */ +- select_peripheral(PD(12), PERIPH_A, 0); /* DATA18 */ +- select_peripheral(PD(13), PERIPH_A, 0); /* DATA19 */ +- select_peripheral(PD(14), PERIPH_A, 0); /* DATA20 */ +- select_peripheral(PD(15), PERIPH_A, 0); /* DATA21 */ +- select_peripheral(PD(16), PERIPH_A, 0); /* DATA22 */ +- select_peripheral(PD(17), PERIPH_A, 0); /* DATA23 */ +- +- clk_set_parent(&atmel_lcdfb0_pixclk, &pll0); +- clk_set_rate(&atmel_lcdfb0_pixclk, clk_get_rate(&pll0)); +- break; +- +- default: +- goto err_invalid_id; +- } +- +- if (fbmem_len) { +- pdev->resource[2].start = fbmem_start; +- pdev->resource[2].end = fbmem_start + fbmem_len - 1; +- pdev->resource[2].flags = IORESOURCE_MEM; +- } +- +- info = pdev->dev.platform_data; +- memcpy(info, data, sizeof(struct atmel_lcdfb_info)); +- info->default_monspecs = monspecs; +- +- platform_device_register(pdev); +- return pdev; +- +-err_invalid_id: +- kfree(modedb); +-err_dup_modedb: +- kfree(monspecs); +- return NULL; +-} +- +-/* -------------------------------------------------------------------- +- * SSC +- * -------------------------------------------------------------------- */ +-static struct resource ssc0_resource[] = { +- PBMEM(0xffe01c00), +- IRQ(10), +-}; +-DEFINE_DEV(ssc, 0); +-DEV_CLK(pclk, ssc0, pba, 7); +- +-static struct resource ssc1_resource[] = { +- PBMEM(0xffe02000), +- IRQ(11), +-}; +-DEFINE_DEV(ssc, 1); +-DEV_CLK(pclk, ssc1, pba, 8); +- +-static struct resource ssc2_resource[] = { +- PBMEM(0xffe02400), +- IRQ(12), +-}; +-DEFINE_DEV(ssc, 2); +-DEV_CLK(pclk, ssc2, pba, 9); +- +-struct platform_device *__init +-at32_add_device_ssc(unsigned int id, unsigned int flags) +-{ +- struct platform_device *pdev; +- +- switch (id) { +- case 0: +- pdev = &ssc0_device; +- if (flags & ATMEL_SSC_RF) +- select_peripheral(PA(21), PERIPH_A, 0); /* RF */ +- if (flags & ATMEL_SSC_RK) +- select_peripheral(PA(22), PERIPH_A, 0); /* RK */ +- if (flags & ATMEL_SSC_TK) +- select_peripheral(PA(23), PERIPH_A, 0); /* TK */ +- if (flags & ATMEL_SSC_TF) +- select_peripheral(PA(24), PERIPH_A, 0); /* TF */ +- if (flags & ATMEL_SSC_TD) +- select_peripheral(PA(25), PERIPH_A, 0); /* TD */ +- if (flags & ATMEL_SSC_RD) +- select_peripheral(PA(26), PERIPH_A, 0); /* RD */ +- break; +- case 1: +- pdev = &ssc1_device; +- if (flags & ATMEL_SSC_RF) +- select_peripheral(PA(0), PERIPH_B, 0); /* RF */ +- if (flags & ATMEL_SSC_RK) +- select_peripheral(PA(1), PERIPH_B, 0); /* RK */ +- if (flags & ATMEL_SSC_TK) +- select_peripheral(PA(2), PERIPH_B, 0); /* TK */ +- if (flags & ATMEL_SSC_TF) +- select_peripheral(PA(3), PERIPH_B, 0); /* TF */ +- if (flags & ATMEL_SSC_TD) +- select_peripheral(PA(4), PERIPH_B, 0); /* TD */ +- if (flags & ATMEL_SSC_RD) +- select_peripheral(PA(5), PERIPH_B, 0); /* RD */ +- break; +- case 2: +- pdev = &ssc2_device; +- if (flags & ATMEL_SSC_TD) +- select_peripheral(PB(13), PERIPH_A, 0); /* TD */ +- if (flags & ATMEL_SSC_RD) +- select_peripheral(PB(14), PERIPH_A, 0); /* RD */ +- if (flags & ATMEL_SSC_TK) +- select_peripheral(PB(15), PERIPH_A, 0); /* TK */ +- if (flags & ATMEL_SSC_TF) +- select_peripheral(PB(16), PERIPH_A, 0); /* TF */ +- if (flags & ATMEL_SSC_RF) +- select_peripheral(PB(17), PERIPH_A, 0); /* RF */ +- if (flags & ATMEL_SSC_RK) +- select_peripheral(PB(18), PERIPH_A, 0); /* RK */ +- break; +- default: +- return NULL; +- } +- +- platform_device_register(pdev); +- return pdev; +-} +- +-/* -------------------------------------------------------------------- +- * USB Device Controller +- * -------------------------------------------------------------------- */ +-static struct resource usba0_resource[] __initdata = { +- { +- .start = 0xff300000, +- .end = 0xff3fffff, +- .flags = IORESOURCE_MEM, +- }, { +- .start = 0xfff03000, +- .end = 0xfff033ff, +- .flags = IORESOURCE_MEM, +- }, +- IRQ(31), +-}; +-static struct clk usba0_pclk = { +- .name = "pclk", +- .parent = &pbb_clk, +- .mode = pbb_clk_mode, +- .get_rate = pbb_clk_get_rate, +- .index = 12, +-}; +-static struct clk usba0_hclk = { +- .name = "hclk", +- .parent = &hsb_clk, +- .mode = hsb_clk_mode, +- .get_rate = hsb_clk_get_rate, +- .index = 6, +-}; +- +-struct platform_device *__init +-at32_add_device_usba(unsigned int id, struct usba_platform_data *data) +-{ +- struct platform_device *pdev; +- +- if (id != 0) +- return NULL; +- +- pdev = platform_device_alloc("atmel_usba_udc", 0); +- if (!pdev) +- return NULL; +- +- if (platform_device_add_resources(pdev, usba0_resource, +- ARRAY_SIZE(usba0_resource))) +- goto out_free_pdev; +- +- if (data) { +- if (platform_device_add_data(pdev, data, sizeof(*data))) +- goto out_free_pdev; +- +- if (data->vbus_pin != GPIO_PIN_NONE) +- at32_select_gpio(data->vbus_pin, 0); +- } +- +- usba0_pclk.dev = &pdev->dev; +- usba0_hclk.dev = &pdev->dev; +- +- platform_device_add(pdev); +- +- return pdev; +- +-out_free_pdev: +- platform_device_put(pdev); +- return NULL; +-} +- +-/* -------------------------------------------------------------------- +- * IDE / CompactFlash +- * -------------------------------------------------------------------- */ +-static struct resource at32_smc_cs4_resource[] __initdata = { +- { +- .start = 0x04000000, +- .end = 0x07ffffff, +- .flags = IORESOURCE_MEM, +- }, +- IRQ(~0UL), /* Magic IRQ will be overridden */ +-}; +-static struct resource at32_smc_cs5_resource[] __initdata = { +- { +- .start = 0x20000000, +- .end = 0x23ffffff, +- .flags = IORESOURCE_MEM, +- }, +- IRQ(~0UL), /* Magic IRQ will be overridden */ +-}; +- +-static int __init at32_init_ide_or_cf(struct platform_device *pdev, +- unsigned int cs, unsigned int extint) +-{ +- static unsigned int extint_pin_map[4] __initdata = { +- GPIO_PIN_PB(25), +- GPIO_PIN_PB(26), +- GPIO_PIN_PB(27), +- GPIO_PIN_PB(28), +- }; +- static bool common_pins_initialized __initdata = false; +- unsigned int extint_pin; +- int ret; +- +- if (extint >= ARRAY_SIZE(extint_pin_map)) +- return -EINVAL; +- extint_pin = extint_pin_map[extint]; +- +- switch (cs) { +- case 4: +- ret = platform_device_add_resources(pdev, +- at32_smc_cs4_resource, +- ARRAY_SIZE(at32_smc_cs4_resource)); +- if (ret) +- return ret; +- +- select_peripheral(PE(21), PERIPH_A, 0); /* NCS4 -> OE_N */ +- set_ebi_sfr_bits(HMATRIX_BIT(CS4A)); +- break; +- case 5: +- ret = platform_device_add_resources(pdev, +- at32_smc_cs5_resource, +- ARRAY_SIZE(at32_smc_cs5_resource)); +- if (ret) +- return ret; +- +- select_peripheral(PE(22), PERIPH_A, 0); /* NCS5 -> OE_N */ +- set_ebi_sfr_bits(HMATRIX_BIT(CS5A)); +- break; +- default: +- return -EINVAL; +- } +- +- if (!common_pins_initialized) { +- select_peripheral(PE(19), PERIPH_A, 0); /* CFCE1 -> CS0_N */ +- select_peripheral(PE(20), PERIPH_A, 0); /* CFCE2 -> CS1_N */ +- select_peripheral(PE(23), PERIPH_A, 0); /* CFRNW -> DIR */ +- select_peripheral(PE(24), PERIPH_A, 0); /* NWAIT <- IORDY */ +- common_pins_initialized = true; +- } +- +- at32_select_periph(extint_pin, GPIO_PERIPH_A, AT32_GPIOF_DEGLITCH); +- +- pdev->resource[1].start = EIM_IRQ_BASE + extint; +- pdev->resource[1].end = pdev->resource[1].start; +- +- return 0; +-} +- +-struct platform_device *__init +-at32_add_device_ide(unsigned int id, unsigned int extint, +- struct ide_platform_data *data) +-{ +- struct platform_device *pdev; +- +- pdev = platform_device_alloc("at32_ide", id); +- if (!pdev) +- goto fail; +- +- if (platform_device_add_data(pdev, data, +- sizeof(struct ide_platform_data))) +- goto fail; +- +- if (at32_init_ide_or_cf(pdev, data->cs, extint)) +- goto fail; +- +- platform_device_add(pdev); +- return pdev; +- +-fail: +- platform_device_put(pdev); +- return NULL; +-} +- +-struct platform_device *__init +-at32_add_device_cf(unsigned int id, unsigned int extint, +- struct cf_platform_data *data) +-{ +- struct platform_device *pdev; +- +- pdev = platform_device_alloc("at32_cf", id); +- if (!pdev) +- goto fail; +- +- if (platform_device_add_data(pdev, data, +- sizeof(struct cf_platform_data))) +- goto fail; +- +- if (at32_init_ide_or_cf(pdev, data->cs, extint)) +- goto fail; +- +- if (data->detect_pin != GPIO_PIN_NONE) +- at32_select_gpio(data->detect_pin, AT32_GPIOF_DEGLITCH); +- if (data->reset_pin != GPIO_PIN_NONE) +- at32_select_gpio(data->reset_pin, 0); +- if (data->vcc_pin != GPIO_PIN_NONE) +- at32_select_gpio(data->vcc_pin, 0); +- /* READY is used as extint, so we can't select it as gpio */ +- +- platform_device_add(pdev); +- return pdev; +- +-fail: +- platform_device_put(pdev); +- return NULL; +-} +- +-/* -------------------------------------------------------------------- +- * AC97C +- * -------------------------------------------------------------------- */ +-static struct resource atmel_ac97c0_resource[] __initdata = { +- PBMEM(0xfff02800), +- IRQ(29), +-}; +-static struct clk atmel_ac97c0_pclk = { +- .name = "pclk", +- .parent = &pbb_clk, +- .mode = pbb_clk_mode, +- .get_rate = pbb_clk_get_rate, +- .index = 10, +-}; +- +-struct platform_device *__init at32_add_device_ac97c(unsigned int id) +-{ +- struct platform_device *pdev; +- +- if (id != 0) +- return NULL; +- +- pdev = platform_device_alloc("atmel_ac97c", id); +- if (!pdev) +- return NULL; +- +- if (platform_device_add_resources(pdev, atmel_ac97c0_resource, +- ARRAY_SIZE(atmel_ac97c0_resource))) +- goto err_add_resources; +- +- select_peripheral(PB(20), PERIPH_B, 0); /* SYNC */ +- select_peripheral(PB(21), PERIPH_B, 0); /* SDO */ +- select_peripheral(PB(22), PERIPH_B, 0); /* SDI */ +- select_peripheral(PB(23), PERIPH_B, 0); /* SCLK */ +- +- atmel_ac97c0_pclk.dev = &pdev->dev; +- +- platform_device_add(pdev); +- return pdev; +- +-err_add_resources: +- platform_device_put(pdev); +- return NULL; +-} +- +-/* -------------------------------------------------------------------- +- * ABDAC +- * -------------------------------------------------------------------- */ +-static struct resource abdac0_resource[] __initdata = { +- PBMEM(0xfff02000), +- IRQ(27), +-}; +-static struct clk abdac0_pclk = { +- .name = "pclk", +- .parent = &pbb_clk, +- .mode = pbb_clk_mode, +- .get_rate = pbb_clk_get_rate, +- .index = 8, +-}; +-static struct clk abdac0_sample_clk = { +- .name = "sample_clk", +- .mode = genclk_mode, +- .get_rate = genclk_get_rate, +- .set_rate = genclk_set_rate, +- .set_parent = genclk_set_parent, +- .index = 6, +-}; +- +-struct platform_device *__init at32_add_device_abdac(unsigned int id) +-{ +- struct platform_device *pdev; +- +- if (id != 0) +- return NULL; +- +- pdev = platform_device_alloc("abdac", id); +- if (!pdev) +- return NULL; +- +- if (platform_device_add_resources(pdev, abdac0_resource, +- ARRAY_SIZE(abdac0_resource))) +- goto err_add_resources; +- +- select_peripheral(PB(20), PERIPH_A, 0); /* DATA1 */ +- select_peripheral(PB(21), PERIPH_A, 0); /* DATA0 */ +- select_peripheral(PB(22), PERIPH_A, 0); /* DATAN1 */ +- select_peripheral(PB(23), PERIPH_A, 0); /* DATAN0 */ +- +- abdac0_pclk.dev = &pdev->dev; +- abdac0_sample_clk.dev = &pdev->dev; +- +- platform_device_add(pdev); +- return pdev; +- +-err_add_resources: +- platform_device_put(pdev); +- return NULL; +-} +- +-/* -------------------------------------------------------------------- +- * GCLK +- * -------------------------------------------------------------------- */ +-static struct clk gclk0 = { +- .name = "gclk0", +- .mode = genclk_mode, +- .get_rate = genclk_get_rate, +- .set_rate = genclk_set_rate, +- .set_parent = genclk_set_parent, +- .index = 0, +-}; +-static struct clk gclk1 = { +- .name = "gclk1", +- .mode = genclk_mode, +- .get_rate = genclk_get_rate, +- .set_rate = genclk_set_rate, +- .set_parent = genclk_set_parent, +- .index = 1, +-}; +-static struct clk gclk2 = { +- .name = "gclk2", +- .mode = genclk_mode, +- .get_rate = genclk_get_rate, +- .set_rate = genclk_set_rate, +- .set_parent = genclk_set_parent, +- .index = 2, +-}; +-static struct clk gclk3 = { +- .name = "gclk3", +- .mode = genclk_mode, +- .get_rate = genclk_get_rate, +- .set_rate = genclk_set_rate, +- .set_parent = genclk_set_parent, +- .index = 3, +-}; +-static struct clk gclk4 = { +- .name = "gclk4", +- .mode = genclk_mode, +- .get_rate = genclk_get_rate, +- .set_rate = genclk_set_rate, +- .set_parent = genclk_set_parent, +- .index = 4, +-}; +- +-struct clk *at32_clock_list[] = { +- &osc32k, +- &osc0, +- &osc1, +- &pll0, +- &pll1, +- &cpu_clk, +- &hsb_clk, +- &pba_clk, +- &pbb_clk, +- &at32_pm_pclk, +- &at32_intc0_pclk, +- &hmatrix_clk, +- &ebi_clk, +- &hramc_clk, +- &smc0_pclk, +- &smc0_mck, +- &pdc_hclk, +- &pdc_pclk, +- &dmaca0_hclk, +- &pico_clk, +- &pio0_mck, +- &pio1_mck, +- &pio2_mck, +- &pio3_mck, +- &pio4_mck, +- &at32_systc0_pclk, +- &atmel_usart0_usart, +- &atmel_usart1_usart, +- &atmel_usart2_usart, +- &atmel_usart3_usart, +- &macb0_hclk, +- &macb0_pclk, +- &macb1_hclk, +- &macb1_pclk, +- &atmel_spi0_spi_clk, +- &atmel_spi1_spi_clk, +- &atmel_twi0_pclk, +- &atmel_mci0_pclk, +- &atmel_lcdfb0_hck1, +- &atmel_lcdfb0_pixclk, +- &ssc0_pclk, +- &ssc1_pclk, +- &ssc2_pclk, +- &usba0_hclk, +- &usba0_pclk, +- &atmel_ac97c0_pclk, +- &abdac0_pclk, +- &abdac0_sample_clk, +- &gclk0, +- &gclk1, +- &gclk2, +- &gclk3, +- &gclk4, +-}; +-unsigned int at32_nr_clocks = ARRAY_SIZE(at32_clock_list); +- +-void __init at32_portmux_init(void) +-{ +- at32_init_pio(&pio0_device); +- at32_init_pio(&pio1_device); +- at32_init_pio(&pio2_device); +- at32_init_pio(&pio3_device); +- at32_init_pio(&pio4_device); +-} +- +-void __init at32_clock_init(void) +-{ +- u32 cpu_mask = 0, hsb_mask = 0, pba_mask = 0, pbb_mask = 0; +- int i; +- +- if (pm_readl(MCCTRL) & PM_BIT(PLLSEL)) { +- main_clock = &pll0; +- cpu_clk.parent = &pll0; +- } else { +- main_clock = &osc0; +- cpu_clk.parent = &osc0; +- } +- +- if (pm_readl(PLL0) & PM_BIT(PLLOSC)) +- pll0.parent = &osc1; +- if (pm_readl(PLL1) & PM_BIT(PLLOSC)) +- pll1.parent = &osc1; +- +- genclk_init_parent(&gclk0); +- genclk_init_parent(&gclk1); +- genclk_init_parent(&gclk2); +- genclk_init_parent(&gclk3); +- genclk_init_parent(&gclk4); +- genclk_init_parent(&atmel_lcdfb0_pixclk); +- genclk_init_parent(&abdac0_sample_clk); +- +- /* +- * Turn on all clocks that have at least one user already, and +- * turn off everything else. We only do this for module +- * clocks, and even though it isn't particularly pretty to +- * check the address of the mode function, it should do the +- * trick... +- */ +- for (i = 0; i < ARRAY_SIZE(at32_clock_list); i++) { +- struct clk *clk = at32_clock_list[i]; +- +- if (clk->users == 0) +- continue; +- +- if (clk->mode == &cpu_clk_mode) +- cpu_mask |= 1 << clk->index; +- else if (clk->mode == &hsb_clk_mode) +- hsb_mask |= 1 << clk->index; +- else if (clk->mode == &pba_clk_mode) +- pba_mask |= 1 << clk->index; +- else if (clk->mode == &pbb_clk_mode) +- pbb_mask |= 1 << clk->index; +- } +- +- pm_writel(CPU_MASK, cpu_mask); +- pm_writel(HSB_MASK, hsb_mask); +- pm_writel(PBA_MASK, pba_mask); +- pm_writel(PBB_MASK, pbb_mask); +-} +diff -Nrup linux-2.6.24/arch/avr32/mach-at32ap/at32ap700x.c linux-avr32/arch/avr32/mach-at32ap/at32ap700x.c +--- linux-2.6.24/arch/avr32/mach-at32ap/at32ap700x.c 1969-12-31 19:00:00.000000000 -0500 ++++ linux-avr32/arch/avr32/mach-at32ap/at32ap700x.c 2008-02-01 14:51:35.000000000 -0500 +@@ -0,0 +1,1809 @@ ++/* ++ * Copyright (C) 2005-2006 Atmel Corporation ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation. ++ */ ++#include <linux/clk.h> ++#include <linux/fb.h> ++#include <linux/init.h> ++#include <linux/platform_device.h> ++#include <linux/dma-mapping.h> ++#include <linux/spi/spi.h> ++ ++#include <asm/io.h> ++#include <asm/irq.h> ++ ++#include <asm/arch/at32ap700x.h> ++#include <asm/arch/board.h> ++#include <asm/arch/portmux.h> ++ ++#include <video/atmel_lcdc.h> ++ ++#include "clock.h" ++#include "hmatrix.h" ++#include "pio.h" ++#include "pm.h" ++ ++ ++#define PBMEM(base) \ ++ { \ ++ .start = base, \ ++ .end = base + 0x3ff, \ ++ .flags = IORESOURCE_MEM, \ ++ } ++#define IRQ(num) \ ++ { \ ++ .start = num, \ ++ .end = num, \ ++ .flags = IORESOURCE_IRQ, \ ++ } ++#define NAMED_IRQ(num, _name) \ ++ { \ ++ .start = num, \ ++ .end = num, \ ++ .name = _name, \ ++ .flags = IORESOURCE_IRQ, \ ++ } ++ ++/* REVISIT these assume *every* device supports DMA, but several ++ * don't ... tc, smc, pio, rtc, watchdog, pwm, ps2, and more. ++ */ ++#define DEFINE_DEV(_name, _id) \ ++static u64 _name##_id##_dma_mask = DMA_32BIT_MASK; \ ++static struct platform_device _name##_id##_device = { \ ++ .name = #_name, \ ++ .id = _id, \ ++ .dev = { \ ++ .dma_mask = &_name##_id##_dma_mask, \ ++ .coherent_dma_mask = DMA_32BIT_MASK, \ ++ }, \ ++ .resource = _name##_id##_resource, \ ++ .num_resources = ARRAY_SIZE(_name##_id##_resource), \ ++} ++#define DEFINE_DEV_DATA(_name, _id) \ ++static u64 _name##_id##_dma_mask = DMA_32BIT_MASK; \ ++static struct platform_device _name##_id##_device = { \ ++ .name = #_name, \ ++ .id = _id, \ ++ .dev = { \ ++ .dma_mask = &_name##_id##_dma_mask, \ ++ .platform_data = &_name##_id##_data, \ ++ .coherent_dma_mask = DMA_32BIT_MASK, \ ++ }, \ ++ .resource = _name##_id##_resource, \ ++ .num_resources = ARRAY_SIZE(_name##_id##_resource), \ ++} ++ ++#define select_peripheral(pin, periph, flags) \ ++ at32_select_periph(GPIO_PIN_##pin, GPIO_##periph, flags) ++ ++#define DEV_CLK(_name, devname, bus, _index) \ ++static struct clk devname##_##_name = { \ ++ .name = #_name, \ ++ .dev = &devname##_device.dev, \ ++ .parent = &bus##_clk, \ ++ .mode = bus##_clk_mode, \ ++ .get_rate = bus##_clk_get_rate, \ ++ .index = _index, \ ++} ++ ++static DEFINE_SPINLOCK(pm_lock); ++ ++unsigned long at32ap7000_osc_rates[3] = { ++ [0] = 32768, ++ /* FIXME: these are ATSTK1002-specific */ ++ [1] = 20000000, ++ [2] = 12000000, ++}; ++ ++static unsigned long osc_get_rate(struct clk *clk) ++{ ++ return at32ap7000_osc_rates[clk->index]; ++} ++ ++static unsigned long pll_get_rate(struct clk *clk, unsigned long control) ++{ ++ unsigned long div, mul, rate; ++ ++ if (!(control & PM_BIT(PLLEN))) ++ return 0; ++ ++ div = PM_BFEXT(PLLDIV, control) + 1; ++ mul = PM_BFEXT(PLLMUL, control) + 1; ++ ++ rate = clk->parent->get_rate(clk->parent); ++ rate = (rate + div / 2) / div; ++ rate *= mul; ++ ++ return rate; ++} ++ ++static unsigned long pll0_get_rate(struct clk *clk) ++{ ++ u32 control; ++ ++ control = pm_readl(PLL0); ++ ++ return pll_get_rate(clk, control); ++} ++ ++static unsigned long pll1_get_rate(struct clk *clk) ++{ ++ u32 control; ++ ++ control = pm_readl(PLL1); ++ ++ return pll_get_rate(clk, control); ++} ++ ++/* ++ * The AT32AP7000 has five primary clock sources: One 32kHz ++ * oscillator, two crystal oscillators and two PLLs. ++ */ ++static struct clk osc32k = { ++ .name = "osc32k", ++ .get_rate = osc_get_rate, ++ .users = 1, ++ .index = 0, ++}; ++static struct clk osc0 = { ++ .name = "osc0", ++ .get_rate = osc_get_rate, ++ .users = 1, ++ .index = 1, ++}; ++static struct clk osc1 = { ++ .name = "osc1", ++ .get_rate = osc_get_rate, ++ .index = 2, ++}; ++static struct clk pll0 = { ++ .name = "pll0", ++ .get_rate = pll0_get_rate, ++ .parent = &osc0, ++}; ++static struct clk pll1 = { ++ .name = "pll1", ++ .get_rate = pll1_get_rate, ++ .parent = &osc0, ++}; ++ ++/* ++ * The main clock can be either osc0 or pll0. The boot loader may ++ * have chosen one for us, so we don't really know which one until we ++ * have a look at the SM. ++ */ ++static struct clk *main_clock; ++ ++/* ++ * Synchronous clocks are generated from the main clock. The clocks ++ * must satisfy the constraint ++ * fCPU >= fHSB >= fPB ++ * i.e. each clock must not be faster than its parent. ++ */ ++static unsigned long bus_clk_get_rate(struct clk *clk, unsigned int shift) ++{ ++ return main_clock->get_rate(main_clock) >> shift; ++}; ++ ++static void cpu_clk_mode(struct clk *clk, int enabled) ++{ ++ unsigned long flags; ++ u32 mask; ++ ++ spin_lock_irqsave(&pm_lock, flags); ++ mask = pm_readl(CPU_MASK); ++ if (enabled) ++ mask |= 1 << clk->index; ++ else ++ mask &= ~(1 << clk->index); ++ pm_writel(CPU_MASK, mask); ++ spin_unlock_irqrestore(&pm_lock, flags); ++} ++ ++static unsigned long cpu_clk_get_rate(struct clk *clk) ++{ ++ unsigned long cksel, shift = 0; ++ ++ cksel = pm_readl(CKSEL); ++ if (cksel & PM_BIT(CPUDIV)) ++ shift = PM_BFEXT(CPUSEL, cksel) + 1; ++ ++ return bus_clk_get_rate(clk, shift); ++} ++ ++static long cpu_clk_set_rate(struct clk *clk, unsigned long rate, int apply) ++{ ++ u32 control; ++ unsigned long parent_rate, child_div, actual_rate, div; ++ ++ parent_rate = clk->parent->get_rate(clk->parent); ++ control = pm_readl(CKSEL); ++ ++ if (control & PM_BIT(HSBDIV)) ++ child_div = 1 << (PM_BFEXT(HSBSEL, control) + 1); ++ else ++ child_div = 1; ++ ++ if (rate > 3 * (parent_rate / 4) || child_div == 1) { ++ actual_rate = parent_rate; ++ control &= ~PM_BIT(CPUDIV); ++ } else { ++ unsigned int cpusel; ++ div = (parent_rate + rate / 2) / rate; ++ if (div > child_div) ++ div = child_div; ++ cpusel = (div > 1) ? (fls(div) - 2) : 0; ++ control = PM_BIT(CPUDIV) | PM_BFINS(CPUSEL, cpusel, control); ++ actual_rate = parent_rate / (1 << (cpusel + 1)); ++ } ++ ++ pr_debug("clk %s: new rate %lu (actual rate %lu)\n", ++ clk->name, rate, actual_rate); ++ ++ if (apply) ++ pm_writel(CKSEL, control); ++ ++ return actual_rate; ++} ++ ++static void hsb_clk_mode(struct clk *clk, int enabled) ++{ ++ unsigned long flags; ++ u32 mask; ++ ++ spin_lock_irqsave(&pm_lock, flags); ++ mask = pm_readl(HSB_MASK); ++ if (enabled) ++ mask |= 1 << clk->index; ++ else ++ mask &= ~(1 << clk->index); ++ pm_writel(HSB_MASK, mask); ++ spin_unlock_irqrestore(&pm_lock, flags); ++} ++ ++static unsigned long hsb_clk_get_rate(struct clk *clk) ++{ ++ unsigned long cksel, shift = 0; ++ ++ cksel = pm_readl(CKSEL); ++ if (cksel & PM_BIT(HSBDIV)) ++ shift = PM_BFEXT(HSBSEL, cksel) + 1; ++ ++ return bus_clk_get_rate(clk, shift); ++} ++ ++static void pba_clk_mode(struct clk *clk, int enabled) ++{ ++ unsigned long flags; ++ u32 mask; ++ ++ spin_lock_irqsave(&pm_lock, flags); ++ mask = pm_readl(PBA_MASK); ++ if (enabled) ++ mask |= 1 << clk->index; ++ else ++ mask &= ~(1 << clk->index); ++ pm_writel(PBA_MASK, mask); ++ spin_unlock_irqrestore(&pm_lock, flags); ++} ++ ++static unsigned long pba_clk_get_rate(struct clk *clk) ++{ ++ unsigned long cksel, shift = 0; ++ ++ cksel = pm_readl(CKSEL); ++ if (cksel & PM_BIT(PBADIV)) ++ shift = PM_BFEXT(PBASEL, cksel) + 1; ++ ++ return bus_clk_get_rate(clk, shift); ++} ++ ++static void pbb_clk_mode(struct clk *clk, int enabled) ++{ ++ unsigned long flags; ++ u32 mask; ++ ++ spin_lock_irqsave(&pm_lock, flags); ++ mask = pm_readl(PBB_MASK); ++ if (enabled) ++ mask |= 1 << clk->index; ++ else ++ mask &= ~(1 << clk->index); ++ pm_writel(PBB_MASK, mask); ++ spin_unlock_irqrestore(&pm_lock, flags); ++} ++ ++static unsigned long pbb_clk_get_rate(struct clk *clk) ++{ ++ unsigned long cksel, shift = 0; ++ ++ cksel = pm_readl(CKSEL); ++ if (cksel & PM_BIT(PBBDIV)) ++ shift = PM_BFEXT(PBBSEL, cksel) + 1; ++ ++ return bus_clk_get_rate(clk, shift); ++} ++ ++static struct clk cpu_clk = { ++ .name = "cpu", ++ .get_rate = cpu_clk_get_rate, ++ .set_rate = cpu_clk_set_rate, ++ .users = 1, ++}; ++static struct clk hsb_clk = { ++ .name = "hsb", ++ .parent = &cpu_clk, ++ .get_rate = hsb_clk_get_rate, ++}; ++static struct clk pba_clk = { ++ .name = "pba", ++ .parent = &hsb_clk, ++ .mode = hsb_clk_mode, ++ .get_rate = pba_clk_get_rate, ++ .index = 1, ++}; ++static struct clk pbb_clk = { ++ .name = "pbb", ++ .parent = &hsb_clk, ++ .mode = hsb_clk_mode, ++ .get_rate = pbb_clk_get_rate, ++ .users = 1, ++ .index = 2, ++}; ++ ++/* -------------------------------------------------------------------- ++ * Generic Clock operations ++ * -------------------------------------------------------------------- */ ++ ++static void genclk_mode(struct clk *clk, int enabled) ++{ ++ u32 control; ++ ++ control = pm_readl(GCCTRL(clk->index)); ++ if (enabled) ++ control |= PM_BIT(CEN); ++ else ++ control &= ~PM_BIT(CEN); ++ pm_writel(GCCTRL(clk->index), control); ++} ++ ++static unsigned long genclk_get_rate(struct clk *clk) ++{ ++ u32 control; ++ unsigned long div = 1; ++ ++ control = pm_readl(GCCTRL(clk->index)); ++ if (control & PM_BIT(DIVEN)) ++ div = 2 * (PM_BFEXT(DIV, control) + 1); ++ ++ return clk->parent->get_rate(clk->parent) / div; ++} ++ ++static long genclk_set_rate(struct clk *clk, unsigned long rate, int apply) ++{ ++ u32 control; ++ unsigned long parent_rate, actual_rate, div; ++ ++ parent_rate = clk->parent->get_rate(clk->parent); ++ control = pm_readl(GCCTRL(clk->index)); ++ ++ if (rate > 3 * parent_rate / 4) { ++ actual_rate = parent_rate; ++ control &= ~PM_BIT(DIVEN); ++ } else { ++ div = (parent_rate + rate) / (2 * rate) - 1; ++ control = PM_BFINS(DIV, div, control) | PM_BIT(DIVEN); ++ actual_rate = parent_rate / (2 * (div + 1)); ++ } ++ ++ dev_dbg(clk->dev, "clk %s: new rate %lu (actual rate %lu)\n", ++ clk->name, rate, actual_rate); ++ ++ if (apply) ++ pm_writel(GCCTRL(clk->index), control); ++ ++ return actual_rate; ++} ++ ++int genclk_set_parent(struct clk *clk, struct clk *parent) ++{ ++ u32 control; ++ ++ dev_dbg(clk->dev, "clk %s: new parent %s (was %s)\n", ++ clk->name, parent->name, clk->parent->name); ++ ++ control = pm_readl(GCCTRL(clk->index)); ++ ++ if (parent == &osc1 || parent == &pll1) ++ control |= PM_BIT(OSCSEL); ++ else if (parent == &osc0 || parent == &pll0) ++ control &= ~PM_BIT(OSCSEL); ++ else ++ return -EINVAL; ++ ++ if (parent == &pll0 || parent == &pll1) ++ control |= PM_BIT(PLLSEL); ++ else ++ control &= ~PM_BIT(PLLSEL); ++ ++ pm_writel(GCCTRL(clk->index), control); ++ clk->parent = parent; ++ ++ return 0; ++} ++ ++static void __init genclk_init_parent(struct clk *clk) ++{ ++ u32 control; ++ struct clk *parent; ++ ++ BUG_ON(clk->index > 7); ++ ++ control = pm_readl(GCCTRL(clk->index)); ++ if (control & PM_BIT(OSCSEL)) ++ parent = (control & PM_BIT(PLLSEL)) ? &pll1 : &osc1; ++ else ++ parent = (control & PM_BIT(PLLSEL)) ? &pll0 : &osc0; ++ ++ clk->parent = parent; ++} ++ ++/* -------------------------------------------------------------------- ++ * System peripherals ++ * -------------------------------------------------------------------- */ ++static struct resource at32_pm0_resource[] = { ++ { ++ .start = 0xfff00000, ++ .end = 0xfff0007f, ++ .flags = IORESOURCE_MEM, ++ }, ++ IRQ(20), ++}; ++ ++static struct resource at32ap700x_rtc0_resource[] = { ++ { ++ .start = 0xfff00080, ++ .end = 0xfff000af, ++ .flags = IORESOURCE_MEM, ++ }, ++ IRQ(21), ++}; ++ ++static struct resource at32_wdt0_resource[] = { ++ { ++ .start = 0xfff000b0, ++ .end = 0xfff000cf, ++ .flags = IORESOURCE_MEM, ++ }, ++}; ++ ++static struct resource at32_eic0_resource[] = { ++ { ++ .start = 0xfff00100, ++ .end = 0xfff0013f, ++ .flags = IORESOURCE_MEM, ++ }, ++ IRQ(19), ++}; ++ ++DEFINE_DEV(at32_pm, 0); ++DEFINE_DEV(at32ap700x_rtc, 0); ++DEFINE_DEV(at32_wdt, 0); ++DEFINE_DEV(at32_eic, 0); ++ ++/* ++ * Peripheral clock for PM, RTC, WDT and EIC. PM will ensure that this ++ * is always running. ++ */ ++static struct clk at32_pm_pclk = { ++ .name = "pclk", ++ .dev = &at32_pm0_device.dev, ++ .parent = &pbb_clk, ++ .mode = pbb_clk_mode, ++ .get_rate = pbb_clk_get_rate, ++ .users = 1, ++ .index = 0, ++}; ++ ++static struct resource intc0_resource[] = { ++ PBMEM(0xfff00400), ++}; ++struct platform_device at32_intc0_device = { ++ .name = "intc", ++ .id = 0, ++ .resource = intc0_resource, ++ .num_resources = ARRAY_SIZE(intc0_resource), ++}; ++DEV_CLK(pclk, at32_intc0, pbb, 1); ++ ++static struct clk ebi_clk = { ++ .name = "ebi", ++ .parent = &hsb_clk, ++ .mode = hsb_clk_mode, ++ .get_rate = hsb_clk_get_rate, ++ .users = 1, ++}; ++static struct clk hramc_clk = { ++ .name = "hramc", ++ .parent = &hsb_clk, ++ .mode = hsb_clk_mode, ++ .get_rate = hsb_clk_get_rate, ++ .users = 1, ++ .index = 3, ++}; ++ ++static struct resource smc0_resource[] = { ++ PBMEM(0xfff03400), ++}; ++DEFINE_DEV(smc, 0); ++DEV_CLK(pclk, smc0, pbb, 13); ++DEV_CLK(mck, smc0, hsb, 0); ++ ++static struct platform_device pdc_device = { ++ .name = "pdc", ++ .id = 0, ++}; ++DEV_CLK(hclk, pdc, hsb, 4); ++DEV_CLK(pclk, pdc, pba, 16); ++ ++static struct clk pico_clk = { ++ .name = "pico", ++ .parent = &cpu_clk, ++ .mode = cpu_clk_mode, ++ .get_rate = cpu_clk_get_rate, ++ .users = 1, ++}; ++ ++static struct resource dmaca0_resource[] = { ++ { ++ .start = 0xff200000, ++ .end = 0xff20ffff, ++ .flags = IORESOURCE_MEM, ++ }, ++ IRQ(2), ++}; ++DEFINE_DEV(dmaca, 0); ++DEV_CLK(hclk, dmaca0, hsb, 10); ++ ++/* -------------------------------------------------------------------- ++ * HMATRIX ++ * -------------------------------------------------------------------- */ ++ ++static struct clk hmatrix_clk = { ++ .name = "hmatrix_clk", ++ .parent = &pbb_clk, ++ .mode = pbb_clk_mode, ++ .get_rate = pbb_clk_get_rate, ++ .index = 2, ++ .users = 1, ++}; ++#define HMATRIX_BASE ((void __iomem *)0xfff00800) ++ ++#define hmatrix_readl(reg) \ ++ __raw_readl((HMATRIX_BASE) + HMATRIX_##reg) ++#define hmatrix_writel(reg,value) \ ++ __raw_writel((value), (HMATRIX_BASE) + HMATRIX_##reg) ++ ++/* ++ * Set bits in the HMATRIX Special Function Register (SFR) used by the ++ * External Bus Interface (EBI). This can be used to enable special ++ * features like CompactFlash support, NAND Flash support, etc. on ++ * certain chipselects. ++ */ ++static inline void set_ebi_sfr_bits(u32 mask) ++{ ++ u32 sfr; ++ ++ clk_enable(&hmatrix_clk); ++ sfr = hmatrix_readl(SFR4); ++ sfr |= mask; ++ hmatrix_writel(SFR4, sfr); ++ clk_disable(&hmatrix_clk); ++} ++ ++/* -------------------------------------------------------------------- ++ * System Timer/Counter (TC) ++ * -------------------------------------------------------------------- */ ++static struct resource at32_systc0_resource[] = { ++ PBMEM(0xfff00c00), ++ IRQ(22), ++}; ++struct platform_device at32_systc0_device = { ++ .name = "systc", ++ .id = 0, ++ .resource = at32_systc0_resource, ++ .num_resources = ARRAY_SIZE(at32_systc0_resource), ++}; ++DEV_CLK(pclk, at32_systc0, pbb, 3); ++ ++/* -------------------------------------------------------------------- ++ * PIO ++ * -------------------------------------------------------------------- */ ++ ++static struct resource pio0_resource[] = { ++ PBMEM(0xffe02800), ++ IRQ(13), ++}; ++DEFINE_DEV(pio, 0); ++DEV_CLK(mck, pio0, pba, 10); ++ ++static struct resource pio1_resource[] = { ++ PBMEM(0xffe02c00), ++ IRQ(14), ++}; ++DEFINE_DEV(pio, 1); ++DEV_CLK(mck, pio1, pba, 11); ++ ++static struct resource pio2_resource[] = { ++ PBMEM(0xffe03000), ++ IRQ(15), ++}; ++DEFINE_DEV(pio, 2); ++DEV_CLK(mck, pio2, pba, 12); ++ ++static struct resource pio3_resource[] = { ++ PBMEM(0xffe03400), ++ IRQ(16), ++}; ++DEFINE_DEV(pio, 3); ++DEV_CLK(mck, pio3, pba, 13); ++ ++static struct resource pio4_resource[] = { ++ PBMEM(0xffe03800), ++ IRQ(17), ++}; ++DEFINE_DEV(pio, 4); ++DEV_CLK(mck, pio4, pba, 14); ++ ++void __init at32_add_system_devices(void) ++{ ++ platform_device_register(&at32_pm0_device); ++ platform_device_register(&at32_intc0_device); ++ platform_device_register(&at32ap700x_rtc0_device); ++ platform_device_register(&at32_wdt0_device); ++ platform_device_register(&at32_eic0_device); ++ platform_device_register(&smc0_device); ++ platform_device_register(&pdc_device); ++ platform_device_register(&dmaca0_device); ++ ++ platform_device_register(&at32_systc0_device); ++ ++ platform_device_register(&pio0_device); ++ platform_device_register(&pio1_device); ++ platform_device_register(&pio2_device); ++ platform_device_register(&pio3_device); ++ platform_device_register(&pio4_device); ++} ++ ++/* -------------------------------------------------------------------- ++ * USART ++ * -------------------------------------------------------------------- */ ++ ++static struct atmel_uart_data atmel_usart0_data = { ++ .use_dma_tx = 1, ++ .use_dma_rx = 1, ++}; ++static struct resource atmel_usart0_resource[] = { ++ PBMEM(0xffe00c00), ++ IRQ(6), ++}; ++DEFINE_DEV_DATA(atmel_usart, 0); ++DEV_CLK(usart, atmel_usart0, pba, 3); ++ ++static struct atmel_uart_data atmel_usart1_data = { ++ .use_dma_tx = 1, ++ .use_dma_rx = 1, ++}; ++static struct resource atmel_usart1_resource[] = { ++ PBMEM(0xffe01000), ++ IRQ(7), ++}; ++DEFINE_DEV_DATA(atmel_usart, 1); ++DEV_CLK(usart, atmel_usart1, pba, 4); ++ ++static struct atmel_uart_data atmel_usart2_data = { ++ .use_dma_tx = 1, ++ .use_dma_rx = 1, ++}; ++static struct resource atmel_usart2_resource[] = { ++ PBMEM(0xffe01400), ++ IRQ(8), ++}; ++DEFINE_DEV_DATA(atmel_usart, 2); ++DEV_CLK(usart, atmel_usart2, pba, 5); ++ ++static struct atmel_uart_data atmel_usart3_data = { ++ .use_dma_tx = 1, ++ .use_dma_rx = 1, ++}; ++static struct resource atmel_usart3_resource[] = { ++ PBMEM(0xffe01800), ++ IRQ(9), ++}; ++DEFINE_DEV_DATA(atmel_usart, 3); ++DEV_CLK(usart, atmel_usart3, pba, 6); ++ ++static inline void configure_usart0_pins(void) ++{ ++ select_peripheral(PA(8), PERIPH_B, 0); /* RXD */ ++ select_peripheral(PA(9), PERIPH_B, 0); /* TXD */ ++} ++ ++static inline void configure_usart1_pins(void) ++{ ++ select_peripheral(PA(17), PERIPH_A, 0); /* RXD */ ++ select_peripheral(PA(18), PERIPH_A, 0); /* TXD */ ++} ++ ++static inline void configure_usart2_pins(void) ++{ ++ select_peripheral(PB(26), PERIPH_B, 0); /* RXD */ ++ select_peripheral(PB(27), PERIPH_B, 0); /* TXD */ ++} ++ ++static inline void configure_usart3_pins(void) ++{ ++ select_peripheral(PB(18), PERIPH_B, 0); /* RXD */ ++ select_peripheral(PB(17), PERIPH_B, 0); /* TXD */ ++} ++ ++static struct platform_device *__initdata at32_usarts[4]; ++ ++void __init at32_map_usart(unsigned int hw_id, unsigned int line) ++{ ++ struct platform_device *pdev; ++ ++ switch (hw_id) { ++ case 0: ++ pdev = &atmel_usart0_device; ++ configure_usart0_pins(); ++ break; ++ case 1: ++ pdev = &atmel_usart1_device; ++ configure_usart1_pins(); ++ break; ++ case 2: ++ pdev = &atmel_usart2_device; ++ configure_usart2_pins(); ++ break; ++ case 3: ++ pdev = &atmel_usart3_device; ++ configure_usart3_pins(); ++ break; ++ default: ++ return; ++ } ++ ++ if (PXSEG(pdev->resource[0].start) == P4SEG) { ++ /* Addresses in the P4 segment are permanently mapped 1:1 */ ++ struct atmel_uart_data *data = pdev->dev.platform_data; ++ data->regs = (void __iomem *)pdev->resource[0].start; ++ } ++ ++ pdev->id = line; ++ at32_usarts[line] = pdev; ++} ++ ++struct platform_device *__init at32_add_device_usart(unsigned int id) ++{ ++ platform_device_register(at32_usarts[id]); ++ return at32_usarts[id]; ++} ++ ++struct platform_device *atmel_default_console_device; ++ ++void __init at32_setup_serial_console(unsigned int usart_id) ++{ ++ atmel_default_console_device = at32_usarts[usart_id]; ++} ++ ++/* -------------------------------------------------------------------- ++ * Ethernet ++ * -------------------------------------------------------------------- */ ++ ++#ifdef CONFIG_CPU_AT32AP7000 ++static struct eth_platform_data macb0_data; ++static struct resource macb0_resource[] = { ++ PBMEM(0xfff01800), ++ IRQ(25), ++}; ++DEFINE_DEV_DATA(macb, 0); ++DEV_CLK(hclk, macb0, hsb, 8); ++DEV_CLK(pclk, macb0, pbb, 6); ++ ++static struct eth_platform_data macb1_data; ++static struct resource macb1_resource[] = { ++ PBMEM(0xfff01c00), ++ IRQ(26), ++}; ++DEFINE_DEV_DATA(macb, 1); ++DEV_CLK(hclk, macb1, hsb, 9); ++DEV_CLK(pclk, macb1, pbb, 7); ++ ++struct platform_device *__init ++at32_add_device_eth(unsigned int id, struct eth_platform_data *data) ++{ ++ struct platform_device *pdev; ++ ++ switch (id) { ++ case 0: ++ pdev = &macb0_device; ++ ++ select_peripheral(PC(3), PERIPH_A, 0); /* TXD0 */ ++ select_peripheral(PC(4), PERIPH_A, 0); /* TXD1 */ ++ select_peripheral(PC(7), PERIPH_A, 0); /* TXEN */ ++ select_peripheral(PC(8), PERIPH_A, 0); /* TXCK */ ++ select_peripheral(PC(9), PERIPH_A, 0); /* RXD0 */ ++ select_peripheral(PC(10), PERIPH_A, 0); /* RXD1 */ ++ select_peripheral(PC(13), PERIPH_A, 0); /* RXER */ ++ select_peripheral(PC(15), PERIPH_A, 0); /* RXDV */ ++ select_peripheral(PC(16), PERIPH_A, 0); /* MDC */ ++ select_peripheral(PC(17), PERIPH_A, 0); /* MDIO */ ++ ++ if (!data->is_rmii) { ++ select_peripheral(PC(0), PERIPH_A, 0); /* COL */ ++ select_peripheral(PC(1), PERIPH_A, 0); /* CRS */ ++ select_peripheral(PC(2), PERIPH_A, 0); /* TXER */ ++ select_peripheral(PC(5), PERIPH_A, 0); /* TXD2 */ ++ select_peripheral(PC(6), PERIPH_A, 0); /* TXD3 */ ++ select_peripheral(PC(11), PERIPH_A, 0); /* RXD2 */ ++ select_peripheral(PC(12), PERIPH_A, 0); /* RXD3 */ ++ select_peripheral(PC(14), PERIPH_A, 0); /* RXCK */ ++ select_peripheral(PC(18), PERIPH_A, 0); /* SPD */ ++ } ++ break; ++ ++ case 1: ++ pdev = &macb1_device; ++ ++ select_peripheral(PD(13), PERIPH_B, 0); /* TXD0 */ ++ select_peripheral(PD(14), PERIPH_B, 0); /* TXD1 */ ++ select_peripheral(PD(11), PERIPH_B, 0); /* TXEN */ ++ select_peripheral(PD(12), PERIPH_B, 0); /* TXCK */ ++ select_peripheral(PD(10), PERIPH_B, 0); /* RXD0 */ ++ select_peripheral(PD(6), PERIPH_B, 0); /* RXD1 */ ++ select_peripheral(PD(5), PERIPH_B, 0); /* RXER */ ++ select_peripheral(PD(4), PERIPH_B, 0); /* RXDV */ ++ select_peripheral(PD(3), PERIPH_B, 0); /* MDC */ ++ select_peripheral(PD(2), PERIPH_B, 0); /* MDIO */ ++ ++ if (!data->is_rmii) { ++ select_peripheral(PC(19), PERIPH_B, 0); /* COL */ ++ select_peripheral(PC(23), PERIPH_B, 0); /* CRS */ ++ select_peripheral(PC(26), PERIPH_B, 0); /* TXER */ ++ select_peripheral(PC(27), PERIPH_B, 0); /* TXD2 */ ++ select_peripheral(PC(28), PERIPH_B, 0); /* TXD3 */ ++ select_peripheral(PC(29), PERIPH_B, 0); /* RXD2 */ ++ select_peripheral(PC(30), PERIPH_B, 0); /* RXD3 */ ++ select_peripheral(PC(24), PERIPH_B, 0); /* RXCK */ ++ select_peripheral(PD(15), PERIPH_B, 0); /* SPD */ ++ } ++ break; ++ ++ default: ++ return NULL; ++ } ++ ++ memcpy(pdev->dev.platform_data, data, sizeof(struct eth_platform_data)); ++ platform_device_register(pdev); ++ ++ return pdev; ++} ++#endif ++ ++/* -------------------------------------------------------------------- ++ * SPI ++ * -------------------------------------------------------------------- */ ++static struct resource atmel_spi0_resource[] = { ++ PBMEM(0xffe00000), ++ IRQ(3), ++}; ++DEFINE_DEV(atmel_spi, 0); ++DEV_CLK(spi_clk, atmel_spi0, pba, 0); ++ ++static struct resource atmel_spi1_resource[] = { ++ PBMEM(0xffe00400), ++ IRQ(4), ++}; ++DEFINE_DEV(atmel_spi, 1); ++DEV_CLK(spi_clk, atmel_spi1, pba, 1); ++ ++static void __init ++at32_spi_setup_slaves(unsigned int bus_num, struct spi_board_info *b, ++ unsigned int n, const u8 *pins) ++{ ++ unsigned int pin, mode; ++ ++ for (; n; n--, b++) { ++ b->bus_num = bus_num; ++ if (b->chip_select >= 4) ++ continue; ++ pin = (unsigned)b->controller_data; ++ if (!pin) { ++ pin = pins[b->chip_select]; ++ b->controller_data = (void *)pin; ++ } ++ mode = AT32_GPIOF_OUTPUT; ++ if (!(b->mode & SPI_CS_HIGH)) ++ mode |= AT32_GPIOF_HIGH; ++ at32_select_gpio(pin, mode); ++ } ++} ++ ++struct platform_device *__init ++at32_add_device_spi(unsigned int id, struct spi_board_info *b, unsigned int n) ++{ ++ /* ++ * Manage the chipselects as GPIOs, normally using the same pins ++ * the SPI controller expects; but boards can use other pins. ++ */ ++ static u8 __initdata spi0_pins[] = ++ { GPIO_PIN_PA(3), GPIO_PIN_PA(4), ++ GPIO_PIN_PA(5), GPIO_PIN_PA(20), }; ++ static u8 __initdata spi1_pins[] = ++ { GPIO_PIN_PB(2), GPIO_PIN_PB(3), ++ GPIO_PIN_PB(4), GPIO_PIN_PA(27), }; ++ struct platform_device *pdev; ++ ++ switch (id) { ++ case 0: ++ pdev = &atmel_spi0_device; ++ select_peripheral(PA(0), PERIPH_A, 0); /* MISO */ ++ select_peripheral(PA(1), PERIPH_A, 0); /* MOSI */ ++ select_peripheral(PA(2), PERIPH_A, 0); /* SCK */ ++ at32_spi_setup_slaves(0, b, n, spi0_pins); ++ break; ++ ++ case 1: ++ pdev = &atmel_spi1_device; ++ select_peripheral(PB(0), PERIPH_B, 0); /* MISO */ ++ select_peripheral(PB(1), PERIPH_B, 0); /* MOSI */ ++ select_peripheral(PB(5), PERIPH_B, 0); /* SCK */ ++ at32_spi_setup_slaves(1, b, n, spi1_pins); ++ break; ++ ++ default: ++ return NULL; ++ } ++ ++ spi_register_board_info(b, n); ++ platform_device_register(pdev); ++ return pdev; ++} ++ ++/* -------------------------------------------------------------------- ++ * TWI ++ * -------------------------------------------------------------------- */ ++static struct resource atmel_twi0_resource[] __initdata = { ++ PBMEM(0xffe00800), ++ IRQ(5), ++}; ++static struct clk atmel_twi0_pclk = { ++ .name = "twi_pclk", ++ .parent = &pba_clk, ++ .mode = pba_clk_mode, ++ .get_rate = pba_clk_get_rate, ++ .index = 2, ++}; ++ ++struct platform_device *__init at32_add_device_twi(unsigned int id) ++{ ++ struct platform_device *pdev; ++ ++ if (id != 0) ++ return NULL; ++ ++ pdev = platform_device_alloc("atmel_twi", id); ++ if (!pdev) ++ return NULL; ++ ++ if (platform_device_add_resources(pdev, atmel_twi0_resource, ++ ARRAY_SIZE(atmel_twi0_resource))) ++ goto err_add_resources; ++ ++ select_peripheral(PA(6), PERIPH_A, 0); /* SDA */ ++ select_peripheral(PA(7), PERIPH_A, 0); /* SDL */ ++ ++ atmel_twi0_pclk.dev = &pdev->dev; ++ ++ platform_device_add(pdev); ++ return pdev; ++ ++err_add_resources: ++ platform_device_put(pdev); ++ return NULL; ++} ++ ++/* -------------------------------------------------------------------- ++ * MMC ++ * -------------------------------------------------------------------- */ ++static struct resource atmel_mci0_resource[] __initdata = { ++ PBMEM(0xfff02400), ++ IRQ(28), ++}; ++static struct clk atmel_mci0_pclk = { ++ .name = "mci_clk", ++ .parent = &pbb_clk, ++ .mode = pbb_clk_mode, ++ .get_rate = pbb_clk_get_rate, ++ .index = 9, ++}; ++ ++struct platform_device *__init ++at32_add_device_mci(unsigned int id, struct mci_platform_data *data) ++{ ++ struct platform_device *pdev; ++ ++ if (id != 0) ++ return NULL; ++ ++ pdev = platform_device_alloc("atmel_mci", id); ++ if (!pdev) ++ goto fail; ++ ++ if (platform_device_add_resources(pdev, atmel_mci0_resource, ++ ARRAY_SIZE(atmel_mci0_resource))) ++ goto fail; ++ ++ if (data && platform_device_add_data(pdev, data, ++ sizeof(struct mci_platform_data))) ++ goto fail; ++ ++ select_peripheral(PA(10), PERIPH_A, 0); /* CLK */ ++ select_peripheral(PA(11), PERIPH_A, 0); /* CMD */ ++ select_peripheral(PA(12), PERIPH_A, 0); /* DATA0 */ ++ select_peripheral(PA(13), PERIPH_A, 0); /* DATA1 */ ++ select_peripheral(PA(14), PERIPH_A, 0); /* DATA2 */ ++ select_peripheral(PA(15), PERIPH_A, 0); /* DATA3 */ ++ ++ if (data) { ++ if (data->detect_pin != GPIO_PIN_NONE) ++ at32_select_gpio(data->detect_pin, 0); ++ if (data->wp_pin != GPIO_PIN_NONE) ++ at32_select_gpio(data->wp_pin, 0); ++ } ++ ++ atmel_mci0_pclk.dev = &pdev->dev; ++ ++ platform_device_add(pdev); ++ return pdev; ++ ++fail: ++ platform_device_put(pdev); ++ return NULL; ++} ++ ++/* -------------------------------------------------------------------- ++ * LCDC ++ * -------------------------------------------------------------------- */ ++#if defined(CONFIG_CPU_AT32AP7000) || defined(CONFIG_CPU_AT32AP7002) ++static struct atmel_lcdfb_info atmel_lcdfb0_data; ++static struct resource atmel_lcdfb0_resource[] = { ++ { ++ .start = 0xff000000, ++ .end = 0xff000fff, ++ .flags = IORESOURCE_MEM, ++ }, ++ IRQ(1), ++ { ++ /* Placeholder for pre-allocated fb memory */ ++ .start = 0x00000000, ++ .end = 0x00000000, ++ .flags = 0, ++ }, ++}; ++DEFINE_DEV_DATA(atmel_lcdfb, 0); ++DEV_CLK(hck1, atmel_lcdfb0, hsb, 7); ++static struct clk atmel_lcdfb0_pixclk = { ++ .name = "lcdc_clk", ++ .dev = &atmel_lcdfb0_device.dev, ++ .mode = genclk_mode, ++ .get_rate = genclk_get_rate, ++ .set_rate = genclk_set_rate, ++ .set_parent = genclk_set_parent, ++ .index = 7, ++}; ++ ++struct platform_device *__init ++at32_add_device_lcdc(unsigned int id, struct atmel_lcdfb_info *data, ++ unsigned long fbmem_start, unsigned long fbmem_len) ++{ ++ struct platform_device *pdev; ++ struct atmel_lcdfb_info *info; ++ struct fb_monspecs *monspecs; ++ struct fb_videomode *modedb; ++ unsigned int modedb_size; ++ ++ /* ++ * Do a deep copy of the fb data, monspecs and modedb. Make ++ * sure all allocations are done before setting up the ++ * portmux. ++ */ ++ monspecs = kmemdup(data->default_monspecs, ++ sizeof(struct fb_monspecs), GFP_KERNEL); ++ if (!monspecs) ++ return NULL; ++ ++ modedb_size = sizeof(struct fb_videomode) * monspecs->modedb_len; ++ modedb = kmemdup(monspecs->modedb, modedb_size, GFP_KERNEL); ++ if (!modedb) ++ goto err_dup_modedb; ++ monspecs->modedb = modedb; ++ ++ switch (id) { ++ case 0: ++ pdev = &atmel_lcdfb0_device; ++ select_peripheral(PC(19), PERIPH_A, 0); /* CC */ ++ select_peripheral(PC(20), PERIPH_A, 0); /* HSYNC */ ++ select_peripheral(PC(21), PERIPH_A, 0); /* PCLK */ ++ select_peripheral(PC(22), PERIPH_A, 0); /* VSYNC */ ++ select_peripheral(PC(23), PERIPH_A, 0); /* DVAL */ ++ select_peripheral(PC(24), PERIPH_A, 0); /* MODE */ ++ select_peripheral(PC(25), PERIPH_A, 0); /* PWR */ ++ select_peripheral(PC(26), PERIPH_A, 0); /* DATA0 */ ++ select_peripheral(PC(27), PERIPH_A, 0); /* DATA1 */ ++ select_peripheral(PC(28), PERIPH_A, 0); /* DATA2 */ ++ select_peripheral(PC(29), PERIPH_A, 0); /* DATA3 */ ++ select_peripheral(PC(30), PERIPH_A, 0); /* DATA4 */ ++ select_peripheral(PC(31), PERIPH_A, 0); /* DATA5 */ ++ select_peripheral(PD(0), PERIPH_A, 0); /* DATA6 */ ++ select_peripheral(PD(1), PERIPH_A, 0); /* DATA7 */ ++ select_peripheral(PD(2), PERIPH_A, 0); /* DATA8 */ ++ select_peripheral(PD(3), PERIPH_A, 0); /* DATA9 */ ++ select_peripheral(PD(4), PERIPH_A, 0); /* DATA10 */ ++ select_peripheral(PD(5), PERIPH_A, 0); /* DATA11 */ ++ select_peripheral(PD(6), PERIPH_A, 0); /* DATA12 */ ++ select_peripheral(PD(7), PERIPH_A, 0); /* DATA13 */ ++ select_peripheral(PD(8), PERIPH_A, 0); /* DATA14 */ ++ select_peripheral(PD(9), PERIPH_A, 0); /* DATA15 */ ++ select_peripheral(PD(10), PERIPH_A, 0); /* DATA16 */ ++ select_peripheral(PD(11), PERIPH_A, 0); /* DATA17 */ ++ select_peripheral(PD(12), PERIPH_A, 0); /* DATA18 */ ++ select_peripheral(PD(13), PERIPH_A, 0); /* DATA19 */ ++ select_peripheral(PD(14), PERIPH_A, 0); /* DATA20 */ ++ select_peripheral(PD(15), PERIPH_A, 0); /* DATA21 */ ++ select_peripheral(PD(16), PERIPH_A, 0); /* DATA22 */ ++ select_peripheral(PD(17), PERIPH_A, 0); /* DATA23 */ ++ ++ clk_set_parent(&atmel_lcdfb0_pixclk, &pll0); ++ clk_set_rate(&atmel_lcdfb0_pixclk, clk_get_rate(&pll0)); ++ break; ++ ++ default: ++ goto err_invalid_id; ++ } ++ ++ if (fbmem_len) { ++ pdev->resource[2].start = fbmem_start; ++ pdev->resource[2].end = fbmem_start + fbmem_len - 1; ++ pdev->resource[2].flags = IORESOURCE_MEM; ++ } ++ ++ info = pdev->dev.platform_data; ++ memcpy(info, data, sizeof(struct atmel_lcdfb_info)); ++ info->default_monspecs = monspecs; ++ ++ platform_device_register(pdev); ++ return pdev; ++ ++err_invalid_id: ++ kfree(modedb); ++err_dup_modedb: ++ kfree(monspecs); ++ return NULL; ++} ++#endif ++ ++/* -------------------------------------------------------------------- ++ * PWM ++ * -------------------------------------------------------------------- */ ++static struct resource atmel_pwm0_resource[] __initdata = { ++ PBMEM(0xfff01400), ++ IRQ(24), ++}; ++static struct clk atmel_pwm0_mck = { ++ .name = "mck", ++ .parent = &pbb_clk, ++ .mode = pbb_clk_mode, ++ .get_rate = pbb_clk_get_rate, ++ .index = 5, ++}; ++ ++struct platform_device *__init at32_add_device_pwm(u32 mask) ++{ ++ struct platform_device *pdev; ++ ++ if (!mask) ++ return NULL; ++ ++ pdev = platform_device_alloc("atmel_pwm", 0); ++ if (!pdev) ++ return NULL; ++ ++ if (platform_device_add_resources(pdev, atmel_pwm0_resource, ++ ARRAY_SIZE(atmel_pwm0_resource))) ++ goto out_free_pdev; ++ ++ if (platform_device_add_data(pdev, &mask, sizeof(mask))) ++ goto out_free_pdev; ++ ++ if (mask & (1 << 0)) ++ select_peripheral(PA(28), PERIPH_A, 0); ++ if (mask & (1 << 1)) ++ select_peripheral(PA(29), PERIPH_A, 0); ++ if (mask & (1 << 2)) ++ select_peripheral(PA(21), PERIPH_B, 0); ++ if (mask & (1 << 3)) ++ select_peripheral(PA(22), PERIPH_B, 0); ++ ++ atmel_pwm0_mck.dev = &pdev->dev; ++ ++ platform_device_add(pdev); ++ ++ return pdev; ++ ++out_free_pdev: ++ platform_device_put(pdev); ++ return NULL; ++} ++ ++/* -------------------------------------------------------------------- ++ * SSC ++ * -------------------------------------------------------------------- */ ++static struct resource ssc0_resource[] = { ++ PBMEM(0xffe01c00), ++ IRQ(10), ++}; ++DEFINE_DEV(ssc, 0); ++DEV_CLK(pclk, ssc0, pba, 7); ++ ++static struct resource ssc1_resource[] = { ++ PBMEM(0xffe02000), ++ IRQ(11), ++}; ++DEFINE_DEV(ssc, 1); ++DEV_CLK(pclk, ssc1, pba, 8); ++ ++static struct resource ssc2_resource[] = { ++ PBMEM(0xffe02400), ++ IRQ(12), ++}; ++DEFINE_DEV(ssc, 2); ++DEV_CLK(pclk, ssc2, pba, 9); ++ ++struct platform_device *__init ++at32_add_device_ssc(unsigned int id, unsigned int flags) ++{ ++ struct platform_device *pdev; ++ ++ switch (id) { ++ case 0: ++ pdev = &ssc0_device; ++ if (flags & ATMEL_SSC_RF) ++ select_peripheral(PA(21), PERIPH_A, 0); /* RF */ ++ if (flags & ATMEL_SSC_RK) ++ select_peripheral(PA(22), PERIPH_A, 0); /* RK */ ++ if (flags & ATMEL_SSC_TK) ++ select_peripheral(PA(23), PERIPH_A, 0); /* TK */ ++ if (flags & ATMEL_SSC_TF) ++ select_peripheral(PA(24), PERIPH_A, 0); /* TF */ ++ if (flags & ATMEL_SSC_TD) ++ select_peripheral(PA(25), PERIPH_A, 0); /* TD */ ++ if (flags & ATMEL_SSC_RD) ++ select_peripheral(PA(26), PERIPH_A, 0); /* RD */ ++ break; ++ case 1: ++ pdev = &ssc1_device; ++ if (flags & ATMEL_SSC_RF) ++ select_peripheral(PA(0), PERIPH_B, 0); /* RF */ ++ if (flags & ATMEL_SSC_RK) ++ select_peripheral(PA(1), PERIPH_B, 0); /* RK */ ++ if (flags & ATMEL_SSC_TK) ++ select_peripheral(PA(2), PERIPH_B, 0); /* TK */ ++ if (flags & ATMEL_SSC_TF) ++ select_peripheral(PA(3), PERIPH_B, 0); /* TF */ ++ if (flags & ATMEL_SSC_TD) ++ select_peripheral(PA(4), PERIPH_B, 0); /* TD */ ++ if (flags & ATMEL_SSC_RD) ++ select_peripheral(PA(5), PERIPH_B, 0); /* RD */ ++ break; ++ case 2: ++ pdev = &ssc2_device; ++ if (flags & ATMEL_SSC_TD) ++ select_peripheral(PB(13), PERIPH_A, 0); /* TD */ ++ if (flags & ATMEL_SSC_RD) ++ select_peripheral(PB(14), PERIPH_A, 0); /* RD */ ++ if (flags & ATMEL_SSC_TK) ++ select_peripheral(PB(15), PERIPH_A, 0); /* TK */ ++ if (flags & ATMEL_SSC_TF) ++ select_peripheral(PB(16), PERIPH_A, 0); /* TF */ ++ if (flags & ATMEL_SSC_RF) ++ select_peripheral(PB(17), PERIPH_A, 0); /* RF */ ++ if (flags & ATMEL_SSC_RK) ++ select_peripheral(PB(18), PERIPH_A, 0); /* RK */ ++ break; ++ default: ++ return NULL; ++ } ++ ++ platform_device_register(pdev); ++ return pdev; ++} ++ ++/* -------------------------------------------------------------------- ++ * USB Device Controller ++ * -------------------------------------------------------------------- */ ++static struct resource usba0_resource[] __initdata = { ++ { ++ .start = 0xff300000, ++ .end = 0xff3fffff, ++ .flags = IORESOURCE_MEM, ++ }, { ++ .start = 0xfff03000, ++ .end = 0xfff033ff, ++ .flags = IORESOURCE_MEM, ++ }, ++ IRQ(31), ++}; ++static struct clk usba0_pclk = { ++ .name = "pclk", ++ .parent = &pbb_clk, ++ .mode = pbb_clk_mode, ++ .get_rate = pbb_clk_get_rate, ++ .index = 12, ++}; ++static struct clk usba0_hclk = { ++ .name = "hclk", ++ .parent = &hsb_clk, ++ .mode = hsb_clk_mode, ++ .get_rate = hsb_clk_get_rate, ++ .index = 6, ++}; ++ ++struct platform_device *__init ++at32_add_device_usba(unsigned int id, struct usba_platform_data *data) ++{ ++ struct platform_device *pdev; ++ ++ if (id != 0) ++ return NULL; ++ ++ pdev = platform_device_alloc("atmel_usba_udc", 0); ++ if (!pdev) ++ return NULL; ++ ++ if (platform_device_add_resources(pdev, usba0_resource, ++ ARRAY_SIZE(usba0_resource))) ++ goto out_free_pdev; ++ ++ if (data) { ++ if (platform_device_add_data(pdev, data, sizeof(*data))) ++ goto out_free_pdev; ++ ++ if (data->vbus_pin != GPIO_PIN_NONE) ++ at32_select_gpio(data->vbus_pin, 0); ++ } ++ ++ usba0_pclk.dev = &pdev->dev; ++ usba0_hclk.dev = &pdev->dev; ++ ++ platform_device_add(pdev); ++ ++ return pdev; ++ ++out_free_pdev: ++ platform_device_put(pdev); ++ return NULL; ++} ++ ++/* -------------------------------------------------------------------- ++ * IDE / CompactFlash ++ * -------------------------------------------------------------------- */ ++#if defined(CONFIG_CPU_AT32AP7000) || defined(CONFIG_CPU_AT32AP7001) ++static struct resource at32_smc_cs4_resource[] __initdata = { ++ { ++ .start = 0x04000000, ++ .end = 0x07ffffff, ++ .flags = IORESOURCE_MEM, ++ }, ++ IRQ(~0UL), /* Magic IRQ will be overridden */ ++}; ++static struct resource at32_smc_cs5_resource[] __initdata = { ++ { ++ .start = 0x20000000, ++ .end = 0x23ffffff, ++ .flags = IORESOURCE_MEM, ++ }, ++ IRQ(~0UL), /* Magic IRQ will be overridden */ ++}; ++ ++static int __init at32_init_ide_or_cf(struct platform_device *pdev, ++ unsigned int cs, unsigned int extint) ++{ ++ static unsigned int extint_pin_map[4] __initdata = { ++ GPIO_PIN_PB(25), ++ GPIO_PIN_PB(26), ++ GPIO_PIN_PB(27), ++ GPIO_PIN_PB(28), ++ }; ++ static bool common_pins_initialized __initdata = false; ++ unsigned int extint_pin; ++ int ret; ++ ++ if (extint >= ARRAY_SIZE(extint_pin_map)) ++ return -EINVAL; ++ extint_pin = extint_pin_map[extint]; ++ ++ switch (cs) { ++ case 4: ++ ret = platform_device_add_resources(pdev, ++ at32_smc_cs4_resource, ++ ARRAY_SIZE(at32_smc_cs4_resource)); ++ if (ret) ++ return ret; ++ ++ select_peripheral(PE(21), PERIPH_A, 0); /* NCS4 -> OE_N */ ++ set_ebi_sfr_bits(HMATRIX_BIT(CS4A)); ++ break; ++ case 5: ++ ret = platform_device_add_resources(pdev, ++ at32_smc_cs5_resource, ++ ARRAY_SIZE(at32_smc_cs5_resource)); ++ if (ret) ++ return ret; ++ ++ select_peripheral(PE(22), PERIPH_A, 0); /* NCS5 -> OE_N */ ++ set_ebi_sfr_bits(HMATRIX_BIT(CS5A)); ++ break; ++ default: ++ return -EINVAL; ++ } ++ ++ if (!common_pins_initialized) { ++ select_peripheral(PE(19), PERIPH_A, 0); /* CFCE1 -> CS0_N */ ++ select_peripheral(PE(20), PERIPH_A, 0); /* CFCE2 -> CS1_N */ ++ select_peripheral(PE(23), PERIPH_A, 0); /* CFRNW -> DIR */ ++ select_peripheral(PE(24), PERIPH_A, 0); /* NWAIT <- IORDY */ ++ common_pins_initialized = true; ++ } ++ ++ at32_select_periph(extint_pin, GPIO_PERIPH_A, AT32_GPIOF_DEGLITCH); ++ ++ pdev->resource[1].start = EIM_IRQ_BASE + extint; ++ pdev->resource[1].end = pdev->resource[1].start; ++ ++ return 0; ++} ++ ++struct platform_device *__init ++at32_add_device_ide(unsigned int id, unsigned int extint, ++ struct ide_platform_data *data) ++{ ++ struct platform_device *pdev; ++ ++ pdev = platform_device_alloc("at32_ide", id); ++ if (!pdev) ++ goto fail; ++ ++ if (platform_device_add_data(pdev, data, ++ sizeof(struct ide_platform_data))) ++ goto fail; ++ ++ if (at32_init_ide_or_cf(pdev, data->cs, extint)) ++ goto fail; ++ ++ platform_device_add(pdev); ++ return pdev; ++ ++fail: ++ platform_device_put(pdev); ++ return NULL; ++} ++ ++struct platform_device *__init ++at32_add_device_cf(unsigned int id, unsigned int extint, ++ struct cf_platform_data *data) ++{ ++ struct platform_device *pdev; ++ ++ pdev = platform_device_alloc("at32_cf", id); ++ if (!pdev) ++ goto fail; ++ ++ if (platform_device_add_data(pdev, data, ++ sizeof(struct cf_platform_data))) ++ goto fail; ++ ++ if (at32_init_ide_or_cf(pdev, data->cs, extint)) ++ goto fail; ++ ++ if (data->detect_pin != GPIO_PIN_NONE) ++ at32_select_gpio(data->detect_pin, AT32_GPIOF_DEGLITCH); ++ if (data->reset_pin != GPIO_PIN_NONE) ++ at32_select_gpio(data->reset_pin, 0); ++ if (data->vcc_pin != GPIO_PIN_NONE) ++ at32_select_gpio(data->vcc_pin, 0); ++ /* READY is used as extint, so we can't select it as gpio */ ++ ++ platform_device_add(pdev); ++ return pdev; ++ ++fail: ++ platform_device_put(pdev); ++ return NULL; ++} ++#endif ++ ++/* -------------------------------------------------------------------- ++ * AC97C ++ * -------------------------------------------------------------------- */ ++static struct resource atmel_ac97c0_resource[] __initdata = { ++ PBMEM(0xfff02800), ++ IRQ(29), ++}; ++static struct clk atmel_ac97c0_pclk = { ++ .name = "pclk", ++ .parent = &pbb_clk, ++ .mode = pbb_clk_mode, ++ .get_rate = pbb_clk_get_rate, ++ .index = 10, ++}; ++ ++struct platform_device *__init at32_add_device_ac97c(unsigned int id) ++{ ++ struct platform_device *pdev; ++ ++ if (id != 0) ++ return NULL; ++ ++ pdev = platform_device_alloc("atmel_ac97c", id); ++ if (!pdev) ++ return NULL; ++ ++ if (platform_device_add_resources(pdev, atmel_ac97c0_resource, ++ ARRAY_SIZE(atmel_ac97c0_resource))) ++ goto err_add_resources; ++ ++ select_peripheral(PB(20), PERIPH_B, 0); /* SYNC */ ++ select_peripheral(PB(21), PERIPH_B, 0); /* SDO */ ++ select_peripheral(PB(22), PERIPH_B, 0); /* SDI */ ++ select_peripheral(PB(23), PERIPH_B, 0); /* SCLK */ ++ ++ atmel_ac97c0_pclk.dev = &pdev->dev; ++ ++ platform_device_add(pdev); ++ return pdev; ++ ++err_add_resources: ++ platform_device_put(pdev); ++ return NULL; ++} ++ ++/* -------------------------------------------------------------------- ++ * ABDAC ++ * -------------------------------------------------------------------- */ ++static struct resource abdac0_resource[] __initdata = { ++ PBMEM(0xfff02000), ++ IRQ(27), ++}; ++static struct clk abdac0_pclk = { ++ .name = "pclk", ++ .parent = &pbb_clk, ++ .mode = pbb_clk_mode, ++ .get_rate = pbb_clk_get_rate, ++ .index = 8, ++}; ++static struct clk abdac0_sample_clk = { ++ .name = "sample_clk", ++ .mode = genclk_mode, ++ .get_rate = genclk_get_rate, ++ .set_rate = genclk_set_rate, ++ .set_parent = genclk_set_parent, ++ .index = 6, ++}; ++ ++struct platform_device *__init at32_add_device_abdac(unsigned int id) ++{ ++ struct platform_device *pdev; ++ ++ if (id != 0) ++ return NULL; ++ ++ pdev = platform_device_alloc("abdac", id); ++ if (!pdev) ++ return NULL; ++ ++ if (platform_device_add_resources(pdev, abdac0_resource, ++ ARRAY_SIZE(abdac0_resource))) ++ goto err_add_resources; ++ ++ select_peripheral(PB(20), PERIPH_A, 0); /* DATA1 */ ++ select_peripheral(PB(21), PERIPH_A, 0); /* DATA0 */ ++ select_peripheral(PB(22), PERIPH_A, 0); /* DATAN1 */ ++ select_peripheral(PB(23), PERIPH_A, 0); /* DATAN0 */ ++ ++ abdac0_pclk.dev = &pdev->dev; ++ abdac0_sample_clk.dev = &pdev->dev; ++ ++ platform_device_add(pdev); ++ return pdev; ++ ++err_add_resources: ++ platform_device_put(pdev); ++ return NULL; ++} ++ ++/* -------------------------------------------------------------------- ++ * GCLK ++ * -------------------------------------------------------------------- */ ++static struct clk gclk0 = { ++ .name = "gclk0", ++ .mode = genclk_mode, ++ .get_rate = genclk_get_rate, ++ .set_rate = genclk_set_rate, ++ .set_parent = genclk_set_parent, ++ .index = 0, ++}; ++static struct clk gclk1 = { ++ .name = "gclk1", ++ .mode = genclk_mode, ++ .get_rate = genclk_get_rate, ++ .set_rate = genclk_set_rate, ++ .set_parent = genclk_set_parent, ++ .index = 1, ++}; ++static struct clk gclk2 = { ++ .name = "gclk2", ++ .mode = genclk_mode, ++ .get_rate = genclk_get_rate, ++ .set_rate = genclk_set_rate, ++ .set_parent = genclk_set_parent, ++ .index = 2, ++}; ++static struct clk gclk3 = { ++ .name = "gclk3", ++ .mode = genclk_mode, ++ .get_rate = genclk_get_rate, ++ .set_rate = genclk_set_rate, ++ .set_parent = genclk_set_parent, ++ .index = 3, ++}; ++static struct clk gclk4 = { ++ .name = "gclk4", ++ .mode = genclk_mode, ++ .get_rate = genclk_get_rate, ++ .set_rate = genclk_set_rate, ++ .set_parent = genclk_set_parent, ++ .index = 4, ++}; ++ ++struct clk *at32_clock_list[] = { ++ &osc32k, ++ &osc0, ++ &osc1, ++ &pll0, ++ &pll1, ++ &cpu_clk, ++ &hsb_clk, ++ &pba_clk, ++ &pbb_clk, ++ &at32_pm_pclk, ++ &at32_intc0_pclk, ++ &hmatrix_clk, ++ &ebi_clk, ++ &hramc_clk, ++ &smc0_pclk, ++ &smc0_mck, ++ &pdc_hclk, ++ &pdc_pclk, ++ &dmaca0_hclk, ++ &pico_clk, ++ &pio0_mck, ++ &pio1_mck, ++ &pio2_mck, ++ &pio3_mck, ++ &pio4_mck, ++ &at32_systc0_pclk, ++ &atmel_usart0_usart, ++ &atmel_usart1_usart, ++ &atmel_usart2_usart, ++ &atmel_usart3_usart, ++ &atmel_pwm0_mck, ++#if defined(CONFIG_CPU_AT32AP7000) ++ &macb0_hclk, ++ &macb0_pclk, ++ &macb1_hclk, ++ &macb1_pclk, ++#endif ++ &atmel_spi0_spi_clk, ++ &atmel_spi1_spi_clk, ++ &atmel_twi0_pclk, ++ &atmel_mci0_pclk, ++#if defined(CONFIG_CPU_AT32AP7000) || defined(CONFIG_CPU_AT32AP7002) ++ &atmel_lcdfb0_hck1, ++ &atmel_lcdfb0_pixclk, ++#endif ++ &ssc0_pclk, ++ &ssc1_pclk, ++ &ssc2_pclk, ++ &usba0_hclk, ++ &usba0_pclk, ++ &atmel_ac97c0_pclk, ++ &abdac0_pclk, ++ &abdac0_sample_clk, ++ &gclk0, ++ &gclk1, ++ &gclk2, ++ &gclk3, ++ &gclk4, ++}; ++unsigned int at32_nr_clocks = ARRAY_SIZE(at32_clock_list); ++ ++void __init at32_portmux_init(void) ++{ ++ at32_init_pio(&pio0_device); ++ at32_init_pio(&pio1_device); ++ at32_init_pio(&pio2_device); ++ at32_init_pio(&pio3_device); ++ at32_init_pio(&pio4_device); ++} ++ ++void __init at32_clock_init(void) ++{ ++ u32 cpu_mask = 0, hsb_mask = 0, pba_mask = 0, pbb_mask = 0; ++ int i; ++ ++ if (pm_readl(MCCTRL) & PM_BIT(PLLSEL)) { ++ main_clock = &pll0; ++ cpu_clk.parent = &pll0; ++ } else { ++ main_clock = &osc0; ++ cpu_clk.parent = &osc0; ++ } ++ ++ if (pm_readl(PLL0) & PM_BIT(PLLOSC)) ++ pll0.parent = &osc1; ++ if (pm_readl(PLL1) & PM_BIT(PLLOSC)) ++ pll1.parent = &osc1; ++ ++ genclk_init_parent(&gclk0); ++ genclk_init_parent(&gclk1); ++ genclk_init_parent(&gclk2); ++ genclk_init_parent(&gclk3); ++ genclk_init_parent(&gclk4); ++#if defined(CONFIG_CPU_AT32AP7000) || defined(CONFIG_CPU_AT32AP7002) ++ genclk_init_parent(&atmel_lcdfb0_pixclk); ++#endif ++ genclk_init_parent(&abdac0_sample_clk); ++ ++ /* ++ * Turn on all clocks that have at least one user already, and ++ * turn off everything else. We only do this for module ++ * clocks, and even though it isn't particularly pretty to ++ * check the address of the mode function, it should do the ++ * trick... ++ */ ++ for (i = 0; i < ARRAY_SIZE(at32_clock_list); i++) { ++ struct clk *clk = at32_clock_list[i]; ++ ++ if (clk->users == 0) ++ continue; ++ ++ if (clk->mode == &cpu_clk_mode) ++ cpu_mask |= 1 << clk->index; ++ else if (clk->mode == &hsb_clk_mode) ++ hsb_mask |= 1 << clk->index; ++ else if (clk->mode == &pba_clk_mode) ++ pba_mask |= 1 << clk->index; ++ else if (clk->mode == &pbb_clk_mode) ++ pbb_mask |= 1 << clk->index; ++ } ++ ++ pm_writel(CPU_MASK, cpu_mask); ++ pm_writel(HSB_MASK, hsb_mask); ++ pm_writel(PBA_MASK, pba_mask); ++ pm_writel(PBB_MASK, pbb_mask); ++} +diff -Nrup linux-2.6.24/arch/avr32/mach-at32ap/extint.c linux-avr32/arch/avr32/mach-at32ap/extint.c +--- linux-2.6.24/arch/avr32/mach-at32ap/extint.c 2008-01-24 17:58:37.000000000 -0500 ++++ linux-avr32/arch/avr32/mach-at32ap/extint.c 2008-02-01 14:51:35.000000000 -0500 +@@ -26,16 +26,10 @@ + #define EIC_MODE 0x0014 + #define EIC_EDGE 0x0018 + #define EIC_LEVEL 0x001c +-#define EIC_TEST 0x0020 + #define EIC_NMIC 0x0024 + +-/* Bitfields in TEST */ +-#define EIC_TESTEN_OFFSET 31 +-#define EIC_TESTEN_SIZE 1 +- + /* Bitfields in NMIC */ +-#define EIC_EN_OFFSET 0 +-#define EIC_EN_SIZE 1 ++#define EIC_NMIC_ENABLE (1 << 0) + + /* Bit manipulation macros */ + #define EIC_BIT(name) \ +@@ -63,6 +57,9 @@ struct eic { + unsigned int first_irq; + }; + ++static struct eic *nmi_eic; ++static bool nmi_enabled; ++ + static void eic_ack_irq(unsigned int irq) + { + struct eic *eic = get_irq_chip_data(irq); +@@ -133,8 +130,11 @@ static int eic_set_irq_type(unsigned int + eic_writel(eic, EDGE, edge); + eic_writel(eic, LEVEL, level); + +- if (flow_type & (IRQ_TYPE_LEVEL_LOW | IRQ_TYPE_LEVEL_HIGH)) ++ if (flow_type & (IRQ_TYPE_LEVEL_LOW | IRQ_TYPE_LEVEL_HIGH)) { + flow_type |= IRQ_LEVEL; ++ __set_irq_handler_unlocked(irq, handle_level_irq); ++ } else ++ __set_irq_handler_unlocked(irq, handle_edge_irq); + desc->status &= ~(IRQ_TYPE_SENSE_MASK | IRQ_LEVEL); + desc->status |= flow_type; + } +@@ -154,9 +154,8 @@ static struct irq_chip eic_chip = { + static void demux_eic_irq(unsigned int irq, struct irq_desc *desc) + { + struct eic *eic = desc->handler_data; +- struct irq_desc *ext_desc; + unsigned long status, pending; +- unsigned int i, ext_irq; ++ unsigned int i; + + status = eic_readl(eic, ISR); + pending = status & eic_readl(eic, IMR); +@@ -165,15 +164,28 @@ static void demux_eic_irq(unsigned int i + i = fls(pending) - 1; + pending &= ~(1 << i); + +- ext_irq = i + eic->first_irq; +- ext_desc = irq_desc + ext_irq; +- if (ext_desc->status & IRQ_LEVEL) +- handle_level_irq(ext_irq, ext_desc); +- else +- handle_edge_irq(ext_irq, ext_desc); ++ generic_handle_irq(i + eic->first_irq); + } + } + ++int nmi_enable(void) ++{ ++ nmi_enabled = true; ++ ++ if (nmi_eic) ++ eic_writel(nmi_eic, NMIC, EIC_NMIC_ENABLE); ++ ++ return 0; ++} ++ ++void nmi_disable(void) ++{ ++ if (nmi_eic) ++ eic_writel(nmi_eic, NMIC, 0); ++ ++ nmi_enabled = false; ++} ++ + static int __init eic_probe(struct platform_device *pdev) + { + struct eic *eic; +@@ -214,14 +226,13 @@ static int __init eic_probe(struct platf + pattern = eic_readl(eic, MODE); + nr_irqs = fls(pattern); + +- /* Trigger on falling edge unless overridden by driver */ +- eic_writel(eic, MODE, 0UL); ++ /* Trigger on low level unless overridden by driver */ + eic_writel(eic, EDGE, 0UL); ++ eic_writel(eic, LEVEL, 0UL); + + eic->chip = &eic_chip; + + for (i = 0; i < nr_irqs; i++) { +- /* NOTE the handler we set here is ignored by the demux */ + set_irq_chip_and_handler(eic->first_irq + i, &eic_chip, + handle_level_irq); + set_irq_chip_data(eic->first_irq + i, eic); +@@ -230,6 +241,16 @@ static int __init eic_probe(struct platf + set_irq_chained_handler(int_irq, demux_eic_irq); + set_irq_data(int_irq, eic); + ++ if (pdev->id == 0) { ++ nmi_eic = eic; ++ if (nmi_enabled) ++ /* ++ * Someone tried to enable NMI before we were ++ * ready. Do it now. ++ */ ++ nmi_enable(); ++ } ++ + dev_info(&pdev->dev, + "External Interrupt Controller at 0x%p, IRQ %u\n", + eic->regs, int_irq); +diff -Nrup linux-2.6.24/arch/avr32/mach-at32ap/gpio-dev.c linux-avr32/arch/avr32/mach-at32ap/gpio-dev.c +--- linux-2.6.24/arch/avr32/mach-at32ap/gpio-dev.c 1969-12-31 19:00:00.000000000 -0500 ++++ linux-avr32/arch/avr32/mach-at32ap/gpio-dev.c 2008-02-01 14:51:35.000000000 -0500 +@@ -0,0 +1,573 @@ ++/* ++ * GPIO /dev and configfs interface ++ * ++ * Copyright (C) 2006-2007 Atmel Corporation ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation. ++ */ ++#include <linux/kernel.h> ++#include <linux/configfs.h> ++#include <linux/cdev.h> ++#include <linux/device.h> ++#include <linux/fs.h> ++#include <linux/interrupt.h> ++#include <linux/module.h> ++#include <linux/poll.h> ++#include <linux/uaccess.h> ++#include <linux/wait.h> ++ ++#include <asm/gpio.h> ++#include <asm/arch/portmux.h> ++ ++#define GPIO_DEV_MAX 8 ++ ++static struct class *gpio_dev_class; ++static dev_t gpio_devt; ++ ++struct gpio_item { ++ spinlock_t lock; ++ ++ int enabled; ++ int initialized; ++ int port; ++ u32 pin_mask; ++ u32 oe_mask; ++ ++ /* Pin state last time we read it (for blocking reads) */ ++ u32 pin_state; ++ int changed; ++ ++ wait_queue_head_t change_wq; ++ struct fasync_struct *async_queue; ++ ++ int id; ++ struct class_device *gpio_dev; ++ struct cdev char_dev; ++ struct config_item item; ++}; ++ ++struct gpio_attribute { ++ struct configfs_attribute attr; ++ ssize_t (*show)(struct gpio_item *, char *); ++ ssize_t (*store)(struct gpio_item *, const char *, size_t); ++}; ++ ++static irqreturn_t gpio_dev_interrupt(int irq, void *dev_id) ++{ ++ struct gpio_item *gpio = dev_id; ++ u32 old_state, new_state; ++ ++ old_state = gpio->pin_state; ++ new_state = at32_gpio_get_value_multiple(gpio->port, gpio->pin_mask); ++ gpio->pin_state = new_state; ++ ++ if (new_state != old_state) { ++ gpio->changed = 1; ++ wake_up_interruptible(&gpio->change_wq); ++ ++ if (gpio->async_queue) ++ kill_fasync(&gpio->async_queue, SIGIO, POLL_IN); ++ } ++ ++ return IRQ_HANDLED; ++} ++ ++static int gpio_dev_open(struct inode *inode, struct file *file) ++{ ++ struct gpio_item *gpio = container_of(inode->i_cdev, ++ struct gpio_item, ++ char_dev); ++ unsigned int irq; ++ unsigned int i; ++ int ret; ++ ++ nonseekable_open(inode, file); ++ config_item_get(&gpio->item); ++ file->private_data = gpio; ++ ++ gpio->pin_state = at32_gpio_get_value_multiple(gpio->port, ++ gpio->pin_mask); ++ gpio->changed = 1; ++ ++ for (i = 0; i < 32; i++) { ++ if (gpio->pin_mask & (1 << i)) { ++ irq = gpio_to_irq(32 * gpio->port + i); ++ ret = request_irq(irq, gpio_dev_interrupt, 0, ++ "gpio-dev", gpio); ++ if (ret) ++ goto err_irq; ++ } ++ } ++ ++ return 0; ++ ++err_irq: ++ while (i--) { ++ if (gpio->pin_mask & (1 << i)) { ++ irq = gpio_to_irq(32 * gpio->port + i); ++ free_irq(irq, gpio); ++ } ++ } ++ ++ config_item_put(&gpio->item); ++ ++ return ret; ++} ++ ++static int gpio_dev_fasync(int fd, struct file *file, int mode) ++{ ++ struct gpio_item *gpio = file->private_data; ++ ++ return fasync_helper(fd, file, mode, &gpio->async_queue); ++} ++ ++static int gpio_dev_release(struct inode *inode, struct file *file) ++{ ++ struct gpio_item *gpio = file->private_data; ++ unsigned int irq; ++ unsigned int i; ++ ++ gpio_dev_fasync(-1, file, 0); ++ ++ for (i = 0; i < 32; i++) { ++ if (gpio->pin_mask & (1 << i)) { ++ irq = gpio_to_irq(32 * gpio->port + i); ++ free_irq(irq, gpio); ++ } ++ } ++ ++ config_item_put(&gpio->item); ++ ++ return 0; ++} ++ ++static unsigned int gpio_dev_poll(struct file *file, poll_table *wait) ++{ ++ struct gpio_item *gpio = file->private_data; ++ unsigned int mask = 0; ++ ++ poll_wait(file, &gpio->change_wq, wait); ++ if (gpio->changed) ++ mask |= POLLIN | POLLRDNORM; ++ ++ return mask; ++} ++ ++static ssize_t gpio_dev_read(struct file *file, char __user *buf, ++ size_t count, loff_t *offset) ++{ ++ struct gpio_item *gpio = file->private_data; ++ u32 value; ++ ++ spin_lock_irq(&gpio->lock); ++ while (!gpio->changed) { ++ spin_unlock_irq(&gpio->lock); ++ ++ if (file->f_flags & O_NONBLOCK) ++ return -EAGAIN; ++ ++ if (wait_event_interruptible(gpio->change_wq, gpio->changed)) ++ return -ERESTARTSYS; ++ ++ spin_lock_irq(&gpio->lock); ++ } ++ ++ gpio->changed = 0; ++ value = at32_gpio_get_value_multiple(gpio->port, gpio->pin_mask); ++ ++ spin_unlock_irq(&gpio->lock); ++ ++ count = min(count, (size_t)4); ++ if (copy_to_user(buf, &value, count)) ++ return -EFAULT; ++ ++ return count; ++} ++ ++static ssize_t gpio_dev_write(struct file *file, const char __user *buf, ++ size_t count, loff_t *offset) ++{ ++ struct gpio_item *gpio = file->private_data; ++ u32 value = 0; ++ u32 mask = ~0UL; ++ ++ count = min(count, (size_t)4); ++ if (copy_from_user(&value, buf, count)) ++ return -EFAULT; ++ ++ /* Assuming big endian */ ++ mask <<= (4 - count) * 8; ++ mask &= gpio->pin_mask; ++ ++ at32_gpio_set_value_multiple(gpio->port, value, mask); ++ ++ return count; ++} ++ ++static struct file_operations gpio_dev_fops = { ++ .owner = THIS_MODULE, ++ .llseek = no_llseek, ++ .open = gpio_dev_open, ++ .release = gpio_dev_release, ++ .fasync = gpio_dev_fasync, ++ .poll = gpio_dev_poll, ++ .read = gpio_dev_read, ++ .write = gpio_dev_write, ++}; ++ ++static struct gpio_item *to_gpio_item(struct config_item *item) ++{ ++ return item ? container_of(item, struct gpio_item, item) : NULL; ++} ++ ++static ssize_t gpio_show_gpio_id(struct gpio_item *gpio, char *page) ++{ ++ return sprintf(page, "%d\n", gpio->port); ++} ++ ++static ssize_t gpio_store_gpio_id(struct gpio_item *gpio, ++ const char *page, size_t count) ++{ ++ unsigned long id; ++ char *p = (char *)page; ++ ssize_t ret = -EINVAL; ++ ++ id = simple_strtoul(p, &p, 0); ++ if (!p || (*p && (*p != '\n'))) ++ return -EINVAL; ++ ++ /* Switching PIO is not allowed when live... */ ++ spin_lock(&gpio->lock); ++ if (!gpio->enabled) { ++ ret = -ENXIO; ++ if (at32_gpio_port_is_valid(id)) { ++ gpio->port = id; ++ ret = count; ++ } ++ } ++ spin_unlock(&gpio->lock); ++ ++ return ret; ++} ++ ++static ssize_t gpio_show_pin_mask(struct gpio_item *gpio, char *page) ++{ ++ return sprintf(page, "0x%08x\n", gpio->pin_mask); ++} ++ ++static ssize_t gpio_store_pin_mask(struct gpio_item *gpio, ++ const char *page, size_t count) ++{ ++ u32 new_mask; ++ char *p = (char *)page; ++ ssize_t ret = -EINVAL; ++ ++ new_mask = simple_strtoul(p, &p, 0); ++ if (!p || (*p && (*p != '\n'))) ++ return -EINVAL; ++ ++ /* Can't update the pin mask while live. */ ++ spin_lock(&gpio->lock); ++ if (!gpio->enabled) { ++ gpio->oe_mask &= new_mask; ++ gpio->pin_mask = new_mask; ++ ret = count; ++ } ++ spin_unlock(&gpio->lock); ++ ++ return ret; ++} ++ ++static ssize_t gpio_show_oe_mask(struct gpio_item *gpio, char *page) ++{ ++ return sprintf(page, "0x%08x\n", gpio->oe_mask); ++} ++ ++static ssize_t gpio_store_oe_mask(struct gpio_item *gpio, ++ const char *page, size_t count) ++{ ++ u32 mask; ++ char *p = (char *)page; ++ ssize_t ret = -EINVAL; ++ ++ mask = simple_strtoul(p, &p, 0); ++ if (!p || (*p && (*p != '\n'))) ++ return -EINVAL; ++ ++ spin_lock(&gpio->lock); ++ if (!gpio->enabled) { ++ gpio->oe_mask = mask & gpio->pin_mask; ++ ret = count; ++ } ++ spin_unlock(&gpio->lock); ++ ++ return ret; ++} ++ ++static ssize_t gpio_show_enabled(struct gpio_item *gpio, char *page) ++{ ++ return sprintf(page, "%d\n", gpio->enabled); ++} ++ ++static ssize_t gpio_store_enabled(struct gpio_item *gpio, ++ const char *page, size_t count) ++{ ++ char *p = (char *)page; ++ int enabled; ++ int ret; ++ ++ enabled = simple_strtoul(p, &p, 0); ++ if (!p || (*p && (*p != '\n'))) ++ return -EINVAL; ++ ++ /* make it a boolean value */ ++ enabled = !!enabled; ++ ++ if (gpio->enabled == enabled) ++ /* No change; do nothing. */ ++ return count; ++ ++ BUG_ON(gpio->id >= GPIO_DEV_MAX); ++ ++ if (!enabled) { ++ class_device_unregister(gpio->gpio_dev); ++ cdev_del(&gpio->char_dev); ++ at32_deselect_pins(gpio->port, gpio->pin_mask); ++ gpio->initialized = 0; ++ } else { ++ if (gpio->port < 0 || !gpio->pin_mask) ++ return -ENODEV; ++ } ++ ++ /* Disallow any updates to gpio_id or pin_mask */ ++ spin_lock(&gpio->lock); ++ gpio->enabled = enabled; ++ spin_unlock(&gpio->lock); ++ ++ if (!enabled) ++ return count; ++ ++ /* Now, try to allocate the pins */ ++ ret = at32_select_gpio_pins(gpio->port, gpio->pin_mask, gpio->oe_mask); ++ if (ret) ++ goto err_alloc_pins; ++ ++ gpio->initialized = 1; ++ ++ cdev_init(&gpio->char_dev, &gpio_dev_fops); ++ gpio->char_dev.owner = THIS_MODULE; ++ ret = cdev_add(&gpio->char_dev, MKDEV(MAJOR(gpio_devt), gpio->id), 1); ++ if (ret < 0) ++ goto err_cdev_add; ++ gpio->gpio_dev = class_device_create(gpio_dev_class, NULL, ++ MKDEV(MAJOR(gpio_devt), gpio->id), ++ NULL, ++ "gpio%d", gpio->id); ++ if (IS_ERR(gpio->gpio_dev)) { ++ printk(KERN_ERR "failed to create gpio%d\n", gpio->id); ++ ret = PTR_ERR(gpio->gpio_dev); ++ goto err_class_dev; ++ } ++ ++ printk(KERN_INFO "created gpio%d (port%d/0x%08x) as (%d:%d)\n", ++ gpio->id, gpio->port, gpio->pin_mask, ++ MAJOR(gpio->gpio_dev->devt), MINOR(gpio->gpio_dev->devt)); ++ ++ return 0; ++ ++err_class_dev: ++ cdev_del(&gpio->char_dev); ++err_cdev_add: ++ at32_deselect_pins(gpio->port, gpio->pin_mask); ++ gpio->initialized = 0; ++err_alloc_pins: ++ spin_lock(&gpio->lock); ++ gpio->enabled = 0; ++ spin_unlock(&gpio->lock); ++ ++ return ret; ++} ++ ++static struct gpio_attribute gpio_item_attr_gpio_id = { ++ .attr = { ++ .ca_owner = THIS_MODULE, ++ .ca_name = "gpio_id", ++ .ca_mode = S_IRUGO | S_IWUSR, ++ }, ++ .show = gpio_show_gpio_id, ++ .store = gpio_store_gpio_id, ++}; ++static struct gpio_attribute gpio_item_attr_pin_mask = { ++ .attr = { ++ .ca_owner = THIS_MODULE, ++ .ca_name = "pin_mask", ++ .ca_mode = S_IRUGO | S_IWUSR, ++ }, ++ .show = gpio_show_pin_mask, ++ .store = gpio_store_pin_mask, ++}; ++static struct gpio_attribute gpio_item_attr_oe_mask = { ++ .attr = { ++ .ca_owner = THIS_MODULE, ++ .ca_name = "oe_mask", ++ .ca_mode = S_IRUGO | S_IWUSR, ++ }, ++ .show = gpio_show_oe_mask, ++ .store = gpio_store_oe_mask, ++}; ++static struct gpio_attribute gpio_item_attr_enabled = { ++ .attr = { ++ .ca_owner = THIS_MODULE, ++ .ca_name = "enabled", ++ .ca_mode = S_IRUGO | S_IWUSR, ++ }, ++ .show = gpio_show_enabled, ++ .store = gpio_store_enabled, ++}; ++ ++static struct configfs_attribute *gpio_item_attrs[] = { ++ &gpio_item_attr_gpio_id.attr, ++ &gpio_item_attr_pin_mask.attr, ++ &gpio_item_attr_oe_mask.attr, ++ &gpio_item_attr_enabled.attr, ++ NULL, ++}; ++ ++static ssize_t gpio_show_attr(struct config_item *item, ++ struct configfs_attribute *attr, ++ char *page) ++{ ++ struct gpio_item *gpio_item = to_gpio_item(item); ++ struct gpio_attribute *gpio_attr ++ = container_of(attr, struct gpio_attribute, attr); ++ ssize_t ret = 0; ++ ++ if (gpio_attr->show) ++ ret = gpio_attr->show(gpio_item, page); ++ return ret; ++} ++ ++static ssize_t gpio_store_attr(struct config_item *item, ++ struct configfs_attribute *attr, ++ const char *page, size_t count) ++{ ++ struct gpio_item *gpio_item = to_gpio_item(item); ++ struct gpio_attribute *gpio_attr ++ = container_of(attr, struct gpio_attribute, attr); ++ ssize_t ret = -EINVAL; ++ ++ if (gpio_attr->store) ++ ret = gpio_attr->store(gpio_item, page, count); ++ return ret; ++} ++ ++static void gpio_release(struct config_item *item) ++{ ++ kfree(to_gpio_item(item)); ++} ++ ++static struct configfs_item_operations gpio_item_ops = { ++ .release = gpio_release, ++ .show_attribute = gpio_show_attr, ++ .store_attribute = gpio_store_attr, ++}; ++ ++static struct config_item_type gpio_item_type = { ++ .ct_item_ops = &gpio_item_ops, ++ .ct_attrs = gpio_item_attrs, ++ .ct_owner = THIS_MODULE, ++}; ++ ++static struct config_item *gpio_make_item(struct config_group *group, ++ const char *name) ++{ ++ static int next_id; ++ struct gpio_item *gpio; ++ ++ if (next_id >= GPIO_DEV_MAX) ++ return NULL; ++ ++ gpio = kzalloc(sizeof(struct gpio_item), GFP_KERNEL); ++ if (!gpio) ++ return NULL; ++ ++ gpio->id = next_id++; ++ config_item_init_type_name(&gpio->item, name, &gpio_item_type); ++ spin_lock_init(&gpio->lock); ++ init_waitqueue_head(&gpio->change_wq); ++ ++ return &gpio->item; ++} ++ ++static void gpio_drop_item(struct config_group *group, ++ struct config_item *item) ++{ ++ struct gpio_item *gpio = to_gpio_item(item); ++ ++ spin_lock(&gpio->lock); ++ if (gpio->enabled) { ++ class_device_unregister(gpio->gpio_dev); ++ cdev_del(&gpio->char_dev); ++ } ++ ++ if (gpio->initialized) { ++ at32_deselect_pins(gpio->port, gpio->pin_mask); ++ gpio->initialized = 0; ++ gpio->enabled = 0; ++ } ++ spin_unlock(&gpio->lock); ++} ++ ++static struct configfs_group_operations gpio_group_ops = { ++ .make_item = gpio_make_item, ++ .drop_item = gpio_drop_item, ++}; ++ ++static struct config_item_type gpio_group_type = { ++ .ct_group_ops = &gpio_group_ops, ++ .ct_owner = THIS_MODULE, ++}; ++ ++static struct configfs_subsystem gpio_subsys = { ++ .su_group = { ++ .cg_item = { ++ .ci_namebuf = "gpio", ++ .ci_type = &gpio_group_type, ++ }, ++ }, ++}; ++ ++static int __init gpio_dev_init(void) ++{ ++ int err; ++ ++ gpio_dev_class = class_create(THIS_MODULE, "gpio-dev"); ++ if (IS_ERR(gpio_dev_class)) { ++ err = PTR_ERR(gpio_dev_class); ++ goto err_class_create; ++ } ++ ++ err = alloc_chrdev_region(&gpio_devt, 0, GPIO_DEV_MAX, "gpio"); ++ if (err < 0) ++ goto err_alloc_chrdev; ++ ++ /* Configfs initialization */ ++ config_group_init(&gpio_subsys.su_group); ++ mutex_init(&gpio_subsys.su_mutex); ++ err = configfs_register_subsystem(&gpio_subsys); ++ if (err) ++ goto err_register_subsys; ++ ++ return 0; ++ ++err_register_subsys: ++ unregister_chrdev_region(gpio_devt, GPIO_DEV_MAX); ++err_alloc_chrdev: ++ class_destroy(gpio_dev_class); ++err_class_create: ++ printk(KERN_WARNING "Failed to initialize gpio /dev interface\n"); ++ return err; ++} ++late_initcall(gpio_dev_init); +diff -Nrup linux-2.6.24/arch/avr32/mach-at32ap/Kconfig linux-avr32/arch/avr32/mach-at32ap/Kconfig +--- linux-2.6.24/arch/avr32/mach-at32ap/Kconfig 2008-01-24 17:58:37.000000000 -0500 ++++ linux-avr32/arch/avr32/mach-at32ap/Kconfig 2008-02-01 14:51:35.000000000 -0500 +@@ -3,9 +3,9 @@ if PLATFORM_AT32AP + menu "Atmel AVR32 AP options" + + choice +- prompt "AT32AP7000 static memory bus width" +- depends on CPU_AT32AP7000 +- default AP7000_16_BIT_SMC ++ prompt "AT32AP700x static memory bus width" ++ depends on CPU_AT32AP700X ++ default AP700X_16_BIT_SMC + help + Define the width of the AP7000 external static memory interface. + This is used to determine how to mangle the address and/or data +@@ -15,17 +15,24 @@ choice + width for all chip selects, excluding the flash (which is using + raw access and is thus not affected by any of this.) + +-config AP7000_32_BIT_SMC ++config AP700X_32_BIT_SMC + bool "32 bit" + +-config AP7000_16_BIT_SMC ++config AP700X_16_BIT_SMC + bool "16 bit" + +-config AP7000_8_BIT_SMC ++config AP700X_8_BIT_SMC + bool "8 bit" + + endchoice + ++config GPIO_DEV ++ bool "GPIO /dev interface" ++ select CONFIGFS_FS ++ default n ++ help ++ Say `Y' to enable a /dev interface to the GPIO pins. ++ + endmenu + + endif # PLATFORM_AT32AP +diff -Nrup linux-2.6.24/arch/avr32/mach-at32ap/Makefile linux-avr32/arch/avr32/mach-at32ap/Makefile +--- linux-2.6.24/arch/avr32/mach-at32ap/Makefile 2008-01-24 17:58:37.000000000 -0500 ++++ linux-avr32/arch/avr32/mach-at32ap/Makefile 2008-02-01 14:51:35.000000000 -0500 +@@ -1,4 +1,5 @@ + obj-y += at32ap.o clock.o intc.o extint.o pio.o hsmc.o +-obj-$(CONFIG_CPU_AT32AP7000) += at32ap7000.o +-obj-$(CONFIG_CPU_AT32AP7000) += time-tc.o ++obj-$(CONFIG_CPU_AT32AP700X) += at32ap700x.o ++obj-$(CONFIG_CPU_AT32AP700X) += time-tc.o + obj-$(CONFIG_CPU_FREQ_AT32AP) += cpufreq.o ++obj-$(CONFIG_GPIO_DEV) += gpio-dev.o +diff -Nrup linux-2.6.24/arch/avr32/mach-at32ap/pio.c linux-avr32/arch/avr32/mach-at32ap/pio.c +--- linux-2.6.24/arch/avr32/mach-at32ap/pio.c 2008-01-24 17:58:37.000000000 -0500 ++++ linux-avr32/arch/avr32/mach-at32ap/pio.c 2008-02-01 14:51:35.000000000 -0500 +@@ -162,6 +162,82 @@ fail: + dump_stack(); + } + ++#ifdef CONFIG_GPIO_DEV ++ ++/* Gang allocators and accessors; used by the GPIO /dev driver */ ++int at32_gpio_port_is_valid(unsigned int port) ++{ ++ return port < MAX_NR_PIO_DEVICES && pio_dev[port].regs != NULL; ++} ++ ++int at32_select_gpio_pins(unsigned int port, u32 pins, u32 oe_mask) ++{ ++ struct pio_device *pio; ++ u32 old, new; ++ ++ pio = &pio_dev[port]; ++ BUG_ON(port > ARRAY_SIZE(pio_dev) || !pio->regs || (oe_mask & ~pins)); ++ ++ /* Try to allocate the pins */ ++ do { ++ old = pio->pinmux_mask; ++ if (old & pins) ++ return -EBUSY; ++ ++ new = old | pins; ++ } while (cmpxchg(&pio->pinmux_mask, old, new) != old); ++ ++ /* That went well, now configure the port */ ++ pio_writel(pio, OER, oe_mask); ++ pio_writel(pio, PER, pins); ++ ++ return 0; ++} ++ ++void at32_deselect_pins(unsigned int port, u32 pins) ++{ ++ struct pio_device *pio; ++ u32 old, new; ++ ++ pio = &pio_dev[port]; ++ BUG_ON(port > ARRAY_SIZE(pio_dev) || !pio->regs); ++ ++ /* Return to a "safe" mux configuration */ ++ pio_writel(pio, PUER, pins); ++ pio_writel(pio, ODR, pins); ++ ++ /* Deallocate the pins */ ++ do { ++ old = pio->pinmux_mask; ++ new = old & ~pins; ++ } while (cmpxchg(&pio->pinmux_mask, old, new) != old); ++} ++ ++u32 at32_gpio_get_value_multiple(unsigned int port, u32 pins) ++{ ++ struct pio_device *pio; ++ ++ pio = &pio_dev[port]; ++ BUG_ON(port > ARRAY_SIZE(pio_dev) || !pio->regs); ++ ++ return pio_readl(pio, PDSR) & pins; ++} ++ ++void at32_gpio_set_value_multiple(unsigned int port, u32 value, u32 mask) ++{ ++ struct pio_device *pio; ++ ++ pio = &pio_dev[port]; ++ BUG_ON(port > ARRAY_SIZE(pio_dev) || !pio->regs); ++ ++ /* No atomic updates for now... */ ++ pio_writel(pio, CODR, ~value & mask); ++ pio_writel(pio, SODR, value & mask); ++} ++ ++#endif /* CONFIG_GPIO_DEV */ ++ ++ + /*--------------------------------------------------------------------------*/ + + /* GPIO API */ +diff -Nrup linux-2.6.24/arch/avr32/Makefile linux-avr32/arch/avr32/Makefile +--- linux-2.6.24/arch/avr32/Makefile 2008-01-24 17:58:37.000000000 -0500 ++++ linux-avr32/arch/avr32/Makefile 2008-02-01 14:51:35.000000000 -0500 +@@ -16,7 +16,7 @@ KBUILD_AFLAGS += -mrelax -mno-pic + CFLAGS_MODULE += -mno-relax + LDFLAGS_vmlinux += --relax + +-cpuflags-$(CONFIG_CPU_AT32AP7000) += -mcpu=ap7000 ++cpuflags-$(CONFIG_PLATFORM_AT32AP) += -march=ap + + KBUILD_CFLAGS += $(cpuflags-y) + KBUILD_AFLAGS += $(cpuflags-y) +@@ -31,6 +31,8 @@ core-$(CONFIG_BOARD_ATNGW100) += arch/a + core-$(CONFIG_LOADER_U_BOOT) += arch/avr32/boot/u-boot/ + core-y += arch/avr32/kernel/ + core-y += arch/avr32/mm/ ++drivers-$(CONFIG_OPROFILE) += arch/avr32/oprofile/ ++drivers-y += arch/avr32/drivers/ + libs-y += arch/avr32/lib/ + + archincdir-$(CONFIG_PLATFORM_AT32AP) := arch-at32ap +diff -Nrup linux-2.6.24/arch/avr32/mm/dma-coherent.c linux-avr32/arch/avr32/mm/dma-coherent.c +--- linux-2.6.24/arch/avr32/mm/dma-coherent.c 2008-01-24 17:58:37.000000000 -0500 ++++ linux-avr32/arch/avr32/mm/dma-coherent.c 2008-02-01 14:51:35.000000000 -0500 +@@ -41,6 +41,13 @@ static struct page *__dma_alloc(struct d + struct page *page, *free, *end; + int order; + ++ /* Following is a work-around (a.k.a. hack) to prevent pages ++ * with __GFP_COMP being passed to split_page() which cannot ++ * handle them. The real problem is that this flag probably ++ * should be 0 on AVR32 as it is not supported on this ++ * platform--see CONFIG_HUGETLB_PAGE. */ ++ gfp &= ~(__GFP_COMP); ++ + size = PAGE_ALIGN(size); + order = get_order(size); + +diff -Nrup linux-2.6.24/arch/avr32/mm/tlb.c linux-avr32/arch/avr32/mm/tlb.c +--- linux-2.6.24/arch/avr32/mm/tlb.c 2008-01-24 17:58:37.000000000 -0500 ++++ linux-avr32/arch/avr32/mm/tlb.c 2008-02-01 14:51:35.000000000 -0500 +@@ -348,7 +348,7 @@ static int tlb_show(struct seq_file *tlb + return 0; + } + +-static struct seq_operations tlb_ops = { ++static const struct seq_operations tlb_ops = { + .start = tlb_start, + .next = tlb_next, + .stop = tlb_stop, +diff -Nrup linux-2.6.24/arch/avr32/oprofile/Makefile linux-avr32/arch/avr32/oprofile/Makefile +--- linux-2.6.24/arch/avr32/oprofile/Makefile 1969-12-31 19:00:00.000000000 -0500 ++++ linux-avr32/arch/avr32/oprofile/Makefile 2008-02-01 14:51:35.000000000 -0500 +@@ -0,0 +1,8 @@ ++obj-$(CONFIG_OPROFILE) += oprofile.o ++ ++oprofile-y := $(addprefix ../../../drivers/oprofile/, \ ++ oprof.o cpu_buffer.o buffer_sync.o \ ++ event_buffer.o oprofile_files.o \ ++ oprofilefs.o oprofile_stats.o \ ++ timer_int.o) ++oprofile-y += op_model_avr32.o +diff -Nrup linux-2.6.24/arch/avr32/oprofile/op_model_avr32.c linux-avr32/arch/avr32/oprofile/op_model_avr32.c +--- linux-2.6.24/arch/avr32/oprofile/op_model_avr32.c 1969-12-31 19:00:00.000000000 -0500 ++++ linux-avr32/arch/avr32/oprofile/op_model_avr32.c 2008-02-01 14:51:35.000000000 -0500 +@@ -0,0 +1,235 @@ ++/* ++ * AVR32 Performance Counter Driver ++ * ++ * Copyright (C) 2005-2007 Atmel Corporation ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation. ++ * ++ * Author: Ronny Pedersen ++ */ ++#include <linux/errno.h> ++#include <linux/interrupt.h> ++#include <linux/irq.h> ++#include <linux/oprofile.h> ++#include <linux/sched.h> ++#include <linux/types.h> ++ ++#include <asm/intc.h> ++#include <asm/sysreg.h> ++#include <asm/system.h> ++ ++#define AVR32_PERFCTR_IRQ_GROUP 0 ++#define AVR32_PERFCTR_IRQ_LINE 1 ++ ++enum { PCCNT, PCNT0, PCNT1, NR_counter }; ++ ++struct avr32_perf_counter { ++ unsigned long enabled; ++ unsigned long event; ++ unsigned long count; ++ unsigned long unit_mask; ++ unsigned long kernel; ++ unsigned long user; ++ ++ u32 ie_mask; ++ u32 flag_mask; ++}; ++ ++static struct avr32_perf_counter counter[NR_counter] = { ++ { ++ .ie_mask = SYSREG_BIT(IEC), ++ .flag_mask = SYSREG_BIT(FC), ++ }, { ++ .ie_mask = SYSREG_BIT(IE0), ++ .flag_mask = SYSREG_BIT(F0), ++ }, { ++ .ie_mask = SYSREG_BIT(IE1), ++ .flag_mask = SYSREG_BIT(F1), ++ }, ++}; ++ ++static void avr32_perf_counter_reset(void) ++{ ++ /* Reset all counter and disable/clear all interrupts */ ++ sysreg_write(PCCR, (SYSREG_BIT(PCCR_R) ++ | SYSREG_BIT(PCCR_C) ++ | SYSREG_BIT(FC) ++ | SYSREG_BIT(F0) ++ | SYSREG_BIT(F1))); ++} ++ ++static irqreturn_t avr32_perf_counter_interrupt(int irq, void *dev_id) ++{ ++ struct avr32_perf_counter *ctr = dev_id; ++ struct pt_regs *regs; ++ u32 pccr; ++ ++ if (likely(!(intc_get_pending(AVR32_PERFCTR_IRQ_GROUP) ++ & (1 << AVR32_PERFCTR_IRQ_LINE)))) ++ return IRQ_NONE; ++ ++ regs = get_irq_regs(); ++ pccr = sysreg_read(PCCR); ++ ++ /* Clear the interrupt flags we're about to handle */ ++ sysreg_write(PCCR, pccr); ++ ++ /* PCCNT */ ++ if (ctr->enabled && (pccr & ctr->flag_mask)) { ++ sysreg_write(PCCNT, -ctr->count); ++ oprofile_add_sample(regs, PCCNT); ++ } ++ ctr++; ++ /* PCNT0 */ ++ if (ctr->enabled && (pccr & ctr->flag_mask)) { ++ sysreg_write(PCNT0, -ctr->count); ++ oprofile_add_sample(regs, PCNT0); ++ } ++ ctr++; ++ /* PCNT1 */ ++ if (ctr->enabled && (pccr & ctr->flag_mask)) { ++ sysreg_write(PCNT1, -ctr->count); ++ oprofile_add_sample(regs, PCNT1); ++ } ++ ++ return IRQ_HANDLED; ++} ++ ++static int avr32_perf_counter_create_files(struct super_block *sb, ++ struct dentry *root) ++{ ++ struct dentry *dir; ++ unsigned int i; ++ char filename[4]; ++ ++ for (i = 0; i < NR_counter; i++) { ++ snprintf(filename, sizeof(filename), "%u", i); ++ dir = oprofilefs_mkdir(sb, root, filename); ++ ++ oprofilefs_create_ulong(sb, dir, "enabled", ++ &counter[i].enabled); ++ oprofilefs_create_ulong(sb, dir, "event", ++ &counter[i].event); ++ oprofilefs_create_ulong(sb, dir, "count", ++ &counter[i].count); ++ ++ /* Dummy entries */ ++ oprofilefs_create_ulong(sb, dir, "kernel", ++ &counter[i].kernel); ++ oprofilefs_create_ulong(sb, dir, "user", ++ &counter[i].user); ++ oprofilefs_create_ulong(sb, dir, "unit_mask", ++ &counter[i].unit_mask); ++ } ++ ++ return 0; ++} ++ ++static int avr32_perf_counter_setup(void) ++{ ++ struct avr32_perf_counter *ctr; ++ u32 pccr; ++ int ret; ++ int i; ++ ++ pr_debug("avr32_perf_counter_setup\n"); ++ ++ if (sysreg_read(PCCR) & SYSREG_BIT(PCCR_E)) { ++ printk(KERN_ERR ++ "oprofile: setup: perf counter already enabled\n"); ++ return -EBUSY; ++ } ++ ++ ret = request_irq(AVR32_PERFCTR_IRQ_GROUP, ++ avr32_perf_counter_interrupt, IRQF_SHARED, ++ "oprofile", counter); ++ if (ret) ++ return ret; ++ ++ avr32_perf_counter_reset(); ++ ++ pccr = 0; ++ for (i = PCCNT; i < NR_counter; i++) { ++ ctr = &counter[i]; ++ if (!ctr->enabled) ++ continue; ++ ++ pr_debug("enabling counter %d...\n", i); ++ ++ pccr |= ctr->ie_mask; ++ ++ switch (i) { ++ case PCCNT: ++ /* PCCNT always counts cycles, so no events */ ++ sysreg_write(PCCNT, -ctr->count); ++ break; ++ case PCNT0: ++ pccr |= SYSREG_BF(CONF0, ctr->event); ++ sysreg_write(PCNT0, -ctr->count); ++ break; ++ case PCNT1: ++ pccr |= SYSREG_BF(CONF1, ctr->event); ++ sysreg_write(PCNT1, -ctr->count); ++ break; ++ } ++ } ++ ++ pr_debug("oprofile: writing 0x%x to PCCR...\n", pccr); ++ ++ sysreg_write(PCCR, pccr); ++ ++ return 0; ++} ++ ++static void avr32_perf_counter_shutdown(void) ++{ ++ pr_debug("avr32_perf_counter_shutdown\n"); ++ ++ avr32_perf_counter_reset(); ++ free_irq(AVR32_PERFCTR_IRQ_GROUP, counter); ++} ++ ++static int avr32_perf_counter_start(void) ++{ ++ pr_debug("avr32_perf_counter_start\n"); ++ ++ sysreg_write(PCCR, sysreg_read(PCCR) | SYSREG_BIT(PCCR_E)); ++ ++ return 0; ++} ++ ++static void avr32_perf_counter_stop(void) ++{ ++ pr_debug("avr32_perf_counter_stop\n"); ++ ++ sysreg_write(PCCR, sysreg_read(PCCR) & ~SYSREG_BIT(PCCR_E)); ++} ++ ++static struct oprofile_operations avr32_perf_counter_ops __initdata = { ++ .create_files = avr32_perf_counter_create_files, ++ .setup = avr32_perf_counter_setup, ++ .shutdown = avr32_perf_counter_shutdown, ++ .start = avr32_perf_counter_start, ++ .stop = avr32_perf_counter_stop, ++ .cpu_type = "avr32", ++}; ++ ++int __init oprofile_arch_init(struct oprofile_operations *ops) ++{ ++ if (!(current_cpu_data.features & AVR32_FEATURE_PCTR)) ++ return -ENODEV; ++ ++ memcpy(ops, &avr32_perf_counter_ops, ++ sizeof(struct oprofile_operations)); ++ ++ printk(KERN_INFO "oprofile: using AVR32 performance monitoring.\n"); ++ ++ return 0; ++} ++ ++void oprofile_arch_exit(void) ++{ ++ ++} +diff -Nrup linux-2.6.24/Documentation/kernel-parameters.txt linux-avr32/Documentation/kernel-parameters.txt +--- linux-2.6.24/Documentation/kernel-parameters.txt 2008-01-24 17:58:37.000000000 -0500 ++++ linux-avr32/Documentation/kernel-parameters.txt 2008-02-01 14:51:34.000000000 -0500 +@@ -34,6 +34,7 @@ parameter is applicable: + ALSA ALSA sound support is enabled. + APIC APIC support is enabled. + APM Advanced Power Management support is enabled. ++ AVR32 AVR32 architecture is enabled. + AX25 Appropriate AX.25 support is enabled. + BLACKFIN Blackfin architecture is enabled. + DRM Direct Rendering Management support is enabled. +@@ -1123,6 +1124,10 @@ and is between 256 and 4096 characters. + of returning the full 64-bit number. + The default is to return 64-bit inode numbers. + ++ nmi_debug= [KNL,AVR32] Specify one or more actions to take ++ when a NMI is triggered. ++ Format: [state][,regs][,debounce][,die] ++ + nmi_watchdog= [KNL,BUGS=X86-32] Debugging features for SMP kernels + + no387 [BUGS=X86-32] Tells the kernel to use the 387 maths +diff -Nrup linux-2.6.24/drivers/i2c/busses/i2c-atmeltwi.c linux-avr32/drivers/i2c/busses/i2c-atmeltwi.c +--- linux-2.6.24/drivers/i2c/busses/i2c-atmeltwi.c 1969-12-31 19:00:00.000000000 -0500 ++++ linux-avr32/drivers/i2c/busses/i2c-atmeltwi.c 2008-02-01 14:51:37.000000000 -0500 +@@ -0,0 +1,436 @@ ++/* ++ * i2c Support for Atmel's Two-Wire Interface (TWI) ++ * ++ * Based on the work of Copyright (C) 2004 Rick Bronson ++ * Converted to 2.6 by Andrew Victor <andrew at sanpeople.com> ++ * Ported to AVR32 and heavily modified by Espen Krangnes ++ * <ekrangnes at atmel.com> ++ * ++ * Copyright (C) 2006 Atmel Corporation ++ * ++ * Borrowed heavily from the original work by: ++ * Copyright (C) 2000 Philip Edelbrock <phil at stimpy.netroedge.com> ++ * ++ * Partialy rewriten by Karel Hojdar <cmkaho at seznam.cz> ++ * bugs removed, interrupt routine markedly rewritten ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; either version 2 of the License, or ++ * (at your option) any later version. ++ */ ++#undef VERBOSE_DEBUG ++ ++#include <linux/module.h> ++#include <linux/slab.h> ++#include <linux/i2c.h> ++#include <linux/init.h> ++#include <linux/clk.h> ++#include <linux/err.h> ++#include <linux/interrupt.h> ++#include <linux/platform_device.h> ++#include <linux/completion.h> ++#include <linux/io.h> ++ ++#include "i2c-atmeltwi.h" ++ ++static unsigned int baudrate = 100 * 1000; ++module_param(baudrate, uint, S_IRUGO); ++MODULE_PARM_DESC(baudrate, "The TWI baudrate"); ++ ++ ++struct atmel_twi { ++ void __iomem *regs; ++ struct i2c_adapter adapter; ++ struct clk *pclk; ++ struct completion comp; ++ u32 mask; ++ u8 *buf; ++ u16 len; ++ u16 acks_left; ++ int status; ++ unsigned int irq; ++ ++}; ++#define to_atmel_twi(adap) container_of(adap, struct atmel_twi, adapter) ++ ++/* ++ * (Re)Initialize the TWI hardware registers. ++ */ ++static int twi_hwinit(struct atmel_twi *twi) ++{ ++ unsigned long cdiv, ckdiv = 0; ++ ++ /* REVISIT: wait till SCL is high before resetting; otherwise, ++ * some versions will wedge forever. ++ */ ++ ++ twi_writel(twi, IDR, ~0UL); ++ twi_writel(twi, CR, TWI_BIT(SWRST)); /*Reset peripheral*/ ++ twi_readl(twi, SR); ++ ++ cdiv = (clk_get_rate(twi->pclk) / (2 * baudrate)) - 4; ++ ++ while (cdiv > 255) { ++ ckdiv++; ++ cdiv = cdiv >> 1; ++ } ++ ++ /* REVISIT: there are various errata to consider re CDIV and CHDIV ++ * here, at least on at91 parts. ++ */ ++ ++ if (ckdiv > 7) ++ return -EINVAL; ++ else ++ twi_writel(twi, CWGR, TWI_BF(CKDIV, ckdiv) ++ | TWI_BF(CHDIV, cdiv) ++ | TWI_BF(CLDIV, cdiv)); ++ return 0; ++} ++ ++/* ++ * Waits for the i2c status register to set the specified bitmask ++ * Returns 0 if timed out ... ~100ms is much longer than the SMBus ++ * limit, but I2C has no limit at all. ++ */ ++static int twi_complete(struct atmel_twi *twi, u32 mask) ++{ ++ int timeout = msecs_to_jiffies(100); ++ ++ mask |= TWI_BIT(TXCOMP); ++ twi->mask = mask | TWI_BIT(NACK) | TWI_BIT(OVRE); ++ init_completion(&twi->comp); ++ ++ twi_writel(twi, IER, mask); ++ ++ if (!wait_for_completion_timeout(&twi->comp, timeout)) { ++ /* RESET TWI interface */ ++ twi_writel(twi, CR, TWI_BIT(SWRST)); ++ ++ /* Reinitialize TWI */ ++ twi_hwinit(twi); ++ ++ return -ETIMEDOUT; ++ } ++ return 0; ++} ++ ++/* ++ * Generic i2c master transfer entrypoint. ++ */ ++static int twi_xfer(struct i2c_adapter *adap, struct i2c_msg *pmsg, int num) ++{ ++ struct atmel_twi *twi = to_atmel_twi(adap); ++ int i; ++ ++ dev_dbg(&adap->dev, "twi_xfer: processing %d messages:\n", num); ++ ++ twi->status = 0; ++ for (i = 0; i < num; i++, pmsg++) { ++ twi->len = pmsg->len; ++ twi->buf = pmsg->buf; ++ twi->acks_left = pmsg->len; ++ twi_writel(twi, MMR, TWI_BF(DADR, pmsg->addr) | ++ (pmsg->flags & I2C_M_RD ? TWI_BIT(MREAD) : 0)); ++ twi_writel(twi, IADR, TWI_BF(IADR, pmsg->addr)); ++ ++ dev_dbg(&adap->dev, ++ "#%d: %s %d byte%s %s dev 0x%02x\n", ++ i, ++ pmsg->flags & I2C_M_RD ? "reading" : "writing", ++ pmsg->len, ++ pmsg->len > 1 ? "s" : "", ++ pmsg->flags & I2C_M_RD ? "from" : "to", pmsg->addr); ++ ++ /* enable */ ++ twi_writel(twi, CR, TWI_BIT(MSEN)); ++ ++ if (pmsg->flags & I2C_M_RD) { ++ /* cleanup after previous RX overruns */ ++ while (twi_readl(twi, SR) & TWI_BIT(RXRDY)) ++ twi_readl(twi, RHR); ++ ++ if (twi->len == 1) ++ twi_writel(twi, CR, ++ TWI_BIT(START) | TWI_BIT(STOP)); ++ else ++ twi_writel(twi, CR, TWI_BIT(START)); ++ ++ if (twi_complete(twi, TWI_BIT(RXRDY)) == -ETIMEDOUT) { ++ dev_dbg(&adap->dev, "RX[%d] timeout. " ++ "Stopped with %d bytes left\n", ++ i, twi->acks_left); ++ return -ETIMEDOUT; ++ } ++ } else { ++ twi_writel(twi, THR, twi->buf[0]); ++ twi->acks_left--; ++ /* REVISIT: some chips don't start automagically: ++ * twi_writel(twi, CR, TWI_BIT(START)); ++ */ ++ if (twi_complete(twi, TWI_BIT(TXRDY)) == -ETIMEDOUT) { ++ dev_dbg(&adap->dev, "TX[%d] timeout. " ++ "Stopped with %d bytes left\n", ++ i, twi->acks_left); ++ return -ETIMEDOUT; ++ } ++ /* REVISIT: an erratum workaround may be needed here; ++ * see sam9261 "STOP not generated" (START either). ++ */ ++ } ++ ++ /* Disable TWI interface */ ++ twi_writel(twi, CR, TWI_BIT(MSDIS)); ++ ++ if (twi->status) ++ return twi->status; ++ ++ /* WARNING: This driver lies about properly supporting ++ * repeated start, or it would *ALWAYS* return here. It ++ * has issued a STOP. Continuing is a false claim -- that ++ * a second (or third, etc.) message is part of the same ++ * "combined" (no STOPs between parts) message. ++ */ ++ ++ } /* end cur msg */ ++ ++ return i; ++} ++ ++ ++static irqreturn_t twi_interrupt(int irq, void *dev_id) ++{ ++ struct atmel_twi *twi = dev_id; ++ int status = twi_readl(twi, SR); ++ ++ /* Save state for later debug prints */ ++ int old_status = status; ++ ++ if (twi->mask & status) { ++ ++ status &= twi->mask; ++ ++ if (status & TWI_BIT(RXRDY)) { ++ if ((status & TWI_BIT(OVRE)) && twi->acks_left) { ++ /* Note weakness in fault reporting model: ++ * we can't say "the first N of these data ++ * bytes are valid". ++ */ ++ dev_err(&twi->adapter.dev, ++ "OVERRUN RX! %04x, lost %d\n", ++ old_status, twi->acks_left); ++ twi->acks_left = 0; ++ twi_writel(twi, CR, TWI_BIT(STOP)); ++ twi->status = -EOVERFLOW; ++ } else if (twi->acks_left > 0) { ++ twi->buf[twi->len - twi->acks_left] = ++ twi_readl(twi, RHR); ++ twi->acks_left--; ++ } ++ if (status & TWI_BIT(TXCOMP)) ++ goto done; ++ if (twi->acks_left == 1) ++ twi_writel(twi, CR, TWI_BIT(STOP)); ++ ++ } else if (status & (TWI_BIT(NACK) | TWI_BIT(TXCOMP))) { ++ goto done; ++ ++ } else if (status & TWI_BIT(TXRDY)) { ++ if (twi->acks_left > 0) { ++ twi->acks_left--; ++ twi_writel(twi, THR, ++ twi->buf[twi->len - twi->acks_left]); ++ } else ++ twi_writel(twi, CR, TWI_BIT(STOP)); ++ } ++ ++ if (twi->acks_left == 0) ++ twi_writel(twi, IDR, ~TWI_BIT(TXCOMP)); ++ } ++ ++ /* enabling this message helps trigger overruns/underruns ... */ ++ dev_vdbg(&twi->adapter.dev, ++ "ISR: SR 0x%04X, mask 0x%04X, acks %i\n", ++ old_status, ++ twi->acks_left ? twi->mask : TWI_BIT(TXCOMP), ++ twi->acks_left); ++ ++ return IRQ_HANDLED; ++ ++done: ++ /* Note weak fault reporting model: we can't report how many ++ * bytes we sent before the NAK, or let upper layers choose ++ * whether to continue. The I2C stack doesn't allow that... ++ */ ++ if (status & TWI_BIT(NACK)) { ++ dev_dbg(&twi->adapter.dev, "NACK received! %d to go\n", ++ twi->acks_left); ++ twi->status = -EPIPE; ++ ++ /* TX underrun morphs automagically into a premature STOP; ++ * we'll probably observe UVRE even when it's not documented. ++ */ ++ } else if (twi->acks_left && (twi->mask & TWI_BIT(TXRDY))) { ++ dev_err(&twi->adapter.dev, "UNDERRUN TX! %04x, %d to go\n", ++ old_status, twi->acks_left); ++ twi->status = -ENOSR; ++ } ++ ++ twi_writel(twi, IDR, ~0UL); ++ complete(&twi->comp); ++ ++ dev_dbg(&twi->adapter.dev, "ISR: SR 0x%04X, acks %i --> %d\n", ++ old_status, twi->acks_left, twi->status); ++ ++ return IRQ_HANDLED; ++} ++ ++ ++/* ++ * Return list of supported functionality. ++ * ++ * NOTE: see warning above about repeated starts; this driver is falsely ++ * claiming to support "combined" transfers. The mid-message STOPs mean ++ * some slaves will never work with this driver. (Use i2c-gpio...) ++ */ ++static u32 twi_func(struct i2c_adapter *adapter) ++{ ++ return (I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL) ++ & ~I2C_FUNC_SMBUS_QUICK; ++} ++ ++static struct i2c_algorithm twi_algorithm = { ++ .master_xfer = twi_xfer, ++ .functionality = twi_func, ++}; ++ ++/* ++ * Main initialization routine. ++ */ ++static int __init twi_probe(struct platform_device *pdev) ++{ ++ struct atmel_twi *twi; ++ struct resource *regs; ++ struct clk *pclk; ++ struct i2c_adapter *adapter; ++ int rc, irq; ++ ++ regs = platform_get_resource(pdev, IORESOURCE_MEM, 0); ++ if (!regs) ++ return -ENXIO; ++ ++ pclk = clk_get(&pdev->dev, "twi_pclk"); ++ if (IS_ERR(pclk)) ++ return PTR_ERR(pclk); ++ clk_enable(pclk); ++ ++ rc = -ENOMEM; ++ twi = kzalloc(sizeof(struct atmel_twi), GFP_KERNEL); ++ if (!twi) { ++ dev_dbg(&pdev->dev, "can't allocate interface!\n"); ++ goto err_alloc_twi; ++ } ++ ++ twi->pclk = pclk; ++ twi->regs = ioremap(regs->start, regs->end - regs->start + 1); ++ if (!twi->regs) ++ goto err_ioremap; ++ ++ irq = platform_get_irq(pdev, 0); ++ rc = request_irq(irq, twi_interrupt, 0, "twi", twi); ++ if (rc) { ++ dev_dbg(&pdev->dev, "can't bind irq!\n"); ++ goto err_irq; ++ } ++ twi->irq = irq; ++ ++ rc = twi_hwinit(twi); ++ if (rc) { ++ dev_err(&pdev->dev, "Unable to set baudrate\n"); ++ goto err_hw_init; ++ } ++ ++ adapter = &twi->adapter; ++ sprintf(adapter->name, "TWI"); ++ adapter->algo = &twi_algorithm; ++ adapter->class = I2C_CLASS_ALL; ++ adapter->nr = pdev->id; ++ adapter->dev.parent = &pdev->dev; ++ ++ platform_set_drvdata(pdev, twi); ++ ++ rc = i2c_add_numbered_adapter(adapter); ++ if (rc) { ++ dev_dbg(&pdev->dev, "Adapter %s registration failed\n", ++ adapter->name); ++ goto err_register; ++ } ++ ++ dev_info(&pdev->dev, ++ "Atmel TWI/I2C adapter (baudrate %dk) at 0x%08lx.\n", ++ baudrate/1000, (unsigned long)regs->start); ++ ++ return 0; ++ ++ ++err_register: ++ platform_set_drvdata(pdev, NULL); ++ ++err_hw_init: ++ free_irq(irq, twi); ++ ++err_irq: ++ iounmap(twi->regs); ++ ++err_ioremap: ++ kfree(twi); ++ ++err_alloc_twi: ++ clk_disable(pclk); ++ clk_put(pclk); ++ ++ return rc; ++} ++ ++static int __exit twi_remove(struct platform_device *pdev) ++{ ++ struct atmel_twi *twi = platform_get_drvdata(pdev); ++ int res; ++ ++ platform_set_drvdata(pdev, NULL); ++ res = i2c_del_adapter(&twi->adapter); ++ twi_writel(twi, CR, TWI_BIT(MSDIS)); ++ iounmap(twi->regs); ++ clk_disable(twi->pclk); ++ clk_put(twi->pclk); ++ free_irq(twi->irq, twi); ++ kfree(twi); ++ ++ return res; ++} ++ ++static struct platform_driver twi_driver = { ++ .remove = __exit_p(twi_remove), ++ .driver = { ++ .name = "atmel_twi", ++ .owner = THIS_MODULE, ++ }, ++}; ++ ++static int __init atmel_twi_init(void) ++{ ++ return platform_driver_probe(&twi_driver, twi_probe); ++} ++ ++static void __exit atmel_twi_exit(void) ++{ ++ platform_driver_unregister(&twi_driver); ++} ++ ++module_init(atmel_twi_init); ++module_exit(atmel_twi_exit); ++ ++MODULE_AUTHOR("Espen Krangnes"); ++MODULE_DESCRIPTION("I2C driver for Atmel TWI"); ++MODULE_LICENSE("GPL"); +diff -Nrup linux-2.6.24/drivers/i2c/busses/i2c-atmeltwi.h linux-avr32/drivers/i2c/busses/i2c-atmeltwi.h +--- linux-2.6.24/drivers/i2c/busses/i2c-atmeltwi.h 1969-12-31 19:00:00.000000000 -0500 ++++ linux-avr32/drivers/i2c/busses/i2c-atmeltwi.h 2008-02-01 14:51:37.000000000 -0500 +@@ -0,0 +1,117 @@ ++/* ++ * Register definitions for the Atmel Two-Wire Interface ++ */ ++ ++#ifndef __ATMELTWI_H__ ++#define __ATMELTWI_H__ ++ ++/* TWI register offsets */ ++#define TWI_CR 0x0000 ++#define TWI_MMR 0x0004 ++#define TWI_SMR 0x0008 ++#define TWI_IADR 0x000c ++#define TWI_CWGR 0x0010 ++#define TWI_SR 0x0020 ++#define TWI_IER 0x0024 ++#define TWI_IDR 0x0028 ++#define TWI_IMR 0x002c ++#define TWI_RHR 0x0030 ++#define TWI_THR 0x0034 ++ ++/* Bitfields in CR */ ++#define TWI_START_OFFSET 0 ++#define TWI_START_SIZE 1 ++#define TWI_STOP_OFFSET 1 ++#define TWI_STOP_SIZE 1 ++#define TWI_MSEN_OFFSET 2 ++#define TWI_MSEN_SIZE 1 ++#define TWI_MSDIS_OFFSET 3 ++#define TWI_MSDIS_SIZE 1 ++#define TWI_SVEN_OFFSET 4 ++#define TWI_SVEN_SIZE 1 ++#define TWI_SVDIS_OFFSET 5 ++#define TWI_SVDIS_SIZE 1 ++#define TWI_SWRST_OFFSET 7 ++#define TWI_SWRST_SIZE 1 ++ ++/* Bitfields in MMR */ ++#define TWI_IADRSZ_OFFSET 8 ++#define TWI_IADRSZ_SIZE 2 ++#define TWI_MREAD_OFFSET 12 ++#define TWI_MREAD_SIZE 1 ++#define TWI_DADR_OFFSET 16 ++#define TWI_DADR_SIZE 7 ++ ++/* Bitfields in SMR */ ++#define TWI_SADR_OFFSET 16 ++#define TWI_SADR_SIZE 7 ++ ++/* Bitfields in IADR */ ++#define TWI_IADR_OFFSET 0 ++#define TWI_IADR_SIZE 24 ++ ++/* Bitfields in CWGR */ ++#define TWI_CLDIV_OFFSET 0 ++#define TWI_CLDIV_SIZE 8 ++#define TWI_CHDIV_OFFSET 8 ++#define TWI_CHDIV_SIZE 8 ++#define TWI_CKDIV_OFFSET 16 ++#define TWI_CKDIV_SIZE 3 ++ ++/* Bitfields in SR */ ++#define TWI_TXCOMP_OFFSET 0 ++#define TWI_TXCOMP_SIZE 1 ++#define TWI_RXRDY_OFFSET 1 ++#define TWI_RXRDY_SIZE 1 ++#define TWI_TXRDY_OFFSET 2 ++#define TWI_TXRDY_SIZE 1 ++#define TWI_SVDIR_OFFSET 3 ++#define TWI_SVDIR_SIZE 1 ++#define TWI_SVACC_OFFSET 4 ++#define TWI_SVACC_SIZE 1 ++#define TWI_GCACC_OFFSET 5 ++#define TWI_GCACC_SIZE 1 ++#define TWI_OVRE_OFFSET 6 ++#define TWI_OVRE_SIZE 1 ++#define TWI_UNRE_OFFSET 7 ++#define TWI_UNRE_SIZE 1 ++#define TWI_NACK_OFFSET 8 ++#define TWI_NACK_SIZE 1 ++#define TWI_ARBLST_OFFSET 9 ++#define TWI_ARBLST_SIZE 1 ++ ++/* Bitfields in RHR */ ++#define TWI_RXDATA_OFFSET 0 ++#define TWI_RXDATA_SIZE 8 ++ ++/* Bitfields in THR */ ++#define TWI_TXDATA_OFFSET 0 ++#define TWI_TXDATA_SIZE 8 ++ ++/* Constants for IADRSZ */ ++#define TWI_IADRSZ_NO_ADDR 0 ++#define TWI_IADRSZ_ONE_BYTE 1 ++#define TWI_IADRSZ_TWO_BYTES 2 ++#define TWI_IADRSZ_THREE_BYTES 3 ++ ++/* Bit manipulation macros */ ++#define TWI_BIT(name) \ ++ (1 << TWI_##name##_OFFSET) ++#define TWI_BF(name, value) \ ++ (((value) & ((1 << TWI_##name##_SIZE) - 1)) \ ++ << TWI_##name##_OFFSET) ++#define TWI_BFEXT(name, value) \ ++ (((value) >> TWI_##name##_OFFSET) \ ++ & ((1 << TWI_##name##_SIZE) - 1)) ++#define TWI_BFINS(name, value, old) \ ++ (((old) & ~(((1 << TWI_##name##_SIZE) - 1) \ ++ << TWI_##name##_OFFSET)) \ ++ | TWI_BF(name, (value))) ++ ++/* Register access macros */ ++#define twi_readl(port, reg) \ ++ __raw_readl((port)->regs + TWI_##reg) ++#define twi_writel(port, reg, value) \ ++ __raw_writel((value), (port)->regs + TWI_##reg) ++ ++#endif /* __ATMELTWI_H__ */ +diff -Nrup linux-2.6.24/drivers/i2c/busses/Kconfig linux-avr32/drivers/i2c/busses/Kconfig +--- linux-2.6.24/drivers/i2c/busses/Kconfig 2008-01-24 17:58:37.000000000 -0500 ++++ linux-avr32/drivers/i2c/busses/Kconfig 2008-02-01 14:51:37.000000000 -0500 +@@ -88,6 +88,14 @@ config I2C_AT91 + to support combined I2C messages. Use the i2c-gpio driver + unless your system can cope with those limitations. + ++config I2C_ATMELTWI ++ tristate "Atmel Two-Wire Interface (TWI)" ++ depends on I2C && (ARCH_AT91 || PLATFORM_AT32AP) ++ help ++ Atmel on-chip TWI controller. Say Y if you have an AT32 or ++ AT91-based device and want to use its built-in TWI ++ functionality. ++ + config I2C_AU1550 + tristate "Au1550/Au1200 SMBus interface" + depends on SOC_AU1550 || SOC_AU1200 +diff -Nrup linux-2.6.24/drivers/i2c/busses/Makefile linux-avr32/drivers/i2c/busses/Makefile +--- linux-2.6.24/drivers/i2c/busses/Makefile 2008-01-24 17:58:37.000000000 -0500 ++++ linux-avr32/drivers/i2c/busses/Makefile 2008-02-01 14:51:37.000000000 -0500 +@@ -53,6 +53,7 @@ obj-$(CONFIG_I2C_VIAPRO) += i2c-viapro.o + obj-$(CONFIG_I2C_VOODOO3) += i2c-voodoo3.o + obj-$(CONFIG_SCx200_ACB) += scx200_acb.o + obj-$(CONFIG_SCx200_I2C) += scx200_i2c.o ++obj-$(CONFIG_I2C_ATMELTWI) += i2c-atmeltwi.o + + ifeq ($(CONFIG_I2C_DEBUG_BUS),y) + EXTRA_CFLAGS += -DDEBUG +diff -Nrup linux-2.6.24/drivers/leds/Kconfig linux-avr32/drivers/leds/Kconfig +--- linux-2.6.24/drivers/leds/Kconfig 2008-01-24 17:58:37.000000000 -0500 ++++ linux-avr32/drivers/leds/Kconfig 2008-02-01 14:51:38.000000000 -0500 +@@ -18,6 +18,13 @@ config LEDS_CLASS + + comment "LED drivers" + ++config LEDS_ATMEL_PWM ++ tristate "LED Support using Atmel PWM outputs" ++ depends on LEDS_CLASS && ATMEL_PWM ++ help ++ This option enables support for LEDs driven using outputs ++ of the dedicated PWM controller found on newer Atmel SOCs. ++ + config LEDS_CORGI + tristate "LED Support for the Sharp SL-C7x0 series" + depends on LEDS_CLASS && PXA_SHARP_C7xx +diff -Nrup linux-2.6.24/drivers/leds/leds-atmel-pwm.c linux-avr32/drivers/leds/leds-atmel-pwm.c +--- linux-2.6.24/drivers/leds/leds-atmel-pwm.c 1969-12-31 19:00:00.000000000 -0500 ++++ linux-avr32/drivers/leds/leds-atmel-pwm.c 2008-02-01 14:51:38.000000000 -0500 +@@ -0,0 +1,157 @@ ++#include <linux/kernel.h> ++#include <linux/platform_device.h> ++#include <linux/leds.h> ++#include <linux/io.h> ++#include <linux/atmel_pwm.h> ++ ++ ++struct pwmled { ++ struct led_classdev cdev; ++ struct pwm_channel pwmc; ++ struct gpio_led *desc; ++ u32 mult; ++ u8 active_low; ++}; ++ ++ ++/* ++ * For simplicity, we use "brightness" as if it were a linear function ++ * of PWM duty cycle. However, a logarithmic function of duty cycle is ++ * probably a better match for perceived brightness: two is half as bright ++ * as four, four is half as bright as eight, etc ++ */ ++static void pwmled_brightness(struct led_classdev *cdev, enum led_brightness b) ++{ ++ struct pwmled *led; ++ ++ /* update the duty cycle for the *next* period */ ++ led = container_of(cdev, struct pwmled, cdev); ++ pwm_channel_writel(&led->pwmc, PWM_CUPD, led->mult * (unsigned) b); ++} ++ ++/* ++ * NOTE: we reuse the platform_data structure of GPIO leds, ++ * but repurpose its "gpio" number as a PWM channel number. ++ */ ++static int __init pwmled_probe(struct platform_device *pdev) ++{ ++ const struct gpio_led_platform_data *pdata; ++ struct pwmled *leds; ++ unsigned i; ++ int status; ++ ++ pdata = pdev->dev.platform_data; ++ if (!pdata || pdata->num_leds < 1) ++ return -ENODEV; ++ ++ leds = kcalloc(pdata->num_leds, sizeof(*leds), GFP_KERNEL); ++ if (!leds) ++ return -ENOMEM; ++ ++ for (i = 0; i < pdata->num_leds; i++) { ++ struct pwmled *led = leds + i; ++ const struct gpio_led *dat = pdata->leds + i; ++ u32 tmp; ++ ++ led->cdev.name = dat->name; ++ led->cdev.brightness = LED_OFF; ++ led->cdev.brightness_set = pwmled_brightness; ++ led->cdev.default_trigger = dat->default_trigger; ++ ++ led->active_low = dat->active_low; ++ ++ status = pwm_channel_alloc(dat->gpio, &led->pwmc); ++ if (status < 0) ++ goto err; ++ ++ /* ++ * Prescale clock by 2^x, so PWM counts in low MHz. ++ * Start each cycle with the LED active, so increasing ++ * the duty cycle gives us more time on (== brighter). ++ */ ++ tmp = 5; ++ if (!led->active_low) ++ tmp |= PWM_CPR_CPOL; ++ pwm_channel_writel(&led->pwmc, PWM_CMR, tmp); ++ ++ /* ++ * Pick a period so PWM cycles at 100+ Hz; and a multiplier ++ * for scaling duty cycle: brightness * mult. ++ */ ++ tmp = (led->pwmc.mck / (1 << 5)) / 100; ++ tmp /= 255; ++ led->mult = tmp; ++ pwm_channel_writel(&led->pwmc, PWM_CDTY, ++ led->cdev.brightness * 255); ++ pwm_channel_writel(&led->pwmc, PWM_CPRD, ++ LED_FULL * tmp); ++ ++ pwm_channel_enable(&led->pwmc); ++ ++ /* Hand it over to the LED framework */ ++ status = led_classdev_register(&pdev->dev, &led->cdev); ++ if (status < 0) { ++ pwm_channel_free(&led->pwmc); ++ goto err; ++ } ++ } ++ ++ platform_set_drvdata(pdev, leds); ++ return 0; ++ ++err: ++ if (i > 0) { ++ for (i = i - 1; i >= 0; i--) { ++ led_classdev_unregister(&leds[i].cdev); ++ pwm_channel_free(&leds[i].pwmc); ++ } ++ } ++ kfree(leds); ++ ++ return status; ++} ++ ++static int __exit pwmled_remove(struct platform_device *pdev) ++{ ++ const struct gpio_led_platform_data *pdata; ++ struct pwmled *leds; ++ unsigned i; ++ ++ pdata = pdev->dev.platform_data; ++ leds = platform_get_drvdata(pdev); ++ ++ for (i = 0; i < pdata->num_leds; i++) { ++ struct pwmled *led = leds + i; ++ ++ led_classdev_unregister(&led->cdev); ++ pwm_channel_free(&led->pwmc); ++ } ++ ++ kfree(leds); ++ platform_set_drvdata(pdev, NULL); ++ return 0; ++} ++ ++static struct platform_driver pwmled_driver = { ++ .driver = { ++ .name = "leds-atmel-pwm", ++ .owner = THIS_MODULE, ++ }, ++ /* REVISIT add suspend() and resume() methods */ ++ .remove = __exit_p(pwmled_remove), ++}; ++ ++static int __init modinit(void) ++{ ++ return platform_driver_probe(&pwmled_driver, pwmled_probe); ++} ++module_init(modinit); ++ ++static void __exit modexit(void) ++{ ++ platform_driver_unregister(&pwmled_driver); ++} ++module_exit(modexit); ++ ++MODULE_DESCRIPTION("Driver for LEDs with PWM-controlled brightness"); ++MODULE_LICENSE("GPL"); +diff -Nrup linux-2.6.24/drivers/leds/Makefile linux-avr32/drivers/leds/Makefile +--- linux-2.6.24/drivers/leds/Makefile 2008-01-24 17:58:37.000000000 -0500 ++++ linux-avr32/drivers/leds/Makefile 2008-02-01 14:51:38.000000000 -0500 +@@ -5,6 +5,7 @@ obj-$(CONFIG_LEDS_CLASS) += led-class.o + obj-$(CONFIG_LEDS_TRIGGERS) += led-triggers.o + + # LED Platform Drivers ++obj-$(CONFIG_LEDS_ATMEL_PWM) += leds-atmel-pwm.o + obj-$(CONFIG_LEDS_CORGI) += leds-corgi.o + obj-$(CONFIG_LEDS_LOCOMO) += leds-locomo.o + obj-$(CONFIG_LEDS_SPITZ) += leds-spitz.o +diff -Nrup linux-2.6.24/drivers/misc/atmel_pwm.c linux-avr32/drivers/misc/atmel_pwm.c +--- linux-2.6.24/drivers/misc/atmel_pwm.c 1969-12-31 19:00:00.000000000 -0500 ++++ linux-avr32/drivers/misc/atmel_pwm.c 2008-02-01 14:51:39.000000000 -0500 +@@ -0,0 +1,409 @@ ++#include <linux/module.h> ++#include <linux/clk.h> ++#include <linux/err.h> ++#include <linux/io.h> ++#include <linux/interrupt.h> ++#include <linux/platform_device.h> ++#include <linux/atmel_pwm.h> ++ ++ ++/* ++ * This is a simple driver for the PWM controller found in various newer ++ * Atmel SOCs, including the AVR32 series and the AT91sam9263. ++ * ++ * Chips with current Linux ports have only 4 PWM channels, out of max 32. ++ * AT32UC3A and AT32UC3B chips have 7 channels (but currently no Linux). ++ * Docs are inconsistent about the width of the channel counter registers; ++ * it's at least 16 bits, but several places say 20 bits. ++ */ ++#define PWM_NCHAN 4 /* max 32 */ ++ ++struct pwm { ++ spinlock_t lock; ++ struct platform_device *pdev; ++ u32 mask; ++ int irq; ++ void __iomem *base; ++ struct clk *clk; ++ struct pwm_channel *channel[PWM_NCHAN]; ++ void (*handler[PWM_NCHAN])(struct pwm_channel *); ++}; ++ ++ ++/* global PWM controller registers */ ++#define PWM_MR 0x00 ++#define PWM_ENA 0x04 ++#define PWM_DIS 0x08 ++#define PWM_SR 0x0c ++#define PWM_IER 0x10 ++#define PWM_IDR 0x14 ++#define PWM_IMR 0x18 ++#define PWM_ISR 0x1c ++ ++static inline void pwm_writel(const struct pwm *p, unsigned offset, u32 val) ++{ ++ __raw_writel(val, p->base + offset); ++} ++ ++static inline u32 pwm_readl(const struct pwm *p, unsigned offset) ++{ ++ return __raw_readl(p->base + offset); ++} ++ ++static inline void __iomem *pwmc_regs(const struct pwm *p, int index) ++{ ++ return p->base + 0x200 + index * 0x20; ++} ++ ++static struct pwm *pwm; ++ ++static void pwm_dumpregs(struct pwm_channel *ch, char *tag) ++{ ++ struct device *dev = &pwm->pdev->dev; ++ ++ dev_dbg(dev, "%s: mr %08x, sr %08x, imr %08x\n", ++ tag, ++ pwm_readl(pwm, PWM_MR), ++ pwm_readl(pwm, PWM_SR), ++ pwm_readl(pwm, PWM_IMR)); ++ dev_dbg(dev, ++ "pwm ch%d - mr %08x, dty %u, prd %u, cnt %u\n", ++ ch->index, ++ pwm_channel_readl(ch, PWM_CMR), ++ pwm_channel_readl(ch, PWM_CDTY), ++ pwm_channel_readl(ch, PWM_CPRD), ++ pwm_channel_readl(ch, PWM_CCNT)); ++} ++ ++ ++/** ++ * pwm_channel_alloc - allocate an unused PWM channel ++ * @index: identifies the channel ++ * @ch: structure to be initialized ++ * ++ * Drivers allocate PWM channels according to the board's wiring, and ++ * matching board-specific setup code. Returns zero or negative errno. ++ */ ++int pwm_channel_alloc(int index, struct pwm_channel *ch) ++{ ++ unsigned long flags; ++ int status = 0; ++ ++ /* insist on PWM init, with this signal pinned out */ ++ if (!pwm || !(pwm->mask & 1 << index)) ++ return -ENODEV; ++ ++ if (index < 0 || index >= PWM_NCHAN || !ch) ++ return -EINVAL; ++ memset(ch, 0, sizeof *ch); ++ ++ spin_lock_irqsave(&pwm->lock, flags); ++ if (pwm->channel[index]) ++ status = -EBUSY; ++ else { ++ clk_enable(pwm->clk); ++ ++ ch->regs = pwmc_regs(pwm, index); ++ ch->index = index; ++ ++ /* REVISIT: ap7000 seems to go 2x as fast as we expect!! */ ++ ch->mck = clk_get_rate(pwm->clk); ++ ++ pwm->channel[index] = ch; ++ pwm->handler[index] = NULL; ++ ++ /* channel and irq are always disabled when we return */ ++ pwm_writel(pwm, PWM_DIS, 1 << index); ++ pwm_writel(pwm, PWM_IDR, 1 << index); ++ } ++ spin_unlock_irqrestore(&pwm->lock, flags); ++ return status; ++} ++EXPORT_SYMBOL(pwm_channel_alloc); ++ ++static int pwmcheck(struct pwm_channel *ch) ++{ ++ int index; ++ ++ if (!pwm) ++ return -ENODEV; ++ if (!ch) ++ return -EINVAL; ++ index = ch->index; ++ if (index < 0 || index >= PWM_NCHAN || pwm->channel[index] != ch) ++ return -EINVAL; ++ ++ return index; ++} ++ ++/** ++ * pwm_channel_free - release a previously allocated channel ++ * @ch: the channel being released ++ * ++ * The channel is completely shut down (counter and IRQ disabled), ++ * and made available for re-use. Returns zero, or negative errno. ++ */ ++int pwm_channel_free(struct pwm_channel *ch) ++{ ++ unsigned long flags; ++ int t; ++ ++ spin_lock_irqsave(&pwm->lock, flags); ++ t = pwmcheck(ch); ++ if (t >= 0) { ++ pwm->channel[t] = NULL; ++ pwm->handler[t] = NULL; ++ ++ /* channel and irq are always disabled when we return */ ++ pwm_writel(pwm, PWM_DIS, 1 << t); ++ pwm_writel(pwm, PWM_IDR, 1 << t); ++ ++ clk_disable(pwm->clk); ++ t = 0; ++ } ++ spin_unlock_irqrestore(&pwm->lock, flags); ++ return t; ++} ++EXPORT_SYMBOL(pwm_channel_free); ++ ++int __pwm_channel_onoff(struct pwm_channel *ch, int enabled) ++{ ++ unsigned long flags; ++ int t; ++ ++ /* OMITTED FUNCTIONALITY: starting several channels in synch */ ++ ++ spin_lock_irqsave(&pwm->lock, flags); ++ t = pwmcheck(ch); ++ if (t >= 0) { ++ pwm_writel(pwm, enabled ? PWM_ENA : PWM_DIS, 1 << t); ++ t = 0; ++ pwm_dumpregs(ch, enabled ? "enable" : "disable"); ++ } ++ spin_unlock_irqrestore(&pwm->lock, flags); ++ ++ return t; ++} ++EXPORT_SYMBOL(__pwm_channel_onoff); ++ ++/** ++ * pwm_clk_alloc - allocate and configure CLKA or CLKB ++ * @prescale: from 0..10, the power of two used to divide MCK ++ * @div: from 1..255, the linear divisor to use ++ * ++ * Returns PWM_CPR_CLKA, PWM_CPR_CLKB, or negative errno. The allocated ++ * clock will run with a period of (2^prescale * div) / MCK, or twice as ++ * long if center aligned PWM output is used. The clock must later be ++ * deconfigured using pwm_clk_free(). ++ */ ++int pwm_clk_alloc(unsigned prescale, unsigned div) ++{ ++ unsigned long flags; ++ u32 mr; ++ u32 val = (prescale << 8) | div; ++ int ret = -EBUSY; ++ ++ if (prescale >= 10 || div == 0 || div > 255) ++ return -EINVAL; ++ ++ spin_lock_irqsave(&pwm->lock, flags); ++ mr = pwm_readl(pwm, PWM_MR); ++ if ((mr & 0xffff) == 0) { ++ mr |= val; ++ ret = PWM_CPR_CLKA; ++ } ++ if ((mr & (0xffff << 16)) == 0) { ++ mr |= val << 16; ++ ret = PWM_CPR_CLKB; ++ } ++ if (ret > 0) ++ pwm_writel(pwm, PWM_MR, mr); ++ spin_unlock_irqrestore(&pwm->lock, flags); ++ return ret; ++} ++EXPORT_SYMBOL(pwm_clk_alloc); ++ ++/** ++ * pwm_clk_free - deconfigure and release CLKA or CLKB ++ * ++ * Reverses the effect of pwm_clk_alloc(). ++ */ ++void pwm_clk_free(unsigned clk) ++{ ++ unsigned long flags; ++ u32 mr; ++ ++ spin_lock_irqsave(&pwm->lock, flags); ++ mr = pwm_readl(pwm, PWM_MR); ++ if (clk == PWM_CPR_CLKA) ++ pwm_writel(pwm, PWM_MR, mr & ~(0xffff << 0)); ++ if (clk == PWM_CPR_CLKB) ++ pwm_writel(pwm, PWM_MR, mr & ~(0xffff << 16)); ++ spin_unlock_irqrestore(&pwm->lock, flags); ++} ++EXPORT_SYMBOL(pwm_clk_free); ++ ++/** ++ * pwm_channel_handler - manage channel's IRQ handler ++ * @ch: the channel ++ * @handler: the handler to use, possibly NULL ++ * ++ * If the handler is non-null, the handler will be called after every ++ * period of this PWM channel. If the handler is null, this channel ++ * won't generate an IRQ. ++ */ ++int pwm_channel_handler(struct pwm_channel *ch, ++ void (*handler)(struct pwm_channel *ch)) ++{ ++ unsigned long flags; ++ int t; ++ ++ spin_lock_irqsave(&pwm->lock, flags); ++ t = pwmcheck(ch); ++ if (t >= 0) { ++ pwm->handler[t] = handler; ++ pwm_writel(pwm, handler ? PWM_IER : PWM_IDR, 1 << t); ++ t = 0; ++ } ++ spin_unlock_irqrestore(&pwm->lock, flags); ++ ++ return t; ++} ++EXPORT_SYMBOL(pwm_channel_handler); ++ ++static irqreturn_t pwm_irq(int id, void *_pwm) ++{ ++ struct pwm *p = _pwm; ++ irqreturn_t handled = IRQ_NONE; ++ u32 irqstat; ++ int index; ++ ++ spin_lock(&p->lock); ++ ++ /* ack irqs, then handle them */ ++ irqstat = pwm_readl(pwm, PWM_ISR); ++ ++ while (irqstat) { ++ struct pwm_channel *ch; ++ void (*handler)(struct pwm_channel *ch); ++ ++ index = ffs(irqstat) - 1; ++ irqstat &= ~(1 << index); ++ ch = pwm->channel[index]; ++ handler = pwm->handler[index]; ++ if (handler && ch) { ++ spin_unlock(&p->lock); ++ handler(ch); ++ spin_lock(&p->lock); ++ handled = IRQ_HANDLED; ++ } ++ } ++ ++ spin_unlock(&p->lock); ++ return handled; ++} ++ ++static int __init pwm_probe(struct platform_device *pdev) ++{ ++ struct resource *r = platform_get_resource(pdev, IORESOURCE_MEM, 0); ++ int irq = platform_get_irq(pdev, 0); ++ u32 *mp = pdev->dev.platform_data; ++ struct pwm *p; ++ int status = -EIO; ++ ++ if (pwm) ++ return -EBUSY; ++ if (!r || irq < 0 || !mp || !*mp) ++ return -ENODEV; ++ if (*mp & ~((1<<PWM_NCHAN)-1)) { ++ dev_warn(&pdev->dev, "mask 0x%x ... more than %d channels\n", ++ *mp, PWM_NCHAN); ++ return -EINVAL; ++ } ++ ++ p = kzalloc(sizeof(*p), GFP_KERNEL); ++ if (!p) ++ return -ENOMEM; ++ ++ spin_lock_init(&p->lock); ++ p->pdev = pdev; ++ p->mask = *mp; ++ p->irq = irq; ++ p->base = ioremap(r->start, r->end - r->start + 1); ++ if (!p->base) ++ goto fail; ++ p->clk = clk_get(&pdev->dev, "mck"); ++ if (IS_ERR(p->clk)) { ++ status = PTR_ERR(p->clk); ++ p->clk = NULL; ++ goto fail; ++ } ++ ++ status = request_irq(irq, pwm_irq, 0, pdev->name, p); ++ if (status < 0) ++ goto fail; ++ ++ pwm = p; ++ platform_set_drvdata(pdev, p); ++ ++ return 0; ++ ++fail: ++ if (p->clk) ++ clk_put(p->clk); ++ if (p->base) ++ iounmap(p->base); ++ ++ kfree(p); ++ return status; ++} ++ ++static int __exit pwm_remove(struct platform_device *pdev) ++{ ++ struct pwm *p = platform_get_drvdata(pdev); ++ ++ if (p != pwm) ++ return -EINVAL; ++ ++ clk_enable(pwm->clk); ++ pwm_writel(pwm, PWM_DIS, (1 << PWM_NCHAN) - 1); ++ pwm_writel(pwm, PWM_IDR, (1 << PWM_NCHAN) - 1); ++ clk_disable(pwm->clk); ++ ++ pwm = NULL; ++ ++ free_irq(p->irq, p); ++ clk_put(p->clk); ++ iounmap(p->base); ++ kfree(p); ++ ++ return 0; ++} ++ ++static struct platform_driver atmel_pwm_driver = { ++ .driver = { ++ .name = "atmel_pwm", ++ .owner = THIS_MODULE, ++ }, ++ .remove = __exit_p(pwm_remove), ++ ++ /* NOTE: PWM can keep running in AVR32 "idle" and "frozen" states; ++ * and all AT91sam9263 states, albeit at reduced clock rate if ++ * MCK becomes the slow clock (i.e. what Linux labels STR). ++ */ ++}; ++ ++static int __init pwm_init(void) ++{ ++ return platform_driver_probe(&atmel_pwm_driver, pwm_probe); ++} ++module_init(pwm_init); ++ ++static void __exit pwm_exit(void) ++{ ++ platform_driver_unregister(&atmel_pwm_driver); ++} ++module_exit(pwm_exit); ++ ++MODULE_DESCRIPTION("Driver for AT32/AT91 PWM module"); ++MODULE_LICENSE("GPL"); +diff -Nrup linux-2.6.24/drivers/misc/Kconfig linux-avr32/drivers/misc/Kconfig +--- linux-2.6.24/drivers/misc/Kconfig 2008-01-24 17:58:37.000000000 -0500 ++++ linux-avr32/drivers/misc/Kconfig 2008-02-01 14:51:39.000000000 -0500 +@@ -13,6 +13,15 @@ menuconfig MISC_DEVICES + + if MISC_DEVICES + ++config ATMEL_PWM ++ tristate "Atmel AT32/AT91 PWM support" ++ depends on (AVR32 || AT91) && EXPERIMENTAL ++ help ++ This option enables device driver support for the PWM channels ++ on certain Atmel prcoessors. Pulse Width Modulation is used for ++ purposes including software controlled power-efficent backlights ++ on LCD displays, motor control, and waveform generation. ++ + config IBM_ASM + tristate "Device driver for IBM RSA service processor" + depends on X86 && PCI && INPUT && EXPERIMENTAL +diff -Nrup linux-2.6.24/drivers/misc/Makefile linux-avr32/drivers/misc/Makefile +--- linux-2.6.24/drivers/misc/Makefile 2008-01-24 17:58:37.000000000 -0500 ++++ linux-avr32/drivers/misc/Makefile 2008-02-01 14:51:39.000000000 -0500 +@@ -7,6 +7,7 @@ obj-$(CONFIG_IBM_ASM) += ibmasm/ + obj-$(CONFIG_HDPU_FEATURES) += hdpuftrs/ + obj-$(CONFIG_MSI_LAPTOP) += msi-laptop.o + obj-$(CONFIG_ASUS_LAPTOP) += asus-laptop.o ++obj-$(CONFIG_ATMEL_PWM) += atmel_pwm.o + obj-$(CONFIG_ATMEL_SSC) += atmel-ssc.o + obj-$(CONFIG_LKDTM) += lkdtm.o + obj-$(CONFIG_TIFM_CORE) += tifm_core.o +diff -Nrup linux-2.6.24/drivers/mmc/host/atmel-mci.c linux-avr32/drivers/mmc/host/atmel-mci.c +--- linux-2.6.24/drivers/mmc/host/atmel-mci.c 1969-12-31 19:00:00.000000000 -0500 ++++ linux-avr32/drivers/mmc/host/atmel-mci.c 2008-02-01 14:51:39.000000000 -0500 +@@ -0,0 +1,1176 @@ ++/* ++ * Atmel MultiMedia Card Interface driver ++ * ++ * Copyright (C) 2004-2006 Atmel Corporation ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation. ++ */ ++#include <linux/blkdev.h> ++#include <linux/clk.h> ++#include <linux/device.h> ++#include <linux/dma-mapping.h> ++#include <linux/init.h> ++#include <linux/interrupt.h> ++#include <linux/ioport.h> ++#include <linux/module.h> ++#include <linux/platform_device.h> ++ ++#include <linux/mmc/host.h> ++ ++#include <asm/dma-controller.h> ++#include <asm/io.h> ++#include <asm/arch/board.h> ++#include <asm/arch/gpio.h> ++ ++#include "atmel-mci.h" ++ ++#define DRIVER_NAME "atmel_mci" ++ ++#define MCI_DATA_ERROR_FLAGS (MCI_BIT(DCRCE) | MCI_BIT(DTOE) | \ ++ MCI_BIT(OVRE) | MCI_BIT(UNRE)) ++ ++enum { ++ EVENT_CMD_COMPLETE = 0, ++ EVENT_DATA_COMPLETE, ++ EVENT_DATA_ERROR, ++ EVENT_STOP_SENT, ++ EVENT_STOP_COMPLETE, ++ EVENT_DMA_COMPLETE, ++ EVENT_DMA_ERROR, ++ EVENT_CARD_DETECT, ++}; ++ ++struct atmel_mci_dma { ++ struct dma_request_sg req; ++ unsigned short rx_periph_id; ++ unsigned short tx_periph_id; ++}; ++ ++struct atmel_mci { ++ struct mmc_host *mmc; ++ void __iomem *regs; ++ struct atmel_mci_dma dma; ++ ++ struct mmc_request *mrq; ++ struct mmc_command *cmd; ++ struct mmc_data *data; ++ ++ u32 cmd_status; ++ u32 data_status; ++ u32 stop_status; ++ u32 stop_cmdr; ++ ++ struct tasklet_struct tasklet; ++ unsigned long pending_events; ++ unsigned long completed_events; ++ ++ int present; ++ int detect_pin; ++ int wp_pin; ++ ++ unsigned long bus_hz; ++ unsigned long mapbase; ++ struct clk *mck; ++ struct platform_device *pdev; ++ ++#ifdef CONFIG_DEBUG_FS ++ struct dentry *debugfs_root; ++ struct dentry *debugfs_regs; ++ struct dentry *debugfs_req; ++ struct dentry *debugfs_pending_events; ++ struct dentry *debugfs_completed_events; ++#endif ++}; ++ ++/* Those printks take an awful lot of time... */ ++#ifndef DEBUG ++static unsigned int fmax = 15000000U; ++#else ++static unsigned int fmax = 1000000U; ++#endif ++module_param(fmax, uint, 0444); ++MODULE_PARM_DESC(fmax, "Max frequency in Hz of the MMC bus clock"); ++ ++/* Test bit macros for completed events */ ++#define mci_cmd_is_complete(host) \ ++ test_bit(EVENT_CMD_COMPLETE, &host->completed_events) ++#define mci_data_is_complete(host) \ ++ test_bit(EVENT_DATA_COMPLETE, &host->completed_events) ++#define mci_data_error_is_complete(host) \ ++ test_bit(EVENT_DATA_ERROR, &host->completed_events) ++#define mci_stop_sent_is_complete(host) \ ++ test_bit(EVENT_STOP_SENT, &host->completed_events) ++#define mci_stop_is_complete(host) \ ++ test_bit(EVENT_STOP_COMPLETE, &host->completed_events) ++#define mci_dma_is_complete(host) \ ++ test_bit(EVENT_DMA_COMPLETE, &host->completed_events) ++#define mci_dma_error_is_complete(host) \ ++ test_bit(EVENT_DMA_ERROR, &host->completed_events) ++#define mci_card_detect_is_complete(host) \ ++ test_bit(EVENT_CARD_DETECT, &host->completed_events) ++ ++/* Test and clear bit macros for pending events */ ++#define mci_clear_cmd_is_pending(host) \ ++ test_and_clear_bit(EVENT_CMD_COMPLETE, &host->pending_events) ++#define mci_clear_data_is_pending(host) \ ++ test_and_clear_bit(EVENT_DATA_COMPLETE, &host->pending_events) ++#define mci_clear_data_error_is_pending(host) \ ++ test_and_clear_bit(EVENT_DATA_ERROR, &host->pending_events) ++#define mci_clear_stop_sent_is_pending(host) \ ++ test_and_clear_bit(EVENT_STOP_SENT, &host->pending_events) ++#define mci_clear_stop_is_pending(host) \ ++ test_and_clear_bit(EVENT_STOP_COMPLETE, &host->pending_events) ++#define mci_clear_dma_error_is_pending(host) \ ++ test_and_clear_bit(EVENT_DMA_ERROR, &host->pending_events) ++#define mci_clear_card_detect_is_pending(host) \ ++ test_and_clear_bit(EVENT_CARD_DETECT, &host->pending_events) ++ ++/* Test and set bit macros for completed events */ ++#define mci_set_cmd_is_completed(host) \ ++ test_and_set_bit(EVENT_CMD_COMPLETE, &host->completed_events) ++#define mci_set_data_is_completed(host) \ ++ test_and_set_bit(EVENT_DATA_COMPLETE, &host->completed_events) ++#define mci_set_data_error_is_completed(host) \ ++ test_and_set_bit(EVENT_DATA_ERROR, &host->completed_events) ++#define mci_set_stop_sent_is_completed(host) \ ++ test_and_set_bit(EVENT_STOP_SENT, &host->completed_events) ++#define mci_set_stop_is_completed(host) \ ++ test_and_set_bit(EVENT_STOP_COMPLETE, &host->completed_events) ++#define mci_set_dma_error_is_completed(host) \ ++ test_and_set_bit(EVENT_DMA_ERROR, &host->completed_events) ++#define mci_set_card_detect_is_completed(host) \ ++ test_and_set_bit(EVENT_CARD_DETECT, &host->completed_events) ++ ++/* Set bit macros for completed events */ ++#define mci_set_cmd_complete(host) \ ++ set_bit(EVENT_CMD_COMPLETE, &host->completed_events) ++#define mci_set_data_complete(host) \ ++ set_bit(EVENT_DATA_COMPLETE, &host->completed_events) ++#define mci_set_data_error_complete(host) \ ++ set_bit(EVENT_DATA_ERROR, &host->completed_events) ++#define mci_set_stop_sent_complete(host) \ ++ set_bit(EVENT_STOP_SENT, &host->completed_events) ++#define mci_set_stop_complete(host) \ ++ set_bit(EVENT_STOP_COMPLETE, &host->completed_events) ++#define mci_set_dma_complete(host) \ ++ set_bit(EVENT_DMA_COMPLETE, &host->completed_events) ++#define mci_set_dma_error_complete(host) \ ++ set_bit(EVENT_DMA_ERROR, &host->completed_events) ++#define mci_set_card_detect_complete(host) \ ++ set_bit(EVENT_CARD_DETECT, &host->completed_events) ++ ++/* Set bit macros for pending events */ ++#define mci_set_cmd_pending(host) \ ++ set_bit(EVENT_CMD_COMPLETE, &host->pending_events) ++#define mci_set_data_pending(host) \ ++ set_bit(EVENT_DATA_COMPLETE, &host->pending_events) ++#define mci_set_data_error_pending(host) \ ++ set_bit(EVENT_DATA_ERROR, &host->pending_events) ++#define mci_set_stop_sent_pending(host) \ ++ set_bit(EVENT_STOP_SENT, &host->pending_events) ++#define mci_set_stop_pending(host) \ ++ set_bit(EVENT_STOP_COMPLETE, &host->pending_events) ++#define mci_set_dma_error_pending(host) \ ++ set_bit(EVENT_DMA_ERROR, &host->pending_events) ++#define mci_set_card_detect_pending(host) \ ++ set_bit(EVENT_CARD_DETECT, &host->pending_events) ++ ++/* Clear bit macros for pending events */ ++#define mci_clear_cmd_pending(host) \ ++ clear_bit(EVENT_CMD_COMPLETE, &host->pending_events) ++#define mci_clear_data_pending(host) \ ++ clear_bit(EVENT_DATA_COMPLETE, &host->pending_events) ++#define mci_clear_data_error_pending(host) \ ++ clear_bit(EVENT_DATA_ERROR, &host->pending_events) ++#define mci_clear_stop_sent_pending(host) \ ++ clear_bit(EVENT_STOP_SENT, &host->pending_events) ++#define mci_clear_stop_pending(host) \ ++ clear_bit(EVENT_STOP_COMPLETE, &host->pending_events) ++#define mci_clear_dma_error_pending(host) \ ++ clear_bit(EVENT_DMA_ERROR, &host->pending_events) ++#define mci_clear_card_detect_pending(host) \ ++ clear_bit(EVENT_CARD_DETECT, &host->pending_events) ++ ++ ++#ifdef CONFIG_DEBUG_FS ++#include <linux/debugfs.h> ++ ++#define DBG_REQ_BUF_SIZE (4096 - sizeof(unsigned int)) ++ ++struct req_dbg_data { ++ unsigned int nbytes; ++ char str[DBG_REQ_BUF_SIZE]; ++}; ++ ++static int req_dbg_open(struct inode *inode, struct file *file) ++{ ++ struct atmel_mci *host; ++ struct mmc_request *mrq; ++ struct mmc_command *cmd, *stop; ++ struct mmc_data *data; ++ struct req_dbg_data *priv; ++ char *str; ++ unsigned long n = 0; ++ ++ priv = kzalloc(DBG_REQ_BUF_SIZE, GFP_KERNEL); ++ if (!priv) ++ return -ENOMEM; ++ str = priv->str; ++ ++ mutex_lock(&inode->i_mutex); ++ host = inode->i_private; ++ ++ spin_lock_irq(&host->mmc->lock); ++ mrq = host->mrq; ++ if (mrq) { ++ cmd = mrq->cmd; ++ data = mrq->data; ++ stop = mrq->stop; ++ n = snprintf(str, DBG_REQ_BUF_SIZE, ++ "CMD%u(0x%x) %x %x %x %x %x (err %u)\n", ++ cmd->opcode, cmd->arg, cmd->flags, ++ cmd->resp[0], cmd->resp[1], cmd->resp[2], ++ cmd->resp[3], cmd->error); ++ if (n < DBG_REQ_BUF_SIZE && data) ++ n += snprintf(str + n, DBG_REQ_BUF_SIZE - n, ++ "DATA %u * %u (%u) %x (err %u)\n", ++ data->blocks, data->blksz, ++ data->bytes_xfered, data->flags, ++ data->error); ++ if (n < DBG_REQ_BUF_SIZE && stop) ++ n += snprintf(str + n, DBG_REQ_BUF_SIZE - n, ++ "CMD%u(0x%x) %x %x %x %x %x (err %u)\n", ++ stop->opcode, stop->arg, stop->flags, ++ stop->resp[0], stop->resp[1], ++ stop->resp[2], stop->resp[3], ++ stop->error); ++ } ++ spin_unlock_irq(&host->mmc->lock); ++ mutex_unlock(&inode->i_mutex); ++ ++ priv->nbytes = min(n, DBG_REQ_BUF_SIZE); ++ file->private_data = priv; ++ ++ return 0; ++} ++ ++static ssize_t req_dbg_read(struct file *file, char __user *buf, ++ size_t nbytes, loff_t *ppos) ++{ ++ struct req_dbg_data *priv = file->private_data; ++ ++ return simple_read_from_buffer(buf, nbytes, ppos, ++ priv->str, priv->nbytes); ++} ++ ++static int req_dbg_release(struct inode *inode, struct file *file) ++{ ++ kfree(file->private_data); ++ return 0; ++} ++ ++static const struct file_operations req_dbg_fops = { ++ .owner = THIS_MODULE, ++ .open = req_dbg_open, ++ .llseek = no_llseek, ++ .read = req_dbg_read, ++ .release = req_dbg_release, ++}; ++ ++static int regs_dbg_open(struct inode *inode, struct file *file) ++{ ++ struct atmel_mci *host; ++ unsigned int i; ++ u32 *data; ++ int ret = -ENOMEM; ++ ++ mutex_lock(&inode->i_mutex); ++ host = inode->i_private; ++ data = kmalloc(inode->i_size, GFP_KERNEL); ++ if (!data) ++ goto out; ++ ++ spin_lock_irq(&host->mmc->lock); ++ for (i = 0; i < inode->i_size / 4; i++) ++ data[i] = __raw_readl(host->regs + i * 4); ++ spin_unlock_irq(&host->mmc->lock); ++ ++ file->private_data = data; ++ ret = 0; ++ ++out: ++ mutex_unlock(&inode->i_mutex); ++ ++ return ret; ++} ++ ++static ssize_t regs_dbg_read(struct file *file, char __user *buf, ++ size_t nbytes, loff_t *ppos) ++{ ++ struct inode *inode = file->f_dentry->d_inode; ++ int ret; ++ ++ mutex_lock(&inode->i_mutex); ++ ret = simple_read_from_buffer(buf, nbytes, ppos, ++ file->private_data, ++ file->f_dentry->d_inode->i_size); ++ mutex_unlock(&inode->i_mutex); ++ ++ return ret; ++} ++ ++static int regs_dbg_release(struct inode *inode, struct file *file) ++{ ++ kfree(file->private_data); ++ return 0; ++} ++ ++static const struct file_operations regs_dbg_fops = { ++ .owner = THIS_MODULE, ++ .open = regs_dbg_open, ++ .llseek = generic_file_llseek, ++ .read = regs_dbg_read, ++ .release = regs_dbg_release, ++}; ++ ++static void atmci_init_debugfs(struct atmel_mci *host) ++{ ++ struct mmc_host *mmc; ++ struct dentry *root, *regs; ++ struct resource *res; ++ ++ mmc = host->mmc; ++ root = debugfs_create_dir(mmc_hostname(mmc), NULL); ++ if (IS_ERR(root) || !root) ++ goto err_root; ++ host->debugfs_root = root; ++ ++ regs = debugfs_create_file("regs", 0400, root, host, ®s_dbg_fops); ++ if (!regs) ++ goto err_regs; ++ ++ res = platform_get_resource(host->pdev, IORESOURCE_MEM, 0); ++ regs->d_inode->i_size = res->end - res->start + 1; ++ host->debugfs_regs = regs; ++ ++ host->debugfs_req = debugfs_create_file("req", 0400, root, ++ host, &req_dbg_fops); ++ if (!host->debugfs_req) ++ goto err_req; ++ ++ host->debugfs_pending_events ++ = debugfs_create_u32("pending_events", 0400, root, ++ (u32 *)&host->pending_events); ++ if (!host->debugfs_pending_events) ++ goto err_pending_events; ++ ++ host->debugfs_completed_events ++ = debugfs_create_u32("completed_events", 0400, root, ++ (u32 *)&host->completed_events); ++ if (!host->debugfs_completed_events) ++ goto err_completed_events; ++ ++ return; ++ ++err_completed_events: ++ debugfs_remove(host->debugfs_pending_events); ++err_pending_events: ++ debugfs_remove(host->debugfs_req); ++err_req: ++ debugfs_remove(host->debugfs_regs); ++err_regs: ++ debugfs_remove(host->debugfs_root); ++err_root: ++ host->debugfs_root = NULL; ++ dev_err(&host->pdev->dev, ++ "failed to initialize debugfs for %s\n", ++ mmc_hostname(mmc)); ++} ++ ++static void atmci_cleanup_debugfs(struct atmel_mci *host) ++{ ++ if (host->debugfs_root) { ++ debugfs_remove(host->debugfs_completed_events); ++ debugfs_remove(host->debugfs_pending_events); ++ debugfs_remove(host->debugfs_req); ++ debugfs_remove(host->debugfs_regs); ++ debugfs_remove(host->debugfs_root); ++ host->debugfs_root = NULL; ++ } ++} ++#else ++static inline void atmci_init_debugfs(struct atmel_mci *host) ++{ ++ ++} ++ ++static inline void atmci_cleanup_debugfs(struct atmel_mci *host) ++{ ++ ++} ++#endif /* CONFIG_DEBUG_FS */ ++ ++static inline unsigned int ns_to_clocks(struct atmel_mci *host, ++ unsigned int ns) ++{ ++ return (ns * (host->bus_hz / 1000000) + 999) / 1000; ++} ++ ++static void atmci_set_timeout(struct atmel_mci *host, ++ struct mmc_data *data) ++{ ++ static unsigned dtomul_to_shift[] = { ++ 0, 4, 7, 8, 10, 12, 16, 20 ++ }; ++ unsigned timeout; ++ unsigned dtocyc, dtomul; ++ ++ timeout = ns_to_clocks(host, data->timeout_ns) + data->timeout_clks; ++ ++ for (dtomul = 0; dtomul < 8; dtomul++) { ++ unsigned shift = dtomul_to_shift[dtomul]; ++ dtocyc = (timeout + (1 << shift) - 1) >> shift; ++ if (dtocyc < 15) ++ break; ++ } ++ ++ if (dtomul >= 8) { ++ dtomul = 7; ++ dtocyc = 15; ++ } ++ ++ dev_dbg(&host->mmc->class_dev, "setting timeout to %u cycles\n", ++ dtocyc << dtomul_to_shift[dtomul]); ++ mci_writel(host, DTOR, (MCI_BF(DTOMUL, dtomul) ++ | MCI_BF(DTOCYC, dtocyc))); ++} ++ ++/* ++ * Return mask with command flags to be enabled for this command. ++ */ ++static u32 atmci_prepare_command(struct mmc_host *mmc, ++ struct mmc_command *cmd) ++{ ++ u32 cmdr; ++ ++ cmd->error = 0; ++ ++ cmdr = MCI_BF(CMDNB, cmd->opcode); ++ ++ if (cmd->flags & MMC_RSP_PRESENT) { ++ if (cmd->flags & MMC_RSP_136) ++ cmdr |= MCI_BF(RSPTYP, MCI_RSPTYP_136_BIT); ++ else ++ cmdr |= MCI_BF(RSPTYP, MCI_RSPTYP_48_BIT); ++ } ++ ++ /* ++ * This should really be MAXLAT_5 for CMD2 and ACMD41, but ++ * it's too difficult to determine whether this is an ACMD or ++ * not. Better make it 64. ++ */ ++ cmdr |= MCI_BIT(MAXLAT); ++ ++ if (mmc->ios.bus_mode == MMC_BUSMODE_OPENDRAIN) ++ cmdr |= MCI_BIT(OPDCMD); ++ ++ dev_dbg(&mmc->class_dev, ++ "cmd: op %02x arg %08x flags %08x, cmdflags %08lx\n", ++ cmd->opcode, cmd->arg, cmd->flags, (unsigned long)cmdr); ++ ++ return cmdr; ++} ++ ++static void atmci_start_command(struct atmel_mci *host, ++ struct mmc_command *cmd, ++ u32 cmd_flags) ++{ ++ WARN_ON(host->cmd); ++ host->cmd = cmd; ++ ++ mci_writel(host, ARGR, cmd->arg); ++ mci_writel(host, CMDR, cmd_flags); ++ ++ if (cmd->data) ++ dma_start_request(host->dma.req.req.dmac, ++ host->dma.req.req.channel); ++} ++ ++/* ++ * Returns a mask of flags to be set in the command register when the ++ * command to start the transfer is to be sent. ++ */ ++static u32 atmci_prepare_data(struct mmc_host *mmc, struct mmc_data *data) ++{ ++ struct atmel_mci *host = mmc_priv(mmc); ++ u32 cmd_flags; ++ ++ WARN_ON(host->data); ++ host->data = data; ++ ++ atmci_set_timeout(host, data); ++ mci_writel(host, BLKR, (MCI_BF(BCNT, data->blocks) ++ | MCI_BF(BLKLEN, data->blksz))); ++ host->dma.req.block_size = data->blksz; ++ host->dma.req.nr_blocks = data->blocks; ++ ++ cmd_flags = MCI_BF(TRCMD, MCI_TRCMD_START_TRANS); ++ if (data->flags & MMC_DATA_STREAM) ++ cmd_flags |= MCI_BF(TRTYP, MCI_TRTYP_STREAM); ++ else if (data->blocks > 1) ++ cmd_flags |= MCI_BF(TRTYP, MCI_TRTYP_MULTI_BLOCK); ++ else ++ cmd_flags |= MCI_BF(TRTYP, MCI_TRTYP_BLOCK); ++ ++ if (data->flags & MMC_DATA_READ) { ++ cmd_flags |= MCI_BIT(TRDIR); ++ host->dma.req.nr_sg ++ = dma_map_sg(&host->pdev->dev, data->sg, ++ data->sg_len, DMA_FROM_DEVICE); ++ host->dma.req.periph_id = host->dma.rx_periph_id; ++ host->dma.req.direction = DMA_DIR_PERIPH_TO_MEM; ++ host->dma.req.data_reg = host->mapbase + MCI_RDR; ++ } else { ++ host->dma.req.nr_sg ++ = dma_map_sg(&host->pdev->dev, data->sg, ++ data->sg_len, DMA_TO_DEVICE); ++ host->dma.req.periph_id = host->dma.tx_periph_id; ++ host->dma.req.direction = DMA_DIR_MEM_TO_PERIPH; ++ host->dma.req.data_reg = host->mapbase + MCI_TDR; ++ } ++ host->dma.req.sg = data->sg; ++ ++ dma_prepare_request_sg(host->dma.req.req.dmac, &host->dma.req); ++ ++ return cmd_flags; ++} ++ ++static void atmci_request(struct mmc_host *mmc, struct mmc_request *mrq) ++{ ++ struct atmel_mci *host = mmc_priv(mmc); ++ struct mmc_data *data = mrq->data; ++ u32 iflags; ++ u32 cmdflags = 0; ++ ++ iflags = mci_readl(host, IMR); ++ if (iflags) ++ dev_warn(&mmc->class_dev, "WARNING: IMR=0x%08x\n", ++ mci_readl(host, IMR)); ++ ++ WARN_ON(host->mrq != NULL); ++ host->mrq = mrq; ++ host->pending_events = 0; ++ host->completed_events = 0; ++ ++ iflags = MCI_BIT(CMDRDY); ++ cmdflags = atmci_prepare_command(mmc, mrq->cmd); ++ ++ if (mrq->stop) { ++ WARN_ON(!data); ++ ++ host->stop_cmdr = atmci_prepare_command(mmc, mrq->stop); ++ host->stop_cmdr |= MCI_BF(TRCMD, MCI_TRCMD_STOP_TRANS); ++ if (!(data->flags & MMC_DATA_WRITE)) ++ host->stop_cmdr |= MCI_BIT(TRDIR); ++ if (data->flags & MMC_DATA_STREAM) ++ host->stop_cmdr |= MCI_BF(TRTYP, MCI_TRTYP_STREAM); ++ else ++ host->stop_cmdr |= MCI_BF(TRTYP, MCI_TRTYP_MULTI_BLOCK); ++ } ++ if (data) { ++ cmdflags |= atmci_prepare_data(mmc, data); ++ iflags |= MCI_DATA_ERROR_FLAGS; ++ } ++ ++ atmci_start_command(host, mrq->cmd, cmdflags); ++ mci_writel(host, IER, iflags); ++} ++ ++static void atmci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios) ++{ ++ struct atmel_mci *host = mmc_priv(mmc); ++ u32 mr; ++ ++ if (ios->clock) { ++ u32 clkdiv; ++ ++ /* Set clock rate */ ++ clkdiv = host->bus_hz / (2 * ios->clock) - 1; ++ if (clkdiv > 255) { ++ dev_warn(&mmc->class_dev, ++ "clock %u too slow; using %lu\n", ++ ios->clock, host->bus_hz / (2 * 256)); ++ clkdiv = 255; ++ } ++ ++ mr = mci_readl(host, MR); ++ mr = MCI_BFINS(CLKDIV, clkdiv, mr) ++ | MCI_BIT(WRPROOF) | MCI_BIT(RDPROOF); ++ mci_writel(host, MR, mr); ++ ++ /* Enable the MCI controller */ ++ mci_writel(host, CR, MCI_BIT(MCIEN)); ++ } else { ++ /* Disable the MCI controller */ ++ mci_writel(host, CR, MCI_BIT(MCIDIS)); ++ } ++ ++ switch (ios->bus_width) { ++ case MMC_BUS_WIDTH_1: ++ mci_writel(host, SDCR, 0); ++ break; ++ case MMC_BUS_WIDTH_4: ++ mci_writel(host, SDCR, MCI_BIT(SDCBUS)); ++ break; ++ } ++ ++ switch (ios->power_mode) { ++ case MMC_POWER_ON: ++ /* Send init sequence (74 clock cycles) */ ++ mci_writel(host, IDR, ~0UL); ++ mci_writel(host, CMDR, MCI_BF(SPCMD, MCI_SPCMD_INIT_CMD)); ++ while (!(mci_readl(host, SR) & MCI_BIT(CMDRDY))) ++ cpu_relax(); ++ break; ++ default: ++ /* ++ * TODO: None of the currently available AVR32-based ++ * boards allow MMC power to be turned off. Implement ++ * power control when this can be tested properly. ++ */ ++ break; ++ } ++} ++ ++static int atmci_get_ro(struct mmc_host *mmc) ++{ ++ int read_only = 0; ++ struct atmel_mci *host = mmc_priv(mmc); ++ ++ if (host->wp_pin >= 0) { ++ read_only = gpio_get_value(host->wp_pin); ++ dev_dbg(&mmc->class_dev, "card is %s\n", ++ read_only ? "read-only" : "read-write"); ++ } else { ++ dev_dbg(&mmc->class_dev, ++ "no pin for checking read-only switch." ++ " Assuming write-enable.\n"); ++ } ++ ++ return read_only; ++} ++ ++static struct mmc_host_ops atmci_ops = { ++ .request = atmci_request, ++ .set_ios = atmci_set_ios, ++ .get_ro = atmci_get_ro, ++}; ++ ++static void atmci_request_end(struct mmc_host *mmc, struct mmc_request *mrq) ++{ ++ struct atmel_mci *host = mmc_priv(mmc); ++ ++ WARN_ON(host->cmd || host->data); ++ host->mrq = NULL; ++ ++ mmc_request_done(mmc, mrq); ++} ++ ++static void send_stop_cmd(struct mmc_host *mmc, struct mmc_data *data, ++ u32 flags) ++{ ++ struct atmel_mci *host = mmc_priv(mmc); ++ ++ atmci_start_command(host, data->stop, host->stop_cmdr | flags); ++ mci_writel(host, IER, MCI_BIT(CMDRDY)); ++} ++ ++static void atmci_data_complete(struct atmel_mci *host, struct mmc_data *data) ++{ ++ host->data = NULL; ++ dma_unmap_sg(&host->pdev->dev, data->sg, host->dma.req.nr_sg, ++ ((data->flags & MMC_DATA_WRITE) ++ ? DMA_TO_DEVICE : DMA_FROM_DEVICE)); ++ ++ /* ++ * Data might complete before command for very short transfers ++ * (like READ_SCR) ++ */ ++ if (mci_cmd_is_complete(host) ++ && (!data->stop || mci_stop_is_complete(host))) ++ atmci_request_end(host->mmc, data->mrq); ++} ++ ++static void atmci_command_complete(struct atmel_mci *host, ++ struct mmc_command *cmd, u32 status) ++{ ++ if (status & MCI_BIT(RTOE)) ++ cmd->error = -ETIMEDOUT; ++ else if ((cmd->flags & MMC_RSP_CRC) ++ && (status & MCI_BIT(RCRCE))) ++ cmd->error = -EILSEQ; ++ else if (status & (MCI_BIT(RINDE) | MCI_BIT(RDIRE) | MCI_BIT(RENDE))) ++ cmd->error = -EIO; ++ ++ if (cmd->error) { ++ dev_dbg(&host->mmc->class_dev, ++ "command error: op=0x%x status=0x%08x\n", ++ cmd->opcode, status); ++ ++ if (cmd->data) { ++ dma_stop_request(host->dma.req.req.dmac, ++ host->dma.req.req.channel); ++ mci_writel(host, IDR, MCI_BIT(NOTBUSY) ++ | MCI_DATA_ERROR_FLAGS); ++ host->data = NULL; ++ } ++ } ++} ++ ++static void atmci_tasklet_func(unsigned long priv) ++{ ++ struct mmc_host *mmc = (struct mmc_host *)priv; ++ struct atmel_mci *host = mmc_priv(mmc); ++ struct mmc_request *mrq = host->mrq; ++ struct mmc_data *data = host->data; ++ ++ dev_vdbg(&mmc->class_dev, ++ "tasklet: pending/completed/mask %lx/%lx/%x\n", ++ host->pending_events, host->completed_events, ++ mci_readl(host, IMR)); ++ ++ if (mci_clear_cmd_is_pending(host)) { ++ mci_set_cmd_complete(host); ++ atmci_command_complete(host, mrq->cmd, host->cmd_status); ++ if (!host->data || mci_data_is_complete(host) ++ || mci_data_error_is_complete(host)) ++ atmci_request_end(mmc, mrq); ++ } ++ if (mci_clear_stop_is_pending(host)) { ++ mci_set_stop_complete(host); ++ atmci_command_complete(host, mrq->stop, host->stop_status); ++ if (mci_data_is_complete(host) ++ || mci_data_error_is_complete(host)) ++ atmci_request_end(mmc, mrq); ++ } ++ if (mci_clear_dma_error_is_pending(host)) { ++ mci_set_dma_error_complete(host); ++ mci_clear_data_pending(host); ++ ++ /* DMA controller got bus error => invalid address */ ++ data->error = -EIO; ++ ++ dev_dbg(&mmc->class_dev, "dma error after %u bytes xfered\n", ++ host->data->bytes_xfered); ++ ++ if (data->stop ++ && !mci_set_stop_sent_is_completed(host)) ++ /* TODO: Check if card is still present */ ++ send_stop_cmd(host->mmc, data, 0); ++ ++ atmci_data_complete(host, data); ++ } ++ if (mci_clear_data_error_is_pending(host)) { ++ u32 status = host->data_status; ++ ++ mci_set_data_error_complete(host); ++ mci_clear_data_pending(host); ++ ++ dma_stop_request(host->dma.req.req.dmac, ++ host->dma.req.req.channel); ++ ++ if (status & MCI_BIT(DCRCE)) { ++ dev_dbg(&mmc->class_dev, "data CRC error\n"); ++ data->error = -EILSEQ; ++ } else if (status & MCI_BIT(DTOE)) { ++ dev_dbg(&mmc->class_dev, "data timeout error\n"); ++ data->error = -ETIMEDOUT; ++ } else { ++ dev_dbg(&mmc->class_dev, "data FIFO error\n"); ++ data->error = -EIO; ++ } ++ dev_dbg(&mmc->class_dev, "bytes xfered: %u\n", ++ data->bytes_xfered); ++ ++ if (data->stop ++ && !mci_set_stop_sent_is_completed(host)) ++ /* TODO: Check if card is still present */ ++ send_stop_cmd(host->mmc, data, 0); ++ ++ atmci_data_complete(host, data); ++ } ++ if (mci_clear_data_is_pending(host)) { ++ mci_set_data_complete(host); ++ data->bytes_xfered = data->blocks * data->blksz; ++ atmci_data_complete(host, data); ++ } ++ if (mci_clear_card_detect_is_pending(host)) { ++ /* Reset controller if card is gone */ ++ if (!host->present) { ++ mci_writel(host, CR, MCI_BIT(SWRST)); ++ mci_writel(host, IDR, ~0UL); ++ mci_writel(host, CR, MCI_BIT(MCIEN)); ++ } ++ ++ /* Clean up queue if present */ ++ if (mrq) { ++ if (!mci_cmd_is_complete(host)) ++ mrq->cmd->error = -ETIMEDOUT; ++ if (mrq->data && !mci_data_is_complete(host) ++ && !mci_data_error_is_complete(host)) { ++ dma_stop_request(host->dma.req.req.dmac, ++ host->dma.req.req.channel); ++ host->data->error = -ETIMEDOUT; ++ atmci_data_complete(host, data); ++ } ++ if (mrq->stop && !mci_stop_is_complete(host)) ++ mrq->stop->error = -ETIMEDOUT; ++ ++ host->cmd = NULL; ++ atmci_request_end(mmc, mrq); ++ } ++ mmc_detect_change(host->mmc, msecs_to_jiffies(100)); ++ } ++} ++ ++static void atmci_cmd_interrupt(struct mmc_host *mmc, u32 status) ++{ ++ struct atmel_mci *host = mmc_priv(mmc); ++ struct mmc_command *cmd = host->cmd; ++ ++ /* ++ * Read the response now so that we're free to send a new ++ * command immediately. ++ */ ++ cmd->resp[0] = mci_readl(host, RSPR); ++ cmd->resp[1] = mci_readl(host, RSPR); ++ cmd->resp[2] = mci_readl(host, RSPR); ++ cmd->resp[3] = mci_readl(host, RSPR); ++ ++ mci_writel(host, IDR, MCI_BIT(CMDRDY)); ++ host->cmd = NULL; ++ ++ if (mci_stop_sent_is_complete(host)) { ++ host->stop_status = status; ++ mci_set_stop_pending(host); ++ } else { ++ if (host->mrq->stop && mci_dma_is_complete(host) ++ && !mci_set_stop_sent_is_completed(host)) ++ send_stop_cmd(host->mmc, host->data, 0); ++ host->cmd_status = status; ++ mci_set_cmd_pending(host); ++ } ++ ++ tasklet_schedule(&host->tasklet); ++} ++ ++static void atmci_xfer_complete(struct dma_request *_req) ++{ ++ struct dma_request_sg *req = to_dma_request_sg(_req); ++ struct atmel_mci_dma *dma; ++ struct atmel_mci *host; ++ struct mmc_data *data; ++ ++ dma = container_of(req, struct atmel_mci_dma, req); ++ host = container_of(dma, struct atmel_mci, dma); ++ data = host->data; ++ ++ /* ++ * This callback may be called before we see the CMDRDY ++ * interrupt under heavy irq load (possibly caused by other ++ * drivers) or when interrupts are disabled for a long time. ++ */ ++ mci_set_dma_complete(host); ++ if (data->stop && mci_cmd_is_complete(host) ++ && !mci_set_stop_sent_is_completed(host)) ++ send_stop_cmd(host->mmc, data, 0); ++ ++ /* ++ * Regardless of what the documentation says, we have to wait ++ * for NOTBUSY even after block read operations. ++ * ++ * When the DMA transfer is complete, the controller may still ++ * be reading the CRC from the card, i.e. the data transfer is ++ * still in progress and we haven't seen all the potential ++ * error bits yet. ++ */ ++ mci_writel(host, IER, MCI_BIT(NOTBUSY)); ++} ++ ++static void atmci_dma_error(struct dma_request *_req) ++{ ++ struct dma_request_sg *req = to_dma_request_sg(_req); ++ struct atmel_mci_dma *dma; ++ struct atmel_mci *host; ++ ++ dma = container_of(req, struct atmel_mci_dma, req); ++ host = container_of(dma, struct atmel_mci, dma); ++ ++ mci_writel(host, IDR, (MCI_BIT(NOTBUSY) ++ | MCI_DATA_ERROR_FLAGS)); ++ ++ mci_set_dma_error_pending(host); ++ tasklet_schedule(&host->tasklet); ++} ++ ++static irqreturn_t atmci_interrupt(int irq, void *dev_id) ++{ ++ struct mmc_host *mmc = dev_id; ++ struct atmel_mci *host = mmc_priv(mmc); ++ u32 status, mask, pending; ++ ++ spin_lock(&mmc->lock); ++ ++ status = mci_readl(host, SR); ++ mask = mci_readl(host, IMR); ++ pending = status & mask; ++ ++ do { ++ if (pending & MCI_DATA_ERROR_FLAGS) { ++ mci_writel(host, IDR, (MCI_BIT(NOTBUSY) ++ | MCI_DATA_ERROR_FLAGS)); ++ host->data_status = status; ++ mci_set_data_error_pending(host); ++ tasklet_schedule(&host->tasklet); ++ break; ++ } ++ if (pending & MCI_BIT(CMDRDY)) ++ atmci_cmd_interrupt(mmc, status); ++ if (pending & MCI_BIT(NOTBUSY)) { ++ mci_writel(host, IDR, (MCI_BIT(NOTBUSY) ++ | MCI_DATA_ERROR_FLAGS)); ++ mci_set_data_pending(host); ++ tasklet_schedule(&host->tasklet); ++ } ++ ++ status = mci_readl(host, SR); ++ mask = mci_readl(host, IMR); ++ pending = status & mask; ++ } while (pending); ++ ++ spin_unlock(&mmc->lock); ++ ++ return IRQ_HANDLED; ++} ++ ++static irqreturn_t atmci_detect_change(int irq, void *dev_id) ++{ ++ struct mmc_host *mmc = dev_id; ++ struct atmel_mci *host = mmc_priv(mmc); ++ ++ int present = !gpio_get_value(irq_to_gpio(irq)); ++ ++ if (present != host->present) { ++ dev_dbg(&mmc->class_dev, "card %s\n", ++ present ? "inserted" : "removed"); ++ host->present = present; ++ mci_set_card_detect_pending(host); ++ tasklet_schedule(&host->tasklet); ++ } ++ return IRQ_HANDLED; ++} ++ ++static int __devinit atmci_probe(struct platform_device *pdev) ++{ ++ struct mci_platform_data *board; ++ struct atmel_mci *host; ++ struct mmc_host *mmc; ++ struct resource *regs; ++ int irq; ++ int ret; ++ ++ regs = platform_get_resource(pdev, IORESOURCE_MEM, 0); ++ if (!regs) ++ return -ENXIO; ++ irq = platform_get_irq(pdev, 0); ++ if (irq < 0) ++ return irq; ++ ++ board = pdev->dev.platform_data; ++ ++ mmc = mmc_alloc_host(sizeof(struct atmel_mci), &pdev->dev); ++ if (!mmc) ++ return -ENOMEM; ++ ++ host = mmc_priv(mmc); ++ host->pdev = pdev; ++ host->mmc = mmc; ++ if (board) { ++ host->detect_pin = board->detect_pin; ++ host->wp_pin = board->wp_pin; ++ } else { ++ host->detect_pin = -1; ++ host->detect_pin = -1; ++ } ++ ++ host->mck = clk_get(&pdev->dev, "mci_clk"); ++ if (IS_ERR(host->mck)) { ++ ret = PTR_ERR(host->mck); ++ goto out_free_host; ++ } ++ clk_enable(host->mck); ++ ++ ret = -ENOMEM; ++ host->regs = ioremap(regs->start, regs->end - regs->start + 1); ++ if (!host->regs) ++ goto out_disable_clk; ++ ++ host->bus_hz = clk_get_rate(host->mck); ++ host->mapbase = regs->start; ++ ++ mmc->ops = &atmci_ops; ++ mmc->f_min = (host->bus_hz + 511) / 512; ++ mmc->f_max = min((unsigned int)(host->bus_hz / 2), fmax); ++ mmc->ocr_avail = MMC_VDD_32_33 | MMC_VDD_33_34; ++ mmc->caps |= MMC_CAP_4_BIT_DATA; ++ ++ tasklet_init(&host->tasklet, atmci_tasklet_func, (unsigned long)mmc); ++ ++ ret = request_irq(irq, atmci_interrupt, 0, "mmci", mmc); ++ if (ret) ++ goto out_unmap; ++ ++ /* Assume card is present if we don't have a detect pin */ ++ host->present = 1; ++ if (host->detect_pin >= 0) { ++ if (gpio_request(host->detect_pin, "mmc_detect")) { ++ dev_dbg(&mmc->class_dev, "no detect pin available\n"); ++ host->detect_pin = -1; ++ } else { ++ host->present = !gpio_get_value(host->detect_pin); ++ } ++ } ++ if (host->wp_pin >= 0) { ++ if (gpio_request(host->wp_pin, "mmc_wp")) { ++ dev_dbg(&mmc->class_dev, "no WP pin available\n"); ++ host->wp_pin = -1; ++ } ++ } ++ ++ /* TODO: Get this information from platform data */ ++ ret = -ENOMEM; ++ host->dma.req.req.dmac = find_dma_controller(0); ++ if (!host->dma.req.req.dmac) { ++ dev_dbg(&mmc->class_dev, "no DMA controller available\n"); ++ goto out_free_irq; ++ } ++ ret = dma_alloc_channel(host->dma.req.req.dmac); ++ if (ret < 0) { ++ dev_dbg(&mmc->class_dev, "unable to allocate DMA channel\n"); ++ goto out_free_irq; ++ } ++ host->dma.req.req.channel = ret; ++ host->dma.req.width = DMA_WIDTH_32BIT; ++ host->dma.req.req.xfer_complete = atmci_xfer_complete; ++ host->dma.req.req.block_complete = NULL; // atmci_block_complete; ++ host->dma.req.req.error = atmci_dma_error; ++ host->dma.rx_periph_id = 0; ++ host->dma.tx_periph_id = 1; ++ ++ mci_writel(host, CR, MCI_BIT(SWRST)); ++ mci_writel(host, IDR, ~0UL); ++ ++ platform_set_drvdata(pdev, host); ++ ++ mmc_add_host(mmc); ++ ++ if (host->detect_pin >= 0) { ++ ret = request_irq(gpio_to_irq(host->detect_pin), ++ atmci_detect_change, ++ IRQF_TRIGGER_FALLING | IRQF_TRIGGER_RISING, ++ DRIVER_NAME, mmc); ++ if (ret) { ++ dev_dbg(&mmc->class_dev, ++ "could not request IRQ %d for detect pin\n", ++ gpio_to_irq(host->detect_pin)); ++ gpio_free(host->detect_pin); ++ host->detect_pin = -1; ++ } ++ } ++ ++ dev_info(&mmc->class_dev, "Atmel MCI controller at 0x%08lx irq %d\n", ++ host->mapbase, irq); ++ ++ atmci_init_debugfs(host); ++ ++ return 0; ++ ++out_free_irq: ++ if (host->detect_pin >= 0) ++ gpio_free(host->detect_pin); ++ if (host->wp_pin >= 0) ++ gpio_free(host->wp_pin); ++ free_irq(irq, mmc); ++out_unmap: ++ iounmap(host->regs); ++out_disable_clk: ++ clk_disable(host->mck); ++ clk_put(host->mck); ++out_free_host: ++ mmc_free_host(mmc); ++ return ret; ++} ++ ++static int __devexit atmci_remove(struct platform_device *pdev) ++{ ++ struct atmel_mci *host = platform_get_drvdata(pdev); ++ ++ platform_set_drvdata(pdev, NULL); ++ ++ if (host) { ++ atmci_cleanup_debugfs(host); ++ ++ if (host->detect_pin >= 0) { ++ free_irq(gpio_to_irq(host->detect_pin), host->mmc); ++ cancel_delayed_work(&host->mmc->detect); ++ gpio_free(host->detect_pin); ++ } ++ ++ mmc_remove_host(host->mmc); ++ ++ mci_writel(host, IDR, ~0UL); ++ mci_writel(host, CR, MCI_BIT(MCIDIS)); ++ mci_readl(host, SR); ++ ++ dma_release_channel(host->dma.req.req.dmac, ++ host->dma.req.req.channel); ++ ++ if (host->wp_pin >= 0) ++ gpio_free(host->wp_pin); ++ ++ free_irq(platform_get_irq(pdev, 0), host->mmc); ++ iounmap(host->regs); ++ ++ clk_disable(host->mck); ++ clk_put(host->mck); ++ ++ mmc_free_host(host->mmc); ++ } ++ return 0; ++} ++ ++static struct platform_driver atmci_driver = { ++ .probe = atmci_probe, ++ .remove = __devexit_p(atmci_remove), ++ .driver = { ++ .name = DRIVER_NAME, ++ }, ++}; ++ ++static int __init atmci_init(void) ++{ ++ return platform_driver_register(&atmci_driver); ++} ++ ++static void __exit atmci_exit(void) ++{ ++ platform_driver_unregister(&atmci_driver); ++} ++ ++module_init(atmci_init); ++module_exit(atmci_exit); ++ ++MODULE_DESCRIPTION("Atmel Multimedia Card Interface driver"); ++MODULE_LICENSE("GPL"); +diff -Nrup linux-2.6.24/drivers/mmc/host/atmel-mci.h linux-avr32/drivers/mmc/host/atmel-mci.h +--- linux-2.6.24/drivers/mmc/host/atmel-mci.h 1969-12-31 19:00:00.000000000 -0500 ++++ linux-avr32/drivers/mmc/host/atmel-mci.h 2008-02-01 14:51:39.000000000 -0500 +@@ -0,0 +1,192 @@ ++/* ++ * Atmel MultiMedia Card Interface driver ++ * ++ * Copyright (C) 2004-2006 Atmel Corporation ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation. ++ */ ++#ifndef __DRIVERS_MMC_ATMEL_MCI_H__ ++#define __DRIVERS_MMC_ATMEL_MCI_H__ ++ ++/* MCI register offsets */ ++#define MCI_CR 0x0000 ++#define MCI_MR 0x0004 ++#define MCI_DTOR 0x0008 ++#define MCI_SDCR 0x000c ++#define MCI_ARGR 0x0010 ++#define MCI_CMDR 0x0014 ++#define MCI_BLKR 0x0018 ++#define MCI_RSPR 0x0020 ++#define MCI_RSPR1 0x0024 ++#define MCI_RSPR2 0x0028 ++#define MCI_RSPR3 0x002c ++#define MCI_RDR 0x0030 ++#define MCI_TDR 0x0034 ++#define MCI_SR 0x0040 ++#define MCI_IER 0x0044 ++#define MCI_IDR 0x0048 ++#define MCI_IMR 0x004c ++ ++/* Bitfields in CR */ ++#define MCI_MCIEN_OFFSET 0 ++#define MCI_MCIEN_SIZE 1 ++#define MCI_MCIDIS_OFFSET 1 ++#define MCI_MCIDIS_SIZE 1 ++#define MCI_PWSEN_OFFSET 2 ++#define MCI_PWSEN_SIZE 1 ++#define MCI_PWSDIS_OFFSET 3 ++#define MCI_PWSDIS_SIZE 1 ++#define MCI_SWRST_OFFSET 7 ++#define MCI_SWRST_SIZE 1 ++ ++/* Bitfields in MR */ ++#define MCI_CLKDIV_OFFSET 0 ++#define MCI_CLKDIV_SIZE 8 ++#define MCI_PWSDIV_OFFSET 8 ++#define MCI_PWSDIV_SIZE 3 ++#define MCI_RDPROOF_OFFSET 11 ++#define MCI_RDPROOF_SIZE 1 ++#define MCI_WRPROOF_OFFSET 12 ++#define MCI_WRPROOF_SIZE 1 ++#define MCI_DMAPADV_OFFSET 14 ++#define MCI_DMAPADV_SIZE 1 ++#define MCI_BLKLEN_OFFSET 16 ++#define MCI_BLKLEN_SIZE 16 ++ ++/* Bitfields in DTOR */ ++#define MCI_DTOCYC_OFFSET 0 ++#define MCI_DTOCYC_SIZE 4 ++#define MCI_DTOMUL_OFFSET 4 ++#define MCI_DTOMUL_SIZE 3 ++ ++/* Bitfields in SDCR */ ++#define MCI_SDCSEL_OFFSET 0 ++#define MCI_SDCSEL_SIZE 4 ++#define MCI_SDCBUS_OFFSET 7 ++#define MCI_SDCBUS_SIZE 1 ++ ++/* Bitfields in ARGR */ ++#define MCI_ARG_OFFSET 0 ++#define MCI_ARG_SIZE 32 ++ ++/* Bitfields in CMDR */ ++#define MCI_CMDNB_OFFSET 0 ++#define MCI_CMDNB_SIZE 6 ++#define MCI_RSPTYP_OFFSET 6 ++#define MCI_RSPTYP_SIZE 2 ++#define MCI_SPCMD_OFFSET 8 ++#define MCI_SPCMD_SIZE 3 ++#define MCI_OPDCMD_OFFSET 11 ++#define MCI_OPDCMD_SIZE 1 ++#define MCI_MAXLAT_OFFSET 12 ++#define MCI_MAXLAT_SIZE 1 ++#define MCI_TRCMD_OFFSET 16 ++#define MCI_TRCMD_SIZE 2 ++#define MCI_TRDIR_OFFSET 18 ++#define MCI_TRDIR_SIZE 1 ++#define MCI_TRTYP_OFFSET 19 ++#define MCI_TRTYP_SIZE 2 ++ ++/* Bitfields in BLKR */ ++#define MCI_BCNT_OFFSET 0 ++#define MCI_BCNT_SIZE 16 ++ ++/* Bitfields in RSPRn */ ++#define MCI_RSP_OFFSET 0 ++#define MCI_RSP_SIZE 32 ++ ++/* Bitfields in SR/IER/IDR/IMR */ ++#define MCI_CMDRDY_OFFSET 0 ++#define MCI_CMDRDY_SIZE 1 ++#define MCI_RXRDY_OFFSET 1 ++#define MCI_RXRDY_SIZE 1 ++#define MCI_TXRDY_OFFSET 2 ++#define MCI_TXRDY_SIZE 1 ++#define MCI_BLKE_OFFSET 3 ++#define MCI_BLKE_SIZE 1 ++#define MCI_DTIP_OFFSET 4 ++#define MCI_DTIP_SIZE 1 ++#define MCI_NOTBUSY_OFFSET 5 ++#define MCI_NOTBUSY_SIZE 1 ++#define MCI_ENDRX_OFFSET 6 ++#define MCI_ENDRX_SIZE 1 ++#define MCI_ENDTX_OFFSET 7 ++#define MCI_ENDTX_SIZE 1 ++#define MCI_RXBUFF_OFFSET 14 ++#define MCI_RXBUFF_SIZE 1 ++#define MCI_TXBUFE_OFFSET 15 ++#define MCI_TXBUFE_SIZE 1 ++#define MCI_RINDE_OFFSET 16 ++#define MCI_RINDE_SIZE 1 ++#define MCI_RDIRE_OFFSET 17 ++#define MCI_RDIRE_SIZE 1 ++#define MCI_RCRCE_OFFSET 18 ++#define MCI_RCRCE_SIZE 1 ++#define MCI_RENDE_OFFSET 19 ++#define MCI_RENDE_SIZE 1 ++#define MCI_RTOE_OFFSET 20 ++#define MCI_RTOE_SIZE 1 ++#define MCI_DCRCE_OFFSET 21 ++#define MCI_DCRCE_SIZE 1 ++#define MCI_DTOE_OFFSET 22 ++#define MCI_DTOE_SIZE 1 ++#define MCI_OVRE_OFFSET 30 ++#define MCI_OVRE_SIZE 1 ++#define MCI_UNRE_OFFSET 31 ++#define MCI_UNRE_SIZE 1 ++ ++/* Constants for DTOMUL */ ++#define MCI_DTOMUL_1_CYCLE 0 ++#define MCI_DTOMUL_16_CYCLES 1 ++#define MCI_DTOMUL_128_CYCLES 2 ++#define MCI_DTOMUL_256_CYCLES 3 ++#define MCI_DTOMUL_1024_CYCLES 4 ++#define MCI_DTOMUL_4096_CYCLES 5 ++#define MCI_DTOMUL_65536_CYCLES 6 ++#define MCI_DTOMUL_1048576_CYCLES 7 ++ ++/* Constants for RSPTYP */ ++#define MCI_RSPTYP_NO_RESP 0 ++#define MCI_RSPTYP_48_BIT 1 ++#define MCI_RSPTYP_136_BIT 2 ++ ++/* Constants for SPCMD */ ++#define MCI_SPCMD_NO_SPEC_CMD 0 ++#define MCI_SPCMD_INIT_CMD 1 ++#define MCI_SPCMD_SYNC_CMD 2 ++#define MCI_SPCMD_INT_CMD 4 ++#define MCI_SPCMD_INT_RESP 5 ++ ++/* Constants for TRCMD */ ++#define MCI_TRCMD_NO_TRANS 0 ++#define MCI_TRCMD_START_TRANS 1 ++#define MCI_TRCMD_STOP_TRANS 2 ++ ++/* Constants for TRTYP */ ++#define MCI_TRTYP_BLOCK 0 ++#define MCI_TRTYP_MULTI_BLOCK 1 ++#define MCI_TRTYP_STREAM 2 ++ ++/* Bit manipulation macros */ ++#define MCI_BIT(name) \ ++ (1 << MCI_##name##_OFFSET) ++#define MCI_BF(name,value) \ ++ (((value) & ((1 << MCI_##name##_SIZE) - 1)) \ ++ << MCI_##name##_OFFSET) ++#define MCI_BFEXT(name,value) \ ++ (((value) >> MCI_##name##_OFFSET) \ ++ & ((1 << MCI_##name##_SIZE) - 1)) ++#define MCI_BFINS(name,value,old) \ ++ (((old) & ~(((1 << MCI_##name##_SIZE) - 1) \ ++ << MCI_##name##_OFFSET)) \ ++ | MCI_BF(name,value)) ++ ++/* Register access macros */ ++#define mci_readl(port,reg) \ ++ __raw_readl((port)->regs + MCI_##reg) ++#define mci_writel(port,reg,value) \ ++ __raw_writel((value), (port)->regs + MCI_##reg) ++ ++#endif /* __DRIVERS_MMC_ATMEL_MCI_H__ */ +diff -Nrup linux-2.6.24/drivers/mmc/host/Kconfig linux-avr32/drivers/mmc/host/Kconfig +--- linux-2.6.24/drivers/mmc/host/Kconfig 2008-01-24 17:58:37.000000000 -0500 ++++ linux-avr32/drivers/mmc/host/Kconfig 2008-02-01 14:51:39.000000000 -0500 +@@ -91,6 +91,16 @@ config MMC_AT91 + + If unsure, say N. + ++config MMC_ATMELMCI ++ tristate "Atmel Multimedia Card Interface support" ++ depends on AVR32 && MMC ++ help ++ This selects the Atmel Multimedia Card Interface. If you have ++ a AT91 (ARM) or AT32 (AVR32) platform with a Multimedia Card ++ slot, say Y or M here. ++ ++ If unsure, say N. ++ + config MMC_IMX + tristate "Motorola i.MX Multimedia Card Interface support" + depends on ARCH_IMX +diff -Nrup linux-2.6.24/drivers/mmc/host/Makefile linux-avr32/drivers/mmc/host/Makefile +--- linux-2.6.24/drivers/mmc/host/Makefile 2008-01-24 17:58:37.000000000 -0500 ++++ linux-avr32/drivers/mmc/host/Makefile 2008-02-01 14:51:39.000000000 -0500 +@@ -15,6 +15,7 @@ obj-$(CONFIG_MMC_WBSD) += wbsd.o + obj-$(CONFIG_MMC_AU1X) += au1xmmc.o + obj-$(CONFIG_MMC_OMAP) += omap.o + obj-$(CONFIG_MMC_AT91) += at91_mci.o ++obj-$(CONFIG_MMC_ATMELMCI) += atmel-mci.o + obj-$(CONFIG_MMC_TIFM_SD) += tifm_sd.o + obj-$(CONFIG_MMC_SPI) += mmc_spi.o + +diff -Nrup linux-2.6.24/drivers/mtd/chips/cfi_cmdset_0001.c linux-avr32/drivers/mtd/chips/cfi_cmdset_0001.c +--- linux-2.6.24/drivers/mtd/chips/cfi_cmdset_0001.c 2008-01-24 17:58:37.000000000 -0500 ++++ linux-avr32/drivers/mtd/chips/cfi_cmdset_0001.c 2008-02-01 14:51:39.000000000 -0500 +@@ -50,6 +50,7 @@ + #define I82802AC 0x00ac + #define MANUFACTURER_ST 0x0020 + #define M50LPW080 0x002F ++#define AT49BV640D 0x02de + + static int cfi_intelext_read (struct mtd_info *, loff_t, size_t, size_t *, u_char *); + static int cfi_intelext_write_words(struct mtd_info *, loff_t, size_t, size_t *, const u_char *); +@@ -157,6 +158,47 @@ static void cfi_tell_features(struct cfi + } + #endif + ++/* Atmel chips don't use the same PRI format as Intel chips */ ++static void fixup_convert_atmel_pri(struct mtd_info *mtd, void *param) ++{ ++ struct map_info *map = mtd->priv; ++ struct cfi_private *cfi = map->fldrv_priv; ++ struct cfi_pri_intelext *extp = cfi->cmdset_priv; ++ struct cfi_pri_atmel atmel_pri; ++ uint32_t features = 0; ++ ++ /* Reverse byteswapping */ ++ extp->FeatureSupport = cpu_to_le32(extp->FeatureSupport); ++ extp->BlkStatusRegMask = cpu_to_le16(extp->BlkStatusRegMask); ++ extp->ProtRegAddr = cpu_to_le16(extp->ProtRegAddr); ++ ++ memcpy(&atmel_pri, extp, sizeof(atmel_pri)); ++ memset((char *)extp + 5, 0, sizeof(*extp) - 5); ++ ++ printk(KERN_ERR "atmel Features: %02x\n", atmel_pri.Features); ++ ++ if (atmel_pri.Features & 0x01) /* chip erase supported */ ++ features |= (1<<0); ++ if (atmel_pri.Features & 0x02) /* erase suspend supported */ ++ features |= (1<<1); ++ if (atmel_pri.Features & 0x04) /* program suspend supported */ ++ features |= (1<<2); ++ if (atmel_pri.Features & 0x08) /* simultaneous operations supported */ ++ features |= (1<<9); ++ if (atmel_pri.Features & 0x20) /* page mode read supported */ ++ features |= (1<<7); ++ if (atmel_pri.Features & 0x40) /* queued erase supported */ ++ features |= (1<<4); ++ if (atmel_pri.Features & 0x80) /* Protection bits supported */ ++ features |= (1<<6); ++ ++ extp->FeatureSupport = features; ++ ++ /* burst write mode not supported */ ++ cfi->cfiq->BufWriteTimeoutTyp = 0; ++ cfi->cfiq->BufWriteTimeoutMax = 0; ++} ++ + #ifdef CMDSET0001_DISABLE_ERASE_SUSPEND_ON_WRITE + /* Some Intel Strata Flash prior to FPO revision C has bugs in this area */ + static void fixup_intel_strataflash(struct mtd_info *mtd, void* param) +@@ -234,6 +276,7 @@ static void fixup_use_powerup_lock(struc + } + + static struct cfi_fixup cfi_fixup_table[] = { ++ { CFI_MFR_ATMEL, CFI_ID_ANY, fixup_convert_atmel_pri, NULL }, + #ifdef CMDSET0001_DISABLE_ERASE_SUSPEND_ON_WRITE + { CFI_MFR_ANY, CFI_ID_ANY, fixup_intel_strataflash, NULL }, + #endif +diff -Nrup linux-2.6.24/drivers/mtd/chips/cfi_cmdset_0002.c linux-avr32/drivers/mtd/chips/cfi_cmdset_0002.c +--- linux-2.6.24/drivers/mtd/chips/cfi_cmdset_0002.c 2008-01-24 17:58:37.000000000 -0500 ++++ linux-avr32/drivers/mtd/chips/cfi_cmdset_0002.c 2008-02-01 14:51:39.000000000 -0500 +@@ -185,6 +185,10 @@ static void fixup_convert_atmel_pri(stru + extp->TopBottom = 2; + else + extp->TopBottom = 3; ++ ++ /* burst write mode not supported */ ++ cfi->cfiq->BufWriteTimeoutTyp = 0; ++ cfi->cfiq->BufWriteTimeoutMax = 0; + } + + static void fixup_use_secsi(struct mtd_info *mtd, void *param) +@@ -217,6 +221,7 @@ static void fixup_use_atmel_lock(struct + } + + static struct cfi_fixup cfi_fixup_table[] = { ++ { CFI_MFR_ATMEL, CFI_ID_ANY, fixup_convert_atmel_pri, NULL }, + #ifdef AMD_BOOTLOC_BUG + { CFI_MFR_AMD, CFI_ID_ANY, fixup_amd_bootblock, NULL }, + #endif +@@ -229,7 +234,6 @@ static struct cfi_fixup cfi_fixup_table[ + #if !FORCE_WORD_WRITE + { CFI_MFR_ANY, CFI_ID_ANY, fixup_use_write_buffers, NULL, }, + #endif +- { CFI_MFR_ATMEL, CFI_ID_ANY, fixup_convert_atmel_pri, NULL }, + { 0, 0, NULL, NULL } + }; + static struct cfi_fixup jedec_fixup_table[] = { +diff -Nrup linux-2.6.24/drivers/pcmcia/at32_cf.c linux-avr32/drivers/pcmcia/at32_cf.c +--- linux-2.6.24/drivers/pcmcia/at32_cf.c 1969-12-31 19:00:00.000000000 -0500 ++++ linux-avr32/drivers/pcmcia/at32_cf.c 2008-02-01 14:51:42.000000000 -0500 +@@ -0,0 +1,533 @@ ++/* ++ * Driver for AVR32 Static Memory Controller: CompactFlash support ++ * ++ * Copyright (C) 2006 Atmel Norway ++ * ++ * This program is free software; you can redistribute it and/or ++ * modify it under the terms of the GNU General Public License as ++ * published by the Free Software Foundation; either version 2 of the ++ * License, or (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, but ++ * WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++ * General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not, write to the Free Software ++ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA ++ * 02111-1307, USA. ++ * ++ * The full GNU General Public License is included in this ++ * distribution in the file called COPYING. ++ */ ++#include <linux/module.h> ++#include <linux/kernel.h> ++#include <linux/platform_device.h> ++#include <linux/init.h> ++#include <linux/device.h> ++#include <linux/delay.h> ++#include <linux/interrupt.h> ++#include <linux/err.h> ++#include <linux/clk.h> ++#include <linux/dma-mapping.h> ++ ++#include <pcmcia/ss.h> ++ ++#include <asm/gpio.h> ++#include <asm/io.h> ++#include <asm/arch/board.h> ++ ++#include <asm/arch/smc.h> ++ ++struct at32_cf_socket { ++ struct pcmcia_socket socket; ++ int detect_pin; ++ int reset_pin; ++ int vcc_pin; ++ int ready_pin; ++ struct resource res_attr; ++ struct resource res_mem; ++ struct resource res_io; ++ struct smc_config smc; ++ unsigned int irq; ++ unsigned int cf_cs; ++ socket_state_t state; ++ unsigned present:1; ++}; ++#define to_at32_cf(sock) container_of(sock, struct at32_cf_socket, socket) ++ ++/* ++ * We have the following memory layout relative to the base address: ++ * ++ * Alt IDE Mode: 00e0 0000 -> 00ff ffff ++ * True IDE Mode: 00c0 0000 -> 00df ffff ++ * I/O memory: 0080 0000 -> 00bf ffff ++ * Common memory: 0040 0000 -> 007f ffff ++ * Attribute memory: 0000 0000 -> 003f ffff ++ */ ++#define CF_ATTR_OFFSET 0x00000000 ++#define CF_MEM_OFFSET 0x00400000 ++#define CF_IO_OFFSET 0x00800000 ++#define CF_RES_SIZE 4096 ++ ++#ifdef DEBUG ++ ++static int pc_debug; ++module_param(pc_debug, int, 0644); ++ ++static void at32_cf_debug(struct at32_cf_socket *cf, const char *func, ++ int level, const char *fmt, ...) ++{ ++ va_list args; ++ ++ if (pc_debug > level) { ++ printk(KERN_DEBUG "at32_cf/%u: %s: ", cf->cf_cs, func); ++ va_start(args, fmt); ++ vprintk(fmt, args); ++ va_end(args); ++ } ++} ++ ++#define debug(cf, lvl, fmt, arg...) \ ++ at32_cf_debug(cf, __func__, lvl, fmt, ##arg) ++ ++#else ++#define debug(cf, lvl, fmt, arg...) do { } while (0) ++#endif ++ ++static inline int at32_cf_present(struct at32_cf_socket *cf) ++{ ++ int present = 1; ++ ++ /* If we don't have a detect pin, assume the card is present */ ++ if (cf->detect_pin >= 0) ++ present = !gpio_get_value(cf->detect_pin); ++ ++ return present; ++} ++ ++static irqreturn_t at32_cf_irq(int irq, void *dev_id) ++{ ++ struct at32_cf_socket *cf = dev_id; ++ unsigned int present; ++ ++ present = at32_cf_present(cf); ++ if (present != cf->present) { ++ cf->present = present; ++ debug(cf, 3, "card %s\n", present ? "present" : "gone"); ++ pcmcia_parse_events(&cf->socket, SS_DETECT); ++ } ++ ++ return IRQ_HANDLED; ++} ++ ++static int at32_cf_get_status(struct pcmcia_socket *sock, u_int *value) ++{ ++ struct at32_cf_socket *cf; ++ u_int status = 0; ++ ++ cf = container_of(sock, struct at32_cf_socket, socket); ++ ++ if (at32_cf_present(cf)) { ++ /* NOTE: gpio on AP7xxx is 3.3V */ ++ status = SS_DETECT | SS_3VCARD; ++ if (cf->ready_pin < 0 || gpio_get_value(cf->ready_pin)) ++ status |= SS_READY; ++ if (cf->vcc_pin < 0 || gpio_get_value(cf->vcc_pin)) ++ status |= SS_POWERON; ++ } ++ ++ *value = status; ++ return 0; ++} ++ ++static int at32_cf_set_socket(struct pcmcia_socket *sock, socket_state_t *state) ++{ ++ struct at32_cf_socket *cf = container_of(sock, struct at32_cf_socket, socket); ++ ++ debug(cf, 2, "mask: %s%s%s%s%s%sflags: %s%s%s%s%s%sVcc %d Vpp %d irq %d\n", ++ (state->csc_mask==0)?"<NONE> ":"", ++ (state->csc_mask&SS_DETECT)?"DETECT ":"", ++ (state->csc_mask&SS_READY)?"READY ":"", ++ (state->csc_mask&SS_BATDEAD)?"BATDEAD ":"", ++ (state->csc_mask&SS_BATWARN)?"BATWARN ":"", ++ (state->csc_mask&SS_STSCHG)?"STSCHG ":"", ++ (state->flags==0)?"<NONE> ":"", ++ (state->flags&SS_PWR_AUTO)?"PWR_AUTO ":"", ++ (state->flags&SS_IOCARD)?"IOCARD ":"", ++ (state->flags&SS_RESET)?"RESET ":"", ++ (state->flags&SS_SPKR_ENA)?"SPKR_ENA ":"", ++ (state->flags&SS_OUTPUT_ENA)?"OUTPUT_ENA ":"", ++ state->Vcc, state->Vpp, state->io_irq); ++ ++ /* ++ * TODO: Allow boards to override this in case they have level ++ * converters. ++ */ ++ switch (state->Vcc) { ++ case 0: ++ if (cf->vcc_pin >= 0) ++ gpio_set_value(cf->vcc_pin, 0); ++ break; ++ case 33: ++ if (cf->vcc_pin >= 0) ++ gpio_set_value(cf->vcc_pin, 1); ++ break; ++ default: ++ return -EINVAL; ++ } ++ ++ if (cf->reset_pin >= 0) ++ gpio_set_value(cf->reset_pin, state->flags & SS_RESET); ++ ++ cf->state = *state; ++ ++ return 0; ++} ++ ++static int at32_cf_socket_init(struct pcmcia_socket *sock) ++{ ++ debug(to_at32_cf(sock), 2, "called\n"); ++ ++ return 0; ++} ++ ++static int at32_cf_suspend(struct pcmcia_socket *sock) ++{ ++ debug(to_at32_cf(sock), 2, "called\n"); ++ ++ at32_cf_set_socket(sock, &dead_socket); ++ ++ return 0; ++} ++ ++static int at32_cf_set_io_map(struct pcmcia_socket *sock, ++ struct pccard_io_map *map) ++{ ++ struct at32_cf_socket *cf = container_of(sock, struct at32_cf_socket, socket); ++ int retval; ++ ++ debug(cf, 2, "map %u speed %u start 0x%08x stop 0x%08x\n", ++ map->map, map->speed, map->start, map->stop); ++ debug(cf, 2, "flags: %s%s%s%s%s%s%s%s\n", ++ (map->flags == 0) ? "<NONE>":"", ++ (map->flags & MAP_ACTIVE) ? "ACTIVE " : "", ++ (map->flags & MAP_16BIT) ? "16BIT " : "", ++ (map->flags & MAP_AUTOSZ) ? "AUTOSZ " : "", ++ (map->flags & MAP_0WS) ? "0WS " : "", ++ (map->flags & MAP_WRPROT) ? "WRPROT " : "", ++ (map->flags & MAP_USE_WAIT) ? "USE_WAIT " : "", ++ (map->flags & MAP_PREFETCH) ? "PREFETCH " : ""); ++ ++ map->flags &= MAP_ACTIVE | MAP_16BIT | MAP_USE_WAIT; ++ ++ if (map->flags & MAP_16BIT) ++ cf->smc.bus_width = 2; ++ else ++ cf->smc.bus_width = 1; ++ ++ if (map->flags & MAP_USE_WAIT) ++ cf->smc.nwait_mode = 3; ++ else ++ cf->smc.nwait_mode = 0; ++ ++ retval = smc_set_configuration(cf->cf_cs, &cf->smc); ++ if (retval) { ++ printk(KERN_ERR "at32_cf: could not set up SMC for I/O\n"); ++ return retval; ++ } ++ ++ map->start = cf->socket.io_offset; ++ map->stop = map->start + CF_RES_SIZE - 1; ++ ++ return 0; ++} ++ ++static int ++at32_cf_set_mem_map(struct pcmcia_socket *sock, struct pccard_mem_map *map) ++{ ++ struct at32_cf_socket *cf; ++ struct resource *res; ++ int retval; ++ ++ cf = container_of(sock, struct at32_cf_socket, socket); ++ ++ debug(cf, 2, "map %u speed %u card_start %08x\n", ++ map->map, map->speed, map->card_start); ++ debug(cf, 2, "flags: %s%s%s%s%s%s%s%s\n", ++ (map->flags==0)?"<NONE>":"", ++ (map->flags&MAP_ACTIVE)?"ACTIVE ":"", ++ (map->flags&MAP_16BIT)?"16BIT ":"", ++ (map->flags&MAP_AUTOSZ)?"AUTOSZ ":"", ++ (map->flags&MAP_0WS)?"0WS ":"", ++ (map->flags&MAP_WRPROT)?"WRPROT ":"", ++ (map->flags&MAP_ATTRIB)?"ATTRIB ":"", ++ (map->flags&MAP_USE_WAIT)?"USE_WAIT ":""); ++ ++ if (map->card_start) ++ return -EINVAL; ++ ++ map->flags &= MAP_ACTIVE | MAP_ATTRIB | MAP_16BIT | MAP_USE_WAIT; ++ ++ if (map->flags & MAP_ATTRIB) { ++ res = &cf->res_attr; ++ ++ /* Linksys WCF12 seems to use WAIT when reading CIS */ ++ map->flags |= MAP_USE_WAIT; ++ } else { ++ res = &cf->res_mem; ++ } ++ ++ if (map->flags & MAP_USE_WAIT) ++ cf->smc.nwait_mode = 3; ++ else ++ cf->smc.nwait_mode = 0; ++ ++ retval = smc_set_configuration(cf->cf_cs, &cf->smc); ++ if (retval) { ++ printk(KERN_ERR "at32_cf: could not set up SMC for mem\n"); ++ return retval; ++ } ++ ++ map->static_start = res->start; ++ ++ return 0; ++} ++ ++static struct pccard_operations at32_cf_ops = { ++ .init = at32_cf_socket_init, ++ .suspend = at32_cf_suspend, ++ .get_status = at32_cf_get_status, ++ .set_socket = at32_cf_set_socket, ++ .set_io_map = at32_cf_set_io_map, ++ .set_mem_map = at32_cf_set_mem_map, ++}; ++ ++static int __init request_pin(struct platform_device *pdev, ++ unsigned int pin, const char *name) ++{ ++ if (gpio_request(pin, name)) { ++ dev_warn(&pdev->dev, "failed to request %s pin\n", name); ++ return -1; ++ } ++ ++ return pin; ++} ++ ++static struct smc_timing at32_cf_timing __initdata = { ++ .ncs_read_setup = 30, ++ .nrd_setup = 100, ++ .ncs_write_setup = 30, ++ .nwe_setup = 100, ++ ++ .ncs_read_pulse = 360, ++ .nrd_pulse = 290, ++ .ncs_write_pulse = 360, ++ .nwe_pulse = 290, ++ ++ .read_cycle = 420, ++ .write_cycle = 420, ++}; ++ ++static int __init at32_cf_probe(struct platform_device *pdev) ++{ ++ struct at32_cf_socket *cf; ++ struct cf_platform_data *board = pdev->dev.platform_data; ++ struct resource *res_skt; ++ int irq; ++ int ret; ++ ++ dev_dbg(&pdev->dev, "probe"); ++ ++ if (!board) ++ return -ENXIO; ++ ++ res_skt = platform_get_resource(pdev, IORESOURCE_MEM, 0); ++ if (!res_skt) ++ return -ENXIO; ++ ++ irq = platform_get_irq(pdev, 0); ++ if (irq < 0) ++ return irq; ++ ++ cf = kzalloc(sizeof(struct at32_cf_socket), GFP_KERNEL); ++ if (!cf) ++ return -ENOMEM; ++ ++ cf->detect_pin = -1; ++ cf->reset_pin = -1; ++ cf->vcc_pin = -1; ++ cf->ready_pin = -1; ++ cf->cf_cs = board->cs; ++ ++ if (board->detect_pin != GPIO_PIN_NONE) ++ cf->detect_pin = request_pin(pdev, board->detect_pin, ++ "cf_detect"); ++ if (board->reset_pin != GPIO_PIN_NONE) ++ cf->reset_pin = request_pin(pdev, board->reset_pin, ++ "cf_reset"); ++ if (board->vcc_pin != GPIO_PIN_NONE) ++ cf->vcc_pin = request_pin(pdev, board->vcc_pin, ++ "cf_vcc"); ++ if (board->ready_pin != GPIO_PIN_NONE) ++ /* READY is also used for irq through EIM */ ++ cf->ready_pin = board->ready_pin; ++ ++ debug(cf, 2, "pins: detect=%d reset=%d vcc=%d\n", ++ cf->detect_pin, cf->reset_pin, cf->vcc_pin); ++ ++ cf->socket.pci_irq = irq; ++ cf->socket.ops = &at32_cf_ops; ++ cf->socket.resource_ops = &pccard_static_ops; ++ cf->socket.dev.parent = &pdev->dev; ++ cf->socket.owner = THIS_MODULE; ++ cf->socket.features = ++ SS_CAP_MEM_ALIGN | SS_CAP_STATIC_MAP | SS_CAP_PCCARD; ++ cf->socket.map_size = CF_RES_SIZE; ++ ++ cf->res_attr.start = res_skt->start + CF_ATTR_OFFSET; ++ cf->res_attr.end = cf->res_attr.start + CF_RES_SIZE - 1; ++ cf->res_attr.name = "attribute"; ++ cf->res_attr.flags = IORESOURCE_MEM; ++ ret = request_resource(res_skt, &cf->res_attr); ++ if (ret) ++ goto err_request_res_attr; ++ ++ cf->res_mem.start = res_skt->start + CF_MEM_OFFSET; ++ cf->res_mem.end = cf->res_mem.start + CF_RES_SIZE - 1; ++ cf->res_mem.name = "memory"; ++ cf->res_mem.flags = IORESOURCE_MEM; ++ ret = request_resource(res_skt, &cf->res_mem); ++ if (ret) ++ goto err_request_res_mem; ++ ++ cf->res_io.start = res_skt->start + CF_IO_OFFSET; ++ cf->res_io.end = cf->res_io.start + CF_RES_SIZE - 1; ++ cf->res_io.name = "io"; ++ cf->res_io.flags = IORESOURCE_MEM; ++ ret = request_resource(res_skt, &cf->res_io); ++ if (ret) ++ goto err_request_res_io; ++ ++ cf->socket.io_offset = cf->res_io.start; ++ ++ if (cf->detect_pin >= 0) { ++ ret = request_irq(gpio_to_irq(cf->detect_pin), at32_cf_irq, ++ IRQF_SHARED, "cf_detect", cf); ++ if (ret) { ++ debug(cf, 1, ++ "failed to request cf_detect interrupt\n"); ++ goto err_detect_irq; ++ } ++ } ++ ++ cf->present = at32_cf_present(cf); ++ ++ /* Setup SMC timings */ ++ smc_set_timing(&cf->smc, &at32_cf_timing); ++ ++ cf->smc.bus_width = 2; ++ cf->smc.nrd_controlled = 1; ++ cf->smc.nwe_controlled = 1; ++ cf->smc.nwait_mode = 0; ++ cf->smc.byte_write = 0; ++ cf->smc.tdf_cycles = 8; ++ cf->smc.tdf_mode = 0; ++ ++ ret = smc_set_configuration(cf->cf_cs, &cf->smc); ++ if (ret) { ++ debug(cf, 1, "failed to configure SMC\n", ret); ++ goto err_smc; ++ } ++ ++ ret = pcmcia_register_socket(&cf->socket); ++ if (ret) { ++ debug(cf, 1, "failed to register socket: %d\n", ret); ++ goto err_register_socket; ++ } ++ ++ if (cf->reset_pin >= 0) ++ gpio_direction_output(cf->reset_pin, 0); ++ ++ platform_set_drvdata(pdev, cf); ++ ++ dev_info(&pdev->dev, "Atmel SMC CF interface at 0x%08lx\n", ++ (unsigned long)res_skt->start); ++ ++ return 0; ++ ++err_register_socket: ++err_smc: ++ if (cf->detect_pin >= 0) ++ free_irq(gpio_to_irq(cf->detect_pin), cf); ++err_detect_irq: ++ release_resource(&cf->res_io); ++err_request_res_io: ++ release_resource(&cf->res_mem); ++err_request_res_mem: ++ release_resource(&cf->res_attr); ++err_request_res_attr: ++ if (cf->vcc_pin >= 0) ++ gpio_free(cf->vcc_pin); ++ if (cf->reset_pin >= 0) ++ gpio_free(cf->reset_pin); ++ if (cf->detect_pin >= 0) ++ gpio_free(cf->detect_pin); ++ kfree(cf); ++ ++ return ret; ++} ++ ++static int __exit at32_cf_remove(struct platform_device *pdev) ++{ ++ struct at32_cf_socket *cf = platform_get_drvdata(pdev); ++ ++ pcmcia_unregister_socket(&cf->socket); ++ if (cf->detect_pin >= 0) { ++ free_irq(gpio_to_irq(cf->detect_pin), cf); ++ gpio_free(cf->detect_pin); ++ } ++ if (cf->vcc_pin >= 0) ++ gpio_free(cf->vcc_pin); ++ if (cf->reset_pin >= 0) ++ gpio_free(cf->reset_pin); ++ ++ release_resource(&cf->res_io); ++ release_resource(&cf->res_mem); ++ release_resource(&cf->res_attr); ++ kfree(cf); ++ platform_set_drvdata(pdev, NULL); ++ ++ return 0; ++} ++ ++static struct platform_driver at32_cf_driver = { ++ .remove = __exit_p(at32_cf_remove), ++ .driver = { ++ .name = "at32_cf", ++ .owner = THIS_MODULE, ++ }, ++}; ++ ++static int __init at32_cf_init(void) ++{ ++ int ret; ++ ++ ret = platform_driver_probe(&at32_cf_driver, at32_cf_probe); ++ if (ret) ++ printk(KERN_ERR "at32_cf: probe failed: %d\n", ret); ++ return ret; ++} ++ ++static void __exit at32_cf_exit(void) ++{ ++ platform_driver_unregister(&at32_cf_driver); ++} ++ ++module_init(at32_cf_init); ++module_exit(at32_cf_exit); ++ ++MODULE_LICENSE("GPL"); ++MODULE_DESCRIPTION("Driver for SMC PCMCIA interface"); ++MODULE_AUTHOR("Hans-Christian Egtvedt <hcegtvedt@atmel.com>"); +diff -Nrup linux-2.6.24/drivers/pcmcia/Kconfig linux-avr32/drivers/pcmcia/Kconfig +--- linux-2.6.24/drivers/pcmcia/Kconfig 2008-01-24 17:58:37.000000000 -0500 ++++ linux-avr32/drivers/pcmcia/Kconfig 2008-02-01 14:51:42.000000000 -0500 +@@ -276,6 +276,13 @@ config ELECTRA_CF + Say Y here to support the CompactFlash controller on the + PA Semi Electra eval board. + ++config AT32_CF ++ tristate "AT32AP CompactFlash Controller" ++ depends on PCMCIA && AVR32 && PLATFORM_AT32AP ++ help ++ Say Y here to support the CompactFlash controller on AT32 chips. ++ Or choose M to compile the driver as a module named "at32_cf". ++ + config PCCARD_NONSTATIC + tristate + +diff -Nrup linux-2.6.24/drivers/pcmcia/Makefile linux-avr32/drivers/pcmcia/Makefile +--- linux-2.6.24/drivers/pcmcia/Makefile 2008-01-24 17:58:37.000000000 -0500 ++++ linux-avr32/drivers/pcmcia/Makefile 2008-02-01 14:51:42.000000000 -0500 +@@ -38,6 +38,7 @@ obj-$(CONFIG_PCMCIA_VRC4173) += vrc417 + obj-$(CONFIG_OMAP_CF) += omap_cf.o + obj-$(CONFIG_AT91_CF) += at91_cf.o + obj-$(CONFIG_ELECTRA_CF) += electra_cf.o ++obj-$(CONFIG_AT32_CF) += at32_cf.o + + sa11xx_core-y += soc_common.o sa11xx_base.o + pxa2xx_core-y += soc_common.o pxa2xx_base.o +diff -Nrup linux-2.6.24/drivers/spi/atmel_spi.c linux-avr32/drivers/spi/atmel_spi.c +--- linux-2.6.24/drivers/spi/atmel_spi.c 2008-01-24 17:58:37.000000000 -0500 ++++ linux-avr32/drivers/spi/atmel_spi.c 2008-02-01 14:51:43.000000000 -0500 +@@ -51,7 +51,9 @@ struct atmel_spi { + u8 stopping; + struct list_head queue; + struct spi_transfer *current_transfer; +- unsigned long remaining_bytes; ++ unsigned long current_remaining_bytes; ++ struct spi_transfer *next_transfer; ++ unsigned long next_remaining_bytes; + + void *buffer; + dma_addr_t buffer_dma; +@@ -121,6 +123,48 @@ static void cs_deactivate(struct atmel_s + gpio_set_value(gpio, !active); + } + ++static inline int atmel_spi_xfer_is_last(struct spi_message *msg, ++ struct spi_transfer *xfer) ++{ ++ return msg->transfers.prev == &xfer->transfer_list; ++} ++ ++static inline int atmel_spi_xfer_can_be_chained(struct spi_transfer *xfer) ++{ ++ return xfer->delay_usecs == 0 && !xfer->cs_change; ++} ++ ++static void atmel_spi_next_xfer_data(struct spi_master *master, ++ struct spi_transfer *xfer, ++ dma_addr_t *tx_dma, ++ dma_addr_t *rx_dma, ++ u32 *plen) ++{ ++ struct atmel_spi *as = spi_master_get_devdata(master); ++ u32 len = *plen; ++ ++ /* use scratch buffer only when rx or tx data is unspecified */ ++ if (xfer->rx_buf) ++ *rx_dma = xfer->rx_dma + xfer->len - len; ++ else { ++ *rx_dma = as->buffer_dma; ++ if (len > BUFFER_SIZE) ++ len = BUFFER_SIZE; ++ } ++ if (xfer->tx_buf) ++ *tx_dma = xfer->tx_dma + xfer->len - len; ++ else { ++ *tx_dma = as->buffer_dma; ++ if (len > BUFFER_SIZE) ++ len = BUFFER_SIZE; ++ memset(as->buffer, 0, len); ++ dma_sync_single_for_device(&as->pdev->dev, ++ as->buffer_dma, len, DMA_TO_DEVICE); ++ } ++ ++ *plen = len; ++} ++ + /* + * Submit next transfer for DMA. + * lock is held, spi irq is blocked +@@ -130,53 +174,78 @@ static void atmel_spi_next_xfer(struct s + { + struct atmel_spi *as = spi_master_get_devdata(master); + struct spi_transfer *xfer; +- u32 len; ++ u32 len, remaining, total; + dma_addr_t tx_dma, rx_dma; + +- xfer = as->current_transfer; +- if (!xfer || as->remaining_bytes == 0) { +- if (xfer) +- xfer = list_entry(xfer->transfer_list.next, +- struct spi_transfer, transfer_list); +- else +- xfer = list_entry(msg->transfers.next, +- struct spi_transfer, transfer_list); +- as->remaining_bytes = xfer->len; +- as->current_transfer = xfer; ++ if (!as->current_transfer) ++ xfer = list_entry(msg->transfers.next, ++ struct spi_transfer, transfer_list); ++ else if (!as->next_transfer) ++ xfer = list_entry(as->current_transfer->transfer_list.next, ++ struct spi_transfer, transfer_list); ++ else ++ xfer = NULL; ++ ++ if (xfer) { ++ len = xfer->len; ++ atmel_spi_next_xfer_data(master, xfer, &tx_dma, &rx_dma, &len); ++ remaining = xfer->len - len; ++ ++ spi_writel(as, RPR, rx_dma); ++ spi_writel(as, TPR, tx_dma); ++ ++ if (msg->spi->bits_per_word > 8) ++ len >>= 1; ++ spi_writel(as, RCR, len); ++ spi_writel(as, TCR, len); ++ ++ dev_dbg(&msg->spi->dev, ++ " start xfer %p: len %u tx %p/%08x rx %p/%08x\n", ++ xfer, xfer->len, xfer->tx_buf, xfer->tx_dma, ++ xfer->rx_buf, xfer->rx_dma); ++ } else { ++ xfer = as->next_transfer; ++ remaining = as->next_remaining_bytes; + } + +- len = as->remaining_bytes; ++ as->current_transfer = xfer; ++ as->current_remaining_bytes = remaining; + +- tx_dma = xfer->tx_dma + xfer->len - len; +- rx_dma = xfer->rx_dma + xfer->len - len; ++ if (remaining > 0) ++ len = remaining; ++ else if (!atmel_spi_xfer_is_last(msg, xfer) ++ && atmel_spi_xfer_can_be_chained(xfer)) { ++ xfer = list_entry(xfer->transfer_list.next, ++ struct spi_transfer, transfer_list); ++ len = xfer->len; ++ } else ++ xfer = NULL; + +- /* use scratch buffer only when rx or tx data is unspecified */ +- if (!xfer->rx_buf) { +- rx_dma = as->buffer_dma; +- if (len > BUFFER_SIZE) +- len = BUFFER_SIZE; +- } +- if (!xfer->tx_buf) { +- tx_dma = as->buffer_dma; +- if (len > BUFFER_SIZE) +- len = BUFFER_SIZE; +- memset(as->buffer, 0, len); +- dma_sync_single_for_device(&as->pdev->dev, +- as->buffer_dma, len, DMA_TO_DEVICE); +- } ++ as->next_transfer = xfer; + +- spi_writel(as, RPR, rx_dma); +- spi_writel(as, TPR, tx_dma); ++ if (xfer) { ++ total = len; ++ atmel_spi_next_xfer_data(master, xfer, &tx_dma, &rx_dma, &len); ++ as->next_remaining_bytes = total - len; ++ ++ spi_writel(as, RNPR, rx_dma); ++ spi_writel(as, TNPR, tx_dma); ++ ++ if (msg->spi->bits_per_word > 8) ++ len >>= 1; ++ spi_writel(as, RNCR, len); ++ spi_writel(as, TNCR, len); ++ ++ dev_dbg(&msg->spi->dev, ++ " next xfer %p: len %u tx %p/%08x rx %p/%08x\n", ++ xfer, xfer->len, xfer->tx_buf, xfer->tx_dma, ++ xfer->rx_buf, xfer->rx_dma); ++ } else { ++ spi_writel(as, RNCR, 0); ++ spi_writel(as, TNCR, 0); ++ } + +- as->remaining_bytes -= len; +- if (msg->spi->bits_per_word > 8) +- len >>= 1; +- +- /* REVISIT: when xfer->delay_usecs == 0, the PDC "next transfer" +- * mechanism might help avoid the IRQ latency between transfers +- * (and improve the nCS0 errata handling on at91rm9200 chips) +- * +- * We're also waiting for ENDRX before we start the next ++ /* REVISIT: We're waiting for ENDRX before we start the next + * transfer because we need to handle some difficult timing + * issues otherwise. If we wait for ENDTX in one transfer and + * then starts waiting for ENDRX in the next, it's difficult +@@ -186,17 +255,7 @@ static void atmel_spi_next_xfer(struct s + * + * It should be doable, though. Just not now... + */ +- spi_writel(as, TNCR, 0); +- spi_writel(as, RNCR, 0); + spi_writel(as, IER, SPI_BIT(ENDRX) | SPI_BIT(OVRES)); +- +- dev_dbg(&msg->spi->dev, +- " start xfer %p: len %u tx %p/%08x rx %p/%08x imr %03x\n", +- xfer, xfer->len, xfer->tx_buf, xfer->tx_dma, +- xfer->rx_buf, xfer->rx_dma, spi_readl(as, IMR)); +- +- spi_writel(as, RCR, len); +- spi_writel(as, TCR, len); + spi_writel(as, PTCR, SPI_BIT(TXTEN) | SPI_BIT(RXTEN)); + } + +@@ -294,6 +353,7 @@ atmel_spi_msg_done(struct spi_master *ma + spin_lock(&as->lock); + + as->current_transfer = NULL; ++ as->next_transfer = NULL; + + /* continue if needed */ + if (list_empty(&as->queue) || as->stopping) +@@ -377,7 +437,7 @@ atmel_spi_interrupt(int irq, void *dev_i + + spi_writel(as, IDR, pending); + +- if (as->remaining_bytes == 0) { ++ if (as->current_remaining_bytes == 0) { + msg->actual_length += xfer->len; + + if (!msg->is_dma_mapped) +@@ -387,7 +447,7 @@ atmel_spi_interrupt(int irq, void *dev_i + if (xfer->delay_usecs) + udelay(xfer->delay_usecs); + +- if (msg->transfers.prev == &xfer->transfer_list) { ++ if (atmel_spi_xfer_is_last(msg, xfer)) { + /* report completed message */ + atmel_spi_msg_done(master, as, msg, 0, + xfer->cs_change); +@@ -490,9 +550,14 @@ static int atmel_spi_setup(struct spi_de + if (!(spi->mode & SPI_CPHA)) + csr |= SPI_BIT(NCPHA); + +- /* TODO: DLYBS and DLYBCT */ +- csr |= SPI_BF(DLYBS, 10); +- csr |= SPI_BF(DLYBCT, 10); ++ /* DLYBS is mostly irrelevant since we manage chipselect using GPIOs. ++ * ++ * DLYBCT would add delays between words, slowing down transfers. ++ * It could potentially be useful to cope with DMA bottlenecks, but ++ * in those cases it's probably best to just use a lower bitrate. ++ */ ++ csr |= SPI_BF(DLYBS, 0); ++ csr |= SPI_BF(DLYBCT, 0); + + /* chipselect must have been muxed as GPIO (e.g. in board setup) */ + npcs_pin = (unsigned int)spi->controller_data; +diff -Nrup linux-2.6.24/drivers/video/atmel_lcdfb.c linux-avr32/drivers/video/atmel_lcdfb.c +--- linux-2.6.24/drivers/video/atmel_lcdfb.c 2008-01-24 17:58:37.000000000 -0500 ++++ linux-avr32/drivers/video/atmel_lcdfb.c 2008-02-01 14:51:44.000000000 -0500 +@@ -37,7 +37,9 @@ + #endif + + #if defined(CONFIG_ARCH_AT91) +-#define ATMEL_LCDFB_FBINFO_DEFAULT FBINFO_DEFAULT ++#define ATMEL_LCDFB_FBINFO_DEFAULT (FBINFO_DEFAULT \ ++ | FBINFO_PARTIAL_PAN_OK \ ++ | FBINFO_HWACCEL_YPAN) + + static inline void atmel_lcdfb_update_dma2d(struct atmel_lcdfb_info *sinfo, + struct fb_var_screeninfo *var) +@@ -74,7 +76,7 @@ static struct fb_fix_screeninfo atmel_lc + .type = FB_TYPE_PACKED_PIXELS, + .visual = FB_VISUAL_TRUECOLOR, + .xpanstep = 0, +- .ypanstep = 0, ++ .ypanstep = 1, + .ywrapstep = 0, + .accel = FB_ACCEL_NONE, + }; +@@ -148,6 +150,8 @@ static int atmel_lcdfb_alloc_video_memor + return -ENOMEM; + } + ++ memset(info->screen_base, 0, info->fix.smem_len); ++ + return 0; + } + +@@ -203,6 +207,26 @@ static int atmel_lcdfb_check_var(struct + var->transp.offset = var->transp.length = 0; + var->xoffset = var->yoffset = 0; + ++ /* Saturate vertical and horizontal timings at maximum values */ ++ var->vsync_len = min_t(u32, var->vsync_len, ++ (ATMEL_LCDC_VPW >> ATMEL_LCDC_VPW_OFFSET) + 1); ++ var->upper_margin = min_t(u32, var->upper_margin, ++ ATMEL_LCDC_VBP >> ATMEL_LCDC_VBP_OFFSET); ++ var->lower_margin = min_t(u32, var->lower_margin, ++ ATMEL_LCDC_VFP); ++ var->right_margin = min_t(u32, var->right_margin, ++ (ATMEL_LCDC_HFP >> ATMEL_LCDC_HFP_OFFSET) + 1); ++ var->hsync_len = min_t(u32, var->hsync_len, ++ (ATMEL_LCDC_HPW >> ATMEL_LCDC_HPW_OFFSET) + 1); ++ var->left_margin = min_t(u32, var->left_margin, ++ ATMEL_LCDC_HBP + 1); ++ ++ /* Some parameters can't be zero */ ++ var->vsync_len = max_t(u32, var->vsync_len, 1); ++ var->right_margin = max_t(u32, var->right_margin, 1); ++ var->hsync_len = max_t(u32, var->hsync_len, 1); ++ var->left_margin = max_t(u32, var->left_margin, 1); ++ + switch (var->bits_per_pixel) { + case 1: + case 2: +@@ -516,7 +540,6 @@ static int __init atmel_lcdfb_init_fbinf + struct fb_info *info = sinfo->info; + int ret = 0; + +- memset_io(info->screen_base, 0, info->fix.smem_len); + info->var.activate |= FB_ACTIVATE_FORCE | FB_ACTIVATE_NOW; + + dev_info(info->device, +@@ -645,6 +668,11 @@ static int __init atmel_lcdfb_probe(stru + info->screen_base = ioremap(info->fix.smem_start, info->fix.smem_len); + if (!info->screen_base) + goto release_intmem; ++ ++ /* ++ * Don't clear the framebuffer -- someone may have set ++ * up a splash image. ++ */ + } else { + /* alocate memory buffer */ + ret = atmel_lcdfb_alloc_video_memory(sinfo); +diff -Nrup linux-2.6.24/drivers/video/console/Kconfig linux-avr32/drivers/video/console/Kconfig +--- linux-2.6.24/drivers/video/console/Kconfig 2008-01-24 17:58:37.000000000 -0500 ++++ linux-avr32/drivers/video/console/Kconfig 2008-02-01 14:51:44.000000000 -0500 +@@ -6,7 +6,7 @@ menu "Console display driver support" + + config VGA_CONSOLE + bool "VGA text console" if EMBEDDED || !X86 +- depends on !ARCH_ACORN && !ARCH_EBSA110 && !4xx && !8xx && !SPARC && !M68K && !PARISC && !FRV && !ARCH_VERSATILE && !SUPERH && !BLACKFIN ++ depends on !ARCH_ACORN && !ARCH_EBSA110 && !4xx && !8xx && !SPARC && !M68K && !PARISC && !FRV && !ARCH_VERSATILE && !SUPERH && !BLACKFIN && !AVR32 + default y + help + Saying Y here will allow you to use Linux in text mode through a +diff -Nrup linux-2.6.24/drivers/watchdog/Kconfig linux-avr32/drivers/watchdog/Kconfig +--- linux-2.6.24/drivers/watchdog/Kconfig 2008-01-24 17:58:37.000000000 -0500 ++++ linux-avr32/drivers/watchdog/Kconfig 2008-02-01 14:51:44.000000000 -0500 +@@ -223,7 +223,7 @@ config DAVINCI_WATCHDOG + + config AT32AP700X_WDT + tristate "AT32AP700x watchdog" +- depends on CPU_AT32AP7000 ++ depends on CPU_AT32AP700X + help + Watchdog timer embedded into AT32AP700x devices. This will reboot + your system when the timeout is reached. +diff -Nrup linux-2.6.24/include/asm-avr32/arch-at32ap/at32ap7000.h linux-avr32/include/asm-avr32/arch-at32ap/at32ap7000.h +--- linux-2.6.24/include/asm-avr32/arch-at32ap/at32ap7000.h 2008-01-24 17:58:37.000000000 -0500 ++++ linux-avr32/include/asm-avr32/arch-at32ap/at32ap7000.h 1969-12-31 19:00:00.000000000 -0500 +@@ -1,35 +0,0 @@ +-/* +- * Pin definitions for AT32AP7000. +- * +- * Copyright (C) 2006 Atmel Corporation +- * +- * This program is free software; you can redistribute it and/or modify +- * it under the terms of the GNU General Public License version 2 as +- * published by the Free Software Foundation. +- */ +-#ifndef __ASM_ARCH_AT32AP7000_H__ +-#define __ASM_ARCH_AT32AP7000_H__ +- +-#define GPIO_PERIPH_A 0 +-#define GPIO_PERIPH_B 1 +- +-#define NR_GPIO_CONTROLLERS 4 +- +-/* +- * Pin numbers identifying specific GPIO pins on the chip. They can +- * also be converted to IRQ numbers by passing them through +- * gpio_to_irq(). +- */ +-#define GPIO_PIOA_BASE (0) +-#define GPIO_PIOB_BASE (GPIO_PIOA_BASE + 32) +-#define GPIO_PIOC_BASE (GPIO_PIOB_BASE + 32) +-#define GPIO_PIOD_BASE (GPIO_PIOC_BASE + 32) +-#define GPIO_PIOE_BASE (GPIO_PIOD_BASE + 32) +- +-#define GPIO_PIN_PA(N) (GPIO_PIOA_BASE + (N)) +-#define GPIO_PIN_PB(N) (GPIO_PIOB_BASE + (N)) +-#define GPIO_PIN_PC(N) (GPIO_PIOC_BASE + (N)) +-#define GPIO_PIN_PD(N) (GPIO_PIOD_BASE + (N)) +-#define GPIO_PIN_PE(N) (GPIO_PIOE_BASE + (N)) +- +-#endif /* __ASM_ARCH_AT32AP7000_H__ */ +diff -Nrup linux-2.6.24/include/asm-avr32/arch-at32ap/at32ap700x.h linux-avr32/include/asm-avr32/arch-at32ap/at32ap700x.h +--- linux-2.6.24/include/asm-avr32/arch-at32ap/at32ap700x.h 1969-12-31 19:00:00.000000000 -0500 ++++ linux-avr32/include/asm-avr32/arch-at32ap/at32ap700x.h 2008-02-01 14:51:45.000000000 -0500 +@@ -0,0 +1,35 @@ ++/* ++ * Pin definitions for AT32AP7000. ++ * ++ * Copyright (C) 2006 Atmel Corporation ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation. ++ */ ++#ifndef __ASM_ARCH_AT32AP700X_H__ ++#define __ASM_ARCH_AT32AP700X_H__ ++ ++#define GPIO_PERIPH_A 0 ++#define GPIO_PERIPH_B 1 ++ ++#define NR_GPIO_CONTROLLERS 4 ++ ++/* ++ * Pin numbers identifying specific GPIO pins on the chip. They can ++ * also be converted to IRQ numbers by passing them through ++ * gpio_to_irq(). ++ */ ++#define GPIO_PIOA_BASE (0) ++#define GPIO_PIOB_BASE (GPIO_PIOA_BASE + 32) ++#define GPIO_PIOC_BASE (GPIO_PIOB_BASE + 32) ++#define GPIO_PIOD_BASE (GPIO_PIOC_BASE + 32) ++#define GPIO_PIOE_BASE (GPIO_PIOD_BASE + 32) ++ ++#define GPIO_PIN_PA(N) (GPIO_PIOA_BASE + (N)) ++#define GPIO_PIN_PB(N) (GPIO_PIOB_BASE + (N)) ++#define GPIO_PIN_PC(N) (GPIO_PIOC_BASE + (N)) ++#define GPIO_PIN_PD(N) (GPIO_PIOD_BASE + (N)) ++#define GPIO_PIN_PE(N) (GPIO_PIOE_BASE + (N)) ++ ++#endif /* __ASM_ARCH_AT32AP700X_H__ */ +diff -Nrup linux-2.6.24/include/asm-avr32/arch-at32ap/board.h linux-avr32/include/asm-avr32/arch-at32ap/board.h +--- linux-2.6.24/include/asm-avr32/arch-at32ap/board.h 2008-01-24 17:58:37.000000000 -0500 ++++ linux-avr32/include/asm-avr32/arch-at32ap/board.h 2008-02-01 14:51:45.000000000 -0500 +@@ -51,6 +51,9 @@ struct platform_device * + at32_add_device_ide(unsigned int id, unsigned int extint, + struct ide_platform_data *data); + ++/* mask says which PWM channels to mux */ ++struct platform_device *at32_add_device_pwm(u32 mask); ++ + /* depending on what's hooked up, not all SSC pins will be used */ + #define ATMEL_SSC_TK 0x01 + #define ATMEL_SSC_TF 0x02 +@@ -66,7 +69,13 @@ struct platform_device * + at32_add_device_ssc(unsigned int id, unsigned int flags); + + struct platform_device *at32_add_device_twi(unsigned int id); +-struct platform_device *at32_add_device_mci(unsigned int id); ++ ++struct mci_platform_data { ++ int detect_pin; ++ int wp_pin; ++}; ++struct platform_device * ++at32_add_device_mci(unsigned int id, struct mci_platform_data *data); + struct platform_device *at32_add_device_ac97c(unsigned int id); + struct platform_device *at32_add_device_abdac(unsigned int id); + +diff -Nrup linux-2.6.24/include/asm-avr32/arch-at32ap/cpu.h linux-avr32/include/asm-avr32/arch-at32ap/cpu.h +--- linux-2.6.24/include/asm-avr32/arch-at32ap/cpu.h 2008-01-24 17:58:37.000000000 -0500 ++++ linux-avr32/include/asm-avr32/arch-at32ap/cpu.h 2008-02-01 14:51:45.000000000 -0500 +@@ -14,7 +14,7 @@ + * Only AT32AP7000 is defined for now. We can identify the specific + * chip at runtime, but I'm not sure if it's really worth it. + */ +-#ifdef CONFIG_CPU_AT32AP7000 ++#ifdef CONFIG_CPU_AT32AP700X + # define cpu_is_at32ap7000() (1) + #else + # define cpu_is_at32ap7000() (0) +diff -Nrup linux-2.6.24/include/asm-avr32/arch-at32ap/io.h linux-avr32/include/asm-avr32/arch-at32ap/io.h +--- linux-2.6.24/include/asm-avr32/arch-at32ap/io.h 2008-01-24 17:58:37.000000000 -0500 ++++ linux-avr32/include/asm-avr32/arch-at32ap/io.h 2008-02-01 14:51:45.000000000 -0500 +@@ -4,7 +4,7 @@ + /* For "bizarre" halfword swapping */ + #include <linux/byteorder/swabb.h> + +-#if defined(CONFIG_AP7000_32_BIT_SMC) ++#if defined(CONFIG_AP700X_32_BIT_SMC) + # define __swizzle_addr_b(addr) (addr ^ 3UL) + # define __swizzle_addr_w(addr) (addr ^ 2UL) + # define __swizzle_addr_l(addr) (addr) +@@ -14,7 +14,7 @@ + # define __mem_ioswabb(a, x) (x) + # define __mem_ioswabw(a, x) swab16(x) + # define __mem_ioswabl(a, x) swab32(x) +-#elif defined(CONFIG_AP7000_16_BIT_SMC) ++#elif defined(CONFIG_AP700X_16_BIT_SMC) + # define __swizzle_addr_b(addr) (addr ^ 1UL) + # define __swizzle_addr_w(addr) (addr) + # define __swizzle_addr_l(addr) (addr) +diff -Nrup linux-2.6.24/include/asm-avr32/arch-at32ap/portmux.h linux-avr32/include/asm-avr32/arch-at32ap/portmux.h +--- linux-2.6.24/include/asm-avr32/arch-at32ap/portmux.h 2008-01-24 17:58:37.000000000 -0500 ++++ linux-avr32/include/asm-avr32/arch-at32ap/portmux.h 2008-02-01 14:51:45.000000000 -0500 +@@ -26,4 +26,16 @@ void at32_select_periph(unsigned int pin + void at32_select_gpio(unsigned int pin, unsigned long flags); + void at32_reserve_pin(unsigned int pin); + ++#ifdef CONFIG_GPIO_DEV ++ ++/* Gang allocators and accessors; used by the GPIO /dev driver */ ++int at32_gpio_port_is_valid(unsigned int port); ++int at32_select_gpio_pins(unsigned int port, u32 pins, u32 oe_mask); ++void at32_deselect_pins(unsigned int port, u32 pins); ++ ++u32 at32_gpio_get_value_multiple(unsigned int port, u32 pins); ++void at32_gpio_set_value_multiple(unsigned int port, u32 value, u32 mask); ++ ++#endif /* CONFIG_GPIO_DEV */ ++ + #endif /* __ASM_ARCH_PORTMUX_H__ */ +diff -Nrup linux-2.6.24/include/asm-avr32/dma-controller.h linux-avr32/include/asm-avr32/dma-controller.h +--- linux-2.6.24/include/asm-avr32/dma-controller.h 1969-12-31 19:00:00.000000000 -0500 ++++ linux-avr32/include/asm-avr32/dma-controller.h 2008-02-01 14:51:45.000000000 -0500 +@@ -0,0 +1,166 @@ ++/* ++ * Copyright (C) 2005-2006 Atmel Corporation ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation. ++ */ ++#ifndef __ASM_AVR32_DMA_CONTROLLER_H ++#define __ASM_AVR32_DMA_CONTROLLER_H ++ ++#include <linux/device.h> ++ ++#define DMA_DIR_MEM_TO_MEM 0x0000 ++#define DMA_DIR_MEM_TO_PERIPH 0x0001 ++#define DMA_DIR_PERIPH_TO_MEM 0x0002 ++#define DMA_DIR_PERIPH_TO_PERIPH 0x0003 ++ ++#define DMA_WIDTH_8BIT 0 ++#define DMA_WIDTH_16BIT 1 ++#define DMA_WIDTH_32BIT 2 ++ ++struct dma_request { ++ struct dma_controller *dmac; ++ struct list_head list; ++ ++ unsigned short channel; ++ ++ void (*xfer_complete)(struct dma_request *req); ++ void (*block_complete)(struct dma_request *req); ++ void (*error)(struct dma_request *req); ++}; ++ ++struct dma_request_sg { ++ struct dma_request req; ++ ++ int nr_sg; ++ struct scatterlist *sg; ++ unsigned long block_size; ++ unsigned int nr_blocks; ++ ++ dma_addr_t data_reg; ++ unsigned short periph_id; ++ ++ unsigned char direction; ++ unsigned char width; ++}; ++#define to_dma_request_sg(_req) \ ++ container_of(_req, struct dma_request_sg, req) ++ ++struct dma_request_cyclic { ++ struct dma_request req; ++ ++ int periods; ++ unsigned long buffer_size; ++ ++ dma_addr_t buffer_start; ++ dma_addr_t data_reg; ++ ++ unsigned short periph_id; ++ unsigned char direction; ++ unsigned char width; ++ ++ void *dev_id; ++}; ++#define to_dma_request_cyclic(_req) \ ++ container_of(_req, struct dma_request_cyclic, req) ++ ++struct dma_request_memcpy { ++ struct dma_request req; ++ ++ dma_addr_t src_addr; ++ unsigned int src_width; ++ unsigned int src_stride; ++ ++ dma_addr_t dst_addr; ++ unsigned int dst_width; ++ unsigned int dst_stride; ++ ++ size_t length; ++ ++ unsigned short src_reverse:1; ++ unsigned short dst_reverse:1; ++}; ++#define to_dma_request_memcpy(_req) \ ++ container_of(_req, struct dma_request_memcpy, req) ++ ++struct dma_controller { ++ struct list_head list; ++ int id; ++ struct device *dev; ++ ++ int (*alloc_channel)(struct dma_controller *dmac); ++ void (*release_channel)(struct dma_controller *dmac, ++ int channel); ++ int (*prepare_request_sg)(struct dma_controller *dmac, ++ struct dma_request_sg *req); ++ int (*prepare_request_cyclic)(struct dma_controller *dmac, ++ struct dma_request_cyclic *req); ++ int (*prepare_request_memcpy)(struct dma_controller *dmac, ++ struct dma_request_memcpy *req); ++ int (*start_request)(struct dma_controller *dmac, ++ unsigned int channel); ++ int (*stop_request)(struct dma_controller *dmac, ++ unsigned int channel); ++ dma_addr_t (*get_current_pos)(struct dma_controller *dmac, ++ unsigned int channel); ++}; ++ ++static inline int ++dma_alloc_channel(struct dma_controller *dmac) ++{ ++ return dmac->alloc_channel(dmac); ++} ++ ++static inline void ++dma_release_channel(struct dma_controller *dmac, int chan) ++{ ++ dmac->release_channel(dmac, chan); ++} ++ ++static inline int ++dma_prepare_request_sg(struct dma_controller *dmac, ++ struct dma_request_sg *req) ++{ ++ return dmac->prepare_request_sg(dmac, req); ++} ++ ++static inline int ++dma_prepare_request_cyclic(struct dma_controller *dmac, ++ struct dma_request_cyclic *req) ++{ ++ return dmac->prepare_request_cyclic(dmac, req); ++} ++ ++static inline int ++dma_prepare_request_memcpy(struct dma_controller *dmac, ++ struct dma_request_memcpy *req) ++{ ++ return dmac->prepare_request_memcpy(dmac, req); ++} ++ ++static inline int ++dma_start_request(struct dma_controller *dmac, ++ unsigned int channel) ++{ ++ return dmac->start_request(dmac, channel); ++} ++ ++static inline int ++dma_stop_request(struct dma_controller *dmac, ++ unsigned int channel) ++{ ++ return dmac->stop_request(dmac, channel); ++} ++ ++static inline dma_addr_t ++dma_get_current_pos(struct dma_controller *dmac, ++ unsigned int channel) ++{ ++ return dmac->get_current_pos(dmac, channel); ++} ++ ++extern int register_dma_controller(struct dma_controller *dmac); ++extern struct dma_controller *find_dma_controller(int id); ++ ++#endif /* __ASM_AVR32_DMA_CONTROLLER_H */ +diff -Nrup linux-2.6.24/include/asm-avr32/irq.h linux-avr32/include/asm-avr32/irq.h +--- linux-2.6.24/include/asm-avr32/irq.h 2008-01-24 17:58:37.000000000 -0500 ++++ linux-avr32/include/asm-avr32/irq.h 2008-02-01 14:51:45.000000000 -0500 +@@ -11,4 +11,9 @@ + + #define irq_canonicalize(i) (i) + ++#ifndef __ASSEMBLER__ ++int nmi_enable(void); ++void nmi_disable(void); ++#endif ++ + #endif /* __ASM_AVR32_IOCTLS_H */ +diff -Nrup linux-2.6.24/include/asm-avr32/kdebug.h linux-avr32/include/asm-avr32/kdebug.h +--- linux-2.6.24/include/asm-avr32/kdebug.h 2008-01-24 17:58:37.000000000 -0500 ++++ linux-avr32/include/asm-avr32/kdebug.h 2008-02-01 14:51:45.000000000 -0500 +@@ -5,6 +5,7 @@ + enum die_val { + DIE_BREAKPOINT, + DIE_SSTEP, ++ DIE_NMI, + }; + + #endif /* __ASM_AVR32_KDEBUG_H */ +diff -Nrup linux-2.6.24/include/asm-avr32/ocd.h linux-avr32/include/asm-avr32/ocd.h +--- linux-2.6.24/include/asm-avr32/ocd.h 2008-01-24 17:58:37.000000000 -0500 ++++ linux-avr32/include/asm-avr32/ocd.h 2008-02-01 14:51:45.000000000 -0500 +@@ -533,6 +533,11 @@ static inline void __ocd_write(unsigned + #define ocd_read(reg) __ocd_read(OCD_##reg) + #define ocd_write(reg, value) __ocd_write(OCD_##reg, value) + ++struct task_struct; ++ ++void ocd_enable(struct task_struct *child); ++void ocd_disable(struct task_struct *child); ++ + #endif /* !__ASSEMBLER__ */ + + #endif /* __ASM_AVR32_OCD_H */ +diff -Nrup linux-2.6.24/include/asm-avr32/processor.h linux-avr32/include/asm-avr32/processor.h +--- linux-2.6.24/include/asm-avr32/processor.h 2008-01-24 17:58:37.000000000 -0500 ++++ linux-avr32/include/asm-avr32/processor.h 2008-02-01 14:51:45.000000000 -0500 +@@ -57,11 +57,25 @@ struct avr32_cpuinfo { + unsigned short cpu_revision; + enum tlb_config tlb_config; + unsigned long features; ++ u32 device_id; + + struct cache_info icache; + struct cache_info dcache; + }; + ++static inline unsigned int avr32_get_manufacturer_id(struct avr32_cpuinfo *cpu) ++{ ++ return (cpu->device_id >> 1) & 0x7f; ++} ++static inline unsigned int avr32_get_product_number(struct avr32_cpuinfo *cpu) ++{ ++ return (cpu->device_id >> 12) & 0xffff; ++} ++static inline unsigned int avr32_get_chip_revision(struct avr32_cpuinfo *cpu) ++{ ++ return (cpu->device_id >> 28) & 0x0f; ++} ++ + extern struct avr32_cpuinfo boot_cpu_data; + + #ifdef CONFIG_SMP +diff -Nrup linux-2.6.24/include/asm-avr32/ptrace.h linux-avr32/include/asm-avr32/ptrace.h +--- linux-2.6.24/include/asm-avr32/ptrace.h 2008-01-24 17:58:37.000000000 -0500 ++++ linux-avr32/include/asm-avr32/ptrace.h 2008-02-01 14:51:45.000000000 -0500 +@@ -121,7 +121,15 @@ struct pt_regs { + }; + + #ifdef __KERNEL__ +-# define user_mode(regs) (((regs)->sr & MODE_MASK) == MODE_USER) ++ ++#include <asm/ocd.h> ++ ++#define arch_ptrace_attach(child) ocd_enable(child) ++ ++#define user_mode(regs) (((regs)->sr & MODE_MASK) == MODE_USER) ++#define instruction_pointer(regs) ((regs)->pc) ++#define profile_pc(regs) instruction_pointer(regs) ++ + extern void show_regs (struct pt_regs *); + + static __inline__ int valid_user_regs(struct pt_regs *regs) +@@ -141,9 +149,6 @@ static __inline__ int valid_user_regs(st + return 0; + } + +-#define instruction_pointer(regs) ((regs)->pc) +- +-#define profile_pc(regs) instruction_pointer(regs) + + #endif /* __KERNEL__ */ + +diff -Nrup linux-2.6.24/include/asm-avr32/thread_info.h linux-avr32/include/asm-avr32/thread_info.h +--- linux-2.6.24/include/asm-avr32/thread_info.h 2008-01-24 17:58:37.000000000 -0500 ++++ linux-avr32/include/asm-avr32/thread_info.h 2008-02-01 14:51:45.000000000 -0500 +@@ -88,6 +88,7 @@ static inline struct thread_info *curren + #define TIF_MEMDIE 6 + #define TIF_RESTORE_SIGMASK 7 /* restore signal mask in do_signal */ + #define TIF_CPU_GOING_TO_SLEEP 8 /* CPU is entering sleep 0 mode */ ++#define TIF_DEBUG 30 /* debugging enabled */ + #define TIF_USERSPACE 31 /* true if FS sets userspace */ + + #define _TIF_SYSCALL_TRACE (1 << TIF_SYSCALL_TRACE) +diff -Nrup linux-2.6.24/include/linux/atmel_pwm.h linux-avr32/include/linux/atmel_pwm.h +--- linux-2.6.24/include/linux/atmel_pwm.h 1969-12-31 19:00:00.000000000 -0500 ++++ linux-avr32/include/linux/atmel_pwm.h 2008-02-01 14:51:47.000000000 -0500 +@@ -0,0 +1,70 @@ ++#ifndef __LINUX_ATMEL_PWM_H ++#define __LINUX_ATMEL_PWM_H ++ ++/** ++ * struct pwm_channel - driver handle to a PWM channel ++ * @regs: base of this channel's registers ++ * @index: number of this channel (0..31) ++ * @mck: base clock rate, which can be prescaled and maybe subdivided ++ * ++ * Drivers initialize a pwm_channel structure using pwm_channel_alloc(). ++ * Then they configure its clock rate (derived from MCK), alignment, ++ * polarity, and duty cycle by writing directly to the channel registers, ++ * before enabling the channel by calling pwm_channel_enable(). ++ * ++ * After emitting a PWM signal for the desired length of time, drivers ++ * may then pwm_channel_disable() or pwm_channel_free(). Both of these ++ * disable the channel, but when it's freed the IRQ is deconfigured and ++ * the channel must later be re-allocated and reconfigured. ++ * ++ * Note that if the period or duty cycle need to be changed while the ++ * PWM channel is operating, drivers must use the PWM_CUPD double buffer ++ * mechanism, either polling until they change or getting implicitly ++ * notified through a once-per-period interrupt handler. ++ */ ++struct pwm_channel { ++ void __iomem *regs; ++ unsigned index; ++ unsigned long mck; ++}; ++ ++extern int pwm_channel_alloc(int index, struct pwm_channel *ch); ++extern int pwm_channel_free(struct pwm_channel *ch); ++ ++extern int pwm_clk_alloc(unsigned prescale, unsigned div); ++extern void pwm_clk_free(unsigned clk); ++ ++extern int __pwm_channel_onoff(struct pwm_channel *ch, int enabled); ++ ++#define pwm_channel_enable(ch) __pwm_channel_onoff((ch), 1) ++#define pwm_channel_disable(ch) __pwm_channel_onoff((ch), 0) ++ ++/* periodic interrupts, mostly for CUPD changes to period or cycle */ ++extern int pwm_channel_handler(struct pwm_channel *ch, ++ void (*handler)(struct pwm_channel *ch)); ++ ++/* per-channel registers (banked at pwm_channel->regs) */ ++#define PWM_CMR 0x00 /* mode register */ ++#define PWM_CPR_CPD (1 << 10) /* set: CUPD modifies period */ ++#define PWM_CPR_CPOL (1 << 9) /* set: idle high */ ++#define PWM_CPR_CALG (1 << 8) /* set: center align */ ++#define PWM_CPR_CPRE (0xf << 0) /* mask: rate is mck/(2^pre) */ ++#define PWM_CPR_CLKA (0xb << 0) /* rate CLKA */ ++#define PWM_CPR_CLKB (0xc << 0) /* rate CLKB */ ++#define PWM_CDTY 0x04 /* duty cycle (max of CPRD) */ ++#define PWM_CPRD 0x08 /* period (count up from zero) */ ++#define PWM_CCNT 0x0c /* counter (20 bits?) */ ++#define PWM_CUPD 0x10 /* update CPRD (or CDTY) next period */ ++ ++static inline void ++pwm_channel_writel(struct pwm_channel *pwmc, unsigned offset, u32 val) ++{ ++ __raw_writel(val, pwmc->regs + offset); ++} ++ ++static inline u32 pwm_channel_readl(struct pwm_channel *pwmc, unsigned offset) ++{ ++ return __raw_readl(pwmc->regs + offset); ++} ++ ++#endif /* __LINUX_ATMEL_PWM_H */ +diff -Nrup linux-2.6.24/include/video/atmel_lcdc.h linux-avr32/include/video/atmel_lcdc.h +--- linux-2.6.24/include/video/atmel_lcdc.h 2008-01-24 17:58:37.000000000 -0500 ++++ linux-avr32/include/video/atmel_lcdc.h 2008-02-01 14:51:47.000000000 -0500 +@@ -115,20 +115,20 @@ struct atmel_lcdfb_info { + #define ATMEL_LCDC_MEMOR_LITTLE (1 << 31) + + #define ATMEL_LCDC_TIM1 0x0808 +-#define ATMEL_LCDC_VFP (0xff << 0) ++#define ATMEL_LCDC_VFP (0xffU << 0) + #define ATMEL_LCDC_VBP_OFFSET 8 +-#define ATMEL_LCDC_VBP (0xff << ATMEL_LCDC_VBP_OFFSET) ++#define ATMEL_LCDC_VBP (0xffU << ATMEL_LCDC_VBP_OFFSET) + #define ATMEL_LCDC_VPW_OFFSET 16 +-#define ATMEL_LCDC_VPW (0x3f << ATMEL_LCDC_VPW_OFFSET) ++#define ATMEL_LCDC_VPW (0x3fU << ATMEL_LCDC_VPW_OFFSET) + #define ATMEL_LCDC_VHDLY_OFFSET 24 +-#define ATMEL_LCDC_VHDLY (0xf << ATMEL_LCDC_VHDLY_OFFSET) ++#define ATMEL_LCDC_VHDLY (0xfU << ATMEL_LCDC_VHDLY_OFFSET) + + #define ATMEL_LCDC_TIM2 0x080c +-#define ATMEL_LCDC_HBP (0xff << 0) ++#define ATMEL_LCDC_HBP (0xffU << 0) + #define ATMEL_LCDC_HPW_OFFSET 8 +-#define ATMEL_LCDC_HPW (0x3f << ATMEL_LCDC_HPW_OFFSET) ++#define ATMEL_LCDC_HPW (0x3fU << ATMEL_LCDC_HPW_OFFSET) + #define ATMEL_LCDC_HFP_OFFSET 21 +-#define ATMEL_LCDC_HFP (0x7ff << ATMEL_LCDC_HFP_OFFSET) ++#define ATMEL_LCDC_HFP (0x7ffU << ATMEL_LCDC_HFP_OFFSET) + + #define ATMEL_LCDC_LCDFRMCFG 0x0810 + #define ATMEL_LCDC_LINEVAL (0x7ff << 0) +diff -Nrup linux-2.6.24/kernel/ptrace.c linux-avr32/kernel/ptrace.c +--- linux-2.6.24/kernel/ptrace.c 2008-01-24 17:58:37.000000000 -0500 ++++ linux-avr32/kernel/ptrace.c 2008-02-01 14:51:47.000000000 -0500 +@@ -470,6 +470,8 @@ asmlinkage long sys_ptrace(long request, + lock_kernel(); + if (request == PTRACE_TRACEME) { + ret = ptrace_traceme(); ++ if (!ret) ++ arch_ptrace_attach(current); + goto out; + } + +diff -Nrup linux-2.6.24/sound/avr32/ac97c.c linux-avr32/sound/avr32/ac97c.c +--- linux-2.6.24/sound/avr32/ac97c.c 1969-12-31 19:00:00.000000000 -0500 ++++ linux-avr32/sound/avr32/ac97c.c 2008-02-01 14:51:48.000000000 -0500 +@@ -0,0 +1,914 @@ ++/* ++ * Driver for the Atmel AC97 controller ++ * ++ * Copyright (C) 2005-2007 Atmel Corporation ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 as published by ++ * the Free Software Foundation. ++ */ ++#include <linux/clk.h> ++#include <linux/delay.h> ++#include <linux/dma-mapping.h> ++#include <linux/init.h> ++#include <linux/interrupt.h> ++#include <linux/module.h> ++#include <linux/platform_device.h> ++#include <linux/mutex.h> ++#include <linux/io.h> ++ ++#include <sound/driver.h> ++#include <sound/core.h> ++#include <sound/initval.h> ++#include <sound/pcm.h> ++#include <sound/pcm_params.h> ++#include <sound/ac97_codec.h> ++#include <sound/memalloc.h> ++ ++#include <asm/dma-controller.h> ++ ++#include "ac97c.h" ++ ++/* Serialize access to opened */ ++static DEFINE_MUTEX(opened_mutex); ++ ++struct atmel_ac97_dma_info { ++ struct dma_request_cyclic req_tx; ++ struct dma_request_cyclic req_rx; ++ unsigned short rx_periph_id; ++ unsigned short tx_periph_id; ++}; ++ ++struct atmel_ac97 { ++ /* Serialize access to opened */ ++ spinlock_t lock; ++ void __iomem *regs; ++ struct snd_pcm_substream *playback_substream; ++ struct snd_pcm_substream *capture_substream; ++ struct snd_card *card; ++ struct snd_pcm *pcm; ++ struct snd_ac97 *ac97; ++ struct snd_ac97_bus *ac97_bus; ++ int opened; ++ int period; ++ u64 cur_format; ++ unsigned int cur_rate; ++ struct clk *mck; ++ struct platform_device *pdev; ++ struct atmel_ac97_dma_info dma; ++}; ++ ++#define get_chip(card) ((struct atmel_ac97 *)(card)->private_data) ++ ++#define ac97c_writel(chip, reg, val) \ ++ __raw_writel((val), (chip)->regs + AC97C_##reg) ++#define ac97c_readl(chip, reg) \ ++ __raw_readl((chip)->regs + AC97C_##reg) ++ ++/* ++ * PCM part ++ */ ++static struct snd_pcm_hardware snd_atmel_ac97_playback_hw = { ++ .info = (SNDRV_PCM_INFO_INTERLEAVED ++ | SNDRV_PCM_INFO_MMAP ++ | SNDRV_PCM_INFO_MMAP_VALID ++ | SNDRV_PCM_INFO_BLOCK_TRANSFER ++ | SNDRV_PCM_INFO_JOINT_DUPLEX), ++ .formats = (SNDRV_PCM_FMTBIT_S16_BE ++ | SNDRV_PCM_FMTBIT_S16_LE), ++ .rates = (SNDRV_PCM_RATE_CONTINUOUS), ++ .rate_min = 4000, ++ .rate_max = 48000, ++ .channels_min = 1, ++ .channels_max = 6, ++ .buffer_bytes_max = 64*1024, ++ .period_bytes_min = 512, ++ .period_bytes_max = 4095, ++ .periods_min = 8, ++ .periods_max = 1024, ++}; ++ ++static struct snd_pcm_hardware snd_atmel_ac97_capture_hw = { ++ .info = (SNDRV_PCM_INFO_INTERLEAVED ++ | SNDRV_PCM_INFO_MMAP ++ | SNDRV_PCM_INFO_MMAP_VALID ++ | SNDRV_PCM_INFO_BLOCK_TRANSFER ++ | SNDRV_PCM_INFO_JOINT_DUPLEX), ++ .formats = (SNDRV_PCM_FMTBIT_S16_BE ++ | SNDRV_PCM_FMTBIT_S16_LE), ++ .rates = (SNDRV_PCM_RATE_CONTINUOUS), ++ .rate_min = 4000, ++ .rate_max = 48000, ++ .channels_min = 1, ++ .channels_max = 2, ++ .buffer_bytes_max = 64*1024, ++ .period_bytes_min = 512, ++ .period_bytes_max = 4095, ++ .periods_min = 8, ++ .periods_max = 1024, ++}; ++ ++/* ++ * PCM functions ++ */ ++static int ++snd_atmel_ac97_playback_open(struct snd_pcm_substream *substream) ++{ ++ struct atmel_ac97 *chip = snd_pcm_substream_chip(substream); ++ struct snd_pcm_runtime *runtime = substream->runtime; ++ ++ mutex_lock(&opened_mutex); ++ chip->opened++; ++ runtime->hw = snd_atmel_ac97_playback_hw; ++ if (chip->cur_rate) { ++ runtime->hw.rate_min = chip->cur_rate; ++ runtime->hw.rate_max = chip->cur_rate; ++ } ++ if (chip->cur_format) ++ runtime->hw.formats = (1ULL << chip->cur_format); ++ mutex_unlock(&opened_mutex); ++ chip->playback_substream = substream; ++ chip->period = 0; ++ return 0; ++} ++ ++static int ++snd_atmel_ac97_capture_open(struct snd_pcm_substream *substream) ++{ ++ struct atmel_ac97 *chip = snd_pcm_substream_chip(substream); ++ struct snd_pcm_runtime *runtime = substream->runtime; ++ ++ mutex_lock(&opened_mutex); ++ chip->opened++; ++ runtime->hw = snd_atmel_ac97_capture_hw; ++ if (chip->cur_rate) { ++ runtime->hw.rate_min = chip->cur_rate; ++ runtime->hw.rate_max = chip->cur_rate; ++ } ++ if (chip->cur_format) ++ runtime->hw.formats = (1ULL << chip->cur_format); ++ mutex_unlock(&opened_mutex); ++ chip->capture_substream = substream; ++ chip->period = 0; ++ return 0; ++} ++ ++static int snd_atmel_ac97_playback_close(struct snd_pcm_substream *substream) ++{ ++ struct atmel_ac97 *chip = snd_pcm_substream_chip(substream); ++ mutex_lock(&opened_mutex); ++ chip->opened--; ++ if (!chip->opened) { ++ chip->cur_rate = 0; ++ chip->cur_format = 0; ++ } ++ mutex_unlock(&opened_mutex); ++ return 0; ++} ++ ++static int snd_atmel_ac97_capture_close(struct snd_pcm_substream *substream) ++{ ++ struct atmel_ac97 *chip = snd_pcm_substream_chip(substream); ++ mutex_lock(&opened_mutex); ++ chip->opened--; ++ if (!chip->opened) { ++ chip->cur_rate = 0; ++ chip->cur_format = 0; ++ } ++ mutex_unlock(&opened_mutex); ++ return 0; ++} ++ ++static int ++snd_atmel_ac97_playback_hw_params(struct snd_pcm_substream *substream, ++ struct snd_pcm_hw_params *hw_params) ++{ ++ struct atmel_ac97 *chip = snd_pcm_substream_chip(substream); ++ int err; ++ ++ err = snd_pcm_lib_malloc_pages(substream, ++ params_buffer_bytes(hw_params)); ++ if (err < 0) ++ return err; ++ ++ /* Set restrictions to params */ ++ mutex_lock(&opened_mutex); ++ chip->cur_rate = params_rate(hw_params); ++ chip->cur_format = params_format(hw_params); ++ mutex_unlock(&opened_mutex); ++ ++ return 0; ++} ++ ++static int ++snd_atmel_ac97_capture_hw_params(struct snd_pcm_substream *substream, ++ struct snd_pcm_hw_params *hw_params) ++{ ++ struct atmel_ac97 *chip = snd_pcm_substream_chip(substream); ++ int err; ++ ++ err = snd_pcm_lib_malloc_pages(substream, ++ params_buffer_bytes(hw_params)); ++ if (err < 0) ++ return err; ++ ++ /* Set restrictions to params */ ++ mutex_lock(&opened_mutex); ++ chip->cur_rate = params_rate(hw_params); ++ chip->cur_format = params_format(hw_params); ++ mutex_unlock(&opened_mutex); ++ ++ return 0; ++} ++ ++static int snd_atmel_ac97_playback_hw_free(struct snd_pcm_substream *substream) ++{ ++ return snd_pcm_lib_free_pages(substream); ++} ++ ++static int snd_atmel_ac97_capture_hw_free(struct snd_pcm_substream *substream) ++{ ++ ++ return snd_pcm_lib_free_pages(substream); ++} ++ ++static int snd_atmel_ac97_playback_prepare(struct snd_pcm_substream *substream) ++{ ++ struct atmel_ac97 *chip = snd_pcm_substream_chip(substream); ++ struct platform_device *pdev = chip->pdev; ++ struct snd_pcm_runtime *runtime = substream->runtime; ++ int block_size = frames_to_bytes(runtime, runtime->period_size); ++ unsigned long word = 0; ++ unsigned long buffer_size = 0; ++ ++ dma_sync_single_for_device(&pdev->dev, runtime->dma_addr, ++ block_size * 2, DMA_TO_DEVICE); ++ ++ /* Assign slots to channels */ ++ switch (substream->runtime->channels) { ++ case 1: ++ word |= AC97C_CH_ASSIGN(PCM_LEFT, A); ++ break; ++ case 2: ++ /* Assign Left and Right slot to Channel A */ ++ word |= AC97C_CH_ASSIGN(PCM_LEFT, A) ++ | AC97C_CH_ASSIGN(PCM_RIGHT, A); ++ break; ++ default: ++ /* TODO: support more than two channels */ ++ return -EINVAL; ++ break; ++ } ++ ac97c_writel(chip, OCA, word); ++ ++ /* Configure sample format and size */ ++ word = AC97C_CMR_PDCEN | AC97C_CMR_SIZE_16; ++ ++ switch (runtime->format) { ++ case SNDRV_PCM_FORMAT_S16_LE: ++ word |= AC97C_CMR_CEM_LITTLE; ++ break; ++ case SNDRV_PCM_FORMAT_S16_BE: /* fall through */ ++ default: ++ word &= ~AC97C_CMR_CEM_LITTLE; ++ break; ++ } ++ ++ ac97c_writel(chip, CAMR, word); ++ ++ /* Set variable rate if needed */ ++ if (runtime->rate != 48000) { ++ word = ac97c_readl(chip, MR); ++ word |= AC97C_MR_VRA; ++ ac97c_writel(chip, MR, word); ++ } else { ++ /* Clear Variable Rate Bit */ ++ word = ac97c_readl(chip, MR); ++ word &= ~AC97C_MR_VRA; ++ ac97c_writel(chip, MR, word); ++ } ++ ++ /* Set rate */ ++ snd_ac97_set_rate(chip->ac97, AC97_PCM_FRONT_DAC_RATE, runtime->rate); ++ ++ buffer_size = frames_to_bytes(runtime, runtime->period_size) * ++ runtime->periods; ++ ++ chip->dma.req_tx.buffer_size = buffer_size; ++ chip->dma.req_tx.periods = runtime->periods; ++ ++ BUG_ON(chip->dma.req_tx.buffer_size != ++ (chip->dma.req_tx.periods * ++ frames_to_bytes(runtime, runtime->period_size))); ++ ++ chip->dma.req_tx.buffer_start = runtime->dma_addr; ++ chip->dma.req_tx.data_reg = (dma_addr_t)(chip->regs + AC97C_CATHR + 2); ++ chip->dma.req_tx.periph_id = chip->dma.tx_periph_id; ++ chip->dma.req_tx.direction = DMA_DIR_MEM_TO_PERIPH; ++ chip->dma.req_tx.width = DMA_WIDTH_16BIT; ++ chip->dma.req_tx.dev_id = chip; ++ ++ return 0; ++} ++ ++static int snd_atmel_ac97_capture_prepare(struct snd_pcm_substream *substream) ++{ ++ struct atmel_ac97 *chip = snd_pcm_substream_chip(substream); ++ struct platform_device *pdev = chip->pdev; ++ struct snd_pcm_runtime *runtime = substream->runtime; ++ int block_size = frames_to_bytes(runtime, runtime->period_size); ++ unsigned long word = 0; ++ unsigned long buffer_size = 0; ++ ++ dma_sync_single_for_device(&pdev->dev, runtime->dma_addr, ++ block_size * 2, DMA_FROM_DEVICE); ++ ++ /* Assign slots to channels */ ++ switch (substream->runtime->channels) { ++ case 1: ++ word |= AC97C_CH_ASSIGN(PCM_LEFT, A); ++ break; ++ case 2: ++ /* Assign Left and Right slot to Channel A */ ++ word |= AC97C_CH_ASSIGN(PCM_LEFT, A) ++ | AC97C_CH_ASSIGN(PCM_RIGHT, A); ++ break; ++ default: ++ /* TODO: support more than two channels */ ++ return -EINVAL; ++ break; ++ } ++ ac97c_writel(chip, ICA, word); ++ ++ /* Configure sample format and size */ ++ word = AC97C_CMR_PDCEN | AC97C_CMR_SIZE_16; ++ ++ switch (runtime->format) { ++ case SNDRV_PCM_FORMAT_S16_LE: ++ word |= AC97C_CMR_CEM_LITTLE; ++ break; ++ case SNDRV_PCM_FORMAT_S16_BE: ++ default: ++ word &= ~(AC97C_CMR_CEM_LITTLE); ++ break; ++ } ++ ++ ac97c_writel(chip, CAMR, word); ++ ++ /* Set variable rate if needed */ ++ if (runtime->rate != 48000) { ++ word = ac97c_readl(chip, MR); ++ word |= AC97C_MR_VRA; ++ ac97c_writel(chip, MR, word); ++ } else { ++ /* Clear Variable Rate Bit */ ++ word = ac97c_readl(chip, MR); ++ word &= ~(AC97C_MR_VRA); ++ ac97c_writel(chip, MR, word); ++ } ++ ++ /* Set rate */ ++ snd_ac97_set_rate(chip->ac97, AC97_PCM_LR_ADC_RATE, runtime->rate); ++ ++ buffer_size = frames_to_bytes(runtime, runtime->period_size) * ++ runtime->periods; ++ ++ chip->dma.req_rx.buffer_size = buffer_size; ++ chip->dma.req_rx.periods = runtime->periods; ++ ++ BUG_ON(chip->dma.req_rx.buffer_size != ++ (chip->dma.req_rx.periods * ++ frames_to_bytes(runtime, runtime->period_size))); ++ ++ chip->dma.req_rx.buffer_start = runtime->dma_addr; ++ chip->dma.req_rx.data_reg = (dma_addr_t)(chip->regs + AC97C_CARHR + 2); ++ chip->dma.req_rx.periph_id = chip->dma.rx_periph_id; ++ chip->dma.req_rx.direction = DMA_DIR_PERIPH_TO_MEM; ++ chip->dma.req_rx.width = DMA_WIDTH_16BIT; ++ chip->dma.req_rx.dev_id = chip; ++ ++ return 0; ++} ++ ++ static int ++snd_atmel_ac97_playback_trigger(struct snd_pcm_substream *substream, int cmd) ++{ ++ struct atmel_ac97 *chip = snd_pcm_substream_chip(substream); ++ unsigned long camr; ++ int flags, err = 0; ++ ++ spin_lock_irqsave(&chip->lock, flags); ++ camr = ac97c_readl(chip, CAMR); ++ ++ switch (cmd) { ++ case SNDRV_PCM_TRIGGER_START: ++ err = dma_prepare_request_cyclic(chip->dma.req_tx.req.dmac, ++ &chip->dma.req_tx); ++ dma_start_request(chip->dma.req_tx.req.dmac, ++ chip->dma.req_tx.req.channel); ++ camr |= AC97C_CMR_CENA; ++ break; ++ case SNDRV_PCM_TRIGGER_STOP: ++ err = dma_stop_request(chip->dma.req_tx.req.dmac, ++ chip->dma.req_tx.req.channel); ++ if (chip->opened <= 1) ++ camr &= ~AC97C_CMR_CENA; ++ break; ++ default: ++ err = -EINVAL; ++ break; ++ } ++ ++ ac97c_writel(chip, CAMR, camr); ++ ++ spin_unlock_irqrestore(&chip->lock, flags); ++ return err; ++} ++ ++ static int ++snd_atmel_ac97_capture_trigger(struct snd_pcm_substream *substream, int cmd) ++{ ++ struct atmel_ac97 *chip = snd_pcm_substream_chip(substream); ++ unsigned long camr; ++ int flags, err = 0; ++ ++ spin_lock_irqsave(&chip->lock, flags); ++ camr = ac97c_readl(chip, CAMR); ++ ++ switch (cmd) { ++ case SNDRV_PCM_TRIGGER_START: ++ err = dma_prepare_request_cyclic(chip->dma.req_rx.req.dmac, ++ &chip->dma.req_rx); ++ dma_start_request(chip->dma.req_rx.req.dmac, ++ chip->dma.req_rx.req.channel); ++ camr |= AC97C_CMR_CENA; ++ break; ++ case SNDRV_PCM_TRIGGER_STOP: ++ err = dma_stop_request(chip->dma.req_rx.req.dmac, ++ chip->dma.req_rx.req.channel); ++ mutex_lock(&opened_mutex); ++ if (chip->opened <= 1) ++ camr &= ~AC97C_CMR_CENA; ++ mutex_unlock(&opened_mutex); ++ break; ++ default: ++ err = -EINVAL; ++ break; ++ } ++ ++ ac97c_writel(chip, CAMR, camr); ++ ++ spin_unlock_irqrestore(&chip->lock, flags); ++ return err; ++} ++ ++ static snd_pcm_uframes_t ++snd_atmel_ac97_playback_pointer(struct snd_pcm_substream *substream) ++{ ++ struct atmel_ac97 *chip = snd_pcm_substream_chip(substream); ++ struct snd_pcm_runtime *runtime = substream->runtime; ++ snd_pcm_uframes_t pos; ++ unsigned long bytes; ++ ++ bytes = (dma_get_current_pos ++ (chip->dma.req_tx.req.dmac, ++ chip->dma.req_tx.req.channel) - runtime->dma_addr); ++ pos = bytes_to_frames(runtime, bytes); ++ if (pos >= runtime->buffer_size) ++ pos -= runtime->buffer_size; ++ ++ return pos; ++} ++ ++ static snd_pcm_uframes_t ++snd_atmel_ac97_capture_pointer(struct snd_pcm_substream *substream) ++{ ++ struct atmel_ac97 *chip = snd_pcm_substream_chip(substream); ++ struct snd_pcm_runtime *runtime = substream->runtime; ++ snd_pcm_uframes_t pos; ++ unsigned long bytes; ++ ++ bytes = (dma_get_current_pos ++ (chip->dma.req_rx.req.dmac, ++ chip->dma.req_rx.req.channel) ++ - runtime->dma_addr); ++ pos = bytes_to_frames(runtime, bytes); ++ if (pos >= runtime->buffer_size) ++ pos -= runtime->buffer_size; ++ ++ ++ return pos; ++} ++ ++static struct snd_pcm_ops atmel_ac97_playback_ops = { ++ .open = snd_atmel_ac97_playback_open, ++ .close = snd_atmel_ac97_playback_close, ++ .ioctl = snd_pcm_lib_ioctl, ++ .hw_params = snd_atmel_ac97_playback_hw_params, ++ .hw_free = snd_atmel_ac97_playback_hw_free, ++ .prepare = snd_atmel_ac97_playback_prepare, ++ .trigger = snd_atmel_ac97_playback_trigger, ++ .pointer = snd_atmel_ac97_playback_pointer, ++}; ++ ++static struct snd_pcm_ops atmel_ac97_capture_ops = { ++ .open = snd_atmel_ac97_capture_open, ++ .close = snd_atmel_ac97_capture_close, ++ .ioctl = snd_pcm_lib_ioctl, ++ .hw_params = snd_atmel_ac97_capture_hw_params, ++ .hw_free = snd_atmel_ac97_capture_hw_free, ++ .prepare = snd_atmel_ac97_capture_prepare, ++ .trigger = snd_atmel_ac97_capture_trigger, ++ .pointer = snd_atmel_ac97_capture_pointer, ++}; ++ ++static struct ac97_pcm atmel_ac97_pcm_defs[] __devinitdata = { ++ /* Playback */ ++ { ++ .exclusive = 1, ++ .r = { { ++ .slots = ((1 << AC97_SLOT_PCM_LEFT) ++ | (1 << AC97_SLOT_PCM_RIGHT) ++ | (1 << AC97_SLOT_PCM_CENTER) ++ | (1 << AC97_SLOT_PCM_SLEFT) ++ | (1 << AC97_SLOT_PCM_SRIGHT) ++ | (1 << AC97_SLOT_LFE)), ++ } } ++ }, ++ /* PCM in */ ++ { ++ .stream = 1, ++ .exclusive = 1, ++ .r = { { ++ .slots = ((1 << AC97_SLOT_PCM_LEFT) ++ | (1 << AC97_SLOT_PCM_RIGHT)), ++ } } ++ }, ++ /* Mic in */ ++ { ++ .stream = 1, ++ .exclusive = 1, ++ .r = { { ++ .slots = (1<<AC97_SLOT_MIC), ++ } } ++ }, ++}; ++ ++static int __devinit snd_atmel_ac97_pcm_new(struct atmel_ac97 *chip) ++{ ++ struct snd_pcm *pcm; ++ int err; ++ ++ err = snd_ac97_pcm_assign(chip->ac97_bus, ++ ARRAY_SIZE(atmel_ac97_pcm_defs), ++ atmel_ac97_pcm_defs); ++ if (err) ++ return err; ++ ++ err = snd_pcm_new(chip->card, "Atmel-AC97", 0, 1, 1, &pcm); ++ if (err) ++ return err; ++ ++ snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, ++ &atmel_ac97_playback_ops); ++ ++ snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, ++ &atmel_ac97_capture_ops); ++ ++ snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV, ++ &chip->pdev->dev, ++ 128 * 1024, 128 * 1024); ++ ++ pcm->private_data = chip; ++ pcm->info_flags = 0; ++ strcpy(pcm->name, "Atmel-AC97"); ++ chip->pcm = pcm; ++ ++ return 0; ++} ++ ++/* ++ * Mixer part. ++ */ ++static int snd_atmel_ac97_mixer_new(struct atmel_ac97 *chip) ++{ ++ int err; ++ struct snd_ac97_template template; ++ ++ memset(&template, 0, sizeof(template)); ++ template.private_data = chip; ++ err = snd_ac97_mixer(chip->ac97_bus, &template, &chip->ac97); ++ ++ return err; ++} ++ ++static void atmel_ac97_error(struct dma_request *_req) ++{ ++ struct dma_request_cyclic *req = to_dma_request_cyclic(_req); ++ struct atmel_ac97 *chip = req->dev_id; ++ ++ dev_dbg(&chip->pdev->dev, "DMA Controller error, channel %d\n", ++ req->req.channel); ++} ++ ++static void atmel_ac97_block_complete(struct dma_request *_req) ++{ ++ struct dma_request_cyclic *req = to_dma_request_cyclic(_req); ++ struct atmel_ac97 *chip = req->dev_id; ++ if (req->periph_id == chip->dma.tx_periph_id) ++ snd_pcm_period_elapsed(chip->playback_substream); ++ else ++ snd_pcm_period_elapsed(chip->capture_substream); ++} ++ ++/* ++ * Codec part. ++ */ ++static void snd_atmel_ac97_write(struct snd_ac97 *ac97, unsigned short reg, ++ unsigned short val) ++{ ++ struct atmel_ac97 *chip = get_chip(ac97); ++ unsigned long word; ++ int timeout = 40; ++ ++ word = (reg & 0x7f) << 16 | val; ++ ++ do { ++ if (ac97c_readl(chip, COSR) & AC97C_CSR_TXRDY) { ++ ac97c_writel(chip, COTHR, word); ++ return; ++ } ++ udelay(1); ++ } while (--timeout); ++ ++ dev_dbg(&chip->pdev->dev, "codec write timeout\n"); ++} ++ ++static unsigned short snd_atmel_ac97_read(struct snd_ac97 *ac97, ++ unsigned short reg) ++{ ++ struct atmel_ac97 *chip = get_chip(ac97); ++ unsigned long word; ++ int timeout = 40; ++ int write = 10; ++ ++ word = (0x80 | (reg & 0x7f)) << 16; ++ ++ if ((ac97c_readl(chip, COSR) & AC97C_CSR_RXRDY) != 0) ++ ac97c_readl(chip, CORHR); ++ ++retry_write: ++ timeout = 40; ++ ++ do { ++ if ((ac97c_readl(chip, COSR) & AC97C_CSR_TXRDY) != 0) { ++ ac97c_writel(chip, COTHR, word); ++ goto read_reg; ++ } ++ mdelay(10); ++ } while (--timeout); ++ ++ if (!--write) ++ goto timed_out; ++ goto retry_write; ++ ++read_reg: ++ do { ++ if ((ac97c_readl(chip, COSR) & AC97C_CSR_RXRDY) != 0) { ++ unsigned short val = ac97c_readl(chip, CORHR); ++ return val; ++ } ++ mdelay(10); ++ } while (--timeout); ++ ++ if (!--write) ++ goto timed_out; ++ goto retry_write; ++ ++timed_out: ++ dev_dbg(&chip->pdev->dev, "codec read timeout\n"); ++ return 0xffff; ++} ++ ++static void snd_atmel_ac97_reset(struct atmel_ac97 *chip) ++{ ++ ac97c_writel(chip, MR, AC97C_MR_WRST); ++ mdelay(1); ++ ac97c_writel(chip, MR, AC97C_MR_ENA); ++} ++ ++static void snd_atmel_ac97_destroy(struct snd_card *card) ++{ ++ struct atmel_ac97 *chip = get_chip(card); ++ ++ if (chip->regs) ++ iounmap(chip->regs); ++ ++ if (chip->mck) { ++ clk_disable(chip->mck); ++ clk_put(chip->mck); ++ } ++ ++ if (chip->dma.req_tx.req.dmac) { ++ dma_release_channel(chip->dma.req_tx.req.dmac, ++ chip->dma.req_tx.req.channel); ++ } ++ if (chip->dma.req_rx.req.dmac) { ++ dma_release_channel(chip->dma.req_rx.req.dmac, ++ chip->dma.req_rx.req.channel); ++ } ++} ++ ++static int __devinit snd_atmel_ac97_create(struct snd_card *card, ++ struct platform_device *pdev) ++{ ++ static struct snd_ac97_bus_ops ops = { ++ .write = snd_atmel_ac97_write, ++ .read = snd_atmel_ac97_read, ++ }; ++ struct atmel_ac97 *chip = get_chip(card); ++ struct resource *regs; ++ struct clk *mck; ++ int err; ++ ++ regs = platform_get_resource(pdev, IORESOURCE_MEM, 0); ++ if (!regs) ++ return -ENXIO; ++ ++ mck = clk_get(&pdev->dev, "pclk"); ++ if (IS_ERR(mck)) ++ return PTR_ERR(mck); ++ clk_enable(mck); ++ chip->mck = mck; ++ ++ card->private_free = snd_atmel_ac97_destroy; ++ ++ spin_lock_init(&chip->lock); ++ chip->card = card; ++ chip->pdev = pdev; ++ ++ chip->regs = ioremap(regs->start, regs->end - regs->start + 1); ++ if (!chip->regs) ++ return -ENOMEM; ++ ++ snd_card_set_dev(card, &pdev->dev); ++ ++ err = snd_ac97_bus(card, 0, &ops, chip, &chip->ac97_bus); ++ ++ return err; ++} ++ ++static int __devinit snd_atmel_ac97_probe(struct platform_device *pdev) ++{ ++ static int dev; ++ struct snd_card *card; ++ struct atmel_ac97 *chip; ++ int err; ++ int ch; ++ ++ mutex_init(&opened_mutex); ++ ++ err = -ENOMEM; ++ card = snd_card_new(SNDRV_DEFAULT_IDX1, SNDRV_DEFAULT_STR1, ++ THIS_MODULE, sizeof(struct atmel_ac97)); ++ if (!card) ++ goto out; ++ chip = get_chip(card); ++ ++ err = snd_atmel_ac97_create(card, pdev); ++ if (err) ++ goto out_free_card; ++ ++ snd_atmel_ac97_reset(chip); ++ ++ err = snd_atmel_ac97_mixer_new(chip); ++ if (err) ++ goto out_free_card; ++ ++ err = snd_atmel_ac97_pcm_new(chip); ++ if (err) ++ goto out_free_card; ++ ++ /* TODO: Get this information from the platform device */ ++ chip->dma.req_tx.req.dmac = find_dma_controller(0); ++ if (!chip->dma.req_tx.req.dmac) { ++ dev_dbg(&chip->pdev->dev, "DMA controller for TX missing\n"); ++ err = -ENODEV; ++ goto out_free_card; ++ } ++ chip->dma.req_rx.req.dmac = find_dma_controller(0); ++ if (!chip->dma.req_rx.req.dmac) { ++ dev_dbg(&chip->pdev->dev, "DMA controller for RX missing\n"); ++ err = -ENODEV; ++ goto out_free_card; ++ } ++ ++ chip->dma.rx_periph_id = 3; ++ chip->dma.tx_periph_id = 4; ++ ++ ch = dma_alloc_channel(chip->dma.req_tx.req.dmac); ++ if (ch < 0) { ++ dev_dbg(&chip->pdev->dev, ++ "could not allocate TX DMA channel\n"); ++ err = ch; ++ goto out_free_card; ++ } ++ chip->dma.req_tx.req.channel = ch; ++ chip->dma.req_tx.width = DMA_WIDTH_16BIT; ++ chip->dma.req_tx.req.block_complete = atmel_ac97_block_complete; ++ chip->dma.req_tx.req.error = atmel_ac97_error; ++ ++ ch = dma_alloc_channel(chip->dma.req_rx.req.dmac); ++ if (ch < 0) { ++ dev_dbg(&chip->pdev->dev, ++ "could not allocate RX DMA channel\n"); ++ err = ch; ++ goto out_free_card; ++ } ++ chip->dma.req_rx.req.channel = ch; ++ chip->dma.req_rx.width = DMA_WIDTH_16BIT; ++ chip->dma.req_rx.req.block_complete = atmel_ac97_block_complete; ++ chip->dma.req_rx.req.error = atmel_ac97_error; ++ ++ strcpy(card->driver, "atmel_ac97c"); ++ strcpy(card->shortname, "atmel_ac97c"); ++ sprintf(card->longname, "Atmel AVR32 AC97 controller"); ++ ++ err = snd_card_register(card); ++ if (err) ++ goto out_free_card; ++ ++ platform_set_drvdata(pdev, card); ++ dev++; ++ ++ dev_info(&pdev->dev, "Atmel AVR32 AC97 controller at 0x%p\n", ++ chip->regs); ++ ++ return 0; ++ ++out_free_card: ++ snd_card_free(card); ++out: ++ return err; ++} ++ ++#ifdef CONFIG_PM ++ static int ++snd_atmel_ac97_suspend(struct platform_device *pdev, pm_message_t msg) ++{ ++ struct snd_card *card = platform_get_drvdata(pdev); ++ struct atmel_ac97 *chip = card->private_data; ++ ++ clk_disable(chip->mck); ++ ++ return 0; ++} ++ ++static int snd_atmel_ac97_resume(struct platform_device *pdev) ++{ ++ struct snd_card *card = dev_get_drvdata(pdev); ++ struct atmel_ac97 *chip = card->private_data; ++ ++ clk_enable(chip->mck); ++ ++ return 0; ++} ++#else ++#define snd_atmel_ac97_suspend NULL ++#define snd_atmel_ac97_resume NULL ++#endif ++ ++static int __devexit snd_atmel_ac97_remove(struct platform_device *pdev) ++{ ++ struct snd_card *card = platform_get_drvdata(pdev); ++ ++ snd_card_free(card); ++ platform_set_drvdata(pdev, NULL); ++ return 0; ++} ++ ++static struct platform_driver atmel_ac97_driver = { ++ .remove = __devexit_p(snd_atmel_ac97_remove), ++ .driver = { ++ .name = "atmel_ac97c", ++ }, ++ .suspend = snd_atmel_ac97_suspend, ++ .resume = snd_atmel_ac97_resume, ++}; ++ ++static int __init atmel_ac97_init(void) ++{ ++ return platform_driver_probe(&atmel_ac97_driver, ++ snd_atmel_ac97_probe); ++} ++module_init(atmel_ac97_init); ++ ++static void __exit atmel_ac97_exit(void) ++{ ++ platform_driver_unregister(&atmel_ac97_driver); ++} ++module_exit(atmel_ac97_exit); ++ ++MODULE_LICENSE("GPL"); ++MODULE_DESCRIPTION("Driver for Atmel AC97 Controller"); ++MODULE_AUTHOR("Haavard Skinnemoen <hskinnemoen@atmel.com>"); +diff -Nrup linux-2.6.24/sound/avr32/ac97c.h linux-avr32/sound/avr32/ac97c.h +--- linux-2.6.24/sound/avr32/ac97c.h 1969-12-31 19:00:00.000000000 -0500 ++++ linux-avr32/sound/avr32/ac97c.h 2008-02-01 14:51:48.000000000 -0500 +@@ -0,0 +1,71 @@ ++/* ++ * Register definitions for the Atmel AC97 Controller. ++ * ++ * Copyright (C) 2005-2006 Atmel Corporation ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation. ++ */ ++#ifndef __SOUND_AVR32_AC97C_H ++#define __SOUND_AVR32_AC97C_H ++ ++#define AC97C_MR 0x08 ++#define AC97C_ICA 0x10 ++#define AC97C_OCA 0x14 ++#define AC97C_CARHR 0x20 ++#define AC97C_CATHR 0x24 ++#define AC97C_CASR 0x28 ++#define AC97C_CAMR 0x2c ++#define AC97C_CBRHR 0x30 ++#define AC97C_CBTHR 0x34 ++#define AC97C_CBSR 0x38 ++#define AC97C_CBMR 0x3c ++#define AC97C_CORHR 0x40 ++#define AC97C_COTHR 0x44 ++#define AC97C_COSR 0x48 ++#define AC97C_COMR 0x4c ++#define AC97C_SR 0x50 ++#define AC97C_IER 0x54 ++#define AC97C_IDR 0x58 ++#define AC97C_IMR 0x5c ++#define AC97C_VERSION 0xfc ++ ++#define AC97C_CATPR PDC_TPR ++#define AC97C_CATCR PDC_TCR ++#define AC97C_CATNPR PDC_TNPR ++#define AC97C_CATNCR PDC_TNCR ++#define AC97C_CARPR PDC_RPR ++#define AC97C_CARCR PDC_RCR ++#define AC97C_CARNPR PDC_RNPR ++#define AC97C_CARNCR PDC_RNCR ++#define AC97C_PTCR PDC_PTCR ++ ++#define AC97C_MR_ENA (1 << 0) ++#define AC97C_MR_WRST (1 << 1) ++#define AC97C_MR_VRA (1 << 2) ++ ++#define AC97C_CSR_TXRDY (1 << 0) ++#define AC97C_CSR_UNRUN (1 << 2) ++#define AC97C_CSR_RXRDY (1 << 4) ++#define AC97C_CSR_ENDTX (1 << 10) ++#define AC97C_CSR_ENDRX (1 << 14) ++ ++#define AC97C_CMR_SIZE_20 (0 << 16) ++#define AC97C_CMR_SIZE_18 (1 << 16) ++#define AC97C_CMR_SIZE_16 (2 << 16) ++#define AC97C_CMR_SIZE_10 (3 << 16) ++#define AC97C_CMR_CEM_LITTLE (1 << 18) ++#define AC97C_CMR_CEM_BIG (0 << 18) ++#define AC97C_CMR_CENA (1 << 21) ++#define AC97C_CMR_PDCEN (1 << 22) ++ ++#define AC97C_SR_CAEVT (1 << 3) ++ ++#define AC97C_CH_ASSIGN(slot, channel) \ ++ (AC97C_CHANNEL_##channel << (3 * (AC97_SLOT_##slot - 3))) ++#define AC97C_CHANNEL_NONE 0x0 ++#define AC97C_CHANNEL_A 0x1 ++#define AC97C_CHANNEL_B 0x2 ++ ++#endif /* __SOUND_AVR32_AC97C_H */ +diff -Nrup linux-2.6.24/sound/avr32/Kconfig linux-avr32/sound/avr32/Kconfig +--- linux-2.6.24/sound/avr32/Kconfig 1969-12-31 19:00:00.000000000 -0500 ++++ linux-avr32/sound/avr32/Kconfig 2008-02-01 14:51:48.000000000 -0500 +@@ -0,0 +1,11 @@ ++menu "AVR32 devices" ++ depends on SND != n && AVR32 ++ ++config SND_ATMEL_AC97 ++ tristate "Atmel AC97 Controller Driver" ++ select SND_PCM ++ select SND_AC97_CODEC ++ help ++ ALSA sound driver for the Atmel AC97 controller. ++ ++endmenu +diff -Nrup linux-2.6.24/sound/avr32/Makefile linux-avr32/sound/avr32/Makefile +--- linux-2.6.24/sound/avr32/Makefile 1969-12-31 19:00:00.000000000 -0500 ++++ linux-avr32/sound/avr32/Makefile 2008-02-01 14:51:48.000000000 -0500 +@@ -0,0 +1,3 @@ ++snd-atmel-ac97-objs := ac97c.o ++ ++obj-$(CONFIG_SND_ATMEL_AC97) += snd-atmel-ac97.o +diff -Nrup linux-2.6.24/sound/Kconfig linux-avr32/sound/Kconfig +--- linux-2.6.24/sound/Kconfig 2008-01-24 17:58:37.000000000 -0500 ++++ linux-avr32/sound/Kconfig 2008-02-01 14:51:48.000000000 -0500 +@@ -63,6 +63,8 @@ source "sound/aoa/Kconfig" + + source "sound/arm/Kconfig" + ++source "sound/avr32/Kconfig" ++ + if SPI + source "sound/spi/Kconfig" + endif +diff -Nrup linux-2.6.24/sound/Makefile linux-avr32/sound/Makefile +--- linux-2.6.24/sound/Makefile 2008-01-24 17:58:37.000000000 -0500 ++++ linux-avr32/sound/Makefile 2008-02-01 14:51:48.000000000 -0500 +@@ -6,7 +6,7 @@ obj-$(CONFIG_SOUND_PRIME) += sound_firmw + obj-$(CONFIG_SOUND_PRIME) += oss/ + obj-$(CONFIG_DMASOUND) += oss/ + obj-$(CONFIG_SND) += core/ i2c/ drivers/ isa/ pci/ ppc/ arm/ sh/ synth/ usb/ \ +- sparc/ spi/ parisc/ pcmcia/ mips/ soc/ ++ sparc/ spi/ parisc/ pcmcia/ mips/ soc/ avr32/ + obj-$(CONFIG_SND_AOA) += aoa/ + + # This one must be compilable even if sound is configured out +diff -Nrup linux-2.6.24/sound/oss/at32_abdac.c linux-avr32/sound/oss/at32_abdac.c +--- linux-2.6.24/sound/oss/at32_abdac.c 1969-12-31 19:00:00.000000000 -0500 ++++ linux-avr32/sound/oss/at32_abdac.c 2008-02-01 14:51:49.000000000 -0500 +@@ -0,0 +1,722 @@ ++/* ++ * OSS Sound Driver for the Atmel AT32 on-chip DAC. ++ * ++ * Copyright (C) 2006 Atmel Corporation ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation. ++ */ ++#include <linux/clk.h> ++#include <linux/dma-mapping.h> ++#include <linux/fs.h> ++#include <linux/init.h> ++#include <linux/interrupt.h> ++#include <linux/kernel.h> ++#include <linux/module.h> ++#include <linux/platform_device.h> ++#include <linux/sound.h> ++#include <linux/soundcard.h> ++ ++#include <asm/byteorder.h> ++#include <asm/dma-controller.h> ++#include <asm/io.h> ++#include <asm/uaccess.h> ++ ++/* We want to use the "bizarre" swap-bytes-in-each-halfword macro */ ++#include <linux/byteorder/swabb.h> ++ ++#include "at32_abdac.h" ++ ++#define DMA_BUFFER_SIZE 32768 ++#define DMA_PERIOD_SHIFT 10 ++#define DMA_PERIOD_SIZE (1 << DMA_PERIOD_SHIFT) ++#define DMA_WRITE_THRESHOLD DMA_PERIOD_SIZE ++ ++struct sound_settings { ++ unsigned int format; ++ unsigned int channels; ++ unsigned int sample_rate; ++ /* log2(bytes per sample) */ ++ unsigned int input_order; ++}; ++ ++struct at32_dac { ++ spinlock_t lock; ++ void __iomem *regs; ++ ++ /* head and tail refer to number of words */ ++ struct { ++ u32 *buf; ++ int head; ++ int tail; ++ } dma; ++ ++ struct semaphore sem; ++ wait_queue_head_t write_wait; ++ ++ /* ++ * Read at most ucount bytes from ubuf, translate to 2-channel ++ * signed 16-bit big endian format and write to the DMA buffer ++ * as long as there is room left. Return the number of bytes ++ * successfully copied from ubuf, or -EFAULT if the first ++ * sample from ubuf couldn't be read. This function is not ++ * called unless there is room for at least one sample (4 ++ * bytes) in the DMA buffer. ++ */ ++ ssize_t (*trans)(struct at32_dac *dac, const char __user *ubuf, ++ size_t ucount); ++ ++ struct sound_settings dsp_settings; ++ struct dma_request_cyclic req; ++ ++ struct clk *mck; ++ struct clk *sample_clk; ++ struct platform_device *pdev; ++ int busy; ++ int playing; ++ int dev_dsp; ++}; ++static struct at32_dac *the_dac; ++ ++static inline unsigned int abdac_get_head(struct at32_dac *dac) ++{ ++ return dac->dma.head & ((DMA_BUFFER_SIZE / 4) - 1); ++} ++ ++static inline unsigned int abdac_get_tail(struct at32_dac *dac) ++{ ++ return dac->dma.tail & ((DMA_BUFFER_SIZE / 4) - 1); ++} ++ ++static inline unsigned int abdac_dma_space(struct at32_dac *dac) ++{ ++ unsigned int space; ++ ++ space = ((dac->dma.tail - dac->dma.head - 1) ++ & ((DMA_BUFFER_SIZE / 4) - 1)); ++ return space; ++} ++ ++static void abdac_update_dma_tail(struct at32_dac *dac) ++{ ++ dma_addr_t dma_addr; ++ unsigned int new_tail; ++ ++ if (dac->playing) { ++ dma_addr = dma_get_current_pos(dac->req.req.dmac, ++ dac->req.req.channel); ++ new_tail = (dma_addr - dac->req.buffer_start) / 4; ++ if (new_tail >= dac->dma.head ++ && (dac->dma.tail < dac->dma.head ++ || dac->dma.tail > new_tail)) ++ dev_notice(&dac->pdev->dev, "DMA underrun detected!\n"); ++ dac->dma.tail = new_tail; ++ dev_dbg(&dac->pdev->dev, "update tail: 0x%x - 0x%x = %u\n", ++ dma_addr, dac->req.buffer_start, dac->dma.tail); ++ } ++} ++ ++static int abdac_start(struct at32_dac *dac) ++{ ++ int ret; ++ ++ if (dac->playing) ++ return 0; ++ ++ memset(dac->dma.buf, 0, DMA_BUFFER_SIZE); ++ ++ clk_enable(dac->sample_clk); ++ ++ ret = dma_prepare_request_cyclic(dac->req.req.dmac, &dac->req); ++ if (ret) ++ goto out_stop_clock; ++ ++ dev_dbg(&dac->pdev->dev, "starting DMA...\n"); ++ ret = dma_start_request(dac->req.req.dmac, dac->req.req.channel); ++ if (ret) ++ goto out_stop_request; ++ ++ dac_writel(dac, CTRL, DAC_BIT(EN)); ++ dac->playing = 1; ++ ++ return 0; ++ ++out_stop_request: ++ dma_stop_request(dac->req.req.dmac, ++ dac->req.req.channel); ++out_stop_clock: ++ clk_disable(dac->sample_clk); ++ return ret; ++} ++ ++static int abdac_stop(struct at32_dac *dac) ++{ ++ if (dac->playing) { ++ dma_stop_request(dac->req.req.dmac, dac->req.req.channel); ++ dac_writel(dac, DATA, 0); ++ dac_writel(dac, CTRL, 0); ++ dac->playing = 0; ++ clk_disable(dac->sample_clk); ++ } ++ ++ return 0; ++} ++ ++static int abdac_dma_prepare(struct at32_dac *dac) ++{ ++ dac->dma.buf = dma_alloc_coherent(&dac->pdev->dev, DMA_BUFFER_SIZE, ++ &dac->req.buffer_start, GFP_KERNEL); ++ if (!dac->dma.buf) ++ return -ENOMEM; ++ ++ dac->dma.head = dac->dma.tail = 0; ++ dac->req.periods = DMA_BUFFER_SIZE / DMA_PERIOD_SIZE; ++ dac->req.buffer_size = DMA_BUFFER_SIZE; ++ ++ return 0; ++} ++ ++static void abdac_dma_cleanup(struct at32_dac *dac) ++{ ++ if (dac->dma.buf) ++ dma_free_coherent(&dac->pdev->dev, DMA_BUFFER_SIZE, ++ dac->dma.buf, dac->req.buffer_start); ++ dac->dma.buf = NULL; ++} ++ ++static void abdac_dma_block_complete(struct dma_request *req) ++{ ++ struct dma_request_cyclic *creq = to_dma_request_cyclic(req); ++ struct at32_dac *dac = container_of(creq, struct at32_dac, req); ++ ++ wake_up(&dac->write_wait); ++} ++ ++static void abdac_dma_error(struct dma_request *req) ++{ ++ struct dma_request_cyclic *creq = to_dma_request_cyclic(req); ++ struct at32_dac *dac = container_of(creq, struct at32_dac, req); ++ ++ dev_err(&dac->pdev->dev, "DMA error\n"); ++} ++ ++static irqreturn_t abdac_interrupt(int irq, void *dev_id) ++{ ++ struct at32_dac *dac = dev_id; ++ u32 status; ++ ++ status = dac_readl(dac, INT_STATUS); ++ if (status & DAC_BIT(UNDERRUN)) { ++ dev_err(&dac->pdev->dev, "Underrun detected!\n"); ++ dac_writel(dac, INT_CLR, DAC_BIT(UNDERRUN)); ++ } else { ++ dev_err(&dac->pdev->dev, "Spurious interrupt (status=0x%x)\n", ++ status); ++ dac_writel(dac, INT_CLR, status); ++ } ++ ++ return IRQ_HANDLED; ++} ++ ++static ssize_t trans_s16be(struct at32_dac *dac, const char __user *ubuf, ++ size_t ucount) ++{ ++ ssize_t ret; ++ ++ if (dac->dsp_settings.channels == 2) { ++ const u32 __user *up = (const u32 __user *)ubuf; ++ u32 sample; ++ ++ for (ret = 0; ret < (ssize_t)(ucount - 3); ret += 4) { ++ if (!abdac_dma_space(dac)) ++ break; ++ ++ if (unlikely(__get_user(sample, up++))) { ++ if (ret == 0) ++ ret = -EFAULT; ++ break; ++ } ++ dac->dma.buf[abdac_get_head(dac)] = sample; ++ dac->dma.head++; ++ } ++ } else { ++ const u16 __user *up = (const u16 __user *)ubuf; ++ u16 sample; ++ ++ for (ret = 0; ret < (ssize_t)(ucount - 1); ret += 2) { ++ if (!abdac_dma_space(dac)) ++ break; ++ ++ if (unlikely(__get_user(sample, up++))) { ++ if (ret == 0) ++ ret = -EFAULT; ++ break; ++ } ++ dac->dma.buf[abdac_get_head(dac)] ++ = (sample << 16) | sample; ++ dac->dma.head++; ++ } ++ } ++ ++ return ret; ++} ++ ++static ssize_t trans_s16le(struct at32_dac *dac, const char __user *ubuf, ++ size_t ucount) ++{ ++ ssize_t ret; ++ ++ if (dac->dsp_settings.channels == 2) { ++ const u32 __user *up = (const u32 __user *)ubuf; ++ u32 sample; ++ ++ for (ret = 0; ret < (ssize_t)(ucount - 3); ret += 4) { ++ if (!abdac_dma_space(dac)) ++ break; ++ ++ if (unlikely(__get_user(sample, up++))) { ++ if (ret == 0) ++ ret = -EFAULT; ++ break; ++ } ++ /* Swap bytes in each halfword */ ++ dac->dma.buf[abdac_get_head(dac)] = swahb32(sample); ++ dac->dma.head++; ++ } ++ } else { ++ const u16 __user *up = (const u16 __user *)ubuf; ++ u16 sample; ++ ++ for (ret = 0; ret < (ssize_t)(ucount - 1); ret += 2) { ++ if (!abdac_dma_space(dac)) ++ break; ++ ++ if (unlikely(__get_user(sample, up++))) { ++ if (ret == 0) ++ ret = -EFAULT; ++ break; ++ } ++ sample = swab16(sample); ++ dac->dma.buf[abdac_get_head(dac)] ++ = (sample << 16) | sample; ++ dac->dma.head++; ++ } ++ } ++ ++ return ret; ++} ++ ++static ssize_t abdac_dma_translate_from_user(struct at32_dac *dac, ++ const char __user *buffer, ++ size_t count) ++{ ++ /* At least one buffer must be available at this point */ ++ dev_dbg(&dac->pdev->dev, "copying %zu bytes from user...\n", count); ++ ++ return dac->trans(dac, buffer, count); ++} ++ ++static int abdac_set_format(struct at32_dac *dac, int format) ++{ ++ unsigned int order; ++ ++ switch (format) { ++ case AFMT_S16_BE: ++ order = 1; ++ dac->trans = trans_s16be; ++ break; ++ case AFMT_S16_LE: ++ order = 1; ++ dac->trans = trans_s16le; ++ break; ++ default: ++ dev_dbg(&dac->pdev->dev, "unsupported format: %d\n", format); ++ return -EINVAL; ++ } ++ ++ if (dac->dsp_settings.channels == 2) ++ order++; ++ ++ dac->dsp_settings.input_order = order; ++ dac->dsp_settings.format = format; ++ return 0; ++} ++ ++static int abdac_set_sample_rate(struct at32_dac *dac, unsigned long rate) ++{ ++ unsigned long new_rate; ++ int ret; ++ ++ ret = clk_set_rate(dac->sample_clk, 256 * rate); ++ if (ret < 0) ++ return ret; ++ ++ /* TODO: mplayer seems to have a problem with this */ ++#if 0 ++ new_rate = clk_get_rate(dac->sample_clk); ++ dac->dsp_settings.sample_rate = new_rate / 256; ++#else ++ dac->dsp_settings.sample_rate = rate; ++#endif ++ ++ return 0; ++} ++ ++static ssize_t abdac_dsp_write(struct file *file, ++ const char __user *buffer, ++ size_t count, loff_t *ppos) ++{ ++ struct at32_dac *dac = file->private_data; ++ DECLARE_WAITQUEUE(wait, current); ++ unsigned int avail; ++ ssize_t copied; ++ ssize_t ret; ++ ++ /* Avoid address space checking in the translation functions */ ++ if (!access_ok(buffer, count, VERIFY_READ)) ++ return -EFAULT; ++ ++ down(&dac->sem); ++ ++ if (!dac->dma.buf) { ++ ret = abdac_dma_prepare(dac); ++ if (ret) ++ goto out; ++ } ++ ++ add_wait_queue(&dac->write_wait, &wait); ++ ret = 0; ++ while (count > 0) { ++ do { ++ abdac_update_dma_tail(dac); ++ avail = abdac_dma_space(dac); ++ set_current_state(TASK_INTERRUPTIBLE); ++ if (avail >= DMA_WRITE_THRESHOLD) ++ break; ++ ++ if (file->f_flags & O_NONBLOCK) { ++ if (!ret) ++ ret = -EAGAIN; ++ goto out; ++ } ++ ++ pr_debug("Going to wait (avail = %u, count = %zu)\n", ++ avail, count); ++ ++ up(&dac->sem); ++ schedule(); ++ if (signal_pending(current)) { ++ if (!ret) ++ ret = -ERESTARTSYS; ++ goto out_nosem; ++ } ++ down(&dac->sem); ++ } while (1); ++ ++ copied = abdac_dma_translate_from_user(dac, buffer, count); ++ if (copied < 0) { ++ if (!ret) ++ ret = -EFAULT; ++ goto out; ++ } ++ ++ abdac_start(dac); ++ ++ count -= copied; ++ ret += copied; ++ } ++ ++out: ++ up(&dac->sem); ++out_nosem: ++ remove_wait_queue(&dac->write_wait, &wait); ++ set_current_state(TASK_RUNNING); ++ return ret; ++} ++ ++static int abdac_dsp_ioctl(struct inode *inode, struct file *file, ++ unsigned int cmd, unsigned long arg) ++{ ++ struct at32_dac *dac = file->private_data; ++ int __user *up = (int __user *)arg; ++ struct audio_buf_info abinfo; ++ int val, ret; ++ ++ switch (cmd) { ++ case OSS_GETVERSION: ++ return put_user(SOUND_VERSION, up); ++ ++ case SNDCTL_DSP_SPEED: ++ if (get_user(val, up)) ++ return -EFAULT; ++ if (val >= 0) { ++ abdac_stop(dac); ++ ret = abdac_set_sample_rate(dac, val); ++ if (ret) ++ return ret; ++ } ++ return put_user(dac->dsp_settings.sample_rate, up); ++ ++ case SNDCTL_DSP_STEREO: ++ if (get_user(val, up)) ++ return -EFAULT; ++ abdac_stop(dac); ++ if (val && dac->dsp_settings.channels == 1) ++ dac->dsp_settings.input_order++; ++ else if (!val && dac->dsp_settings.channels != 1) ++ dac->dsp_settings.input_order--; ++ dac->dsp_settings.channels = val ? 2 : 1; ++ return 0; ++ ++ case SNDCTL_DSP_CHANNELS: ++ if (get_user(val, up)) ++ return -EFAULT; ++ ++ if (val) { ++ if (val < 0 || val > 2) ++ return -EINVAL; ++ ++ abdac_stop(dac); ++ dac->dsp_settings.input_order ++ += val - dac->dsp_settings.channels; ++ dac->dsp_settings.channels = val; ++ } ++ return put_user(val, (int *)arg); ++ ++ case SNDCTL_DSP_GETFMTS: ++ return put_user(AFMT_S16_BE | AFMT_S16_BE, up); ++ ++ case SNDCTL_DSP_SETFMT: ++ if (get_user(val, up)) ++ return -EFAULT; ++ ++ if (val == AFMT_QUERY) { ++ val = dac->dsp_settings.format; ++ } else { ++ ret = abdac_set_format(dac, val); ++ if (ret) ++ return ret; ++ } ++ return put_user(val, up); ++ ++ case SNDCTL_DSP_GETOSPACE: ++ abdac_update_dma_tail(dac); ++ abinfo.fragsize = ((1 << dac->dsp_settings.input_order) ++ * (DMA_PERIOD_SIZE / 4)); ++ abinfo.bytes = (abdac_dma_space(dac) ++ << dac->dsp_settings.input_order); ++ abinfo.fragstotal = ((DMA_BUFFER_SIZE * 4) ++ >> (DMA_PERIOD_SHIFT ++ + dac->dsp_settings.input_order)); ++ abinfo.fragments = ((abinfo.bytes ++ >> dac->dsp_settings.input_order) ++ / (DMA_PERIOD_SIZE / 4)); ++ pr_debug("fragments=%d fragstotal=%d fragsize=%d bytes=%d\n", ++ abinfo.fragments, abinfo.fragstotal, abinfo.fragsize, ++ abinfo.bytes); ++ return copy_to_user(up, &abinfo, sizeof(abinfo)) ? -EFAULT : 0; ++ ++ default: ++ dev_dbg(&dac->pdev->dev, "Unimplemented ioctl cmd: 0x%x\n", cmd); ++ return -EINVAL; ++ } ++} ++ ++static int abdac_dsp_open(struct inode *inode, struct file *file) ++{ ++ struct at32_dac *dac = the_dac; ++ int ret; ++ ++ if (file->f_mode & FMODE_READ) ++ return -ENXIO; ++ ++ down(&dac->sem); ++ ret = -EBUSY; ++ if (dac->busy) ++ goto out; ++ ++ dac->dma.head = dac->dma.tail = 0; ++ ++ /* FIXME: What are the correct defaults? */ ++ dac->dsp_settings.channels = 2; ++ abdac_set_format(dac, AFMT_S16_BE); ++ ret = abdac_set_sample_rate(dac, 8000); ++ if (ret) ++ goto out; ++ ++ file->private_data = dac; ++ dac->busy = 1; ++ ++ ret = 0; ++ ++out: ++ up(&dac->sem); ++ return ret; ++} ++ ++static int abdac_dsp_release(struct inode *inode, struct file *file) ++{ ++ struct at32_dac *dac = file->private_data; ++ ++ down(&dac->sem); ++ ++ abdac_stop(dac); ++ abdac_dma_cleanup(dac); ++ dac->busy = 0; ++ ++ up(&dac->sem); ++ ++ return 0; ++} ++ ++static struct file_operations abdac_dsp_fops = { ++ .owner = THIS_MODULE, ++ .llseek = no_llseek, ++ .write = abdac_dsp_write, ++ .ioctl = abdac_dsp_ioctl, ++ .open = abdac_dsp_open, ++ .release = abdac_dsp_release, ++}; ++ ++static int __init abdac_probe(struct platform_device *pdev) ++{ ++ struct at32_dac *dac; ++ struct resource *regs; ++ struct clk *mck; ++ struct clk *sample_clk; ++ int irq; ++ int ret; ++ ++ if (the_dac) ++ return -EBUSY; ++ ++ regs = platform_get_resource(pdev, IORESOURCE_MEM, 0); ++ if (!regs) ++ return -ENXIO; ++ irq = platform_get_irq(pdev, 0); ++ if (irq < 0) ++ return irq; ++ ++ mck = clk_get(&pdev->dev, "pclk"); ++ if (IS_ERR(mck)) ++ return PTR_ERR(mck); ++ sample_clk = clk_get(&pdev->dev, "sample_clk"); ++ if (IS_ERR(sample_clk)) { ++ ret = PTR_ERR(sample_clk); ++ goto out_put_mck; ++ } ++ clk_enable(mck); ++ ++ ret = -ENOMEM; ++ dac = kzalloc(sizeof(struct at32_dac), GFP_KERNEL); ++ if (!dac) ++ goto out_disable_clk; ++ ++ spin_lock_init(&dac->lock); ++ init_MUTEX(&dac->sem); ++ init_waitqueue_head(&dac->write_wait); ++ dac->pdev = pdev; ++ dac->mck = mck; ++ dac->sample_clk = sample_clk; ++ ++ dac->regs = ioremap(regs->start, regs->end - regs->start + 1); ++ if (!dac->regs) ++ goto out_free_dac; ++ ++ ret = request_irq(irq, abdac_interrupt, 0, "dac", dac); ++ if (ret) ++ goto out_unmap_regs; ++ ++ /* FIXME */ ++ dac->req.req.dmac = find_dma_controller(0); ++ if (!dac->req.req.dmac) ++ goto out_free_irq; ++ ++ ret = dma_alloc_channel(dac->req.req.dmac); ++ if (ret < 0) ++ goto out_free_irq; ++ ++ dac->req.req.channel = ret; ++ dac->req.req.block_complete = abdac_dma_block_complete; ++ dac->req.req.error = abdac_dma_error; ++ dac->req.data_reg = regs->start + DAC_DATA; ++ dac->req.periph_id = 2; /* FIXME */ ++ dac->req.direction = DMA_DIR_MEM_TO_PERIPH; ++ dac->req.width = DMA_WIDTH_32BIT; ++ ++ /* Make sure the DAC is silent and disabled */ ++ dac_writel(dac, DATA, 0); ++ dac_writel(dac, CTRL, 0); ++ ++ ret = register_sound_dsp(&abdac_dsp_fops, -1); ++ if (ret < 0) ++ goto out_free_dma; ++ dac->dev_dsp = ret; ++ ++ /* TODO: Register mixer */ ++ ++ the_dac = dac; ++ platform_set_drvdata(pdev, dac); ++ ++ return 0; ++ ++out_free_dma: ++ dma_release_channel(dac->req.req.dmac, dac->req.req.channel); ++out_free_irq: ++ free_irq(irq, dac); ++out_unmap_regs: ++ iounmap(dac->regs); ++out_free_dac: ++ kfree(dac); ++out_disable_clk: ++ clk_disable(mck); ++ clk_put(sample_clk); ++out_put_mck: ++ clk_put(mck); ++ return ret; ++} ++ ++static int __exit abdac_remove(struct platform_device *pdev) ++{ ++ struct at32_dac *dac; ++ ++ dac = platform_get_drvdata(pdev); ++ if (dac) { ++ unregister_sound_dsp(dac->dev_dsp); ++ dma_release_channel(dac->req.req.dmac, dac->req.req.channel); ++ free_irq(platform_get_irq(pdev, 0), dac); ++ iounmap(dac->regs); ++ clk_disable(dac->mck); ++ clk_put(dac->sample_clk); ++ clk_put(dac->mck); ++ kfree(dac); ++ platform_set_drvdata(pdev, NULL); ++ the_dac = NULL; ++ } ++ ++ return 0; ++} ++ ++static struct platform_driver abdac_driver = { ++ .remove = __exit_p(abdac_remove), ++ .driver = { ++ .name = "abdac", ++ }, ++}; ++ ++static int __init abdac_init(void) ++{ ++ return platform_driver_probe(&abdac_driver, abdac_probe); ++} ++module_init(abdac_init); ++ ++static void __exit abdac_exit(void) ++{ ++ platform_driver_unregister(&abdac_driver); ++} ++module_exit(abdac_exit); ++ ++MODULE_AUTHOR("Haavard Skinnemoen <hskinnemoen@atmel.com>"); ++MODULE_DESCRIPTION("Sound Driver for the Atmel AT32 ABDAC"); ++MODULE_LICENSE("GPL"); +diff -Nrup linux-2.6.24/sound/oss/at32_abdac.h linux-avr32/sound/oss/at32_abdac.h +--- linux-2.6.24/sound/oss/at32_abdac.h 1969-12-31 19:00:00.000000000 -0500 ++++ linux-avr32/sound/oss/at32_abdac.h 2008-02-01 14:51:49.000000000 -0500 +@@ -0,0 +1,59 @@ ++/* ++ * Register definitions for the Atmel AT32 on-chip DAC. ++ * ++ * Copyright (C) 2006 Atmel Corporation ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation. ++ */ ++#ifndef __SOUND_OSS_AT32_ABDAC_H__ ++#define __SOUND_OSS_AT32_ABDAC_H__ ++ ++/* DAC register offsets */ ++#define DAC_DATA 0x0000 ++#define DAC_CTRL 0x0008 ++#define DAC_INT_MASK 0x000c ++#define DAC_INT_EN 0x0010 ++#define DAC_INT_DIS 0x0014 ++#define DAC_INT_CLR 0x0018 ++#define DAC_INT_STATUS 0x001c ++#define DAC_PDC_DATA 0x0020 ++ ++/* Bitfields in CTRL */ ++#define DAC_SWAP_OFFSET 30 ++#define DAC_SWAP_SIZE 1 ++#define DAC_EN_OFFSET 31 ++#define DAC_EN_SIZE 1 ++ ++/* Bitfields in INT_MASK/INT_EN/INT_DIS/INT_STATUS/INT_CLR */ ++#define DAC_UNDERRUN_OFFSET 28 ++#define DAC_UNDERRUN_SIZE 1 ++#define DAC_TX_READY_OFFSET 29 ++#define DAC_TX_READY_SIZE 1 ++#define DAC_TX_BUFFER_EMPTY_OFFSET 30 ++#define DAC_TX_BUFFER_EMPTY_SIZE 1 ++#define DAC_CHANNEL_TX_END_OFFSET 31 ++#define DAC_CHANNEL_TX_END_SIZE 1 ++ ++/* Bit manipulation macros */ ++#define DAC_BIT(name) \ ++ (1 << DAC_##name##_OFFSET) ++#define DAC_BF(name, value) \ ++ (((value) & ((1 << DAC_##name##_SIZE) - 1)) \ ++ << DAC_##name##_OFFSET) ++#define DAC_BFEXT(name, value) \ ++ (((value) >> DAC_##name##_OFFSET) \ ++ & ((1 << DAC_##name##_SIZE) - 1)) ++#define DAC_BFINS(name, value, old) \ ++ (((old) & ~(((1 << DAC_##name##_SIZE) - 1) \ ++ << DAC_##name##_OFFSET)) \ ++ | DAC_BF(name,value)) ++ ++/* Register access macros */ ++#define dac_readl(port, reg) \ ++ __raw_readl((port)->regs + DAC_##reg) ++#define dac_writel(port, reg, value) \ ++ __raw_writel((value), (port)->regs + DAC_##reg) ++ ++#endif /* __SOUND_OSS_AT32_ABDAC_H__ */ +diff -Nrup linux-2.6.24/sound/oss/Kconfig linux-avr32/sound/oss/Kconfig +--- linux-2.6.24/sound/oss/Kconfig 2008-01-24 17:58:37.000000000 -0500 ++++ linux-avr32/sound/oss/Kconfig 2008-02-01 14:51:49.000000000 -0500 +@@ -654,3 +654,7 @@ config SOUND_SH_DAC_AUDIO_CHANNEL + int "DAC channel" + default "1" + depends on SOUND_SH_DAC_AUDIO ++ ++config SOUND_AT32_ABDAC ++ tristate "Atmel AT32 Audio Bitstream DAC (ABDAC) support" ++ depends on SOUND_PRIME && AVR32 +diff -Nrup linux-2.6.24/sound/oss/Makefile linux-avr32/sound/oss/Makefile +--- linux-2.6.24/sound/oss/Makefile 2008-01-24 17:58:37.000000000 -0500 ++++ linux-avr32/sound/oss/Makefile 2008-02-01 14:51:49.000000000 -0500 +@@ -10,6 +10,7 @@ obj-$(CONFIG_SOUND_CS4232) += cs4232.o a + + # Please leave it as is, cause the link order is significant ! + ++obj-$(CONFIG_SOUND_AT32_ABDAC) += at32_abdac.o + obj-$(CONFIG_SOUND_SH_DAC_AUDIO) += sh_dac_audio.o + obj-$(CONFIG_SOUND_HAL2) += hal2.o + obj-$(CONFIG_SOUND_AEDSP16) += aedsp16.o diff --git a/target/device/Atmel/arch-avr32/kernel-patches-2.6.24/linux-2.6.24-500-v4l-avr32-isi.patch.cond b/target/device/Atmel/arch-avr32/kernel-patches-2.6.24/linux-2.6.24-500-v4l-avr32-isi.patch.cond new file mode 100644 index 000000000..f79ab82a2 --- /dev/null +++ b/target/device/Atmel/arch-avr32/kernel-patches-2.6.24/linux-2.6.24-500-v4l-avr32-isi.patch.cond @@ -0,0 +1,2954 @@ +diff --git a/include/linux/videodev2.h b/include/linux/videodev2.h +index 441b877..3a85a5e 100644 +--- a/include/linux/videodev2.h ++++ b/include/linux/videodev2.h +@@ -298,6 +298,9 @@ struct v4l2_pix_format + #define V4L2_PIX_FMT_PWC2 v4l2_fourcc('P','W','C','2') /* pwc newer webcam */ + #define V4L2_PIX_FMT_ET61X251 v4l2_fourcc('E','6','2','5') /* ET61X251 compression */ + ++/* Byte-swapped YUYV */ ++#define V4L2_PIX_FMT_VYUY v4l2_fourcc('V','Y','U','Y') /* 16 YUV 4:2:2 */ ++#define V4L2_PIX_FMT_YVYU v4l2_fourcc('Y','V','Y','U') /* 16 YUV 4:2:2 */ + /* + * F O R M A T E N U M E R A T I O N + */ +diff --git a/drivers/media/video/Makefile b/drivers/media/video/Makefile +index 44ccaed..78e38d0 100644 +--- a/drivers/media/video/Makefile ++++ b/drivers/media/video/Makefile +@@ -77,6 +77,7 @@ obj-$(CONFIG_VIDEO_HEXIUM_ORION) += hexium_orion.o + obj-$(CONFIG_VIDEO_HEXIUM_GEMINI) += hexium_gemini.o + obj-$(CONFIG_VIDEO_DPC) += dpc7146.o + obj-$(CONFIG_TUNER_3036) += tuner-3036.o ++obj-$(CONFIG_VIDEO_AVR32_ISI) += atmel-isi.o + + obj-$(CONFIG_VIDEO_TUNER) += tuner.o + obj-$(CONFIG_VIDEO_BUF) += video-buf.o +diff --git a/drivers/media/video/atmel-isi.c b/drivers/media/video/atmel-isi.c +new file mode 100644 +index 0000000..a53a3c0 +--- /dev/null ++++ b/drivers/media/video/atmel-isi.c +@@ -0,0 +1,1868 @@ ++/* ++ * Copyright (c) 2007 Atmel Corporation ++ * ++ * Based on the bttv driver for Bt848 with respective copyright holders ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation. ++ */ ++#define DEBUG ++#include <linux/clk.h> ++#include <linux/completion.h> ++#include <linux/dma-mapping.h> ++#include <linux/fs.h> ++#include <linux/init.h> ++#include <linux/interrupt.h> ++#include <linux/ioctl.h> ++#include <linux/kernel.h> ++#include <linux/mm.h> ++#include <linux/module.h> ++#include <linux/moduleparam.h> ++#include <linux/platform_device.h> ++#include <linux/slab.h> ++#include <linux/version.h> ++#include <linux/videodev2.h> ++#include <linux/wait.h> ++ ++#include <linux/kfifo.h> ++ ++#include <asm/io.h> ++ ++#include <media/v4l2-common.h> ++ ++#include "atmel-isi.h" ++ ++#define ATMEL_ISI_VERSION KERNEL_VERSION(0, 1, 0) ++#define ISI_CODEC 0 ++ ++/* Default ISI capture buffer size */ ++#define ISI_CAPTURE_BUFFER_SIZE 800*600*2 ++/* Default ISI video frame size */ ++#define ISI_VIDEO_BUFFER_SIZE 320*240*2 ++/* Default number of ISI video buffers */ ++#define ISI_VIDEO_BUFFERS 4 ++/* Maximum number of video buffers */ ++#define ISI_VIDEO_BUFFERS_MAX 8 ++ ++/* Interrupt mask for a single capture */ ++#define ISI_CAPTURE_MASK (ISI_BIT(SOF) | ISI_BIT(FO_C_EMP)) ++ ++/* ISI capture buffer size */ ++static int capture_buffer_size = ISI_CAPTURE_BUFFER_SIZE; ++/* Number of buffers used for streaming video */ ++static int video_buffers = 4; ++static int video_buffer_size = ISI_VIDEO_BUFFER_SIZE; ++ ++/* Preview path horizontal size */ ++static int prev_hsize = 320; ++/* Preview path vertical size */ ++static int prev_vsize = 240; ++/* Scaling factor of the preview path */ ++static int prev_decimation_factor = 1; ++ ++/* Input image horizontal size */ ++static int image_hsize = 320; ++ ++/* Input image vertical size */ ++static int image_vsize = 240; ++ ++/* Frame rate scaler ++ * 1 = capture every second frame ++ * 2 = capture every third frame ++ * ... ++ * */ ++static int frame_rate_scaler = 2; ++ ++/* Set this value if we want to pretend a specific V4L2 output format ++ * This format is for the capturing interface ++ */ ++static int capture_v4l2_fmt = V4L2_PIX_FMT_YUYV; ++/* Set this value if we want to pretend a specific V4L2 output format ++ * This format is for the streaming interface ++ */ ++static int streaming_v4l2_fmt = V4L2_PIX_FMT_YUYV; ++ ++MODULE_PARM_DESC(video_buffers,"Number of frame buffers used for streaming"); ++module_param(video_buffers, int, 0664); ++MODULE_PARM_DESC(capture_buffer_size,"Capture buffer size"); ++module_param(capture_buffer_size, int, 0664); ++MODULE_PARM_DESC(image_hsize,"Horizontal size of input image"); ++module_param(image_hsize, int, 0664); ++MODULE_PARM_DESC(image_vsize,"Vertical size of input image"); ++module_param(image_vsize, int, 0664); ++MODULE_PARM_DESC(frame_rate_scaler, "Frame rate scaler"); ++module_param(frame_rate_scaler, int, 0664); ++MODULE_PARM_DESC(prev_hsize, "Horizontal image size of preview path output"); ++module_param(prev_hsize, int, 0664); ++MODULE_PARM_DESC(prev_vsize, "Vertical image size of preview path output"); ++module_param(prev_vsize, int, 0664); ++MODULE_PARM_DESC(prev_decimation_factor, "Preview path decimaion factor"); ++module_param(prev_decimation_factor, int, 0664); ++/* Single frame capturing states */ ++enum { ++ STATE_IDLE = 0, ++ STATE_CAPTURE_READY, ++ STATE_CAPTURE_WAIT_SOF, ++ STATE_CAPTURE_IN_PROGRESS, ++ STATE_CAPTURE_DONE, ++ STATE_CAPTURE_ERROR, ++}; ++ ++/* Frame buffer states ++ * FRAME_UNUSED Frame(buffer) is not used by the ISI module -> an application ++ * can usually read out data in this state ++ * FRAME_QUEUED An application has queued the buffer in the incoming queue ++ * FRAME_DONE The ISI module has filled the buffer with data and placed is on ++ * the outgoing queue ++ * FRAME_ERROR Not used at the moment ++ * */ ++enum frame_status { ++ FRAME_UNUSED, ++ FRAME_QUEUED, ++ FRAME_DONE, ++ FRAME_ERROR, ++}; ++/* Frame buffer descriptor ++ * Used by the ISI module as a linked list for the DMA controller. ++ */ ++struct fbd { ++ /* Physical address of the frame buffer */ ++ dma_addr_t fb_address; ++ /* Physical address of the next fbd */ ++ dma_addr_t next_fbd_address; ++}; ++ ++/* Frame buffer data ++ */ ++struct frame_buffer { ++ /* Frame buffer descriptor ++ * Used by the ISI DMA controller to provide linked list DMA operation ++ */ ++ struct fbd fb_desc; ++ /* Pointer to the start of the frame buffer */ ++ void *frame_buffer; ++ /* Timestamp of the captured frame */ ++ struct timeval timestamp; ++ /* Frame number of the frame */ ++ unsigned long sequence; ++ /* Buffer number*/ ++ int index; ++ /* Bytes used in the buffer for data, needed as buffers are always ++ * aligned to pages and thus may be bigger than the amount of data*/ ++ int bytes_used; ++ /* Mmap count ++ * Counter to measure how often this buffer is mmapped ++ */ ++ int mmap_count; ++ /* Buffer status */ ++ enum frame_status status; ++}; ++ ++struct atmel_isi { ++ /* ISI module spin lock. Protects against concurrent access of variables ++ * that are shared with the ISR */ ++ spinlock_t lock; ++ void __iomem *regs; ++ /* Pointer to the start of the fbd list */ ++ dma_addr_t fbd_list_start; ++ /* Frame buffers */ ++ struct frame_buffer video_buffer[ISI_VIDEO_BUFFERS_MAX]; ++ /* Frame buffer currently used by the ISI module */ ++ struct frame_buffer *current_buffer; ++ /* Size of a frame buffer */ ++ size_t capture_buffer_size; ++ /* Streaming status ++ * If set ISI is in streaming mode */ ++ int streaming; ++ /* Queue for incoming buffers ++ * The buffer number (index) is stored in the fifo as reference ++ */ ++ struct kfifo *grabq; ++ /* Spinlock for the incoming queue */ ++ spinlock_t grabq_lock; ++ /* Queue for outgoing buffers ++ * Buffer number is stored in the fifo as reference ++ */ ++ struct kfifo *doneq; ++ /* Spinlock for the incoming queue */ ++ spinlock_t doneq_lock; ++ ++ /* State of the ISI module in capturing mode */ ++ int state; ++ /* Pointer to ISI buffer */ ++ void *capture_buf; ++ /* Physical address of the capture buffer */ ++ dma_addr_t capture_phys; ++ /* Size of the ISI buffer */ ++ size_t capture_buf_size; ++ /* Capture/streaming wait queue */ ++ wait_queue_head_t capture_wq; ++ ++ struct atmel_isi_camera *camera; ++ struct atmel_isi_format format; ++ struct atmel_isi_format streaming_format; ++ ++ struct mutex mutex; ++ /* User counter for the streaming interface */ ++ int stream_users; ++ /* User counter of the capture interface */ ++ int capture_users; ++ /* Video device for capturing (Codec path) */ ++ struct video_device cdev; ++ /* Video device for streaming (Preview path) */ ++ struct video_device vdev; ++ struct completion reset_complete; ++ struct clk *pclk; ++ struct clk *hclk; ++ struct platform_device *pdev; ++ unsigned int irq; ++}; ++ ++#define to_atmel_isi(vdev) container_of(vdev, struct atmel_isi, vdev) ++ ++struct atmel_isi_fh { ++ struct atmel_isi *isi; ++ unsigned int read_off; ++}; ++ ++/*----------------------------------------------------------------------------- ++ * Interface to the actual camera. ++ */ ++static LIST_HEAD(camera_list); ++static DEFINE_MUTEX(camera_list_mutex); ++ ++static void avr32_isi_release_camera(struct atmel_isi *isi, ++ struct atmel_isi_camera *cam) ++{ ++ mutex_lock(&camera_list_mutex); ++ cam->isi = NULL; ++ isi->camera = NULL; ++ module_put(cam->owner); ++ mutex_unlock(&camera_list_mutex); ++} ++ ++int atmel_isi_register_camera(struct atmel_isi_camera *cam) ++{ ++ pr_debug("atmel_isi: register camera %s\n", cam->name); ++ ++ mutex_lock(&camera_list_mutex); ++ list_add_tail(&cam->list, &camera_list); ++ mutex_unlock(&camera_list_mutex); ++ ++ return 0; ++} ++EXPORT_SYMBOL_GPL(atmel_isi_register_camera); ++ ++void atmel_isi_unregister_camera(struct atmel_isi_camera *cam) ++{ ++ pr_debug("atmel_isi: unregister camera %s\n", cam->name); ++ ++ mutex_lock(&camera_list_mutex); ++ if (cam->isi) ++ cam->isi->camera = NULL; ++ list_del(&cam->list); ++ mutex_unlock(&camera_list_mutex); ++} ++EXPORT_SYMBOL_GPL(atmel_isi_unregister_camera); ++ ++static struct atmel_isi_camera * avr32_isi_grab_camera(struct atmel_isi *isi) ++{ ++ struct atmel_isi_camera *entry, *cam = NULL; ++ ++ mutex_lock(&camera_list_mutex); ++ list_for_each_entry(entry, &camera_list, list) { ++ /* Just grab the first camera available */ ++ if (!entry->isi) { ++ if (!try_module_get(entry->owner)) ++ continue; ++ ++ cam = entry; ++ cam->isi = isi; ++ pr_debug("%s: got camera: %s\n", ++ isi->vdev.name, cam->name); ++ break; ++ } ++ } ++ mutex_unlock(&camera_list_mutex); ++ ++ return cam; ++} ++ ++static int avr32_isi_set_camera_input(struct atmel_isi *isi) ++{ ++ struct atmel_isi_camera *cam = isi->camera; ++ int ret; ++ u32 cr1; ++ u32 cr2; ++ ++ isi->format.pix.width = image_hsize; ++ isi->format.pix.height = image_vsize; ++ isi->format.pix.bytesperline = 0; ++ ++ ret = cam->set_format(cam, &isi->format); ++ if (ret) ++ return ret; ++ ++ ++ switch (isi->format.input_format) { ++ case ATMEL_ISI_PIXFMT_GREY: ++ cr2 = ISI_BIT(GRAYSCALE); ++ break; ++ case ATMEL_ISI_PIXFMT_CbYCrY: ++ cr2 = ISI_BF(YCC_SWAP, 0); ++ break; ++ case ATMEL_ISI_PIXFMT_CrYCbY: ++ cr2 = ISI_BF(YCC_SWAP, 1); ++ break; ++ case ATMEL_ISI_PIXFMT_YCbYCr: ++ cr2 = ISI_BF(YCC_SWAP, 2); ++ break; ++ case ATMEL_ISI_PIXFMT_YCrYCb: ++ cr2 = ISI_BF(YCC_SWAP, 3); ++ break; ++ case ATMEL_ISI_PIXFMT_RGB24: ++ cr2 = ISI_BIT(COL_SPACE) | ISI_BF(RGB_CFG, 0); ++ break; ++ case ATMEL_ISI_PIXFMT_BGR24: ++ cr2 = ISI_BIT(COL_SPACE) | ISI_BF(RGB_CFG, 1); ++ break; ++ case ATMEL_ISI_PIXFMT_RGB16: ++ cr2 = (ISI_BIT(COL_SPACE) | ISI_BIT(RGB_MODE) ++ | ISI_BF(RGB_CFG, 0)); ++ break; ++ case ATMEL_ISI_PIXFMT_BGR16: ++ cr2 = (ISI_BIT(COL_SPACE) | ISI_BIT(RGB_MODE) ++ | ISI_BF(RGB_CFG, 1)); ++ break; ++ case ATMEL_ISI_PIXFMT_GRB16: ++ cr2 = (ISI_BIT(COL_SPACE) | ISI_BIT(RGB_MODE) ++ | ISI_BF(RGB_CFG, 2)); ++ break; ++ case ATMEL_ISI_PIXFMT_GBR16: ++ cr2 = (ISI_BIT(COL_SPACE) | ISI_BIT(RGB_MODE) ++ | ISI_BF(RGB_CFG, 3)); ++ break; ++ case ATMEL_ISI_PIXFMT_RGB24_REV: ++ cr2 = (ISI_BIT(COL_SPACE) | ISI_BIT(RGB_SWAP) ++ | ISI_BF(RGB_CFG, 0)); ++ break; ++ case ATMEL_ISI_PIXFMT_BGR24_REV: ++ cr2 = (ISI_BIT(COL_SPACE) | ISI_BIT(RGB_SWAP) ++ | ISI_BF(RGB_CFG, 1)); ++ break; ++ case ATMEL_ISI_PIXFMT_RGB16_REV: ++ cr2 = (ISI_BIT(COL_SPACE) | ISI_BIT(RGB_SWAP) ++ | ISI_BIT(RGB_MODE) | ISI_BF(RGB_CFG, 0)); ++ break; ++ case ATMEL_ISI_PIXFMT_BGR16_REV: ++ cr2 = (ISI_BIT(COL_SPACE) | ISI_BIT(RGB_SWAP) ++ | ISI_BIT(RGB_MODE) | ISI_BF(RGB_CFG, 1)); ++ break; ++ case ATMEL_ISI_PIXFMT_GRB16_REV: ++ cr2 = (ISI_BIT(COL_SPACE) | ISI_BIT(RGB_SWAP) ++ | ISI_BIT(RGB_MODE) | ISI_BF(RGB_CFG, 2)); ++ break; ++ case ATMEL_ISI_PIXFMT_GBR16_REV: ++ cr2 = (ISI_BIT(COL_SPACE) | ISI_BIT(RGB_SWAP) ++ | ISI_BIT(RGB_MODE) | ISI_BF(RGB_CFG, 3)); ++ break; ++ default: ++ return -EINVAL; ++ } ++ ++ ++ cr1 = ISI_BF(EMB_SYNC, cam->has_emb_sync) ++ | ISI_BF(HSYNC_POL, cam->hsync_act_low) ++ | ISI_BF(VSYNC_POL, cam->vsync_act_low) ++ | ISI_BF(PIXCLK_POL, cam->pclk_act_falling) ++ | ISI_BIT(DIS); ++ ++ isi_writel(isi, CR1, cr1); ++ isi_writel(isi, CR2, cr2); ++ ++ return 0; ++} ++ ++static int avr32_isi_capture_set_format(struct atmel_isi *isi, ++ struct atmel_isi_format *fmt) ++{ ++ u32 cr2; ++ ++ fmt->pix.width = min(2048U, fmt->pix.width); ++ fmt->pix.height = min(2048U, fmt->pix.height); ++ fmt->pix.bytesperline = 0; ++ ++ /* Set format if we have specified one */ ++ if(capture_v4l2_fmt){ ++ fmt->pix.pixelformat = capture_v4l2_fmt; ++ } ++ else { ++ /* Codec path output format */ ++ fmt->pix.pixelformat = V4L2_PIX_FMT_YVYU; ++ } ++ ++ /* The ISI module outputs either YUV 4:2:2 (codec path) ++ * or RGB 5:5:5 (preview path) (ISI grayscale mode is not supported ++ * by V4L2). Therefore two pixels will be in a 32bit word */ ++ fmt->pix.bytesperline = ALIGN(fmt->pix.width * 2, 4); ++ fmt->pix.sizeimage = fmt->pix.bytesperline * fmt->pix.height; ++ ++ cr2 = isi_readl(isi, CR2); ++ cr2 = ISI_BFINS(IM_VSIZE, fmt->pix.height - 1, cr2); ++ cr2 = ISI_BFINS(IM_HSIZE, fmt->pix.width - 1, cr2); ++ isi_writel(isi, CR2, cr2); ++ ++ pr_debug("set capture format: width=%d height=%d\n", ++ fmt->pix.width, fmt->pix.height); ++ ++ return 0; ++} ++ ++static int avr32_isi_streaming_set_format(struct atmel_isi *isi, ++ struct atmel_isi_format *fmt) ++{ ++ memcpy(&isi->streaming_format, &isi->format, ++ sizeof(struct atmel_isi_format)); ++#ifndef ISI_CODEC ++ fmt->pix.width = min(640U, prev_hsize); ++ fmt->pix.height = min(480U, prev_vsize); ++ fmt->pix.bytesperline = 0; ++ ++ /* Set format if we have specified one */ ++ if(streaming_v4l2_fmt){ ++ fmt->pix.pixelformat = streaming_v4l2_fmt; ++ } ++ else { ++ /* Preview path output format ++ * Would be logically V4L2_PIX_FMT_BGR555X ++ * but this format does not exist in the specification ++ * So for now we pretend V4L2_PIX_FMT_RGB555X ++ */ ++ fmt->pix.pixelformat = V4L2_PIX_FMT_RGB555X; ++ } ++ ++ /* The ISI module outputs either YUV 4:2:2 (codec path) ++ * or RGB 5:5:5 (preview path) (ISI grayscale mode is not ++ * supported yet. Therefore two pixels will be in a 32bit word ++ */ ++ fmt->pix.bytesperline = ALIGN(fmt->pix.width * 2, 4); ++ fmt->pix.sizeimage = fmt->pix.bytesperline * fmt->pix.height; ++ ++ /* These values depend on the sensor output image size */ ++ isi_writel(isi, PDECF, prev_decimation_factor);/* 1/16 * 16 = 1*/ ++ isi_writel(isi,PSIZE , ISI_BF(PREV_HSIZE,prev_hsize - 1) ++ | ISI_BF(PREV_VSIZE, prev_vsize - 1)); ++ ++ pr_debug("set_format: cr1=0x%08x cr2=0x%08x\n", ++ isi_readl(isi, CR1), isi_readl(isi, CR2)); ++#else ++ avr32_isi_capture_set_format(isi, &isi->streaming_format); ++#endif ++ return 0; ++} ++ ++static int avr32_isi_start_capture(struct atmel_isi *isi) ++{ ++ u32 cr1; ++ int ret; ++ ++ spin_lock_irq(&isi->lock); ++ isi->state = STATE_IDLE; ++ isi_readl(isi, SR); /* clear any pending SOF interrupt */ ++ isi_writel(isi, IER, ISI_BIT(SOF)); ++ isi_writel(isi, CR1, isi_readl(isi, CR1) & ~ISI_BIT(DIS)); ++ spin_unlock_irq(&isi->lock); ++ ++ pr_debug("isi: waiting for SOF\n"); ++ ret = wait_event_interruptible(isi->capture_wq, ++ isi->state != STATE_IDLE); ++ if (ret) ++ return ret; ++ if (isi->state != STATE_CAPTURE_READY) ++ return -EIO; ++ ++ /* ++ * Do a codec request. Next SOF indicates start of capture, ++ * the one after that indicates end of capture. ++ */ ++ pr_debug("isi: starting capture\n"); ++ isi_writel(isi, CDBA, isi->capture_phys); ++ ++ spin_lock_irq(&isi->lock); ++ isi->state = STATE_CAPTURE_WAIT_SOF; ++ cr1 = isi_readl(isi, CR1); ++ cr1 |= ISI_BIT(CODEC_ON); ++ isi_writel(isi, CR1, cr1); ++ isi_writel(isi, IER, ISI_CAPTURE_MASK); ++ spin_unlock_irq(&isi->lock); ++ ++ return 0; ++} ++ ++static void avr32_isi_capture_done(struct atmel_isi *isi, ++ int state) ++{ ++ u32 cr1; ++ ++ cr1 = isi_readl(isi, CR1); ++ cr1 &= ~ISI_BIT(CODEC_ON); ++ isi_writel(isi, CR1, cr1); ++ ++ isi->state = state; ++ wake_up_interruptible(&isi->capture_wq); ++ isi_writel(isi, IDR, ISI_CAPTURE_MASK); ++} ++ ++static irqreturn_t avr32_isi_handle_streaming(struct atmel_isi *isi, ++ int sequence){ ++ ++ int reqnr; ++ ++ if(kfifo_get(isi->grabq, (unsigned char *) &reqnr, ++ sizeof(int)) != sizeof(int)){ ++ ++ /* as no new buffer is available we keep the ++ * current one ++ */ ++ pr_debug("isi: dropping frame\n"); ++#ifdef ISI_CODEC ++ isi_writel(isi, CDBA, ++ isi->current_buffer->fb_desc.fb_address); ++ ++ isi_writel(isi, CR1, ISI_BIT(CODEC_ON) | ++ isi_readl(isi, CR1)); ++#else ++ /* TEST this has to be tested if it messes up the ISI ++ * streaming process */ ++ isi_writel(isi, PPFBD, (unsigned long) ++ &isi->video_buffer[isi->current_buffer->index]); ++#endif ++ } ++ else{ ++ isi->current_buffer->status = FRAME_DONE; ++ isi->current_buffer->sequence = sequence; ++ ++ do_gettimeofday(&isi->current_buffer->timestamp); ++ ++ /*isi->current_buffer->bytes_used = ++ ISI_VIDEO_MAX_FRAME_SIZE; */ ++ ++ kfifo_put(isi->doneq, (unsigned char *) ++ &(isi->current_buffer->index), sizeof(int)); ++ ++ isi->current_buffer = &(isi->video_buffer[reqnr]); ++#ifdef ISI_CODEC ++ isi_writel(isi, CDBA, ++ isi->current_buffer->fb_desc.fb_address); ++ isi_writel(isi, CR1, ISI_BIT(CODEC_ON) | ++ isi_readl(isi, CR1)); ++#else ++ /*TODO check if fbd corresponds to frame buffer */ ++#endif ++ wake_up_interruptible(&isi->capture_wq); ++ } ++ return IRQ_HANDLED; ++} ++ ++/* FIXME move code from ISR here ++static irqreturn_t avr32_isi_handle_capturing(struct atmel_isi *isi){ ++ ++}*/ ++/* isi interrupt service routine */ ++static irqreturn_t isi_interrupt(int irq, void *dev_id) ++{ ++ struct atmel_isi *isi = dev_id; ++ u32 status, mask, pending; ++ irqreturn_t ret = IRQ_NONE; ++ static int sequence = 0; ++ ++ spin_lock(&isi->lock); ++ ++ status = isi_readl(isi, SR); ++ mask = isi_readl(isi, IMR); ++ pending = status & mask; ++ ++ pr_debug("isi: interrupt status %x pending %x\n", ++ status, pending); ++ if(isi->streaming){ ++ if(likely(pending & (ISI_BIT(FO_C_EMP) | ISI_BIT(FO_P_EMP)))){ ++ ++ sequence++; ++ ret = avr32_isi_handle_streaming(isi, sequence); ++ } ++ } ++ else{ ++ while (pending) { ++ if (pending & (ISI_BIT(FO_C_OVF) | ISI_BIT(FR_OVR))) { ++ avr32_isi_capture_done(isi, STATE_CAPTURE_ERROR); ++ pr_debug("%s: FIFO overrun (status=0x%x)\n", ++ isi->vdev.name, status); ++ } else if (pending & ISI_BIT(SOF)) { ++ switch (isi->state) { ++ case STATE_IDLE: ++ isi->state = STATE_CAPTURE_READY; ++ wake_up_interruptible(&isi->capture_wq); ++ break; ++ case STATE_CAPTURE_READY: ++ break; ++ case STATE_CAPTURE_WAIT_SOF: ++ isi->state = STATE_CAPTURE_IN_PROGRESS; ++ break; ++ /* ++ case STATE_CAPTURE_IN_PROGRESS: ++ avr32_isi_capture_done(isi, STATE_CAPTURE_DONE); ++ break; ++ */ ++ } ++ } ++ if (pending & ISI_BIT(FO_C_EMP)){ ++ if( isi->state == STATE_CAPTURE_IN_PROGRESS) ++ avr32_isi_capture_done(isi, STATE_CAPTURE_DONE); ++ } ++ ++ if (pending & ISI_BIT(SOFTRST)) { ++ complete(&isi->reset_complete); ++ isi_writel(isi, IDR, ISI_BIT(SOFTRST)); ++ } ++ ++ status = isi_readl(isi, SR); ++ mask = isi_readl(isi, IMR); ++ pending = status & mask; ++ ret = IRQ_HANDLED; ++ } ++ } ++ spin_unlock(&isi->lock); ++ ++ return ret; ++} ++ ++/* ------------------------------------------------------------------------ ++ * IOCTL videoc handling ++ * ----------------------------------------------------------------------*/ ++ ++/* --------Capture ioctls ------------------------------------------------*/ ++/* Device capabilities callback function. ++ */ ++static int avr32_isi_capture_querycap(struct file *file, void *priv, ++ struct v4l2_capability *cap) ++{ ++ strcpy(cap->driver, "atmel-isi"); ++ strcpy(cap->card, "Atmel Image Sensor Interface"); ++ cap->version = ATMEL_ISI_VERSION; ++ /* V4L2_CAP_VIDEO_CAPTURE -> This is a capture device ++ * V4L2_CAP_READWRITE -> read/write interface used ++ */ ++ cap->capabilities = (V4L2_CAP_VIDEO_CAPTURE ++ | V4L2_CAP_READWRITE ++ ); ++ return 0; ++} ++ ++/* Input enumeration callback function. ++ * Enumerates available input devices. ++ * This can be called many times from the V4L2-layer by ++ * incrementing the index to get all avaliable input devices. ++ */ ++static int avr32_isi_capture_enum_input(struct file *file, void *priv, ++ struct v4l2_input *input) ++{ ++ struct atmel_isi_fh *fh = priv; ++ struct atmel_isi *isi = fh->isi; ++ ++ /* Just one input (ISI) is available */ ++ if (input->index != 0) ++ return -EINVAL; ++ ++ /* Set input name as camera name */ ++ strlcpy(input->name, isi->camera->name, sizeof(input->name)); ++ input->type = V4L2_INPUT_TYPE_CAMERA; ++ ++ /* Set to this value just because this should be set to a ++ * defined value ++ */ ++ input->std = V4L2_STD_PAL; ++ ++ return 0; ++} ++/* Selects an input device. ++ * One input device (ISI) currently supported. ++ */ ++static int avr32_isi_capture_s_input(struct file *file, void *priv, ++ unsigned int index) ++{ ++ if (index != 0) ++ return -EINVAL; ++ return 0; ++} ++ ++/* Gets current input device. ++ */ ++static int avr32_isi_capture_g_input(struct file *file, void *priv, ++ unsigned int *index) ++{ ++ *index = 0; ++ return 0; ++} ++ ++/* Format callback function ++ * Returns a v4l2_fmtdesc structure with according values to a ++ * index. ++ * This function is called from user space until it returns ++ * -EINVAL. ++ */ ++static int avr32_isi_capture_enum_fmt_cap(struct file *file, void *priv, ++ struct v4l2_fmtdesc *fmt) ++{ ++ if (fmt->index != 0) ++ return -EINVAL; ++ ++ /* if we want to pretend another ISI output ++ * this is usefull if we input an other input format from a camera ++ * than specified in the ISI -> makes it possible to swap bytes ++ * in the ISI output format but messes up the preview path output ++ */ ++ if(capture_v4l2_fmt){ ++ fmt->pixelformat = capture_v4l2_fmt; ++ } ++ else { ++ /* This is the format the ISI tries to output */ ++ strcpy(fmt->description, "YCbYCr (YUYV) 4:2:2"); ++ fmt->pixelformat = V4L2_PIX_FMT_YUYV; ++ } ++ ++ return 0; ++} ++ ++static int avr32_isi_capture_try_fmt_cap(struct file *file, void *priv, ++ struct v4l2_format *vfmt) ++{ ++ struct atmel_isi_fh *fh = priv; ++ struct atmel_isi *isi = fh->isi; ++ ++ /* Just return the current format for now */ ++ memcpy(&vfmt->fmt.pix, &isi->format.pix, ++ sizeof(struct v4l2_pix_format)); ++ ++ return 0; ++} ++ ++/* Gets current hardware configuration ++ * For capture devices the pixel format settings are ++ * important. ++ */ ++static int avr32_isi_capture_g_fmt_cap(struct file *file, void *priv, ++ struct v4l2_format *vfmt) ++{ ++ struct atmel_isi_fh *fh = priv; ++ struct atmel_isi *isi = fh->isi; ++ ++ /* Return current pixel format */ ++ memcpy(&vfmt->fmt.pix, &isi->format.pix, ++ sizeof(struct v4l2_pix_format)); ++ ++ return 0; ++} ++ ++static int avr32_isi_capture_s_fmt_cap(struct file *file, void *priv, ++ struct v4l2_format *vfmt) ++{ ++ struct atmel_isi_fh *fh = priv; ++ struct atmel_isi *isi = fh->isi; ++ int ret = 0; ++ ++ /* We have a fixed format so just copy the current format ++ * back ++ */ ++ memcpy(&vfmt->fmt.pix, &isi->format.pix, ++ sizeof(struct v4l2_pix_format)); ++ ++ return ret; ++} ++ ++/* ------------ Preview path ioctls ------------------------------*/ ++/* Device capabilities callback function. ++ */ ++static int avr32_isi_querycap(struct file *file, void *priv, ++ struct v4l2_capability *cap) ++{ ++ strcpy(cap->driver, "atmel-isi"); ++ strcpy(cap->card, "Atmel Image Sensor Interface"); ++ cap->version = ATMEL_ISI_VERSION; ++ /* V4L2_CAP_VIDEO_CAPTURE -> This is a capture device ++ * V4L2_CAP_READWRITE -> read/write interface used ++ * V4L2_CAP_STREAMING -> ioctl + mmap interface used ++ */ ++ cap->capabilities = (V4L2_CAP_VIDEO_CAPTURE ++ | V4L2_CAP_READWRITE ++ | V4L2_CAP_STREAMING ++ ); ++ return 0; ++} ++ ++/* Input enumeration callback function. ++ * Enumerates available input devices. ++ * This can be called many times from the V4L2-layer by ++ * incrementing the index to get all avaliable input devices. ++ */ ++static int avr32_isi_enum_input(struct file *file, void *priv, ++ struct v4l2_input *input) ++{ ++ struct atmel_isi_fh *fh = priv; ++ struct atmel_isi *isi = fh->isi; ++ ++ /* Just one input (ISI) is available */ ++ if (input->index != 0) ++ return -EINVAL; ++ ++ /* Set input name as camera name */ ++ strlcpy(input->name, isi->camera->name, sizeof(input->name)); ++ input->type = V4L2_INPUT_TYPE_CAMERA; ++ ++ /* Set to this value just because this should be set to a ++ * defined value ++ */ ++ input->std = V4L2_STD_PAL; ++ ++ return 0; ++} ++ ++/* Selects an input device. ++ * One input device (ISI) currently supported. ++ */ ++static int avr32_isi_s_input(struct file *file, void *priv, ++ unsigned int index) ++{ ++ if (index != 0) ++ return -EINVAL; ++ ++ return 0; ++} ++ ++/* Gets current input device. ++ */ ++static int avr32_isi_g_input(struct file *file, void *priv, ++ unsigned int *index) ++{ ++ *index = 0; ++ return 0; ++} ++ ++/* Format callback function ++ * Returns a v4l2_fmtdesc structure with according values to a ++ * index. ++ * This function is called from user space until it returns ++ * -EINVAL. ++ */ ++static int avr32_isi_enum_fmt_cap(struct file *file, void *priv, ++ struct v4l2_fmtdesc *fmt) ++{ ++ struct atmel_isi_fh *fh = priv; ++ struct atmel_isi *isi = fh->isi; ++ ++ if (fmt->index != 0) ++ return -EINVAL; ++ ++ /* TODO: Return all possible formats ++ * This depends on ISI and camera. ++ * A enum_fmt function or a data structure should be ++ * added to the camera driver. ++ * For now just one format supported ++ */ ++ if(streaming_v4l2_fmt){ ++ strcpy(fmt->description, "Pretended format"); ++ } ++ else{ ++ strcpy(fmt->description, "Normal format"); ++ } ++ fmt->pixelformat = isi->streaming_format.pix.pixelformat;//V4L2_PIX_FMT_UYVY; ++ ++ return 0; ++} ++ ++static int avr32_isi_try_fmt_cap(struct file *file, void *priv, ++ struct v4l2_format *vfmt) ++{ ++ struct atmel_isi_fh *fh = priv; ++ struct atmel_isi *isi = fh->isi; ++ ++ /* FIXME For now we just return the current format*/ ++ memcpy(&vfmt->fmt.pix, &isi->streaming_format.pix, ++ sizeof(struct v4l2_pix_format)); ++ return 0; ++} ++ ++/* Gets current hardware configuration ++ * For capture devices the pixel format settings are ++ * important. ++ */ ++static int avr32_isi_g_fmt_cap(struct file *file, void *priv, ++ struct v4l2_format *vfmt) ++{ ++ struct atmel_isi_fh *fh = priv; ++ struct atmel_isi *isi = fh->isi; ++ ++ /*Copy current pixel format structure to user space*/ ++ memcpy(&vfmt->fmt.pix, &isi->streaming_format.pix, ++ sizeof(struct v4l2_pix_format)); ++ ++ return 0; ++} ++ ++static int avr32_isi_s_fmt_cap(struct file *file, void *priv, ++ struct v4l2_format *vfmt) ++{ ++ struct atmel_isi_fh *fh = priv; ++ struct atmel_isi *isi = fh->isi; ++ int ret = 0; ++ ++ /* Just return the current format as we do not support ++ * format switching */ ++ memcpy(&vfmt->fmt.pix, &isi->streaming_format.pix, ++ sizeof(struct v4l2_pix_format)); ++ ++ return ret; ++} ++ ++/* Checks if control is supported in driver ++ * No controls currently supported yet ++ */ ++static int avr32_isi_queryctrl(struct file *file, void *priv, ++ struct v4l2_queryctrl *qc) ++{ ++ switch(qc->id){ ++ case V4L2_CID_BRIGHTNESS: ++ strcpy(qc->name, "Brightness"); ++ qc->minimum = 0; ++ qc->maximum = 100; ++ qc->step = 1; ++ qc->default_value = 50; ++ qc->flags = 0; ++ break; ++ default: ++ return -EINVAL; ++ } ++ return 0; ++} ++ ++static int avr32_isi_g_ctrl(struct file *file, void *priv, ++ struct v4l2_control *ctrl) ++{ ++ switch(ctrl->id){ ++ case V4L2_CID_BRIGHTNESS: ++ ctrl->value = 0; ++ break; ++ default: ++ return -EINVAL; ++ } ++ return 0; ++} ++ ++static int avr32_isi_s_ctrl(struct file *file, void *priv, ++ struct v4l2_control *ctrl) ++{ ++ switch(ctrl->id){ ++ case V4L2_CID_BRIGHTNESS: ++ break; ++ default: ++ return -EINVAL; ++ } ++ return 0; ++} ++ ++static int avr32_isi_reqbufs(struct file *file, void *private_data, ++ struct v4l2_requestbuffers *req) ++{ ++ /* Only memory mapped buffers supported*/ ++ if(req->memory != V4L2_MEMORY_MMAP){ ++ pr_debug("atmel_isi: buffer format not supported\n"); ++ return -EINVAL; ++ } ++ pr_debug("atmel_isi: Requested %d buffers. Using %d buffers\n", ++ req->count, video_buffers); ++ /* buffer number is fixed for now as it is difficult to get ++ * that memory at runtime */ ++ req->count = video_buffers; ++ memset(&req->reserved, 0, sizeof(req->reserved)); ++ return 0; ++} ++ ++static int avr32_isi_querybuf(struct file *file, void *private_data, ++ struct v4l2_buffer *buf) ++{ ++ struct atmel_isi_fh *fh = private_data; ++ struct atmel_isi *isi = fh->isi; ++ struct frame_buffer *buffer; ++ ++ if(unlikely(buf->type != V4L2_BUF_TYPE_VIDEO_CAPTURE)) ++ return -EINVAL; ++ if(unlikely(buf->index >= video_buffers)) ++ return -EINVAL; ++ ++ buffer = &(isi->video_buffer[buf->index]); ++ ++ buf->type = V4L2_BUF_TYPE_VIDEO_CAPTURE; ++ buf->length = video_buffer_size; ++ buf->memory = V4L2_MEMORY_MMAP; ++ ++ /* set index as mmap reference to the buffer */ ++ buf->m.offset = buf->index << PAGE_SHIFT; ++ ++ switch(buffer->status){ ++ case FRAME_UNUSED: ++ case FRAME_ERROR: ++ case FRAME_QUEUED: ++ buf->flags |= V4L2_BUF_FLAG_QUEUED; ++ buf->bytesused = buffer->bytes_used; ++ break; ++ case FRAME_DONE: ++ buf->flags |= V4L2_BUF_FLAG_DONE; ++ buf->bytesused = buffer->bytes_used; ++ buf->sequence = buffer->sequence; ++ buf->timestamp = buffer->timestamp; ++ break; ++ } ++ ++ buf->field = V4L2_FIELD_NONE; /* no interlacing stuff */ ++ ++ if(buffer->mmap_count) ++ buf->flags |= V4L2_BUF_FLAG_MAPPED; ++ else ++ buf->flags &= ~V4L2_BUF_FLAG_MAPPED; ++ ++ pr_debug("atmel_isi: querybuf index:%d offset:%d\n", ++ buf->index, buf->m.offset); ++ ++ return 0; ++} ++ ++static int avr32_isi_qbuf(struct file *file, void *private_data, ++ struct v4l2_buffer *buf) ++{ ++ struct atmel_isi_fh *fh = private_data; ++ struct atmel_isi *isi = fh->isi; ++ struct frame_buffer *buffer; ++ ++ if(unlikely(buf->type != V4L2_BUF_TYPE_VIDEO_CAPTURE)) ++ return -EINVAL; ++ if(unlikely(buf->index >= video_buffers || buf->index < 0)) ++ return -EINVAL; ++ if(unlikely(buf->memory != V4L2_MEMORY_MMAP)) ++ return -EINVAL; ++ ++ buffer = &(isi->video_buffer[buf->index]); ++ if(unlikely(buffer->status != FRAME_UNUSED)) ++ return -EINVAL; ++ ++ mutex_lock(&isi->mutex); ++ buf->flags |= V4L2_BUF_FLAG_QUEUED; ++ buf->flags &= ~V4L2_BUF_FLAG_DONE; ++ buffer->status = FRAME_QUEUED; ++ kfifo_put(isi->grabq, (unsigned char*) &buf->index, sizeof(int)); ++ mutex_unlock(&isi->mutex); ++ ++ return 0; ++} ++ ++static int avr32_isi_dqbuf(struct file *file, void *private_data, ++ struct v4l2_buffer *buf) ++{ ++ struct atmel_isi_fh *fh = private_data; ++ struct atmel_isi *isi = fh->isi; ++ struct frame_buffer *buffer; ++ int reqnr = 0; ++ ++ if(unlikely(buf->type != V4L2_BUF_TYPE_VIDEO_CAPTURE)) ++ return -EINVAL; ++ /* Mencoder does not set this flag ++ * ++ if(unlikely(buf->memory != V4L2_MEMORY_MMAP)){ ++ pr_debug("isi: dequeue failed buffer not of mmapped type\n"); ++ return -EINVAL; ++ }*/ ++ if((kfifo_len(isi->doneq) == 0) && (file->f_flags & O_NONBLOCK)){ ++ pr_debug("Done-queue is empty\n"); ++ return -EAGAIN; ++ } ++ /* ++ if(wait_event_interruptible(isi->capture_wq, ++ kfifo_len(isi->doneq) != 0) < 0){ ++ pr_debug("Done-queue interrupted\n"); ++ return -EINTR; ++ } ++ */ ++ if(!kfifo_get(isi->doneq, (unsigned char*) &reqnr, sizeof(int))){ ++ return -EBUSY; ++ } ++ buffer = &(isi->video_buffer[reqnr]); ++ ++ if(unlikely(buffer->status != FRAME_DONE)){ ++ pr_debug("isi: error, dequeued buffer not ready\n"); ++ return -EINVAL; ++ } ++ buf->index = reqnr; ++ buf->bytesused = buffer->bytes_used; ++ buf->timestamp = buffer->timestamp; ++ buf->sequence = buffer->sequence; ++ buf->m.offset = reqnr << PAGE_SHIFT; ++ buffer->status = FRAME_UNUSED; ++ buf->flags = V4L2_BUF_FLAG_MAPPED | V4L2_BUF_FLAG_DONE; ++ ++ buf->length = isi->capture_buffer_size; ++ buf->field = V4L2_FIELD_NONE; ++ buf->memory = V4L2_MEMORY_MMAP; ++ return 0; ++} ++ ++static int avr32_isi_streamon(struct file *file, void *private_data, ++ enum v4l2_buf_type type) ++{ ++ struct atmel_isi_fh *fh = private_data; ++ struct atmel_isi *isi = fh->isi; ++ int reqnr; ++ struct frame_buffer *buffer; ++ u32 cr1; ++ ++ if(unlikely(type != V4L2_BUF_TYPE_VIDEO_CAPTURE)) ++ return -EINVAL; ++ ++ if(!kfifo_get(isi->grabq, (unsigned char*) &reqnr, sizeof(int))){ ++ mutex_unlock(&isi->mutex); ++ pr_debug("atmel_isi: No buffer in IN-Queue, start of streaming\ ++ aborted (one buffer is required in IN-Queue)\n"); ++ return -EINVAL; ++ } ++ buffer = &(isi->video_buffer[reqnr]); ++ ++ ++ spin_lock_irq(isi->lock); ++ isi->streaming = 1; ++ isi->current_buffer = buffer; ++ cr1 = isi_readl(isi, CR1); ++#ifdef ISI_CODEC ++ isi_writel(isi, CDBA, buffer->fb_desc.fb_address); ++ /* Enable codec path */ ++ cr1 |= ISI_BIT(CODEC_ON) | ISI_BIT(DIS); ++#else ++ isi_writel(isi, PPFBD, isi->fbd_list_start); ++#endif ++ /* Enable interrupts */ ++ isi_readl(isi, SR); ++ /* FIXME enable codec/preview path according to setup */ ++ isi_writel(isi, IER, ISI_BIT(FO_C_EMP) | ISI_BIT(FO_P_EMP)); ++ ++ cr1 |= ISI_BF(FRATE, frame_rate_scaler); ++ ++ /* Enable ISI module*/ ++ cr1 &= ~ISI_BIT(DIS); ++ isi_writel(isi, CR1, cr1); ++ spin_unlock_irq(isi->lock); ++ ++ isi->camera->start_capture(isi->camera); ++ ++ return 0; ++} ++ ++static int avr32_isi_streamoff(struct file *file, void *private_data, ++ enum v4l2_buf_type type) ++{ ++ struct atmel_isi_fh *fh = private_data; ++ struct atmel_isi *isi = fh->isi; ++ ++ if(unlikely(type != V4L2_BUF_TYPE_VIDEO_CAPTURE)) ++ return -EINVAL; ++ ++ spin_lock_irq(isi->lock); ++ isi->streaming = 0; ++#ifdef ISI_CODEC ++ /* Disble codec path */ ++ isi_writel(isi, CR1, isi_readl(isi, CR1) & (~ISI_BIT(CODEC_ON))); ++#endif ++ /* Disable interrupts */ ++ isi_writel(isi, IDR, ISI_BIT(FO_C_EMP) | ISI_BIT(FO_P_EMP)); ++ ++ /* Disable ISI module*/ ++ isi_writel(isi, CR1, isi_readl(isi, CR1) | ISI_BIT(DIS)); ++ spin_unlock_irq(isi->lock); ++ ++ isi->camera->stop_capture(isi->camera); ++ pr_debug("atmel_isi: Stream off\n"); ++ ++ return 0; ++} ++ ++/*----------------------------------------------------------------------------*/ ++static int avr32_isi_capture_close (struct inode *inode, struct file *file) ++{ ++ struct atmel_isi_fh *fh = file->private_data; ++ struct atmel_isi *isi = fh->isi; ++ u32 cr1; ++ ++ mutex_lock(&isi->mutex); ++ ++ isi->capture_users--; ++ kfree(fh); ++ ++ /* Stop camera and ISI if driver has no users */ ++ if(!isi->stream_users) { ++ isi->camera->stop_capture(isi->camera); ++ ++ spin_lock_irq(&isi->lock); ++ cr1 = isi_readl(isi, CR1); ++ cr1 |= ISI_BIT(DIS); ++ isi_writel(isi, CR1, cr1); ++ spin_unlock_irq(&isi->lock); ++ } ++ mutex_unlock(&isi->mutex); ++ ++ return 0; ++} ++ ++static int avr32_isi_capture_open (struct inode *inode, struct file *file) ++{ ++ struct video_device *vdev = video_devdata(file); ++ struct atmel_isi *isi = to_atmel_isi(vdev); ++ struct atmel_isi_fh *fh; ++ int ret = -EBUSY; ++ unsigned long timeout; ++ ++ mutex_lock(&isi->mutex); ++ ++ ++ if (isi->capture_users) { ++ pr_debug("%s: open(): device busy\n", vdev->name); ++ goto out; ++ } ++ ++ if (!isi->camera) { ++ ++ ret = -ENODEV; ++ isi->camera = avr32_isi_grab_camera(isi); ++ if (!isi->camera) ++ goto out; ++ ++ ret = avr32_isi_set_camera_input(isi); ++ if(ret) ++ goto out; ++ } ++ ++ avr32_isi_capture_set_format(isi, &isi->format); ++ ++ /* ++ * Reset the controller and wait for completion. The ++ * reset will only succeed if we have a pixel clock ++ * from the camera. ++ */ ++ if(isi->stream_users == 0){ ++ ++ init_completion(&isi->reset_complete); ++ isi_writel(isi, IER, ISI_BIT(SOFTRST)); ++ isi_writel(isi, CR1, ISI_BIT(RST)); ++ ++ timeout = wait_for_completion_timeout(&isi->reset_complete, ++ msecs_to_jiffies(100)); ++ ++ isi_writel(isi, IDR, ~0UL); ++ if (timeout == 0) { ++ ret = -ETIMEDOUT; ++ goto out; ++ } ++ } ++ ++ ret = -ENOMEM; ++ fh = kzalloc(sizeof(struct atmel_isi_fh), GFP_KERNEL); ++ if (!fh) { ++ pr_debug("%s: open(): out of memory\n", vdev->name); ++ goto out; ++ } ++ ++ fh->isi = isi; ++ file->private_data = fh; ++ isi->capture_users++; ++ ++ ret = 0; ++ ++out: ++ mutex_unlock(&isi->mutex); ++ return ret; ++} ++ ++static ssize_t avr32_isi_capture_read(struct file *file, char __user *data, ++ size_t count, loff_t *ppos) ++{ ++ struct atmel_isi_fh *fh = file->private_data; ++ struct atmel_isi *isi = fh->isi; ++ int state; ++ int ret; ++ ++ state = STATE_IDLE; ++ ++ pr_debug("isi: read %zu bytes read_off=%u state=%u sizeimage=%u\n", ++ count, fh->read_off, state, isi->format.pix.sizeimage); ++ isi->camera->start_capture(isi->camera); ++ ++ ++ avr32_isi_start_capture(isi); ++ ++ ret = wait_event_interruptible( isi->capture_wq, ++ (isi->state == STATE_CAPTURE_DONE) ++ || (isi->state == STATE_CAPTURE_ERROR)); ++ if (ret) ++ return ret; ++ if (isi->state == STATE_CAPTURE_ERROR) { ++ isi->state = STATE_IDLE; ++ return -EIO; ++ } ++ ++ fh->read_off = 0; ++ ++ count = min(count, (size_t)isi->format.pix.sizeimage - fh->read_off); ++ ret = copy_to_user(data, isi->capture_buf + fh->read_off, count); ++ if (ret) ++ return -EFAULT; ++ ++ fh->read_off += count; ++ if (fh->read_off >= isi->format.pix.sizeimage) ++ isi->state = STATE_IDLE; ++ ++ return count; ++} ++ ++static void avr32_isi_capture_release (struct video_device *vdev) ++{ ++ pr_debug("%s: release\n", vdev->name); ++} ++ ++/* ----------------- Streaming interface -------------------------------------*/ ++static void avr32_isi_vm_open(struct vm_area_struct *vma){ ++ struct frame_buffer *buffer = ++ (struct frame_buffer *) vma->vm_private_data; ++ buffer->mmap_count++; ++ pr_debug("atmel_isi: vm_open count=%d\n",buffer->mmap_count); ++} ++ ++static void avr32_isi_vm_close(struct vm_area_struct *vma){ ++ struct frame_buffer *buffer = ++ (struct frame_buffer *) vma->vm_private_data; ++ pr_debug("atmel_isi: vm_close count=%d\n",buffer->mmap_count); ++ buffer->mmap_count--; ++ if(buffer->mmap_count < 0) ++ printk("atmel_isi: mmap_count went negative\n"); ++} ++ ++/* FIXME remove this function ++struct page *avr32_isi_vm_nopage( struct vm_area_struct *vma, ++ unsigned long address, int *type ) ++{ ++ return NOPAGE_SIGBUS; ++} ++*/ ++ ++static struct vm_operations_struct avr32_isi_vm_ops = { ++ .open = avr32_isi_vm_open, ++ .close = avr32_isi_vm_close, ++ //.nopage = avr32_isi_vm_nopage, ++}; ++ ++static int avr32_isi_mmap(struct file *file, struct vm_area_struct *vma) ++{ ++ unsigned long pfn; ++ int ret; ++ struct atmel_isi_fh *fh = file->private_data; ++ struct atmel_isi * isi = fh->isi; ++ struct frame_buffer *buffer = &(isi->video_buffer[vma->vm_pgoff]); ++ unsigned long size = vma->vm_end - vma->vm_start; ++ ++ pr_debug("atmel_isi: mmap called pgoff=%ld size=%ld \n", ++ vma->vm_pgoff, size); ++ ++ if(size > video_buffer_size){ ++ pr_debug("atmel_isi: mmap requested buffer is to large\n"); ++ return -EINVAL; ++ } ++ if(vma->vm_pgoff > video_buffers){ ++ pr_debug("atmel_isi: invalid mmap page offset\n"); ++ return -EINVAL; ++ } ++ pfn = isi->video_buffer[vma->vm_pgoff].fb_desc.fb_address >> PAGE_SHIFT; ++ ++ ret = remap_pfn_range(vma, vma->vm_start, pfn, ++ vma->vm_end - vma->vm_start, vma->vm_page_prot); ++ if(ret){ ++ return ret; ++ } ++ ++ vma->vm_ops = &avr32_isi_vm_ops; ++ vma->vm_flags = VM_DONTEXPAND; /* fixed size */ ++ vma->vm_flags |= VM_RESERVED;/* do not swap out */ ++ vma->vm_flags |= VM_DONTCOPY; ++ vma->vm_flags |= VM_SHARED; ++ vma->vm_private_data = (void *) buffer; ++ avr32_isi_vm_open(vma); ++ ++ pr_debug("atmel_isi: vma start=0x%08lx, size=%ld phys=%ld \n", ++ (unsigned long) vma->vm_start, ++ (unsigned long) vma->vm_end - (unsigned long) vma->vm_start, ++ pfn << PAGE_SHIFT); ++ return 0; ++} ++ ++static unsigned int avr32_isi_poll(struct file *file, poll_table *wait) ++{ ++ struct atmel_isi_fh *fh = file->private_data; ++ struct atmel_isi *isi = fh->isi; ++ unsigned int ret = 0; ++ ++ mutex_lock(&isi->mutex); ++ poll_wait(file, &isi->capture_wq, wait); ++ if(kfifo_len(isi->doneq)) ++ ret = POLLIN | POLLRDNORM; ++ mutex_unlock(&isi->mutex); ++ ++ return ret; ++} ++ ++static int avr32_isi_stream_close (struct inode *inode, struct file *file) ++{ ++ struct atmel_isi_fh *fh = file->private_data; ++ struct atmel_isi *isi = fh->isi; ++ u32 cr1; ++ ++ mutex_lock(&isi->mutex); ++ ++ isi->stream_users--; ++ kfree(fh); ++ ++ /* Stop camera and ISI if driver has no users */ ++ if(!isi->capture_users) { ++ isi->camera->stop_capture(isi->camera); ++ ++ spin_lock_irq(&isi->lock); ++ cr1 = isi_readl(isi, CR1); ++ cr1 |= ISI_BIT(DIS); ++ isi_writel(isi, CR1, cr1); ++ spin_unlock_irq(&isi->lock); ++ } ++ ++ mutex_unlock(&isi->mutex); ++ ++ return 0; ++} ++ ++static int avr32_isi_stream_open (struct inode *inode, struct file *file) ++{ ++ struct video_device *vdev = video_devdata(file); ++ struct atmel_isi *isi = to_atmel_isi(vdev); ++ struct atmel_isi_fh *fh; ++ int ret = -EBUSY; ++ unsigned long timeout; ++ ++ mutex_lock(&isi->mutex); ++ ++ ++ if (isi->stream_users) { ++ pr_debug("%s: open(): device busy\n", vdev->name); ++ goto out; ++ } ++ ++ if (!isi->camera) { ++ ret = -ENODEV; ++ isi->camera = avr32_isi_grab_camera(isi); ++ if (!isi->camera) ++ goto out; ++ ret = -EINVAL; ++ ret = avr32_isi_set_camera_input(isi); ++ if(ret) ++ goto out; ++ } ++ avr32_isi_streaming_set_format(isi, &isi->format); ++ kfifo_reset(isi->grabq); ++ kfifo_reset(isi->doneq); ++ ++ /* ++ * Reset the controller and wait for completion. The ++ * reset will only succeed if we have a pixel clock ++ * from the camera. ++ */ ++ if(isi->stream_users == 0){ ++ ++ init_completion(&isi->reset_complete); ++ isi_writel(isi, IER, ISI_BIT(SOFTRST)); ++ isi_writel(isi, CR1, ISI_BIT(RST)); ++ ++ timeout = wait_for_completion_timeout(&isi->reset_complete, ++ msecs_to_jiffies(100)); ++ ++ if (timeout == 0) { ++ ret = -ETIMEDOUT; ++ goto out; ++ } ++ isi_writel(isi, IDR, ~0UL); ++ } ++ ++ ret = -ENOMEM; ++ fh = kzalloc(sizeof(struct atmel_isi_fh), GFP_KERNEL); ++ if (!fh) { ++ pr_debug("%s: open(): out of memory\n", vdev->name); ++ goto out; ++ } ++ ++ fh->isi = isi; ++ file->private_data = fh; ++ isi->stream_users++; ++ ++ ret = 0; ++ ++out: ++ mutex_unlock(&isi->mutex); ++ return ret; ++} ++ ++static void avr32_isi_stream_release (struct video_device *vdev) ++{ ++ struct atmel_isi *isi = to_atmel_isi(vdev); ++ pr_debug("%s: release\n", vdev->name); ++ kfree(isi); ++} ++ ++/* -----------------------------------------------------------------------*/ ++ ++/* Streaming v4l2 device file operations */ ++static struct file_operations avr32_isi_streaming_fops = { ++ .owner = THIS_MODULE, ++ .ioctl = video_ioctl2, ++ .open = avr32_isi_stream_open, ++ .release = avr32_isi_stream_close, ++ .mmap = avr32_isi_mmap, ++ .poll = avr32_isi_poll, ++}; ++ ++/* Capture v4l2 device file operations */ ++static struct file_operations avr32_isi_capture_fops = { ++ .owner = THIS_MODULE, ++ .open = avr32_isi_capture_open, ++ .release = avr32_isi_capture_close, ++ .read = avr32_isi_capture_read, ++ .ioctl = video_ioctl2, ++}; ++ ++static int __exit avr32_isi_remove(struct platform_device *pdev) ++{ ++ struct atmel_isi *isi = platform_get_drvdata(pdev); ++ int i; ++ ++ if (isi->camera) ++ isi->camera->stop_capture(isi->camera); ++ ++ if (isi->camera) ++ avr32_isi_release_camera(isi, isi->camera); ++ video_unregister_device(&isi->cdev); ++ video_unregister_device(&isi->vdev); ++ ++ platform_set_drvdata(pdev, NULL); ++ ++ /* release capture buffer */ ++ dma_free_coherent(&pdev->dev, capture_buffer_size, ++ isi->capture_buf, isi->capture_phys); ++ ++ /* release frame buffers */ ++ for(i = 0; i < video_buffers; i++){ ++ dma_free_coherent(&pdev->dev, ++ video_buffer_size, ++ isi->video_buffer[i].frame_buffer, ++ isi->video_buffer[i].fb_desc.fb_address); ++ } ++ ++ kfifo_free(isi->doneq); ++ kfifo_free(isi->grabq); ++ ++ free_irq(isi->irq, isi); ++ iounmap(isi->regs); ++ clk_disable(isi->hclk); ++ clk_disable(isi->pclk); ++ clk_put(isi->hclk); ++ clk_put(isi->pclk); ++ ++ /* ++ * Don't free isi here -- it will be taken care of by the ++ * release() callback. ++ */ ++ ++ return 0; ++} ++ ++ ++static int __init avr32_isi_probe(struct platform_device *pdev) ++{ ++ unsigned int irq; ++ struct atmel_isi *isi; ++ struct clk *pclk, *hclk; ++ struct resource *regs; ++ int ret; ++ int i; ++ int video_bytes_used = video_buffer_size; ++ ++ regs = platform_get_resource(pdev, IORESOURCE_MEM, 0); ++ if(!regs) ++ return -ENXIO; ++ ++ pclk = clk_get(&pdev->dev, "pclk"); ++ if (IS_ERR(pclk)) ++ return PTR_ERR(pclk); ++ hclk = clk_get(&pdev->dev, "hclk"); ++ if (IS_ERR(hclk)) { ++ ret = PTR_ERR(hclk); ++ goto err_hclk; ++ } ++ clk_enable(pclk); ++ clk_enable(hclk); ++ ++ isi = kzalloc(sizeof(struct atmel_isi), GFP_KERNEL); ++ if(!isi){ ++ ret = -ENOMEM; ++ dev_err(&pdev->dev, "can't allocate interface!\n"); ++ goto err_alloc_isi; ++ } ++ ++ isi->pclk = pclk; ++ isi->hclk = hclk; ++ ++ /* Round up buffer sizes to the next page if needed */ ++ video_buffer_size = PAGE_ALIGN(video_buffer_size); ++ capture_buffer_size = PAGE_ALIGN(capture_buffer_size); ++ ++ spin_lock_init(&isi->lock); ++ mutex_init(&isi->mutex); ++ init_waitqueue_head(&isi->capture_wq); ++ ++ /* Initialize v4l2 capture device */ ++ isi->cdev.fops = &avr32_isi_capture_fops; ++ strcpy(isi->cdev.name, "atmel_isi_capture"); ++ isi->cdev.type = VFL_TYPE_GRABBER; ++ isi->cdev.type2 = VID_TYPE_CAPTURE; ++ isi->cdev.minor = -1; ++ isi->cdev.release =avr32_isi_capture_release; ++ isi->cdev.vidioc_querycap = avr32_isi_capture_querycap; ++ isi->cdev.vidioc_enum_fmt_cap = avr32_isi_capture_enum_fmt_cap; ++ isi->cdev.vidioc_try_fmt_cap = avr32_isi_capture_try_fmt_cap; ++ isi->cdev.vidioc_g_fmt_cap = avr32_isi_capture_g_fmt_cap; ++ isi->cdev.vidioc_s_fmt_cap = avr32_isi_capture_s_fmt_cap; ++ isi->cdev.vidioc_enum_input = avr32_isi_capture_enum_input; ++ isi->cdev.vidioc_g_input = avr32_isi_capture_g_input; ++ isi->cdev.vidioc_s_input = avr32_isi_capture_s_input; ++#ifdef DEBUG ++ isi->cdev.debug = V4L2_DEBUG_IOCTL | V4L2_DEBUG_IOCTL_ARG; ++#endif ++ ++ /* Initialize v4l2 streaming device */ ++ isi->vdev.fops = &avr32_isi_streaming_fops; ++ strcpy(isi->vdev.name, "atmel-isi"); ++ isi->vdev.type = VFL_TYPE_GRABBER; ++ isi->vdev.type2 = VID_TYPE_CAPTURE; ++ isi->vdev.minor = -1; ++ isi->vdev.release = avr32_isi_stream_release; ++#ifdef DEBUG ++ isi->vdev.debug = V4L2_DEBUG_IOCTL | V4L2_DEBUG_IOCTL_ARG; ++#endif ++ ++ isi->vdev.vidioc_querycap = avr32_isi_querycap; ++ isi->vdev.vidioc_enum_fmt_cap = avr32_isi_enum_fmt_cap; ++ isi->vdev.vidioc_try_fmt_cap = avr32_isi_try_fmt_cap; ++ isi->vdev.vidioc_g_fmt_cap = avr32_isi_g_fmt_cap; ++ isi->vdev.vidioc_s_fmt_cap = avr32_isi_s_fmt_cap; ++ isi->vdev.vidioc_enum_input = avr32_isi_enum_input; ++ isi->vdev.vidioc_g_input = avr32_isi_g_input; ++ isi->vdev.vidioc_s_input = avr32_isi_s_input; ++ isi->vdev.vidioc_queryctrl = avr32_isi_queryctrl; ++ isi->vdev.vidioc_g_ctrl = avr32_isi_g_ctrl; ++ isi->vdev.vidioc_s_ctrl = avr32_isi_s_ctrl; ++ isi->vdev.vidioc_querybuf = avr32_isi_querybuf; ++ isi->vdev.vidioc_reqbufs = avr32_isi_reqbufs; ++ isi->vdev.vidioc_qbuf = avr32_isi_qbuf; ++ isi->vdev.vidioc_dqbuf = avr32_isi_dqbuf; ++ isi->vdev.vidioc_streamon = avr32_isi_streamon; ++ isi->vdev.vidioc_streamoff = avr32_isi_streamoff; ++ ++ isi->regs = ioremap(regs->start, regs->end - regs->start + 1); ++ if (!isi->regs) { ++ ret = -ENOMEM; ++ goto err_ioremap; ++ } ++ ++ irq = platform_get_irq(pdev,0); ++ ret = request_irq(irq, isi_interrupt, 0, "isi", isi); ++ if (ret) { ++ dev_err(&pdev->dev, "unable to request irq %d\n", irq); ++ goto err_req_irq; ++ } ++ isi->irq = irq; ++ ++ /* Allocate ISI capture buffer */ ++ isi->capture_buf = dma_alloc_coherent(&pdev->dev, ++ capture_buffer_size, ++ &isi->capture_phys, ++ GFP_KERNEL); ++ if (!isi->capture_buf) { ++ ret = -ENOMEM; ++ dev_err(&pdev->dev, "failed to allocate capture buffer\n"); ++ goto err_alloc_cbuf; ++ } ++ ++ /* Allocate and initialize video buffers */ ++ for(i=0;i < video_buffers; i++){ ++ memset(&isi->video_buffer[i], 0, sizeof(struct frame_buffer)); ++ isi->video_buffer[i].frame_buffer = ++ dma_alloc_coherent(&pdev->dev, ++ video_buffer_size, ++ (dma_addr_t *) ++ &(isi->video_buffer[i].fb_desc.fb_address), ++ GFP_KERNEL); ++ if(!isi->video_buffer[i].frame_buffer){ ++ ret = -ENOMEM; ++ dev_err(&pdev->dev, ++ "failed to allocate video buffer\n"); ++ goto err_alloc_vbuf; ++ } ++ ++ isi->video_buffer[i].bytes_used = video_bytes_used; ++ isi->video_buffer[i].status = FRAME_UNUSED; ++ isi->video_buffer[i].index = i; ++ ++#ifdef DEBUG ++ /* Put some color into the buffers */ ++ /* ++ memset(isi->video_buffer[i].frame_buffer, (i*4)%0xFF, ++ video_buffer_size); ++ */ ++#endif ++ } ++ /* set up frame buffer descriptor list for ISI module*/ ++ /* FIXME ++ isi->fbd_list_start = dma_map_single(&pdev->dev, ++ &isi->video_buffer[0].fb_desc, ++ sizeof(struct fbd), ++ DMA_NONE); ++ */ ++ isi->fbd_list_start = __pa(&isi->video_buffer[0].fb_desc); ++ for(i=0; i < (video_buffers - 1); i++){ ++ isi->video_buffer[i].fb_desc.next_fbd_address = ++ /* ++ dma_map_single(&pdev->dev, ++ &isi->video_buffer[i+1].fb_desc, ++ sizeof(struct fbd), ++ DMA_NONE);*/ ++ __pa(&isi->video_buffer[i+1]); ++ } ++ /* FIXME ++ * isi->video_buffer[i].fb_desc.next_fbd_address = ++ * isi->fbd_list_start; ++ */ ++ isi->video_buffer[i].fb_desc.next_fbd_address = ++ __pa(&isi->video_buffer[0]); ++ ++#ifdef DEBUG ++ for(i=0;i < video_buffers; i++){ ++ pr_debug("atmel_isi: fbd at %08lx video buffer at \ ++phys addr %08lx \n", __pa(&isi->video_buffer[i]), ++ (unsigned long) isi->video_buffer[i].fb_desc.fb_address); ++ } ++#endif ++ dev_info(&pdev->dev, ++ "capture buffer: %d bytes at %p (phys 0x%08x)\n", ++ capture_buffer_size, isi->capture_buf, ++ isi->capture_phys); ++ ++ spin_lock_init(&isi->grabq_lock); ++ isi->grabq = kfifo_alloc(sizeof(int) * video_buffers, GFP_KERNEL, ++ &isi->grabq_lock); ++ if(IS_ERR(isi->grabq)){ ++ dev_err(&pdev->dev, "fifo allocation failed\n"); ++ goto err_fifo_alloc1; ++ } ++ spin_lock_init(&isi->doneq_lock); ++ isi->doneq = kfifo_alloc(sizeof(int) * video_buffers, GFP_KERNEL, ++ &isi->doneq_lock); ++ if(IS_ERR(isi->doneq)){ ++ dev_err(&pdev->dev, "fifo allocation failed\n"); ++ goto err_fifo_alloc2; ++ } ++ ++ isi_writel(isi, CR1, ISI_BIT(DIS)); ++ ++ ret = video_register_device(&isi->cdev, VFL_TYPE_GRABBER, -1); ++ if(ret) ++ goto err_register1; ++ ++ ret = video_register_device(&isi->vdev, VFL_TYPE_GRABBER, -1); ++ if (ret) ++ goto err_register2; ++ ++ platform_set_drvdata(pdev, isi); ++ ++ dev_info(&pdev->dev, "Atmel ISI V4L2 device at 0x%08lx\n", ++ (unsigned long)regs->start); ++ ++ return 0; ++ ++err_register2: ++ video_unregister_device(&isi->cdev); ++err_register1: ++ kfifo_free(isi->doneq); ++err_fifo_alloc2: ++ kfifo_free(isi->grabq); ++err_fifo_alloc1: ++err_alloc_vbuf: ++ while(i--) ++ dma_free_coherent(&pdev->dev, video_buffer_size, ++ isi->video_buffer[i].frame_buffer, ++ isi->video_buffer[i].fb_desc.fb_address); ++ dma_free_coherent(&pdev->dev, capture_buffer_size, ++ isi->capture_buf, ++ isi->capture_phys); ++err_alloc_cbuf: ++ free_irq(isi->irq, isi); ++err_req_irq: ++ iounmap(isi->regs); ++err_ioremap: ++ kfree(isi); ++err_alloc_isi: ++ clk_disable(hclk); ++ clk_disable(pclk); ++ clk_put(hclk); ++err_hclk: ++ clk_put(pclk); ++ ++ return ret; ++ ++} ++ ++static struct platform_driver avr32_isi_driver = { ++ .probe = avr32_isi_probe, ++ .remove = __exit_p(avr32_isi_remove), ++ .driver = { ++ .name = "atmel_isi", ++ .owner = THIS_MODULE, ++ }, ++}; ++ ++static int __init avr32_isi_init(void) ++{ ++ return platform_driver_probe(&avr32_isi_driver, &avr32_isi_probe); ++ ++/*FIXME return platform_driver_register(&avr32_isi_driver);*/ ++} ++ ++ ++static void __exit avr32_isi_exit(void) ++{ ++ platform_driver_unregister(&avr32_isi_driver); ++} ++ ++ ++module_init(avr32_isi_init); ++module_exit(avr32_isi_exit); ++ ++MODULE_AUTHOR("Lars Häring <lharing@atmel.com>"); ++MODULE_DESCRIPTION("The V4L2 driver for AVR32 Linux"); ++MODULE_LICENSE("GPL"); ++MODULE_SUPPORTED_DEVICE("video"); +diff --git a/drivers/media/video/atmel-isi.h b/drivers/media/video/atmel-isi.h +new file mode 100644 +index 0000000..2aa3c14 +--- /dev/null ++++ b/drivers/media/video/atmel-isi.h +@@ -0,0 +1,252 @@ ++/* ++ * Register definitions for the Atmel Image Sensor Interface. ++ * ++ * Copyright (C) 2006 Atmel Corporation ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation. ++ */ ++#ifndef __ASM_AVR32_ISI_H__ ++#define __ASM_AVR32_ISI_H__ ++ ++#include <linux/videodev2.h> ++ ++/* ISI register offsets */ ++#define ISI_CR1 0x0000 ++#define ISI_CR2 0x0004 ++#define ISI_SR 0x0008 ++#define ISI_IER 0x000c ++#define ISI_IDR 0x0010 ++#define ISI_IMR 0x0014 ++#define ISI_PSIZE 0x0020 ++#define ISI_PDECF 0x0024 ++#define ISI_PPFBD 0x0028 ++#define ISI_CDBA 0x002c ++#define ISI_Y2R_SET0 0x0030 ++#define ISI_Y2R_SET1 0x0034 ++#define ISI_R2Y_SET0 0x0038 ++#define ISI_R2Y_SET1 0x003c ++#define ISI_R2Y_SET2 0x0040 ++ ++/* Bitfields in CR1 */ ++#define ISI_RST_OFFSET 0 ++#define ISI_RST_SIZE 1 ++#define ISI_DIS_OFFSET 1 ++#define ISI_DIS_SIZE 1 ++#define ISI_HSYNC_POL_OFFSET 2 ++#define ISI_HSYNC_POL_SIZE 1 ++#define ISI_VSYNC_POL_OFFSET 3 ++#define ISI_VSYNC_POL_SIZE 1 ++#define ISI_PIXCLK_POL_OFFSET 4 ++#define ISI_PIXCLK_POL_SIZE 1 ++#define ISI_EMB_SYNC_OFFSET 6 ++#define ISI_EMB_SYNC_SIZE 1 ++#define ISI_CRC_SYNC_OFFSET 7 ++#define ISI_CRC_SYNC_SIZE 1 ++#define ISI_FRATE_OFFSET 8 ++#define ISI_FRATE_SIZE 3 ++#define ISI_FULL_OFFSET 12 ++#define ISI_FULL_SIZE 1 ++#define ISI_THMASK_OFFSET 13 ++#define ISI_THMASK_SIZE 2 ++#define ISI_CODEC_ON_OFFSET 15 ++#define ISI_CODEC_ON_SIZE 1 ++#define ISI_SLD_OFFSET 16 ++#define ISI_SLD_SIZE 8 ++#define ISI_SFD_OFFSET 24 ++#define ISI_SFD_SIZE 8 ++ ++/* Bitfields in CR2 */ ++#define ISI_IM_VSIZE_OFFSET 0 ++#define ISI_IM_VSIZE_SIZE 11 ++#define ISI_GS_MODE_OFFSET 11 ++#define ISI_GS_MODE_SIZE 1 ++#define ISI_RGB_MODE_OFFSET 12 ++#define ISI_RGB_MODE_SIZE 1 ++#define ISI_GRAYSCALE_OFFSET 13 ++#define ISI_GRAYSCALE_SIZE 1 ++#define ISI_RGB_SWAP_OFFSET 14 ++#define ISI_RGB_SWAP_SIZE 1 ++#define ISI_COL_SPACE_OFFSET 15 ++#define ISI_COL_SPACE_SIZE 1 ++#define ISI_IM_HSIZE_OFFSET 16 ++#define ISI_IM_HSIZE_SIZE 11 ++#define ISI_YCC_SWAP_OFFSET 28 ++#define ISI_YCC_SWAP_SIZE 2 ++#define ISI_RGB_CFG_OFFSET 30 ++#define ISI_RGB_CFG_SIZE 2 ++ ++/* Bitfields in SR */ ++#define ISI_CDC_STATUS_OFFSET 3 ++#define ISI_CDC_STATUS_SIZE 1 ++ ++/* Bitfields in SR/IER/IDR/IMR */ ++#define ISI_SOF_OFFSET 0 ++#define ISI_SOF_SIZE 1 ++#define ISI_SOFTRST_OFFSET 2 ++#define ISI_SOFTRST_SIZE 1 ++#define ISI_CRC_ERR_OFFSET 4 ++#define ISI_CRC_ERR_SIZE 1 ++#define ISI_FO_C_OVF_OFFSET 5 ++#define ISI_FO_C_OVF_SIZE 1 ++#define ISI_FO_P_OVF_OFFSET 6 ++#define ISI_FO_P_OVF_SIZE 1 ++#define ISI_FO_P_EMP_OFFSET 7 ++#define ISI_FO_P_EMP_SIZE 1 ++#define ISI_FO_C_EMP_OFFSET 8 ++#define ISI_FO_C_EMP_SIZE 1 ++#define ISI_FR_OVR_OFFSET 9 ++#define ISI_FR_OVR_SIZE 1 ++ ++/* Bitfields in PSIZE */ ++#define ISI_PREV_VSIZE_OFFSET 0 ++#define ISI_PREV_VSIZE_SIZE 10 ++#define ISI_PREV_HSIZE_OFFSET 16 ++#define ISI_PREV_HSIZE_SIZE 10 ++ ++/* Bitfields in PCDEF */ ++#define ISI_DEC_FACTOR_OFFSET 0 ++#define ISI_DEC_FACTOR_SIZE 8 ++ ++/* Bitfields in PPFBD */ ++#define ISI_PREV_FBD_ADDR_OFFSET 0 ++#define ISI_PREV_FBD_ADDR_SIZE 32 ++ ++/* Bitfields in CDBA */ ++#define ISI_CODEC_DMA_ADDR_OFFSET 0 ++#define ISI_CODEC_DMA_ADDR_SIZE 32 ++ ++/* Bitfields in Y2R_SET0 */ ++#define ISI_Y2R_SET0_C3_OFFSET 24 ++#define ISI_Y2R_SET0_C3_SIZE 8 ++ ++/* Bitfields in Y2R_SET1 */ ++#define ISI_Y2R_SET1_C4_OFFSET 0 ++#define ISI_Y2R_SET1_C4_SIZE 9 ++#define ISI_YOFF_OFFSET 12 ++#define ISI_YOFF_SIZE 1 ++#define ISI_CROFF_OFFSET 13 ++#define ISI_CROFF_SIZE 1 ++#define ISI_CBOFF_OFFSET 14 ++#define ISI_CBOFF_SIZE 1 ++ ++/* Bitfields in R2Y_SET0 */ ++#define ISI_C0_OFFSET 0 ++#define ISI_C0_SIZE 8 ++#define ISI_C1_OFFSET 8 ++#define ISI_C1_SIZE 8 ++#define ISI_C2_OFFSET 16 ++#define ISI_C2_SIZE 8 ++#define ISI_ROFF_OFFSET 24 ++#define ISI_ROFF_SIZE 1 ++ ++/* Bitfields in R2Y_SET1 */ ++#define ISI_R2Y_SET1_C3_OFFSET 0 ++#define ISI_R2Y_SET1_C3_SIZE 8 ++#define ISI_R2Y_SET1_C4_OFFSET 8 ++#define ISI_R2Y_SET1_C4_SIZE 8 ++#define ISI_C5_OFFSET 16 ++#define ISI_C5_SIZE 8 ++#define ISI_GOFF_OFFSET 24 ++#define ISI_GOFF_SIZE 1 ++ ++/* Bitfields in R2Y_SET2 */ ++#define ISI_C6_OFFSET 0 ++#define ISI_C6_SIZE 8 ++#define ISI_C7_OFFSET 8 ++#define ISI_C7_SIZE 8 ++#define ISI_C8_OFFSET 16 ++#define ISI_C8_SIZE 8 ++#define ISI_BOFF_OFFSET 24 ++#define ISI_BOFF_SIZE 1 ++ ++/* Constants for FRATE */ ++#define ISI_FRATE_CAPTURE_ALL 0 ++ ++/* Constants for YCC_SWAP */ ++#define ISI_YCC_SWAP_DEFAULT 0 ++#define ISI_YCC_SWAP_MODE_1 1 ++#define ISI_YCC_SWAP_MODE_2 2 ++#define ISI_YCC_SWAP_MODE_3 3 ++ ++/* Constants for RGB_CFG */ ++#define ISI_RGB_CFG_DEFAULT 0 ++#define ISI_RGB_CFG_MODE_1 1 ++#define ISI_RGB_CFG_MODE_2 2 ++#define ISI_RGB_CFG_MODE_3 3 ++ ++/* Bit manipulation macros */ ++#define ISI_BIT(name) \ ++ (1 << ISI_##name##_OFFSET) ++#define ISI_BF(name,value) \ ++ (((value) & ((1 << ISI_##name##_SIZE) - 1)) \ ++ << ISI_##name##_OFFSET) ++#define ISI_BFEXT(name,value) \ ++ (((value) >> ISI_##name##_OFFSET) \ ++ & ((1 << ISI_##name##_SIZE) - 1)) ++#define ISI_BFINS(name,value,old) \ ++ (((old) & ~(((1 << ISI_##name##_SIZE) - 1) \ ++ << ISI_##name##_OFFSET))\ ++ | ISI_BF(name,value)) ++ ++/* Register access macros */ ++#define isi_readl(port,reg) \ ++ __raw_readl((port)->regs + ISI_##reg) ++#define isi_writel(port,reg,value) \ ++ __raw_writel((value), (port)->regs + ISI_##reg) ++ ++#define ATMEL_V4L2_VID_FLAGS ( V4L2_CAP_VIDEO_OUTPUT ) ++ ++struct atmel_isi; ++ ++enum atmel_isi_pixfmt { ++ ATMEL_ISI_PIXFMT_GREY, /* Greyscale */ ++ ATMEL_ISI_PIXFMT_CbYCrY, ++ ATMEL_ISI_PIXFMT_CrYCbY, ++ ATMEL_ISI_PIXFMT_YCbYCr, ++ ATMEL_ISI_PIXFMT_YCrYCb, ++ ATMEL_ISI_PIXFMT_RGB24, ++ ATMEL_ISI_PIXFMT_BGR24, ++ ATMEL_ISI_PIXFMT_RGB16, ++ ATMEL_ISI_PIXFMT_BGR16, ++ ATMEL_ISI_PIXFMT_GRB16, /* G[2:0] R[4:0]/B[4:0] G[5:3] */ ++ ATMEL_ISI_PIXFMT_GBR16, /* G[2:0] B[4:0]/R[4:0] G[5:3] */ ++ ATMEL_ISI_PIXFMT_RGB24_REV, ++ ATMEL_ISI_PIXFMT_BGR24_REV, ++ ATMEL_ISI_PIXFMT_RGB16_REV, ++ ATMEL_ISI_PIXFMT_BGR16_REV, ++ ATMEL_ISI_PIXFMT_GRB16_REV, /* G[2:0] R[4:0]/B[4:0] G[5:3] */ ++ ATMEL_ISI_PIXFMT_GBR16_REV, /* G[2:0] B[4:0]/R[4:0] G[5:3] */ ++}; ++ ++struct atmel_isi_format { ++ struct v4l2_pix_format pix; ++ enum atmel_isi_pixfmt input_format; ++}; ++ ++struct atmel_isi_camera { ++ const char *name; ++ struct module *owner; ++ struct list_head list; ++ unsigned int hsync_act_low:1; ++ unsigned int vsync_act_low:1; ++ unsigned int pclk_act_falling:1; ++ unsigned int has_emb_sync:1; ++ /* ISI supports up to 17 formats */ ++ unsigned int pixelformats[17]; ++ int (*get_format)(struct atmel_isi_camera *cam, ++ struct atmel_isi_format *fmt); ++ int (*set_format)(struct atmel_isi_camera *cam, ++ struct atmel_isi_format *fmt); ++ int (*start_capture)(struct atmel_isi_camera *cam); ++ int (*stop_capture)(struct atmel_isi_camera *cam); ++ struct atmel_isi *isi; ++}; ++ ++extern int atmel_isi_register_camera(struct atmel_isi_camera *cam); ++extern void atmel_isi_unregister_camera(struct atmel_isi_camera *cam); ++ ++ ++#endif /* __ASM_AVR32_ISI_H__ */ ++ +diff --git a/drivers/media/video/Kconfig b/drivers/media/video/Kconfig +index 7558484..a8cdf42 100644 +--- a/drivers/media/video/Kconfig ++++ b/drivers/media/video/Kconfig +@@ -13,6 +13,20 @@ menuconfig VIDEO_CAPTURE_DRIVERS + + if VIDEO_CAPTURE_DRIVERS && VIDEO_DEV + ++config VIDEO_AVR32_ISI ++ tristate "AVR32 video support" ++ depends on VIDEO_DEV ++ ---help--- ++ This module makes the AVR32 Image Sensor Interface available ++ ++config VIDEO_MT9M112 ++ tristate "Micron MT9M112 camera" ++ default n ++ depends on VIDEO_AVR32_ISI && I2C ++ ---help--- ++ This will add support for the Micron MT9M112 camera. ++ as a v4l2 device. ++ + config VIDEO_ADV_DEBUG + bool "Enable advanced debug functionality" + default n +diff --git a/drivers/media/video/Makefile b/drivers/media/video/Makefile +index 78e38d0..3156969 100644 +--- a/drivers/media/video/Makefile ++++ b/drivers/media/video/Makefile +@@ -77,7 +77,8 @@ obj-$(CONFIG_VIDEO_HEXIUM_ORION) += hexium_orion.o + obj-$(CONFIG_VIDEO_HEXIUM_GEMINI) += hexium_gemini.o + obj-$(CONFIG_VIDEO_DPC) += dpc7146.o + obj-$(CONFIG_TUNER_3036) += tuner-3036.o + obj-$(CONFIG_VIDEO_AVR32_ISI) += atmel-isi.o ++obj-$(CONFIG_VIDEO_MT9M112) += tm13m3.o + + obj-$(CONFIG_VIDEO_TUNER) += tuner.o + obj-$(CONFIG_VIDEO_BUF) += video-buf.o +diff --git a/drivers/media/video/tm13m3.c b/drivers/media/video/tm13m3.c +new file mode 100644 +index 0000000..42f0fd3 +--- /dev/null ++++ b/drivers/media/video/tm13m3.c +@@ -0,0 +1,631 @@ ++/* ++ * Micron Mt9M112 camera driver. ++ * ++ * Copyright (C) 2005-2007 Atmel Corporation ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation. ++ */ ++//#define DEBUG ++ ++#include <linux/clk.h> ++#include <linux/module.h> ++#include <linux/init.h> ++#include <linux/interrupt.h> ++#include <linux/io.h> ++#include <linux/device.h> ++#include <linux/list.h> ++#include <linux/delay.h> ++#include <linux/i2c.h> ++ ++#include <linux/err.h> ++#include <asm/gpio.h> ++#include <asm/arch/board.h> ++#include <asm/arch/at32ap700x.h> ++ ++#include "atmel-isi.h" ++ ++/* camera standby pin */ ++#define CAM_STANDBY GPIO_PIN_PA(9) ++/* camera reset pin */ ++#define CAM_RESET GPIO_PIN_PA(8) ++ ++/*! Maximum number of pixels in a row */ ++#define TM13M3_MAX_WIDTH 1280 ++/*! Maximum number of rows */ ++#define TM13M3_MAX_HEIGHT 1024 ++ ++/*! Clock for image sensor CLKIN signal */ ++static char mclk_name[32] = "gclk0"; ++/*! Parent clock of gclk0 ++ * Either osc0 or pll0 ++ * We use osc0 with 20MHz quarz. ++ */ ++static char mclk_parent_name[32] = "osc0"; ++ ++static struct clk *mclk; ++static struct clk *mclk_parent; ++module_param_string(mclk, mclk_name, sizeof(mclk_name), 0644); ++MODULE_PARM_DESC(mclk, "Name of the clock used as camera clock input"); ++ ++module_param_string(mclk_parent, mclk_parent_name, ++ sizeof(mclk_parent_name), 0644); ++MODULE_PARM_DESC(mclk, "Name of mclk parent clock"); ++ ++ ++/* Register adresses */ ++#define CHIP_VERSION 0x0 ++#define PROGRAM_CONTROL 0x2CC ++#define READ_MODE_CONTEXT_B 0x20 ++#define CONTEXT_CONTROL 0xC8 ++#define COLUMN_WIDTH 0x4 ++#define HORIZONTAL_OUTPUT_SIZE_B 0x1A1 ++#define VERTICAL_OUTPUT_SIZE_B 0x1A4 ++#define ROW_WIDTH 0x3 ++#define PAGE_MAP 0xF0 ++#define OUTPUT_FORMAT_CONTROL_A 0x13A ++#define HORIZONTAL_ZOOM 0x1A6 ++#define VERTICAL_ZOOM 0x1A9 ++#define PLL_CONTROL_1 0x66 ++#define PLL_CONTROL_2 0x67 ++#define CLOCK_CONTROL 0x65 ++ ++/* Chip ID stored in CHIP_VERSION register */ ++#define MT9M112_CHIP_ID 0x148C ++/* I2C address of camera module */ ++#define I2C_TM13M3 0x5D ++ ++static unsigned short normal_i2c[] = { ++ I2C_TM13M3, ++ I2C_CLIENT_END ++}; ++I2C_CLIENT_INSMOD; ++ ++#ifdef CONFIG_DEBUG_FS ++struct reg_dbg { ++ struct tm13m3 *is; ++ struct dentry *dentry; ++ unsigned int offset; ++}; ++#endif ++ ++struct tm13m3 { ++ struct mutex mutex; ++ u16 current_page; ++ u32 current_format; ++ u16 pll_avr_ctrl; ++ struct clk *mclk; ++ struct i2c_client client; ++ struct atmel_isi_camera cam; ++#ifdef CONFIG_DEBUG_FS ++ struct dentry *debugfs_root; ++ struct reg_dbg debugfs_reg[37]; ++#endif ++}; ++ ++ ++#define to_tm13m3(cam) container_of(cam, struct tm13m3, cam) ++ ++static struct i2c_driver tm13m3_driver; ++ ++static int tm13m3_write_16(struct tm13m3 *is, u16 reg, u16 value) ++{ ++ int ret = 0; ++ u16 register_page = 0; ++ ++ register_page = reg >> 8; ++ ++ if ((register_page != is->current_page) ++ && (reg != PAGE_MAP)){ ++ ++ if( 0 <= (ret = i2c_smbus_write_word_data(&is->client, PAGE_MAP, cpu_to_le16(register_page)))) ++ is->current_page = register_page; ++ } ++ ++ if(ret >= 0){ ++ ret = i2c_smbus_write_word_data(&is->client, (u8) reg, cpu_to_le16(value)); ++ } ++ return ret; ++} ++ ++static int tm13m3_read_16(struct tm13m3 *is, u16 reg) ++{ ++ int ret = 0; ++ u16 register_page = 0; ++ ++ register_page = reg >> 8; ++ ++ if ((register_page != is->current_page) ++ && (reg != PAGE_MAP)){ ++ ++ if( 0 <= (ret = i2c_smbus_write_word_data(&is->client, PAGE_MAP, cpu_to_le16(register_page)))) ++ is->current_page = register_page; ++ } ++ ++if(ret >= 0){ ++ ret = i2c_smbus_read_word_data(&is->client, (u8) reg); ++ } ++ ++ if (ret < 0) ++ return -EIO; ++ ++ return le16_to_cpu(ret); ++} ++ ++#ifdef CONFIG_DEBUG_FS ++#include <linux/debugfs.h> ++#include <linux/uaccess.h> ++ ++struct tm13m3_reg { ++ u16 address; ++ const char *name; ++}; ++ ++static struct tm13m3_reg tm13m3_registers[38] = { ++ { .address = CHIP_VERSION, .name = "chip_version"}, ++ { .address = 0x1, .name = "row_start"}, ++ { .address = 0x2, .name = "column_start"}, ++ { .address = 0x3, .name = "row_width"}, ++ { .address = 0x4, .name = "column_width"}, ++ { .address = 0x5, .name = "horizontal_blanking_b"}, ++ { .address = 0x6, .name = "vertical_blanking_b"}, ++ { .address = 0x7, .name = "horizontal_blanking_a"}, ++ { .address = 0x8, .name = "vertical_blanking_a"}, ++ { .address = 0x0D, .name = "reset"}, ++ { .address = 0x20, .name = "read_mode_context_b"}, ++ { .address = 0x21, .name = "read_mode_context_a"}, ++ { .address = 0x22, .name = "dark_col_row"}, ++ { .address = 0x65, .name = "clock_control"}, ++ { .address = 0x66, .name = "pll_control_1"}, ++ { .address = 0x67, .name = "pll_control_2"}, ++ { .address = 0xC8, .name = "context_control"}, ++ { .address = 0x106, .name = "mode_control"}, ++ { .address = 0x108, .name = "format_control"}, ++ { .address = 0x13A, .name = "output_format_control_a"}, ++ { .address = 0x148, .name = "test_pattern_generator"}, ++ { .address = 0x19B, .name = "output_format_control_b"}, ++ { .address = 0x1A1, .name = "horizontal_output_size_b"}, ++ { .address = 0x1A4, .name = "vertical_output_size_b"}, ++ { .address = 0x1A5, .name = "horizontal_pan"}, ++ { .address = 0x1A6, .name = "horizontal_zoom"}, ++ { .address = 0x1A7, .name = "horizontal_output_size_a"}, ++ { .address = 0x1A8, .name = "vertical_pan"}, ++ { .address = 0x1A9, .name = "vertical_zoom"}, ++ { .address = 0x1AA, .name = "vertical_output_size_a"}, ++ { .address = 240, .name = "page_map"}, ++ { .address = 0x2C8, .name = "global_context_control"}, ++ { .address = 0x2CB, .name = "program_advance"}, ++ { .address = 0x2CC, .name = "program_control"}, ++ { .address = 0x2D2, .name = "default_program_conf"}, ++ { .address = 0x2D3, .name = "user_global_context_control"}, ++ { .address = (0x100 | 0), .name = "module_id"}, ++ { .address = (0x200 | 2), .name = "mode_control"}, ++}; ++ ++static u64 reg_dbg_get(void *data) ++{ ++ struct reg_dbg *reg = data; ++ int ret = 0; ++ ++ mutex_lock(®->is->mutex); ++ ret = tm13m3_read_16(reg->is, tm13m3_registers[reg->offset].address); ++ mutex_unlock(®->is->mutex); ++ ++ if (ret < 0) { ++ printk("%s: failed to read reg 0x%02x: %d\n", ++ reg->is->cam.name, ++ tm13m3_registers[reg->offset].address, ret); ++ return ~0ULL; ++ } ++ return ret; ++} ++ ++static void reg_dbg_set(void *data, u64 val) ++{ ++ struct reg_dbg *reg = data; ++ int ret = 0; ++ ++ mutex_lock(®->is->mutex); ++ ret = tm13m3_write_16(reg->is, tm13m3_registers[reg->offset].address, (u16) val); ++ mutex_unlock(®->is->mutex); ++ ++ if (ret < 0){ ++ printk("%s: failed to write reg 0x%02x: %d\n", ++ reg->is->cam.name, ++ tm13m3_registers[reg->offset].address, ret); ++ } ++} ++DEFINE_SIMPLE_ATTRIBUTE(reg_dbg_fops, reg_dbg_get, reg_dbg_set, "%04llx\n"); ++ ++static void tm13m3_init_debugfs(struct tm13m3 *is) ++{ ++ struct dentry *root, *reg; ++ unsigned int i; ++ ++ root = debugfs_create_dir(is->cam.name, NULL); ++ if (IS_ERR(root) || !root) ++ goto err_root; ++ is->debugfs_root = root; ++ ++ for (i = 0; i < ARRAY_SIZE(is->debugfs_reg); i++) { ++ if (!tm13m3_registers[i].name) ++ continue; ++ ++ is->debugfs_reg[i].is = is; ++ is->debugfs_reg[i].offset = i; ++ ++ reg = debugfs_create_file(tm13m3_registers[i].name, S_IRUGO | S_IWUSR, ++ root, &is->debugfs_reg[i], ++ ®_dbg_fops); ++ if (!reg) ++ goto err_reg; ++ is->debugfs_reg[i].dentry = reg; ++ } ++ ++ return; ++ ++err_reg: ++ while (i--) ++ debugfs_remove(is->debugfs_reg[i].dentry); ++ debugfs_remove(root); ++err_root: ++ is->debugfs_root = NULL; ++ printk(KERN_ERR "%s: failed to initialize debugfs\n", ++ is->cam.name); ++} ++ ++static void tm13m3_cleanup_debugfs(struct tm13m3 *is) ++{ ++ unsigned int i; ++ ++ if (is->debugfs_root) { ++ for (i = 0; i < ARRAY_SIZE(is->debugfs_reg); i++) ++ debugfs_remove(is->debugfs_reg[i].dentry); ++ debugfs_remove(is->debugfs_root); ++ } ++} ++#else ++static inline void tm13m3_init_debugfs(struct tm13m3 *is) ++{ ++ ++} ++ ++static inline void tm13m3_cleanup_debugfs(struct tm13m3 *is) ++{ ++ ++} ++#endif /* CONFIG_DEBUG_FS */ ++ ++static int tm13m3_get_format(struct atmel_isi_camera *cam, ++ struct atmel_isi_format *fmt) ++{ ++ struct tm13m3 *is = to_tm13m3(cam); ++ int ret = 0; ++ ++ fmt->pix.colorspace = V4L2_COLORSPACE_SMPTE170M; ++ fmt->input_format = ATMEL_ISI_PIXFMT_CbYCrY; ++ fmt->input_format = is->current_format; ++ ++ fmt->pix.width = 320; ++ fmt->pix.height = 240; ++ ++ return ret; ++} ++ ++static int tm13m3_set_format(struct atmel_isi_camera *cam, ++ struct atmel_isi_format *fmt) ++{ ++ struct tm13m3 *is = to_tm13m3(cam); ++ int ret = 0; ++ ++ fmt->pix.colorspace = V4L2_COLORSPACE_SMPTE170M; ++/* ++ switch(fmt->input_format){ ++ case ATMEL_ISI_PIXFMT_CbYCrY: ++ is->current_format = ATMEL_ISI_PIXFMT_CbYCrY; ++ break; ++ case ATMEL_ISI_PIXFMT_YCbYCr: ++ is->current_format = ATMEL_ISI_PIXFMT_YCbYCr; ++ break; ++ case ATMEL_ISI_PIXFMT_CrYCbY: ++ is->current_format = ATMEL_ISI_PIXFMT_CrYCbY; ++ break; ++ case ATMEL_ISI_PIXFMT_YCrYCb: ++ is->current_format = ATMEL_ISI_PIXFMT_YCrYCb; ++ break; ++ default: ++ // force a valid format ++ fmt->input_format = ATMEL_ISI_PIXFMT_CbYCrY; ++ is->current_format = ATMEL_ISI_PIXFMT_CbYCrY; ++ pr_debug("%s: Not supported format, forcing default format\n", ++ cam->name); ++ break; ++ } ++*/ ++ fmt->input_format = ATMEL_ISI_PIXFMT_CrYCbY; ++ is->current_format = ATMEL_ISI_PIXFMT_CrYCbY; ++ ++ /* adjust picture width and height */ ++ if (fmt->pix.width > TM13M3_MAX_WIDTH) ++ fmt->pix.width = TM13M3_MAX_WIDTH; ++ if (fmt->pix.height > TM13M3_MAX_HEIGHT) ++ fmt->pix.height = TM13M3_MAX_HEIGHT; ++ ++ //tm13m3_write_16(is, COLUMN_WIDTH, fmt->pix.width); ++ //tm13m3_write_16(is, ROW_WIDTH, fmt->pix.height); ++ //tm13m3_write_16(is, HORIZONTAL_ZOOM, fmt->pix.width); ++ //tm13m3_write_16(is, VERTICAL_ZOOM, fmt->pix.height); ++ ++ //tm13m3_write_16(is, HORIZONTAL_OUTPUT_SIZE_B, fmt->pix.width); ++ //tm13m3_write_16(is, VERTICAL_OUTPUT_SIZE_B, fmt->pix.height); ++ ++ /* FIXME Set context output width needed ??*/ ++ ++ pr_debug("%s: set_format %ux%u\n", cam->name, ++ fmt->pix.width, fmt->pix.height); ++ return ret; ++} ++ ++static void tm13m3_reset_soft(struct tm13m3 *is) ++{ ++ tm13m3_write_16(is, 0x0D, 0x0001); ++ /*FIXME test if toggling is really needed */ ++ tm13m3_write_16(is, 0x0D, 0x0000); ++} ++ ++static void tm13m3_reset_hardware(struct tm13m3 *is) ++{ ++ gpio_set_value(CAM_RESET, 0); ++ //FIXME : set correct reset interval usleep(); ++ gpio_set_value(CAM_RESET, 1); ++} ++ ++static int tm13m3_start_capture(struct atmel_isi_camera *cam) ++{ ++ struct tm13m3 *is = to_tm13m3(cam); ++ int ret = 0; ++ ++ return ret; ++} ++ ++static int tm13m3_stop_capture(struct atmel_isi_camera *cam) ++{ ++ struct tm13m3 *is = to_tm13m3(cam); ++ int ret = 0; ++ ++ ++ return ret; ++} ++ ++static int tm13m3_init_hardware(struct tm13m3 *is) ++{ ++ int chip_id; ++ ++ tm13m3_reset_hardware(is); ++ /* set register page to reset value*/ ++ is->current_page = 0; ++ is->current_format = ATMEL_ISI_PIXFMT_CbYCrY; ++ ++ pr_debug("tm13m3: Init sensor\n"); ++ /* Try to identify the camera */ ++ chip_id = tm13m3_read_16(is, CHIP_VERSION); ++ if (chip_id < 0) ++ return -EIO; ++ ++ if (chip_id != MT9M112_CHIP_ID) { ++ printk(KERN_ERR "%s: Unknown chip ID 0x%04x\n", ++ is->cam.name, chip_id); ++ return -ENODEV; ++ } ++#if 0 ++ /* Configure pll for 36,8 MHz with CLKIN = 20MHz ++ * fout = fclkin * M * 1 /( 2* (N+1) * (P+1)) ++ */ ++ /* Set P = 2 */ ++ tm13m3_write_16(is, PLL_CONTROL_2, 0x0502); ++ /* M = 22, N = 1*/ ++ tm13m3_write_16(is, PLL_CONTROL_1, 0x1601); ++ /* wake up pll*/ ++ tm13m3_write_16(is, CLOCK_CONTROL, 0x8000); ++ /* wait until pll has stabilized */ ++ mdelay(1); ++ /* set pll as master clock*/ ++ tm13m3_write_16(is, CLOCK_CONTROL, 0x0000); ++ ++#endif ++ /* Set semi-auto mode program mode*/ ++ tm13m3_write_16(is, PROGRAM_CONTROL, 0x0010); ++ /* set context B read mode */ ++ tm13m3_write_16(is, READ_MODE_CONTEXT_B, 0x0100); ++ /* switch to read+resize context B */ ++ tm13m3_write_16(is, CONTEXT_CONTROL, 0x0408); ++ /* set ITU-R BT.656 codes */ ++ tm13m3_write_16(is, OUTPUT_FORMAT_CONTROL_A, 0x0A00); ++ /* set sensor image size */ ++ tm13m3_write_16(is, HORIZONTAL_ZOOM, 320); ++ tm13m3_write_16(is, VERTICAL_ZOOM, 240); ++ tm13m3_write_16(is, HORIZONTAL_OUTPUT_SIZE_B, 320); ++ tm13m3_write_16(is, VERTICAL_OUTPUT_SIZE_B, 240); ++ tm13m3_write_16(is, COLUMN_WIDTH, 320); ++ tm13m3_write_16(is, ROW_WIDTH, 240); ++ return 0; ++} ++static int tm13m3_detect_client(struct i2c_adapter *adapter, ++ int address, int kind) ++{ ++ struct i2c_client *client; ++ struct tm13m3 *is; ++ int ret; ++ ++ pr_debug("tm13m3: detecting client on address 0x%x\n", address); ++ ++ /* Check if the adapter supports the needed features */ ++ if (!i2c_check_functionality(adapter, ++ (I2C_FUNC_SMBUS_READ_BYTE_DATA ++ | I2C_FUNC_SMBUS_WRITE_BYTE_DATA ++ | I2C_FUNC_SMBUS_READ_WORD_DATA ++ | I2C_FUNC_SMBUS_WRITE_WORD_DATA))) ++ return 0; ++ ++ is = kzalloc(sizeof(struct tm13m3), GFP_KERNEL); ++ if (!is) ++ return -ENOMEM; ++ ++ client = &is->client; ++ client->addr = address; ++ client->adapter = adapter; ++ client->driver = &tm13m3_driver; ++ strcpy(client->name, "tm13m3"); ++ ++ is->cam.name = client->name; ++ is->cam.hsync_act_low = 0; ++ is->cam.vsync_act_low = 0; ++ is->cam.pclk_act_falling = 0; ++ /* no SAV/EAV sync -> HSYNC and VSYNC used */ ++ /*is->cam.has_emb_sync = 0;*/ ++ is->cam.has_emb_sync = 1; ++ ++ is->cam.get_format = tm13m3_get_format; ++ is->cam.set_format = tm13m3_set_format; ++ is->cam.start_capture = tm13m3_start_capture; ++ is->cam.stop_capture = tm13m3_stop_capture; ++ ++ mutex_init(&is->mutex); ++ ++ is->mclk = clk_get(NULL, mclk_name); ++ if (IS_ERR(is->mclk)) { ++ ret = PTR_ERR(is->mclk); ++ goto err_clk; ++ } ++ clk_enable(is->mclk); ++ ++ ret = i2c_attach_client(client); ++ if (ret) ++ goto err_attach; ++ ++ i2c_set_clientdata(client, is); ++ ++ ret = tm13m3_init_hardware(is); ++ if (ret) ++ goto err_init_hw; ++ ++ /* We're up and running. Notify the ISI driver */ ++ ret = atmel_isi_register_camera(&is->cam); ++ if (ret) ++ goto err_register; ++ ++ printk(KERN_INFO "TM13M3 Image Sensor at %s:0x%02x\n", ++ adapter->name, address); ++ ++ tm13m3_init_debugfs(is); ++ ++ return 0; ++ ++err_register: ++err_init_hw: ++// at76_reset_hardware(is); ++ i2c_detach_client(client); ++err_attach: ++ clk_disable(is->mclk); ++ clk_put(is->mclk); ++err_clk: ++ kfree(is); ++ return ret; ++} ++ ++static int tm13m3_attach_adapter(struct i2c_adapter *adapter) ++{ ++ pr_debug("tm13m3: starting probe for adapter %s (%u)\n", ++ adapter->name, adapter->id); ++ return i2c_probe(adapter, &addr_data, &tm13m3_detect_client); ++} ++ ++static int tm13m3_detach_client(struct i2c_client *client) ++{ ++ struct tm13m3 *is = i2c_get_clientdata(client); ++ int ret; ++ ++ tm13m3_cleanup_debugfs(is); ++ atmel_isi_unregister_camera(&is->cam); ++ ++ tm13m3_reset_hardware(is); ++ ++ ret = i2c_detach_client(client); ++ if (ret) ++ return ret; ++ ++ clk_disable(is->mclk); ++ clk_put(is->mclk); ++ kfree(is); ++ ++ return 0; ++} ++ ++static struct i2c_driver tm13m3_driver = { ++ .driver = { ++ .name = "tm13m3", ++ }, ++ .id = I2C_DRIVERID_TM13M3, ++ .attach_adapter = &tm13m3_attach_adapter, ++ .detach_client = &tm13m3_detach_client, ++}; ++ ++static int __init tm13m3_init(void) ++{ ++ /* ++ * Set up the master clock, if available. If clk_get() fails, ++ * this hopefully means that the board generates a suitable ++ * master clock some other way, which is fine by us. ++ * ++ * We need to do this before probing the i2c bus, as the ++ * camera won't ack any messages when it doesn't have a clock. ++ */ ++ mclk_parent = clk_get(NULL, mclk_parent_name); ++ if (!IS_ERR(mclk_parent)) ++ clk_enable(mclk_parent); ++ else { ++ mclk_parent = NULL; ++ pr_debug("tm13m3: No parent clock available\n"); ++ } ++ ++ mclk = clk_get(NULL, mclk_name); ++ if (!IS_ERR(mclk)) { ++ if (mclk_parent) ++ clk_set_parent(mclk, mclk_parent); ++ ++ clk_set_rate(mclk, 27000000); ++ clk_enable(mclk); ++ } else { ++ mclk = NULL; ++ pr_debug("tm13m3: No clock set\n"); ++ } ++ ++ gpio_direction_output(CAM_STANDBY, 0); ++ /* Reset sequence */ ++ gpio_direction_output(CAM_RESET, 0); ++ udelay(4); ++ gpio_set_value(CAM_RESET, 1); ++ ++ return i2c_add_driver(&tm13m3_driver); ++ ++} ++module_init(tm13m3_init); ++ ++static void __exit tm13m3_exit(void) ++{ ++ if (mclk) { ++ clk_disable(mclk); ++ clk_put(mclk); ++ } ++ if (mclk_parent) { ++ clk_disable(mclk_parent); ++ clk_put(mclk_parent); ++ } ++ i2c_del_driver(&tm13m3_driver); ++} ++module_exit(tm13m3_exit); ++ ++MODULE_DESCRIPTION("Atmel Image Sensor Interface Driver"); ++MODULE_AUTHOR("Lars Häring <lharing@atmel.com>"); ++MODULE_LICENSE("GPL"); +>From dc4286f6020df0bf791228cdfe7d4ea58e2f46ef Mon Sep 17 00:00:00 2001 +From: Haavard Skinnemoen <hskinnemoen@atmel.com> +Date: Wed, 17 Jan 2007 13:47:40 +0100 +Subject: [PATCH] AP7000: Add platform_device for ISI + +Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com> +--- + arch/avr32/mach-at32ap/at32ap700x.c | 47 +++++++++++++++++++++++++++++++++ + include/asm-avr32/arch-at32ap/board.h | 1 + + 2 files changed, 48 insertions(+), 0 deletions(-) + +diff --git a/arch/avr32/mach-at32ap/at32ap700x.c b/arch/avr32/mach-at32ap/at32ap700x.c +index 1130c8a..4184296 100644 +--- a/arch/avr32/mach-at32ap/at32ap700x.c ++++ b/arch/avr32/mach-at32ap/at32ap700x.c +@@ -1396,6 +1396,51 @@ at32_add_device_abdac(unsigned int id) + } + + /* -------------------------------------------------------------------- ++ * ISI ++ * -------------------------------------------------------------------- */ ++static struct resource atmel_isi0_resource[] = { ++ PBMEM(0xfff02c00), ++ IRQ(30), ++}; ++DEFINE_DEV(atmel_isi, 0); ++DEV_CLK(hclk, atmel_isi0, hsb, 5); ++DEV_CLK(pclk, atmel_isi0, pbb, 11); ++ ++struct platform_device *__init ++at32_add_device_isi(unsigned int id) ++{ ++ struct platform_device *pdev; ++ ++ switch (id) { ++ case 0: ++ pdev = &atmel_isi0_device; ++ select_peripheral(PB(0), PERIPH_A, 0); /* DATA0 */ ++ select_peripheral(PB(1), PERIPH_A, 0); /* DATA1 */ ++ select_peripheral(PB(2), PERIPH_A, 0); /* DATA2 */ ++ select_peripheral(PB(3), PERIPH_A, 0); /* DATA3 */ ++ select_peripheral(PB(4), PERIPH_A, 0); /* DATA4 */ ++ select_peripheral(PB(5), PERIPH_A, 0); /* DATA5 */ ++ select_peripheral(PB(6), PERIPH_A, 0); /* DATA6 */ ++ select_peripheral(PB(7), PERIPH_A, 0); /* DATA7 */ ++ select_peripheral(PB(11), PERIPH_B, 0); /* DATA8 */ ++ select_peripheral(PB(12), PERIPH_B, 0); /* DATA9 */ ++ select_peripheral(PB(13), PERIPH_B, 0); /* DATA10 */ ++ select_peripheral(PB(14), PERIPH_B, 0); /* DATA11 */ ++ select_peripheral(PB(8), PERIPH_A, 0); /* HSYNC */ ++ select_peripheral(PB(9), PERIPH_A, 0); /* VSYNC */ ++ select_peripheral(PB(10), PERIPH_A, 0); /* PCLK */ ++ break; ++ ++ default: ++ return NULL; ++ } ++ ++ platform_device_register(pdev); ++ ++ return pdev; ++} ++ ++/* -------------------------------------------------------------------- + * GCLK + * -------------------------------------------------------------------- */ + static struct clk gclk0 = { +@@ -1493,6 +1538,8 @@ struct clk *at32_clock_list[] = { + &gclk2, + &gclk3, + &gclk4, ++ &atmel_isi0_hclk, ++ &atmel_isi0_pclk, + }; + unsigned int at32_nr_clocks = ARRAY_SIZE(at32_clock_list); + +diff --git a/include/asm-avr32/arch-at32ap/board.h b/include/asm-avr32/arch-at32ap/board.h +index 9b36eb8..931f5af 100644 +--- a/include/asm-avr32/arch-at32ap/board.h ++++ b/include/asm-avr32/arch-at32ap/board.h +@@ -55,6 +55,7 @@ at32_add_device_lcdc(unsigned int id, struct atmel_lcdfb_info *data, + + struct platform_device *at32_add_device_ac97c(unsigned int id); + struct platform_device *at32_add_device_abdac(unsigned int id); ++struct platform_device *at32_add_device_isi(unsigned int id); + + /* depending on what's hooked up, not all SSC pins will be used */ + #define ATMEL_SSC_TK 0x01 +-- +1.5.2.3 + +>From 6bac229e6999ce8e761baf97975fc5db774721fa Mon Sep 17 00:00:00 2001 +From: Haavard Skinnemoen <hskinnemoen@atmel.com> +Date: Wed, 21 Feb 2007 15:35:44 +0100 +Subject: [PATCH] NGW100: Wire up the ISI + +Since the NGW100 doesn't actually have a camera on board, this patch +merely serves as an example on how you might wire up the ISI on a +board that does have a camera. +--- + arch/avr32/boards/atngw100/setup.c | 5 +++++ + 1 files changed, 5 insertions(+), 0 deletions(-) + +diff --git a/arch/avr32/boards/atngw100/setup.c b/arch/avr32/boards/atngw100/setup.c +index d649974..6ca98bb 100644 +--- a/arch/avr32/boards/atngw100/setup.c ++++ b/arch/avr32/boards/atngw100/setup.c +@@ -178,6 +178,11 @@ static int __init atngw100_init(void) + at32_add_device_twi(0); + #endif + ++ at32_add_device_isi(0); ++ ++ /* Master clock for the camera (GCLK0) */ ++ at32_select_periph(GPIO_PIN_PA(30), GPIO_PERIPH_A, 0); ++ + return 0; + } + postcore_initcall(atngw100_init); +-- +1.5.2.3 diff --git a/target/device/Atmel/arch-avr32/kernel-patches-2.6.24/linux-2.6.24-600-avr32-mmc.patch b/target/device/Atmel/arch-avr32/kernel-patches-2.6.24/linux-2.6.24-600-avr32-mmc.patch new file mode 100644 index 000000000..a7654b5c6 --- /dev/null +++ b/target/device/Atmel/arch-avr32/kernel-patches-2.6.24/linux-2.6.24-600-avr32-mmc.patch @@ -0,0 +1,255 @@ +diff --git a/drivers/mmc/host/atmel-mci.c b/drivers/mmc/host/atmel-mci.c +index eeac479..7913cd8 100644 +--- a/drivers/mmc/host/atmel-mci.c ++++ b/drivers/mmc/host/atmel-mci.c +@@ -39,7 +39,6 @@ enum { + EVENT_STOP_COMPLETE, + EVENT_DMA_COMPLETE, + EVENT_DMA_ERROR, +- EVENT_CARD_DETECT, + }; + + struct atmel_mci_dma { +@@ -70,6 +69,9 @@ struct atmel_mci { + int detect_pin; + int wp_pin; + ++ /* For detect pin debouncing */ ++ struct timer_list detect_timer; ++ + unsigned long bus_hz; + unsigned long mapbase; + struct clk *mck; +@@ -108,8 +110,6 @@ MODULE_PARM_DESC(fmax, "Max frequency in Hz of the MMC bus clock"); + test_bit(EVENT_DMA_COMPLETE, &host->completed_events) + #define mci_dma_error_is_complete(host) \ + test_bit(EVENT_DMA_ERROR, &host->completed_events) +-#define mci_card_detect_is_complete(host) \ +- test_bit(EVENT_CARD_DETECT, &host->completed_events) + + /* Test and clear bit macros for pending events */ + #define mci_clear_cmd_is_pending(host) \ +@@ -124,8 +124,6 @@ MODULE_PARM_DESC(fmax, "Max frequency in Hz of the MMC bus clock"); + test_and_clear_bit(EVENT_STOP_COMPLETE, &host->pending_events) + #define mci_clear_dma_error_is_pending(host) \ + test_and_clear_bit(EVENT_DMA_ERROR, &host->pending_events) +-#define mci_clear_card_detect_is_pending(host) \ +- test_and_clear_bit(EVENT_CARD_DETECT, &host->pending_events) + + /* Test and set bit macros for completed events */ + #define mci_set_cmd_is_completed(host) \ +@@ -140,8 +138,6 @@ MODULE_PARM_DESC(fmax, "Max frequency in Hz of the MMC bus clock"); + test_and_set_bit(EVENT_STOP_COMPLETE, &host->completed_events) + #define mci_set_dma_error_is_completed(host) \ + test_and_set_bit(EVENT_DMA_ERROR, &host->completed_events) +-#define mci_set_card_detect_is_completed(host) \ +- test_and_set_bit(EVENT_CARD_DETECT, &host->completed_events) + + /* Set bit macros for completed events */ + #define mci_set_cmd_complete(host) \ +@@ -158,8 +154,6 @@ MODULE_PARM_DESC(fmax, "Max frequency in Hz of the MMC bus clock"); + set_bit(EVENT_DMA_COMPLETE, &host->completed_events) + #define mci_set_dma_error_complete(host) \ + set_bit(EVENT_DMA_ERROR, &host->completed_events) +-#define mci_set_card_detect_complete(host) \ +- set_bit(EVENT_CARD_DETECT, &host->completed_events) + + /* Set bit macros for pending events */ + #define mci_set_cmd_pending(host) \ +@@ -174,8 +168,6 @@ MODULE_PARM_DESC(fmax, "Max frequency in Hz of the MMC bus clock"); + set_bit(EVENT_STOP_COMPLETE, &host->pending_events) + #define mci_set_dma_error_pending(host) \ + set_bit(EVENT_DMA_ERROR, &host->pending_events) +-#define mci_set_card_detect_pending(host) \ +- set_bit(EVENT_CARD_DETECT, &host->pending_events) + + /* Clear bit macros for pending events */ + #define mci_clear_cmd_pending(host) \ +@@ -190,8 +182,6 @@ MODULE_PARM_DESC(fmax, "Max frequency in Hz of the MMC bus clock"); + clear_bit(EVENT_STOP_COMPLETE, &host->pending_events) + #define mci_clear_dma_error_pending(host) \ + clear_bit(EVENT_DMA_ERROR, &host->pending_events) +-#define mci_clear_card_detect_pending(host) \ +- clear_bit(EVENT_CARD_DETECT, &host->pending_events) + + + #ifdef CONFIG_DEBUG_FS +@@ -560,6 +550,21 @@ static void atmci_request(struct mmc_host *mmc, struct mmc_request *mrq) + mci_readl(host, IMR)); + + WARN_ON(host->mrq != NULL); ++ ++ /* ++ * We may "know" the card is gone even though there's still an ++ * electrical connection. If so, we really need to communicate ++ * this to the MMC core since there won't be any more ++ * interrupts as the card is completely removed. Otherwise, ++ * the MMC core might believe the card is still there even ++ * though the card was just removed very slowly. ++ */ ++ if (!host->present) { ++ mrq->cmd->error = -ENOMEDIUM; ++ mmc_request_done(mmc, mrq); ++ return; ++ } ++ + host->mrq = mrq; + host->pending_events = 0; + host->completed_events = 0; +@@ -729,6 +734,61 @@ static void atmci_command_complete(struct atmel_mci *host, + } + } + ++static void atmci_detect_change(unsigned long data) ++{ ++ struct atmel_mci *host = (struct atmel_mci *)data; ++ struct mmc_request *mrq = host->mrq; ++ int present; ++ ++ /* ++ * atmci_remove() sets detect_pin to -1 before freeing the ++ * interrupt. We must not re-enable the interrupt if it has ++ * been freed. ++ */ ++ smp_rmb(); ++ if (host->detect_pin < 0) ++ return; ++ ++ enable_irq(gpio_to_irq(host->detect_pin)); ++ present = !gpio_get_value(host->detect_pin); ++ ++ dev_vdbg(&host->pdev->dev, "detect change: %d (was %d)\n", ++ present, host->present); ++ ++ if (present != host->present) { ++ dev_dbg(&host->mmc->class_dev, "card %s\n", ++ present ? "inserted" : "removed"); ++ host->present = present; ++ ++ /* Reset controller if card is gone */ ++ if (!present) { ++ mci_writel(host, CR, MCI_BIT(SWRST)); ++ mci_writel(host, IDR, ~0UL); ++ mci_writel(host, CR, MCI_BIT(MCIEN)); ++ } ++ ++ /* Clean up queue if present */ ++ if (mrq) { ++ if (!mci_cmd_is_complete(host)) ++ mrq->cmd->error = -ENOMEDIUM; ++ if (mrq->data && !mci_data_is_complete(host) ++ && !mci_data_error_is_complete(host)) { ++ dma_stop_request(host->dma.req.req.dmac, ++ host->dma.req.req.channel); ++ host->data->error = -ENOMEDIUM; ++ atmci_data_complete(host, host->data); ++ } ++ if (mrq->stop && !mci_stop_is_complete(host)) ++ mrq->stop->error = -ENOMEDIUM; ++ ++ host->cmd = NULL; ++ atmci_request_end(host->mmc, mrq); ++ } ++ ++ mmc_detect_change(host->mmc, 0); ++ } ++} ++ + static void atmci_tasklet_func(unsigned long priv) + { + struct mmc_host *mmc = (struct mmc_host *)priv; +@@ -806,33 +866,6 @@ static void atmci_tasklet_func(unsigned long priv) + data->bytes_xfered = data->blocks * data->blksz; + atmci_data_complete(host, data); + } +- if (mci_clear_card_detect_is_pending(host)) { +- /* Reset controller if card is gone */ +- if (!host->present) { +- mci_writel(host, CR, MCI_BIT(SWRST)); +- mci_writel(host, IDR, ~0UL); +- mci_writel(host, CR, MCI_BIT(MCIEN)); +- } +- +- /* Clean up queue if present */ +- if (mrq) { +- if (!mci_cmd_is_complete(host)) +- mrq->cmd->error = -ETIMEDOUT; +- if (mrq->data && !mci_data_is_complete(host) +- && !mci_data_error_is_complete(host)) { +- dma_stop_request(host->dma.req.req.dmac, +- host->dma.req.req.channel); +- host->data->error = -ETIMEDOUT; +- atmci_data_complete(host, data); +- } +- if (mrq->stop && !mci_stop_is_complete(host)) +- mrq->stop->error = -ETIMEDOUT; +- +- host->cmd = NULL; +- atmci_request_end(mmc, mrq); +- } +- mmc_detect_change(host->mmc, msecs_to_jiffies(100)); +- } + } + + static void atmci_cmd_interrupt(struct mmc_host *mmc, u32 status) +@@ -957,20 +990,19 @@ static irqreturn_t atmci_interrupt(int irq, void *dev_id) + return IRQ_HANDLED; + } + +-static irqreturn_t atmci_detect_change(int irq, void *dev_id) ++static irqreturn_t atmci_detect_interrupt(int irq, void *dev_id) + { + struct mmc_host *mmc = dev_id; + struct atmel_mci *host = mmc_priv(mmc); + +- int present = !gpio_get_value(irq_to_gpio(irq)); ++ /* ++ * Disable interrupts until the pin has stabilized and check ++ * the state then. Use mod_timer() since we may be in the ++ * middle of the timer routine when this interrupt triggers. ++ */ ++ disable_irq_nosync(irq); ++ mod_timer(&host->detect_timer, jiffies + msecs_to_jiffies(20)); + +- if (present != host->present) { +- dev_dbg(&mmc->class_dev, "card %s\n", +- present ? "inserted" : "removed"); +- host->present = present; +- mci_set_card_detect_pending(host); +- tasklet_schedule(&host->tasklet); +- } + return IRQ_HANDLED; + } + +@@ -1079,8 +1111,11 @@ static int __devinit atmci_probe(struct platform_device *pdev) + mmc_add_host(mmc); + + if (host->detect_pin >= 0) { ++ setup_timer(&host->detect_timer, atmci_detect_change, ++ (unsigned long)host); ++ + ret = request_irq(gpio_to_irq(host->detect_pin), +- atmci_detect_change, ++ atmci_detect_interrupt, + IRQF_TRIGGER_FALLING | IRQF_TRIGGER_RISING, + DRIVER_NAME, mmc); + if (ret) { +@@ -1125,9 +1160,16 @@ static int __devexit atmci_remove(struct platform_device *pdev) + atmci_cleanup_debugfs(host); + + if (host->detect_pin >= 0) { +- free_irq(gpio_to_irq(host->detect_pin), host->mmc); ++ int pin = host->detect_pin; ++ ++ /* Make sure our timer doesn't enable the interrupt */ ++ host->detect_pin = -1; ++ smp_wmb(); ++ ++ free_irq(gpio_to_irq(pin), host->mmc); ++ del_timer_sync(&host->detect_timer); + cancel_delayed_work(&host->mmc->detect); +- gpio_free(host->detect_pin); ++ gpio_free(pin); + } + + mmc_remove_host(host->mmc); diff --git a/target/device/Atmel/arch-avr32/kernel-patches-2.6.24/linux-2.6.24-avr32-ac97-reset.patch.cond b/target/device/Atmel/arch-avr32/kernel-patches-2.6.24/linux-2.6.24-avr32-ac97-reset.patch.cond new file mode 100644 index 000000000..eed5f2814 --- /dev/null +++ b/target/device/Atmel/arch-avr32/kernel-patches-2.6.24/linux-2.6.24-avr32-ac97-reset.patch.cond @@ -0,0 +1,289 @@ +diff --git a/sound/avr32/ac97c.c b/sound/avr32/ac97c.c +index 0ec0b1c..3a58375 100644 +--- a/sound/avr32/ac97c.c ++++ b/sound/avr32/ac97c.c +@@ -25,6 +25,8 @@ + #include <sound/ac97_codec.h> + #include <sound/memalloc.h> + ++#include <asm/gpio.h> ++#include <asm/arch/board.h> + #include <asm/dma-controller.h> + + #include "ac97c.h" +@@ -37,6 +39,7 @@ struct atmel_ac97_dma_info { + struct dma_request_cyclic req_rx; + unsigned short rx_periph_id; + unsigned short tx_periph_id; ++ unsigned short controller; + }; + + struct atmel_ac97 { +@@ -51,6 +54,7 @@ struct atmel_ac97 { + struct snd_ac97_bus *ac97_bus; + int opened; + int period; ++ int reset_pin; + u64 cur_format; + unsigned int cur_rate; + struct clk *mck; +@@ -692,6 +696,12 @@ timed_out: + + static void snd_atmel_ac97_reset(struct atmel_ac97 *chip) + { ++ if (chip->reset_pin >= 0) { ++ gpio_set_value(chip->reset_pin, 0); ++ udelay(5); ++ gpio_set_value(chip->reset_pin, 1); ++ } ++ + ac97c_writel(chip, MR, AC97C_MR_WRST); + mdelay(1); + ac97c_writel(chip, MR, AC97C_MR_ENA); +@@ -727,6 +737,7 @@ static int __devinit snd_atmel_ac97_create(struct snd_card *card, + .read = snd_atmel_ac97_read, + }; + struct atmel_ac97 *chip = get_chip(card); ++ struct ac97c_platform_data *pdata; + struct resource *regs; + struct clk *mck; + int err; +@@ -735,6 +746,29 @@ static int __devinit snd_atmel_ac97_create(struct snd_card *card, + if (!regs) + return -ENXIO; + ++ pdata = pdev->dev.platform_data; ++ if (pdata) { ++ chip->reset_pin = pdata->reset_pin; ++ ++ if (chip->reset_pin >= 0) { ++ if (gpio_request(chip->reset_pin, ++ chip->card->shortname)) { ++ dev_dbg(&pdev->dev, ++ "ac97: reset pin " ++ "not available\n"); ++ chip->reset_pin = -1; ++ } else { ++ gpio_direction_output(chip->reset_pin, 1); ++ } ++ } ++ ++ chip->dma.rx_periph_id = pdata->dma_rx_periph_id; ++ chip->dma.tx_periph_id = pdata->dma_tx_periph_id; ++ chip->dma.controller = pdata->dma_controller_id; ++ } else { ++ return -ENXIO; ++ } ++ + mck = clk_get(&pdev->dev, "pclk"); + if (IS_ERR(mck)) + return PTR_ERR(mck); +@@ -789,23 +823,19 @@ static int __devinit snd_atmel_ac97_probe(struct platform_device *pdev) + if (err) + goto out_free_card; + +- /* TODO: Get this information from the platform device */ +- chip->dma.req_tx.req.dmac = find_dma_controller(0); ++ chip->dma.req_tx.req.dmac = find_dma_controller(chip->dma.controller); + if (!chip->dma.req_tx.req.dmac) { + dev_dbg(&chip->pdev->dev, "DMA controller for TX missing\n"); + err = -ENODEV; + goto out_free_card; + } +- chip->dma.req_rx.req.dmac = find_dma_controller(0); ++ chip->dma.req_rx.req.dmac = find_dma_controller(chip->dma.controller); + if (!chip->dma.req_rx.req.dmac) { + dev_dbg(&chip->pdev->dev, "DMA controller for RX missing\n"); + err = -ENODEV; + goto out_free_card; + } + +- chip->dma.rx_periph_id = 3; +- chip->dma.tx_periph_id = 4; +- + ch = dma_alloc_channel(chip->dma.req_tx.req.dmac); + if (ch < 0) { + dev_dbg(&chip->pdev->dev, +-- +1.5.2.5 +diff --git a/arch/avr32/mach-at32ap/at32ap700x.c b/arch/avr32/mach-at32ap/at32ap700x.c +index 06795d0..58f3841 100644 +--- a/arch/avr32/mach-at32ap/at32ap700x.c ++++ b/arch/avr32/mach-at32ap/at32ap700x.c +@@ -1552,12 +1552,15 @@ static struct clk atmel_ac97c0_pclk = { + .index = 10, + }; + +-struct platform_device *__init at32_add_device_ac97c(unsigned int id) ++struct platform_device *__init ++at32_add_device_ac97c(unsigned int id, struct ac97c_platform_data *data) + { + struct platform_device *pdev; + + if (id != 0) + return NULL; ++ if (!data) ++ return NULL; + + pdev = platform_device_alloc("atmel_ac97c", id); + if (!pdev) +@@ -1567,10 +1570,17 @@ struct platform_device *__init at32_add_device_ac97c(unsigned int id) + ARRAY_SIZE(atmel_ac97c0_resource))) + goto err_add_resources; + +- select_peripheral(PB(20), PERIPH_B, 0); /* SYNC */ +- select_peripheral(PB(21), PERIPH_B, 0); /* SDO */ +- select_peripheral(PB(22), PERIPH_B, 0); /* SDI */ +- select_peripheral(PB(23), PERIPH_B, 0); /* SCLK */ ++ if (platform_device_add_data(pdev, data, ++ sizeof(struct ac97c_platform_data))) ++ goto err_add_resources; ++ ++ select_peripheral(PB(20), PERIPH_B, 0); /* SDO */ ++ select_peripheral(PB(21), PERIPH_B, 0); /* SYNC */ ++ select_peripheral(PB(22), PERIPH_B, 0); /* SCLK */ ++ select_peripheral(PB(23), PERIPH_B, 0); /* SDI */ ++ ++ if (data->reset_pin != GPIO_PIN_NONE) ++ at32_select_gpio(data->reset_pin, 0); + + atmel_ac97c0_pclk.dev = &pdev->dev; + +diff --git a/include/asm-avr32/arch-at32ap/board.h b/include/asm-avr32/arch-at32ap/board.h +index 8816b66..0386a0e 100644 +--- a/include/asm-avr32/arch-at32ap/board.h ++++ b/include/asm-avr32/arch-at32ap/board.h +@@ -76,7 +76,16 @@ struct mci_platform_data { + }; + struct platform_device * + at32_add_device_mci(unsigned int id, struct mci_platform_data *data); +-struct platform_device *at32_add_device_ac97c(unsigned int id); ++ ++struct ac97c_platform_data { ++ unsigned short dma_rx_periph_id; ++ unsigned short dma_tx_periph_id; ++ unsigned short dma_controller_id; ++ int reset_pin; ++}; ++struct platform_device * ++at32_add_device_ac97c(unsigned int id, struct ac97c_platform_data *data); ++ + struct platform_device *at32_add_device_abdac(unsigned int id); + + struct cf_platform_data { +-- +1.5.2.5 +diff --git a/arch/avr32/boards/atstk1000/atstk1002.c b/arch/avr32/boards/atstk1000/atstk1002.c +index 90436fa..eba6f89 100644 +--- a/arch/avr32/boards/atstk1000/atstk1002.c ++++ b/arch/avr32/boards/atstk1000/atstk1002.c +@@ -151,6 +151,15 @@ static void __init set_hw_addr(struct platform_device *pdev) + clk_put(pclk); + } + ++#ifdef CONFIG_BOARD_ATSTK100X_ENABLE_AC97 ++static struct ac97c_platform_data __initdata ac97c0_data = { ++ .dma_rx_periph_id = 3, ++ .dma_tx_periph_id = 4, ++ .dma_controller_id = 0, ++ .reset_pin = GPIO_PIN_NONE, ++}; ++#endif ++ + #ifdef CONFIG_BOARD_ATSTK1000_EXTDAC + static void __init atstk1002_setup_extdac(void) + { +@@ -253,7 +262,7 @@ static int __init atstk1002_init(void) + #endif + at32_add_device_usba(0, NULL); + #ifdef CONFIG_BOARD_ATSTK100X_ENABLE_AC97 +- at32_add_device_ac97c(0); ++ at32_add_device_ac97c(0, &ac97c0_data); + #else + at32_add_device_abdac(0); + #endif +diff --git a/arch/avr32/boards/atstk1000/atstk1003.c b/arch/avr32/boards/atstk1000/atstk1003.c +index 768d204..2564e3c 100644 +--- a/arch/avr32/boards/atstk1000/atstk1003.c ++++ b/arch/avr32/boards/atstk1000/atstk1003.c +@@ -72,6 +72,15 @@ static struct cf_platform_data __initdata cf0_data = { + .cs = 4, + }; + ++#ifdef CONFIG_BOARD_ATSTK100X_ENABLE_AC97 ++static struct ac97c_platform_data __initdata ac97c0_data = { ++ .dma_rx_periph_id = 3, ++ .dma_tx_periph_id = 4, ++ .dma_controller_id = 0, ++ .reset_pin = GPIO_PIN_NONE, ++}; ++#endif ++ + #ifdef CONFIG_BOARD_ATSTK1000_EXTDAC + static void __init atstk1003_setup_extdac(void) + { +@@ -164,7 +173,7 @@ static int __init atstk1003_init(void) + #endif + at32_add_device_usba(0, NULL); + #ifdef CONFIG_BOARD_ATSTK100X_ENABLE_AC97 +- at32_add_device_ac97c(0); ++ at32_add_device_ac97c(0, &ac97c0_data); + #else + at32_add_device_abdac(0); + #endif +diff --git a/arch/avr32/boards/atstk1000/atstk1004.c b/arch/avr32/boards/atstk1000/atstk1004.c +index 96015dd..3c25a6f 100644 +--- a/arch/avr32/boards/atstk1000/atstk1004.c ++++ b/arch/avr32/boards/atstk1000/atstk1004.c +@@ -64,6 +64,15 @@ static struct spi_board_info spi1_board_info[] __initdata = { { + } }; + #endif + ++#ifdef CONFIG_BOARD_ATSTK100X_ENABLE_AC97 ++static struct ac97c_platform_data __initdata ac97c0_data = { ++ .dma_rx_periph_id = 3, ++ .dma_tx_periph_id = 4, ++ .dma_controller_id = 0, ++ .reset_pin = GPIO_PIN_NONE, ++}; ++#endif ++ + #ifdef CONFIG_BOARD_ATSTK1000_EXTDAC + static void __init atstk1004_setup_extdac(void) + { +@@ -136,7 +145,7 @@ static int __init atstk1004_init(void) + fbmem_start, fbmem_size); + at32_add_device_usba(0, NULL); + #ifdef CONFIG_BOARD_ATSTK100X_ENABLE_AC97 +- at32_add_device_ac97c(0); ++ at32_add_device_ac97c(0, &ac97c0_data); + #else + at32_add_device_abdac(0); + #endif +-- +1.5.2.5 +--- a/arch/avr32/boards/atngw100/setup.c 2008-02-26 12:27:37.000000000 -0500 ++++ b/arch/avr32/boards/atngw100/setup.c 2008-02-26 12:26:08.000000000 -0500 +@@ -201,6 +201,13 @@ static struct platform_device i2c_gpio_d + }; + #endif + ++static struct ac97c_platform_data __initdata ac97c0_data = { ++ .dma_rx_periph_id = 3, ++ .dma_tx_periph_id = 4, ++ .dma_controller_id = 0, ++ .reset_pin = GPIO_PIN_NONE, // change to whatever pin you want, i.e. GPIO_PIN_PB(18) ++}; ++ + static int __init atngw100_init(void) + { + unsigned i; +@@ -222,7 +229,7 @@ static int __init atngw100_init(void) + at32_add_device_spi(0, spi0_board_info, ARRAY_SIZE(spi0_board_info)); + at32_add_device_mci(0, &mci0_data); + at32_add_device_usba(0, NULL); +- at32_add_device_ac97c(0); ++ at32_add_device_ac97c(0, &ac97c0_data); + + for (i = 0; i < ARRAY_SIZE(ngw_leds); i++) { + at32_select_gpio(ngw_leds[i].gpio, diff --git a/target/device/Atmel/arch-avr32/kernel-patches-2.6.24/linux-2.6.24-avr32-psif-2.patch.cond b/target/device/Atmel/arch-avr32/kernel-patches-2.6.24/linux-2.6.24-avr32-psif-2.patch.cond new file mode 100644 index 000000000..4f9d652a5 --- /dev/null +++ b/target/device/Atmel/arch-avr32/kernel-patches-2.6.24/linux-2.6.24-avr32-psif-2.patch.cond @@ -0,0 +1,671 @@ +diff --git a/drivers/input/serio/Kconfig b/drivers/input/serio/Kconfig +index b88569e..2df47ed 100644 +--- a/drivers/input/serio/Kconfig ++++ b/drivers/input/serio/Kconfig +@@ -88,6 +88,17 @@ config SERIO_RPCKBD + To compile this driver as a module, choose M here: the + module will be called rpckbd. + ++config SERIO_AT32PSIF ++ tristate "AVR32 PSIF PS/2 keyboard and mouse controller" ++ depends on AVR32 ++ default n ++ help ++ Say Y here if you want to use the PSIF peripheral on AVR32 devices ++ and connect a PS/2 keyboard and/or mouse to it. ++ ++ To compile this driver as a module, choose M here: the module will ++ be called at32psif. ++ + config SERIO_AMBAKMI + tristate "AMBA KMI keyboard controller" + depends on ARM_AMBA +diff --git a/drivers/input/serio/Makefile b/drivers/input/serio/Makefile +index 4155197..38b8868 100644 +--- a/drivers/input/serio/Makefile ++++ b/drivers/input/serio/Makefile +@@ -12,6 +12,7 @@ obj-$(CONFIG_SERIO_CT82C710) += ct82c710.o + obj-$(CONFIG_SERIO_RPCKBD) += rpckbd.o + obj-$(CONFIG_SERIO_SA1111) += sa1111ps2.o + obj-$(CONFIG_SERIO_AMBAKMI) += ambakmi.o ++obj-$(CONFIG_SERIO_AT32PSIF) += at32psif.o + obj-$(CONFIG_SERIO_Q40KBD) += q40kbd.o + obj-$(CONFIG_SERIO_GSCPS2) += gscps2.o + obj-$(CONFIG_HP_SDC) += hp_sdc.o +diff --git a/drivers/input/serio/at32psif.c b/drivers/input/serio/at32psif.c +new file mode 100644 +index 0000000..228ab15 +--- /dev/null ++++ b/drivers/input/serio/at32psif.c +@@ -0,0 +1,342 @@ ++/* ++ * Copyright (C) 2007 Atmel Corporation ++ * ++ * Driver for the AT32AP700X PS/2 controller (PSIF). ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 as published ++ * by the Free Software Foundation. ++ */ ++ ++#include <linux/kernel.h> ++#include <linux/module.h> ++#include <linux/device.h> ++#include <linux/init.h> ++#include <linux/serio.h> ++#include <linux/interrupt.h> ++#include <linux/err.h> ++#include <linux/io.h> ++#include <linux/clk.h> ++#include <linux/platform_device.h> ++#include <linux/delay.h> ++ ++#include "at32psif.h" ++ ++#define PSIF_BUF_SIZE 16 ++ ++#define ring_is_empty(_psif) (_psif->head == _psif->tail) ++#define ring_next_head(_psif) ((_psif->head + 1) & (PSIF_BUF_SIZE - 1)) ++#define ring_next_tail(_psif) ((_psif->tail + 1) & (PSIF_BUF_SIZE - 1)) ++ ++struct psif { ++ struct platform_device *pdev; ++ struct clk *pclk; ++ struct serio *io; ++ void __iomem *regs; ++ unsigned int irq; ++ unsigned int open; ++ /* Prevent concurrent writes to circular buffer. */ ++ spinlock_t lock; ++ unsigned int head; ++ unsigned int tail; ++ unsigned char buffer[PSIF_BUF_SIZE]; ++}; ++ ++static irqreturn_t psif_interrupt(int irq, void *_ptr) ++{ ++ struct psif *psif = _ptr; ++ int retval = IRQ_NONE; ++ unsigned int io_flags = 0; ++ unsigned long lock_flags; ++ unsigned long status; ++ ++ status = psif_readl(psif, SR); ++ ++ if (status & PSIF_BIT(RXRDY)) { ++ unsigned char val = (unsigned char) psif_readl(psif, RHR); ++ ++ if (status & PSIF_BIT(PARITY)) ++ io_flags |= SERIO_PARITY; ++ if (status & PSIF_BIT(OVRUN)) ++ dev_err(&psif->pdev->dev, "overrun read error\n"); ++ ++ /* TODO: why do we have to wait? Are we too fast for serio? */ ++ udelay(100); ++ ++ serio_interrupt(psif->io, val, io_flags); ++ ++ retval = IRQ_HANDLED; ++ } ++ ++ spin_lock_irqsave(&psif->lock, lock_flags); ++ ++ if (status & PSIF_BIT(TXEMPTY)) { ++ if (status & PSIF_BIT(NACK)) ++ dev_err(&psif->pdev->dev, "NACK error\n"); ++ if (ring_is_empty(psif)) { ++ psif_writel(psif, IDR, PSIF_BIT(TXEMPTY)); ++ } else { ++ psif_writel(psif, THR, psif->buffer[psif->tail]); ++ psif->tail = ring_next_tail(psif); ++ } ++ ++ retval = IRQ_HANDLED; ++ } ++ ++ spin_unlock_irqrestore(&psif->lock, lock_flags); ++ ++ return retval; ++} ++ ++static int psif_write(struct serio *io, unsigned char val) ++{ ++ struct psif *psif = io->port_data; ++ unsigned long flags; ++ unsigned int head; ++ ++ spin_lock_irqsave(&psif->lock, flags); ++ ++ /* Write directly if TX is ready. */ ++ if (psif_readl(psif, SR) & PSIF_BIT(TXEMPTY)) { ++ psif_writel(psif, THR, val); ++ } else { ++ head = ring_next_head(psif); ++ ++ if (head != psif->tail) { ++ psif->buffer[psif->head] = val; ++ psif->head = head; ++ } else { ++ dev_err(&psif->pdev->dev, "underrun write error\n"); ++ } ++ ++ /* Make sure TXEMPTY interrupt is enabled. */ ++ psif_writel(psif, IER, PSIF_BIT(TXEMPTY)); ++ } ++ ++ spin_unlock_irqrestore(&psif->lock, flags); ++ ++ return 0; ++} ++ ++static int psif_open(struct serio *io) ++{ ++ struct psif *psif = io->port_data; ++ int retval; ++ ++ retval = clk_enable(psif->pclk); ++ if (retval) ++ goto out; ++ ++ psif_writel(psif, CR, PSIF_BIT(CR_TXEN) | PSIF_BIT(CR_RXEN)); ++ psif_writel(psif, IER, PSIF_BIT(RXRDY)); ++ ++ psif->open = 1; ++out: ++ return retval; ++} ++ ++static void psif_close(struct serio *io) ++{ ++ struct psif *psif = io->port_data; ++ ++ psif->open = 0; ++ ++ psif_writel(psif, IDR, ~0UL); ++ psif_writel(psif, CR, PSIF_BIT(CR_TXDIS) | PSIF_BIT(CR_RXDIS)); ++ ++ clk_disable(psif->pclk); ++} ++ ++static void psif_set_prescaler(struct psif *psif) ++{ ++ unsigned long prscv; ++ unsigned long rate = clk_get_rate(psif->pclk); ++ ++ /* PRSCV = Pulse length (100 uS) * PSIF module frequency. */ ++ prscv = 100 * (rate / 1000000); ++ ++ if (prscv > ((1<<PSIF_PSR_PRSCV_SIZE) - 1)) { ++ prscv = (1<<PSIF_PSR_PRSCV_SIZE) - 1; ++ dev_dbg(&psif->pdev->dev, "pclk too fast, " ++ "prescaler set to max\n"); ++ } ++ ++ clk_enable(psif->pclk); ++ psif_writel(psif, PSR, prscv); ++ clk_disable(psif->pclk); ++} ++ ++static int __init psif_probe(struct platform_device *pdev) ++{ ++ struct resource *regs; ++ struct psif *psif; ++ struct serio *io; ++ struct clk *pclk; ++ int irq; ++ int ret; ++ ++ psif = kzalloc(sizeof(struct psif), GFP_KERNEL); ++ if (!psif) { ++ dev_dbg(&pdev->dev, "out of memory\n"); ++ ret = -ENOMEM; ++ goto out; ++ } ++ psif->pdev = pdev; ++ ++ io = kzalloc(sizeof(struct serio), GFP_KERNEL); ++ if (!io) { ++ dev_dbg(&pdev->dev, "out of memory\n"); ++ ret = -ENOMEM; ++ goto out_free_psif; ++ } ++ psif->io = io; ++ ++ regs = platform_get_resource(pdev, IORESOURCE_MEM, 0); ++ if (!regs) { ++ dev_dbg(&pdev->dev, "no mmio resources defined\n"); ++ ret = -ENOMEM; ++ goto out_free_io; ++ } ++ ++ psif->regs = ioremap(regs->start, regs->end - regs->start + 1); ++ if (!psif->regs) { ++ ret = -ENOMEM; ++ dev_dbg(&pdev->dev, "could not map I/O memory\n"); ++ goto out_free_io; ++ } ++ ++ pclk = clk_get(&pdev->dev, "pclk"); ++ if (IS_ERR(pclk)) { ++ dev_dbg(&pdev->dev, "could not get peripheral clock\n"); ++ ret = PTR_ERR(pclk); ++ goto out_iounmap; ++ } ++ psif->pclk = pclk; ++ ++ /* Reset the PSIF to enter at a known state. */ ++ ret = clk_enable(pclk); ++ if (ret) { ++ dev_dbg(&pdev->dev, "could not enable pclk\n"); ++ goto out_put_clk; ++ } ++ psif_writel(psif, CR, PSIF_BIT(CR_SWRST)); ++ clk_disable(pclk); ++ ++ irq = platform_get_irq(pdev, 0); ++ if (irq < 0) { ++ dev_dbg(&pdev->dev, "could not get irq\n"); ++ ret = -ENXIO; ++ goto out_put_clk; ++ } ++ ret = request_irq(irq, psif_interrupt, IRQF_SHARED, "at32psif", psif); ++ if (ret) { ++ dev_dbg(&pdev->dev, "could not request irq %d\n", irq); ++ goto out_put_clk; ++ } ++ psif->irq = irq; ++ ++ io->id.type = SERIO_8042; ++ io->write = psif_write; ++ io->open = psif_open; ++ io->close = psif_close; ++ strlcpy(io->name, pdev->dev.bus_id, sizeof(io->name)); ++ strlcpy(io->phys, pdev->dev.bus_id, sizeof(io->phys)); ++ io->port_data = psif; ++ io->dev.parent = &pdev->dev; ++ ++ psif_set_prescaler(psif); ++ ++ spin_lock_init(&psif->lock); ++ serio_register_port(psif->io); ++ platform_set_drvdata(pdev, psif); ++ ++ dev_info(&pdev->dev, "Atmel AVR32 PSIF PS/2 driver on 0x%08x irq %d\n", ++ (int)psif->regs, psif->irq); ++ ++ return 0; ++ ++out_put_clk: ++ clk_put(psif->pclk); ++out_iounmap: ++ iounmap(psif->regs); ++out_free_io: ++ kfree(io); ++out_free_psif: ++ kfree(psif); ++out: ++ return ret; ++} ++ ++static int __exit psif_remove(struct platform_device *pdev) ++{ ++ struct psif *psif = platform_get_drvdata(pdev); ++ ++ psif_writel(psif, IDR, ~0UL); ++ psif_writel(psif, CR, PSIF_BIT(CR_TXDIS) | PSIF_BIT(CR_RXDIS)); ++ ++ serio_unregister_port(psif->io); ++ iounmap(psif->regs); ++ free_irq(psif->irq, psif); ++ clk_put(psif->pclk); ++ kfree(psif); ++ ++ platform_set_drvdata(pdev, NULL); ++ ++ return 0; ++} ++ ++#ifdef CONFIG_PM ++static int psif_suspend(struct platform_device *pdev, pm_message_t state) ++{ ++ struct psif *psif = platform_get_drvdata(pdev); ++ ++ if (psif->open) { ++ psif_writel(psif, CR, PSIF_BIT(CR_RXDIS) | PSIF_BIT(CR_TXDIS)); ++ clk_disable(psif->pclk); ++ } ++ ++ return 0; ++} ++ ++static int psif_resume(struct platform_device *pdev) ++{ ++ struct psif *psif = platform_get_drvdata(pdev); ++ ++ if (psif->open) { ++ clk_enable(psif->pclk); ++ psif_set_prescaler(psif); ++ psif_writel(psif, CR, PSIF_BIT(CR_RXEN) | PSIF_BIT(CR_TXEN)); ++ } ++ ++ return 0; ++} ++#else ++#define psif_suspend NULL ++#define psif_resume NULL ++#endif ++ ++static struct platform_driver psif_driver = { ++ .remove = __exit_p(psif_remove), ++ .driver = { ++ .name = "atmel_psif", ++ }, ++ .suspend = psif_suspend, ++ .resume = psif_resume, ++}; ++ ++static int __init psif_init(void) ++{ ++ return platform_driver_probe(&psif_driver, psif_probe); ++} ++ ++static void __exit psif_exit(void) ++{ ++ platform_driver_unregister(&psif_driver); ++} ++ ++module_init(psif_init); ++module_exit(psif_exit); ++ ++MODULE_AUTHOR("Hans-Christian Egtvedt <hcegtvedt@atmel.com>"); ++MODULE_DESCRIPTION("Atmel AVR32 PSIF PS/2 driver"); ++MODULE_LICENSE("GPL"); +diff --git a/drivers/input/serio/at32psif.h b/drivers/input/serio/at32psif.h +new file mode 100644 +index 0000000..b0cc5e4 +--- /dev/null ++++ b/drivers/input/serio/at32psif.h +@@ -0,0 +1,82 @@ ++/* ++ * Copyright (C) 2007 Atmel Corporation ++ * ++ * Driver for the AT32AP700X PS/2 controller (PSIF). ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 as published ++ * by the Free Software Foundation. ++ */ ++ ++#ifndef _AT32PSIF_H ++#define _AT32PSIF_H ++ ++/* PSIF register offsets */ ++#define PSIF_CR 0x00 ++#define PSIF_RHR 0x04 ++#define PSIF_THR 0x08 ++#define PSIF_SR 0x10 ++#define PSIF_IER 0x14 ++#define PSIF_IDR 0x18 ++#define PSIF_IMR 0x1c ++#define PSIF_PSR 0x20 ++ ++/* Bitfields in control register. */ ++#define PSIF_CR_RXDIS_OFFSET 1 ++#define PSIF_CR_RXDIS_SIZE 1 ++#define PSIF_CR_RXEN_OFFSET 0 ++#define PSIF_CR_RXEN_SIZE 1 ++#define PSIF_CR_SWRST_OFFSET 15 ++#define PSIF_CR_SWRST_SIZE 1 ++#define PSIF_CR_TXDIS_OFFSET 9 ++#define PSIF_CR_TXDIS_SIZE 1 ++#define PSIF_CR_TXEN_OFFSET 8 ++#define PSIF_CR_TXEN_SIZE 1 ++ ++/* Bitfields in interrupt disable, enable, mask and status register. */ ++#define PSIF_NACK_OFFSET 8 ++#define PSIF_NACK_SIZE 1 ++#define PSIF_OVRUN_OFFSET 5 ++#define PSIF_OVRUN_SIZE 1 ++#define PSIF_PARITY_OFFSET 9 ++#define PSIF_PARITY_SIZE 1 ++#define PSIF_RXRDY_OFFSET 4 ++#define PSIF_RXRDY_SIZE 1 ++#define PSIF_TXEMPTY_OFFSET 1 ++#define PSIF_TXEMPTY_SIZE 1 ++#define PSIF_TXRDY_OFFSET 0 ++#define PSIF_TXRDY_SIZE 1 ++ ++/* Bitfields in prescale register. */ ++#define PSIF_PSR_PRSCV_OFFSET 0 ++#define PSIF_PSR_PRSCV_SIZE 13 ++ ++/* Bitfields in receive hold register. */ ++#define PSIF_RHR_RXDATA_OFFSET 0 ++#define PSIF_RHR_RXDATA_SIZE 8 ++ ++/* Bitfields in transmit hold register. */ ++#define PSIF_THR_TXDATA_OFFSET 0 ++#define PSIF_THR_TXDATA_SIZE 8 ++ ++/* Bit manipulation macros */ ++#define PSIF_BIT(name) \ ++ (1 << PSIF_##name##_OFFSET) ++#define PSIF_BF(name, value) \ ++ (((value) & ((1 << PSIF_##name##_SIZE) - 1)) \ ++ << PSIF_##name##_OFFSET) ++#define PSIF_BFEXT(name, value)\ ++ (((value) >> PSIF_##name##_OFFSET) \ ++ & ((1 << PSIF_##name##_SIZE) - 1)) ++#define PSIF_BFINS(name, value, old) \ ++ (((old) & ~(((1 << PSIF_##name##_SIZE) - 1) \ ++ << PSIF_##name##_OFFSET)) \ ++ | PSIF_BF(name, value)) ++ ++/* Register access macros */ ++#define psif_readl(port, reg) \ ++ __raw_readl((port)->regs + PSIF_##reg) ++#define psif_writel(port, reg, value) \ ++ __raw_writel((value), (port)->regs + PSIF_##reg) ++ ++#endif /* _AT32PSIF_H */ +diff --git a/arch/avr32/boards/atstk1000/Kconfig b/arch/avr32/boards/atstk1000/Kconfig +index 56a8d8e..e125205 100644 +--- a/arch/avr32/boards/atstk1000/Kconfig ++++ b/arch/avr32/boards/atstk1000/Kconfig +@@ -145,4 +145,17 @@ config BOARD_ATSTK1000_CF_DETECT_PIN + + The default is 0x3e, which is pin 30 on PIOB, aka GPIO15. + ++config BOARD_ATSTK100X_ENABLE_PSIF ++ bool "Enable PSIF peripheral (PS/2 support)" ++ default n ++ help ++ Select this if you want to use the PSIF peripheral to hook up PS/2 ++ devices to your STK1000. This will require a hardware modification to ++ work correctly, since PS/2 devices require 5 volt power and signals, ++ while the STK1000 only provides 3.3 volt. ++ ++ Say N if you have not modified the hardware to boost the voltage, say ++ Y if you have level convertion hardware or a PS/2 device capable of ++ operating on 3.3 volt. ++ + endif # stk 1000 +diff --git a/arch/avr32/boards/atstk1000/atstk1002.c b/arch/avr32/boards/atstk1000/atstk1002.c +index f19f54d..2ba37d5 100644 +--- a/arch/avr32/boards/atstk1000/atstk1002.c ++++ b/arch/avr32/boards/atstk1000/atstk1002.c +@@ -261,6 +261,10 @@ static int __init atstk1002_init(void) + at32_add_device_ssc(0, ATMEL_SSC_TX); + #endif + at32_add_device_cf(0, 2, &cf0_data); ++#ifdef CONFIG_BOARD_ATSTK100X_ENABLE_PSIF ++ at32_add_device_psif(0); ++ at32_add_device_psif(1); ++#endif + + atstk1000_setup_j2_leds(); + atstk1002_setup_extdac(); +diff --git a/arch/avr32/boards/atstk1000/atstk1003.c b/arch/avr32/boards/atstk1000/atstk1003.c +index 768d204..2cc0bbc 100644 +--- a/arch/avr32/boards/atstk1000/atstk1003.c ++++ b/arch/avr32/boards/atstk1000/atstk1003.c +@@ -172,6 +172,10 @@ static int __init atstk1003_init(void) + at32_add_device_ssc(0, ATMEL_SSC_TX); + #endif + at32_add_device_cf(0, 2, &cf0_data); ++#ifdef CONFIG_BOARD_ATSTK100X_ENABLE_PSIF ++ at32_add_device_psif(0); ++ at32_add_device_psif(1); ++#endif + + atstk1000_setup_j2_leds(); + atstk1003_setup_extdac(); +diff --git a/arch/avr32/boards/atstk1000/atstk1004.c b/arch/avr32/boards/atstk1000/atstk1004.c +index 96015dd..9e8c293 100644 +--- a/arch/avr32/boards/atstk1000/atstk1004.c ++++ b/arch/avr32/boards/atstk1000/atstk1004.c +@@ -143,6 +143,10 @@ static int __init atstk1004_init(void) + #ifndef CONFIG_BOARD_ATSTK100X_SW3_CUSTOM + at32_add_device_ssc(0, ATMEL_SSC_TX); + #endif ++#ifdef CONFIG_BOARD_ATSTK100X_ENABLE_PSIF ++ at32_add_device_psif(0); ++ at32_add_device_psif(1); ++#endif + + atstk1000_setup_j2_leds(); + atstk1004_setup_extdac(); +diff --git a/arch/avr32/mach-at32ap/at32ap700x.c b/arch/avr32/mach-at32ap/at32ap700x.c +index 3300944..cfec920 100644 +--- a/arch/avr32/mach-at32ap/at32ap700x.c ++++ b/arch/avr32/mach-at32ap/at32ap700x.c +@@ -679,6 +679,81 @@ void __init at32_add_system_devices(void) + } + + /* -------------------------------------------------------------------- ++ * PSIF ++ * -------------------------------------------------------------------- */ ++static struct resource atmel_psif0_resource[] __initdata = { ++ { ++ .start = 0xffe03c00, ++ .end = 0xffe03cff, ++ .flags = IORESOURCE_MEM, ++ }, ++ IRQ(18), ++}; ++static struct clk atmel_psif0_pclk = { ++ .name = "pclk", ++ .parent = &pba_clk, ++ .mode = pba_clk_mode, ++ .get_rate = pba_clk_get_rate, ++ .index = 15, ++}; ++ ++static struct resource atmel_psif1_resource[] __initdata = { ++ { ++ .start = 0xffe03d00, ++ .end = 0xffe03dff, ++ .flags = IORESOURCE_MEM, ++ }, ++ IRQ(18), ++}; ++static struct clk atmel_psif1_pclk = { ++ .name = "pclk", ++ .parent = &pba_clk, ++ .mode = pba_clk_mode, ++ .get_rate = pba_clk_get_rate, ++ .index = 15, ++}; ++ ++struct platform_device *__init at32_add_device_psif(unsigned int id) ++{ ++ struct platform_device *pdev; ++ ++ if (!(id == 0 || id == 1)) ++ return NULL; ++ ++ pdev = platform_device_alloc("atmel_psif", id); ++ if (!pdev) ++ return NULL; ++ ++ switch (id) { ++ case 0: ++ if (platform_device_add_resources(pdev, atmel_psif0_resource, ++ ARRAY_SIZE(atmel_psif0_resource))) ++ goto err_add_resources; ++ atmel_psif0_pclk.dev = &pdev->dev; ++ select_peripheral(PA(8), PERIPH_A, 0); /* CLOCK */ ++ select_peripheral(PA(9), PERIPH_A, 0); /* DATA */ ++ break; ++ case 1: ++ if (platform_device_add_resources(pdev, atmel_psif1_resource, ++ ARRAY_SIZE(atmel_psif1_resource))) ++ goto err_add_resources; ++ atmel_psif1_pclk.dev = &pdev->dev; ++ select_peripheral(PB(11), PERIPH_A, 0); /* CLOCK */ ++ select_peripheral(PB(12), PERIPH_A, 0); /* DATA */ ++ break; ++ default: ++ return NULL; ++ } ++ ++ platform_device_add(pdev); ++ return pdev; ++ ++err_add_resources: ++ platform_device_put(pdev); ++ return NULL; ++} ++ ++/* -------------------------------------------------------------------- + * USART + * -------------------------------------------------------------------- */ + +@@ -1712,6 +1787,8 @@ struct clk *at32_clock_list[] = { + &pio3_mck, + &pio4_mck, + &at32_systc0_pclk, ++ &atmel_psif0_pclk, ++ &atmel_psif1_pclk, + &atmel_usart0_usart, + &atmel_usart1_usart, + &atmel_usart2_usart, +diff --git a/include/asm-avr32/arch-at32ap/board.h b/include/asm-avr32/arch-at32ap/board.h +index 1a6e02c..19cfec7 100644 +--- a/include/asm-avr32/arch-at32ap/board.h ++++ b/include/asm-avr32/arch-at32ap/board.h +@@ -93,4 +93,7 @@ struct platform_device * + at32_add_device_cf(unsigned int id, unsigned int extint, + struct cf_platform_data *data); + ++struct platform_device * ++at32_add_device_psif(unsigned int id); ++ + #endif /* __ASM_ARCH_BOARD_H */ +diff --git a/drivers/char/keyboard.c b/drivers/char/keyboard.c +index d95f316..20a7193 100644 +--- a/drivers/char/keyboard.c ++++ b/drivers/char/keyboard.c +@@ -1000,7 +1000,8 @@ DECLARE_TASKLET_DISABLED(keyboard_tasklet, kbd_bh, 0); + #if defined(CONFIG_X86) || defined(CONFIG_IA64) || defined(CONFIG_ALPHA) ||\ + defined(CONFIG_MIPS) || defined(CONFIG_PPC) || defined(CONFIG_SPARC) ||\ + defined(CONFIG_PARISC) || defined(CONFIG_SUPERH) ||\ +- (defined(CONFIG_ARM) && defined(CONFIG_KEYBOARD_ATKBD) && !defined(CONFIG_ARCH_RPC)) ++ (defined(CONFIG_ARM) && defined(CONFIG_KEYBOARD_ATKBD) && !defined(CONFIG_ARCH_RPC)) ||\ ++ defined(CONFIG_AVR32) + + #define HW_RAW(dev) (test_bit(EV_MSC, dev->evbit) && test_bit(MSC_RAW, dev->mscbit) &&\ + ((dev)->id.bustype == BUS_I8042) && ((dev)->id.vendor == 0x0001) && ((dev)->id.product == 0x0001)) +diff --git a/arch/avr32/boards/atngw100/setup.c b/arch/avr32/boards/atngw100/setup.c +--- a/arch/avr32/boards/atngw100/setup.c 2008-01-31 13:38:32.000000000 -0500 ++++ b/arch/avr32/boards/atngw100/setup.c 2008-01-31 13:44:09.000000000 -0500 +@@ -224,6 +224,9 @@ static int __init atngw100_init(void) + at32_add_device_usba(0, NULL); + at32_add_device_ac97c(0); + ++ at32_add_device_psif(0); ++ at32_add_device_psif(1); ++ + for (i = 0; i < ARRAY_SIZE(ngw_leds); i++) { + at32_select_gpio(ngw_leds[i].gpio, + AT32_GPIOF_OUTPUT | AT32_GPIOF_HIGH); |