diff options
Diffstat (limited to 'target')
16 files changed, 0 insertions, 58777 deletions
diff --git a/target/device/Atmel/arch-avr32/kernel-patches-2.6.20.4/.empty b/target/device/Atmel/arch-avr32/kernel-patches-2.6.20.4/.empty deleted file mode 100644 index e69de29bb..000000000 --- a/target/device/Atmel/arch-avr32/kernel-patches-2.6.20.4/.empty +++ /dev/null diff --git a/target/device/Atmel/arch-avr32/kernel-patches-2.6.21.5/.empty b/target/device/Atmel/arch-avr32/kernel-patches-2.6.21.5/.empty deleted file mode 100644 index e69de29bb..000000000 --- a/target/device/Atmel/arch-avr32/kernel-patches-2.6.21.5/.empty +++ /dev/null diff --git a/target/device/Atmel/arch-avr32/kernel-patches-2.6.22.1/.empty b/target/device/Atmel/arch-avr32/kernel-patches-2.6.22.1/.empty deleted file mode 100644 index e69de29bb..000000000 --- a/target/device/Atmel/arch-avr32/kernel-patches-2.6.22.1/.empty +++ /dev/null diff --git a/target/device/Atmel/arch-avr32/kernel-patches-2.6.22.10/linux-2.6.22.10-100-avr32-atmel.4.patch b/target/device/Atmel/arch-avr32/kernel-patches-2.6.22.10/linux-2.6.22.10-100-avr32-atmel.4.patch deleted file mode 100644 index 1881a419c..000000000 --- a/target/device/Atmel/arch-avr32/kernel-patches-2.6.22.10/linux-2.6.22.10-100-avr32-atmel.4.patch +++ /dev/null @@ -1,16955 +0,0 @@ -diff --git a/MAINTAINERS b/MAINTAINERS -index df40a4e..3c5cfef 100644 ---- a/MAINTAINERS -+++ b/MAINTAINERS -@@ -674,6 +674,13 @@ P: Haavard Skinnemoen - M: hskinnemoen@atmel.com - S: Supported - -+ATMEL USBA UDC DRIVER -+P: Haavard Skinnemoen -+M: hskinnemoen@atmel.com -+L: kernel@avr32linux.org -+W: http://avr32linux.org/twiki/bin/view/Main/AtmelUsbDeviceDriver -+S: Supported -+ - ATMEL WIRELESS DRIVER - P: Simon Kelley - M: simon@thekelleys.org.uk -diff --git a/arch/avr32/Kconfig b/arch/avr32/Kconfig -index 3ec7658..ec6c7c5 100644 ---- a/arch/avr32/Kconfig -+++ b/arch/avr32/Kconfig -@@ -113,6 +113,13 @@ config BOARD_ATNGW100 - bool "ATNGW100 Network Gateway" - endchoice - -+if BOARD_ATSTK1000 -+source "arch/avr32/boards/atstk1000/Kconfig" -+endif -+if BOARD_ATNGW100 -+source "arch/avr32/boards/atngw100/Kconfig" -+endif -+ - choice - prompt "Boot loader type" - default LOADER_U_BOOT -@@ -171,6 +178,10 @@ config OWNERSHIP_TRACE - enabling Nexus-compliant debuggers to keep track of the PID of the - currently executing task. - -+config DW_DMAC -+ tristate "Synopsys DesignWare DMA Controller support" -+ default y if CPU_AT32AP7000 -+ - # FPU emulation goes here - - source "kernel/Kconfig.hz" -@@ -185,6 +196,27 @@ config CMDLINE - - endmenu - -+menu "Power managment options" -+ -+menu "CPU Frequency scaling" -+ -+source "drivers/cpufreq/Kconfig" -+ -+config CPU_FREQ_AT32AP -+ bool "CPU frequency driver for AT32AP" -+ depends on CPU_FREQ && PLATFORM_AT32AP -+ default n -+ help -+ This enables the CPU frequency driver for AT32AP processors. -+ -+ For details, take a look in <file:Documentation/cpu-freq>. -+ -+ If in doubt, say N. -+ -+endmenu -+ -+endmenu -+ - menu "Bus options" - - config PCI -diff --git a/arch/avr32/Makefile b/arch/avr32/Makefile -index dc6bc01..eb72198 100644 ---- a/arch/avr32/Makefile -+++ b/arch/avr32/Makefile -@@ -31,6 +31,7 @@ core-$(CONFIG_BOARD_ATNGW100) += arch/avr32/boards/atngw100/ - core-$(CONFIG_LOADER_U_BOOT) += arch/avr32/boot/u-boot/ - core-y += arch/avr32/kernel/ - core-y += arch/avr32/mm/ -+drivers-y += arch/avr32/drivers/ - libs-y += arch/avr32/lib/ - - archincdir-$(CONFIG_PLATFORM_AT32AP) := arch-at32ap -diff --git a/arch/avr32/boards/atngw100/Kconfig b/arch/avr32/boards/atngw100/Kconfig -new file mode 100644 -index 0000000..5d922df ---- /dev/null -+++ b/arch/avr32/boards/atngw100/Kconfig -@@ -0,0 +1,12 @@ -+# NGW100 customization -+ -+config BOARD_ATNGW100_I2C_GPIO -+ bool "Use GPIO for i2c instead of built-in TWI module" -+ help -+ The driver for the built-in TWI module has been plagued by -+ various problems, while the i2c-gpio driver is based on the -+ trusty old i2c-algo-bit bitbanging engine, making it work -+ on pretty much any setup. -+ -+ Choose 'Y' here if you're having i2c-related problems and -+ want to rule out the i2c bus driver. -diff --git a/arch/avr32/boards/atngw100/setup.c b/arch/avr32/boards/atngw100/setup.c -index 6c4dc0a..d649974 100644 ---- a/arch/avr32/boards/atngw100/setup.c -+++ b/arch/avr32/boards/atngw100/setup.c -@@ -9,10 +9,12 @@ - */ - #include <linux/clk.h> - #include <linux/etherdevice.h> -+#include <linux/i2c-gpio.h> - #include <linux/init.h> - #include <linux/linkage.h> - #include <linux/platform_device.h> - #include <linux/types.h> -+#include <linux/leds.h> - #include <linux/spi/spi.h> - - #include <asm/io.h> -@@ -21,6 +23,7 @@ - #include <asm/arch/at32ap7000.h> - #include <asm/arch/board.h> - #include <asm/arch/init.h> -+#include <asm/arch/portmux.h> - - /* Initialized by bootloader-specific startup code. */ - struct tag *bootloader_tags __initdata; -@@ -39,6 +42,11 @@ static struct spi_board_info spi0_board_info[] __initdata = { - }, - }; - -+static struct mci_platform_data __initdata mci0_data = { -+ .detect_pin = GPIO_PIN_PC(25), -+ .wp_pin = GPIO_PIN_PE(0), -+}; -+ - /* - * The next two functions should go away as the boot loader is - * supposed to initialize the macb address registers with a valid -@@ -100,8 +108,46 @@ void __init setup_board(void) - at32_setup_serial_console(0); - } - -+static const struct gpio_led ngw_leds[] = { -+ { .name = "sys", .gpio = GPIO_PIN_PA(16), .active_low = 1, -+ .default_trigger = "heartbeat", -+ }, -+ { .name = "a", .gpio = GPIO_PIN_PA(19), .active_low = 1, }, -+ { .name = "b", .gpio = GPIO_PIN_PE(19), .active_low = 1, }, -+}; -+ -+static const struct gpio_led_platform_data ngw_led_data = { -+ .num_leds = ARRAY_SIZE(ngw_leds), -+ .leds = (void *) ngw_leds, -+}; -+ -+static struct platform_device ngw_gpio_leds = { -+ .name = "leds-gpio", -+ .id = -1, -+ .dev = { -+ .platform_data = (void *) &ngw_led_data, -+ } -+}; -+ -+#ifdef CONFIG_BOARD_ATNGW100_I2C_GPIO -+static struct i2c_gpio_platform_data i2c_gpio_data = { -+ .sda_pin = GPIO_PIN_PA(6), -+ .scl_pin = GPIO_PIN_PA(7), -+}; -+ -+static struct platform_device i2c_gpio_device = { -+ .name = "i2c-gpio", -+ .id = 0, -+ .dev = { -+ .platform_data = &i2c_gpio_data, -+ }, -+}; -+#endif -+ - static int __init atngw100_init(void) - { -+ unsigned i; -+ - /* - * ATNGW100 uses 16-bit SDRAM interface, so we don't need to - * reserve any pins for it. -@@ -115,6 +161,22 @@ static int __init atngw100_init(void) - set_hw_addr(at32_add_device_eth(1, ð_data[1])); - - at32_add_device_spi(0, spi0_board_info, ARRAY_SIZE(spi0_board_info)); -+ at32_add_device_mci(0, &mci0_data); -+ at32_add_device_usba(0, NULL); -+ -+ for (i = 0; i < ARRAY_SIZE(ngw_leds); i++) { -+ at32_select_gpio(ngw_leds[i].gpio, -+ AT32_GPIOF_OUTPUT | AT32_GPIOF_HIGH); -+ } -+ platform_device_register(&ngw_gpio_leds); -+ -+#ifdef CONFIG_BOARD_ATNGW100_I2C_GPIO -+ at32_select_gpio(i2c_gpio_data.sda_pin, 0); -+ at32_select_gpio(i2c_gpio_data.scl_pin, 0); -+ platform_device_register(&i2c_gpio_device); -+#else -+ at32_add_device_twi(0); -+#endif - - return 0; - } -diff --git a/arch/avr32/boards/atstk1000/Kconfig b/arch/avr32/boards/atstk1000/Kconfig -new file mode 100644 -index 0000000..b1f5a62 ---- /dev/null -+++ b/arch/avr32/boards/atstk1000/Kconfig -@@ -0,0 +1,91 @@ -+# STK1000 customization -+ -+if BOARD_ATSTK1002 -+ -+config BOARD_ATSTK1002_CUSTOM -+ bool "Non-default STK-1002 jumper settings" -+ help -+ You will normally leave the jumpers on the CPU card at their -+ default settings. If you need to use certain peripherals, -+ you will need to change some of those jumpers. -+ -+if BOARD_ATSTK1002_CUSTOM -+ -+config BOARD_ATSTK1002_SW1_CUSTOM -+ bool "SW1: use SSC1 (not SPI0)" -+ help -+ This also prevents using the external DAC as an audio interface, -+ and means you can't initialize the on-board QVGA display. -+ -+config BOARD_ATSTK1002_SW2_CUSTOM -+ bool "SW2: use IRDA or TIMER0 (not UART-A, MMC/SD, and PS2-A)" -+ help -+ If you change this you'll want an updated boot loader putting -+ the console on UART-C not UART-A. -+ -+config BOARD_ATSTK1002_SW3_CUSTOM -+ bool "SW3: use TIMER1 (not SSC0 and GCLK)" -+ help -+ This also prevents using the external DAC as an audio interface. -+ -+config BOARD_ATSTK1002_SW4_CUSTOM -+ bool "SW4: use ISI/Camera (not GPIOs, SPI1, and PS2-B)" -+ help -+ To use the camera interface you'll need a custom card (on the -+ PCI-format connector) connect a video sensor. -+ -+config BOARD_ATSTK1002_SW5_CUSTOM -+ bool "SW5: use MACB1 (not LCDC)" -+ -+config BOARD_ATSTK1002_SW6_CUSTOM -+ bool "SW6: more GPIOs (not MACB0)" -+ -+endif # custom -+ -+config BOARD_ATSTK1002_SPI1 -+ bool "Configure SPI1 controller" -+ depends on !BOARD_ATSTK1002_SW4_CUSTOM -+ help -+ All the signals for the second SPI controller are available on -+ GPIO lines and accessed through the J1 jumper block. Say "y" -+ here to configure that SPI controller. -+ -+config BOARD_ATSTK1002_J2_LED -+ bool -+ default BOARD_ATSTK1002_J2_LED8 || BOARD_ATSTK1002_J2_RGB -+ -+choice -+ prompt "LEDs connected to J2:" -+ depends on LEDS_GPIO && !BOARD_ATSTK1002_SW4_CUSTOM -+ optional -+ help -+ Select this if you have jumpered the J2 jumper block to the -+ LED0..LED7 amber leds, or to the RGB leds, using a ten-pin -+ IDC cable. A default "heartbeat" trigger is provided, but -+ you can of course override this. -+ -+config BOARD_ATSTK1002_J2_LED8 -+ bool "LED0..LED7" -+ help -+ Select this if J2 is jumpered to LED0..LED7 amber leds. -+ -+config BOARD_ATSTK1002_J2_RGB -+ bool "RGB leds" -+ help -+ Select this if J2 is jumpered to the RGB leds. -+ -+endchoice -+ -+config BOARD_ATSTK1002_ENABLE_AC97 -+ bool "Use AC97C instead of ABDAC" -+ help -+ Select this if you want to use the built-in AC97 controller -+ instead of the built-in Audio Bitstream DAC. These share -+ the same I/O pins on the AP7000, so both can't be enabled -+ at the same time. -+ -+ Note that the STK1000/STK1002 kit doesn't ship with an AC97 -+ codec on board, so say N unless you've got an expansion -+ board with an AC97 codec on it that you want to use. -+ -+endif # stk 1002 -diff --git a/arch/avr32/boards/atstk1000/atstk1002.c b/arch/avr32/boards/atstk1000/atstk1002.c -index e253e86..9a0f875 100644 ---- a/arch/avr32/boards/atstk1000/atstk1002.c -+++ b/arch/avr32/boards/atstk1000/atstk1002.c -@@ -11,10 +11,12 @@ - #include <linux/etherdevice.h> - #include <linux/init.h> - #include <linux/kernel.h> -+#include <linux/leds.h> - #include <linux/platform_device.h> - #include <linux/string.h> - #include <linux/types.h> - #include <linux/spi/spi.h> -+#include <linux/spi/at73c213.h> - - #include <video/atmel_lcdc.h> - -@@ -27,16 +29,47 @@ - - #include "atstk1000.h" - --#define SW2_DEFAULT /* MMCI and UART_A available */ - - struct eth_addr { - u8 addr[6]; - }; - - static struct eth_addr __initdata hw_addr[2]; --static struct eth_platform_data __initdata eth_data[2]; -+static struct eth_platform_data __initdata eth_data[2] = { -+ { -+ /* -+ * The MDIO pullups on STK1000 are a bit too weak for -+ * the autodetection to work properly, so we have to -+ * mask out everything but the correct address. -+ */ -+ .phy_mask = ~(1U << 16), -+ }, -+ { -+ .phy_mask = ~(1U << 17), -+ }, -+}; -+ -+#ifndef CONFIG_BOARD_ATSTK1002_SW1_CUSTOM -+#ifndef CONFIG_BOARD_ATSTK1002_SW3_CUSTOM -+static struct at73c213_board_info at73c213_data = { -+ .ssc_id = 0, -+ .shortname = "AVR32 STK1000 external DAC", -+}; -+#endif -+#endif - -+#ifndef CONFIG_BOARD_ATSTK1002_SW1_CUSTOM - static struct spi_board_info spi0_board_info[] __initdata = { -+#ifndef CONFIG_BOARD_ATSTK1002_SW3_CUSTOM -+ { -+ /* AT73C213 */ -+ .modalias = "at73c213", -+ .max_speed_hz = 200000, -+ .chip_select = 0, -+ .mode = SPI_MODE_1, -+ .platform_data = &at73c213_data, -+ }, -+#endif - { - /* QVGA display */ - .modalias = "ltv350qv", -@@ -45,6 +78,18 @@ static struct spi_board_info spi0_board_info[] __initdata = { - .mode = SPI_MODE_3, - }, - }; -+#endif -+ -+#ifdef CONFIG_BOARD_ATSTK1002_SPI1 -+static struct spi_board_info spi1_board_info[] __initdata = { { -+ /* patch in custom entries here */ -+} }; -+#endif -+ -+static struct mci_platform_data __initdata mci0_data = { -+ .detect_pin = GPIO_PIN_NONE, -+ .wp_pin = GPIO_PIN_NONE, -+}; - - /* - * The next two functions should go away as the boot loader is -@@ -101,12 +146,103 @@ static void __init set_hw_addr(struct platform_device *pdev) - clk_put(pclk); - } - --void __init setup_board(void) -+#ifdef CONFIG_BOARD_ATSTK1002_J2_LED -+ -+static struct gpio_led stk_j2_led[] = { -+#ifdef CONFIG_BOARD_ATSTK1002_J2_LED8 -+#define LEDSTRING "J2 jumpered to LED8" -+ { .name = "led0:amber", .gpio = GPIO_PIN_PB( 8), }, -+ { .name = "led1:amber", .gpio = GPIO_PIN_PB( 9), }, -+ { .name = "led2:amber", .gpio = GPIO_PIN_PB(10), }, -+ { .name = "led3:amber", .gpio = GPIO_PIN_PB(13), }, -+ { .name = "led4:amber", .gpio = GPIO_PIN_PB(14), }, -+ { .name = "led5:amber", .gpio = GPIO_PIN_PB(15), }, -+ { .name = "led6:amber", .gpio = GPIO_PIN_PB(16), }, -+ { .name = "led7:amber", .gpio = GPIO_PIN_PB(30), -+ .default_trigger = "heartbeat", }, -+#else /* RGB */ -+#define LEDSTRING "J2 jumpered to RGB LEDs" -+ { .name = "r1:red", .gpio = GPIO_PIN_PB( 8), }, -+ { .name = "g1:green", .gpio = GPIO_PIN_PB(10), }, -+ { .name = "b1:blue", .gpio = GPIO_PIN_PB(14), }, -+ -+ { .name = "r2:red", .gpio = GPIO_PIN_PB( 9), -+ .default_trigger = "heartbeat", }, -+ { .name = "g2:green", .gpio = GPIO_PIN_PB(13), }, -+ { .name = "b2:blue", .gpio = GPIO_PIN_PB(15), -+ .default_trigger = "heartbeat", }, -+ /* PB16, PB30 unused */ -+#endif -+}; -+ -+static struct gpio_led_platform_data stk_j2_led_data = { -+ .num_leds = ARRAY_SIZE(stk_j2_led), -+ .leds = stk_j2_led, -+}; -+ -+static struct platform_device stk_j2_led_dev = { -+ .name = "leds-gpio", -+ .id = 2, /* gpio block J2 */ -+ .dev = { -+ .platform_data = &stk_j2_led_data, -+ }, -+}; -+ -+static void setup_j2_leds(void) - { --#ifdef SW2_DEFAULT -- at32_map_usart(1, 0); /* USART 1/A: /dev/ttyS0, DB9 */ -+ unsigned i; -+ -+ for (i = 0; i < ARRAY_SIZE(stk_j2_led); i++) -+ at32_select_gpio(stk_j2_led[i].gpio, AT32_GPIOF_OUTPUT); -+ -+ printk("STK1002: " LEDSTRING "\n"); -+ platform_device_register(&stk_j2_led_dev); -+} -+ - #else -+static void setup_j2_leds(void) -+{ -+} -+#endif -+ -+#ifndef CONFIG_BOARD_ATSTK1002_SW1_CUSTOM -+#ifndef CONFIG_BOARD_ATSTK1002_SW3_CUSTOM -+static void __init at73c213_set_clk(struct at73c213_board_info *info) -+{ -+ struct clk *gclk; -+ struct clk *pll; -+ -+ gclk = clk_get(NULL, "gclk0"); -+ if (IS_ERR(gclk)) -+ goto err_gclk; -+ pll = clk_get(NULL, "pll0"); -+ if (IS_ERR(pll)) -+ goto err_pll; -+ -+ if (clk_set_parent(gclk, pll)) { -+ pr_debug("STK1000: failed to set pll0 as parent for DAC clock\n"); -+ goto err_set_clk; -+ } -+ -+ at32_select_periph(GPIO_PIN_PA(30), GPIO_PERIPH_A, 0); -+ info->dac_clk = gclk; -+ -+err_set_clk: -+ clk_put(pll); -+err_pll: -+ clk_put(gclk); -+err_gclk: -+ return; -+} -+#endif -+#endif -+ -+void __init setup_board(void) -+{ -+#ifdef CONFIG_BOARD_ATSTK1002_SW2_CUSTOM - at32_map_usart(0, 1); /* USART 0/B: /dev/ttyS1, IRDA */ -+#else -+ at32_map_usart(1, 0); /* USART 1/A: /dev/ttyS0, DB9 */ - #endif - /* USART 2/unused: expansion connector */ - at32_map_usart(3, 2); /* USART 3/C: /dev/ttyS2, DB9 */ -@@ -140,18 +276,50 @@ static int __init atstk1002_init(void) - - at32_add_system_devices(); - --#ifdef SW2_DEFAULT -- at32_add_device_usart(0); --#else -+#ifdef CONFIG_BOARD_ATSTK1002_SW2_CUSTOM - at32_add_device_usart(1); -+#else -+ at32_add_device_usart(0); - #endif - at32_add_device_usart(2); - -+#ifndef CONFIG_BOARD_ATSTK1002_SW6_CUSTOM - set_hw_addr(at32_add_device_eth(0, ð_data[0])); -- -- at32_add_device_spi(0, spi0_board_info, ARRAY_SIZE(spi0_board_info)); -+#endif -+#ifdef CONFIG_BOARD_ATSTK1002_SW5_CUSTOM -+ set_hw_addr(at32_add_device_eth(1, ð_data[1])); -+#else - at32_add_device_lcdc(0, &atstk1000_lcdc_data, - fbmem_start, fbmem_size); -+#endif -+ -+#ifndef CONFIG_BOARD_ATSTK1002_SW1_CUSTOM -+ at32_add_device_spi(0, spi0_board_info, ARRAY_SIZE(spi0_board_info)); -+#endif -+#ifdef CONFIG_BOARD_ATSTK1002_SPI1 -+ at32_add_device_spi(1, spi1_board_info, ARRAY_SIZE(spi1_board_info)); -+#endif -+ at32_add_device_twi(0); -+#ifndef CONFIG_BOARD_ATSTK1002_SW2_CUSTOM -+ at32_add_device_mci(0, &mci0_data); -+#endif -+ at32_add_device_usba(0, NULL); -+#ifdef CONFIG_BOARD_ATSTK1002_ENABLE_AC97 -+ at32_add_device_ac97c(0); -+#else -+ at32_add_device_abdac(0); -+#endif -+#ifndef CONFIG_BOARD_ATSTK1002_SW3_CUSTOM -+ at32_add_device_ssc(0, ATMEL_SSC_TX); -+#endif -+ -+ setup_j2_leds(); -+ -+#ifndef CONFIG_BOARD_ATSTK1002_SW3_CUSTOM -+#ifndef CONFIG_BOARD_ATSTK1002_SW1_CUSTOM -+ at73c213_set_clk(&at73c213_data); -+#endif -+#endif - - return 0; - } -diff --git a/arch/avr32/configs/atngw100_defconfig b/arch/avr32/configs/atngw100_defconfig -index 49493ad..adce168 100644 ---- a/arch/avr32/configs/atngw100_defconfig -+++ b/arch/avr32/configs/atngw100_defconfig -@@ -1,7 +1,7 @@ - # - # Automatically generated make config: don't edit --# Linux kernel version: 2.6.22-rc5 --# Sat Jun 23 15:40:05 2007 -+# Linux kernel version: 2.6.22.atmel.1 -+# Thu Jul 12 17:49:20 2007 - # - CONFIG_AVR32=y - CONFIG_GENERIC_GPIO=y -@@ -114,6 +114,7 @@ CONFIG_PLATFORM_AT32AP=y - CONFIG_CPU_AT32AP7000=y - # CONFIG_BOARD_ATSTK1000 is not set - CONFIG_BOARD_ATNGW100=y -+# CONFIG_BOARD_ATNGW100_I2C_GPIO is not set - CONFIG_LOADER_U_BOOT=y - - # -@@ -122,6 +123,7 @@ CONFIG_LOADER_U_BOOT=y - # CONFIG_AP7000_32_BIT_SMC is not set - CONFIG_AP7000_16_BIT_SMC=y - # CONFIG_AP7000_8_BIT_SMC is not set -+CONFIG_GPIO_DEV=y - CONFIG_LOAD_ADDRESS=0x10000000 - CONFIG_ENTRY_ADDRESS=0x90000000 - CONFIG_PHYS_OFFSET=0x10000000 -@@ -145,6 +147,7 @@ CONFIG_SPLIT_PTLOCK_CPUS=4 - # CONFIG_RESOURCES_64BIT is not set - CONFIG_ZONE_DMA_FLAG=0 - # CONFIG_OWNERSHIP_TRACE is not set -+CONFIG_DW_DMAC=y - # CONFIG_HZ_100 is not set - CONFIG_HZ_250=y - # CONFIG_HZ_300 is not set -@@ -153,6 +156,27 @@ CONFIG_HZ=250 - CONFIG_CMDLINE="" - - # -+# Power managment options -+# -+ -+# -+# CPU Frequency scaling -+# -+CONFIG_CPU_FREQ=y -+CONFIG_CPU_FREQ_TABLE=y -+# CONFIG_CPU_FREQ_DEBUG is not set -+CONFIG_CPU_FREQ_STAT=m -+# CONFIG_CPU_FREQ_STAT_DETAILS is not set -+CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y -+# CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set -+CONFIG_CPU_FREQ_GOV_PERFORMANCE=y -+CONFIG_CPU_FREQ_GOV_POWERSAVE=y -+CONFIG_CPU_FREQ_GOV_USERSPACE=y -+CONFIG_CPU_FREQ_GOV_ONDEMAND=y -+# CONFIG_CPU_FREQ_GOV_CONSERVATIVE is not set -+CONFIG_CPU_FREQ_AT32AP=y -+ -+# - # Bus options - # - # CONFIG_ARCH_SUPPORTS_MSI is not set -@@ -187,13 +211,8 @@ CONFIG_NET_KEY=y - # CONFIG_NET_KEY_MIGRATE is not set - CONFIG_INET=y - CONFIG_IP_MULTICAST=y --CONFIG_IP_ADVANCED_ROUTER=y --CONFIG_ASK_IP_FIB_HASH=y --# CONFIG_IP_FIB_TRIE is not set -+# CONFIG_IP_ADVANCED_ROUTER is not set - CONFIG_IP_FIB_HASH=y --# CONFIG_IP_MULTIPLE_TABLES is not set --# CONFIG_IP_ROUTE_MULTIPATH is not set --# CONFIG_IP_ROUTE_VERBOSE is not set - CONFIG_IP_PNP=y - CONFIG_IP_PNP_DHCP=y - # CONFIG_IP_PNP_BOOTP is not set -@@ -240,6 +259,7 @@ CONFIG_IPV6_SIT=y - # CONFIG_NETWORK_SECMARK is not set - CONFIG_NETFILTER=y - # CONFIG_NETFILTER_DEBUG is not set -+CONFIG_BRIDGE_NETFILTER=y - - # - # Core Netfilter Configuration -@@ -284,6 +304,7 @@ CONFIG_NETFILTER_XT_MATCH_MAC=m - CONFIG_NETFILTER_XT_MATCH_MARK=m - CONFIG_NETFILTER_XT_MATCH_POLICY=m - CONFIG_NETFILTER_XT_MATCH_MULTIPORT=m -+# CONFIG_NETFILTER_XT_MATCH_PHYSDEV is not set - CONFIG_NETFILTER_XT_MATCH_PKTTYPE=m - CONFIG_NETFILTER_XT_MATCH_QUOTA=m - CONFIG_NETFILTER_XT_MATCH_REALM=m -@@ -359,13 +380,19 @@ CONFIG_IP6_NF_TARGET_REJECT=m - CONFIG_IP6_NF_MANGLE=m - CONFIG_IP6_NF_TARGET_HL=m - CONFIG_IP6_NF_RAW=m -+ -+# -+# Bridge: Netfilter Configuration -+# -+# CONFIG_BRIDGE_NF_EBTABLES is not set - # CONFIG_IP_DCCP is not set - # CONFIG_IP_SCTP is not set - # CONFIG_TIPC is not set - # CONFIG_ATM is not set --# CONFIG_BRIDGE is not set -+CONFIG_BRIDGE=m - CONFIG_VLAN_8021Q=m - # CONFIG_DECNET is not set -+CONFIG_LLC=m - # CONFIG_LLC2 is not set - # CONFIG_IPX is not set - # CONFIG_ATALK is not set -@@ -521,7 +548,6 @@ CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024 - # - # Misc devices - # --# CONFIG_BLINK is not set - # CONFIG_IDE is not set - - # -@@ -545,13 +571,26 @@ CONFIG_NETDEVICES=y - # CONFIG_BONDING is not set - # CONFIG_EQUALIZER is not set - CONFIG_TUN=m --# CONFIG_PHYLIB is not set -+CONFIG_PHYLIB=y -+ -+# -+# MII PHY device drivers -+# -+# CONFIG_MARVELL_PHY is not set -+# CONFIG_DAVICOM_PHY is not set -+# CONFIG_QSEMI_PHY is not set -+# CONFIG_LXT_PHY is not set -+# CONFIG_CICADA_PHY is not set -+# CONFIG_VITESSE_PHY is not set -+# CONFIG_SMSC_PHY is not set -+# CONFIG_BROADCOM_PHY is not set -+# CONFIG_FIXED_PHY is not set - - # - # Ethernet (10 or 100Mbit) - # - CONFIG_NET_ETHERNET=y --CONFIG_MII=y -+# CONFIG_MII is not set - CONFIG_MACB=y - # CONFIG_NETDEV_1000 is not set - # CONFIG_NETDEV_10000 is not set -@@ -625,7 +664,15 @@ CONFIG_UNIX98_PTYS=y - # IPMI - # - # CONFIG_IPMI_HANDLER is not set --# CONFIG_WATCHDOG is not set -+CONFIG_WATCHDOG=y -+# CONFIG_WATCHDOG_NOWAYOUT is not set -+ -+# -+# Watchdog Device Drivers -+# -+# CONFIG_SOFT_WATCHDOG is not set -+CONFIG_AT32AP700X_WDT=y -+CONFIG_AT32AP700X_WDT_TIMEOUT=2 - # CONFIG_HW_RANDOM is not set - # CONFIG_RTC is not set - # CONFIG_GEN_RTC is not set -@@ -636,7 +683,42 @@ CONFIG_UNIX98_PTYS=y - # TPM devices - # - # CONFIG_TCG_TPM is not set --# CONFIG_I2C is not set -+CONFIG_I2C=m -+CONFIG_I2C_BOARDINFO=y -+CONFIG_I2C_CHARDEV=m -+ -+# -+# I2C Algorithms -+# -+CONFIG_I2C_ALGOBIT=m -+# CONFIG_I2C_ALGOPCF is not set -+# CONFIG_I2C_ALGOPCA is not set -+ -+# -+# I2C Hardware Bus support -+# -+CONFIG_I2C_ATMELTWI=m -+CONFIG_I2C_ATMELTWI_BAUDRATE=100000 -+CONFIG_I2C_GPIO=m -+# CONFIG_I2C_OCORES is not set -+# CONFIG_I2C_PARPORT_LIGHT is not set -+# CONFIG_I2C_SIMTEC is not set -+# CONFIG_I2C_STUB is not set -+ -+# -+# Miscellaneous I2C Chip support -+# -+# CONFIG_SENSORS_DS1337 is not set -+# CONFIG_SENSORS_DS1374 is not set -+# CONFIG_SENSORS_EEPROM is not set -+# CONFIG_SENSORS_PCF8574 is not set -+# CONFIG_SENSORS_PCA9539 is not set -+# CONFIG_SENSORS_PCF8591 is not set -+# CONFIG_SENSORS_MAX6875 is not set -+# CONFIG_I2C_DEBUG_CORE is not set -+# CONFIG_I2C_DEBUG_ALGO is not set -+# CONFIG_I2C_DEBUG_BUS is not set -+# CONFIG_I2C_DEBUG_CHIP is not set - - # - # SPI support -@@ -655,7 +737,7 @@ CONFIG_SPI_ATMEL=y - # SPI Protocol Masters - # - # CONFIG_SPI_AT25 is not set --# CONFIG_SPI_SPIDEV is not set -+CONFIG_SPI_SPIDEV=m - - # - # Dallas's 1-wire bus -@@ -706,21 +788,59 @@ CONFIG_SPI_ATMEL=y - # - # USB Gadget Support - # --# CONFIG_USB_GADGET is not set --# CONFIG_MMC is not set -+CONFIG_USB_GADGET=y -+# CONFIG_USB_GADGET_DEBUG_FILES is not set -+CONFIG_USB_GADGET_SELECTED=y -+# CONFIG_USB_GADGET_FSL_USB2 is not set -+# CONFIG_USB_GADGET_NET2280 is not set -+# CONFIG_USB_GADGET_PXA2XX is not set -+# CONFIG_USB_GADGET_GOKU is not set -+# CONFIG_USB_GADGET_LH7A40X is not set -+CONFIG_USB_GADGET_ATMEL_USBA=y -+CONFIG_USB_ATMEL_USBA=y -+# CONFIG_USB_GADGET_OMAP is not set -+# CONFIG_USB_GADGET_AT91 is not set -+# CONFIG_USB_GADGET_DUMMY_HCD is not set -+CONFIG_USB_GADGET_DUALSPEED=y -+CONFIG_USB_ZERO=m -+CONFIG_USB_ETH=m -+CONFIG_USB_ETH_RNDIS=y -+CONFIG_USB_GADGETFS=m -+CONFIG_USB_FILE_STORAGE=m -+# CONFIG_USB_FILE_STORAGE_TEST is not set -+CONFIG_USB_G_SERIAL=m -+# CONFIG_USB_MIDI_GADGET is not set -+CONFIG_MMC=y -+# CONFIG_MMC_DEBUG is not set -+# CONFIG_MMC_UNSAFE_RESUME is not set -+ -+# -+# MMC/SD Card Drivers -+# -+CONFIG_MMC_BLOCK=y -+ -+# -+# MMC/SD Host Controller Drivers -+# -+CONFIG_MMC_ATMELMCI=y - - # - # LED devices - # --# CONFIG_NEW_LEDS is not set -+CONFIG_NEW_LEDS=y -+CONFIG_LEDS_CLASS=y - - # - # LED drivers - # -+CONFIG_LEDS_GPIO=y - - # - # LED Triggers - # -+CONFIG_LEDS_TRIGGERS=y -+CONFIG_LEDS_TRIGGER_TIMER=y -+CONFIG_LEDS_TRIGGER_HEARTBEAT=y - - # - # InfiniBand support -@@ -733,7 +853,51 @@ CONFIG_SPI_ATMEL=y - # - # Real Time Clock - # --# CONFIG_RTC_CLASS is not set -+CONFIG_RTC_LIB=y -+CONFIG_RTC_CLASS=y -+CONFIG_RTC_HCTOSYS=y -+CONFIG_RTC_HCTOSYS_DEVICE="rtc0" -+# CONFIG_RTC_DEBUG is not set -+ -+# -+# RTC interfaces -+# -+CONFIG_RTC_INTF_SYSFS=y -+CONFIG_RTC_INTF_PROC=y -+CONFIG_RTC_INTF_DEV=y -+# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set -+# CONFIG_RTC_DRV_TEST is not set -+ -+# -+# I2C RTC drivers -+# -+# CONFIG_RTC_DRV_DS1307 is not set -+# CONFIG_RTC_DRV_DS1672 is not set -+# CONFIG_RTC_DRV_MAX6900 is not set -+# CONFIG_RTC_DRV_RS5C372 is not set -+# CONFIG_RTC_DRV_ISL1208 is not set -+# CONFIG_RTC_DRV_X1205 is not set -+# CONFIG_RTC_DRV_PCF8563 is not set -+# CONFIG_RTC_DRV_PCF8583 is not set -+ -+# -+# SPI RTC drivers -+# -+# CONFIG_RTC_DRV_RS5C348 is not set -+# CONFIG_RTC_DRV_MAX6902 is not set -+ -+# -+# Platform RTC drivers -+# -+# CONFIG_RTC_DRV_DS1553 is not set -+# CONFIG_RTC_DRV_DS1742 is not set -+# CONFIG_RTC_DRV_M48T86 is not set -+# CONFIG_RTC_DRV_V3020 is not set -+ -+# -+# on-CPU RTC drivers -+# -+CONFIG_RTC_DRV_AT32AP700X=y - - # - # DMA Engine support -@@ -767,7 +931,8 @@ CONFIG_JBD=y - # CONFIG_OCFS2_FS is not set - # CONFIG_MINIX_FS is not set - # CONFIG_ROMFS_FS is not set --# CONFIG_INOTIFY is not set -+CONFIG_INOTIFY=y -+CONFIG_INOTIFY_USER=y - # CONFIG_QUOTA is not set - # CONFIG_DNOTIFY is not set - # CONFIG_AUTOFS_FS is not set -@@ -922,7 +1087,7 @@ CONFIG_TRACE_IRQFLAGS_SUPPORT=y - CONFIG_ENABLE_MUST_CHECK=y - CONFIG_MAGIC_SYSRQ=y - # CONFIG_UNUSED_SYMBOLS is not set --# CONFIG_DEBUG_FS is not set -+CONFIG_DEBUG_FS=y - # CONFIG_HEADERS_CHECK is not set - CONFIG_DEBUG_KERNEL=y - # CONFIG_DEBUG_SHIRQ is not set -diff --git a/arch/avr32/configs/atstk1002_defconfig b/arch/avr32/configs/atstk1002_defconfig -index 3b977fd..3708066 100644 ---- a/arch/avr32/configs/atstk1002_defconfig -+++ b/arch/avr32/configs/atstk1002_defconfig -@@ -1,7 +1,7 @@ - # - # Automatically generated make config: don't edit --# Linux kernel version: 2.6.22-rc5 --# Sat Jun 23 15:32:08 2007 -+# Linux kernel version: 2.6.22.atmel.2 -+# Thu Jul 19 13:46:47 2007 - # - CONFIG_AVR32=y - CONFIG_GENERIC_GPIO=y -@@ -80,10 +80,10 @@ CONFIG_BASE_SMALL=1 - # - CONFIG_MODULES=y - CONFIG_MODULE_UNLOAD=y --# CONFIG_MODULE_FORCE_UNLOAD is not set -+CONFIG_MODULE_FORCE_UNLOAD=y - # CONFIG_MODVERSIONS is not set - # CONFIG_MODULE_SRCVERSION_ALL is not set --# CONFIG_KMOD is not set -+CONFIG_KMOD=y - - # - # Block layer -@@ -99,12 +99,12 @@ CONFIG_BLOCK=y - CONFIG_IOSCHED_NOOP=y - # CONFIG_IOSCHED_AS is not set - # CONFIG_IOSCHED_DEADLINE is not set --# CONFIG_IOSCHED_CFQ is not set -+CONFIG_IOSCHED_CFQ=y - # CONFIG_DEFAULT_AS is not set - # CONFIG_DEFAULT_DEADLINE is not set --# CONFIG_DEFAULT_CFQ is not set --CONFIG_DEFAULT_NOOP=y --CONFIG_DEFAULT_IOSCHED="noop" -+CONFIG_DEFAULT_CFQ=y -+# CONFIG_DEFAULT_NOOP is not set -+CONFIG_DEFAULT_IOSCHED="cfq" - - # - # System Type and features -@@ -117,6 +117,11 @@ CONFIG_CPU_AT32AP7000=y - CONFIG_BOARD_ATSTK1002=y - CONFIG_BOARD_ATSTK1000=y - # CONFIG_BOARD_ATNGW100 is not set -+# CONFIG_BOARD_ATSTK1002_CUSTOM is not set -+# CONFIG_BOARD_ATSTK1002_SPI1 is not set -+# CONFIG_BOARD_ATSTK1002_J2_LED is not set -+# CONFIG_BOARD_ATSTK1002_J2_LED8 is not set -+# CONFIG_BOARD_ATSTK1002_J2_RGB is not set - CONFIG_LOADER_U_BOOT=y - - # -@@ -125,6 +130,7 @@ CONFIG_LOADER_U_BOOT=y - # CONFIG_AP7000_32_BIT_SMC is not set - CONFIG_AP7000_16_BIT_SMC=y - # CONFIG_AP7000_8_BIT_SMC is not set -+CONFIG_GPIO_DEV=y - CONFIG_LOAD_ADDRESS=0x10000000 - CONFIG_ENTRY_ADDRESS=0x90000000 - CONFIG_PHYS_OFFSET=0x10000000 -@@ -148,6 +154,7 @@ CONFIG_SPLIT_PTLOCK_CPUS=4 - # CONFIG_RESOURCES_64BIT is not set - CONFIG_ZONE_DMA_FLAG=0 - # CONFIG_OWNERSHIP_TRACE is not set -+CONFIG_DW_DMAC=y - # CONFIG_HZ_100 is not set - CONFIG_HZ_250=y - # CONFIG_HZ_300 is not set -@@ -156,6 +163,27 @@ CONFIG_HZ=250 - CONFIG_CMDLINE="" - - # -+# Power managment options -+# -+ -+# -+# CPU Frequency scaling -+# -+CONFIG_CPU_FREQ=y -+CONFIG_CPU_FREQ_TABLE=y -+# CONFIG_CPU_FREQ_DEBUG is not set -+CONFIG_CPU_FREQ_STAT=m -+# CONFIG_CPU_FREQ_STAT_DETAILS is not set -+CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y -+# CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set -+CONFIG_CPU_FREQ_GOV_PERFORMANCE=y -+CONFIG_CPU_FREQ_GOV_POWERSAVE=y -+CONFIG_CPU_FREQ_GOV_USERSPACE=y -+CONFIG_CPU_FREQ_GOV_ONDEMAND=y -+# CONFIG_CPU_FREQ_GOV_CONSERVATIVE is not set -+CONFIG_CPU_FREQ_AT32AP=y -+ -+# - # Bus options - # - # CONFIG_ARCH_SUPPORTS_MSI is not set -@@ -327,6 +355,8 @@ CONFIG_MTD_PHYSMAP_BANKWIDTH=2 - # - # Self-contained MTD device drivers - # -+CONFIG_MTD_DATAFLASH=m -+# CONFIG_MTD_M25P80 is not set - # CONFIG_MTD_SLRAM is not set - # CONFIG_MTD_PHRAM is not set - # CONFIG_MTD_MTDRAM is not set -@@ -373,7 +403,7 @@ CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024 - # - # Misc devices - # --# CONFIG_BLINK is not set -+CONFIG_ATMEL_SSC=m - # CONFIG_IDE is not set - - # -@@ -397,13 +427,26 @@ CONFIG_DUMMY=y - # CONFIG_BONDING is not set - # CONFIG_EQUALIZER is not set - CONFIG_TUN=m --# CONFIG_PHYLIB is not set -+CONFIG_PHYLIB=y -+ -+# -+# MII PHY device drivers -+# -+# CONFIG_MARVELL_PHY is not set -+# CONFIG_DAVICOM_PHY is not set -+# CONFIG_QSEMI_PHY is not set -+CONFIG_LXT_PHY=y -+# CONFIG_CICADA_PHY is not set -+# CONFIG_VITESSE_PHY is not set -+# CONFIG_SMSC_PHY is not set -+# CONFIG_BROADCOM_PHY is not set -+# CONFIG_FIXED_PHY is not set - - # - # Ethernet (10 or 100Mbit) - # - CONFIG_NET_ETHERNET=y --CONFIG_MII=y -+# CONFIG_MII is not set - CONFIG_MACB=y - # CONFIG_NETDEV_1000 is not set - # CONFIG_NETDEV_10000 is not set -@@ -443,7 +486,42 @@ CONFIG_SLHC=m - # - # Input device support - # --# CONFIG_INPUT is not set -+CONFIG_INPUT=m -+# CONFIG_INPUT_FF_MEMLESS is not set -+CONFIG_INPUT_POLLDEV=m -+ -+# -+# Userland interfaces -+# -+CONFIG_INPUT_MOUSEDEV=m -+CONFIG_INPUT_MOUSEDEV_PSAUX=y -+CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 -+CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 -+# CONFIG_INPUT_JOYDEV is not set -+# CONFIG_INPUT_TSDEV is not set -+# CONFIG_INPUT_EVDEV is not set -+# CONFIG_INPUT_EVBUG is not set -+ -+# -+# Input Device Drivers -+# -+CONFIG_INPUT_KEYBOARD=y -+# CONFIG_KEYBOARD_ATKBD is not set -+# CONFIG_KEYBOARD_SUNKBD is not set -+# CONFIG_KEYBOARD_LKKBD is not set -+# CONFIG_KEYBOARD_XTKBD is not set -+# CONFIG_KEYBOARD_NEWTON is not set -+# CONFIG_KEYBOARD_STOWAWAY is not set -+CONFIG_KEYBOARD_GPIO=m -+CONFIG_INPUT_MOUSE=y -+# CONFIG_MOUSE_PS2 is not set -+# CONFIG_MOUSE_SERIAL is not set -+# CONFIG_MOUSE_VSXXXAA is not set -+CONFIG_MOUSE_GPIO=m -+# CONFIG_INPUT_JOYSTICK is not set -+# CONFIG_INPUT_TABLET is not set -+# CONFIG_INPUT_TOUCHSCREEN is not set -+# CONFIG_INPUT_MISC is not set - - # - # Hardware I/O ports -@@ -477,7 +555,15 @@ CONFIG_UNIX98_PTYS=y - # IPMI - # - # CONFIG_IPMI_HANDLER is not set --# CONFIG_WATCHDOG is not set -+CONFIG_WATCHDOG=y -+# CONFIG_WATCHDOG_NOWAYOUT is not set -+ -+# -+# Watchdog Device Drivers -+# -+# CONFIG_SOFT_WATCHDOG is not set -+CONFIG_AT32AP700X_WDT=y -+CONFIG_AT32AP700X_WDT_TIMEOUT=2 - # CONFIG_HW_RANDOM is not set - # CONFIG_RTC is not set - # CONFIG_GEN_RTC is not set -@@ -488,13 +574,61 @@ CONFIG_UNIX98_PTYS=y - # TPM devices - # - # CONFIG_TCG_TPM is not set --# CONFIG_I2C is not set -+CONFIG_I2C=m -+CONFIG_I2C_BOARDINFO=y -+CONFIG_I2C_CHARDEV=m -+ -+# -+# I2C Algorithms -+# -+CONFIG_I2C_ALGOBIT=m -+# CONFIG_I2C_ALGOPCF is not set -+# CONFIG_I2C_ALGOPCA is not set -+ -+# -+# I2C Hardware Bus support -+# -+CONFIG_I2C_ATMELTWI=m -+CONFIG_I2C_ATMELTWI_BAUDRATE=100000 -+CONFIG_I2C_GPIO=m -+# CONFIG_I2C_OCORES is not set -+# CONFIG_I2C_PARPORT_LIGHT is not set -+# CONFIG_I2C_SIMTEC is not set -+# CONFIG_I2C_STUB is not set -+ -+# -+# Miscellaneous I2C Chip support -+# -+# CONFIG_SENSORS_DS1337 is not set -+# CONFIG_SENSORS_DS1374 is not set -+# CONFIG_SENSORS_EEPROM is not set -+# CONFIG_SENSORS_PCF8574 is not set -+# CONFIG_SENSORS_PCA9539 is not set -+# CONFIG_SENSORS_PCF8591 is not set -+# CONFIG_SENSORS_MAX6875 is not set -+# CONFIG_I2C_DEBUG_CORE is not set -+# CONFIG_I2C_DEBUG_ALGO is not set -+# CONFIG_I2C_DEBUG_BUS is not set -+# CONFIG_I2C_DEBUG_CHIP is not set - - # - # SPI support - # --# CONFIG_SPI is not set --# CONFIG_SPI_MASTER is not set -+CONFIG_SPI=y -+# CONFIG_SPI_DEBUG is not set -+CONFIG_SPI_MASTER=y -+ -+# -+# SPI Master Controller Drivers -+# -+CONFIG_SPI_ATMEL=y -+# CONFIG_SPI_BITBANG is not set -+ -+# -+# SPI Protocol Masters -+# -+# CONFIG_SPI_AT25 is not set -+CONFIG_SPI_SPIDEV=m - - # - # Dallas's 1-wire bus -@@ -517,19 +651,91 @@ CONFIG_UNIX98_PTYS=y - # - # Graphics support - # --# CONFIG_BACKLIGHT_LCD_SUPPORT is not set -+CONFIG_BACKLIGHT_LCD_SUPPORT=y -+CONFIG_LCD_CLASS_DEVICE=y -+CONFIG_LCD_LTV350QV=y -+# CONFIG_BACKLIGHT_CLASS_DEVICE is not set - - # - # Display device support - # - # CONFIG_DISPLAY_SUPPORT is not set - # CONFIG_VGASTATE is not set --# CONFIG_FB is not set -+CONFIG_FB=y -+# CONFIG_FIRMWARE_EDID is not set -+# CONFIG_FB_DDC is not set -+CONFIG_FB_CFB_FILLRECT=y -+CONFIG_FB_CFB_COPYAREA=y -+CONFIG_FB_CFB_IMAGEBLIT=y -+# CONFIG_FB_SYS_FILLRECT is not set -+# CONFIG_FB_SYS_COPYAREA is not set -+# CONFIG_FB_SYS_IMAGEBLIT is not set -+# CONFIG_FB_SYS_FOPS is not set -+CONFIG_FB_DEFERRED_IO=y -+# CONFIG_FB_SVGALIB is not set -+# CONFIG_FB_MACMODES is not set -+# CONFIG_FB_BACKLIGHT is not set -+# CONFIG_FB_MODE_HELPERS is not set -+# CONFIG_FB_TILEBLITTING is not set -+ -+# -+# Frame buffer hardware drivers -+# -+# CONFIG_FB_S1D13XXX is not set -+CONFIG_FB_ATMEL=y -+# CONFIG_FB_VIRTUAL is not set -+# CONFIG_LOGO is not set - - # - # Sound - # --# CONFIG_SOUND is not set -+CONFIG_SOUND=m -+ -+# -+# Advanced Linux Sound Architecture -+# -+CONFIG_SND=m -+CONFIG_SND_TIMER=m -+CONFIG_SND_PCM=m -+# CONFIG_SND_SEQUENCER is not set -+CONFIG_SND_OSSEMUL=y -+CONFIG_SND_MIXER_OSS=m -+CONFIG_SND_PCM_OSS=m -+CONFIG_SND_PCM_OSS_PLUGINS=y -+# CONFIG_SND_DYNAMIC_MINORS is not set -+# CONFIG_SND_SUPPORT_OLD_API is not set -+CONFIG_SND_VERBOSE_PROCFS=y -+# CONFIG_SND_VERBOSE_PRINTK is not set -+# CONFIG_SND_DEBUG is not set -+ -+# -+# Generic devices -+# -+# CONFIG_SND_DUMMY is not set -+# CONFIG_SND_MTPAV is not set -+# CONFIG_SND_SERIAL_U16550 is not set -+# CONFIG_SND_MPU401 is not set -+ -+# -+# SPI devices -+# -+CONFIG_SND_AT73C213=m -+CONFIG_SND_AT73C213_TARGET_BITRATE=48000 -+ -+# -+# System on Chip audio support -+# -+# CONFIG_SND_SOC is not set -+ -+# -+# Open Sound System -+# -+# CONFIG_SOUND_PRIME is not set -+ -+# -+# HID Devices -+# -+# CONFIG_HID is not set - - # - # USB support -@@ -545,21 +751,59 @@ CONFIG_UNIX98_PTYS=y - # - # USB Gadget Support - # --# CONFIG_USB_GADGET is not set --# CONFIG_MMC is not set -+CONFIG_USB_GADGET=y -+# CONFIG_USB_GADGET_DEBUG_FILES is not set -+CONFIG_USB_GADGET_SELECTED=y -+# CONFIG_USB_GADGET_FSL_USB2 is not set -+# CONFIG_USB_GADGET_NET2280 is not set -+# CONFIG_USB_GADGET_PXA2XX is not set -+# CONFIG_USB_GADGET_GOKU is not set -+# CONFIG_USB_GADGET_LH7A40X is not set -+CONFIG_USB_GADGET_ATMEL_USBA=y -+CONFIG_USB_ATMEL_USBA=y -+# CONFIG_USB_GADGET_OMAP is not set -+# CONFIG_USB_GADGET_AT91 is not set -+# CONFIG_USB_GADGET_DUMMY_HCD is not set -+CONFIG_USB_GADGET_DUALSPEED=y -+CONFIG_USB_ZERO=m -+CONFIG_USB_ETH=m -+CONFIG_USB_ETH_RNDIS=y -+CONFIG_USB_GADGETFS=m -+CONFIG_USB_FILE_STORAGE=m -+# CONFIG_USB_FILE_STORAGE_TEST is not set -+CONFIG_USB_G_SERIAL=m -+# CONFIG_USB_MIDI_GADGET is not set -+CONFIG_MMC=y -+# CONFIG_MMC_DEBUG is not set -+# CONFIG_MMC_UNSAFE_RESUME is not set -+ -+# -+# MMC/SD Card Drivers -+# -+CONFIG_MMC_BLOCK=y -+ -+# -+# MMC/SD Host Controller Drivers -+# -+CONFIG_MMC_ATMELMCI=y - - # - # LED devices - # --# CONFIG_NEW_LEDS is not set -+CONFIG_NEW_LEDS=y -+CONFIG_LEDS_CLASS=m - - # - # LED drivers - # -+CONFIG_LEDS_GPIO=m - - # - # LED Triggers - # -+CONFIG_LEDS_TRIGGERS=y -+CONFIG_LEDS_TRIGGER_TIMER=m -+CONFIG_LEDS_TRIGGER_HEARTBEAT=m - - # - # InfiniBand support -@@ -572,7 +816,50 @@ CONFIG_UNIX98_PTYS=y - # - # Real Time Clock - # --# CONFIG_RTC_CLASS is not set -+CONFIG_RTC_LIB=y -+CONFIG_RTC_CLASS=y -+# CONFIG_RTC_HCTOSYS is not set -+# CONFIG_RTC_DEBUG is not set -+ -+# -+# RTC interfaces -+# -+CONFIG_RTC_INTF_SYSFS=y -+CONFIG_RTC_INTF_PROC=y -+CONFIG_RTC_INTF_DEV=y -+# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set -+# CONFIG_RTC_DRV_TEST is not set -+ -+# -+# I2C RTC drivers -+# -+# CONFIG_RTC_DRV_DS1307 is not set -+# CONFIG_RTC_DRV_DS1672 is not set -+# CONFIG_RTC_DRV_MAX6900 is not set -+# CONFIG_RTC_DRV_RS5C372 is not set -+# CONFIG_RTC_DRV_ISL1208 is not set -+# CONFIG_RTC_DRV_X1205 is not set -+# CONFIG_RTC_DRV_PCF8563 is not set -+# CONFIG_RTC_DRV_PCF8583 is not set -+ -+# -+# SPI RTC drivers -+# -+# CONFIG_RTC_DRV_RS5C348 is not set -+# CONFIG_RTC_DRV_MAX6902 is not set -+ -+# -+# Platform RTC drivers -+# -+# CONFIG_RTC_DRV_DS1553 is not set -+# CONFIG_RTC_DRV_DS1742 is not set -+# CONFIG_RTC_DRV_M48T86 is not set -+# CONFIG_RTC_DRV_V3020 is not set -+ -+# -+# on-CPU RTC drivers -+# -+CONFIG_RTC_DRV_AT32AP700X=y - - # - # DMA Engine support -@@ -590,11 +877,14 @@ CONFIG_UNIX98_PTYS=y - # - # File systems - # --CONFIG_EXT2_FS=m -+CONFIG_EXT2_FS=y - # CONFIG_EXT2_FS_XATTR is not set - # CONFIG_EXT2_FS_XIP is not set --# CONFIG_EXT3_FS is not set -+CONFIG_EXT3_FS=y -+# CONFIG_EXT3_FS_XATTR is not set - # CONFIG_EXT4DEV_FS is not set -+CONFIG_JBD=y -+# CONFIG_JBD_DEBUG is not set - # CONFIG_REISERFS_FS is not set - # CONFIG_JFS_FS is not set - # CONFIG_FS_POSIX_ACL is not set -@@ -609,7 +899,7 @@ CONFIG_INOTIFY_USER=y - # CONFIG_DNOTIFY is not set - # CONFIG_AUTOFS_FS is not set - # CONFIG_AUTOFS4_FS is not set --# CONFIG_FUSE_FS is not set -+CONFIG_FUSE_FS=m - - # - # CD-ROM/DVD Filesystems -@@ -638,7 +928,7 @@ CONFIG_TMPFS=y - # CONFIG_TMPFS_POSIX_ACL is not set - # CONFIG_HUGETLB_PAGE is not set - CONFIG_RAMFS=y --CONFIG_CONFIGFS_FS=m -+CONFIG_CONFIGFS_FS=y - - # - # Miscellaneous filesystems -@@ -683,8 +973,14 @@ CONFIG_SUNRPC=y - # CONFIG_SUNRPC_BIND34 is not set - # CONFIG_RPCSEC_GSS_KRB5 is not set - # CONFIG_RPCSEC_GSS_SPKM3 is not set --# CONFIG_SMB_FS is not set --# CONFIG_CIFS is not set -+CONFIG_SMB_FS=m -+# CONFIG_SMB_NLS_DEFAULT is not set -+CONFIG_CIFS=m -+# CONFIG_CIFS_STATS is not set -+# CONFIG_CIFS_WEAK_PW_HASH is not set -+# CONFIG_CIFS_XATTR is not set -+# CONFIG_CIFS_DEBUG2 is not set -+# CONFIG_CIFS_EXPERIMENTAL is not set - # CONFIG_NCP_FS is not set - # CONFIG_CODA_FS is not set - # CONFIG_AFS_FS is not set -diff --git a/arch/avr32/drivers/Makefile b/arch/avr32/drivers/Makefile -new file mode 100644 -index 0000000..b429b75 ---- /dev/null -+++ b/arch/avr32/drivers/Makefile -@@ -0,0 +1 @@ -+obj-$(CONFIG_DW_DMAC) += dw-dmac.o -diff --git a/arch/avr32/drivers/dw-dmac.c b/arch/avr32/drivers/dw-dmac.c -new file mode 100644 -index 0000000..224eb30 ---- /dev/null -+++ b/arch/avr32/drivers/dw-dmac.c -@@ -0,0 +1,761 @@ -+/* -+ * Driver for the Synopsys DesignWare DMA Controller -+ * -+ * Copyright (C) 2005-2006 Atmel Corporation -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 as -+ * published by the Free Software Foundation. -+ */ -+#include <linux/clk.h> -+#include <linux/device.h> -+#include <linux/dma-mapping.h> -+#include <linux/dmapool.h> -+#include <linux/init.h> -+#include <linux/interrupt.h> -+#include <linux/module.h> -+#include <linux/platform_device.h> -+ -+#include <asm/dma-controller.h> -+#include <asm/io.h> -+ -+#include "dw-dmac.h" -+ -+#define DMAC_NR_CHANNELS 3 -+#define DMAC_MAX_BLOCKSIZE 4095 -+ -+enum { -+ CH_STATE_FREE = 0, -+ CH_STATE_ALLOCATED, -+ CH_STATE_BUSY, -+}; -+ -+struct dw_dma_lli { -+ dma_addr_t sar; -+ dma_addr_t dar; -+ dma_addr_t llp; -+ u32 ctllo; -+ u32 ctlhi; -+ u32 sstat; -+ u32 dstat; -+}; -+ -+struct dw_dma_block { -+ struct dw_dma_lli *lli_vaddr; -+ dma_addr_t lli_dma_addr; -+}; -+ -+struct dw_dma_channel { -+ unsigned int state; -+ int is_cyclic; -+ struct dma_request_sg *req_sg; -+ struct dma_request_cyclic *req_cyclic; -+ unsigned int nr_blocks; -+ int direction; -+ struct dw_dma_block *block; -+}; -+ -+struct dw_dma_controller { -+ spinlock_t lock; -+ void * __iomem regs; -+ struct dma_pool *lli_pool; -+ struct clk *hclk; -+ struct dma_controller dma; -+ struct dw_dma_channel channel[DMAC_NR_CHANNELS]; -+}; -+#define to_dw_dmac(dmac) container_of(dmac, struct dw_dma_controller, dma) -+ -+#define dmac_writel_hi(dmac, reg, value) \ -+ __raw_writel((value), (dmac)->regs + DW_DMAC_##reg + 4) -+#define dmac_readl_hi(dmac, reg) \ -+ __raw_readl((dmac)->regs + DW_DMAC_##reg + 4) -+#define dmac_writel_lo(dmac, reg, value) \ -+ __raw_writel((value), (dmac)->regs + DW_DMAC_##reg) -+#define dmac_readl_lo(dmac, reg) \ -+ __raw_readl((dmac)->regs + DW_DMAC_##reg) -+#define dmac_chan_writel_hi(dmac, chan, reg, value) \ -+ __raw_writel((value), ((dmac)->regs + 0x58 * (chan) \ -+ + DW_DMAC_CHAN_##reg + 4)) -+#define dmac_chan_readl_hi(dmac, chan, reg) \ -+ __raw_readl((dmac)->regs + 0x58 * (chan) + DW_DMAC_CHAN_##reg + 4) -+#define dmac_chan_writel_lo(dmac, chan, reg, value) \ -+ __raw_writel((value), (dmac)->regs + 0x58 * (chan) + DW_DMAC_CHAN_##reg) -+#define dmac_chan_readl_lo(dmac, chan, reg) \ -+ __raw_readl((dmac)->regs + 0x58 * (chan) + DW_DMAC_CHAN_##reg) -+#define set_channel_bit(dmac, reg, chan) \ -+ dmac_writel_lo(dmac, reg, (1 << (chan)) | (1 << ((chan) + 8))) -+#define clear_channel_bit(dmac, reg, chan) \ -+ dmac_writel_lo(dmac, reg, (0 << (chan)) | (1 << ((chan) + 8))) -+ -+static int dmac_alloc_channel(struct dma_controller *_dmac) -+{ -+ struct dw_dma_controller *dmac = to_dw_dmac(_dmac); -+ struct dw_dma_channel *chan; -+ unsigned long flags; -+ int i; -+ -+ spin_lock_irqsave(&dmac->lock, flags); -+ for (i = 0; i < DMAC_NR_CHANNELS; i++) -+ if (dmac->channel[i].state == CH_STATE_FREE) -+ break; -+ -+ if (i < DMAC_NR_CHANNELS) { -+ chan = &dmac->channel[i]; -+ chan->state = CH_STATE_ALLOCATED; -+ } else { -+ i = -EBUSY; -+ } -+ -+ spin_unlock_irqrestore(&dmac->lock, flags); -+ -+ return i; -+} -+ -+static void dmac_release_channel(struct dma_controller *_dmac, int channel) -+{ -+ struct dw_dma_controller *dmac = to_dw_dmac(_dmac); -+ -+ BUG_ON(channel >= DMAC_NR_CHANNELS -+ || dmac->channel[channel].state != CH_STATE_ALLOCATED); -+ -+ dmac->channel[channel].state = CH_STATE_FREE; -+} -+ -+static struct dw_dma_block *allocate_blocks(struct dw_dma_controller *dmac, -+ unsigned int nr_blocks) -+{ -+ struct dw_dma_block *block; -+ void *p; -+ unsigned int i; -+ -+ block = kmalloc(nr_blocks * sizeof(*block), -+ GFP_KERNEL); -+ if (unlikely(!block)) -+ return NULL; -+ -+ for (i = 0; i < nr_blocks; i++) { -+ p = dma_pool_alloc(dmac->lli_pool, GFP_KERNEL, -+ &block[i].lli_dma_addr); -+ block[i].lli_vaddr = p; -+ if (unlikely(!p)) -+ goto fail; -+ } -+ -+ return block; -+ -+fail: -+ for (i = 0; i < nr_blocks; i++) { -+ if (!block[i].lli_vaddr) -+ break; -+ dma_pool_free(dmac->lli_pool, block[i].lli_vaddr, -+ block[i].lli_dma_addr); -+ } -+ kfree(block); -+ return NULL; -+} -+ -+static void cleanup_channel(struct dw_dma_controller *dmac, -+ struct dw_dma_channel *chan) -+{ -+ unsigned int i; -+ -+ if (chan->nr_blocks > 1) { -+ for (i = 0; i < chan->nr_blocks; i++) -+ dma_pool_free(dmac->lli_pool, chan->block[i].lli_vaddr, -+ chan->block[i].lli_dma_addr); -+ kfree(chan->block); -+ } -+ -+ chan->state = CH_STATE_ALLOCATED; -+} -+ -+static int dmac_prepare_request_sg(struct dma_controller *_dmac, -+ struct dma_request_sg *req) -+{ -+ struct dw_dma_controller *dmac = to_dw_dmac(_dmac); -+ struct dw_dma_channel *chan; -+ unsigned long ctlhi, ctllo, cfghi, cfglo; -+ unsigned long block_size; -+ unsigned int nr_blocks; -+ int ret, i, direction; -+ unsigned long flags; -+ -+ spin_lock_irqsave(&dmac->lock, flags); -+ -+ ret = -EINVAL; -+ if (req->req.channel >= DMAC_NR_CHANNELS -+ || dmac->channel[req->req.channel].state != CH_STATE_ALLOCATED -+ || req->block_size > DMAC_MAX_BLOCKSIZE) { -+ spin_unlock_irqrestore(&dmac->lock, flags); -+ return -EINVAL; -+ } -+ -+ chan = &dmac->channel[req->req.channel]; -+ chan->state = CH_STATE_BUSY; -+ chan->req_sg = req; -+ chan->is_cyclic = 0; -+ -+ /* -+ * We have marked the channel as busy, so no need to keep the -+ * lock as long as we only touch the channel-specific -+ * registers -+ */ -+ spin_unlock_irqrestore(&dmac->lock, flags); -+ -+ /* -+ * There may be limitations in the driver and/or the DMA -+ * controller that prevents us from sending a whole -+ * scatterlist item in one go. Taking this into account, -+ * calculate the number of block transfers we need to set up. -+ * -+ * FIXME: Let the peripheral driver know about the maximum -+ * block size we support. We really don't want to use a -+ * different block size than what was suggested by the -+ * peripheral. -+ * -+ * Each block will get its own Linked List Item (LLI) below. -+ */ -+ block_size = req->block_size; -+ nr_blocks = req->nr_blocks; -+ pr_debug("block_size %lu, nr_blocks %u nr_sg = %u\n", -+ block_size, nr_blocks, req->nr_sg); -+ -+ BUG_ON(nr_blocks == 0); -+ chan->nr_blocks = nr_blocks; -+ -+ ret = -EINVAL; -+ cfglo = cfghi = 0; -+ switch (req->direction) { -+ case DMA_DIR_MEM_TO_PERIPH: -+ direction = DMA_TO_DEVICE; -+ cfghi = req->periph_id << (43 - 32); -+ break; -+ -+ case DMA_DIR_PERIPH_TO_MEM: -+ direction = DMA_FROM_DEVICE; -+ cfghi = req->periph_id << (39 - 32); -+ break; -+ default: -+ goto out_unclaim_channel; -+ } -+ -+ chan->direction = direction; -+ -+ dmac_chan_writel_hi(dmac, req->req.channel, CFG, cfghi); -+ dmac_chan_writel_lo(dmac, req->req.channel, CFG, cfglo); -+ -+ ctlhi = block_size >> req->width; -+ ctllo = ((req->direction << 20) -+ // | (1 << 14) | (1 << 11) // source/dest burst trans len -+ | (req->width << 4) | (req->width << 1) -+ | (1 << 0)); // interrupt enable -+ -+ if (nr_blocks == 1) { -+ /* Only one block: No need to use block chaining */ -+ if (direction == DMA_TO_DEVICE) { -+ dmac_chan_writel_lo(dmac, req->req.channel, SAR, -+ req->sg->dma_address); -+ dmac_chan_writel_lo(dmac, req->req.channel, DAR, -+ req->data_reg); -+ ctllo |= 2 << 7; // no dst increment -+ } else { -+ dmac_chan_writel_lo(dmac, req->req.channel, SAR, -+ req->data_reg); -+ dmac_chan_writel_lo(dmac, req->req.channel, DAR, -+ req->sg->dma_address); -+ ctllo |= 2 << 9; // no src increment -+ } -+ dmac_chan_writel_lo(dmac, req->req.channel, CTL, ctllo); -+ dmac_chan_writel_hi(dmac, req->req.channel, CTL, ctlhi); -+ pr_debug("ctl hi:lo 0x%lx:%lx\n", ctlhi, ctllo); -+ } else { -+ struct dw_dma_lli *lli, *lli_prev = NULL; -+ int j = 0, offset = 0; -+ -+ ret = -ENOMEM; -+ chan->block = allocate_blocks(dmac, nr_blocks); -+ if (!chan->block) -+ goto out_unclaim_channel; -+ -+ if (direction == DMA_TO_DEVICE) -+ ctllo |= 1 << 28 | 1 << 27 | 2 << 7; -+ else -+ ctllo |= 1 << 28 | 1 << 27 | 2 << 9; -+ -+ /* -+ * Map scatterlist items to blocks. One scatterlist -+ * item may need more than one block for the reasons -+ * mentioned above. -+ */ -+ for (i = 0; i < nr_blocks; i++) { -+ lli = chan->block[i].lli_vaddr; -+ if (lli_prev) { -+ lli_prev->llp = chan->block[i].lli_dma_addr; -+ pr_debug("lli[%d] (0x%p/0x%x): 0x%x 0x%x 0x%x 0x%x 0x%x\n", -+ i - 1, chan->block[i - 1].lli_vaddr, -+ chan->block[i - 1].lli_dma_addr, -+ lli_prev->sar, lli_prev->dar, lli_prev->llp, -+ lli_prev->ctllo, lli_prev->ctlhi); -+ } -+ lli->llp = 0; -+ lli->ctllo = ctllo; -+ lli->ctlhi = ctlhi; -+ if (direction == DMA_TO_DEVICE) { -+ lli->sar = req->sg[j].dma_address + offset; -+ lli->dar = req->data_reg; -+ } else { -+ lli->sar = req->data_reg; -+ lli->dar = req->sg[j].dma_address + offset; -+ } -+ lli_prev = lli; -+ -+ offset += block_size; -+ if (offset > req->sg[j].length) { -+ j++; -+ offset = 0; -+ } -+ } -+ -+ pr_debug("lli[%d] (0x%p/0x%x): 0x%x 0x%x 0x%x 0x%x 0x%x\n", -+ i - 1, chan->block[i - 1].lli_vaddr, -+ chan->block[i - 1].lli_dma_addr, lli_prev->sar, -+ lli_prev->dar, lli_prev->llp, -+ lli_prev->ctllo, lli_prev->ctlhi); -+ -+ /* -+ * SAR, DAR and CTL are initialized from the LLI. We -+ * only have to enable the LLI bits in CTL. -+ */ -+ dmac_chan_writel_hi(dmac, req->req.channel, CTL, 0); -+ dmac_chan_writel_lo(dmac, req->req.channel, LLP, -+ chan->block[0].lli_dma_addr); -+ dmac_chan_writel_lo(dmac, req->req.channel, CTL, 1 << 28 | 1 << 27); -+ } -+ -+ set_channel_bit(dmac, MASK_XFER, req->req.channel); -+ set_channel_bit(dmac, MASK_ERROR, req->req.channel); -+ if (req->req.block_complete) -+ set_channel_bit(dmac, MASK_BLOCK, req->req.channel); -+ else -+ clear_channel_bit(dmac, MASK_BLOCK, req->req.channel); -+ -+ return 0; -+ -+out_unclaim_channel: -+ chan->state = CH_STATE_ALLOCATED; -+ return ret; -+} -+ -+static int dmac_prepare_request_cyclic(struct dma_controller *_dmac, -+ struct dma_request_cyclic *req) -+{ -+ struct dw_dma_controller *dmac = to_dw_dmac(_dmac); -+ struct dw_dma_channel *chan; -+ unsigned long ctlhi, ctllo, cfghi, cfglo; -+ unsigned long block_size; -+ int ret, i, direction; -+ unsigned long flags; -+ -+ spin_lock_irqsave(&dmac->lock, flags); -+ -+ block_size = (req->buffer_size/req->periods) >> req->width; -+ -+ ret = -EINVAL; -+ if (req->req.channel >= DMAC_NR_CHANNELS -+ || dmac->channel[req->req.channel].state != CH_STATE_ALLOCATED -+ || (req->periods == 0) -+ || block_size > DMAC_MAX_BLOCKSIZE) { -+ spin_unlock_irqrestore(&dmac->lock, flags); -+ return -EINVAL; -+ } -+ -+ chan = &dmac->channel[req->req.channel]; -+ chan->state = CH_STATE_BUSY; -+ chan->is_cyclic = 1; -+ chan->req_cyclic = req; -+ -+ /* -+ * We have marked the channel as busy, so no need to keep the -+ * lock as long as we only touch the channel-specific -+ * registers -+ */ -+ spin_unlock_irqrestore(&dmac->lock, flags); -+ -+ /* -+ Setup -+ */ -+ BUG_ON(req->buffer_size % req->periods); -+ /* printk(KERN_INFO "block_size = %lu, periods = %u\n", block_size, req->periods); */ -+ -+ chan->nr_blocks = req->periods; -+ -+ ret = -EINVAL; -+ cfglo = cfghi = 0; -+ switch (req->direction) { -+ case DMA_DIR_MEM_TO_PERIPH: -+ direction = DMA_TO_DEVICE; -+ cfghi = req->periph_id << (43 - 32); -+ break; -+ -+ case DMA_DIR_PERIPH_TO_MEM: -+ direction = DMA_FROM_DEVICE; -+ cfghi = req->periph_id << (39 - 32); -+ break; -+ default: -+ goto out_unclaim_channel; -+ } -+ -+ chan->direction = direction; -+ -+ dmac_chan_writel_hi(dmac, req->req.channel, CFG, cfghi); -+ dmac_chan_writel_lo(dmac, req->req.channel, CFG, cfglo); -+ -+ ctlhi = block_size; -+ ctllo = ((req->direction << 20) -+ | (req->width << 4) | (req->width << 1) -+ | (1 << 0)); // interrupt enable -+ -+ { -+ struct dw_dma_lli *lli = NULL, *lli_prev = NULL; -+ -+ ret = -ENOMEM; -+ chan->block = allocate_blocks(dmac, req->periods); -+ if (!chan->block) -+ goto out_unclaim_channel; -+ -+ if (direction == DMA_TO_DEVICE) -+ ctllo |= 1 << 28 | 1 << 27 | 2 << 7; -+ else -+ ctllo |= 1 << 28 | 1 << 27 | 2 << 9; -+ -+ /* -+ * Set up a linked list items where each period gets -+ * an item. The linked list item for the last period -+ * points back to the star of the buffer making a -+ * cyclic buffer. -+ */ -+ for (i = 0; i < req->periods; i++) { -+ lli = chan->block[i].lli_vaddr; -+ if (lli_prev) { -+ lli_prev->llp = chan->block[i].lli_dma_addr; -+ /* printk(KERN_INFO "lli[%d] (0x%p/0x%x): 0x%x 0x%x 0x%x 0x%x 0x%x\n", -+ i - 1, chan->block[i - 1].lli_vaddr, -+ chan->block[i - 1].lli_dma_addr, -+ lli_prev->sar, lli_prev->dar, lli_prev->llp, -+ lli_prev->ctllo, lli_prev->ctlhi);*/ -+ } -+ lli->llp = 0; -+ lli->ctllo = ctllo; -+ lli->ctlhi = ctlhi; -+ if (direction == DMA_TO_DEVICE) { -+ lli->sar = req->buffer_start + i*(block_size << req->width); -+ lli->dar = req->data_reg; -+ } else { -+ lli->sar = req->data_reg; -+ lli->dar = req->buffer_start + i*(block_size << req->width); -+ } -+ lli_prev = lli; -+ } -+ lli->llp = chan->block[0].lli_dma_addr; -+ -+ /*printk(KERN_INFO "lli[%d] (0x%p/0x%x): 0x%x 0x%x 0x%x 0x%x 0x%x\n", -+ i - 1, chan->block[i - 1].lli_vaddr, -+ chan->block[i - 1].lli_dma_addr, lli_prev->sar, -+ lli_prev->dar, lli_prev->llp, -+ lli_prev->ctllo, lli_prev->ctlhi); */ -+ -+ /* -+ * SAR, DAR and CTL are initialized from the LLI. We -+ * only have to enable the LLI bits in CTL. -+ */ -+ dmac_chan_writel_lo(dmac, req->req.channel, LLP, -+ chan->block[0].lli_dma_addr); -+ dmac_chan_writel_lo(dmac, req->req.channel, CTL, 1 << 28 | 1 << 27); -+ } -+ -+ clear_channel_bit(dmac, MASK_XFER, req->req.channel); -+ set_channel_bit(dmac, MASK_ERROR, req->req.channel); -+ if (req->req.block_complete) -+ set_channel_bit(dmac, MASK_BLOCK, req->req.channel); -+ else -+ clear_channel_bit(dmac, MASK_BLOCK, req->req.channel); -+ -+ return 0; -+ -+out_unclaim_channel: -+ chan->state = CH_STATE_ALLOCATED; -+ return ret; -+} -+ -+static int dmac_start_request(struct dma_controller *_dmac, -+ unsigned int channel) -+{ -+ struct dw_dma_controller *dmac = to_dw_dmac(_dmac); -+ -+ BUG_ON(channel >= DMAC_NR_CHANNELS); -+ -+ set_channel_bit(dmac, CH_EN, channel); -+ -+ return 0; -+} -+ -+static dma_addr_t dmac_get_current_pos(struct dma_controller *_dmac, -+ unsigned int channel) -+{ -+ struct dw_dma_controller *dmac = to_dw_dmac(_dmac); -+ struct dw_dma_channel *chan; -+ dma_addr_t current_pos; -+ -+ BUG_ON(channel >= DMAC_NR_CHANNELS); -+ -+ chan = &dmac->channel[channel]; -+ -+ switch (chan->direction) { -+ case DMA_TO_DEVICE: -+ current_pos = dmac_chan_readl_lo(dmac, channel, SAR); -+ break; -+ case DMA_FROM_DEVICE: -+ current_pos = dmac_chan_readl_lo(dmac, channel, DAR); -+ break; -+ default: -+ return 0; -+ } -+ -+ -+ if (!current_pos) { -+ if (chan->is_cyclic) { -+ current_pos = chan->req_cyclic->buffer_start; -+ } else { -+ current_pos = chan->req_sg->sg->dma_address; -+ } -+ } -+ -+ return current_pos; -+} -+ -+ -+static int dmac_stop_request(struct dma_controller *_dmac, -+ unsigned int channel) -+{ -+ struct dw_dma_controller *dmac = to_dw_dmac(_dmac); -+ struct dw_dma_channel *chan; -+ -+ BUG_ON(channel >= DMAC_NR_CHANNELS); -+ -+ chan = &dmac->channel[channel]; -+ pr_debug("stop: st%u s%08x d%08x l%08x ctl0x%08x:0x%08x\n", -+ chan->state, dmac_chan_readl_lo(dmac, channel, SAR), -+ dmac_chan_readl_lo(dmac, channel, DAR), -+ dmac_chan_readl_lo(dmac, channel, LLP), -+ dmac_chan_readl_hi(dmac, channel, CTL), -+ dmac_chan_readl_lo(dmac, channel, CTL)); -+ -+ if (chan->state == CH_STATE_BUSY) { -+ clear_channel_bit(dmac, CH_EN, channel); -+ cleanup_channel(dmac, &dmac->channel[channel]); -+ } -+ -+ return 0; -+} -+ -+ -+static void dmac_block_complete(struct dw_dma_controller *dmac) -+{ -+ struct dw_dma_channel *chan; -+ unsigned long status, chanid; -+ -+ status = dmac_readl_lo(dmac, STATUS_BLOCK); -+ -+ while (status) { -+ struct dma_request *req; -+ chanid = __ffs(status); -+ chan = &dmac->channel[chanid]; -+ -+ if (chan->is_cyclic) { -+ BUG_ON(!chan->req_cyclic -+ || !chan->req_cyclic->req.block_complete); -+ req = &chan->req_cyclic->req; -+ } else { -+ BUG_ON(!chan->req_sg || !chan->req_sg->req.block_complete); -+ req = &chan->req_sg->req; -+ } -+ dmac_writel_lo(dmac, CLEAR_BLOCK, 1 << chanid); -+ req->block_complete(req); -+ status = dmac_readl_lo(dmac, STATUS_BLOCK); -+ } -+} -+ -+static void dmac_xfer_complete(struct dw_dma_controller *dmac) -+{ -+ struct dw_dma_channel *chan; -+ struct dma_request *req; -+ unsigned long status, chanid; -+ -+ status = dmac_readl_lo(dmac, STATUS_XFER); -+ -+ while (status) { -+ chanid = __ffs(status); -+ chan = &dmac->channel[chanid]; -+ -+ dmac_writel_lo(dmac, CLEAR_XFER, 1 << chanid); -+ -+ req = &chan->req_sg->req; -+ BUG_ON(!req); -+ cleanup_channel(dmac, chan); -+ if (req->xfer_complete) -+ req->xfer_complete(req); -+ -+ status = dmac_readl_lo(dmac, STATUS_XFER); -+ } -+} -+ -+static void dmac_error(struct dw_dma_controller *dmac) -+{ -+ struct dw_dma_channel *chan; -+ unsigned long status, chanid; -+ -+ status = dmac_readl_lo(dmac, STATUS_ERROR); -+ -+ while (status) { -+ struct dma_request *req; -+ -+ chanid = __ffs(status); -+ chan = &dmac->channel[chanid]; -+ -+ dmac_writel_lo(dmac, CLEAR_ERROR, 1 << chanid); -+ clear_channel_bit(dmac, CH_EN, chanid); -+ -+ if (chan->is_cyclic) { -+ BUG_ON(!chan->req_cyclic); -+ req = &chan->req_cyclic->req; -+ } else { -+ BUG_ON(!chan->req_sg); -+ req = &chan->req_sg->req; -+ } -+ -+ cleanup_channel(dmac, chan); -+ if (req->error) -+ req->error(req); -+ -+ status = dmac_readl_lo(dmac, STATUS_XFER); -+ } -+} -+ -+static irqreturn_t dmac_interrupt(int irq, void *dev_id) -+{ -+ struct dw_dma_controller *dmac = dev_id; -+ unsigned long status; -+ int ret = IRQ_NONE; -+ -+ spin_lock(&dmac->lock); -+ -+ status = dmac_readl_lo(dmac, STATUS_INT); -+ -+ while (status) { -+ ret = IRQ_HANDLED; -+ if (status & 0x10) -+ dmac_error(dmac); -+ if (status & 0x02) -+ dmac_block_complete(dmac); -+ if (status & 0x01) -+ dmac_xfer_complete(dmac); -+ -+ status = dmac_readl_lo(dmac, STATUS_INT); -+ } -+ -+ spin_unlock(&dmac->lock); -+ return ret; -+} -+ -+static int __devinit dmac_probe(struct platform_device *pdev) -+{ -+ struct dw_dma_controller *dmac; -+ struct resource *regs; -+ int ret; -+ -+ regs = platform_get_resource(pdev, IORESOURCE_MEM, 0); -+ if (!regs) -+ return -ENXIO; -+ -+ dmac = kmalloc(sizeof(*dmac), GFP_KERNEL); -+ if (!dmac) -+ return -ENOMEM; -+ memset(dmac, 0, sizeof(*dmac)); -+ -+ dmac->hclk = clk_get(&pdev->dev, "hclk"); -+ if (IS_ERR(dmac->hclk)) { -+ ret = PTR_ERR(dmac->hclk); -+ goto out_free_dmac; -+ } -+ clk_enable(dmac->hclk); -+ -+ ret = -ENOMEM; -+ dmac->lli_pool = dma_pool_create("dmac", &pdev->dev, -+ sizeof(struct dw_dma_lli), 4, 0); -+ if (!dmac->lli_pool) -+ goto out_disable_clk; -+ -+ spin_lock_init(&dmac->lock); -+ dmac->dma.dev = &pdev->dev; -+ dmac->dma.alloc_channel = dmac_alloc_channel; -+ dmac->dma.release_channel = dmac_release_channel; -+ dmac->dma.prepare_request_sg = dmac_prepare_request_sg; -+ dmac->dma.prepare_request_cyclic = dmac_prepare_request_cyclic; -+ dmac->dma.start_request = dmac_start_request; -+ dmac->dma.stop_request = dmac_stop_request; -+ dmac->dma.get_current_pos = dmac_get_current_pos; -+ -+ dmac->regs = ioremap(regs->start, regs->end - regs->start + 1); -+ if (!dmac->regs) -+ goto out_free_pool; -+ -+ ret = request_irq(platform_get_irq(pdev, 0), dmac_interrupt, -+ IRQF_SAMPLE_RANDOM, pdev->name, dmac); -+ if (ret) -+ goto out_unmap_regs; -+ -+ /* Enable the DMA controller */ -+ dmac_writel_lo(dmac, CFG, 1); -+ -+ register_dma_controller(&dmac->dma); -+ -+ printk(KERN_INFO -+ "dmac%d: DesignWare DMA controller at 0x%p irq %d\n", -+ dmac->dma.id, dmac->regs, platform_get_irq(pdev, 0)); -+ -+ return 0; -+ -+out_unmap_regs: -+ iounmap(dmac->regs); -+out_free_pool: -+ dma_pool_destroy(dmac->lli_pool); -+out_disable_clk: -+ clk_disable(dmac->hclk); -+ clk_put(dmac->hclk); -+out_free_dmac: -+ kfree(dmac); -+ return ret; -+} -+ -+static struct platform_driver dmac_driver = { -+ .probe = dmac_probe, -+ .driver = { -+ .name = "dmaca", -+ }, -+}; -+ -+static int __init dmac_init(void) -+{ -+ return platform_driver_register(&dmac_driver); -+} -+subsys_initcall(dmac_init); -+ -+static void __exit dmac_exit(void) -+{ -+ platform_driver_unregister(&dmac_driver); -+} -+module_exit(dmac_exit); -+ -+MODULE_DESCRIPTION("Synopsys DesignWare DMA Controller driver"); -+MODULE_AUTHOR("Haavard Skinnemoen <hskinnemoen@atmel.com>"); -+MODULE_LICENSE("GPL"); -diff --git a/arch/avr32/drivers/dw-dmac.h b/arch/avr32/drivers/dw-dmac.h -new file mode 100644 -index 0000000..1f67921 ---- /dev/null -+++ b/arch/avr32/drivers/dw-dmac.h -@@ -0,0 +1,42 @@ -+/* -+ * Driver for the Synopsys DesignWare DMA Controller -+ * -+ * Copyright (C) 2005-2006 Atmel Corporation -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 as -+ * published by the Free Software Foundation. -+ */ -+#ifndef __AVR32_DW_DMAC_H__ -+#define __AVR32_DW_DMAC_H__ -+ -+#define DW_DMAC_CFG 0x398 -+#define DW_DMAC_CH_EN 0x3a0 -+ -+#define DW_DMAC_STATUS_XFER 0x2e8 -+#define DW_DMAC_STATUS_BLOCK 0x2f0 -+#define DW_DMAC_STATUS_ERROR 0x308 -+ -+#define DW_DMAC_MASK_XFER 0x310 -+#define DW_DMAC_MASK_BLOCK 0x318 -+#define DW_DMAC_MASK_ERROR 0x330 -+ -+#define DW_DMAC_CLEAR_XFER 0x338 -+#define DW_DMAC_CLEAR_BLOCK 0x340 -+#define DW_DMAC_CLEAR_ERROR 0x358 -+ -+#define DW_DMAC_STATUS_INT 0x360 -+ -+#define DW_DMAC_CHAN_SAR 0x000 -+#define DW_DMAC_CHAN_DAR 0x008 -+#define DW_DMAC_CHAN_LLP 0x010 -+#define DW_DMAC_CHAN_CTL 0x018 -+#define DW_DMAC_CHAN_SSTAT 0x020 -+#define DW_DMAC_CHAN_DSTAT 0x028 -+#define DW_DMAC_CHAN_SSTATAR 0x030 -+#define DW_DMAC_CHAN_DSTATAR 0x038 -+#define DW_DMAC_CHAN_CFG 0x040 -+#define DW_DMAC_CHAN_SGR 0x048 -+#define DW_DMAC_CHAN_DSR 0x050 -+ -+#endif /* __AVR32_DW_DMAC_H__ */ -diff --git a/arch/avr32/kernel/Makefile b/arch/avr32/kernel/Makefile -index 90e5aff..b6afc0c 100644 ---- a/arch/avr32/kernel/Makefile -+++ b/arch/avr32/kernel/Makefile -@@ -9,6 +9,7 @@ obj-y += syscall_table.o syscall-stubs.o irq.o - obj-y += setup.o traps.o semaphore.o ptrace.o - obj-y += signal.o sys_avr32.o process.o time.o - obj-y += init_task.o switch_to.o cpu.o -+obj-y += dma-controller.o - obj-$(CONFIG_MODULES) += module.o avr32_ksyms.o - obj-$(CONFIG_KPROBES) += kprobes.o - -diff --git a/arch/avr32/kernel/dma-controller.c b/arch/avr32/kernel/dma-controller.c -new file mode 100644 -index 0000000..fb654b3 ---- /dev/null -+++ b/arch/avr32/kernel/dma-controller.c -@@ -0,0 +1,34 @@ -+/* -+ * Preliminary DMA controller framework for AVR32 -+ * -+ * Copyright (C) 2005-2006 Atmel Corporation -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 as -+ * published by the Free Software Foundation. -+ */ -+#include <asm/dma-controller.h> -+ -+static LIST_HEAD(controllers); -+ -+int register_dma_controller(struct dma_controller *dmac) -+{ -+ static int next_id; -+ -+ dmac->id = next_id++; -+ list_add_tail(&dmac->list, &controllers); -+ -+ return 0; -+} -+EXPORT_SYMBOL(register_dma_controller); -+ -+struct dma_controller *find_dma_controller(int id) -+{ -+ struct dma_controller *dmac; -+ -+ list_for_each_entry(dmac, &controllers, list) -+ if (dmac->id == id) -+ return dmac; -+ return NULL; -+} -+EXPORT_SYMBOL(find_dma_controller); -diff --git a/arch/avr32/kernel/setup.c b/arch/avr32/kernel/setup.c -index b279d66..4b4c188 100644 ---- a/arch/avr32/kernel/setup.c -+++ b/arch/avr32/kernel/setup.c -@@ -248,7 +248,7 @@ static int __init early_parse_fbmem(char *p) - - fbmem_size = memparse(p, &p); - if (*p == '@') { -- fbmem_start = memparse(p, &p); -+ fbmem_start = memparse(p + 1, &p); - ret = add_reserved_region(fbmem_start, - fbmem_start + fbmem_size - 1, - "Framebuffer"); -@@ -313,7 +313,7 @@ __tagtable(ATAG_MEM, parse_tag_mem); - - static int __init parse_tag_rdimg(struct tag *tag) - { --#ifdef CONFIG_INITRD -+#ifdef CONFIG_BLK_DEV_INITRD - struct tag_mem_range *mem = &tag->u.mem_range; - int ret; - -@@ -323,7 +323,7 @@ static int __init parse_tag_rdimg(struct tag *tag) - return 0; - } - -- ret = add_reserved_region(mem->start, mem->start + mem->size - 1, -+ ret = add_reserved_region(mem->addr, mem->addr + mem->size - 1, - "initrd"); - if (ret) { - printk(KERN_WARNING -diff --git a/arch/avr32/mach-at32ap/Kconfig b/arch/avr32/mach-at32ap/Kconfig -index eb30783..43c5b9f 100644 ---- a/arch/avr32/mach-at32ap/Kconfig -+++ b/arch/avr32/mach-at32ap/Kconfig -@@ -26,6 +26,13 @@ config AP7000_8_BIT_SMC - - endchoice - -+config GPIO_DEV -+ bool "GPIO /dev interface" -+ select CONFIGFS_FS -+ default n -+ help -+ Say `Y' to enable a /dev interface to the GPIO pins. -+ - endmenu - - endif # PLATFORM_AT32AP -diff --git a/arch/avr32/mach-at32ap/Makefile b/arch/avr32/mach-at32ap/Makefile -index f1d3957..250372a 100644 ---- a/arch/avr32/mach-at32ap/Makefile -+++ b/arch/avr32/mach-at32ap/Makefile -@@ -1,3 +1,5 @@ - obj-y += at32ap.o clock.o intc.o extint.o pio.o hsmc.o - obj-$(CONFIG_CPU_AT32AP7000) += at32ap7000.o - obj-$(CONFIG_CPU_AT32AP7000) += time-tc.o -+obj-$(CONFIG_CPU_FREQ_AT32AP) += cpufreq.o -+obj-$(CONFIG_GPIO_DEV) += gpio-dev.o -diff --git a/arch/avr32/mach-at32ap/at32ap.c b/arch/avr32/mach-at32ap/at32ap.c -index 90f207e..7c4987f 100644 ---- a/arch/avr32/mach-at32ap/at32ap.c -+++ b/arch/avr32/mach-at32ap/at32ap.c -@@ -11,41 +11,10 @@ - #include <linux/init.h> - #include <linux/platform_device.h> - --#include <asm/io.h> -- - #include <asm/arch/init.h> --#include <asm/arch/sm.h> -- --struct at32_sm system_manager; -- --static int __init at32_sm_init(void) --{ -- struct resource *regs; -- struct at32_sm *sm = &system_manager; -- int ret = -ENXIO; -- -- regs = platform_get_resource(&at32_sm_device, IORESOURCE_MEM, 0); -- if (!regs) -- goto fail; -- -- spin_lock_init(&sm->lock); -- sm->pdev = &at32_sm_device; -- -- ret = -ENOMEM; -- sm->regs = ioremap(regs->start, regs->end - regs->start + 1); -- if (!sm->regs) -- goto fail; -- -- return 0; -- --fail: -- printk(KERN_ERR "Failed to initialize System Manager: %d\n", ret); -- return ret; --} - - void __init setup_platform(void) - { -- at32_sm_init(); - at32_clock_init(); - at32_portmux_init(); - } -diff --git a/arch/avr32/mach-at32ap/at32ap7000.c b/arch/avr32/mach-at32ap/at32ap7000.c -index 4dda42d..59555d8 100644 ---- a/arch/avr32/mach-at32ap/at32ap7000.c -+++ b/arch/avr32/mach-at32ap/at32ap7000.c -@@ -17,14 +17,14 @@ - #include <asm/arch/at32ap7000.h> - #include <asm/arch/board.h> - #include <asm/arch/portmux.h> --#include <asm/arch/sm.h> - - #include <video/atmel_lcdc.h> - - #include "clock.h" - #include "hmatrix.h" - #include "pio.h" --#include "sm.h" -+#include "pm.h" -+ - - #define PBMEM(base) \ - { \ -@@ -88,6 +88,8 @@ static struct clk devname##_##_name = { \ - .index = _index, \ - } - -+static DEFINE_SPINLOCK(pm_lock); -+ - unsigned long at32ap7000_osc_rates[3] = { - [0] = 32768, - /* FIXME: these are ATSTK1002-specific */ -@@ -104,11 +106,11 @@ static unsigned long pll_get_rate(struct clk *clk, unsigned long control) - { - unsigned long div, mul, rate; - -- if (!(control & SM_BIT(PLLEN))) -+ if (!(control & PM_BIT(PLLEN))) - return 0; - -- div = SM_BFEXT(PLLDIV, control) + 1; -- mul = SM_BFEXT(PLLMUL, control) + 1; -+ div = PM_BFEXT(PLLDIV, control) + 1; -+ mul = PM_BFEXT(PLLMUL, control) + 1; - - rate = clk->parent->get_rate(clk->parent); - rate = (rate + div / 2) / div; -@@ -121,7 +123,7 @@ static unsigned long pll0_get_rate(struct clk *clk) - { - u32 control; - -- control = sm_readl(&system_manager, PM_PLL0); -+ control = pm_readl(PLL0); - - return pll_get_rate(clk, control); - } -@@ -130,7 +132,7 @@ static unsigned long pll1_get_rate(struct clk *clk) - { - u32 control; - -- control = sm_readl(&system_manager, PM_PLL1); -+ control = pm_readl(PLL1); - - return pll_get_rate(clk, control); - } -@@ -187,108 +189,139 @@ static unsigned long bus_clk_get_rate(struct clk *clk, unsigned int shift) - - static void cpu_clk_mode(struct clk *clk, int enabled) - { -- struct at32_sm *sm = &system_manager; - unsigned long flags; - u32 mask; - -- spin_lock_irqsave(&sm->lock, flags); -- mask = sm_readl(sm, PM_CPU_MASK); -+ spin_lock_irqsave(&pm_lock, flags); -+ mask = pm_readl(CPU_MASK); - if (enabled) - mask |= 1 << clk->index; - else - mask &= ~(1 << clk->index); -- sm_writel(sm, PM_CPU_MASK, mask); -- spin_unlock_irqrestore(&sm->lock, flags); -+ pm_writel(CPU_MASK, mask); -+ spin_unlock_irqrestore(&pm_lock, flags); - } - - static unsigned long cpu_clk_get_rate(struct clk *clk) - { - unsigned long cksel, shift = 0; - -- cksel = sm_readl(&system_manager, PM_CKSEL); -- if (cksel & SM_BIT(CPUDIV)) -- shift = SM_BFEXT(CPUSEL, cksel) + 1; -+ cksel = pm_readl(CKSEL); -+ if (cksel & PM_BIT(CPUDIV)) -+ shift = PM_BFEXT(CPUSEL, cksel) + 1; - - return bus_clk_get_rate(clk, shift); - } - -+static long cpu_clk_set_rate(struct clk *clk, unsigned long rate, int apply) -+{ -+ u32 control; -+ unsigned long parent_rate, child_div, actual_rate, div; -+ -+ parent_rate = clk->parent->get_rate(clk->parent); -+ control = pm_readl(CKSEL); -+ -+ if (control & PM_BIT(HSBDIV)) -+ child_div = 1 << (PM_BFEXT(HSBSEL, control) + 1); -+ else -+ child_div = 1; -+ -+ if (rate > 3 * (parent_rate / 4) || child_div == 1) { -+ actual_rate = parent_rate; -+ control &= ~PM_BIT(CPUDIV); -+ } else { -+ unsigned int cpusel; -+ div = (parent_rate + rate / 2) / rate; -+ if (div > child_div) -+ div = child_div; -+ cpusel = (div > 1) ? (fls(div) - 2) : 0; -+ control = PM_BIT(CPUDIV) | PM_BFINS(CPUSEL, cpusel, control); -+ actual_rate = parent_rate / (1 << (cpusel + 1)); -+ } -+ -+ pr_debug("clk %s: new rate %lu (actual rate %lu)\n", -+ clk->name, rate, actual_rate); -+ -+ if (apply) -+ pm_writel(CKSEL, control); -+ -+ return actual_rate; -+} -+ - static void hsb_clk_mode(struct clk *clk, int enabled) - { -- struct at32_sm *sm = &system_manager; - unsigned long flags; - u32 mask; - -- spin_lock_irqsave(&sm->lock, flags); -- mask = sm_readl(sm, PM_HSB_MASK); -+ spin_lock_irqsave(&pm_lock, flags); -+ mask = pm_readl(HSB_MASK); - if (enabled) - mask |= 1 << clk->index; - else - mask &= ~(1 << clk->index); -- sm_writel(sm, PM_HSB_MASK, mask); -- spin_unlock_irqrestore(&sm->lock, flags); -+ pm_writel(HSB_MASK, mask); -+ spin_unlock_irqrestore(&pm_lock, flags); - } - - static unsigned long hsb_clk_get_rate(struct clk *clk) - { - unsigned long cksel, shift = 0; - -- cksel = sm_readl(&system_manager, PM_CKSEL); -- if (cksel & SM_BIT(HSBDIV)) -- shift = SM_BFEXT(HSBSEL, cksel) + 1; -+ cksel = pm_readl(CKSEL); -+ if (cksel & PM_BIT(HSBDIV)) -+ shift = PM_BFEXT(HSBSEL, cksel) + 1; - - return bus_clk_get_rate(clk, shift); - } - - static void pba_clk_mode(struct clk *clk, int enabled) - { -- struct at32_sm *sm = &system_manager; - unsigned long flags; - u32 mask; - -- spin_lock_irqsave(&sm->lock, flags); -- mask = sm_readl(sm, PM_PBA_MASK); -+ spin_lock_irqsave(&pm_lock, flags); -+ mask = pm_readl(PBA_MASK); - if (enabled) - mask |= 1 << clk->index; - else - mask &= ~(1 << clk->index); -- sm_writel(sm, PM_PBA_MASK, mask); -- spin_unlock_irqrestore(&sm->lock, flags); -+ pm_writel(PBA_MASK, mask); -+ spin_unlock_irqrestore(&pm_lock, flags); - } - - static unsigned long pba_clk_get_rate(struct clk *clk) - { - unsigned long cksel, shift = 0; - -- cksel = sm_readl(&system_manager, PM_CKSEL); -- if (cksel & SM_BIT(PBADIV)) -- shift = SM_BFEXT(PBASEL, cksel) + 1; -+ cksel = pm_readl(CKSEL); -+ if (cksel & PM_BIT(PBADIV)) -+ shift = PM_BFEXT(PBASEL, cksel) + 1; - - return bus_clk_get_rate(clk, shift); - } - - static void pbb_clk_mode(struct clk *clk, int enabled) - { -- struct at32_sm *sm = &system_manager; - unsigned long flags; - u32 mask; - -- spin_lock_irqsave(&sm->lock, flags); -- mask = sm_readl(sm, PM_PBB_MASK); -+ spin_lock_irqsave(&pm_lock, flags); -+ mask = pm_readl(PBB_MASK); - if (enabled) - mask |= 1 << clk->index; - else - mask &= ~(1 << clk->index); -- sm_writel(sm, PM_PBB_MASK, mask); -- spin_unlock_irqrestore(&sm->lock, flags); -+ pm_writel(PBB_MASK, mask); -+ spin_unlock_irqrestore(&pm_lock, flags); - } - - static unsigned long pbb_clk_get_rate(struct clk *clk) - { - unsigned long cksel, shift = 0; - -- cksel = sm_readl(&system_manager, PM_CKSEL); -- if (cksel & SM_BIT(PBBDIV)) -- shift = SM_BFEXT(PBBSEL, cksel) + 1; -+ cksel = pm_readl(CKSEL); -+ if (cksel & PM_BIT(PBBDIV)) -+ shift = PM_BFEXT(PBBSEL, cksel) + 1; - - return bus_clk_get_rate(clk, shift); - } -@@ -296,6 +329,7 @@ static unsigned long pbb_clk_get_rate(struct clk *clk) - static struct clk cpu_clk = { - .name = "cpu", - .get_rate = cpu_clk_get_rate, -+ .set_rate = cpu_clk_set_rate, - .users = 1, - }; - static struct clk hsb_clk = { -@@ -327,12 +361,12 @@ static void genclk_mode(struct clk *clk, int enabled) - { - u32 control; - -- control = sm_readl(&system_manager, PM_GCCTRL + 4 * clk->index); -+ control = pm_readl(GCCTRL(clk->index)); - if (enabled) -- control |= SM_BIT(CEN); -+ control |= PM_BIT(CEN); - else -- control &= ~SM_BIT(CEN); -- sm_writel(&system_manager, PM_GCCTRL + 4 * clk->index, control); -+ control &= ~PM_BIT(CEN); -+ pm_writel(GCCTRL(clk->index), control); - } - - static unsigned long genclk_get_rate(struct clk *clk) -@@ -340,9 +374,9 @@ static unsigned long genclk_get_rate(struct clk *clk) - u32 control; - unsigned long div = 1; - -- control = sm_readl(&system_manager, PM_GCCTRL + 4 * clk->index); -- if (control & SM_BIT(DIVEN)) -- div = 2 * (SM_BFEXT(DIV, control) + 1); -+ control = pm_readl(GCCTRL(clk->index)); -+ if (control & PM_BIT(DIVEN)) -+ div = 2 * (PM_BFEXT(DIV, control) + 1); - - return clk->parent->get_rate(clk->parent) / div; - } -@@ -353,23 +387,22 @@ static long genclk_set_rate(struct clk *clk, unsigned long rate, int apply) - unsigned long parent_rate, actual_rate, div; - - parent_rate = clk->parent->get_rate(clk->parent); -- control = sm_readl(&system_manager, PM_GCCTRL + 4 * clk->index); -+ control = pm_readl(GCCTRL(clk->index)); - - if (rate > 3 * parent_rate / 4) { - actual_rate = parent_rate; -- control &= ~SM_BIT(DIVEN); -+ control &= ~PM_BIT(DIVEN); - } else { - div = (parent_rate + rate) / (2 * rate) - 1; -- control = SM_BFINS(DIV, div, control) | SM_BIT(DIVEN); -+ control = PM_BFINS(DIV, div, control) | PM_BIT(DIVEN); - actual_rate = parent_rate / (2 * (div + 1)); - } - -- printk("clk %s: new rate %lu (actual rate %lu)\n", -- clk->name, rate, actual_rate); -+ dev_dbg(clk->dev, "clk %s: new rate %lu (actual rate %lu)\n", -+ clk->name, rate, actual_rate); - - if (apply) -- sm_writel(&system_manager, PM_GCCTRL + 4 * clk->index, -- control); -+ pm_writel(GCCTRL(clk->index), control); - - return actual_rate; - } -@@ -378,24 +411,24 @@ int genclk_set_parent(struct clk *clk, struct clk *parent) - { - u32 control; - -- printk("clk %s: new parent %s (was %s)\n", -- clk->name, parent->name, clk->parent->name); -+ dev_dbg(clk->dev, "clk %s: new parent %s (was %s)\n", -+ clk->name, parent->name, clk->parent->name); - -- control = sm_readl(&system_manager, PM_GCCTRL + 4 * clk->index); -+ control = pm_readl(GCCTRL(clk->index)); - - if (parent == &osc1 || parent == &pll1) -- control |= SM_BIT(OSCSEL); -+ control |= PM_BIT(OSCSEL); - else if (parent == &osc0 || parent == &pll0) -- control &= ~SM_BIT(OSCSEL); -+ control &= ~PM_BIT(OSCSEL); - else - return -EINVAL; - - if (parent == &pll0 || parent == &pll1) -- control |= SM_BIT(PLLSEL); -+ control |= PM_BIT(PLLSEL); - else -- control &= ~SM_BIT(PLLSEL); -+ control &= ~PM_BIT(PLLSEL); - -- sm_writel(&system_manager, PM_GCCTRL + 4 * clk->index, control); -+ pm_writel(GCCTRL(clk->index), control); - clk->parent = parent; - - return 0; -@@ -408,11 +441,11 @@ static void __init genclk_init_parent(struct clk *clk) - - BUG_ON(clk->index > 7); - -- control = sm_readl(&system_manager, PM_GCCTRL + 4 * clk->index); -- if (control & SM_BIT(OSCSEL)) -- parent = (control & SM_BIT(PLLSEL)) ? &pll1 : &osc1; -+ control = pm_readl(GCCTRL(clk->index)); -+ if (control & PM_BIT(OSCSEL)) -+ parent = (control & PM_BIT(PLLSEL)) ? &pll1 : &osc1; - else -- parent = (control & SM_BIT(PLLSEL)) ? &pll0 : &osc0; -+ parent = (control & PM_BIT(PLLSEL)) ? &pll0 : &osc0; - - clk->parent = parent; - } -@@ -420,21 +453,53 @@ static void __init genclk_init_parent(struct clk *clk) - /* -------------------------------------------------------------------- - * System peripherals - * -------------------------------------------------------------------- */ --static struct resource sm_resource[] = { -- PBMEM(0xfff00000), -- NAMED_IRQ(19, "eim"), -- NAMED_IRQ(20, "pm"), -- NAMED_IRQ(21, "rtc"), --}; --struct platform_device at32_sm_device = { -- .name = "sm", -- .id = 0, -- .resource = sm_resource, -- .num_resources = ARRAY_SIZE(sm_resource), -+static struct resource at32_pm0_resource[] = { -+ { -+ .start = 0xfff00000, -+ .end = 0xfff0007f, -+ .flags = IORESOURCE_MEM, -+ }, -+ IRQ(20), -+}; -+ -+static struct resource at32ap700x_rtc0_resource[] = { -+ { -+ .start = 0xfff00080, -+ .end = 0xfff000af, -+ .flags = IORESOURCE_MEM, -+ }, -+ IRQ(21), -+}; -+ -+static struct resource at32_wdt0_resource[] = { -+ { -+ .start = 0xfff000b0, -+ .end = 0xfff000bf, -+ .flags = IORESOURCE_MEM, -+ }, - }; --static struct clk at32_sm_pclk = { -+ -+static struct resource at32_eic0_resource[] = { -+ { -+ .start = 0xfff00100, -+ .end = 0xfff0013f, -+ .flags = IORESOURCE_MEM, -+ }, -+ IRQ(19), -+}; -+ -+DEFINE_DEV(at32_pm, 0); -+DEFINE_DEV(at32ap700x_rtc, 0); -+DEFINE_DEV(at32_wdt, 0); -+DEFINE_DEV(at32_eic, 0); -+ -+/* -+ * Peripheral clock for PM, RTC, WDT and EIC. PM will ensure that this -+ * is always running. -+ */ -+static struct clk at32_pm_pclk = { - .name = "pclk", -- .dev = &at32_sm_device.dev, -+ .dev = &at32_pm0_device.dev, - .parent = &pbb_clk, - .mode = pbb_clk_mode, - .get_rate = pbb_clk_get_rate, -@@ -491,6 +556,17 @@ static struct clk pico_clk = { - .users = 1, - }; - -+static struct resource dmaca0_resource[] = { -+ { -+ .start = 0xff200000, -+ .end = 0xff20ffff, -+ .flags = IORESOURCE_MEM, -+ }, -+ IRQ(2), -+}; -+DEFINE_DEV(dmaca, 0); -+DEV_CLK(hclk, dmaca0, hsb, 10); -+ - /* -------------------------------------------------------------------- - * HMATRIX - * -------------------------------------------------------------------- */ -@@ -583,12 +659,14 @@ DEV_CLK(mck, pio4, pba, 14); - - void __init at32_add_system_devices(void) - { -- system_manager.eim_first_irq = EIM_IRQ_BASE; -- -- platform_device_register(&at32_sm_device); -+ platform_device_register(&at32_pm0_device); - platform_device_register(&at32_intc0_device); -+ platform_device_register(&at32ap700x_rtc0_device); -+ platform_device_register(&at32_wdt0_device); -+ platform_device_register(&at32_eic0_device); - platform_device_register(&smc0_device); - platform_device_register(&pdc_device); -+ platform_device_register(&dmaca0_device); - - platform_device_register(&at32_systc0_device); - -@@ -894,6 +972,83 @@ at32_add_device_spi(unsigned int id, struct spi_board_info *b, unsigned int n) - } - - /* -------------------------------------------------------------------- -+ * TWI -+ * -------------------------------------------------------------------- */ -+ -+static struct resource atmel_twi0_resource[] = { -+ PBMEM(0xffe00800), -+ IRQ(5), -+}; -+DEFINE_DEV(atmel_twi, 0); -+DEV_CLK(pclk,atmel_twi0,pba,2); -+ -+struct platform_device *__init -+at32_add_device_twi(unsigned int id) -+{ -+ struct platform_device *pdev; -+ -+ switch (id) { -+ case 0: -+ pdev = &atmel_twi0_device; -+ select_peripheral(PA(6), PERIPH_A, 0); /* SDA */ -+ select_peripheral(PA(7), PERIPH_A, 0); /* SCL */ -+ break; -+ -+ default: -+ return NULL; -+ } -+ -+ platform_device_register(pdev); -+ return pdev; -+} -+ -+/* -------------------------------------------------------------------- -+ * MMC -+ * -------------------------------------------------------------------- */ -+static struct mci_platform_data atmel_mci0_data = { -+ .detect_pin = GPIO_PIN_NONE, -+ .wp_pin = GPIO_PIN_NONE, -+}; -+static struct resource atmel_mci0_resource[] = { -+ PBMEM(0xfff02400), -+ IRQ(28), -+}; -+DEFINE_DEV_DATA(atmel_mci, 0); -+DEV_CLK(mci_clk, atmel_mci0, pbb, 9); -+ -+struct platform_device *__init -+at32_add_device_mci(unsigned int id, struct mci_platform_data *data) -+{ -+ struct platform_device *pdev; -+ -+ switch (id) { -+ case 0: -+ pdev = &atmel_mci0_device; -+ select_peripheral(PA(10), PERIPH_A, 0); /* CLK */ -+ select_peripheral(PA(11), PERIPH_A, 0); /* CMD */ -+ select_peripheral(PA(12), PERIPH_A, 0); /* DATA0 */ -+ select_peripheral(PA(13), PERIPH_A, 0); /* DATA1 */ -+ select_peripheral(PA(14), PERIPH_A, 0); /* DATA2 */ -+ select_peripheral(PA(15), PERIPH_A, 0); /* DATA3 */ -+ break; -+ default: -+ return NULL; -+ } -+ -+ if (data) { -+ if (data->detect_pin != GPIO_PIN_NONE) -+ at32_select_gpio(data->detect_pin, 0); -+ if (data->wp_pin != GPIO_PIN_NONE) -+ at32_select_gpio(data->wp_pin, 0); -+ memcpy(pdev->dev.platform_data, data, -+ sizeof(struct mci_platform_data)); -+ } -+ -+ platform_device_register(pdev); -+ return pdev; -+} -+ -+/* -------------------------------------------------------------------- - * LCDC - * -------------------------------------------------------------------- */ - static struct atmel_lcdfb_info atmel_lcdfb0_data; -@@ -1013,6 +1168,228 @@ err_dup_modedb: - } - - /* -------------------------------------------------------------------- -+ * USB Device Controller -+ * -------------------------------------------------------------------- */ -+static struct resource usba0_resource[] __initdata = { -+ { -+ .name = "fifo", -+ .start = 0xff300000, -+ .end = 0xff3fffff, -+ .flags = IORESOURCE_MEM, -+ }, { -+ .name = "regs", -+ .start = 0xfff03000, -+ .end = 0xfff033ff, -+ .flags = IORESOURCE_MEM, -+ }, -+ IRQ(31), -+}; -+static struct clk usba0_pclk = { -+ .name = "pclk", -+ .parent = &pbb_clk, -+ .mode = pbb_clk_mode, -+ .get_rate = pbb_clk_get_rate, -+ .index = 12, -+}; -+static struct clk usba0_hclk = { -+ .name = "hclk", -+ .parent = &hsb_clk, -+ .mode = hsb_clk_mode, -+ .get_rate = hsb_clk_get_rate, -+ .index = 6, -+}; -+ -+struct platform_device *__init -+at32_add_device_usba(unsigned int id, struct usba_platform_data *data) -+{ -+ struct platform_device *pdev; -+ -+ if (id != 0) -+ return NULL; -+ -+ pdev = platform_device_alloc("atmel_usba_udc", 0); -+ if (!pdev) -+ return NULL; -+ -+ if (platform_device_add_resources(pdev, usba0_resource, -+ ARRAY_SIZE(usba0_resource))) -+ goto out_free_pdev; -+ -+ if (data) { -+ if (platform_device_add_data(pdev, data, sizeof(*data))) -+ goto out_free_pdev; -+ -+ if (data->vbus_pin != GPIO_PIN_NONE) -+ at32_select_gpio(data->vbus_pin, 0); -+ } -+ -+ usba0_pclk.dev = &pdev->dev; -+ usba0_hclk.dev = &pdev->dev; -+ -+ platform_device_add(pdev); -+ -+ return pdev; -+ -+out_free_pdev: -+ platform_device_put(pdev); -+ return NULL; -+} -+ -+/* -------------------------------------------------------------------- -+ * SSC -+ * -------------------------------------------------------------------- */ -+static struct resource ssc0_resource[] = { -+ PBMEM(0xffe01c00), -+ IRQ(10), -+}; -+DEFINE_DEV(ssc, 0); -+DEV_CLK(pclk, ssc0, pba, 7); -+ -+static struct resource ssc1_resource[] = { -+ PBMEM(0xffe02000), -+ IRQ(11), -+}; -+DEFINE_DEV(ssc, 1); -+DEV_CLK(pclk, ssc1, pba, 8); -+ -+static struct resource ssc2_resource[] = { -+ PBMEM(0xffe02400), -+ IRQ(12), -+}; -+DEFINE_DEV(ssc, 2); -+DEV_CLK(pclk, ssc2, pba, 9); -+ -+struct platform_device *__init -+at32_add_device_ssc(unsigned int id, unsigned int flags) -+{ -+ struct platform_device *pdev; -+ -+ switch (id) { -+ case 0: -+ pdev = &ssc0_device; -+ if (flags & ATMEL_SSC_RF) -+ select_peripheral(PA(21), PERIPH_A, 0); /* RF */ -+ if (flags & ATMEL_SSC_RK) -+ select_peripheral(PA(22), PERIPH_A, 0); /* RK */ -+ if (flags & ATMEL_SSC_TK) -+ select_peripheral(PA(23), PERIPH_A, 0); /* TK */ -+ if (flags & ATMEL_SSC_TF) -+ select_peripheral(PA(24), PERIPH_A, 0); /* TF */ -+ if (flags & ATMEL_SSC_TD) -+ select_peripheral(PA(25), PERIPH_A, 0); /* TD */ -+ if (flags & ATMEL_SSC_RD) -+ select_peripheral(PA(26), PERIPH_A, 0); /* RD */ -+ break; -+ case 1: -+ pdev = &ssc1_device; -+ if (flags & ATMEL_SSC_RF) -+ select_peripheral(PA(0), PERIPH_B, 0); /* RF */ -+ if (flags & ATMEL_SSC_RK) -+ select_peripheral(PA(1), PERIPH_B, 0); /* RK */ -+ if (flags & ATMEL_SSC_TK) -+ select_peripheral(PA(2), PERIPH_B, 0); /* TK */ -+ if (flags & ATMEL_SSC_TF) -+ select_peripheral(PA(3), PERIPH_B, 0); /* TF */ -+ if (flags & ATMEL_SSC_TD) -+ select_peripheral(PA(4), PERIPH_B, 0); /* TD */ -+ if (flags & ATMEL_SSC_RD) -+ select_peripheral(PA(5), PERIPH_B, 0); /* RD */ -+ break; -+ case 2: -+ pdev = &ssc2_device; -+ if (flags & ATMEL_SSC_TD) -+ select_peripheral(PB(13), PERIPH_A, 0); /* TD */ -+ if (flags & ATMEL_SSC_RD) -+ select_peripheral(PB(14), PERIPH_A, 0); /* RD */ -+ if (flags & ATMEL_SSC_TK) -+ select_peripheral(PB(15), PERIPH_A, 0); /* TK */ -+ if (flags & ATMEL_SSC_TF) -+ select_peripheral(PB(16), PERIPH_A, 0); /* TF */ -+ if (flags & ATMEL_SSC_RF) -+ select_peripheral(PB(17), PERIPH_A, 0); /* RF */ -+ if (flags & ATMEL_SSC_RK) -+ select_peripheral(PB(18), PERIPH_A, 0); /* RK */ -+ break; -+ default: -+ return NULL; -+ } -+ -+ platform_device_register(pdev); -+ return pdev; -+} -+ -+/* -------------------------------------------------------------------- -+ * AC97C -+ * -------------------------------------------------------------------- */ -+static struct resource atmel_ac97c0_resource[] = { -+ PBMEM(0xfff02800), -+ IRQ(29), -+}; -+DEFINE_DEV(atmel_ac97c, 0); -+DEV_CLK(pclk, atmel_ac97c0, pbb, 10); -+ -+struct platform_device *__init -+at32_add_device_ac97c(unsigned int id) -+{ -+ struct platform_device *pdev; -+ -+ switch (id) { -+ case 0: -+ pdev = &atmel_ac97c0_device; -+ select_peripheral(PB(20), PERIPH_B, 0); /* SYNC */ -+ select_peripheral(PB(21), PERIPH_B, 0); /* SDO */ -+ select_peripheral(PB(22), PERIPH_B, 0); /* SDI */ -+ select_peripheral(PB(23), PERIPH_B, 0); /* SCLK */ -+ break; -+ default: -+ return NULL; -+ } -+ -+ platform_device_register(pdev); -+ return pdev; -+} -+ -+/* -------------------------------------------------------------------- -+ * DAC -+ * -------------------------------------------------------------------- */ -+static struct resource abdac0_resource[] = { -+ PBMEM(0xfff02000), -+ IRQ(27), -+}; -+DEFINE_DEV(abdac, 0); -+DEV_CLK(pclk, abdac0, pbb, 8); -+static struct clk abdac0_sample_clk = { -+ .name = "sample_clk", -+ .dev = &abdac0_device.dev, -+ .mode = genclk_mode, -+ .get_rate = genclk_get_rate, -+ .set_rate = genclk_set_rate, -+ .set_parent = genclk_set_parent, -+ .index = 6, -+}; -+ -+struct platform_device *__init -+at32_add_device_abdac(unsigned int id) -+{ -+ struct platform_device *pdev; -+ -+ switch (id) { -+ case 0: -+ pdev = &abdac0_device; -+ select_peripheral(PB(20), PERIPH_A, 0); /* DATA1 */ -+ select_peripheral(PB(21), PERIPH_A, 0); /* DATA0 */ -+ select_peripheral(PB(22), PERIPH_A, 0); /* DATAN1 */ -+ select_peripheral(PB(23), PERIPH_A, 0); /* DATAN0 */ -+ break; -+ default: -+ return NULL; -+ } -+ -+ platform_device_register(pdev); -+ return pdev; -+} -+ -+/* -------------------------------------------------------------------- - * GCLK - * -------------------------------------------------------------------- */ - static struct clk gclk0 = { -@@ -1066,7 +1443,7 @@ struct clk *at32_clock_list[] = { - &hsb_clk, - &pba_clk, - &pbb_clk, -- &at32_sm_pclk, -+ &at32_pm_pclk, - &at32_intc0_pclk, - &hmatrix_clk, - &ebi_clk, -@@ -1075,6 +1452,7 @@ struct clk *at32_clock_list[] = { - &smc0_mck, - &pdc_hclk, - &pdc_pclk, -+ &dmaca0_hclk, - &pico_clk, - &pio0_mck, - &pio1_mck, -@@ -1092,8 +1470,18 @@ struct clk *at32_clock_list[] = { - &macb1_pclk, - &atmel_spi0_spi_clk, - &atmel_spi1_spi_clk, -+ &atmel_twi0_pclk, -+ &atmel_mci0_mci_clk, - &atmel_lcdfb0_hck1, - &atmel_lcdfb0_pixclk, -+ &usba0_pclk, -+ &usba0_hclk, -+ &ssc0_pclk, -+ &ssc1_pclk, -+ &ssc2_pclk, -+ &atmel_ac97c0_pclk, -+ &abdac0_pclk, -+ &abdac0_sample_clk, - &gclk0, - &gclk1, - &gclk2, -@@ -1113,18 +1501,20 @@ void __init at32_portmux_init(void) - - void __init at32_clock_init(void) - { -- struct at32_sm *sm = &system_manager; - u32 cpu_mask = 0, hsb_mask = 0, pba_mask = 0, pbb_mask = 0; - int i; - -- if (sm_readl(sm, PM_MCCTRL) & SM_BIT(PLLSEL)) -+ if (pm_readl(MCCTRL) & PM_BIT(PLLSEL)) { - main_clock = &pll0; -- else -+ cpu_clk.parent = &pll0; -+ } else { - main_clock = &osc0; -+ cpu_clk.parent = &osc0; -+ } - -- if (sm_readl(sm, PM_PLL0) & SM_BIT(PLLOSC)) -+ if (pm_readl(PLL0) & PM_BIT(PLLOSC)) - pll0.parent = &osc1; -- if (sm_readl(sm, PM_PLL1) & SM_BIT(PLLOSC)) -+ if (pm_readl(PLL1) & PM_BIT(PLLOSC)) - pll1.parent = &osc1; - - genclk_init_parent(&gclk0); -@@ -1133,6 +1523,7 @@ void __init at32_clock_init(void) - genclk_init_parent(&gclk3); - genclk_init_parent(&gclk4); - genclk_init_parent(&atmel_lcdfb0_pixclk); -+ genclk_init_parent(&abdac0_sample_clk); - - /* - * Turn on all clocks that have at least one user already, and -@@ -1157,8 +1548,8 @@ void __init at32_clock_init(void) - pbb_mask |= 1 << clk->index; - } - -- sm_writel(sm, PM_CPU_MASK, cpu_mask); -- sm_writel(sm, PM_HSB_MASK, hsb_mask); -- sm_writel(sm, PM_PBA_MASK, pba_mask); -- sm_writel(sm, PM_PBB_MASK, pbb_mask); -+ pm_writel(CPU_MASK, cpu_mask); -+ pm_writel(HSB_MASK, hsb_mask); -+ pm_writel(PBA_MASK, pba_mask); -+ pm_writel(PBB_MASK, pbb_mask); - } -diff --git a/arch/avr32/mach-at32ap/clock.c b/arch/avr32/mach-at32ap/clock.c -index 0f8c89c..4642117 100644 ---- a/arch/avr32/mach-at32ap/clock.c -+++ b/arch/avr32/mach-at32ap/clock.c -@@ -150,3 +150,119 @@ struct clk *clk_get_parent(struct clk *clk) - return clk->parent; - } - EXPORT_SYMBOL(clk_get_parent); -+ -+ -+ -+#ifdef CONFIG_DEBUG_FS -+ -+/* /sys/kernel/debug/at32ap_clk */ -+ -+#include <linux/io.h> -+#include <linux/debugfs.h> -+#include <linux/seq_file.h> -+#include "pm.h" -+ -+ -+#define NEST_DELTA 2 -+#define NEST_MAX 6 -+ -+struct clkinf { -+ struct seq_file *s; -+ unsigned nest; -+}; -+ -+static void -+dump_clock(struct clk *parent, struct clkinf *r) -+{ -+ unsigned nest = r->nest; -+ char buf[16 + NEST_MAX]; -+ struct clk *clk; -+ unsigned i; -+ -+ /* skip clocks coupled to devices that aren't registered */ -+ if (parent->dev && !parent->dev->bus_id[0] && !parent->users) -+ return; -+ -+ /* <nest spaces> name <pad to end> */ -+ memset(buf, ' ', sizeof(buf) - 1); -+ buf[sizeof(buf) - 1] = 0; -+ i = strlen(parent->name); -+ memcpy(buf + nest, parent->name, -+ min(i, (unsigned)(sizeof(buf) - 1 - nest))); -+ -+ seq_printf(r->s, "%s%c users=%2d %-3s %9ld Hz", -+ buf, parent->set_parent ? '*' : ' ', -+ parent->users, -+ parent->users ? "on" : "off", /* NOTE: not-paranoid!! */ -+ clk_get_rate(parent)); -+ if (parent->dev) -+ seq_printf(r->s, ", for %s", parent->dev->bus_id); -+ seq_printf(r->s, "\n"); -+ -+ /* cost of this scan is small, but not linear... */ -+ r->nest = nest + NEST_DELTA; -+ for (i = 3; i < at32_nr_clocks; i++) { -+ clk = at32_clock_list[i]; -+ if (clk->parent == parent) -+ dump_clock(clk, r); -+ } -+ r->nest = nest; -+} -+ -+static int clk_show(struct seq_file *s, void *unused) -+{ -+ struct clkinf r; -+ int i; -+ -+ /* show all the power manager registers */ -+ seq_printf(s, "MCCTRL = %8x\n", pm_readl(MCCTRL)); -+ seq_printf(s, "CKSEL = %8x\n", pm_readl(CKSEL)); -+ seq_printf(s, "CPUMASK = %8x\n", pm_readl(CPU_MASK)); -+ seq_printf(s, "HSBMASK = %8x\n", pm_readl(HSB_MASK)); -+ seq_printf(s, "PBAMASK = %8x\n", pm_readl(PBA_MASK)); -+ seq_printf(s, "PBBMASK = %8x\n", pm_readl(PBB_MASK)); -+ seq_printf(s, "PLL0 = %8x\n", pm_readl(PLL0)); -+ seq_printf(s, "PLL1 = %8x\n", pm_readl(PLL1)); -+ seq_printf(s, "IMR = %8x\n", pm_readl(IMR)); -+ for (i = 0; i < 8; i++) { -+ if (i == 5) -+ continue; -+ seq_printf(s, "GCCTRL%d = %8x\n", i, pm_readl(GCCTRL(i))); -+ } -+ -+ seq_printf(s, "\n"); -+ -+ /* show clock tree as derived from the three oscillators -+ * we "know" are at the head of the list -+ */ -+ r.s = s; -+ r.nest = 0; -+ dump_clock(at32_clock_list[0], &r); -+ dump_clock(at32_clock_list[1], &r); -+ dump_clock(at32_clock_list[2], &r); -+ -+ return 0; -+} -+ -+static int clk_open(struct inode *inode, struct file *file) -+{ -+ return single_open(file, clk_show, NULL); -+} -+ -+static const struct file_operations clk_operations = { -+ .open = clk_open, -+ .read = seq_read, -+ .llseek = seq_lseek, -+ .release = single_release, -+}; -+ -+static int __init clk_debugfs_init(void) -+{ -+ (void) debugfs_create_file("at32ap_clk", S_IFREG | S_IRUGO, -+ NULL, NULL, &clk_operations); -+ -+ return 0; -+} -+postcore_initcall(clk_debugfs_init); -+ -+#endif -diff --git a/arch/avr32/mach-at32ap/cpufreq.c b/arch/avr32/mach-at32ap/cpufreq.c -new file mode 100644 -index 0000000..235524b ---- /dev/null -+++ b/arch/avr32/mach-at32ap/cpufreq.c -@@ -0,0 +1,112 @@ -+/* -+ * Copyright (C) 2004-2007 Atmel Corporation -+ * -+ * Based on MIPS implementation arch/mips/kernel/time.c -+ * Copyright 2001 MontaVista Software Inc. -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 as -+ * published by the Free Software Foundation. -+ */ -+ -+/*#define DEBUG*/ -+ -+#include <linux/kernel.h> -+#include <linux/types.h> -+#include <linux/init.h> -+#include <linux/cpufreq.h> -+#include <linux/io.h> -+#include <linux/clk.h> -+#include <linux/err.h> -+#include <asm/system.h> -+ -+static struct clk *cpuclk; -+ -+static int at32_verify_speed(struct cpufreq_policy *policy) -+{ -+ if (policy->cpu != 0) -+ return -EINVAL; -+ -+ cpufreq_verify_within_limits(policy, policy->cpuinfo.min_freq, -+ policy->cpuinfo.max_freq); -+ return 0; -+} -+ -+static unsigned int at32_get_speed(unsigned int cpu) -+{ -+ /* No SMP support */ -+ if (cpu) -+ return 0; -+ return (unsigned int)((clk_get_rate(cpuclk) + 500) / 1000); -+} -+ -+static int at32_set_target(struct cpufreq_policy *policy, -+ unsigned int target_freq, -+ unsigned int relation) -+{ -+ struct cpufreq_freqs freqs; -+ long freq; -+ -+ /* Convert target_freq from kHz to Hz */ -+ freq = clk_round_rate(cpuclk, target_freq * 1000); -+ -+ /* Check if policy->min <= new_freq <= policy->max */ -+ if(freq < (policy->min * 1000) || freq > (policy->max * 1000)) -+ return -EINVAL; -+ -+ pr_debug("cpufreq: requested frequency %u Hz\n", target_freq * 1000); -+ -+ freqs.old = at32_get_speed(0); -+ freqs.new = (freq + 500) / 1000; -+ freqs.cpu = 0; -+ freqs.flags = 0; -+ -+ cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE); -+ clk_set_rate(cpuclk, freq); -+ cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE); -+ -+ pr_debug("cpufreq: set frequency %lu Hz\n", freq); -+ -+ return 0; -+} -+ -+static int __init at32_cpufreq_driver_init(struct cpufreq_policy *policy) -+{ -+ if (policy->cpu != 0) -+ return -EINVAL; -+ -+ cpuclk = clk_get(NULL, "cpu"); -+ if (IS_ERR(cpuclk)) { -+ pr_debug("cpufreq: could not get CPU clk\n"); -+ return PTR_ERR(cpuclk); -+ } -+ -+ policy->cpuinfo.min_freq = (clk_round_rate(cpuclk, 1) + 500) / 1000; -+ policy->cpuinfo.max_freq = (clk_round_rate(cpuclk, ~0UL) + 500) / 1000; -+ policy->cpuinfo.transition_latency = 0; -+ policy->cur = at32_get_speed(0); -+ policy->min = policy->cpuinfo.min_freq; -+ policy->max = policy->cpuinfo.max_freq; -+ policy->governor = CPUFREQ_DEFAULT_GOVERNOR; -+ -+ printk("cpufreq: AT32AP CPU frequency driver\n"); -+ -+ return 0; -+} -+ -+static struct cpufreq_driver at32_driver = { -+ .name = "at32ap", -+ .owner = THIS_MODULE, -+ .init = at32_cpufreq_driver_init, -+ .verify = at32_verify_speed, -+ .target = at32_set_target, -+ .get = at32_get_speed, -+ .flags = CPUFREQ_STICKY, -+}; -+ -+static int __init at32_cpufreq_init(void) -+{ -+ return cpufreq_register_driver(&at32_driver); -+} -+ -+arch_initcall(at32_cpufreq_init); -diff --git a/arch/avr32/mach-at32ap/extint.c b/arch/avr32/mach-at32ap/extint.c -index 4a60ecc..8acd010 100644 ---- a/arch/avr32/mach-at32ap/extint.c -+++ b/arch/avr32/mach-at32ap/extint.c -@@ -17,42 +17,83 @@ - - #include <asm/io.h> - --#include <asm/arch/sm.h> -- --#include "sm.h" -+/* EIC register offsets */ -+#define EIC_IER 0x0000 -+#define EIC_IDR 0x0004 -+#define EIC_IMR 0x0008 -+#define EIC_ISR 0x000c -+#define EIC_ICR 0x0010 -+#define EIC_MODE 0x0014 -+#define EIC_EDGE 0x0018 -+#define EIC_LEVEL 0x001c -+#define EIC_TEST 0x0020 -+#define EIC_NMIC 0x0024 -+ -+/* Bitfields in TEST */ -+#define EIC_TESTEN_OFFSET 31 -+#define EIC_TESTEN_SIZE 1 -+ -+/* Bitfields in NMIC */ -+#define EIC_EN_OFFSET 0 -+#define EIC_EN_SIZE 1 -+ -+/* Bit manipulation macros */ -+#define EIC_BIT(name) \ -+ (1 << EIC_##name##_OFFSET) -+#define EIC_BF(name,value) \ -+ (((value) & ((1 << EIC_##name##_SIZE) - 1)) \ -+ << EIC_##name##_OFFSET) -+#define EIC_BFEXT(name,value) \ -+ (((value) >> EIC_##name##_OFFSET) \ -+ & ((1 << EIC_##name##_SIZE) - 1)) -+#define EIC_BFINS(name,value,old) \ -+ (((old) & ~(((1 << EIC_##name##_SIZE) - 1) \ -+ << EIC_##name##_OFFSET)) \ -+ | EIC_BF(name,value)) -+ -+/* Register access macros */ -+#define eic_readl(port,reg) \ -+ __raw_readl((port)->regs + EIC_##reg) -+#define eic_writel(port,reg,value) \ -+ __raw_writel((value), (port)->regs + EIC_##reg) -+ -+struct eic { -+ void __iomem *regs; -+ struct irq_chip *chip; -+ unsigned int first_irq; -+}; - --static void eim_ack_irq(unsigned int irq) -+static void eic_ack_irq(unsigned int irq) - { -- struct at32_sm *sm = get_irq_chip_data(irq); -- sm_writel(sm, EIM_ICR, 1 << (irq - sm->eim_first_irq)); -+ struct eic *eic = get_irq_chip_data(irq); -+ eic_writel(eic, ICR, 1 << (irq - eic->first_irq)); - } - --static void eim_mask_irq(unsigned int irq) -+static void eic_mask_irq(unsigned int irq) - { -- struct at32_sm *sm = get_irq_chip_data(irq); -- sm_writel(sm, EIM_IDR, 1 << (irq - sm->eim_first_irq)); -+ struct eic *eic = get_irq_chip_data(irq); -+ eic_writel(eic, IDR, 1 << (irq - eic->first_irq)); - } - --static void eim_mask_ack_irq(unsigned int irq) -+static void eic_mask_ack_irq(unsigned int irq) - { -- struct at32_sm *sm = get_irq_chip_data(irq); -- sm_writel(sm, EIM_ICR, 1 << (irq - sm->eim_first_irq)); -- sm_writel(sm, EIM_IDR, 1 << (irq - sm->eim_first_irq)); -+ struct eic *eic = get_irq_chip_data(irq); -+ eic_writel(eic, ICR, 1 << (irq - eic->first_irq)); -+ eic_writel(eic, IDR, 1 << (irq - eic->first_irq)); - } - --static void eim_unmask_irq(unsigned int irq) -+static void eic_unmask_irq(unsigned int irq) - { -- struct at32_sm *sm = get_irq_chip_data(irq); -- sm_writel(sm, EIM_IER, 1 << (irq - sm->eim_first_irq)); -+ struct eic *eic = get_irq_chip_data(irq); -+ eic_writel(eic, IER, 1 << (irq - eic->first_irq)); - } - --static int eim_set_irq_type(unsigned int irq, unsigned int flow_type) -+static int eic_set_irq_type(unsigned int irq, unsigned int flow_type) - { -- struct at32_sm *sm = get_irq_chip_data(irq); -+ struct eic *eic = get_irq_chip_data(irq); - struct irq_desc *desc; -- unsigned int i = irq - sm->eim_first_irq; -+ unsigned int i = irq - eic->first_irq; - u32 mode, edge, level; -- unsigned long flags; - int ret = 0; - - flow_type &= IRQ_TYPE_SENSE_MASK; -@@ -60,11 +101,10 @@ static int eim_set_irq_type(unsigned int irq, unsigned int flow_type) - flow_type = IRQ_TYPE_LEVEL_LOW; - - desc = &irq_desc[irq]; -- spin_lock_irqsave(&sm->lock, flags); - -- mode = sm_readl(sm, EIM_MODE); -- edge = sm_readl(sm, EIM_EDGE); -- level = sm_readl(sm, EIM_LEVEL); -+ mode = eic_readl(eic, MODE); -+ edge = eic_readl(eic, EDGE); -+ level = eic_readl(eic, LEVEL); - - switch (flow_type) { - case IRQ_TYPE_LEVEL_LOW: -@@ -89,9 +129,9 @@ static int eim_set_irq_type(unsigned int irq, unsigned int flow_type) - } - - if (ret == 0) { -- sm_writel(sm, EIM_MODE, mode); -- sm_writel(sm, EIM_EDGE, edge); -- sm_writel(sm, EIM_LEVEL, level); -+ eic_writel(eic, MODE, mode); -+ eic_writel(eic, EDGE, edge); -+ eic_writel(eic, LEVEL, level); - - if (flow_type & (IRQ_TYPE_LEVEL_LOW | IRQ_TYPE_LEVEL_HIGH)) - flow_type |= IRQ_LEVEL; -@@ -99,35 +139,33 @@ static int eim_set_irq_type(unsigned int irq, unsigned int flow_type) - desc->status |= flow_type; - } - -- spin_unlock_irqrestore(&sm->lock, flags); -- - return ret; - } - --struct irq_chip eim_chip = { -- .name = "eim", -- .ack = eim_ack_irq, -- .mask = eim_mask_irq, -- .mask_ack = eim_mask_ack_irq, -- .unmask = eim_unmask_irq, -- .set_type = eim_set_irq_type, -+struct irq_chip eic_chip = { -+ .name = "eic", -+ .ack = eic_ack_irq, -+ .mask = eic_mask_irq, -+ .mask_ack = eic_mask_ack_irq, -+ .unmask = eic_unmask_irq, -+ .set_type = eic_set_irq_type, - }; - --static void demux_eim_irq(unsigned int irq, struct irq_desc *desc) -+static void demux_eic_irq(unsigned int irq, struct irq_desc *desc) - { -- struct at32_sm *sm = desc->handler_data; -+ struct eic *eic = desc->handler_data; - struct irq_desc *ext_desc; - unsigned long status, pending; - unsigned int i, ext_irq; - -- status = sm_readl(sm, EIM_ISR); -- pending = status & sm_readl(sm, EIM_IMR); -+ status = eic_readl(eic, ISR); -+ pending = status & eic_readl(eic, IMR); - - while (pending) { - i = fls(pending) - 1; - pending &= ~(1 << i); - -- ext_irq = i + sm->eim_first_irq; -+ ext_irq = i + eic->first_irq; - ext_desc = irq_desc + ext_irq; - if (ext_desc->status & IRQ_LEVEL) - handle_level_irq(ext_irq, ext_desc); -@@ -136,51 +174,85 @@ static void demux_eim_irq(unsigned int irq, struct irq_desc *desc) - } - } - --static int __init eim_init(void) -+static int __init eic_probe(struct platform_device *pdev) - { -- struct at32_sm *sm = &system_manager; -+ struct eic *eic; -+ struct resource *regs; - unsigned int i; - unsigned int nr_irqs; - unsigned int int_irq; -+ int ret; - u32 pattern; - -- /* -- * The EIM is really the same module as SM, so register -- * mapping, etc. has been taken care of already. -- */ -+ regs = platform_get_resource(pdev, IORESOURCE_MEM, 0); -+ int_irq = platform_get_irq(pdev, 0); -+ if (!regs || !int_irq) { -+ dev_dbg(&pdev->dev, "missing regs and/or irq resource\n"); -+ return -ENXIO; -+ } -+ -+ ret = -ENOMEM; -+ eic = kzalloc(sizeof(struct eic), GFP_KERNEL); -+ if (!eic) { -+ dev_dbg(&pdev->dev, "no memory for eic structure\n"); -+ goto err_kzalloc; -+ } -+ -+ eic->first_irq = EIM_IRQ_BASE + 32 * pdev->id; -+ eic->regs = ioremap(regs->start, regs->end - regs->start + 1); -+ if (!eic->regs) { -+ dev_dbg(&pdev->dev, "failed to map regs\n"); -+ goto err_ioremap; -+ } - - /* - * Find out how many interrupt lines that are actually - * implemented in hardware. - */ -- sm_writel(sm, EIM_IDR, ~0UL); -- sm_writel(sm, EIM_MODE, ~0UL); -- pattern = sm_readl(sm, EIM_MODE); -+ eic_writel(eic, IDR, ~0UL); -+ eic_writel(eic, MODE, ~0UL); -+ pattern = eic_readl(eic, MODE); - nr_irqs = fls(pattern); - - /* Trigger on falling edge unless overridden by driver */ -- sm_writel(sm, EIM_MODE, 0UL); -- sm_writel(sm, EIM_EDGE, 0UL); -+ eic_writel(eic, MODE, 0UL); -+ eic_writel(eic, EDGE, 0UL); - -- sm->eim_chip = &eim_chip; -+ eic->chip = &eic_chip; - - for (i = 0; i < nr_irqs; i++) { - /* NOTE the handler we set here is ignored by the demux */ -- set_irq_chip_and_handler(sm->eim_first_irq + i, &eim_chip, -+ set_irq_chip_and_handler(eic->first_irq + i, &eic_chip, - handle_level_irq); -- set_irq_chip_data(sm->eim_first_irq + i, sm); -+ set_irq_chip_data(eic->first_irq + i, eic); - } - -- int_irq = platform_get_irq_byname(sm->pdev, "eim"); -- -- set_irq_chained_handler(int_irq, demux_eim_irq); -- set_irq_data(int_irq, sm); -+ set_irq_chained_handler(int_irq, demux_eic_irq); -+ set_irq_data(int_irq, eic); - -- printk("EIM: External Interrupt Module at 0x%p, IRQ %u\n", -- sm->regs, int_irq); -- printk("EIM: Handling %u external IRQs, starting with IRQ %u\n", -- nr_irqs, sm->eim_first_irq); -+ dev_info(&pdev->dev, -+ "External Interrupt Controller at 0x%p, IRQ %u\n", -+ eic->regs, int_irq); -+ dev_info(&pdev->dev, -+ "Handling %u external IRQs, starting with IRQ %u\n", -+ nr_irqs, eic->first_irq); - - return 0; -+ -+err_ioremap: -+ kfree(eic); -+err_kzalloc: -+ return ret; -+} -+ -+static struct platform_driver eic_driver = { -+ .driver = { -+ .name = "at32_eic", -+ }, -+}; -+ -+static int __init eic_init(void) -+{ -+ return platform_driver_probe(&eic_driver, eic_probe); - } --arch_initcall(eim_init); -+arch_initcall(eic_init); -diff --git a/arch/avr32/mach-at32ap/gpio-dev.c b/arch/avr32/mach-at32ap/gpio-dev.c -new file mode 100644 -index 0000000..3d4810d ---- /dev/null -+++ b/arch/avr32/mach-at32ap/gpio-dev.c -@@ -0,0 +1,570 @@ -+/* -+ * GPIO /dev and configfs interface -+ * -+ * Copyright (C) 2006-2007 Atmel Corporation -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 as -+ * published by the Free Software Foundation. -+ */ -+#include <linux/configfs.h> -+#include <linux/cdev.h> -+#include <linux/fs.h> -+#include <linux/interrupt.h> -+#include <linux/poll.h> -+#include <linux/uaccess.h> -+#include <linux/wait.h> -+ -+#include <asm/gpio.h> -+#include <asm/arch/portmux.h> -+ -+#define GPIO_DEV_MAX 8 -+ -+static struct class *gpio_dev_class; -+static dev_t gpio_devt; -+ -+struct gpio_item { -+ spinlock_t lock; -+ -+ int enabled; -+ int initialized; -+ int port; -+ u32 pin_mask; -+ u32 oe_mask; -+ -+ /* Pin state last time we read it (for blocking reads) */ -+ u32 pin_state; -+ int changed; -+ -+ wait_queue_head_t change_wq; -+ struct fasync_struct *async_queue; -+ -+ int id; -+ struct class_device *gpio_dev; -+ struct cdev char_dev; -+ struct config_item item; -+}; -+ -+struct gpio_attribute { -+ struct configfs_attribute attr; -+ ssize_t (*show)(struct gpio_item *, char *); -+ ssize_t (*store)(struct gpio_item *, const char *, size_t); -+}; -+ -+static irqreturn_t gpio_dev_interrupt(int irq, void *dev_id) -+{ -+ struct gpio_item *gpio = dev_id; -+ u32 old_state, new_state; -+ -+ old_state = gpio->pin_state; -+ new_state = at32_gpio_get_value_multiple(gpio->port, gpio->pin_mask); -+ gpio->pin_state = new_state; -+ -+ if (new_state != old_state) { -+ gpio->changed = 1; -+ wake_up_interruptible(&gpio->change_wq); -+ -+ if (gpio->async_queue) -+ kill_fasync(&gpio->async_queue, SIGIO, POLL_IN); -+ } -+ -+ return IRQ_HANDLED; -+} -+ -+static int gpio_dev_open(struct inode *inode, struct file *file) -+{ -+ struct gpio_item *gpio = container_of(inode->i_cdev, -+ struct gpio_item, -+ char_dev); -+ unsigned int irq; -+ unsigned int i; -+ int ret; -+ -+ nonseekable_open(inode, file); -+ config_item_get(&gpio->item); -+ file->private_data = gpio; -+ -+ gpio->pin_state = at32_gpio_get_value_multiple(gpio->port, -+ gpio->pin_mask); -+ gpio->changed = 1; -+ -+ for (i = 0; i < 32; i++) { -+ if (gpio->pin_mask & (1 << i)) { -+ irq = gpio_to_irq(32 * gpio->port + i); -+ ret = request_irq(irq, gpio_dev_interrupt, 0, -+ "gpio-dev", gpio); -+ if (ret) -+ goto err_irq; -+ } -+ } -+ -+ return 0; -+ -+err_irq: -+ while (i--) { -+ if (gpio->pin_mask & (1 << i)) { -+ irq = gpio_to_irq(32 * gpio->port + i); -+ free_irq(irq, gpio); -+ } -+ } -+ -+ config_item_put(&gpio->item); -+ -+ return ret; -+} -+ -+static int gpio_dev_fasync(int fd, struct file *file, int mode) -+{ -+ struct gpio_item *gpio = file->private_data; -+ -+ return fasync_helper(fd, file, mode, &gpio->async_queue); -+} -+ -+static int gpio_dev_release(struct inode *inode, struct file *file) -+{ -+ struct gpio_item *gpio = file->private_data; -+ unsigned int irq; -+ unsigned int i; -+ -+ gpio_dev_fasync(-1, file, 0); -+ -+ for (i = 0; i < 32; i++) { -+ if (gpio->pin_mask & (1 << i)) { -+ irq = gpio_to_irq(32 * gpio->port + i); -+ free_irq(irq, gpio); -+ } -+ } -+ -+ config_item_put(&gpio->item); -+ -+ return 0; -+} -+ -+static unsigned int gpio_dev_poll(struct file *file, poll_table *wait) -+{ -+ struct gpio_item *gpio = file->private_data; -+ unsigned int mask = 0; -+ -+ poll_wait(file, &gpio->change_wq, wait); -+ if (gpio->changed) -+ mask |= POLLIN | POLLRDNORM; -+ -+ return mask; -+} -+ -+static ssize_t gpio_dev_read(struct file *file, char __user *buf, -+ size_t count, loff_t *offset) -+{ -+ struct gpio_item *gpio = file->private_data; -+ u32 value; -+ -+ spin_lock_irq(&gpio->lock); -+ while (!gpio->changed) { -+ spin_unlock_irq(&gpio->lock); -+ -+ if (file->f_flags & O_NONBLOCK) -+ return -EAGAIN; -+ -+ if (wait_event_interruptible(gpio->change_wq, gpio->changed)) -+ return -ERESTARTSYS; -+ -+ spin_lock_irq(&gpio->lock); -+ } -+ -+ gpio->changed = 0; -+ value = at32_gpio_get_value_multiple(gpio->port, gpio->pin_mask); -+ -+ spin_unlock_irq(&gpio->lock); -+ -+ count = min(count, (size_t)4); -+ if (copy_to_user(buf, &value, count)) -+ return -EFAULT; -+ -+ return count; -+} -+ -+static ssize_t gpio_dev_write(struct file *file, const char __user *buf, -+ size_t count, loff_t *offset) -+{ -+ struct gpio_item *gpio = file->private_data; -+ u32 value = 0; -+ u32 mask = ~0UL; -+ -+ count = min(count, (size_t)4); -+ if (copy_from_user(&value, buf, count)) -+ return -EFAULT; -+ -+ /* Assuming big endian */ -+ mask <<= (4 - count) * 8; -+ mask &= gpio->pin_mask; -+ -+ at32_gpio_set_value_multiple(gpio->port, value, mask); -+ -+ return count; -+} -+ -+static struct file_operations gpio_dev_fops = { -+ .owner = THIS_MODULE, -+ .llseek = no_llseek, -+ .open = gpio_dev_open, -+ .release = gpio_dev_release, -+ .fasync = gpio_dev_fasync, -+ .poll = gpio_dev_poll, -+ .read = gpio_dev_read, -+ .write = gpio_dev_write, -+}; -+ -+static struct gpio_item *to_gpio_item(struct config_item *item) -+{ -+ return item ? container_of(item, struct gpio_item, item) : NULL; -+} -+ -+static ssize_t gpio_show_gpio_id(struct gpio_item *gpio, char *page) -+{ -+ return sprintf(page, "%d\n", gpio->port); -+} -+ -+static ssize_t gpio_store_gpio_id(struct gpio_item *gpio, -+ const char *page, size_t count) -+{ -+ unsigned long id; -+ char *p = (char *)page; -+ ssize_t ret = -EINVAL; -+ -+ id = simple_strtoul(p, &p, 0); -+ if (!p || (*p && (*p != '\n'))) -+ return -EINVAL; -+ -+ /* Switching PIO is not allowed when live... */ -+ spin_lock(&gpio->lock); -+ if (!gpio->enabled) { -+ ret = -ENXIO; -+ if (at32_gpio_port_is_valid(id)) { -+ gpio->port = id; -+ ret = count; -+ } -+ } -+ spin_unlock(&gpio->lock); -+ -+ return ret; -+} -+ -+static ssize_t gpio_show_pin_mask(struct gpio_item *gpio, char *page) -+{ -+ return sprintf(page, "0x%08x\n", gpio->pin_mask); -+} -+ -+static ssize_t gpio_store_pin_mask(struct gpio_item *gpio, -+ const char *page, size_t count) -+{ -+ u32 new_mask; -+ char *p = (char *)page; -+ ssize_t ret = -EINVAL; -+ -+ new_mask = simple_strtoul(p, &p, 0); -+ if (!p || (*p && (*p != '\n'))) -+ return -EINVAL; -+ -+ /* Can't update the pin mask while live. */ -+ spin_lock(&gpio->lock); -+ if (!gpio->enabled) { -+ gpio->oe_mask &= new_mask; -+ gpio->pin_mask = new_mask; -+ ret = count; -+ } -+ spin_unlock(&gpio->lock); -+ -+ return ret; -+} -+ -+static ssize_t gpio_show_oe_mask(struct gpio_item *gpio, char *page) -+{ -+ return sprintf(page, "0x%08x\n", gpio->oe_mask); -+} -+ -+static ssize_t gpio_store_oe_mask(struct gpio_item *gpio, -+ const char *page, size_t count) -+{ -+ u32 mask; -+ char *p = (char *)page; -+ ssize_t ret = -EINVAL; -+ -+ mask = simple_strtoul(p, &p, 0); -+ if (!p || (*p && (*p != '\n'))) -+ return -EINVAL; -+ -+ spin_lock(&gpio->lock); -+ if (!gpio->enabled) { -+ gpio->oe_mask = mask & gpio->pin_mask; -+ ret = count; -+ } -+ spin_unlock(&gpio->lock); -+ -+ return ret; -+} -+ -+static ssize_t gpio_show_enabled(struct gpio_item *gpio, char *page) -+{ -+ return sprintf(page, "%d\n", gpio->enabled); -+} -+ -+static ssize_t gpio_store_enabled(struct gpio_item *gpio, -+ const char *page, size_t count) -+{ -+ char *p = (char *)page; -+ int enabled; -+ int ret; -+ -+ enabled = simple_strtoul(p, &p, 0); -+ if (!p || (*p && (*p != '\n'))) -+ return -EINVAL; -+ -+ /* make it a boolean value */ -+ enabled = !!enabled; -+ -+ if (gpio->enabled == enabled) -+ /* No change; do nothing. */ -+ return count; -+ -+ BUG_ON(gpio->id >= GPIO_DEV_MAX); -+ -+ if (!enabled) { -+ class_device_unregister(gpio->gpio_dev); -+ cdev_del(&gpio->char_dev); -+ at32_deselect_pins(gpio->port, gpio->pin_mask); -+ gpio->initialized = 0; -+ } else { -+ if (gpio->port < 0 || !gpio->pin_mask) -+ return -ENODEV; -+ } -+ -+ /* Disallow any updates to gpio_id or pin_mask */ -+ spin_lock(&gpio->lock); -+ gpio->enabled = enabled; -+ spin_unlock(&gpio->lock); -+ -+ if (!enabled) -+ return count; -+ -+ /* Now, try to allocate the pins */ -+ ret = at32_select_gpio_pins(gpio->port, gpio->pin_mask, gpio->oe_mask); -+ if (ret) -+ goto err_alloc_pins; -+ -+ gpio->initialized = 1; -+ -+ cdev_init(&gpio->char_dev, &gpio_dev_fops); -+ gpio->char_dev.owner = THIS_MODULE; -+ ret = cdev_add(&gpio->char_dev, MKDEV(MAJOR(gpio_devt), gpio->id), 1); -+ if (ret < 0) -+ goto err_cdev_add; -+ gpio->gpio_dev = class_device_create(gpio_dev_class, NULL, -+ MKDEV(MAJOR(gpio_devt), gpio->id), -+ NULL, -+ "gpio%d", gpio->id); -+ if (IS_ERR(gpio->gpio_dev)) { -+ printk(KERN_ERR "failed to create gpio%d\n", gpio->id); -+ ret = PTR_ERR(gpio->gpio_dev); -+ goto err_class_dev; -+ } -+ -+ printk(KERN_INFO "created gpio%d (port%d/0x%08x) as (%d:%d)\n", -+ gpio->id, gpio->port, gpio->pin_mask, -+ MAJOR(gpio->gpio_dev->devt), MINOR(gpio->gpio_dev->devt)); -+ -+ return 0; -+ -+err_class_dev: -+ cdev_del(&gpio->char_dev); -+err_cdev_add: -+ at32_deselect_pins(gpio->port, gpio->pin_mask); -+ gpio->initialized = 0; -+err_alloc_pins: -+ spin_lock(&gpio->lock); -+ gpio->enabled = 0; -+ spin_unlock(&gpio->lock); -+ -+ return ret; -+} -+ -+static struct gpio_attribute gpio_item_attr_gpio_id = { -+ .attr = { -+ .ca_owner = THIS_MODULE, -+ .ca_name = "gpio_id", -+ .ca_mode = S_IRUGO | S_IWUSR, -+ }, -+ .show = gpio_show_gpio_id, -+ .store = gpio_store_gpio_id, -+}; -+static struct gpio_attribute gpio_item_attr_pin_mask = { -+ .attr = { -+ .ca_owner = THIS_MODULE, -+ .ca_name = "pin_mask", -+ .ca_mode = S_IRUGO | S_IWUSR, -+ }, -+ .show = gpio_show_pin_mask, -+ .store = gpio_store_pin_mask, -+}; -+static struct gpio_attribute gpio_item_attr_oe_mask = { -+ .attr = { -+ .ca_owner = THIS_MODULE, -+ .ca_name = "oe_mask", -+ .ca_mode = S_IRUGO | S_IWUSR, -+ }, -+ .show = gpio_show_oe_mask, -+ .store = gpio_store_oe_mask, -+}; -+static struct gpio_attribute gpio_item_attr_enabled = { -+ .attr = { -+ .ca_owner = THIS_MODULE, -+ .ca_name = "enabled", -+ .ca_mode = S_IRUGO | S_IWUSR, -+ }, -+ .show = gpio_show_enabled, -+ .store = gpio_store_enabled, -+}; -+ -+static struct configfs_attribute *gpio_item_attrs[] = { -+ &gpio_item_attr_gpio_id.attr, -+ &gpio_item_attr_pin_mask.attr, -+ &gpio_item_attr_oe_mask.attr, -+ &gpio_item_attr_enabled.attr, -+ NULL, -+}; -+ -+static ssize_t gpio_show_attr(struct config_item *item, -+ struct configfs_attribute *attr, -+ char *page) -+{ -+ struct gpio_item *gpio_item = to_gpio_item(item); -+ struct gpio_attribute *gpio_attr -+ = container_of(attr, struct gpio_attribute, attr); -+ ssize_t ret = 0; -+ -+ if (gpio_attr->show) -+ ret = gpio_attr->show(gpio_item, page); -+ return ret; -+} -+ -+static ssize_t gpio_store_attr(struct config_item *item, -+ struct configfs_attribute *attr, -+ const char *page, size_t count) -+{ -+ struct gpio_item *gpio_item = to_gpio_item(item); -+ struct gpio_attribute *gpio_attr -+ = container_of(attr, struct gpio_attribute, attr); -+ ssize_t ret = -EINVAL; -+ -+ if (gpio_attr->store) -+ ret = gpio_attr->store(gpio_item, page, count); -+ return ret; -+} -+ -+static void gpio_release(struct config_item *item) -+{ -+ kfree(to_gpio_item(item)); -+} -+ -+static struct configfs_item_operations gpio_item_ops = { -+ .release = gpio_release, -+ .show_attribute = gpio_show_attr, -+ .store_attribute = gpio_store_attr, -+}; -+ -+static struct config_item_type gpio_item_type = { -+ .ct_item_ops = &gpio_item_ops, -+ .ct_attrs = gpio_item_attrs, -+ .ct_owner = THIS_MODULE, -+}; -+ -+static struct config_item *gpio_make_item(struct config_group *group, -+ const char *name) -+{ -+ static int next_id; -+ struct gpio_item *gpio; -+ -+ if (next_id >= GPIO_DEV_MAX) -+ return NULL; -+ -+ gpio = kzalloc(sizeof(struct gpio_item), GFP_KERNEL); -+ if (!gpio) -+ return NULL; -+ -+ gpio->id = next_id++; -+ config_item_init_type_name(&gpio->item, name, &gpio_item_type); -+ spin_lock_init(&gpio->lock); -+ init_waitqueue_head(&gpio->change_wq); -+ -+ return &gpio->item; -+} -+ -+static void gpio_drop_item(struct config_group *group, -+ struct config_item *item) -+{ -+ struct gpio_item *gpio = to_gpio_item(item); -+ -+ spin_lock(&gpio->lock); -+ if (gpio->enabled) { -+ class_device_unregister(gpio->gpio_dev); -+ cdev_del(&gpio->char_dev); -+ } -+ -+ if (gpio->initialized) { -+ at32_deselect_pins(gpio->port, gpio->pin_mask); -+ gpio->initialized = 0; -+ gpio->enabled = 0; -+ } -+ spin_unlock(&gpio->lock); -+} -+ -+static struct configfs_group_operations gpio_group_ops = { -+ .make_item = gpio_make_item, -+ .drop_item = gpio_drop_item, -+}; -+ -+static struct config_item_type gpio_group_type = { -+ .ct_group_ops = &gpio_group_ops, -+ .ct_owner = THIS_MODULE, -+}; -+ -+static struct configfs_subsystem gpio_subsys = { -+ .su_group = { -+ .cg_item = { -+ .ci_namebuf = "gpio", -+ .ci_type = &gpio_group_type, -+ }, -+ }, -+}; -+ -+static int __init gpio_dev_init(void) -+{ -+ int err; -+ -+ gpio_dev_class = class_create(THIS_MODULE, "gpio-dev"); -+ if (IS_ERR(gpio_dev_class)) { -+ err = PTR_ERR(gpio_dev_class); -+ goto err_class_create; -+ } -+ -+ err = alloc_chrdev_region(&gpio_devt, 0, GPIO_DEV_MAX, "gpio"); -+ if (err < 0) -+ goto err_alloc_chrdev; -+ -+ /* Configfs initialization */ -+ config_group_init(&gpio_subsys.su_group); -+ init_MUTEX(&gpio_subsys.su_sem); -+ err = configfs_register_subsystem(&gpio_subsys); -+ if (err) -+ goto err_register_subsys; -+ -+ return 0; -+ -+err_register_subsys: -+ unregister_chrdev_region(gpio_devt, GPIO_DEV_MAX); -+err_alloc_chrdev: -+ class_destroy(gpio_dev_class); -+err_class_create: -+ printk(KERN_WARNING "Failed to initialize gpio /dev interface\n"); -+ return err; -+} -+late_initcall(gpio_dev_init); -diff --git a/arch/avr32/mach-at32ap/pio.c b/arch/avr32/mach-at32ap/pio.c -index 1eb99b8..c978c36 100644 ---- a/arch/avr32/mach-at32ap/pio.c -+++ b/arch/avr32/mach-at32ap/pio.c -@@ -110,6 +110,10 @@ void __init at32_select_gpio(unsigned int pin, unsigned long flags) - pio_writel(pio, SODR, mask); - else - pio_writel(pio, CODR, mask); -+ if (flags & AT32_GPIOF_MULTIDRV) -+ pio_writel(pio, MDER, mask); -+ else -+ pio_writel(pio, MDDR, mask); - pio_writel(pio, PUDR, mask); - pio_writel(pio, OER, mask); - } else { -@@ -158,6 +162,82 @@ fail: - dump_stack(); - } - -+#ifdef CONFIG_GPIO_DEV -+ -+/* Gang allocators and accessors; used by the GPIO /dev driver */ -+int at32_gpio_port_is_valid(unsigned int port) -+{ -+ return port < MAX_NR_PIO_DEVICES && pio_dev[port].regs != NULL; -+} -+ -+int at32_select_gpio_pins(unsigned int port, u32 pins, u32 oe_mask) -+{ -+ struct pio_device *pio; -+ u32 old, new; -+ -+ pio = &pio_dev[port]; -+ BUG_ON(port > ARRAY_SIZE(pio_dev) || !pio->regs || (oe_mask & ~pins)); -+ -+ /* Try to allocate the pins */ -+ do { -+ old = pio->pinmux_mask; -+ if (old & pins) -+ return -EBUSY; -+ -+ new = old | pins; -+ } while (cmpxchg(&pio->pinmux_mask, old, new) != old); -+ -+ /* That went well, now configure the port */ -+ pio_writel(pio, OER, oe_mask); -+ pio_writel(pio, PER, pins); -+ -+ return 0; -+} -+ -+void at32_deselect_pins(unsigned int port, u32 pins) -+{ -+ struct pio_device *pio; -+ u32 old, new; -+ -+ pio = &pio_dev[port]; -+ BUG_ON(port > ARRAY_SIZE(pio_dev) || !pio->regs); -+ -+ /* Return to a "safe" mux configuration */ -+ pio_writel(pio, PUER, pins); -+ pio_writel(pio, ODR, pins); -+ -+ /* Deallocate the pins */ -+ do { -+ old = pio->pinmux_mask; -+ new = old & ~pins; -+ } while (cmpxchg(&pio->pinmux_mask, old, new) != old); -+} -+ -+u32 at32_gpio_get_value_multiple(unsigned int port, u32 pins) -+{ -+ struct pio_device *pio; -+ -+ pio = &pio_dev[port]; -+ BUG_ON(port > ARRAY_SIZE(pio_dev) || !pio->regs); -+ -+ return pio_readl(pio, PDSR) & pins; -+} -+ -+void at32_gpio_set_value_multiple(unsigned int port, u32 value, u32 mask) -+{ -+ struct pio_device *pio; -+ -+ pio = &pio_dev[port]; -+ BUG_ON(port > ARRAY_SIZE(pio_dev) || !pio->regs); -+ -+ /* No atomic updates for now... */ -+ pio_writel(pio, CODR, ~value & mask); -+ pio_writel(pio, SODR, value & mask); -+} -+ -+#endif /* CONFIG_GPIO_DEV */ -+ -+ - /*--------------------------------------------------------------------------*/ - - /* GPIO API */ -diff --git a/arch/avr32/mach-at32ap/pm.h b/arch/avr32/mach-at32ap/pm.h -new file mode 100644 -index 0000000..47efd0d ---- /dev/null -+++ b/arch/avr32/mach-at32ap/pm.h -@@ -0,0 +1,120 @@ -+/* -+ * Register definitions for the Power Manager (PM) -+ */ -+#ifndef __ARCH_AVR32_MACH_AT32AP_PM_H__ -+#define __ARCH_AVR32_MACH_AT32AP_PM_H__ -+ -+/* -+ * We can reduce the code size a bit by using a constant here. Since -+ * this file is only used on AVR32 AP CPUs with segmentation enabled, -+ * it's safe to not use ioremap. Generic drivers should of course -+ * never do this. -+ */ -+#define AT32_PM_BASE 0xfff00000 -+ -+/* PM register offsets */ -+#define PM_MCCTRL 0x0000 -+#define PM_CKSEL 0x0004 -+#define PM_CPU_MASK 0x0008 -+#define PM_HSB_MASK 0x000c -+#define PM_PBA_MASK 0x0010 -+#define PM_PBB_MASK 0x0014 -+#define PM_PLL0 0x0020 -+#define PM_PLL1 0x0024 -+#define PM_IER 0x0040 -+#define PM_IDR 0x0044 -+#define PM_IMR 0x0048 -+#define PM_ISR 0x004c -+#define PM_ICR 0x0050 -+#define PM_GCCTRL(x) (0x0060 + 4 * (x)) -+#define PM_RCAUSE 0x00c0 -+ -+/* Bitfields in CKSEL */ -+#define PM_CPUSEL_OFFSET 0 -+#define PM_CPUSEL_SIZE 3 -+#define PM_CPUDIV_OFFSET 7 -+#define PM_CPUDIV_SIZE 1 -+#define PM_HSBSEL_OFFSET 8 -+#define PM_HSBSEL_SIZE 3 -+#define PM_HSBDIV_OFFSET 15 -+#define PM_HSBDIV_SIZE 1 -+#define PM_PBASEL_OFFSET 16 -+#define PM_PBASEL_SIZE 3 -+#define PM_PBADIV_OFFSET 23 -+#define PM_PBADIV_SIZE 1 -+#define PM_PBBSEL_OFFSET 24 -+#define PM_PBBSEL_SIZE 3 -+#define PM_PBBDIV_OFFSET 31 -+#define PM_PBBDIV_SIZE 1 -+ -+/* Bitfields in PLL0 */ -+#define PM_PLLEN_OFFSET 0 -+#define PM_PLLEN_SIZE 1 -+#define PM_PLLOSC_OFFSET 1 -+#define PM_PLLOSC_SIZE 1 -+#define PM_PLLOPT_OFFSET 2 -+#define PM_PLLOPT_SIZE 3 -+#define PM_PLLDIV_OFFSET 8 -+#define PM_PLLDIV_SIZE 8 -+#define PM_PLLMUL_OFFSET 16 -+#define PM_PLLMUL_SIZE 8 -+#define PM_PLLCOUNT_OFFSET 24 -+#define PM_PLLCOUNT_SIZE 6 -+#define PM_PLLTEST_OFFSET 31 -+#define PM_PLLTEST_SIZE 1 -+ -+/* Bitfields in ICR */ -+#define PM_LOCK0_OFFSET 0 -+#define PM_LOCK0_SIZE 1 -+#define PM_LOCK1_OFFSET 1 -+#define PM_LOCK1_SIZE 1 -+#define PM_WAKE_OFFSET 2 -+#define PM_WAKE_SIZE 1 -+#define PM_CKRDY_OFFSET 5 -+#define PM_CKRDY_SIZE 1 -+#define PM_MSKRDY_OFFSET 6 -+#define PM_MSKRDY_SIZE 1 -+ -+/* Bitfields in GCCTRL0 */ -+#define PM_OSCSEL_OFFSET 0 -+#define PM_OSCSEL_SIZE 1 -+#define PM_PLLSEL_OFFSET 1 -+#define PM_PLLSEL_SIZE 1 -+#define PM_CEN_OFFSET 2 -+#define PM_CEN_SIZE 1 -+#define PM_DIVEN_OFFSET 4 -+#define PM_DIVEN_SIZE 1 -+#define PM_DIV_OFFSET 8 -+#define PM_DIV_SIZE 8 -+ -+/* Bitfields in RCAUSE */ -+#define PM_POR_OFFSET 0 -+#define PM_POR_SIZE 1 -+#define PM_EXT_OFFSET 2 -+#define PM_EXT_SIZE 1 -+#define PM_WDT_OFFSET 3 -+#define PM_WDT_SIZE 1 -+#define PM_NTAE_OFFSET 4 -+#define PM_NTAE_SIZE 1 -+ -+/* Bit manipulation macros */ -+#define PM_BIT(name) \ -+ (1 << PM_##name##_OFFSET) -+#define PM_BF(name,value) \ -+ (((value) & ((1 << PM_##name##_SIZE) - 1)) \ -+ << PM_##name##_OFFSET) -+#define PM_BFEXT(name,value) \ -+ (((value) >> PM_##name##_OFFSET) \ -+ & ((1 << PM_##name##_SIZE) - 1)) -+#define PM_BFINS(name,value,old)\ -+ (((old) & ~(((1 << PM_##name##_SIZE) - 1) \ -+ << PM_##name##_OFFSET)) \ -+ | PM_BF(name,value)) -+ -+/* Register access macros */ -+#define pm_readl(reg) \ -+ __raw_readl((void __iomem *)AT32_PM_BASE + PM_##reg) -+#define pm_writel(reg,value) \ -+ __raw_writel((value), (void __iomem *)AT32_PM_BASE + PM_##reg) -+ -+#endif /* __ARCH_AVR32_MACH_AT32AP_PM_H__ */ -diff --git a/arch/avr32/mach-at32ap/sm.h b/arch/avr32/mach-at32ap/sm.h -deleted file mode 100644 -index cad02b5..0000000 ---- a/arch/avr32/mach-at32ap/sm.h -+++ /dev/null -@@ -1,242 +0,0 @@ --/* -- * Register definitions for SM -- * -- * System Manager -- */ --#ifndef __ASM_AVR32_SM_H__ --#define __ASM_AVR32_SM_H__ -- --/* SM register offsets */ --#define SM_PM_MCCTRL 0x0000 --#define SM_PM_CKSEL 0x0004 --#define SM_PM_CPU_MASK 0x0008 --#define SM_PM_HSB_MASK 0x000c --#define SM_PM_PBA_MASK 0x0010 --#define SM_PM_PBB_MASK 0x0014 --#define SM_PM_PLL0 0x0020 --#define SM_PM_PLL1 0x0024 --#define SM_PM_VCTRL 0x0030 --#define SM_PM_VMREF 0x0034 --#define SM_PM_VMV 0x0038 --#define SM_PM_IER 0x0040 --#define SM_PM_IDR 0x0044 --#define SM_PM_IMR 0x0048 --#define SM_PM_ISR 0x004c --#define SM_PM_ICR 0x0050 --#define SM_PM_GCCTRL 0x0060 --#define SM_RTC_CTRL 0x0080 --#define SM_RTC_VAL 0x0084 --#define SM_RTC_TOP 0x0088 --#define SM_RTC_IER 0x0090 --#define SM_RTC_IDR 0x0094 --#define SM_RTC_IMR 0x0098 --#define SM_RTC_ISR 0x009c --#define SM_RTC_ICR 0x00a0 --#define SM_WDT_CTRL 0x00b0 --#define SM_WDT_CLR 0x00b4 --#define SM_WDT_EXT 0x00b8 --#define SM_RC_RCAUSE 0x00c0 --#define SM_EIM_IER 0x0100 --#define SM_EIM_IDR 0x0104 --#define SM_EIM_IMR 0x0108 --#define SM_EIM_ISR 0x010c --#define SM_EIM_ICR 0x0110 --#define SM_EIM_MODE 0x0114 --#define SM_EIM_EDGE 0x0118 --#define SM_EIM_LEVEL 0x011c --#define SM_EIM_TEST 0x0120 --#define SM_EIM_NMIC 0x0124 -- --/* Bitfields in PM_MCCTRL */ -- --/* Bitfields in PM_CKSEL */ --#define SM_CPUSEL_OFFSET 0 --#define SM_CPUSEL_SIZE 3 --#define SM_CPUDIV_OFFSET 7 --#define SM_CPUDIV_SIZE 1 --#define SM_HSBSEL_OFFSET 8 --#define SM_HSBSEL_SIZE 3 --#define SM_HSBDIV_OFFSET 15 --#define SM_HSBDIV_SIZE 1 --#define SM_PBASEL_OFFSET 16 --#define SM_PBASEL_SIZE 3 --#define SM_PBADIV_OFFSET 23 --#define SM_PBADIV_SIZE 1 --#define SM_PBBSEL_OFFSET 24 --#define SM_PBBSEL_SIZE 3 --#define SM_PBBDIV_OFFSET 31 --#define SM_PBBDIV_SIZE 1 -- --/* Bitfields in PM_CPU_MASK */ -- --/* Bitfields in PM_HSB_MASK */ -- --/* Bitfields in PM_PBA_MASK */ -- --/* Bitfields in PM_PBB_MASK */ -- --/* Bitfields in PM_PLL0 */ --#define SM_PLLEN_OFFSET 0 --#define SM_PLLEN_SIZE 1 --#define SM_PLLOSC_OFFSET 1 --#define SM_PLLOSC_SIZE 1 --#define SM_PLLOPT_OFFSET 2 --#define SM_PLLOPT_SIZE 3 --#define SM_PLLDIV_OFFSET 8 --#define SM_PLLDIV_SIZE 8 --#define SM_PLLMUL_OFFSET 16 --#define SM_PLLMUL_SIZE 8 --#define SM_PLLCOUNT_OFFSET 24 --#define SM_PLLCOUNT_SIZE 6 --#define SM_PLLTEST_OFFSET 31 --#define SM_PLLTEST_SIZE 1 -- --/* Bitfields in PM_PLL1 */ -- --/* Bitfields in PM_VCTRL */ --#define SM_VAUTO_OFFSET 0 --#define SM_VAUTO_SIZE 1 --#define SM_PM_VCTRL_VAL_OFFSET 8 --#define SM_PM_VCTRL_VAL_SIZE 7 -- --/* Bitfields in PM_VMREF */ --#define SM_REFSEL_OFFSET 0 --#define SM_REFSEL_SIZE 4 -- --/* Bitfields in PM_VMV */ --#define SM_PM_VMV_VAL_OFFSET 0 --#define SM_PM_VMV_VAL_SIZE 8 -- --/* Bitfields in PM_IER */ -- --/* Bitfields in PM_IDR */ -- --/* Bitfields in PM_IMR */ -- --/* Bitfields in PM_ISR */ -- --/* Bitfields in PM_ICR */ --#define SM_LOCK0_OFFSET 0 --#define SM_LOCK0_SIZE 1 --#define SM_LOCK1_OFFSET 1 --#define SM_LOCK1_SIZE 1 --#define SM_WAKE_OFFSET 2 --#define SM_WAKE_SIZE 1 --#define SM_VOK_OFFSET 3 --#define SM_VOK_SIZE 1 --#define SM_VMRDY_OFFSET 4 --#define SM_VMRDY_SIZE 1 --#define SM_CKRDY_OFFSET 5 --#define SM_CKRDY_SIZE 1 -- --/* Bitfields in PM_GCCTRL */ --#define SM_OSCSEL_OFFSET 0 --#define SM_OSCSEL_SIZE 1 --#define SM_PLLSEL_OFFSET 1 --#define SM_PLLSEL_SIZE 1 --#define SM_CEN_OFFSET 2 --#define SM_CEN_SIZE 1 --#define SM_CPC_OFFSET 3 --#define SM_CPC_SIZE 1 --#define SM_DIVEN_OFFSET 4 --#define SM_DIVEN_SIZE 1 --#define SM_DIV_OFFSET 8 --#define SM_DIV_SIZE 8 -- --/* Bitfields in RTC_CTRL */ --#define SM_PCLR_OFFSET 1 --#define SM_PCLR_SIZE 1 --#define SM_TOPEN_OFFSET 2 --#define SM_TOPEN_SIZE 1 --#define SM_CLKEN_OFFSET 3 --#define SM_CLKEN_SIZE 1 --#define SM_PSEL_OFFSET 8 --#define SM_PSEL_SIZE 16 -- --/* Bitfields in RTC_VAL */ --#define SM_RTC_VAL_VAL_OFFSET 0 --#define SM_RTC_VAL_VAL_SIZE 31 -- --/* Bitfields in RTC_TOP */ --#define SM_RTC_TOP_VAL_OFFSET 0 --#define SM_RTC_TOP_VAL_SIZE 32 -- --/* Bitfields in RTC_IER */ -- --/* Bitfields in RTC_IDR */ -- --/* Bitfields in RTC_IMR */ -- --/* Bitfields in RTC_ISR */ -- --/* Bitfields in RTC_ICR */ --#define SM_TOPI_OFFSET 0 --#define SM_TOPI_SIZE 1 -- --/* Bitfields in WDT_CTRL */ --#define SM_KEY_OFFSET 24 --#define SM_KEY_SIZE 8 -- --/* Bitfields in WDT_CLR */ -- --/* Bitfields in WDT_EXT */ -- --/* Bitfields in RC_RCAUSE */ --#define SM_POR_OFFSET 0 --#define SM_POR_SIZE 1 --#define SM_BOD_OFFSET 1 --#define SM_BOD_SIZE 1 --#define SM_EXT_OFFSET 2 --#define SM_EXT_SIZE 1 --#define SM_WDT_OFFSET 3 --#define SM_WDT_SIZE 1 --#define SM_NTAE_OFFSET 4 --#define SM_NTAE_SIZE 1 --#define SM_SERP_OFFSET 5 --#define SM_SERP_SIZE 1 -- --/* Bitfields in EIM_IER */ -- --/* Bitfields in EIM_IDR */ -- --/* Bitfields in EIM_IMR */ -- --/* Bitfields in EIM_ISR */ -- --/* Bitfields in EIM_ICR */ -- --/* Bitfields in EIM_MODE */ -- --/* Bitfields in EIM_EDGE */ --#define SM_INT0_OFFSET 0 --#define SM_INT0_SIZE 1 --#define SM_INT1_OFFSET 1 --#define SM_INT1_SIZE 1 --#define SM_INT2_OFFSET 2 --#define SM_INT2_SIZE 1 --#define SM_INT3_OFFSET 3 --#define SM_INT3_SIZE 1 -- --/* Bitfields in EIM_LEVEL */ -- --/* Bitfields in EIM_TEST */ --#define SM_TESTEN_OFFSET 31 --#define SM_TESTEN_SIZE 1 -- --/* Bitfields in EIM_NMIC */ --#define SM_EN_OFFSET 0 --#define SM_EN_SIZE 1 -- --/* Bit manipulation macros */ --#define SM_BIT(name) (1 << SM_##name##_OFFSET) --#define SM_BF(name,value) (((value) & ((1 << SM_##name##_SIZE) - 1)) << SM_##name##_OFFSET) --#define SM_BFEXT(name,value) (((value) >> SM_##name##_OFFSET) & ((1 << SM_##name##_SIZE) - 1)) --#define SM_BFINS(name,value,old) (((old) & ~(((1 << SM_##name##_SIZE) - 1) << SM_##name##_OFFSET)) | SM_BF(name,value)) -- --/* Register access macros */ --#define sm_readl(port,reg) \ -- __raw_readl((port)->regs + SM_##reg) --#define sm_writel(port,reg,value) \ -- __raw_writel((value), (port)->regs + SM_##reg) -- --#endif /* __ASM_AVR32_SM_H__ */ -diff --git a/arch/avr32/mm/dma-coherent.c b/arch/avr32/mm/dma-coherent.c -index 099212d..26f29c6 100644 ---- a/arch/avr32/mm/dma-coherent.c -+++ b/arch/avr32/mm/dma-coherent.c -@@ -41,6 +41,13 @@ static struct page *__dma_alloc(struct device *dev, size_t size, - struct page *page, *free, *end; - int order; - -+ /* Following is a work-around (a.k.a. hack) to prevent pages -+ * with __GFP_COMP being passed to split_page() which cannot -+ * handle them. The real problem is that this flag probably -+ * should be 0 on AVR32 as it is not supported on this -+ * platform--see CONFIG_HUGETLB_PAGE. */ -+ gfp &= ~(__GFP_COMP); -+ - size = PAGE_ALIGN(size); - order = get_order(size); - -diff --git a/drivers/char/watchdog/Kconfig b/drivers/char/watchdog/Kconfig -index 53f5538..520afb8 100644 ---- a/drivers/char/watchdog/Kconfig -+++ b/drivers/char/watchdog/Kconfig -@@ -187,6 +187,26 @@ config PNX4008_WATCHDOG - - Say N if you are unsure. - -+# AVR32 Architecture -+ -+config AT32AP700X_WDT -+ tristate "AT32AP700x watchdog" -+ depends on WATCHDOG && CPU_AT32AP7000 -+ help -+ Watchdog timer embedded into AT32AP700x devices. This will reboot -+ your system when the timeout is reached. -+ -+config AT32AP700X_WDT_TIMEOUT -+ int "Timeout value for AT32AP700x watchdog" -+ depends on AT32AP700X_WDT -+ default "2" -+ range 1 2 -+ help -+ Sets the timeout value for the watchdog in AT32AP700x devices. -+ Limited by hardware to be 1 or 2 seconds. -+ -+ Set to 2 seconds by default. -+ - # X86 (i386 + ia64 + x86_64) Architecture - - config ACQUIRE_WDT -diff --git a/drivers/char/watchdog/Makefile b/drivers/char/watchdog/Makefile -index d90f649..3907ec0 100644 ---- a/drivers/char/watchdog/Makefile -+++ b/drivers/char/watchdog/Makefile -@@ -36,6 +36,9 @@ obj-$(CONFIG_MPCORE_WATCHDOG) += mpcore_wdt.o - obj-$(CONFIG_EP93XX_WATCHDOG) += ep93xx_wdt.o - obj-$(CONFIG_PNX4008_WATCHDOG) += pnx4008_wdt.o - -+# AVR32 Architecture -+obj-$(CONFIG_AT32AP700X_WDT) += at32ap700x_wdt.o -+ - # X86 (i386 + ia64 + x86_64) Architecture - obj-$(CONFIG_ACQUIRE_WDT) += acquirewdt.o - obj-$(CONFIG_ADVANTECH_WDT) += advantechwdt.o -diff --git a/drivers/char/watchdog/at32ap700x_wdt.c b/drivers/char/watchdog/at32ap700x_wdt.c -new file mode 100644 -index 0000000..9b598d9 ---- /dev/null -+++ b/drivers/char/watchdog/at32ap700x_wdt.c -@@ -0,0 +1,325 @@ -+/* -+ * Watchdog driver for Atmel AT32AP700X devices -+ * -+ * Copyright (C) 2005-2006 Atmel Corporation -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 as -+ * published by the Free Software Foundation. -+ */ -+ -+#include <linux/init.h> -+#include <linux/kernel.h> -+#include <linux/module.h> -+#include <linux/moduleparam.h> -+#include <linux/miscdevice.h> -+#include <linux/fs.h> -+#include <linux/platform_device.h> -+#include <linux/watchdog.h> -+#include <linux/uaccess.h> -+#include <linux/io.h> -+ -+#define TIMEOUT_MIN 1 -+#define TIMEOUT_DEFAULT CONFIG_AT32AP700X_WDT_TIMEOUT -+#define TIMEOUT_MAX 2 -+ -+/* Watchdog registers and write/read macro */ -+#define WDT_CTRL 0x00 -+#define WDT_CTRL_EN 0 -+#define WDT_CTRL_PSEL 8 -+#define WDT_CTRL_KEY 24 -+ -+#define WDT_CLR 0x04 -+ -+#define WDT_BIT(name) (1 << WDT_##name) -+#define WDT_BF(name,value) ((value) << WDT_##name) -+ -+#define wdt_readl(dev,reg) \ -+ __raw_readl((dev)->regs + WDT_##reg) -+#define wdt_writel(dev,reg,value) \ -+ __raw_writel((value), (dev)->regs + WDT_##reg) -+ -+struct wdt_at32ap700x { -+ void __iomem *regs; -+ int timeout; -+ int users; -+ struct miscdevice miscdev; -+}; -+ -+static struct wdt_at32ap700x *wdt; -+ -+/* -+ * Disable the watchdog. -+ */ -+static void inline at32_wdt_stop(void) -+{ -+ unsigned long psel = wdt_readl(wdt, CTRL) & WDT_BF(CTRL_PSEL, 0x0f); -+ wdt_writel(wdt, CTRL, psel | WDT_BF(CTRL_KEY, 0x55)); -+ wdt_writel(wdt, CTRL, psel | WDT_BF(CTRL_KEY, 0xaa)); -+} -+ -+/* -+ * Enable and reset the watchdog. -+ */ -+static void inline at32_wdt_start(void) -+{ -+ /* 0xf is 2^16 divider = 2 sec, 0xe is 2^15 divider = 1 sec */ -+ unsigned long psel = (wdt->timeout > 1) ? 0xf : 0xe; -+ -+ wdt_writel(wdt, CTRL, WDT_BIT(CTRL_EN) -+ | WDT_BF(CTRL_PSEL, psel) -+ | WDT_BF(CTRL_KEY, 0x55)); -+ wdt_writel(wdt, CTRL, WDT_BIT(CTRL_EN) -+ | WDT_BF(CTRL_PSEL, psel) -+ | WDT_BF(CTRL_KEY, 0xaa)); -+} -+ -+/* -+ * Pat the watchdog timer. -+ */ -+static void inline at32_wdt_pat(void) -+{ -+ wdt_writel(wdt, CLR, 0x42); -+} -+ -+/* -+ * Watchdog device is opened, and watchdog starts running. -+ */ -+static int at32_wdt_open(struct inode *inode, struct file *file) -+{ -+ if (test_and_set_bit(1, &wdt->users)) -+ return -EBUSY; -+ -+ at32_wdt_start(); -+ return nonseekable_open(inode, file); -+} -+ -+/* -+ * Close the watchdog device. If CONFIG_WATCHDOG_NOWAYOUT is _not_ defined then -+ * the watchdog is also disabled. -+ */ -+static int at32_wdt_close(struct inode *inode, struct file *file) -+{ -+#ifndef CONFIG_WATCHDOG_NOWAYOUT -+ at32_wdt_stop(); -+#endif -+ clear_bit(1, &wdt->users); -+ return 0; -+} -+ -+/* -+ * Change the watchdog time interval. -+ */ -+static int at32_wdt_settimeout(int time) -+{ -+ /* -+ * All counting occurs at 1 / SLOW_CLOCK (32 kHz) and max prescaler is -+ * 2 ^ 16 allowing up to 2 seconds timeout. -+ */ -+ if ((time < TIMEOUT_MIN) || (time > TIMEOUT_MAX)) -+ return -EINVAL; -+ -+ /* -+ * Set new watchdog time. It will be used when at32_wdt_start() is -+ * called. -+ */ -+ wdt->timeout = time; -+ return 0; -+} -+ -+static struct watchdog_info at32_wdt_info = { -+ .identity = "at32ap700x watchdog", -+ .options = WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING, -+}; -+ -+/* -+ * Handle commands from user-space. -+ */ -+static int at32_wdt_ioctl(struct inode *inode, struct file *file, -+ unsigned int cmd, unsigned long arg) -+{ -+ int ret = -ENOTTY; -+ int time; -+ void __user *argp = (void __user *)arg; -+ int __user *p = argp; -+ -+ switch (cmd) { -+ case WDIOC_KEEPALIVE: -+ at32_wdt_pat(); -+ ret = 0; -+ break; -+ case WDIOC_GETSUPPORT: -+ ret = copy_to_user(argp, &at32_wdt_info, -+ sizeof(at32_wdt_info)) ? -EFAULT : 0; -+ break; -+ case WDIOC_SETTIMEOUT: -+ ret = get_user(time, p); -+ if (ret) -+ break; -+ ret = at32_wdt_settimeout(time); -+ if (ret) -+ break; -+ /* Enable new time value */ -+ at32_wdt_start(); -+ /* fall through */ -+ case WDIOC_GETTIMEOUT: -+ ret = put_user(wdt->timeout, p); -+ break; -+ case WDIOC_GETSTATUS: /* fall through */ -+ case WDIOC_GETBOOTSTATUS: -+ ret = put_user(0, p); -+ break; -+ case WDIOC_SETOPTIONS: -+ ret = get_user(time, p); -+ if (ret) -+ break; -+ if (time & WDIOS_DISABLECARD) -+ at32_wdt_stop(); -+ if (time & WDIOS_ENABLECARD) -+ at32_wdt_start(); -+ ret = 0; -+ break; -+ } -+ -+ return ret; -+} -+ -+static ssize_t at32_wdt_write(struct file *file, const char *data, size_t len, -+ loff_t *ppos) -+{ -+ at32_wdt_pat(); -+ return len; -+} -+ -+static const struct file_operations at32_wdt_fops = { -+ .owner = THIS_MODULE, -+ .llseek = no_llseek, -+ .ioctl = at32_wdt_ioctl, -+ .open = at32_wdt_open, -+ .release = at32_wdt_close, -+ .write = at32_wdt_write, -+}; -+ -+static int __init at32_wdt_probe(struct platform_device *pdev) -+{ -+ struct resource *regs; -+ int ret; -+ -+ if (wdt) { -+ dev_dbg(&pdev->dev, "only 1 wdt instance supported.\n"); -+ return -EBUSY; -+ } -+ -+ regs = platform_get_resource(pdev, IORESOURCE_MEM, 0); -+ if (!regs) { -+ dev_dbg(&pdev->dev, "missing mmio resource\n"); -+ return -ENXIO; -+ } -+ -+ wdt = kzalloc(sizeof(struct wdt_at32ap700x), GFP_KERNEL); -+ if (!wdt) { -+ dev_dbg(&pdev->dev, "no memory for wdt structure\n"); -+ return -ENOMEM; -+ } -+ -+ wdt->regs = ioremap(regs->start, regs->end - regs->start + 1); -+ if (!wdt->regs) { -+ ret = -ENOMEM; -+ dev_dbg(&pdev->dev, "could not map I/O memory\n"); -+ goto err_free; -+ } -+ wdt->users = 0; -+ wdt->miscdev.minor = WATCHDOG_MINOR; -+ wdt->miscdev.name = "watchdog"; -+ wdt->miscdev.fops = &at32_wdt_fops; -+ -+ if (at32_wdt_settimeout(TIMEOUT_DEFAULT)) { -+ at32_wdt_settimeout(TIMEOUT_MAX); -+ dev_dbg(&pdev->dev, -+ "default timeout invalid, set to %d sec.\n", -+ TIMEOUT_MAX); -+ } -+ -+ ret = misc_register(&wdt->miscdev); -+ if (ret) { -+ dev_dbg(&pdev->dev, "failed to register wdt miscdev\n"); -+ goto err_iounmap; -+ } -+ -+ platform_set_drvdata(pdev, wdt); -+ wdt->miscdev.parent = &pdev->dev; -+ dev_info(&pdev->dev, "AT32AP700X WDT at 0x%p\n", wdt->regs); -+ -+ return 0; -+ -+err_iounmap: -+ iounmap(wdt->regs); -+err_free: -+ kfree(wdt); -+ wdt = NULL; -+ return ret; -+} -+ -+static int __exit at32_wdt_remove(struct platform_device *pdev) -+{ -+ if (wdt && platform_get_drvdata(pdev) == wdt) { -+ misc_deregister(&wdt->miscdev); -+ iounmap(wdt->regs); -+ kfree(wdt); -+ wdt = NULL; -+ platform_set_drvdata(pdev, NULL); -+ } -+ -+ return 0; -+} -+ -+static void at32_wdt_shutdown(struct platform_device *pdev) -+{ -+ at32_wdt_stop(); -+} -+ -+#ifdef CONFIG_PM -+static int at32_wdt_suspend(struct platform_device *pdev, pm_message_t message) -+{ -+ at32_wdt_stop(); -+ return 0; -+} -+ -+static int at32_wdt_resume(struct platform_device *pdev) -+{ -+ if (wdt->users) -+ at32_wdt_start(); -+ return 0; -+} -+#else -+#define at32_wdt_suspend NULL -+#define at32_wdt_resume NULL -+#endif -+ -+static struct platform_driver at32_wdt_driver = { -+ .remove = __exit_p(at32_wdt_remove), -+ .suspend = at32_wdt_suspend, -+ .resume = at32_wdt_resume, -+ .driver = { -+ .name = "at32_wdt", -+ .owner = THIS_MODULE, -+ }, -+ .shutdown = at32_wdt_shutdown, -+}; -+ -+static int __init at32_wdt_init(void) -+{ -+ return platform_driver_probe(&at32_wdt_driver, at32_wdt_probe); -+} -+module_init(at32_wdt_init); -+ -+static void __exit at32_wdt_exit(void) -+{ -+ platform_driver_unregister(&at32_wdt_driver); -+} -+module_exit(at32_wdt_exit); -+ -+MODULE_AUTHOR("Hans-Christian Egtvedt <hcegtvedt@atmel.com>"); -+MODULE_DESCRIPTION("Watchdog driver for Atmel AT32AP700X"); -+MODULE_LICENSE("GPL"); -+MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR); -diff --git a/drivers/i2c/busses/Kconfig b/drivers/i2c/busses/Kconfig -index 838dc1c..80da12d 100644 ---- a/drivers/i2c/busses/Kconfig -+++ b/drivers/i2c/busses/Kconfig -@@ -4,6 +4,26 @@ - - menu "I2C Hardware Bus support" - -+config I2C_ATMELTWI -+ tristate "Atmel TWI/I2C" -+ depends on I2C -+ help -+ Atmel on-chip TWI controller. Say Y if you have an AT32 or -+ AT91-based device and want to use its built-in TWI -+ functionality. Atmel's TWI is compatible with Philips' I2C -+ protocol. If in doubt, say NO -+ -+config I2C_ATMELTWI_BAUDRATE -+ prompt "Atmel TWI baudrate" -+ depends on I2C_ATMELTWI -+ int -+ default 100000 -+ help -+ Set the TWI/I2C baudrate. This will alter the default value. A -+ different baudrate can be set by using a module parameter as well. If -+ no parameter is provided when loading, this is the value that will be -+ used. -+ - config I2C_ALI1535 - tristate "ALI 1535" - depends on PCI -diff --git a/drivers/i2c/busses/Makefile b/drivers/i2c/busses/Makefile -index 14d1432..fd7c3b3 100644 ---- a/drivers/i2c/busses/Makefile -+++ b/drivers/i2c/busses/Makefile -@@ -52,6 +52,7 @@ obj-$(CONFIG_I2C_VIAPRO) += i2c-viapro.o - obj-$(CONFIG_I2C_VOODOO3) += i2c-voodoo3.o - obj-$(CONFIG_SCx200_ACB) += scx200_acb.o - obj-$(CONFIG_SCx200_I2C) += scx200_i2c.o -+obj-$(CONFIG_I2C_ATMELTWI) += i2c-atmeltwi.o - - ifeq ($(CONFIG_I2C_DEBUG_BUS),y) - EXTRA_CFLAGS += -DDEBUG -diff --git a/drivers/i2c/busses/atmeltwi.h b/drivers/i2c/busses/atmeltwi.h -new file mode 100644 -index 0000000..8502ea6 ---- /dev/null -+++ b/drivers/i2c/busses/atmeltwi.h -@@ -0,0 +1,117 @@ -+/* -+ * Register definitions for the Atmel Two-Wire Interface -+ */ -+ -+#ifndef __ASM_AVR32_TWI_H__ -+#define __ASM_AVR32_TWI_H__ -+ -+/* TWI register offsets */ -+#define TWI_CR 0x0000 -+#define TWI_MMR 0x0004 -+#define TWI_SMR 0x0008 -+#define TWI_IADR 0x000c -+#define TWI_CWGR 0x0010 -+#define TWI_SR 0x0020 -+#define TWI_IER 0x0024 -+#define TWI_IDR 0x0028 -+#define TWI_IMR 0x002c -+#define TWI_RHR 0x0030 -+#define TWI_THR 0x0034 -+ -+/* Bitfields in CR */ -+#define TWI_START_OFFSET 0 -+#define TWI_START_SIZE 1 -+#define TWI_STOP_OFFSET 1 -+#define TWI_STOP_SIZE 1 -+#define TWI_MSEN_OFFSET 2 -+#define TWI_MSEN_SIZE 1 -+#define TWI_MSDIS_OFFSET 3 -+#define TWI_MSDIS_SIZE 1 -+#define TWI_SVEN_OFFSET 4 -+#define TWI_SVEN_SIZE 1 -+#define TWI_SVDIS_OFFSET 5 -+#define TWI_SVDIS_SIZE 1 -+#define TWI_SWRST_OFFSET 7 -+#define TWI_SWRST_SIZE 1 -+ -+/* Bitfields in MMR */ -+#define TWI_IADRSZ_OFFSET 8 -+#define TWI_IADRSZ_SIZE 2 -+#define TWI_MREAD_OFFSET 12 -+#define TWI_MREAD_SIZE 1 -+#define TWI_DADR_OFFSET 16 -+#define TWI_DADR_SIZE 7 -+ -+/* Bitfields in SMR */ -+#define TWI_SADR_OFFSET 16 -+#define TWI_SADR_SIZE 7 -+ -+/* Bitfields in IADR */ -+#define TWI_IADR_OFFSET 0 -+#define TWI_IADR_SIZE 24 -+ -+/* Bitfields in CWGR */ -+#define TWI_CLDIV_OFFSET 0 -+#define TWI_CLDIV_SIZE 8 -+#define TWI_CHDIV_OFFSET 8 -+#define TWI_CHDIV_SIZE 8 -+#define TWI_CKDIV_OFFSET 16 -+#define TWI_CKDIV_SIZE 3 -+ -+/* Bitfields in SR */ -+#define TWI_TXCOMP_OFFSET 0 -+#define TWI_TXCOMP_SIZE 1 -+#define TWI_RXRDY_OFFSET 1 -+#define TWI_RXRDY_SIZE 1 -+#define TWI_TXRDY_OFFSET 2 -+#define TWI_TXRDY_SIZE 1 -+#define TWI_SVDIR_OFFSET 3 -+#define TWI_SVDIR_SIZE 1 -+#define TWI_SVACC_OFFSET 4 -+#define TWI_SVACC_SIZE 1 -+#define TWI_GCACC_OFFSET 5 -+#define TWI_GCACC_SIZE 1 -+#define TWI_OVRE_OFFSET 6 -+#define TWI_OVRE_SIZE 1 -+#define TWI_UNRE_OFFSET 7 -+#define TWI_UNRE_SIZE 1 -+#define TWI_NACK_OFFSET 8 -+#define TWI_NACK_SIZE 1 -+#define TWI_ARBLST_OFFSET 9 -+#define TWI_ARBLST_SIZE 1 -+ -+/* Bitfields in RHR */ -+#define TWI_RXDATA_OFFSET 0 -+#define TWI_RXDATA_SIZE 8 -+ -+/* Bitfields in THR */ -+#define TWI_TXDATA_OFFSET 0 -+#define TWI_TXDATA_SIZE 8 -+ -+/* Constants for IADRSZ */ -+#define TWI_IADRSZ_NO_ADDR 0 -+#define TWI_IADRSZ_ONE_BYTE 1 -+#define TWI_IADRSZ_TWO_BYTES 2 -+#define TWI_IADRSZ_THREE_BYTES 3 -+ -+/* Bit manipulation macros */ -+#define TWI_BIT(name) \ -+ (1 << TWI_##name##_OFFSET) -+#define TWI_BF(name,value) \ -+ (((value) & ((1 << TWI_##name##_SIZE) - 1)) \ -+ << TWI_##name##_OFFSET) -+#define TWI_BFEXT(name,value) \ -+ (((value) >> TWI_##name##_OFFSET) \ -+ & ((1 << TWI_##name##_SIZE) - 1)) -+#define TWI_BFINS(name,value,old) \ -+ (((old) & ~(((1 << TWI_##name##_SIZE) - 1) \ -+ << TWI_##name##_OFFSET)) \ -+ | TWI_BF(name,value)) -+ -+/* Register access macros */ -+#define twi_readl(port,reg) \ -+ __raw_readl((port)->regs + TWI_##reg) -+#define twi_writel(port,reg,value) \ -+ __raw_writel((value), (port)->regs + TWI_##reg) -+ -+#endif /* __ASM_AVR32_TWI_H__ */ -diff --git a/drivers/i2c/busses/i2c-atmeltwi.c b/drivers/i2c/busses/i2c-atmeltwi.c -new file mode 100644 -index 0000000..9a3f223 ---- /dev/null -+++ b/drivers/i2c/busses/i2c-atmeltwi.c -@@ -0,0 +1,383 @@ -+/* -+ * i2c Support for Atmel's Two-Wire Interface (TWI) -+ * -+ * Based on the work of Copyright (C) 2004 Rick Bronson -+ * Converted to 2.6 by Andrew Victor <andrew at sanpeople.com> -+ * Ported to AVR32 and heavily modified by Espen Krangnes -+ * <ekrangnes at atmel.com> -+ * -+ * Copyright (C) 2006 Atmel Corporation -+ * -+ * Borrowed heavily from the original work by: -+ * Copyright (C) 2000 Philip Edelbrock <phil at stimpy.netroedge.com> -+ * -+ * Partialy rewriten by Karel Hojdar <cmkaho at seznam.cz> -+ * bugs removed, interrupt routine markedly rewritten -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License as published by -+ * the Free Software Foundation; either version 2 of the License, or -+ * (at your option) any later version. -+ */ -+ -+ -+#include <linux/err.h> -+#include <linux/module.h> -+#include <linux/kernel.h> -+#include <linux/slab.h> -+#include <linux/types.h> -+#include <linux/delay.h> -+#include <linux/i2c.h> -+#include <linux/init.h> -+#include <linux/clk.h> -+#include <linux/interrupt.h> -+#include <linux/irq.h> -+#include <linux/platform_device.h> -+#include <linux/completion.h> -+#include <asm/io.h> -+#include <linux/time.h> -+#include "atmeltwi.h" -+ -+static unsigned int baudrate = CONFIG_I2C_ATMELTWI_BAUDRATE; -+module_param(baudrate, uint, S_IRUSR | S_IWUSR | S_IRGRP | S_IWGRP); -+MODULE_PARM_DESC(baudrate, "The TWI baudrate"); -+ -+ -+struct atmel_twi { -+ void __iomem *regs; -+ struct i2c_adapter adapter; -+ struct clk *pclk; -+ spinlock_t lock; -+ struct completion comp; -+ u32 intmask; -+ u8 *buf; -+ u8 len; -+ u8 acks_left; -+ u8 nack; -+ unsigned int irq; -+ -+}; -+#define to_atmel_twi(adap) container_of(adap, struct atmel_twi, adapter) -+ -+/* -+ * Initialize the TWI hardware registers. -+ */ -+static int __devinit twi_hwinit(struct atmel_twi *twi) -+{ -+ unsigned long cdiv, ckdiv=0; -+ -+ twi_writel(twi, IDR, ~0UL); -+ twi_writel(twi, CR, TWI_BIT(SWRST)); /*Reset peripheral*/ -+ twi_readl(twi, SR); -+ -+ cdiv = (clk_get_rate(twi->pclk) / (2 * baudrate)) - 4; -+ -+ while (cdiv > 255) { -+ ckdiv++; -+ cdiv = cdiv >> 1; -+ } -+ -+ if (ckdiv > 7) -+ return -EINVAL; -+ else -+ twi_writel(twi, CWGR, (TWI_BF(CKDIV, ckdiv) -+ | TWI_BF(CHDIV, cdiv) -+ | TWI_BF(CLDIV, cdiv))); -+ return 0; -+} -+ -+/* -+ * Waits for the i2c status register to set the specified bitmask -+ * Returns 0 if timed out (~100ms). -+ */ -+static short twi_complete(struct atmel_twi *twi, u32 mask) -+{ -+ int timeout = msecs_to_jiffies(100); -+ -+ twi->intmask = mask; -+ init_completion(&twi->comp); -+ -+ twi_writel(twi, IER, mask); -+ -+ if (!wait_for_completion_timeout(&twi->comp, timeout)) { -+ /* RESET TWI interface */ -+ twi_writel(twi, CR, TWI_BIT(SWRST)); -+ -+ /* Reinitialize TWI */ -+ twi_hwinit(twi); -+ -+ return -ETIMEDOUT; -+ } -+ return 0; -+} -+ -+/* -+ * Generic i2c master transfer entrypoint. -+ */ -+static int twi_xfer(struct i2c_adapter *adap, struct i2c_msg msgs[], int num) -+{ -+ struct atmel_twi *twi = to_atmel_twi(adap); -+ struct i2c_msg *pmsg; -+ int i; -+ -+ /* get first message */ -+ pmsg = msgs; -+ -+ dev_dbg(&adap->dev, "twi_xfer: processing %d messages:\n", num); -+ -+ twi->nack = 0; -+ for (i = 0; i < num; i++, pmsg++) { -+ twi->len = pmsg->len; -+ twi->buf = pmsg->buf; -+ twi->acks_left = pmsg->len; -+ twi_writel(twi, MMR, TWI_BF(DADR, pmsg->addr) | -+ (pmsg->flags & I2C_M_RD ? TWI_BIT(MREAD) : 0)); -+ twi_writel(twi, IADR, TWI_BF(IADR, pmsg->addr)); -+ -+ dev_dbg(&adap->dev,"#%d: internal addr %d %s byte%s %s 0x%02x\n", -+ i,pmsg->len, pmsg->flags & I2C_M_RD ? "reading" : "writing", -+ pmsg->len > 1 ? "s" : "", -+ pmsg->flags & I2C_M_RD ? "from" : "to", pmsg->addr); -+ -+ /* enable */ -+ twi_writel(twi, CR, TWI_BIT(MSEN)); -+ -+ if (pmsg->flags & I2C_M_RD) { -+ if (twi->len == 1) -+ twi_writel(twi, CR, -+ TWI_BIT(START) | TWI_BIT(STOP)); -+ else -+ twi_writel(twi, CR, TWI_BIT(START)); -+ -+ if (twi_complete(twi, TWI_BIT(RXRDY)) == -ETIMEDOUT) { -+ dev_dbg(&adap->dev, "RXRDY timeout. Stopped with %d bytes left\n", -+ twi->acks_left); -+ return -ETIMEDOUT; -+ } -+ } else { -+ twi_writel(twi, THR, twi->buf[0]); -+ if (twi_complete(twi, TWI_BIT(TXRDY)) == -ETIMEDOUT) { -+ dev_dbg(&adap->dev, "TXRDY timeout. Stopped with %d bytes left\n", -+ twi->acks_left); -+ return -ETIMEDOUT; -+ } -+ -+ if (twi->nack) -+ return -ENODEV; -+ } -+ -+ /* Disable TWI interface */ -+ twi_writel(twi, CR, TWI_BIT(MSDIS)); -+ -+ } /* end cur msg */ -+ -+ return i; -+} -+ -+ -+static irqreturn_t twi_interrupt(int irq, void *dev_id) -+{ -+ struct atmel_twi *twi = dev_id; -+ int status = twi_readl(twi, SR); -+ -+ /* Save state for later debug prints */ -+ int old_mask = twi->intmask; -+ int old_status = status; -+ -+ if (twi->intmask & status) { -+ if (status & TWI_BIT(NACK)) -+ goto nack; -+ -+ status &= twi->intmask; -+ -+ if (status & TWI_BIT(TXCOMP)) -+ goto complete; -+ -+ else if (status & TWI_BIT(RXRDY)) { -+ if ( twi->acks_left > 0 ) { -+ twi->buf[twi->len - twi->acks_left] = -+ twi_readl(twi, RHR); -+ twi->acks_left--; -+ } -+ if ( twi->acks_left == 1 ) -+ twi_writel(twi, CR, TWI_BIT(STOP)); -+ -+ if (twi->acks_left == 0 ) { -+ twi->intmask = TWI_BIT(TXCOMP); -+ twi_writel(twi, IER, TWI_BIT(TXCOMP)); -+ } -+ } else if (status & TWI_BIT(TXRDY)) { -+ twi->acks_left--; -+ if ( twi->acks_left == 0 ) { -+ twi->intmask = TWI_BIT(TXCOMP); -+ twi_writel(twi, IER, TWI_BIT(TXCOMP)); -+ } else if (twi->acks_left > 0) -+ twi_writel(twi, THR, twi->buf[twi->len - twi->acks_left]); -+ } -+ } -+ -+ dev_dbg(&twi->adapter.dev, -+ "TWI ISR, SR 0x%08X, intmask 0x%08X, acks_left %i.\n", -+ old_status, old_mask, twi->acks_left); -+ -+ return IRQ_HANDLED; -+ -+nack: -+ dev_dbg(&twi->adapter.dev, "NACK received!\n"); -+ twi->nack = 1; -+ -+complete: -+ twi_writel(twi, IDR, ~0UL); -+ complete(&twi->comp); -+ -+ dev_dbg(&twi->adapter.dev, -+ "TWI ISR, SR 0x%08X, intmask 0x%08X, \ -+ acks_left %i - completed.\n", -+ old_status, old_mask, twi->acks_left); -+ -+ return IRQ_HANDLED; -+} -+ -+ -+/* -+ * Return list of supported functionality. -+ */ -+static u32 twi_func(struct i2c_adapter *adapter) -+{ -+ return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL; -+} -+ -+/* For now, we only handle combined mode (smbus) */ -+static struct i2c_algorithm twi_algorithm = { -+ .master_xfer = twi_xfer, -+ .functionality = twi_func, -+}; -+ -+/* -+ * Main initialization routine. -+ */ -+static int __devinit twi_probe(struct platform_device *pdev) -+{ -+ struct atmel_twi *twi; -+ struct resource *regs; -+ struct clk *pclk; -+ struct i2c_adapter *adapter; -+ int rc, irq; -+ -+ regs = platform_get_resource(pdev, IORESOURCE_MEM, 0); -+ if (!regs) -+ return -ENXIO; -+ -+ pclk = clk_get(&pdev->dev, "pclk"); -+ if (IS_ERR(pclk)) -+ return PTR_ERR(pclk); -+ clk_enable(pclk); -+ -+ rc = -ENOMEM; -+ twi = kzalloc(sizeof(struct atmel_twi), GFP_KERNEL); -+ if (!twi) { -+ dev_err(&pdev->dev, "can't allocate interface!\n"); -+ goto err_alloc_twi; -+ } -+ -+ twi->pclk = pclk; -+ twi->regs = ioremap(regs->start, regs->end - regs->start + 1); -+ if (!twi->regs) -+ goto err_ioremap; -+ -+ irq = platform_get_irq(pdev,0); -+ rc = request_irq(irq, twi_interrupt, 0, "twi", twi); -+ if (rc) { -+ dev_err(&pdev->dev, "can't bind irq!\n"); -+ goto err_irq; -+ } -+ twi->irq = irq; -+ -+ rc = twi_hwinit(twi); -+ if (rc) { -+ dev_err(&pdev->dev, "Unable to set baudrate\n"); -+ goto err_hw_init; -+ } -+ -+ adapter = &twi->adapter; -+ sprintf(adapter->name, "TWI"); -+ adapter->algo = &twi_algorithm; -+ adapter->class = I2C_CLASS_HWMON; -+ adapter->dev.parent = &pdev->dev; -+ -+ platform_set_drvdata(pdev, twi); -+ -+ rc = i2c_add_adapter(adapter); -+ if (rc) { -+ dev_err(&pdev->dev, "Adapter %s registration failed\n", -+ adapter->name); -+ goto err_register; -+ } -+ -+ dev_info(&pdev->dev, "Atmel TWI i2c bus device (baudrate %dk) at 0x%08lx.\n", -+ baudrate/1000, (unsigned long)regs->start); -+ -+ return 0; -+ -+ -+err_register: -+ platform_set_drvdata(pdev, NULL); -+ -+err_hw_init: -+ free_irq(irq, twi); -+ -+err_irq: -+ iounmap(twi->regs); -+ -+err_ioremap: -+ kfree(twi); -+ -+err_alloc_twi: -+ clk_disable(pclk); -+ clk_put(pclk); -+ -+ return rc; -+} -+ -+static int __devexit twi_remove(struct platform_device *pdev) -+{ -+ struct atmel_twi *twi = platform_get_drvdata(pdev); -+ int res; -+ -+ platform_set_drvdata(pdev, NULL); -+ res = i2c_del_adapter(&twi->adapter); -+ twi_writel(twi, CR, TWI_BIT(MSDIS)); -+ iounmap(twi->regs); -+ clk_disable(twi->pclk); -+ clk_put(twi->pclk); -+ free_irq(twi->irq, twi); -+ kfree(twi); -+ -+ return res; -+} -+ -+static struct platform_driver twi_driver = { -+ .probe = twi_probe, -+ .remove = __devexit_p(twi_remove), -+ .driver = { -+ .name = "atmel_twi", -+ .owner = THIS_MODULE, -+ }, -+}; -+ -+static int __init atmel_twi_init(void) -+{ -+ return platform_driver_register(&twi_driver); -+} -+ -+static void __exit atmel_twi_exit(void) -+{ -+ platform_driver_unregister(&twi_driver); -+} -+ -+module_init(atmel_twi_init); -+module_exit(atmel_twi_exit); -+ -+MODULE_AUTHOR("Espen Krangnes"); -+MODULE_DESCRIPTION("I2C driver for Atmel TWI"); -+MODULE_LICENSE("GPL"); -diff --git a/drivers/input/mouse/Kconfig b/drivers/input/mouse/Kconfig -index 50e06e8..7bbea09 100644 ---- a/drivers/input/mouse/Kconfig -+++ b/drivers/input/mouse/Kconfig -@@ -216,4 +216,20 @@ config MOUSE_HIL - help - Say Y here to support HIL pointers. - -+config MOUSE_GPIO -+ tristate "GPIO mouse" -+ depends on GENERIC_GPIO -+ select INPUT_POLLDEV -+ help -+ This driver simulates a mouse on GPIO lines of various CPUs (and some -+ other chips). -+ -+ Say Y here if your device has buttons or a simple joystick connected -+ directly to GPIO lines. Your board-specific setup logic must also -+ provide a platform device and platform data saying which GPIOs are -+ used. -+ -+ To compile this driver as a module, choose M here: the -+ module will be called gpio_mouse. -+ - endif -diff --git a/drivers/input/mouse/Makefile b/drivers/input/mouse/Makefile -index aa4ba87..9e6e363 100644 ---- a/drivers/input/mouse/Makefile -+++ b/drivers/input/mouse/Makefile -@@ -15,6 +15,7 @@ obj-$(CONFIG_MOUSE_PS2) += psmouse.o - obj-$(CONFIG_MOUSE_SERIAL) += sermouse.o - obj-$(CONFIG_MOUSE_HIL) += hil_ptr.o - obj-$(CONFIG_MOUSE_VSXXXAA) += vsxxxaa.o -+obj-$(CONFIG_MOUSE_GPIO) += gpio_mouse.o - - psmouse-objs := psmouse-base.o synaptics.o - -diff --git a/drivers/input/mouse/gpio_mouse.c b/drivers/input/mouse/gpio_mouse.c -new file mode 100644 -index 0000000..0936d6b ---- /dev/null -+++ b/drivers/input/mouse/gpio_mouse.c -@@ -0,0 +1,196 @@ -+/* -+ * Driver for simulating a mouse on GPIO lines. -+ * -+ * Copyright (C) 2007 Atmel Corporation -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 as -+ * published by the Free Software Foundation. -+ */ -+ -+#include <linux/init.h> -+#include <linux/version.h> -+#include <linux/module.h> -+#include <linux/platform_device.h> -+#include <linux/input-polldev.h> -+#include <linux/gpio_mouse.h> -+ -+#include <asm/gpio.h> -+ -+/* -+ * Timer function which is run every scan_ms ms when the device is opened. -+ * The dev input varaible is set to the the input_dev pointer. -+ */ -+static void gpio_mouse_scan(struct input_polled_dev *dev) -+{ -+ struct gpio_mouse_platform_data *gpio = dev->private; -+ struct input_dev *input = dev->input; -+ int x, y; -+ -+ if (gpio->bleft >= 0) -+ input_report_key(input, BTN_LEFT, -+ gpio_get_value(gpio->bleft) ^ gpio->polarity); -+ if (gpio->bmiddle >= 0) -+ input_report_key(input, BTN_MIDDLE, -+ gpio_get_value(gpio->bmiddle) ^ gpio->polarity); -+ if (gpio->bright >= 0) -+ input_report_key(input, BTN_RIGHT, -+ gpio_get_value(gpio->bright) ^ gpio->polarity); -+ -+ x = (gpio_get_value(gpio->right) ^ gpio->polarity) -+ - (gpio_get_value(gpio->left) ^ gpio->polarity); -+ y = (gpio_get_value(gpio->down) ^ gpio->polarity) -+ - (gpio_get_value(gpio->up) ^ gpio->polarity); -+ -+ input_report_rel(input, REL_X, x); -+ input_report_rel(input, REL_Y, y); -+ input_sync(input); -+} -+ -+static int __init gpio_mouse_probe(struct platform_device *pdev) -+{ -+ struct gpio_mouse_platform_data *pdata = pdev->dev.platform_data; -+ struct input_polled_dev *input_poll; -+ struct input_dev *input; -+ int pin, i; -+ int error; -+ -+ if (!pdata) { -+ dev_err(&pdev->dev, "no platform data\n"); -+ error = -ENXIO; -+ goto out; -+ } -+ -+ if (pdata->scan_ms < 0) { -+ dev_err(&pdev->dev, "invalid scan time\n"); -+ error = -EINVAL; -+ goto out; -+ } -+ -+ for (i = 0; i < GPIO_MOUSE_PIN_MAX; i++) { -+ pin = pdata->pins[i]; -+ -+ if (pin < 0) { -+ -+ if (i <= GPIO_MOUSE_PIN_RIGHT) { -+ /* Mouse direction is required. */ -+ dev_err(&pdev->dev, -+ "missing GPIO for directions\n"); -+ error = -EINVAL; -+ goto out_free_gpios; -+ } -+ -+ if (i == GPIO_MOUSE_PIN_BLEFT) -+ dev_dbg(&pdev->dev, "no left button defined\n"); -+ -+ } else { -+ error = gpio_request(pin, "gpio_mouse"); -+ if (error) { -+ dev_err(&pdev->dev, "fail %d pin (%d idx)\n", -+ pin, i); -+ goto out_free_gpios; -+ } -+ -+ gpio_direction_input(pin); -+ } -+ } -+ -+ input_poll = input_allocate_polled_device(); -+ if (!input_poll) { -+ dev_err(&pdev->dev, "not enough memory for input device\n"); -+ error = -ENOMEM; -+ goto out_free_gpios; -+ } -+ -+ platform_set_drvdata(pdev, input_poll); -+ -+ /* set input-polldev handlers */ -+ input_poll->private = pdata; -+ input_poll->poll = gpio_mouse_scan; -+ input_poll->poll_interval = pdata->scan_ms; -+ -+ input = input_poll->input; -+ input->name = pdev->name; -+ input->id.bustype = BUS_HOST; -+ input->dev.parent = &pdev->dev; -+ -+ input_set_capability(input, EV_REL, REL_X); -+ input_set_capability(input, EV_REL, REL_Y); -+ if (pdata->bleft >= 0) -+ input_set_capability(input, EV_KEY, BTN_LEFT); -+ if (pdata->bmiddle >= 0) -+ input_set_capability(input, EV_KEY, BTN_MIDDLE); -+ if (pdata->bright >= 0) -+ input_set_capability(input, EV_KEY, BTN_RIGHT); -+ -+ error = input_register_polled_device(input_poll); -+ if (error) { -+ dev_err(&pdev->dev, "could not register input device\n"); -+ goto out_free_polldev; -+ } -+ -+ dev_dbg(&pdev->dev, "%d ms scan time, buttons: %s%s%s\n", -+ pdata->scan_ms, -+ pdata->bleft < 0 ? "" : "left ", -+ pdata->bmiddle < 0 ? "" : "middle ", -+ pdata->bright < 0 ? "" : "right"); -+ -+ return 0; -+ -+ out_free_polldev: -+ input_free_polled_device(input_poll); -+ platform_set_drvdata(pdev, NULL); -+ -+ out_free_gpios: -+ while (--i >= 0) { -+ pin = pdata->pins[i]; -+ if (pin) -+ gpio_free(pin); -+ } -+ out: -+ return error; -+} -+ -+static int __devexit gpio_mouse_remove(struct platform_device *pdev) -+{ -+ struct input_polled_dev *input = platform_get_drvdata(pdev); -+ struct gpio_mouse_platform_data *pdata = input->private; -+ int pin, i; -+ -+ input_unregister_polled_device(input); -+ input_free_polled_device(input); -+ -+ for (i = 0; i < GPIO_MOUSE_PIN_MAX; i++) { -+ pin = pdata->pins[i]; -+ if (pin >= 0) -+ gpio_free(pin); -+ } -+ -+ platform_set_drvdata(pdev, NULL); -+ -+ return 0; -+} -+ -+struct platform_driver gpio_mouse_device_driver = { -+ .remove = __devexit_p(gpio_mouse_remove), -+ .driver = { -+ .name = "gpio_mouse", -+ } -+}; -+ -+static int __init gpio_mouse_init(void) -+{ -+ return platform_driver_probe(&gpio_mouse_device_driver, -+ gpio_mouse_probe); -+} -+module_init(gpio_mouse_init); -+ -+static void __exit gpio_mouse_exit(void) -+{ -+ platform_driver_unregister(&gpio_mouse_device_driver); -+} -+module_exit(gpio_mouse_exit); -+ -+MODULE_AUTHOR("Hans-Christian Egtvedt <hcegtvedt@atmel.com>"); -+MODULE_DESCRIPTION("GPIO mouse driver"); -+MODULE_LICENSE("GPL"); -diff --git a/drivers/leds/Kconfig b/drivers/leds/Kconfig -index 87d2046..9ce3ca1 100644 ---- a/drivers/leds/Kconfig -+++ b/drivers/leds/Kconfig -@@ -95,6 +95,14 @@ config LEDS_COBALT - help - This option enables support for the front LED on Cobalt Server - -+config LEDS_GPIO -+ tristate "LED Support for GPIO connected LEDs" -+ depends on LEDS_CLASS && GENERIC_GPIO -+ help -+ This option enables support for the LEDs connected to GPIO -+ outputs. To be useful the particular board must have LEDs -+ and they must be connected to the GPIO lines. -+ - comment "LED Triggers" - - config LEDS_TRIGGERS -diff --git a/drivers/leds/Makefile b/drivers/leds/Makefile -index aa2c18e..f8995c9 100644 ---- a/drivers/leds/Makefile -+++ b/drivers/leds/Makefile -@@ -16,6 +16,7 @@ obj-$(CONFIG_LEDS_NET48XX) += leds-net48xx.o - obj-$(CONFIG_LEDS_WRAP) += leds-wrap.o - obj-$(CONFIG_LEDS_H1940) += leds-h1940.o - obj-$(CONFIG_LEDS_COBALT) += leds-cobalt.o -+obj-$(CONFIG_LEDS_GPIO) += leds-gpio.o - - # LED Triggers - obj-$(CONFIG_LEDS_TRIGGER_TIMER) += ledtrig-timer.o -diff --git a/drivers/leds/leds-gpio.c b/drivers/leds/leds-gpio.c -new file mode 100644 -index 0000000..47d90db ---- /dev/null -+++ b/drivers/leds/leds-gpio.c -@@ -0,0 +1,199 @@ -+/* -+ * LEDs driver for GPIOs -+ * -+ * Copyright (C) 2007 8D Technologies inc. -+ * Raphael Assenat <raph@8d.com> -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 as -+ * published by the Free Software Foundation. -+ * -+ */ -+#include <linux/kernel.h> -+#include <linux/init.h> -+#include <linux/platform_device.h> -+#include <linux/leds.h> -+#include <linux/workqueue.h> -+ -+#include <asm/gpio.h> -+ -+struct gpio_led_data { -+ struct led_classdev cdev; -+ unsigned gpio; -+ struct work_struct work; -+ u8 new_level; -+ u8 can_sleep; -+ u8 active_low; -+}; -+ -+static void gpio_led_work(struct work_struct *work) -+{ -+ struct gpio_led_data *led_dat = -+ container_of(work, struct gpio_led_data, work); -+ -+ gpio_set_value_cansleep(led_dat->gpio, led_dat->new_level); -+} -+ -+static void gpio_led_set(struct led_classdev *led_cdev, -+ enum led_brightness value) -+{ -+ struct gpio_led_data *led_dat = -+ container_of(led_cdev, struct gpio_led_data, cdev); -+ int level; -+ -+ if (value == LED_OFF) -+ level = 0; -+ else -+ level = 1; -+ -+ if (led_dat->active_low) -+ level = !level; -+ -+ /* setting GPIOs with I2C/etc requires a preemptible task context */ -+ if (led_dat->can_sleep) { -+ if (preempt_count()) { -+ led_dat->new_level = level; -+ schedule_work(&led_dat->work); -+ } else -+ gpio_set_value_cansleep(led_dat->gpio, level); -+ } else -+ gpio_set_value(led_dat->gpio, level); -+} -+ -+static int __init gpio_led_probe(struct platform_device *pdev) -+{ -+ struct gpio_led_platform_data *pdata = pdev->dev.platform_data; -+ struct gpio_led *cur_led; -+ struct gpio_led_data *leds_data, *led_dat; -+ int i, ret = 0; -+ -+ if (!pdata) -+ return -EBUSY; -+ -+ leds_data = kzalloc(sizeof(struct gpio_led_data) * pdata->num_leds, -+ GFP_KERNEL); -+ if (!leds_data) -+ return -ENOMEM; -+ -+ for (i = 0; i < pdata->num_leds; i++) { -+ cur_led = &pdata->leds[i]; -+ led_dat = &leds_data[i]; -+ -+ led_dat->cdev.name = cur_led->name; -+ led_dat->cdev.default_trigger = cur_led->default_trigger; -+ led_dat->gpio = cur_led->gpio; -+ led_dat->can_sleep = gpio_cansleep(cur_led->gpio); -+ led_dat->active_low = cur_led->active_low; -+ led_dat->cdev.brightness_set = gpio_led_set; -+ led_dat->cdev.brightness = cur_led->active_low ? LED_FULL : LED_OFF; -+ -+ ret = gpio_request(led_dat->gpio, led_dat->cdev.name); -+ if (ret < 0) -+ goto err; -+ -+ gpio_direction_output(led_dat->gpio, led_dat->active_low); -+ -+ ret = led_classdev_register(&pdev->dev, &led_dat->cdev); -+ if (ret < 0) { -+ gpio_free(led_dat->gpio); -+ goto err; -+ } -+ -+ INIT_WORK(&led_dat->work, gpio_led_work); -+ } -+ -+ platform_set_drvdata(pdev, leds_data); -+ -+ return 0; -+ -+err: -+ if (i > 0) { -+ for (i = i - 1; i >= 0; i--) { -+ led_classdev_unregister(&leds_data[i].cdev); -+ gpio_free(leds_data[i].gpio); -+ } -+ } -+ -+ flush_scheduled_work(); -+ kfree(leds_data); -+ -+ return ret; -+} -+ -+static int __exit gpio_led_remove(struct platform_device *pdev) -+{ -+ int i; -+ struct gpio_led_platform_data *pdata = pdev->dev.platform_data; -+ struct gpio_led_data *leds_data; -+ -+ leds_data = platform_get_drvdata(pdev); -+ -+ for (i = 0; i < pdata->num_leds; i++) { -+ led_classdev_unregister(&leds_data[i].cdev); -+ gpio_free(leds_data[i].gpio); -+ } -+ -+ kfree(leds_data); -+ -+ return 0; -+} -+ -+#ifdef CONFIG_PM -+static int gpio_led_suspend(struct platform_device *pdev, pm_message_t state) -+{ -+ struct gpio_led_platform_data *pdata = pdev->dev.platform_data; -+ struct gpio_led_data *leds_data; -+ int i; -+ -+ leds_data = platform_get_drvdata(pdev); -+ -+ for (i = 0; i < pdata->num_leds; i++) -+ led_classdev_suspend(&leds_data[i].cdev); -+ -+ return 0; -+} -+ -+static int gpio_led_resume(struct platform_device *pdev) -+{ -+ struct gpio_led_platform_data *pdata = pdev->dev.platform_data; -+ struct gpio_led_data *leds_data; -+ int i; -+ -+ leds_data = platform_get_drvdata(pdev); -+ -+ for (i = 0; i < pdata->num_leds; i++) -+ led_classdev_resume(&leds_data[i].cdev); -+ -+ return 0; -+} -+#else -+#define gpio_led_suspend NULL -+#define gpio_led_resume NULL -+#endif -+ -+static struct platform_driver gpio_led_driver = { -+ .remove = __exit_p(gpio_led_remove), -+ .suspend = gpio_led_suspend, -+ .resume = gpio_led_resume, -+ .driver = { -+ .name = "leds-gpio", -+ .owner = THIS_MODULE, -+ }, -+}; -+ -+static int __init gpio_led_init(void) -+{ -+ return platform_driver_probe(&gpio_led_driver, gpio_led_probe); -+} -+ -+static void __exit gpio_led_exit(void) -+{ -+ platform_driver_unregister(&gpio_led_driver); -+} -+ -+module_init(gpio_led_init); -+module_exit(gpio_led_exit); -+ -+MODULE_AUTHOR("Raphael Assenat <raph@8d.com>"); -+MODULE_DESCRIPTION("GPIO LED driver"); -+MODULE_LICENSE("GPL"); -diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig -index 616eee9..0810d83 100644 ---- a/drivers/misc/Kconfig -+++ b/drivers/misc/Kconfig -@@ -187,5 +187,15 @@ config THINKPAD_ACPI_BAY - - If you are not sure, say Y here. - -+config ATMEL_SSC -+ tristate "Device driver for Atmel SSC peripheral" -+ depends on AVR32 || ARCH_AT91 -+ ---help--- -+ This option enables device driver support for Atmel Syncronized -+ Serial Communication peripheral (SSC). -+ -+ The SSC peripheral supports a wide variety of serial frame based -+ communications, i.e. I2S, SPI, etc. - -+ If unsure, say N. - endmenu -diff --git a/drivers/misc/Makefile b/drivers/misc/Makefile -index 8abbf2f..2d52cc6 100644 ---- a/drivers/misc/Makefile -+++ b/drivers/misc/Makefile -@@ -14,3 +14,4 @@ obj-$(CONFIG_PHANTOM) += phantom.o - obj-$(CONFIG_SGI_IOC4) += ioc4.o - obj-$(CONFIG_SONY_LAPTOP) += sony-laptop.o - obj-$(CONFIG_THINKPAD_ACPI) += thinkpad_acpi.o -+obj-$(CONFIG_ATMEL_SSC) += atmel-ssc.o -diff --git a/drivers/misc/atmel-ssc.c b/drivers/misc/atmel-ssc.c -new file mode 100644 -index 0000000..058ccac ---- /dev/null -+++ b/drivers/misc/atmel-ssc.c -@@ -0,0 +1,174 @@ -+/* -+ * Atmel SSC driver -+ * -+ * Copyright (C) 2007 Atmel Corporation -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 as -+ * published by the Free Software Foundation. -+ */ -+ -+#include <linux/platform_device.h> -+#include <linux/list.h> -+#include <linux/clk.h> -+#include <linux/err.h> -+#include <linux/io.h> -+#include <linux/list.h> -+#include <linux/spinlock.h> -+#include <linux/atmel-ssc.h> -+ -+/* Serialize access to ssc_list and user count */ -+static DEFINE_SPINLOCK(user_lock); -+static LIST_HEAD(ssc_list); -+ -+struct ssc_device *ssc_request(unsigned int ssc_num) -+{ -+ int ssc_valid = 0; -+ struct ssc_device *ssc; -+ -+ spin_lock(&user_lock); -+ list_for_each_entry(ssc, &ssc_list, list) { -+ if (ssc->pdev->id == ssc_num) { -+ ssc_valid = 1; -+ break; -+ } -+ } -+ -+ if (!ssc_valid) { -+ spin_unlock(&user_lock); -+ dev_dbg(&ssc->pdev->dev, "could not find requested device\n"); -+ return ERR_PTR(-ENODEV); -+ } -+ -+ if (ssc->user) { -+ spin_unlock(&user_lock); -+ dev_dbg(&ssc->pdev->dev, "module busy\n"); -+ return ERR_PTR(-EBUSY); -+ } -+ ssc->user++; -+ spin_unlock(&user_lock); -+ -+ clk_enable(ssc->clk); -+ -+ return ssc; -+} -+EXPORT_SYMBOL(ssc_request); -+ -+void ssc_free(struct ssc_device *ssc) -+{ -+ spin_lock(&user_lock); -+ if (ssc->user) { -+ ssc->user--; -+ clk_disable(ssc->clk); -+ } else { -+ dev_dbg(&ssc->pdev->dev, "device already free\n"); -+ } -+ spin_unlock(&user_lock); -+} -+EXPORT_SYMBOL(ssc_free); -+ -+static int __init ssc_probe(struct platform_device *pdev) -+{ -+ int retval = 0; -+ struct resource *regs; -+ struct ssc_device *ssc; -+ -+ ssc = kzalloc(sizeof(struct ssc_device), GFP_KERNEL); -+ if (!ssc) { -+ dev_dbg(&pdev->dev, "out of memory\n"); -+ retval = -ENOMEM; -+ goto out; -+ } -+ -+ regs = platform_get_resource(pdev, IORESOURCE_MEM, 0); -+ if (!regs) { -+ dev_dbg(&pdev->dev, "no mmio resource defined\n"); -+ retval = -ENXIO; -+ goto out_free; -+ } -+ -+ ssc->clk = clk_get(&pdev->dev, "pclk"); -+ if (IS_ERR(ssc->clk)) { -+ dev_dbg(&pdev->dev, "no pclk clock defined\n"); -+ retval = -ENXIO; -+ goto out_free; -+ } -+ -+ ssc->pdev = pdev; -+ ssc->regs = ioremap(regs->start, regs->end - regs->start + 1); -+ if (!ssc->regs) { -+ dev_dbg(&pdev->dev, "ioremap failed\n"); -+ retval = -EINVAL; -+ goto out_clk; -+ } -+ -+ /* disable all interrupts */ -+ clk_enable(ssc->clk); -+ ssc_writel(ssc->regs, IDR, ~0UL); -+ ssc_readl(ssc->regs, SR); -+ clk_disable(ssc->clk); -+ -+ ssc->irq = platform_get_irq(pdev, 0); -+ if (!ssc->irq) { -+ dev_dbg(&pdev->dev, "could not get irq\n"); -+ retval = -ENXIO; -+ goto out_unmap; -+ } -+ -+ spin_lock(&user_lock); -+ list_add_tail(&ssc->list, &ssc_list); -+ spin_unlock(&user_lock); -+ -+ platform_set_drvdata(pdev, ssc); -+ -+ dev_info(&pdev->dev, "Atmel SSC device at 0x%p (irq %d)\n", -+ ssc->regs, ssc->irq); -+ -+ goto out; -+ -+out_unmap: -+ iounmap(ssc->regs); -+out_clk: -+ clk_put(ssc->clk); -+out_free: -+ kfree(ssc); -+out: -+ return retval; -+} -+ -+static int __devexit ssc_remove(struct platform_device *pdev) -+{ -+ struct ssc_device *ssc = platform_get_drvdata(pdev); -+ -+ spin_lock(&user_lock); -+ iounmap(ssc->regs); -+ clk_put(ssc->clk); -+ list_del(&ssc->list); -+ kfree(ssc); -+ spin_unlock(&user_lock); -+ -+ return 0; -+} -+ -+static struct platform_driver ssc_driver = { -+ .remove = __devexit_p(ssc_remove), -+ .driver = { -+ .name = "ssc", -+ }, -+}; -+ -+static int __init ssc_init(void) -+{ -+ return platform_driver_probe(&ssc_driver, ssc_probe); -+} -+module_init(ssc_init); -+ -+static void __exit ssc_exit(void) -+{ -+ platform_driver_unregister(&ssc_driver); -+} -+module_exit(ssc_exit); -+ -+MODULE_AUTHOR("Hans-Christian Egtvedt <hcegtvedt@atmel.com>"); -+MODULE_DESCRIPTION("SSC driver for Atmel AVR32 and AT91"); -+MODULE_LICENSE("GPL"); -diff --git a/drivers/mmc/host/Kconfig b/drivers/mmc/host/Kconfig -index e23082f..1de1716 100644 ---- a/drivers/mmc/host/Kconfig -+++ b/drivers/mmc/host/Kconfig -@@ -74,6 +74,16 @@ config MMC_AT91 - - If unsure, say N. - -+config MMC_ATMELMCI -+ tristate "Atmel Multimedia Card Interface support" -+ depends on AVR32 && MMC -+ help -+ This selects the Atmel Multimedia Card Interface. If you have -+ a AT91 (ARM) or AT32 (AVR32) platform with a Multimedia Card -+ slot, say Y or M here. -+ -+ If unsure, say N. -+ - config MMC_IMX - tristate "Motorola i.MX Multimedia Card Interface support" - depends on ARCH_IMX -diff --git a/drivers/mmc/host/Makefile b/drivers/mmc/host/Makefile -index 6685f64..4b8e6e2 100644 ---- a/drivers/mmc/host/Makefile -+++ b/drivers/mmc/host/Makefile -@@ -14,5 +14,6 @@ obj-$(CONFIG_MMC_WBSD) += wbsd.o - obj-$(CONFIG_MMC_AU1X) += au1xmmc.o - obj-$(CONFIG_MMC_OMAP) += omap.o - obj-$(CONFIG_MMC_AT91) += at91_mci.o -+obj-$(CONFIG_MMC_ATMELMCI) += atmel-mci.o - obj-$(CONFIG_MMC_TIFM_SD) += tifm_sd.o - -diff --git a/drivers/mmc/host/atmel-mci.c b/drivers/mmc/host/atmel-mci.c -new file mode 100644 -index 0000000..74d343f ---- /dev/null -+++ b/drivers/mmc/host/atmel-mci.c -@@ -0,0 +1,1217 @@ -+/* -+ * Atmel MultiMedia Card Interface driver -+ * -+ * Copyright (C) 2004-2006 Atmel Corporation -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 as -+ * published by the Free Software Foundation. -+ */ -+#include <linux/blkdev.h> -+#include <linux/clk.h> -+#include <linux/device.h> -+#include <linux/dma-mapping.h> -+#include <linux/init.h> -+#include <linux/interrupt.h> -+#include <linux/ioport.h> -+#include <linux/module.h> -+#include <linux/platform_device.h> -+ -+#include <linux/mmc/host.h> -+ -+#include <asm/dma-controller.h> -+#include <asm/io.h> -+#include <asm/arch/board.h> -+#include <asm/arch/gpio.h> -+ -+#include "atmel-mci.h" -+ -+#define DRIVER_NAME "atmel_mci" -+ -+#define MCI_CMD_ERROR_FLAGS (MCI_BIT(RINDE) | MCI_BIT(RDIRE) | \ -+ MCI_BIT(RCRCE) | MCI_BIT(RENDE) | \ -+ MCI_BIT(RTOE)) -+#define MCI_DATA_ERROR_FLAGS (MCI_BIT(DCRCE) | MCI_BIT(DTOE) | \ -+ MCI_BIT(OVRE) | MCI_BIT(UNRE)) -+ -+enum { -+ EVENT_CMD_COMPLETE = 0, -+ EVENT_CMD_ERROR, -+ EVENT_DATA_COMPLETE, -+ EVENT_DATA_ERROR, -+ EVENT_STOP_SENT, -+ EVENT_STOP_COMPLETE, -+ EVENT_STOP_ERROR, -+ EVENT_DMA_ERROR, -+ EVENT_CARD_DETECT, -+}; -+ -+struct atmel_mci_dma { -+ struct dma_request_sg req; -+ unsigned short rx_periph_id; -+ unsigned short tx_periph_id; -+}; -+ -+struct atmel_mci { -+ struct mmc_host *mmc; -+ void __iomem *regs; -+ struct atmel_mci_dma dma; -+ -+ struct mmc_request *mrq; -+ struct mmc_command *cmd; -+ struct mmc_data *data; -+ -+ u32 stop_cmdr; -+ u32 stop_iflags; -+ -+ struct tasklet_struct tasklet; -+ unsigned long pending_events; -+ unsigned long completed_events; -+ u32 error_status; -+ -+ int present; -+ int detect_pin; -+ int wp_pin; -+ -+ unsigned long bus_hz; -+ unsigned long mapbase; -+ struct clk *mck; -+ struct platform_device *pdev; -+ -+#ifdef CONFIG_DEBUG_FS -+ struct dentry *debugfs_root; -+ struct dentry *debugfs_regs; -+ struct dentry *debugfs_req; -+ struct dentry *debugfs_pending_events; -+ struct dentry *debugfs_completed_events; -+#endif -+}; -+ -+/* Those printks take an awful lot of time... */ -+#ifndef DEBUG -+static unsigned int fmax = 15000000U; -+#else -+static unsigned int fmax = 1000000U; -+#endif -+module_param(fmax, uint, 0444); -+MODULE_PARM_DESC(fmax, "Max frequency in Hz of the MMC bus clock"); -+ -+/* Test bit macros for completed events */ -+#define mci_cmd_is_complete(host) \ -+ test_bit(EVENT_CMD_COMPLETE, &host->completed_events) -+#define mci_cmd_error_is_complete(host) \ -+ test_bit(EVENT_CMD_ERROR, &host->completed_events) -+#define mci_data_is_complete(host) \ -+ test_bit(EVENT_DATA_COMPLETE, &host->completed_events) -+#define mci_data_error_is_complete(host) \ -+ test_bit(EVENT_DATA_ERROR, &host->completed_events) -+#define mci_stop_sent_is_complete(host) \ -+ test_bit(EVENT_STOP_SENT, &host->completed_events) -+#define mci_stop_is_complete(host) \ -+ test_bit(EVENT_STOP_COMPLETE, &host->completed_events) -+#define mci_stop_error_is_complete(host) \ -+ test_bit(EVENT_STOP_ERROR, &host->completed_events) -+#define mci_dma_error_is_complete(host) \ -+ test_bit(EVENT_DMA_ERROR, &host->completed_events) -+#define mci_card_detect_is_complete(host) \ -+ test_bit(EVENT_CARD_DETECT, &host->completed_events) -+ -+/* Test and clear bit macros for pending events */ -+#define mci_clear_cmd_is_pending(host) \ -+ test_and_clear_bit(EVENT_CMD_COMPLETE, &host->pending_events) -+#define mci_clear_cmd_error_is_pending(host) \ -+ test_and_clear_bit(EVENT_CMD_ERROR, &host->pending_events) -+#define mci_clear_data_is_pending(host) \ -+ test_and_clear_bit(EVENT_DATA_COMPLETE, &host->pending_events) -+#define mci_clear_data_error_is_pending(host) \ -+ test_and_clear_bit(EVENT_DATA_ERROR, &host->pending_events) -+#define mci_clear_stop_sent_is_pending(host) \ -+ test_and_clear_bit(EVENT_STOP_SENT, &host->pending_events) -+#define mci_clear_stop_is_pending(host) \ -+ test_and_clear_bit(EVENT_STOP_COMPLETE, &host->pending_events) -+#define mci_clear_stop_error_is_pending(host) \ -+ test_and_clear_bit(EVENT_STOP_ERROR, &host->pending_events) -+#define mci_clear_dma_error_is_pending(host) \ -+ test_and_clear_bit(EVENT_DMA_ERROR, &host->pending_events) -+#define mci_clear_card_detect_is_pending(host) \ -+ test_and_clear_bit(EVENT_CARD_DETECT, &host->pending_events) -+ -+/* Test and set bit macros for completed events */ -+#define mci_set_cmd_is_completed(host) \ -+ test_and_set_bit(EVENT_CMD_COMPLETE, &host->completed_events) -+#define mci_set_cmd_error_is_completed(host) \ -+ test_and_set_bit(EVENT_CMD_ERROR, &host->completed_events) -+#define mci_set_data_is_completed(host) \ -+ test_and_set_bit(EVENT_DATA_COMPLETE, &host->completed_events) -+#define mci_set_data_error_is_completed(host) \ -+ test_and_set_bit(EVENT_DATA_ERROR, &host->completed_events) -+#define mci_set_stop_sent_is_completed(host) \ -+ test_and_set_bit(EVENT_STOP_SENT, &host->completed_events) -+#define mci_set_stop_is_completed(host) \ -+ test_and_set_bit(EVENT_STOP_COMPLETE, &host->completed_events) -+#define mci_set_stop_error_is_completed(host) \ -+ test_and_set_bit(EVENT_STOP_ERROR, &host->completed_events) -+#define mci_set_dma_error_is_completed(host) \ -+ test_and_set_bit(EVENT_DMA_ERROR, &host->completed_events) -+#define mci_set_card_detect_is_completed(host) \ -+ test_and_set_bit(EVENT_CARD_DETECT, &host->completed_events) -+ -+/* Set bit macros for completed events */ -+#define mci_set_cmd_complete(host) \ -+ set_bit(EVENT_CMD_COMPLETE, &host->completed_events) -+#define mci_set_cmd_error_complete(host) \ -+ set_bit(EVENT_CMD_ERROR, &host->completed_events) -+#define mci_set_data_complete(host) \ -+ set_bit(EVENT_DATA_COMPLETE, &host->completed_events) -+#define mci_set_data_error_complete(host) \ -+ set_bit(EVENT_DATA_ERROR, &host->completed_events) -+#define mci_set_stop_sent_complete(host) \ -+ set_bit(EVENT_STOP_SENT, &host->completed_events) -+#define mci_set_stop_complete(host) \ -+ set_bit(EVENT_STOP_COMPLETE, &host->completed_events) -+#define mci_set_stop_error_complete(host) \ -+ set_bit(EVENT_STOP_ERROR, &host->completed_events) -+#define mci_set_dma_error_complete(host) \ -+ set_bit(EVENT_DMA_ERROR, &host->completed_events) -+#define mci_set_card_detect_complete(host) \ -+ set_bit(EVENT_CARD_DETECT, &host->completed_events) -+ -+/* Set bit macros for pending events */ -+#define mci_set_cmd_pending(host) \ -+ set_bit(EVENT_CMD_COMPLETE, &host->pending_events) -+#define mci_set_cmd_error_pending(host) \ -+ set_bit(EVENT_CMD_ERROR, &host->pending_events) -+#define mci_set_data_pending(host) \ -+ set_bit(EVENT_DATA_COMPLETE, &host->pending_events) -+#define mci_set_data_error_pending(host) \ -+ set_bit(EVENT_DATA_ERROR, &host->pending_events) -+#define mci_set_stop_sent_pending(host) \ -+ set_bit(EVENT_STOP_SENT, &host->pending_events) -+#define mci_set_stop_pending(host) \ -+ set_bit(EVENT_STOP_COMPLETE, &host->pending_events) -+#define mci_set_stop_error_pending(host) \ -+ set_bit(EVENT_STOP_ERROR, &host->pending_events) -+#define mci_set_dma_error_pending(host) \ -+ set_bit(EVENT_DMA_ERROR, &host->pending_events) -+#define mci_set_card_detect_pending(host) \ -+ set_bit(EVENT_CARD_DETECT, &host->pending_events) -+ -+/* Clear bit macros for pending events */ -+#define mci_clear_cmd_pending(host) \ -+ clear_bit(EVENT_CMD_COMPLETE, &host->pending_events) -+#define mci_clear_cmd_error_pending(host) \ -+ clear_bit(EVENT_CMD_ERROR, &host->pending_events) -+#define mci_clear_data_pending(host) \ -+ clear_bit(EVENT_DATA_COMPLETE, &host->pending_events) -+#define mci_clear_data_error_pending(host) \ -+ clear_bit(EVENT_DATA_ERROR, &host->pending_events) -+#define mci_clear_stop_sent_pending(host) \ -+ clear_bit(EVENT_STOP_SENT, &host->pending_events) -+#define mci_clear_stop_pending(host) \ -+ clear_bit(EVENT_STOP_COMPLETE, &host->pending_events) -+#define mci_clear_stop_error_pending(host) \ -+ clear_bit(EVENT_STOP_ERROR, &host->pending_events) -+#define mci_clear_dma_error_pending(host) \ -+ clear_bit(EVENT_DMA_ERROR, &host->pending_events) -+#define mci_clear_card_detect_pending(host) \ -+ clear_bit(EVENT_CARD_DETECT, &host->pending_events) -+ -+ -+#ifdef CONFIG_DEBUG_FS -+#include <linux/debugfs.h> -+ -+#define DBG_REQ_BUF_SIZE (4096 - sizeof(unsigned int)) -+ -+struct req_dbg_data { -+ unsigned int nbytes; -+ char str[DBG_REQ_BUF_SIZE]; -+}; -+ -+static int req_dbg_open(struct inode *inode, struct file *file) -+{ -+ struct atmel_mci *host; -+ struct mmc_request *mrq; -+ struct mmc_command *cmd, *stop; -+ struct mmc_data *data; -+ struct req_dbg_data *priv; -+ char *str; -+ unsigned long n = 0; -+ -+ priv = kzalloc(DBG_REQ_BUF_SIZE, GFP_KERNEL); -+ if (!priv) -+ return -ENOMEM; -+ str = priv->str; -+ -+ mutex_lock(&inode->i_mutex); -+ host = inode->i_private; -+ -+ spin_lock_irq(&host->mmc->lock); -+ mrq = host->mrq; -+ if (mrq) { -+ cmd = mrq->cmd; -+ data = mrq->data; -+ stop = mrq->stop; -+ n = snprintf(str, DBG_REQ_BUF_SIZE, -+ "CMD%u(0x%x) %x %x %x %x %x (err %u)\n", -+ cmd->opcode, cmd->arg, cmd->flags, -+ cmd->resp[0], cmd->resp[1], cmd->resp[2], -+ cmd->resp[3], cmd->error); -+ if (n < DBG_REQ_BUF_SIZE && data) -+ n += snprintf(str + n, DBG_REQ_BUF_SIZE - n, -+ "DATA %u * %u (%u) %x (err %u)\n", -+ data->blocks, data->blksz, -+ data->bytes_xfered, data->flags, -+ data->error); -+ if (n < DBG_REQ_BUF_SIZE && stop) -+ n += snprintf(str + n, DBG_REQ_BUF_SIZE - n, -+ "CMD%u(0x%x) %x %x %x %x %x (err %u)\n", -+ stop->opcode, stop->arg, stop->flags, -+ stop->resp[0], stop->resp[1], -+ stop->resp[2], stop->resp[3], -+ stop->error); -+ } -+ spin_unlock_irq(&host->mmc->lock); -+ mutex_unlock(&inode->i_mutex); -+ -+ priv->nbytes = min(n, DBG_REQ_BUF_SIZE); -+ file->private_data = priv; -+ -+ return 0; -+} -+ -+static ssize_t req_dbg_read(struct file *file, char __user *buf, -+ size_t nbytes, loff_t *ppos) -+{ -+ struct req_dbg_data *priv = file->private_data; -+ -+ return simple_read_from_buffer(buf, nbytes, ppos, -+ priv->str, priv->nbytes); -+} -+ -+static int req_dbg_release(struct inode *inode, struct file *file) -+{ -+ kfree(file->private_data); -+ return 0; -+} -+ -+static const struct file_operations req_dbg_fops = { -+ .owner = THIS_MODULE, -+ .open = req_dbg_open, -+ .llseek = no_llseek, -+ .read = req_dbg_read, -+ .release = req_dbg_release, -+}; -+ -+static int regs_dbg_open(struct inode *inode, struct file *file) -+{ -+ struct atmel_mci *host; -+ unsigned int i; -+ u32 *data; -+ int ret = -ENOMEM; -+ -+ mutex_lock(&inode->i_mutex); -+ host = inode->i_private; -+ data = kmalloc(inode->i_size, GFP_KERNEL); -+ if (!data) -+ goto out; -+ -+ spin_lock_irq(&host->mmc->lock); -+ for (i = 0; i < inode->i_size / 4; i++) -+ data[i] = __raw_readl(host->regs + i * 4); -+ spin_unlock_irq(&host->mmc->lock); -+ -+ file->private_data = data; -+ ret = 0; -+ -+out: -+ mutex_unlock(&inode->i_mutex); -+ -+ return ret; -+} -+ -+static ssize_t regs_dbg_read(struct file *file, char __user *buf, -+ size_t nbytes, loff_t *ppos) -+{ -+ struct inode *inode = file->f_dentry->d_inode; -+ int ret; -+ -+ mutex_lock(&inode->i_mutex); -+ ret = simple_read_from_buffer(buf, nbytes, ppos, -+ file->private_data, -+ file->f_dentry->d_inode->i_size); -+ mutex_unlock(&inode->i_mutex); -+ -+ return ret; -+} -+ -+static int regs_dbg_release(struct inode *inode, struct file *file) -+{ -+ kfree(file->private_data); -+ return 0; -+} -+ -+static const struct file_operations regs_dbg_fops = { -+ .owner = THIS_MODULE, -+ .open = regs_dbg_open, -+ .llseek = generic_file_llseek, -+ .read = regs_dbg_read, -+ .release = regs_dbg_release, -+}; -+ -+static void atmci_init_debugfs(struct atmel_mci *host) -+{ -+ struct mmc_host *mmc; -+ struct dentry *root, *regs; -+ struct resource *res; -+ -+ mmc = host->mmc; -+ root = debugfs_create_dir(mmc_hostname(mmc), NULL); -+ if (IS_ERR(root) || !root) -+ goto err_root; -+ host->debugfs_root = root; -+ -+ regs = debugfs_create_file("regs", 0400, root, host, ®s_dbg_fops); -+ if (!regs) -+ goto err_regs; -+ -+ res = platform_get_resource(host->pdev, IORESOURCE_MEM, 0); -+ regs->d_inode->i_size = res->end - res->start + 1; -+ host->debugfs_regs = regs; -+ -+ host->debugfs_req = debugfs_create_file("req", 0400, root, -+ host, &req_dbg_fops); -+ if (!host->debugfs_req) -+ goto err_req; -+ -+ host->debugfs_pending_events -+ = debugfs_create_u32("pending_events", 0400, root, -+ (u32 *)&host->pending_events); -+ if (!host->debugfs_pending_events) -+ goto err_pending_events; -+ -+ host->debugfs_completed_events -+ = debugfs_create_u32("completed_events", 0400, root, -+ (u32 *)&host->completed_events); -+ if (!host->debugfs_completed_events) -+ goto err_completed_events; -+ -+ return; -+ -+err_completed_events: -+ debugfs_remove(host->debugfs_pending_events); -+err_pending_events: -+ debugfs_remove(host->debugfs_req); -+err_req: -+ debugfs_remove(host->debugfs_regs); -+err_regs: -+ debugfs_remove(host->debugfs_root); -+err_root: -+ host->debugfs_root = NULL; -+ dev_err(&host->pdev->dev, -+ "failed to initialize debugfs for %s\n", -+ mmc_hostname(mmc)); -+} -+ -+static void atmci_cleanup_debugfs(struct atmel_mci *host) -+{ -+ if (host->debugfs_root) { -+ debugfs_remove(host->debugfs_completed_events); -+ debugfs_remove(host->debugfs_pending_events); -+ debugfs_remove(host->debugfs_req); -+ debugfs_remove(host->debugfs_regs); -+ debugfs_remove(host->debugfs_root); -+ host->debugfs_root = NULL; -+ } -+} -+#else -+static inline void atmci_init_debugfs(struct atmel_mci *host) -+{ -+ -+} -+ -+static inline void atmci_cleanup_debugfs(struct atmel_mci *host) -+{ -+ -+} -+#endif /* CONFIG_DEBUG_FS */ -+ -+static inline unsigned int ns_to_clocks(struct atmel_mci *host, -+ unsigned int ns) -+{ -+ return (ns * (host->bus_hz / 1000000) + 999) / 1000; -+} -+ -+static void atmci_set_timeout(struct atmel_mci *host, -+ struct mmc_data *data) -+{ -+ static unsigned dtomul_to_shift[] = { -+ 0, 4, 7, 8, 10, 12, 16, 20 -+ }; -+ unsigned timeout; -+ unsigned dtocyc, dtomul; -+ -+ timeout = ns_to_clocks(host, data->timeout_ns) + data->timeout_clks; -+ -+ for (dtomul = 0; dtomul < 8; dtomul++) { -+ unsigned shift = dtomul_to_shift[dtomul]; -+ dtocyc = (timeout + (1 << shift) - 1) >> shift; -+ if (dtocyc < 15) -+ break; -+ } -+ -+ if (dtomul >= 8) { -+ dtomul = 7; -+ dtocyc = 15; -+ } -+ -+ pr_debug("%s: setting timeout to %u cycles\n", -+ mmc_hostname(host->mmc), -+ dtocyc << dtomul_to_shift[dtomul]); -+ mci_writel(host, DTOR, (MCI_BF(DTOMUL, dtomul) -+ | MCI_BF(DTOCYC, dtocyc))); -+} -+ -+/* -+ * Return mask with interrupt flags to be handled for this command. -+ */ -+static u32 atmci_prepare_command(struct mmc_host *mmc, -+ struct mmc_command *cmd, -+ u32 *cmd_flags) -+{ -+ u32 cmdr; -+ u32 iflags; -+ -+ cmd->error = MMC_ERR_NONE; -+ -+ cmdr = 0; -+ BUG_ON(MCI_BFEXT(CMDNB, cmdr) != 0); -+ cmdr = MCI_BFINS(CMDNB, cmd->opcode, cmdr); -+ -+ if (cmd->flags & MMC_RSP_PRESENT) { -+ if (cmd->flags & MMC_RSP_136) -+ cmdr |= MCI_BF(RSPTYP, MCI_RSPTYP_136_BIT); -+ else -+ cmdr |= MCI_BF(RSPTYP, MCI_RSPTYP_48_BIT); -+ } -+ -+ /* -+ * This should really be MAXLAT_5 for CMD2 and ACMD41, but -+ * it's too difficult to determine whether this is an ACMD or -+ * not. Better make it 64. -+ */ -+ cmdr |= MCI_BIT(MAXLAT); -+ -+ if (mmc->ios.bus_mode == MMC_BUSMODE_OPENDRAIN) -+ cmdr |= MCI_BIT(OPDCMD); -+ -+ iflags = MCI_BIT(CMDRDY) | MCI_CMD_ERROR_FLAGS; -+ if (!(cmd->flags & MMC_RSP_CRC)) -+ iflags &= ~MCI_BIT(RCRCE); -+ -+ pr_debug("%s: cmd: op %02x arg %08x flags %08x, cmdflags %08lx\n", -+ mmc_hostname(mmc), cmd->opcode, cmd->arg, cmd->flags, -+ (unsigned long)cmdr); -+ -+ *cmd_flags = cmdr; -+ return iflags; -+} -+ -+static void atmci_start_command(struct atmel_mci *host, -+ struct mmc_command *cmd, -+ u32 cmd_flags) -+{ -+ WARN_ON(host->cmd); -+ host->cmd = cmd; -+ -+ mci_writel(host, ARGR, cmd->arg); -+ mci_writel(host, CMDR, cmd_flags); -+ -+ if (cmd->data) -+ dma_start_request(host->dma.req.req.dmac, -+ host->dma.req.req.channel); -+} -+ -+/* -+ * Returns a mask of flags to be set in the command register when the -+ * command to start the transfer is to be sent. -+ */ -+static u32 atmci_prepare_data(struct mmc_host *mmc, struct mmc_data *data) -+{ -+ struct atmel_mci *host = mmc_priv(mmc); -+ u32 cmd_flags; -+ -+ WARN_ON(host->data); -+ host->data = data; -+ -+ atmci_set_timeout(host, data); -+ mci_writel(host, BLKR, (MCI_BF(BCNT, data->blocks) -+ | MCI_BF(BLKLEN, data->blksz))); -+ host->dma.req.block_size = data->blksz; -+ host->dma.req.nr_blocks = data->blocks; -+ -+ cmd_flags = MCI_BF(TRCMD, MCI_TRCMD_START_TRANS); -+ if (data->flags & MMC_DATA_STREAM) -+ cmd_flags |= MCI_BF(TRTYP, MCI_TRTYP_STREAM); -+ else if (data->blocks > 1) -+ cmd_flags |= MCI_BF(TRTYP, MCI_TRTYP_MULTI_BLOCK); -+ else -+ cmd_flags |= MCI_BF(TRTYP, MCI_TRTYP_BLOCK); -+ -+ if (data->flags & MMC_DATA_READ) { -+ cmd_flags |= MCI_BIT(TRDIR); -+ host->dma.req.nr_sg -+ = dma_map_sg(&host->pdev->dev, data->sg, -+ data->sg_len, DMA_FROM_DEVICE); -+ host->dma.req.periph_id = host->dma.rx_periph_id; -+ host->dma.req.direction = DMA_DIR_PERIPH_TO_MEM; -+ host->dma.req.data_reg = host->mapbase + MCI_RDR; -+ } else { -+ host->dma.req.nr_sg -+ = dma_map_sg(&host->pdev->dev, data->sg, -+ data->sg_len, DMA_TO_DEVICE); -+ host->dma.req.periph_id = host->dma.tx_periph_id; -+ host->dma.req.direction = DMA_DIR_MEM_TO_PERIPH; -+ host->dma.req.data_reg = host->mapbase + MCI_TDR; -+ } -+ host->dma.req.sg = data->sg; -+ -+ dma_prepare_request_sg(host->dma.req.req.dmac, &host->dma.req); -+ -+ return cmd_flags; -+} -+ -+static void atmci_request(struct mmc_host *mmc, struct mmc_request *mrq) -+{ -+ struct atmel_mci *host = mmc_priv(mmc); -+ struct mmc_data *data = mrq->data; -+ u32 iflags; -+ u32 cmdflags = 0; -+ -+ iflags = mci_readl(host, IMR); -+ if (iflags) -+ printk("WARNING: IMR=0x%08x\n", mci_readl(host, IMR)); -+ -+ WARN_ON(host->mrq != NULL); -+ host->mrq = mrq; -+ host->pending_events = 0; -+ host->completed_events = 0; -+ -+ iflags = atmci_prepare_command(mmc, mrq->cmd, &cmdflags); -+ -+ if (mrq->stop) { -+ BUG_ON(!data); -+ -+ host->stop_iflags = atmci_prepare_command(mmc, mrq->stop, -+ &host->stop_cmdr); -+ host->stop_cmdr |= MCI_BF(TRCMD, MCI_TRCMD_STOP_TRANS); -+ if (!(data->flags & MMC_DATA_WRITE)) -+ host->stop_cmdr |= MCI_BIT(TRDIR); -+ if (data->flags & MMC_DATA_STREAM) -+ host->stop_cmdr |= MCI_BF(TRTYP, MCI_TRTYP_STREAM); -+ else -+ host->stop_cmdr |= MCI_BF(TRTYP, MCI_TRTYP_MULTI_BLOCK); -+ } -+ if (data) { -+ cmdflags |= atmci_prepare_data(mmc, data); -+ iflags |= MCI_DATA_ERROR_FLAGS; -+ } -+ -+ atmci_start_command(host, mrq->cmd, cmdflags); -+ mci_writel(host, IER, iflags); -+} -+ -+static void atmci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios) -+{ -+ struct atmel_mci *host = mmc_priv(mmc); -+ -+ if (ios->clock) { -+ u32 clkdiv; -+ -+ clkdiv = host->bus_hz / (2 * ios->clock) - 1; -+ if (clkdiv > 255) -+ clkdiv = 255; -+ mci_writel(host, MR, (clkdiv -+ | MCI_BIT(WRPROOF) -+ | MCI_BIT(RDPROOF))); -+ } -+ -+ switch (ios->bus_width) { -+ case MMC_BUS_WIDTH_1: -+ mci_writel(host, SDCR, 0); -+ break; -+ case MMC_BUS_WIDTH_4: -+ mci_writel(host, SDCR, MCI_BIT(SDCBUS)); -+ break; -+ } -+ -+ switch (ios->power_mode) { -+ case MMC_POWER_OFF: -+ mci_writel(host, CR, MCI_BIT(MCIDIS)); -+ break; -+ case MMC_POWER_UP: -+ mci_writel(host, CR, MCI_BIT(SWRST)); -+ break; -+ case MMC_POWER_ON: -+ mci_writel(host, CR, MCI_BIT(MCIEN)); -+ break; -+ } -+} -+ -+static int atmci_get_ro(struct mmc_host *mmc) -+{ -+ int read_only = 0; -+ struct atmel_mci *host = mmc_priv(mmc); -+ -+ if (host->wp_pin >= 0) { -+ read_only = gpio_get_value(host->wp_pin); -+ pr_debug("%s: card is %s\n", mmc_hostname(mmc), -+ read_only ? "read-only" : "read-write"); -+ } else { -+ pr_debug("%s: no pin for checking read-only switch." -+ " Assuming write-enable.\n", mmc_hostname(mmc)); -+ } -+ -+ return read_only; -+} -+ -+static struct mmc_host_ops atmci_ops = { -+ .request = atmci_request, -+ .set_ios = atmci_set_ios, -+ .get_ro = atmci_get_ro, -+}; -+ -+static void atmci_request_end(struct mmc_host *mmc, struct mmc_request *mrq) -+{ -+ struct atmel_mci *host = mmc_priv(mmc); -+ -+ WARN_ON(host->cmd || host->data); -+ host->mrq = NULL; -+ -+ mmc_request_done(mmc, mrq); -+} -+ -+static void send_stop_cmd(struct mmc_host *mmc, struct mmc_data *data, -+ u32 flags) -+{ -+ struct atmel_mci *host = mmc_priv(mmc); -+ -+ atmci_start_command(host, data->stop, host->stop_cmdr | flags); -+ mci_writel(host, IER, host->stop_iflags); -+} -+ -+static void atmci_data_complete(struct atmel_mci *host, struct mmc_data *data) -+{ -+ host->data = NULL; -+ dma_unmap_sg(&host->pdev->dev, data->sg, host->dma.req.nr_sg, -+ ((data->flags & MMC_DATA_WRITE) -+ ? DMA_TO_DEVICE : DMA_FROM_DEVICE)); -+ -+ /* -+ * Data might complete before command for very short transfers -+ * (like READ_SCR) -+ */ -+ if (mci_cmd_is_complete(host) -+ && (!data->stop || mci_stop_is_complete(host))) -+ atmci_request_end(host->mmc, data->mrq); -+} -+ -+static void atmci_command_error(struct mmc_host *mmc, -+ struct mmc_command *cmd, -+ u32 status) -+{ -+ pr_debug("%s: command error: status=0x%08x\n", -+ mmc_hostname(mmc), status); -+ -+ if (status & MCI_BIT(RTOE)) -+ cmd->error = MMC_ERR_TIMEOUT; -+ else if (status & MCI_BIT(RCRCE)) -+ cmd->error = MMC_ERR_BADCRC; -+ else -+ cmd->error = MMC_ERR_FAILED; -+} -+ -+static void atmci_tasklet_func(unsigned long priv) -+{ -+ struct mmc_host *mmc = (struct mmc_host *)priv; -+ struct atmel_mci *host = mmc_priv(mmc); -+ struct mmc_request *mrq = host->mrq; -+ struct mmc_data *data = host->data; -+ -+ pr_debug("atmci_tasklet: pending/completed/mask %lx/%lx/%x\n", -+ host->pending_events, host->completed_events, -+ mci_readl(host, IMR)); -+ -+ if (mci_clear_cmd_error_is_pending(host)) { -+ struct mmc_command *cmd; -+ -+ mci_set_cmd_error_complete(host); -+ mci_clear_cmd_pending(host); -+ cmd = host->mrq->cmd; -+ -+ if (cmd->data) { -+ dma_stop_request(host->dma.req.req.dmac, -+ host->dma.req.req.channel); -+ host->data = NULL; -+ } -+ -+ atmci_command_error(mmc, cmd, host->error_status); -+ atmci_request_end(mmc, cmd->mrq); -+ } -+ if (mci_clear_stop_error_is_pending(host)) { -+ mci_set_stop_error_complete(host); -+ mci_clear_stop_pending(host); -+ atmci_command_error(mmc, host->mrq->stop, -+ host->error_status); -+ if (!host->data) -+ atmci_request_end(mmc, host->mrq); -+ } -+ if (mci_clear_cmd_is_pending(host)) { -+ mci_set_cmd_complete(host); -+ if (!mrq->data || mci_data_is_complete(host) -+ || mci_data_error_is_complete(host)) -+ atmci_request_end(mmc, mrq); -+ } -+ if (mci_clear_stop_is_pending(host)) { -+ mci_set_stop_complete(host); -+ if (mci_data_is_complete(host) -+ || mci_data_error_is_complete(host)) -+ atmci_request_end(mmc, mrq); -+ } -+ if (mci_clear_dma_error_is_pending(host)) { -+ mci_set_dma_error_complete(host); -+ mci_clear_data_pending(host); -+ -+ /* DMA controller got bus error => invalid address */ -+ data->error = MMC_ERR_INVALID; -+ -+ printk(KERN_DEBUG "%s: dma error after %u bytes xfered\n", -+ mmc_hostname(mmc), host->data->bytes_xfered); -+ -+ if (data->stop -+ && !mci_set_stop_sent_is_completed(host)) -+ /* TODO: Check if card is still present */ -+ send_stop_cmd(host->mmc, data, 0); -+ -+ atmci_data_complete(host, data); -+ } -+ if (mci_clear_data_error_is_pending(host)) { -+ u32 status = host->error_status; -+ -+ mci_set_data_error_complete(host); -+ mci_clear_data_pending(host); -+ -+ dma_stop_request(host->dma.req.req.dmac, -+ host->dma.req.req.channel); -+ -+ printk(KERN_DEBUG "%s: data error: status=0x%08x\n", -+ mmc_hostname(host->mmc), status); -+ -+ if (status & MCI_BIT(DCRCE)) { -+ printk(KERN_DEBUG "%s: Data CRC error\n", -+ mmc_hostname(host->mmc)); -+ data->error = MMC_ERR_BADCRC; -+ } else if (status & MCI_BIT(DTOE)) { -+ printk(KERN_DEBUG "%s: Data Timeout error\n", -+ mmc_hostname(host->mmc)); -+ data->error = MMC_ERR_TIMEOUT; -+ } else { -+ printk(KERN_DEBUG "%s: Data FIFO error\n", -+ mmc_hostname(host->mmc)); -+ data->error = MMC_ERR_FIFO; -+ } -+ printk(KERN_DEBUG "%s: Bytes xfered: %u\n", -+ mmc_hostname(host->mmc), data->bytes_xfered); -+ -+ if (data->stop -+ && !mci_set_stop_sent_is_completed(host)) -+ /* TODO: Check if card is still present */ -+ send_stop_cmd(host->mmc, data, 0); -+ -+ atmci_data_complete(host, data); -+ } -+ if (mci_clear_data_is_pending(host)) { -+ mci_set_data_complete(host); -+ data->bytes_xfered = data->blocks * data->blksz; -+ atmci_data_complete(host, data); -+ } -+ if (mci_clear_card_detect_is_pending(host)) { -+ /* Reset controller if card is gone */ -+ if (!host->present) { -+ mci_writel(host, CR, MCI_BIT(SWRST)); -+ mci_writel(host, IDR, ~0UL); -+ mci_writel(host, CR, MCI_BIT(MCIEN)); -+ } -+ -+ /* Clean up queue if present */ -+ if (mrq) { -+ if (!mci_cmd_is_complete(host) -+ && !mci_cmd_error_is_complete(host)) { -+ mrq->cmd->error = MMC_ERR_TIMEOUT; -+ } -+ if (mrq->data && !mci_data_is_complete(host) -+ && !mci_data_error_is_complete(host)) { -+ dma_stop_request(host->dma.req.req.dmac, -+ host->dma.req.req.channel); -+ host->data->error = MMC_ERR_TIMEOUT; -+ atmci_data_complete(host, data); -+ } -+ if (mrq->stop && !mci_stop_is_complete(host) -+ && !mci_stop_error_is_complete(host)) { -+ mrq->stop->error = MMC_ERR_TIMEOUT; -+ } -+ -+ host->cmd = NULL; -+ atmci_request_end(mmc, mrq); -+ } -+ mmc_detect_change(host->mmc, msecs_to_jiffies(100)); -+ } -+} -+ -+static void atmci_cmd_interrupt(struct mmc_host *mmc, u32 status) -+{ -+ struct atmel_mci *host = mmc_priv(mmc); -+ struct mmc_command *cmd = host->cmd; -+ -+ /* -+ * Read the response now so that we're free to send a new -+ * command immediately. -+ */ -+ cmd->resp[0] = mci_readl(host, RSPR); -+ cmd->resp[1] = mci_readl(host, RSPR); -+ cmd->resp[2] = mci_readl(host, RSPR); -+ cmd->resp[3] = mci_readl(host, RSPR); -+ -+ mci_writel(host, IDR, MCI_BIT(CMDRDY) | MCI_CMD_ERROR_FLAGS); -+ host->cmd = NULL; -+ -+ if (mci_stop_sent_is_complete(host)) -+ mci_set_stop_pending(host); -+ else -+ mci_set_cmd_pending(host); -+ -+ tasklet_schedule(&host->tasklet); -+} -+ -+static void atmci_xfer_complete(struct dma_request *_req) -+{ -+ struct dma_request_sg *req = to_dma_request_sg(_req); -+ struct atmel_mci_dma *dma; -+ struct atmel_mci *host; -+ struct mmc_data *data; -+ -+ dma = container_of(req, struct atmel_mci_dma, req); -+ host = container_of(dma, struct atmel_mci, dma); -+ data = host->data; -+ -+ if (data->stop && !mci_set_stop_sent_is_completed(host)) -+ send_stop_cmd(host->mmc, data, 0); -+ -+ if (data->flags & MMC_DATA_READ) { -+ mci_writel(host, IDR, MCI_DATA_ERROR_FLAGS); -+ mci_set_data_pending(host); -+ tasklet_schedule(&host->tasklet); -+ } else { -+ /* -+ * For the WRITE case, wait for NOTBUSY. This function -+ * is called when everything has been written to the -+ * controller, not when the card is done programming. -+ */ -+ mci_writel(host, IER, MCI_BIT(NOTBUSY)); -+ } -+} -+ -+static void atmci_dma_error(struct dma_request *_req) -+{ -+ struct dma_request_sg *req = to_dma_request_sg(_req); -+ struct atmel_mci_dma *dma; -+ struct atmel_mci *host; -+ -+ dma = container_of(req, struct atmel_mci_dma, req); -+ host = container_of(dma, struct atmel_mci, dma); -+ -+ mci_writel(host, IDR, (MCI_BIT(NOTBUSY) -+ | MCI_DATA_ERROR_FLAGS)); -+ -+ mci_set_dma_error_pending(host); -+ tasklet_schedule(&host->tasklet); -+} -+ -+static irqreturn_t atmci_interrupt(int irq, void *dev_id) -+{ -+ struct mmc_host *mmc = dev_id; -+ struct atmel_mci *host = mmc_priv(mmc); -+ u32 status, mask, pending; -+ -+ spin_lock(&mmc->lock); -+ -+ status = mci_readl(host, SR); -+ mask = mci_readl(host, IMR); -+ pending = status & mask; -+ -+ do { -+ if (pending & MCI_CMD_ERROR_FLAGS) { -+ mci_writel(host, IDR, (MCI_BIT(CMDRDY) -+ | MCI_BIT(NOTBUSY) -+ | MCI_CMD_ERROR_FLAGS -+ | MCI_DATA_ERROR_FLAGS)); -+ host->error_status = status; -+ host->cmd = NULL; -+ if (mci_stop_sent_is_complete(host)) -+ mci_set_stop_error_pending(host); -+ else -+ mci_set_cmd_error_pending(host); -+ tasklet_schedule(&host->tasklet); -+ break; -+ } -+ if (pending & MCI_DATA_ERROR_FLAGS) { -+ mci_writel(host, IDR, (MCI_BIT(NOTBUSY) -+ | MCI_DATA_ERROR_FLAGS)); -+ host->error_status = status; -+ mci_set_data_error_pending(host); -+ tasklet_schedule(&host->tasklet); -+ break; -+ } -+ if (pending & MCI_BIT(CMDRDY)) -+ atmci_cmd_interrupt(mmc, status); -+ if (pending & MCI_BIT(NOTBUSY)) { -+ mci_writel(host, IDR, (MCI_BIT(NOTBUSY) -+ | MCI_DATA_ERROR_FLAGS)); -+ mci_set_data_pending(host); -+ tasklet_schedule(&host->tasklet); -+ } -+ -+ status = mci_readl(host, SR); -+ mask = mci_readl(host, IMR); -+ pending = status & mask; -+ } while (pending); -+ -+ spin_unlock(&mmc->lock); -+ -+ return IRQ_HANDLED; -+} -+ -+static irqreturn_t atmci_detect_change(int irq, void *dev_id) -+{ -+ struct mmc_host *mmc = dev_id; -+ struct atmel_mci *host = mmc_priv(mmc); -+ -+ int present = !gpio_get_value(irq_to_gpio(irq)); -+ -+ if (present != host->present) { -+ pr_debug("%s: card %s\n", mmc_hostname(host->mmc), -+ present ? "inserted" : "removed"); -+ host->present = present; -+ mci_set_card_detect_pending(host); -+ tasklet_schedule(&host->tasklet); -+ } -+ return IRQ_HANDLED; -+} -+ -+static int __devinit atmci_probe(struct platform_device *pdev) -+{ -+ struct mci_platform_data *board; -+ struct atmel_mci *host; -+ struct mmc_host *mmc; -+ struct resource *regs; -+ int irq; -+ int ret; -+ -+ regs = platform_get_resource(pdev, IORESOURCE_MEM, 0); -+ if (!regs) -+ return -ENXIO; -+ irq = platform_get_irq(pdev, 0); -+ if (irq < 0) -+ return irq; -+ -+ board = pdev->dev.platform_data; -+ -+ mmc = mmc_alloc_host(sizeof(struct atmel_mci), &pdev->dev); -+ if (!mmc) -+ return -ENOMEM; -+ -+ host = mmc_priv(mmc); -+ host->pdev = pdev; -+ host->mmc = mmc; -+ if (board) { -+ host->detect_pin = board->detect_pin; -+ host->wp_pin = board->wp_pin; -+ } else { -+ host->detect_pin = -1; -+ host->detect_pin = -1; -+ } -+ -+ host->mck = clk_get(&pdev->dev, "mci_clk"); -+ if (IS_ERR(host->mck)) { -+ ret = PTR_ERR(host->mck); -+ goto out_free_host; -+ } -+ clk_enable(host->mck); -+ -+ ret = -ENOMEM; -+ host->regs = ioremap(regs->start, regs->end - regs->start + 1); -+ if (!host->regs) -+ goto out_disable_clk; -+ -+ host->bus_hz = clk_get_rate(host->mck); -+ host->mapbase = regs->start; -+ -+ mmc->ops = &atmci_ops; -+ mmc->f_min = (host->bus_hz + 511) / 512; -+ mmc->f_max = min((unsigned int)(host->bus_hz / 2), fmax); -+ mmc->ocr_avail = 0x00100000; -+ mmc->caps |= MMC_CAP_4_BIT_DATA; -+ -+ tasklet_init(&host->tasklet, atmci_tasklet_func, (unsigned long)mmc); -+ -+ ret = request_irq(irq, atmci_interrupt, 0, "mmci", mmc); -+ if (ret) -+ goto out_unmap; -+ -+ /* Assume card is present if we don't have a detect pin */ -+ host->present = 1; -+ if (host->detect_pin >= 0) { -+ if (gpio_request(host->detect_pin, "mmc_detect")) { -+ printk(KERN_WARNING "%s: no detect pin available\n", -+ mmc_hostname(host->mmc)); -+ host->detect_pin = -1; -+ } else { -+ host->present = !gpio_get_value(host->detect_pin); -+ } -+ } -+ if (host->wp_pin >= 0) { -+ if (gpio_request(host->wp_pin, "mmc_wp")) { -+ printk(KERN_WARNING "%s: no WP pin available\n", -+ mmc_hostname(host->mmc)); -+ host->wp_pin = -1; -+ } -+ } -+ -+ /* TODO: Get this information from platform data */ -+ ret = -ENOMEM; -+ host->dma.req.req.dmac = find_dma_controller(0); -+ if (!host->dma.req.req.dmac) { -+ printk(KERN_ERR -+ "mmci: No DMA controller available, aborting\n"); -+ goto out_free_irq; -+ } -+ ret = dma_alloc_channel(host->dma.req.req.dmac); -+ if (ret < 0) { -+ printk(KERN_ERR -+ "mmci: Unable to allocate DMA channel, aborting\n"); -+ goto out_free_irq; -+ } -+ host->dma.req.req.channel = ret; -+ host->dma.req.width = DMA_WIDTH_32BIT; -+ host->dma.req.req.xfer_complete = atmci_xfer_complete; -+ host->dma.req.req.block_complete = NULL; // atmci_block_complete; -+ host->dma.req.req.error = atmci_dma_error; -+ host->dma.rx_periph_id = 0; -+ host->dma.tx_periph_id = 1; -+ -+ mci_writel(host, CR, MCI_BIT(SWRST)); -+ mci_writel(host, IDR, ~0UL); -+ mci_writel(host, CR, MCI_BIT(MCIEN)); -+ -+ platform_set_drvdata(pdev, host); -+ -+ mmc_add_host(mmc); -+ -+ if (host->detect_pin >= 0) { -+ ret = request_irq(gpio_to_irq(host->detect_pin), -+ atmci_detect_change, -+ IRQF_TRIGGER_FALLING | IRQF_TRIGGER_RISING, -+ DRIVER_NAME, mmc); -+ if (ret) { -+ printk(KERN_ERR -+ "%s: could not request IRQ %d for detect pin\n", -+ mmc_hostname(mmc), -+ gpio_to_irq(host->detect_pin)); -+ gpio_free(host->detect_pin); -+ host->detect_pin = -1; -+ } -+ } -+ -+ printk(KERN_INFO "%s: Atmel MCI controller at 0x%08lx irq %d\n", -+ mmc_hostname(mmc), host->mapbase, irq); -+ -+ atmci_init_debugfs(host); -+ -+ return 0; -+ -+out_free_irq: -+ if (host->detect_pin >= 0) -+ gpio_free(host->detect_pin); -+ if (host->wp_pin >= 0) -+ gpio_free(host->wp_pin); -+ free_irq(irq, mmc); -+out_unmap: -+ iounmap(host->regs); -+out_disable_clk: -+ clk_disable(host->mck); -+ clk_put(host->mck); -+out_free_host: -+ mmc_free_host(mmc); -+ return ret; -+} -+ -+static int __devexit atmci_remove(struct platform_device *pdev) -+{ -+ struct atmel_mci *host = platform_get_drvdata(pdev); -+ -+ platform_set_drvdata(pdev, NULL); -+ -+ if (host) { -+ atmci_cleanup_debugfs(host); -+ -+ if (host->detect_pin >= 0) { -+ free_irq(gpio_to_irq(host->detect_pin), host->mmc); -+ cancel_delayed_work(&host->mmc->detect); -+ gpio_free(host->detect_pin); -+ } -+ -+ mmc_remove_host(host->mmc); -+ -+ mci_writel(host, IDR, ~0UL); -+ mci_writel(host, CR, MCI_BIT(MCIDIS)); -+ mci_readl(host, SR); -+ -+ dma_release_channel(host->dma.req.req.dmac, -+ host->dma.req.req.channel); -+ -+ if (host->wp_pin >= 0) -+ gpio_free(host->wp_pin); -+ -+ free_irq(platform_get_irq(pdev, 0), host->mmc); -+ iounmap(host->regs); -+ -+ clk_disable(host->mck); -+ clk_put(host->mck); -+ -+ mmc_free_host(host->mmc); -+ } -+ return 0; -+} -+ -+static struct platform_driver atmci_driver = { -+ .probe = atmci_probe, -+ .remove = __devexit_p(atmci_remove), -+ .driver = { -+ .name = DRIVER_NAME, -+ }, -+}; -+ -+static int __init atmci_init(void) -+{ -+ return platform_driver_register(&atmci_driver); -+} -+ -+static void __exit atmci_exit(void) -+{ -+ platform_driver_unregister(&atmci_driver); -+} -+ -+module_init(atmci_init); -+module_exit(atmci_exit); -+ -+MODULE_DESCRIPTION("Atmel Multimedia Card Interface driver"); -+MODULE_LICENSE("GPL"); -diff --git a/drivers/mmc/host/atmel-mci.h b/drivers/mmc/host/atmel-mci.h -new file mode 100644 -index 0000000..60d15c4 ---- /dev/null -+++ b/drivers/mmc/host/atmel-mci.h -@@ -0,0 +1,192 @@ -+/* -+ * Atmel MultiMedia Card Interface driver -+ * -+ * Copyright (C) 2004-2006 Atmel Corporation -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 as -+ * published by the Free Software Foundation. -+ */ -+#ifndef __DRIVERS_MMC_ATMEL_MCI_H__ -+#define __DRIVERS_MMC_ATMEL_MCI_H__ -+ -+/* MCI register offsets */ -+#define MCI_CR 0x0000 -+#define MCI_MR 0x0004 -+#define MCI_DTOR 0x0008 -+#define MCI_SDCR 0x000c -+#define MCI_ARGR 0x0010 -+#define MCI_CMDR 0x0014 -+#define MCI_BLKR 0x0018 -+#define MCI_RSPR 0x0020 -+#define MCI_RSPR1 0x0024 -+#define MCI_RSPR2 0x0028 -+#define MCI_RSPR3 0x002c -+#define MCI_RDR 0x0030 -+#define MCI_TDR 0x0034 -+#define MCI_SR 0x0040 -+#define MCI_IER 0x0044 -+#define MCI_IDR 0x0048 -+#define MCI_IMR 0x004c -+ -+/* Bitfields in CR */ -+#define MCI_MCIEN_OFFSET 0 -+#define MCI_MCIEN_SIZE 1 -+#define MCI_MCIDIS_OFFSET 1 -+#define MCI_MCIDIS_SIZE 1 -+#define MCI_PWSEN_OFFSET 2 -+#define MCI_PWSEN_SIZE 1 -+#define MCI_PWSDIS_OFFSET 3 -+#define MCI_PWSDIS_SIZE 1 -+#define MCI_SWRST_OFFSET 7 -+#define MCI_SWRST_SIZE 1 -+ -+/* Bitfields in MR */ -+#define MCI_CLKDIV_OFFSET 0 -+#define MCI_CLKDIV_SIZE 8 -+#define MCI_PWSDIV_OFFSET 8 -+#define MCI_PWSDIV_SIZE 3 -+#define MCI_RDPROOF_OFFSET 11 -+#define MCI_RDPROOF_SIZE 1 -+#define MCI_WRPROOF_OFFSET 12 -+#define MCI_WRPROOF_SIZE 1 -+#define MCI_DMAPADV_OFFSET 14 -+#define MCI_DMAPADV_SIZE 1 -+#define MCI_BLKLEN_OFFSET 16 -+#define MCI_BLKLEN_SIZE 16 -+ -+/* Bitfields in DTOR */ -+#define MCI_DTOCYC_OFFSET 0 -+#define MCI_DTOCYC_SIZE 4 -+#define MCI_DTOMUL_OFFSET 4 -+#define MCI_DTOMUL_SIZE 3 -+ -+/* Bitfields in SDCR */ -+#define MCI_SDCSEL_OFFSET 0 -+#define MCI_SDCSEL_SIZE 4 -+#define MCI_SDCBUS_OFFSET 7 -+#define MCI_SDCBUS_SIZE 1 -+ -+/* Bitfields in ARGR */ -+#define MCI_ARG_OFFSET 0 -+#define MCI_ARG_SIZE 32 -+ -+/* Bitfields in CMDR */ -+#define MCI_CMDNB_OFFSET 0 -+#define MCI_CMDNB_SIZE 6 -+#define MCI_RSPTYP_OFFSET 6 -+#define MCI_RSPTYP_SIZE 2 -+#define MCI_SPCMD_OFFSET 8 -+#define MCI_SPCMD_SIZE 3 -+#define MCI_OPDCMD_OFFSET 11 -+#define MCI_OPDCMD_SIZE 1 -+#define MCI_MAXLAT_OFFSET 12 -+#define MCI_MAXLAT_SIZE 1 -+#define MCI_TRCMD_OFFSET 16 -+#define MCI_TRCMD_SIZE 2 -+#define MCI_TRDIR_OFFSET 18 -+#define MCI_TRDIR_SIZE 1 -+#define MCI_TRTYP_OFFSET 19 -+#define MCI_TRTYP_SIZE 2 -+ -+/* Bitfields in BLKR */ -+#define MCI_BCNT_OFFSET 0 -+#define MCI_BCNT_SIZE 16 -+ -+/* Bitfields in RSPRn */ -+#define MCI_RSP_OFFSET 0 -+#define MCI_RSP_SIZE 32 -+ -+/* Bitfields in SR/IER/IDR/IMR */ -+#define MCI_CMDRDY_OFFSET 0 -+#define MCI_CMDRDY_SIZE 1 -+#define MCI_RXRDY_OFFSET 1 -+#define MCI_RXRDY_SIZE 1 -+#define MCI_TXRDY_OFFSET 2 -+#define MCI_TXRDY_SIZE 1 -+#define MCI_BLKE_OFFSET 3 -+#define MCI_BLKE_SIZE 1 -+#define MCI_DTIP_OFFSET 4 -+#define MCI_DTIP_SIZE 1 -+#define MCI_NOTBUSY_OFFSET 5 -+#define MCI_NOTBUSY_SIZE 1 -+#define MCI_ENDRX_OFFSET 6 -+#define MCI_ENDRX_SIZE 1 -+#define MCI_ENDTX_OFFSET 7 -+#define MCI_ENDTX_SIZE 1 -+#define MCI_RXBUFF_OFFSET 14 -+#define MCI_RXBUFF_SIZE 1 -+#define MCI_TXBUFE_OFFSET 15 -+#define MCI_TXBUFE_SIZE 1 -+#define MCI_RINDE_OFFSET 16 -+#define MCI_RINDE_SIZE 1 -+#define MCI_RDIRE_OFFSET 17 -+#define MCI_RDIRE_SIZE 1 -+#define MCI_RCRCE_OFFSET 18 -+#define MCI_RCRCE_SIZE 1 -+#define MCI_RENDE_OFFSET 19 -+#define MCI_RENDE_SIZE 1 -+#define MCI_RTOE_OFFSET 20 -+#define MCI_RTOE_SIZE 1 -+#define MCI_DCRCE_OFFSET 21 -+#define MCI_DCRCE_SIZE 1 -+#define MCI_DTOE_OFFSET 22 -+#define MCI_DTOE_SIZE 1 -+#define MCI_OVRE_OFFSET 30 -+#define MCI_OVRE_SIZE 1 -+#define MCI_UNRE_OFFSET 31 -+#define MCI_UNRE_SIZE 1 -+ -+/* Constants for DTOMUL */ -+#define MCI_DTOMUL_1_CYCLE 0 -+#define MCI_DTOMUL_16_CYCLES 1 -+#define MCI_DTOMUL_128_CYCLES 2 -+#define MCI_DTOMUL_256_CYCLES 3 -+#define MCI_DTOMUL_1024_CYCLES 4 -+#define MCI_DTOMUL_4096_CYCLES 5 -+#define MCI_DTOMUL_65536_CYCLES 6 -+#define MCI_DTOMUL_1048576_CYCLES 7 -+ -+/* Constants for RSPTYP */ -+#define MCI_RSPTYP_NO_RESP 0 -+#define MCI_RSPTYP_48_BIT 1 -+#define MCI_RSPTYP_136_BIT 2 -+ -+/* Constants for SPCMD */ -+#define MCI_SPCMD_NO_SPEC_CMD 0 -+#define MCI_SPCMD_INIT_CMD 1 -+#define MCI_SPCMD_SYNC_CMD 2 -+#define MCI_SPCMD_INT_CMD 4 -+#define MCI_SPCMD_INT_RESP 5 -+ -+/* Constants for TRCMD */ -+#define MCI_TRCMD_NO_TRANS 0 -+#define MCI_TRCMD_START_TRANS 1 -+#define MCI_TRCMD_STOP_TRANS 2 -+ -+/* Constants for TRTYP */ -+#define MCI_TRTYP_BLOCK 0 -+#define MCI_TRTYP_MULTI_BLOCK 1 -+#define MCI_TRTYP_STREAM 2 -+ -+/* Bit manipulation macros */ -+#define MCI_BIT(name) \ -+ (1 << MCI_##name##_OFFSET) -+#define MCI_BF(name,value) \ -+ (((value) & ((1 << MCI_##name##_SIZE) - 1)) \ -+ << MCI_##name##_OFFSET) -+#define MCI_BFEXT(name,value) \ -+ (((value) >> MCI_##name##_OFFSET) \ -+ & ((1 << MCI_##name##_SIZE) - 1)) -+#define MCI_BFINS(name,value,old) \ -+ (((old) & ~(((1 << MCI_##name##_SIZE) - 1) \ -+ << MCI_##name##_OFFSET)) \ -+ | MCI_BF(name,value)) -+ -+/* Register access macros */ -+#define mci_readl(port,reg) \ -+ __raw_readl((port)->regs + MCI_##reg) -+#define mci_writel(port,reg,value) \ -+ __raw_writel((value), (port)->regs + MCI_##reg) -+ -+#endif /* __DRIVERS_MMC_ATMEL_MCI_H__ */ -diff --git a/drivers/mtd/chips/cfi_cmdset_0001.c b/drivers/mtd/chips/cfi_cmdset_0001.c -index 2f19fa7..94304ca 100644 ---- a/drivers/mtd/chips/cfi_cmdset_0001.c -+++ b/drivers/mtd/chips/cfi_cmdset_0001.c -@@ -50,6 +50,7 @@ - #define I82802AC 0x00ac - #define MANUFACTURER_ST 0x0020 - #define M50LPW080 0x002F -+#define AT49BV640D 0x02de - - static int cfi_intelext_read (struct mtd_info *, loff_t, size_t, size_t *, u_char *); - static int cfi_intelext_write_words(struct mtd_info *, loff_t, size_t, size_t *, const u_char *); -@@ -156,6 +157,47 @@ static void cfi_tell_features(struct cfi_pri_intelext *extp) - } - #endif - -+/* Atmel chips don't use the same PRI format as Intel chips */ -+static void fixup_convert_atmel_pri(struct mtd_info *mtd, void *param) -+{ -+ struct map_info *map = mtd->priv; -+ struct cfi_private *cfi = map->fldrv_priv; -+ struct cfi_pri_intelext *extp = cfi->cmdset_priv; -+ struct cfi_pri_atmel atmel_pri; -+ uint32_t features = 0; -+ -+ /* Reverse byteswapping */ -+ extp->FeatureSupport = cpu_to_le32(extp->FeatureSupport); -+ extp->BlkStatusRegMask = cpu_to_le16(extp->BlkStatusRegMask); -+ extp->ProtRegAddr = cpu_to_le16(extp->ProtRegAddr); -+ -+ memcpy(&atmel_pri, extp, sizeof(atmel_pri)); -+ memset((char *)extp + 5, 0, sizeof(*extp) - 5); -+ -+ printk(KERN_ERR "atmel Features: %02x\n", atmel_pri.Features); -+ -+ if (atmel_pri.Features & 0x01) /* chip erase supported */ -+ features |= (1<<0); -+ if (atmel_pri.Features & 0x02) /* erase suspend supported */ -+ features |= (1<<1); -+ if (atmel_pri.Features & 0x04) /* program suspend supported */ -+ features |= (1<<2); -+ if (atmel_pri.Features & 0x08) /* simultaneous operations supported */ -+ features |= (1<<9); -+ if (atmel_pri.Features & 0x20) /* page mode read supported */ -+ features |= (1<<7); -+ if (atmel_pri.Features & 0x40) /* queued erase supported */ -+ features |= (1<<4); -+ if (atmel_pri.Features & 0x80) /* Protection bits supported */ -+ features |= (1<<6); -+ -+ extp->FeatureSupport = features; -+ -+ /* burst write mode not supported */ -+ cfi->cfiq->BufWriteTimeoutTyp = 0; -+ cfi->cfiq->BufWriteTimeoutMax = 0; -+} -+ - #ifdef CMDSET0001_DISABLE_ERASE_SUSPEND_ON_WRITE - /* Some Intel Strata Flash prior to FPO revision C has bugs in this area */ - static void fixup_intel_strataflash(struct mtd_info *mtd, void* param) -@@ -233,6 +275,7 @@ static void fixup_use_powerup_lock(struct mtd_info *mtd, void *param) - } - - static struct cfi_fixup cfi_fixup_table[] = { -+ { CFI_MFR_ATMEL, CFI_ID_ANY, fixup_convert_atmel_pri, NULL }, - #ifdef CMDSET0001_DISABLE_ERASE_SUSPEND_ON_WRITE - { CFI_MFR_ANY, CFI_ID_ANY, fixup_intel_strataflash, NULL }, - #endif -diff --git a/drivers/mtd/chips/cfi_cmdset_0002.c b/drivers/mtd/chips/cfi_cmdset_0002.c -index 1f64458..205977b 100644 ---- a/drivers/mtd/chips/cfi_cmdset_0002.c -+++ b/drivers/mtd/chips/cfi_cmdset_0002.c -@@ -185,6 +185,10 @@ static void fixup_convert_atmel_pri(struct mtd_info *mtd, void *param) - extp->TopBottom = 2; - else - extp->TopBottom = 3; -+ -+ /* burst write mode not supported */ -+ cfi->cfiq->BufWriteTimeoutTyp = 0; -+ cfi->cfiq->BufWriteTimeoutMax = 0; - } - - static void fixup_use_secsi(struct mtd_info *mtd, void *param) -@@ -217,6 +221,7 @@ static void fixup_use_atmel_lock(struct mtd_info *mtd, void *param) - } - - static struct cfi_fixup cfi_fixup_table[] = { -+ { CFI_MFR_ATMEL, CFI_ID_ANY, fixup_convert_atmel_pri, NULL }, - #ifdef AMD_BOOTLOC_BUG - { CFI_MFR_AMD, CFI_ID_ANY, fixup_amd_bootblock, NULL }, - #endif -@@ -229,7 +234,6 @@ static struct cfi_fixup cfi_fixup_table[] = { - #if !FORCE_WORD_WRITE - { CFI_MFR_ANY, CFI_ID_ANY, fixup_use_write_buffers, NULL, }, - #endif -- { CFI_MFR_ATMEL, CFI_ID_ANY, fixup_convert_atmel_pri, NULL }, - { 0, 0, NULL, NULL } - }; - static struct cfi_fixup jedec_fixup_table[] = { -diff --git a/drivers/net/Kconfig b/drivers/net/Kconfig -index b49375a..b9cb56a 100644 ---- a/drivers/net/Kconfig -+++ b/drivers/net/Kconfig -@@ -191,7 +191,7 @@ config MII - config MACB - tristate "Atmel MACB support" - depends on NET_ETHERNET && (AVR32 || ARCH_AT91SAM9260 || ARCH_AT91SAM9263) -- select MII -+ select PHYLIB - help - The Atmel MACB ethernet interface is found on many AT32 and AT91 - parts. Say Y to include support for the MACB chip. -diff --git a/drivers/net/macb.c b/drivers/net/macb.c -index 0e04f7a..c20a585 100644 ---- a/drivers/net/macb.c -+++ b/drivers/net/macb.c -@@ -17,13 +17,14 @@ - #include <linux/init.h> - #include <linux/netdevice.h> - #include <linux/etherdevice.h> --#include <linux/mii.h> --#include <linux/mutex.h> - #include <linux/dma-mapping.h> --#include <linux/ethtool.h> - #include <linux/platform_device.h> -+#include <linux/phy.h> - - #include <asm/arch/board.h> -+#if defined(CONFIG_ARCH_AT91) -+#include <asm/arch/cpu.h> -+#endif - - #include "macb.h" - -@@ -85,172 +86,202 @@ static void __init macb_get_hwaddr(struct macb *bp) - memcpy(bp->dev->dev_addr, addr, sizeof(addr)); - } - --static void macb_enable_mdio(struct macb *bp) -+static int macb_mdio_read(struct mii_bus *bus, int mii_id, int regnum) - { -- unsigned long flags; -- u32 reg; -- -- spin_lock_irqsave(&bp->lock, flags); -- reg = macb_readl(bp, NCR); -- reg |= MACB_BIT(MPE); -- macb_writel(bp, NCR, reg); -- macb_writel(bp, IER, MACB_BIT(MFD)); -- spin_unlock_irqrestore(&bp->lock, flags); --} -- --static void macb_disable_mdio(struct macb *bp) --{ -- unsigned long flags; -- u32 reg; -- -- spin_lock_irqsave(&bp->lock, flags); -- reg = macb_readl(bp, NCR); -- reg &= ~MACB_BIT(MPE); -- macb_writel(bp, NCR, reg); -- macb_writel(bp, IDR, MACB_BIT(MFD)); -- spin_unlock_irqrestore(&bp->lock, flags); --} -- --static int macb_mdio_read(struct net_device *dev, int phy_id, int location) --{ -- struct macb *bp = netdev_priv(dev); -+ struct macb *bp = bus->priv; - int value; - -- mutex_lock(&bp->mdio_mutex); -- -- macb_enable_mdio(bp); - macb_writel(bp, MAN, (MACB_BF(SOF, MACB_MAN_SOF) - | MACB_BF(RW, MACB_MAN_READ) -- | MACB_BF(PHYA, phy_id) -- | MACB_BF(REGA, location) -+ | MACB_BF(PHYA, mii_id) -+ | MACB_BF(REGA, regnum) - | MACB_BF(CODE, MACB_MAN_CODE))); - -- wait_for_completion(&bp->mdio_complete); -+ /* wait for end of transfer */ -+ while (!MACB_BFEXT(IDLE, macb_readl(bp, NSR))) -+ cpu_relax(); - - value = MACB_BFEXT(DATA, macb_readl(bp, MAN)); -- macb_disable_mdio(bp); -- mutex_unlock(&bp->mdio_mutex); - - return value; - } - --static void macb_mdio_write(struct net_device *dev, int phy_id, -- int location, int val) -+static int macb_mdio_write(struct mii_bus *bus, int mii_id, int regnum, -+ u16 value) - { -- struct macb *bp = netdev_priv(dev); -- -- dev_dbg(&bp->pdev->dev, "mdio_write %02x:%02x <- %04x\n", -- phy_id, location, val); -- -- mutex_lock(&bp->mdio_mutex); -- macb_enable_mdio(bp); -+ struct macb *bp = bus->priv; - - macb_writel(bp, MAN, (MACB_BF(SOF, MACB_MAN_SOF) - | MACB_BF(RW, MACB_MAN_WRITE) -- | MACB_BF(PHYA, phy_id) -- | MACB_BF(REGA, location) -+ | MACB_BF(PHYA, mii_id) -+ | MACB_BF(REGA, regnum) - | MACB_BF(CODE, MACB_MAN_CODE) -- | MACB_BF(DATA, val))); -+ | MACB_BF(DATA, value))); - -- wait_for_completion(&bp->mdio_complete); -+ /* wait for end of transfer */ -+ while (!MACB_BFEXT(IDLE, macb_readl(bp, NSR))) -+ cpu_relax(); - -- macb_disable_mdio(bp); -- mutex_unlock(&bp->mdio_mutex); -+ return 0; - } - --static int macb_phy_probe(struct macb *bp) -+static int macb_mdio_reset(struct mii_bus *bus) - { -- int phy_address; -- u16 phyid1, phyid2; -+ return 0; -+} - -- for (phy_address = 0; phy_address < 32; phy_address++) { -- phyid1 = macb_mdio_read(bp->dev, phy_address, MII_PHYSID1); -- phyid2 = macb_mdio_read(bp->dev, phy_address, MII_PHYSID2); -+static void macb_handle_link_change(struct net_device *dev) -+{ -+ struct macb *bp = netdev_priv(dev); -+ struct phy_device *phydev = bp->phy_dev; -+ unsigned long flags; - -- if (phyid1 != 0xffff && phyid1 != 0x0000 -- && phyid2 != 0xffff && phyid2 != 0x0000) -- break; -+ int status_change = 0; -+ -+ spin_lock_irqsave(&bp->lock, flags); -+ -+ if (phydev->link) { -+ if ((bp->speed != phydev->speed) || -+ (bp->duplex != phydev->duplex)) { -+ u32 reg; -+ -+ reg = macb_readl(bp, NCFGR); -+ reg &= ~(MACB_BIT(SPD) | MACB_BIT(FD)); -+ -+ if (phydev->duplex) -+ reg |= MACB_BIT(FD); -+ if (phydev->speed) -+ reg |= MACB_BIT(SPD); -+ -+ macb_writel(bp, NCFGR, reg); -+ -+ bp->speed = phydev->speed; -+ bp->duplex = phydev->duplex; -+ status_change = 1; -+ } - } - -- if (phy_address == 32) -- return -ENODEV; -+ if (phydev->link != bp->link) { -+ if (phydev->link) -+ netif_schedule(dev); -+ else { -+ bp->speed = 0; -+ bp->duplex = -1; -+ } -+ bp->link = phydev->link; - -- dev_info(&bp->pdev->dev, -- "detected PHY at address %d (ID %04x:%04x)\n", -- phy_address, phyid1, phyid2); -+ status_change = 1; -+ } - -- bp->mii.phy_id = phy_address; -- return 0; -+ spin_unlock_irqrestore(&bp->lock, flags); -+ -+ if (status_change) { -+ if (phydev->link) -+ printk(KERN_INFO "%s: link up (%d/%s)\n", -+ dev->name, phydev->speed, -+ DUPLEX_FULL == phydev->duplex ? "Full":"Half"); -+ else -+ printk(KERN_INFO "%s: link down\n", dev->name); -+ } - } - --static void macb_set_media(struct macb *bp, int media) -+/* based on au1000_eth. c*/ -+static int macb_mii_probe(struct net_device *dev) - { -- u32 reg; -+ struct macb *bp = netdev_priv(dev); -+ struct phy_device *phydev = NULL; -+ struct eth_platform_data *pdata; -+ int phy_addr; - -- spin_lock_irq(&bp->lock); -- reg = macb_readl(bp, NCFGR); -- reg &= ~(MACB_BIT(SPD) | MACB_BIT(FD)); -- if (media & (ADVERTISE_100HALF | ADVERTISE_100FULL)) -- reg |= MACB_BIT(SPD); -- if (media & ADVERTISE_FULL) -- reg |= MACB_BIT(FD); -- macb_writel(bp, NCFGR, reg); -- spin_unlock_irq(&bp->lock); -+ /* find the first phy */ -+ for (phy_addr = 0; phy_addr < PHY_MAX_ADDR; phy_addr++) { -+ if (bp->mii_bus.phy_map[phy_addr]) { -+ phydev = bp->mii_bus.phy_map[phy_addr]; -+ break; -+ } -+ } -+ -+ if (!phydev) { -+ printk (KERN_ERR "%s: no PHY found\n", dev->name); -+ return -1; -+ } -+ -+ pdata = bp->pdev->dev.platform_data; -+ /* TODO : add pin_irq */ -+ -+ /* attach the mac to the phy */ -+ if (pdata && pdata->is_rmii) { -+ phydev = phy_connect(dev, phydev->dev.bus_id, -+ &macb_handle_link_change, 0, PHY_INTERFACE_MODE_RMII); -+ } else { -+ phydev = phy_connect(dev, phydev->dev.bus_id, -+ &macb_handle_link_change, 0, PHY_INTERFACE_MODE_MII); -+ } -+ -+ if (IS_ERR(phydev)) { -+ printk(KERN_ERR "%s: Could not attach to PHY\n", dev->name); -+ return PTR_ERR(phydev); -+ } -+ -+ /* mask with MAC supported features */ -+ phydev->supported &= PHY_BASIC_FEATURES; -+ -+ phydev->advertising = phydev->supported; -+ -+ bp->link = 0; -+ bp->speed = 0; -+ bp->duplex = -1; -+ bp->phy_dev = phydev; -+ -+ return 0; - } - --static void macb_check_media(struct macb *bp, int ok_to_print, int init_media) -+static int macb_mii_init(struct macb *bp) - { -- struct mii_if_info *mii = &bp->mii; -- unsigned int old_carrier, new_carrier; -- int advertise, lpa, media, duplex; -+ struct eth_platform_data *pdata; -+ int err = -ENXIO, i; - -- /* if forced media, go no further */ -- if (mii->force_media) -- return; -+ /* Enable managment port */ -+ macb_writel(bp, NCR, MACB_BIT(MPE)); - -- /* check current and old link status */ -- old_carrier = netif_carrier_ok(mii->dev) ? 1 : 0; -- new_carrier = (unsigned int) mii_link_ok(mii); -+ bp->mii_bus.name = "MACB_mii_bus", -+ bp->mii_bus.read = &macb_mdio_read, -+ bp->mii_bus.write = &macb_mdio_write, -+ bp->mii_bus.reset = &macb_mdio_reset, -+ bp->mii_bus.id = bp->pdev->id, -+ bp->mii_bus.priv = bp, -+ bp->mii_bus.dev = &bp->dev->dev; -+ pdata = bp->pdev->dev.platform_data; - -- /* if carrier state did not change, assume nothing else did */ -- if (!init_media && old_carrier == new_carrier) -- return; -+ if (pdata) -+ bp->mii_bus.phy_mask = pdata->phy_mask; - -- /* no carrier, nothing much to do */ -- if (!new_carrier) { -- netif_carrier_off(mii->dev); -- printk(KERN_INFO "%s: link down\n", mii->dev->name); -- return; -+ bp->mii_bus.irq = kmalloc(sizeof(int)*PHY_MAX_ADDR, GFP_KERNEL); -+ if (!bp->mii_bus.irq) { -+ err = -ENOMEM; -+ goto err_out; - } - -- /* -- * we have carrier, see who's on the other end -- */ -- netif_carrier_on(mii->dev); -+ for (i = 0; i < PHY_MAX_ADDR; i++) -+ bp->mii_bus.irq[i] = PHY_POLL; - -- /* get MII advertise and LPA values */ -- if (!init_media && mii->advertising) { -- advertise = mii->advertising; -- } else { -- advertise = mii->mdio_read(mii->dev, mii->phy_id, MII_ADVERTISE); -- mii->advertising = advertise; -- } -- lpa = mii->mdio_read(mii->dev, mii->phy_id, MII_LPA); -+ platform_set_drvdata(bp->dev, &bp->mii_bus); - -- /* figure out media and duplex from advertise and LPA values */ -- media = mii_nway_result(lpa & advertise); -- duplex = (media & ADVERTISE_FULL) ? 1 : 0; -+ if (mdiobus_register(&bp->mii_bus)) -+ goto err_out_free_mdio_irq; - -- if (ok_to_print) -- printk(KERN_INFO "%s: link up, %sMbps, %s-duplex, lpa 0x%04X\n", -- mii->dev->name, -- media & (ADVERTISE_100FULL | ADVERTISE_100HALF) ? "100" : "10", -- duplex ? "full" : "half", lpa); -+ if (macb_mii_probe(bp->dev) != 0) { -+ goto err_out_unregister_bus; -+ } - -- mii->full_duplex = duplex; -+ return 0; - -- /* Let the MAC know about the new link state */ -- macb_set_media(bp, media); -+err_out_unregister_bus: -+ mdiobus_unregister(&bp->mii_bus); -+err_out_free_mdio_irq: -+ kfree(bp->mii_bus.irq); -+err_out: -+ return err; - } - - static void macb_update_stats(struct macb *bp) -@@ -265,16 +296,6 @@ static void macb_update_stats(struct macb *bp) - *p += __raw_readl(reg); - } - --static void macb_periodic_task(struct work_struct *work) --{ -- struct macb *bp = container_of(work, struct macb, periodic_task.work); -- -- macb_update_stats(bp); -- macb_check_media(bp, 1, 0); -- -- schedule_delayed_work(&bp->periodic_task, HZ); --} -- - static void macb_tx(struct macb *bp) - { - unsigned int tail; -@@ -519,9 +540,6 @@ static irqreturn_t macb_interrupt(int irq, void *dev_id) - spin_lock(&bp->lock); - - while (status) { -- if (status & MACB_BIT(MFD)) -- complete(&bp->mdio_complete); -- - /* close possible race with dev_close */ - if (unlikely(!netif_running(dev))) { - macb_writel(bp, IDR, ~0UL); -@@ -535,7 +553,8 @@ static irqreturn_t macb_interrupt(int irq, void *dev_id) - * until we have processed the buffers - */ - macb_writel(bp, IDR, MACB_RX_INT_FLAGS); -- dev_dbg(&bp->pdev->dev, "scheduling RX softirq\n"); -+ dev_dbg(&bp->pdev->dev, -+ "scheduling RX softirq\n"); - __netif_rx_schedule(dev); - } - } -@@ -765,7 +784,7 @@ static void macb_init_hw(struct macb *bp) - macb_writel(bp, TBQP, bp->tx_ring_dma); - - /* Enable TX and RX */ -- macb_writel(bp, NCR, MACB_BIT(RE) | MACB_BIT(TE)); -+ macb_writel(bp, NCR, MACB_BIT(RE) | MACB_BIT(TE) | MACB_BIT(MPE)); - - /* Enable interrupts */ - macb_writel(bp, IER, (MACB_BIT(RCOMP) -@@ -776,18 +795,126 @@ static void macb_init_hw(struct macb *bp) - | MACB_BIT(TCOMP) - | MACB_BIT(ISR_ROVR) - | MACB_BIT(HRESP))); -+ - } - --static void macb_init_phy(struct net_device *dev) -+/* -+ * The hash address register is 64 bits long and takes up two -+ * locations in the memory map. The least significant bits are stored -+ * in EMAC_HSL and the most significant bits in EMAC_HSH. -+ * -+ * The unicast hash enable and the multicast hash enable bits in the -+ * network configuration register enable the reception of hash matched -+ * frames. The destination address is reduced to a 6 bit index into -+ * the 64 bit hash register using the following hash function. The -+ * hash function is an exclusive or of every sixth bit of the -+ * destination address. -+ * -+ * hi[5] = da[5] ^ da[11] ^ da[17] ^ da[23] ^ da[29] ^ da[35] ^ da[41] ^ da[47] -+ * hi[4] = da[4] ^ da[10] ^ da[16] ^ da[22] ^ da[28] ^ da[34] ^ da[40] ^ da[46] -+ * hi[3] = da[3] ^ da[09] ^ da[15] ^ da[21] ^ da[27] ^ da[33] ^ da[39] ^ da[45] -+ * hi[2] = da[2] ^ da[08] ^ da[14] ^ da[20] ^ da[26] ^ da[32] ^ da[38] ^ da[44] -+ * hi[1] = da[1] ^ da[07] ^ da[13] ^ da[19] ^ da[25] ^ da[31] ^ da[37] ^ da[43] -+ * hi[0] = da[0] ^ da[06] ^ da[12] ^ da[18] ^ da[24] ^ da[30] ^ da[36] ^ da[42] -+ * -+ * da[0] represents the least significant bit of the first byte -+ * received, that is, the multicast/unicast indicator, and da[47] -+ * represents the most significant bit of the last byte received. If -+ * the hash index, hi[n], points to a bit that is set in the hash -+ * register then the frame will be matched according to whether the -+ * frame is multicast or unicast. A multicast match will be signalled -+ * if the multicast hash enable bit is set, da[0] is 1 and the hash -+ * index points to a bit set in the hash register. A unicast match -+ * will be signalled if the unicast hash enable bit is set, da[0] is 0 -+ * and the hash index points to a bit set in the hash register. To -+ * receive all multicast frames, the hash register should be set with -+ * all ones and the multicast hash enable bit should be set in the -+ * network configuration register. -+ */ -+ -+static inline int hash_bit_value(int bitnr, __u8 *addr) - { -+ if (addr[bitnr / 8] & (1 << (bitnr % 8))) -+ return 1; -+ return 0; -+} -+ -+/* -+ * Return the hash index value for the specified address. -+ */ -+static int hash_get_index(__u8 *addr) -+{ -+ int i, j, bitval; -+ int hash_index = 0; -+ -+ for (j = 0; j < 6; j++) { -+ for (i = 0, bitval = 0; i < 8; i++) -+ bitval ^= hash_bit_value(i*6 + j, addr); -+ -+ hash_index |= (bitval << j); -+ } -+ -+ return hash_index; -+} -+ -+/* -+ * Add multicast addresses to the internal multicast-hash table. -+ */ -+static void macb_sethashtable(struct net_device *dev) -+{ -+ struct dev_mc_list *curr; -+ unsigned long mc_filter[2]; -+ unsigned int i, bitnr; -+ struct macb *bp = netdev_priv(dev); -+ -+ mc_filter[0] = mc_filter[1] = 0; -+ -+ curr = dev->mc_list; -+ for (i = 0; i < dev->mc_count; i++, curr = curr->next) { -+ if (!curr) break; /* unexpected end of list */ -+ -+ bitnr = hash_get_index(curr->dmi_addr); -+ mc_filter[bitnr >> 5] |= 1 << (bitnr & 31); -+ } -+ -+ macb_writel(bp, HRB, mc_filter[0]); -+ macb_writel(bp, HRT, mc_filter[1]); -+} -+ -+/* -+ * Enable/Disable promiscuous and multicast modes. -+ */ -+static void macb_set_rx_mode(struct net_device *dev) -+{ -+ unsigned long cfg; - struct macb *bp = netdev_priv(dev); - -- /* Set some reasonable default settings */ -- macb_mdio_write(dev, bp->mii.phy_id, MII_ADVERTISE, -- ADVERTISE_CSMA | ADVERTISE_ALL); -- macb_mdio_write(dev, bp->mii.phy_id, MII_BMCR, -- (BMCR_SPEED100 | BMCR_ANENABLE -- | BMCR_ANRESTART | BMCR_FULLDPLX)); -+ cfg = macb_readl(bp, NCFGR); -+ -+ if (dev->flags & IFF_PROMISC) -+ /* Enable promiscuous mode */ -+ cfg |= MACB_BIT(CAF); -+ else if (dev->flags & (~IFF_PROMISC)) -+ /* Disable promiscuous mode */ -+ cfg &= ~MACB_BIT(CAF); -+ -+ if (dev->flags & IFF_ALLMULTI) { -+ /* Enable all multicast mode */ -+ macb_writel(bp, HRB, -1); -+ macb_writel(bp, HRT, -1); -+ cfg |= MACB_BIT(NCFGR_MTI); -+ } else if (dev->mc_count > 0) { -+ /* Enable specific multicasts */ -+ macb_sethashtable(dev); -+ cfg |= MACB_BIT(NCFGR_MTI); -+ } else if (dev->flags & (~IFF_ALLMULTI)) { -+ /* Disable all multicast mode */ -+ macb_writel(bp, HRB, 0); -+ macb_writel(bp, HRT, 0); -+ cfg &= ~MACB_BIT(NCFGR_MTI); -+ } -+ -+ macb_writel(bp, NCFGR, cfg); - } - - static int macb_open(struct net_device *dev) -@@ -797,6 +924,10 @@ static int macb_open(struct net_device *dev) - - dev_dbg(&bp->pdev->dev, "open\n"); - -+ /* if the phy is not yet register, retry later*/ -+ if (!bp->phy_dev) -+ return -EAGAIN; -+ - if (!is_valid_ether_addr(dev->dev_addr)) - return -EADDRNOTAVAIL; - -@@ -810,12 +941,11 @@ static int macb_open(struct net_device *dev) - - macb_init_rings(bp); - macb_init_hw(bp); -- macb_init_phy(dev); - -- macb_check_media(bp, 1, 1); -- netif_start_queue(dev); -+ /* schedule a link state check */ -+ phy_start(bp->phy_dev); - -- schedule_delayed_work(&bp->periodic_task, HZ); -+ netif_start_queue(dev); - - return 0; - } -@@ -825,10 +955,11 @@ static int macb_close(struct net_device *dev) - struct macb *bp = netdev_priv(dev); - unsigned long flags; - -- cancel_rearming_delayed_work(&bp->periodic_task); -- - netif_stop_queue(dev); - -+ if (bp->phy_dev) -+ phy_stop(bp->phy_dev); -+ - spin_lock_irqsave(&bp->lock, flags); - macb_reset_hw(bp); - netif_carrier_off(dev); -@@ -845,6 +976,9 @@ static struct net_device_stats *macb_get_stats(struct net_device *dev) - struct net_device_stats *nstat = &bp->stats; - struct macb_stats *hwstat = &bp->hw_stats; - -+ /* read stats from hardware */ -+ macb_update_stats(bp); -+ - /* Convert HW stats into netdevice stats */ - nstat->rx_errors = (hwstat->rx_fcs_errors + - hwstat->rx_align_errors + -@@ -882,18 +1016,27 @@ static struct net_device_stats *macb_get_stats(struct net_device *dev) - static int macb_get_settings(struct net_device *dev, struct ethtool_cmd *cmd) - { - struct macb *bp = netdev_priv(dev); -+ struct phy_device *phydev = bp->phy_dev; - -- return mii_ethtool_gset(&bp->mii, cmd); -+ if (!phydev) -+ return -ENODEV; -+ -+ return phy_ethtool_gset(phydev, cmd); - } - - static int macb_set_settings(struct net_device *dev, struct ethtool_cmd *cmd) - { - struct macb *bp = netdev_priv(dev); -+ struct phy_device *phydev = bp->phy_dev; - -- return mii_ethtool_sset(&bp->mii, cmd); -+ if (!phydev) -+ return -ENODEV; -+ -+ return phy_ethtool_sset(phydev, cmd); - } - --static void macb_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info) -+static void macb_get_drvinfo(struct net_device *dev, -+ struct ethtool_drvinfo *info) - { - struct macb *bp = netdev_priv(dev); - -@@ -902,104 +1045,34 @@ static void macb_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *inf - strcpy(info->bus_info, bp->pdev->dev.bus_id); - } - --static int macb_nway_reset(struct net_device *dev) --{ -- struct macb *bp = netdev_priv(dev); -- return mii_nway_restart(&bp->mii); --} -- - static struct ethtool_ops macb_ethtool_ops = { - .get_settings = macb_get_settings, - .set_settings = macb_set_settings, - .get_drvinfo = macb_get_drvinfo, -- .nway_reset = macb_nway_reset, - .get_link = ethtool_op_get_link, - }; - - static int macb_ioctl(struct net_device *dev, struct ifreq *rq, int cmd) - { - struct macb *bp = netdev_priv(dev); -+ struct phy_device *phydev = bp->phy_dev; - - if (!netif_running(dev)) - return -EINVAL; - -- return generic_mii_ioctl(&bp->mii, if_mii(rq), cmd, NULL); --} -- --static ssize_t macb_mii_show(const struct device *_dev, char *buf, -- unsigned long addr) --{ -- struct net_device *dev = to_net_dev(_dev); -- struct macb *bp = netdev_priv(dev); -- ssize_t ret = -EINVAL; -- -- if (netif_running(dev)) { -- int value; -- value = macb_mdio_read(dev, bp->mii.phy_id, addr); -- ret = sprintf(buf, "0x%04x\n", (uint16_t)value); -- } -- -- return ret; --} -- --#define MII_ENTRY(name, addr) \ --static ssize_t show_##name(struct device *_dev, \ -- struct device_attribute *attr, \ -- char *buf) \ --{ \ -- return macb_mii_show(_dev, buf, addr); \ --} \ --static DEVICE_ATTR(name, S_IRUGO, show_##name, NULL) -- --MII_ENTRY(bmcr, MII_BMCR); --MII_ENTRY(bmsr, MII_BMSR); --MII_ENTRY(physid1, MII_PHYSID1); --MII_ENTRY(physid2, MII_PHYSID2); --MII_ENTRY(advertise, MII_ADVERTISE); --MII_ENTRY(lpa, MII_LPA); --MII_ENTRY(expansion, MII_EXPANSION); -- --static struct attribute *macb_mii_attrs[] = { -- &dev_attr_bmcr.attr, -- &dev_attr_bmsr.attr, -- &dev_attr_physid1.attr, -- &dev_attr_physid2.attr, -- &dev_attr_advertise.attr, -- &dev_attr_lpa.attr, -- &dev_attr_expansion.attr, -- NULL, --}; -- --static struct attribute_group macb_mii_group = { -- .name = "mii", -- .attrs = macb_mii_attrs, --}; -- --static void macb_unregister_sysfs(struct net_device *net) --{ -- struct device *_dev = &net->dev; -+ if (!phydev) -+ return -ENODEV; - -- sysfs_remove_group(&_dev->kobj, &macb_mii_group); -+ return phy_mii_ioctl(phydev, if_mii(rq), cmd); - } - --static int macb_register_sysfs(struct net_device *net) --{ -- struct device *_dev = &net->dev; -- int ret; -- -- ret = sysfs_create_group(&_dev->kobj, &macb_mii_group); -- if (ret) -- printk(KERN_WARNING -- "%s: sysfs mii attribute registration failed: %d\n", -- net->name, ret); -- return ret; --} - static int __devinit macb_probe(struct platform_device *pdev) - { - struct eth_platform_data *pdata; - struct resource *regs; - struct net_device *dev; - struct macb *bp; -+ struct phy_device *phydev; - unsigned long pclk_hz; - u32 config; - int err = -ENXIO; -@@ -1073,6 +1146,7 @@ static int __devinit macb_probe(struct platform_device *pdev) - dev->stop = macb_close; - dev->hard_start_xmit = macb_start_xmit; - dev->get_stats = macb_get_stats; -+ dev->set_multicast_list = macb_set_rx_mode; - dev->do_ioctl = macb_ioctl; - dev->poll = macb_poll; - dev->weight = 64; -@@ -1080,10 +1154,6 @@ static int __devinit macb_probe(struct platform_device *pdev) - - dev->base_addr = regs->start; - -- INIT_DELAYED_WORK(&bp->periodic_task, macb_periodic_task); -- mutex_init(&bp->mdio_mutex); -- init_completion(&bp->mdio_complete); -- - /* Set MII management clock divider */ - pclk_hz = clk_get_rate(bp->pclk); - if (pclk_hz <= 20000000) -@@ -1096,20 +1166,9 @@ static int __devinit macb_probe(struct platform_device *pdev) - config = MACB_BF(CLK, MACB_CLK_DIV64); - macb_writel(bp, NCFGR, config); - -- bp->mii.dev = dev; -- bp->mii.mdio_read = macb_mdio_read; -- bp->mii.mdio_write = macb_mdio_write; -- bp->mii.phy_id_mask = 0x1f; -- bp->mii.reg_num_mask = 0x1f; -- - macb_get_hwaddr(bp); -- err = macb_phy_probe(bp); -- if (err) { -- dev_err(&pdev->dev, "Failed to detect PHY, aborting.\n"); -- goto err_out_free_irq; -- } -- - pdata = pdev->dev.platform_data; -+ - if (pdata && pdata->is_rmii) - #if defined(CONFIG_ARCH_AT91) - macb_writel(bp, USRIO, (MACB_BIT(RMII) | MACB_BIT(CLKEN)) ); -@@ -1131,9 +1190,11 @@ static int __devinit macb_probe(struct platform_device *pdev) - goto err_out_free_irq; - } - -- platform_set_drvdata(pdev, dev); -+ if (macb_mii_init(bp) != 0) { -+ goto err_out_unregister_netdev; -+ } - -- macb_register_sysfs(dev); -+ platform_set_drvdata(pdev, dev); - - printk(KERN_INFO "%s: Atmel MACB at 0x%08lx irq %d " - "(%02x:%02x:%02x:%02x:%02x:%02x)\n", -@@ -1141,8 +1202,15 @@ static int __devinit macb_probe(struct platform_device *pdev) - dev->dev_addr[0], dev->dev_addr[1], dev->dev_addr[2], - dev->dev_addr[3], dev->dev_addr[4], dev->dev_addr[5]); - -+ phydev = bp->phy_dev; -+ printk(KERN_INFO "%s: attached PHY driver [%s] " -+ "(mii_bus:phy_addr=%s, irq=%d)\n", -+ dev->name, phydev->drv->name, phydev->dev.bus_id, phydev->irq); -+ - return 0; - -+err_out_unregister_netdev: -+ unregister_netdev(dev); - err_out_free_irq: - free_irq(dev->irq, dev); - err_out_iounmap: -@@ -1153,7 +1221,9 @@ err_out_disable_clocks: - clk_put(bp->hclk); - #endif - clk_disable(bp->pclk); -+#ifndef CONFIG_ARCH_AT91 - err_out_put_pclk: -+#endif - clk_put(bp->pclk); - err_out_free_dev: - free_netdev(dev); -@@ -1171,7 +1241,8 @@ static int __devexit macb_remove(struct platform_device *pdev) - - if (dev) { - bp = netdev_priv(dev); -- macb_unregister_sysfs(dev); -+ mdiobus_unregister(&bp->mii_bus); -+ kfree(bp->mii_bus.irq); - unregister_netdev(dev); - free_irq(dev->irq, dev); - iounmap(bp->regs); -diff --git a/drivers/net/macb.h b/drivers/net/macb.h -index b3bb218..4e3283e 100644 ---- a/drivers/net/macb.h -+++ b/drivers/net/macb.h -@@ -383,11 +383,11 @@ struct macb { - - unsigned int rx_pending, tx_pending; - -- struct delayed_work periodic_task; -- -- struct mutex mdio_mutex; -- struct completion mdio_complete; -- struct mii_if_info mii; -+ struct mii_bus mii_bus; -+ struct phy_device *phy_dev; -+ unsigned int link; -+ unsigned int speed; -+ unsigned int duplex; - }; - - #endif /* _MACB_H */ -diff --git a/drivers/rtc/Kconfig b/drivers/rtc/Kconfig -index 4e4c10a..6d014fb 100644 ---- a/drivers/rtc/Kconfig -+++ b/drivers/rtc/Kconfig -@@ -379,6 +379,13 @@ config RTC_DRV_PL031 - To compile this driver as a module, choose M here: the - module will be called rtc-pl031. - -+config RTC_DRV_AT32AP700X -+ tristate "AT32AP700X series RTC" -+ depends on RTC_CLASS && PLATFORM_AT32AP -+ help -+ Driver for the internal RTC (Realtime Clock) on Atmel AVR32 -+ AT32AP700x family processors. -+ - config RTC_DRV_AT91RM9200 - tristate "AT91RM9200" - depends on RTC_CLASS && ARCH_AT91RM9200 -diff --git a/drivers/rtc/Makefile b/drivers/rtc/Makefile -index a1afbc2..5fb1c10 100644 ---- a/drivers/rtc/Makefile -+++ b/drivers/rtc/Makefile -@@ -19,6 +19,7 @@ obj-$(CONFIG_RTC_DRV_CMOS) += rtc-cmos.o - obj-$(CONFIG_RTC_DRV_X1205) += rtc-x1205.o - obj-$(CONFIG_RTC_DRV_ISL1208) += rtc-isl1208.o - obj-$(CONFIG_RTC_DRV_TEST) += rtc-test.o -+obj-$(CONFIG_RTC_DRV_AT32AP700X) += rtc-at32ap700x.o - obj-$(CONFIG_RTC_DRV_DS1307) += rtc-ds1307.o - obj-$(CONFIG_RTC_DRV_DS1672) += rtc-ds1672.o - obj-$(CONFIG_RTC_DRV_DS1742) += rtc-ds1742.o -diff --git a/drivers/rtc/rtc-at32ap700x.c b/drivers/rtc/rtc-at32ap700x.c -new file mode 100644 -index 0000000..2999214 ---- /dev/null -+++ b/drivers/rtc/rtc-at32ap700x.c -@@ -0,0 +1,317 @@ -+/* -+ * An RTC driver for the AVR32 AT32AP700x processor series. -+ * -+ * Copyright (C) 2007 Atmel Corporation -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 as published -+ * by the Free Software Foundation. -+ */ -+ -+#include <linux/module.h> -+#include <linux/kernel.h> -+#include <linux/platform_device.h> -+#include <linux/rtc.h> -+#include <linux/io.h> -+ -+/* -+ * This is a bare-bones RTC. It runs during most system sleep states, but has -+ * no battery backup and gets reset during system restart. It must be -+ * initialized from an external clock (network, I2C, etc) before it can be of -+ * much use. -+ * -+ * The alarm functionality is limited by the hardware, not supporting -+ * periodic interrupts. -+ */ -+ -+#define RTC_CTRL 0x00 -+#define RTC_CTRL_EN 0 -+#define RTC_CTRL_PCLR 1 -+#define RTC_CTRL_TOPEN 2 -+#define RTC_CTRL_PSEL 8 -+ -+#define RTC_VAL 0x04 -+ -+#define RTC_TOP 0x08 -+ -+#define RTC_IER 0x10 -+#define RTC_IER_TOPI 0 -+ -+#define RTC_IDR 0x14 -+#define RTC_IDR_TOPI 0 -+ -+#define RTC_IMR 0x18 -+#define RTC_IMR_TOPI 0 -+ -+#define RTC_ISR 0x1c -+#define RTC_ISR_TOPI 0 -+ -+#define RTC_ICR 0x20 -+#define RTC_ICR_TOPI 0 -+ -+#define RTC_BIT(name) (1 << RTC_##name) -+#define RTC_BF(name, value) ((value) << RTC_##name) -+ -+#define rtc_readl(dev, reg) \ -+ __raw_readl((dev)->regs + RTC_##reg) -+#define rtc_writel(dev, reg, value) \ -+ __raw_writel((value), (dev)->regs + RTC_##reg) -+ -+struct rtc_at32ap700x { -+ struct rtc_device *rtc; -+ void __iomem *regs; -+ unsigned long alarm_time; -+ unsigned long irq; -+ /* Protect against concurrent register access. */ -+ spinlock_t lock; -+}; -+ -+static int at32_rtc_readtime(struct device *dev, struct rtc_time *tm) -+{ -+ struct rtc_at32ap700x *rtc = dev_get_drvdata(dev); -+ unsigned long now; -+ -+ now = rtc_readl(rtc, VAL); -+ rtc_time_to_tm(now, tm); -+ -+ return 0; -+} -+ -+static int at32_rtc_settime(struct device *dev, struct rtc_time *tm) -+{ -+ struct rtc_at32ap700x *rtc = dev_get_drvdata(dev); -+ unsigned long now; -+ int ret; -+ -+ ret = rtc_tm_to_time(tm, &now); -+ if (ret == 0) -+ rtc_writel(rtc, VAL, now); -+ -+ return ret; -+} -+ -+static int at32_rtc_readalarm(struct device *dev, struct rtc_wkalrm *alrm) -+{ -+ struct rtc_at32ap700x *rtc = dev_get_drvdata(dev); -+ -+ rtc_time_to_tm(rtc->alarm_time, &alrm->time); -+ alrm->pending = rtc_readl(rtc, IMR) & RTC_BIT(IMR_TOPI) ? 1 : 0; -+ -+ return 0; -+} -+ -+static int at32_rtc_setalarm(struct device *dev, struct rtc_wkalrm *alrm) -+{ -+ struct rtc_at32ap700x *rtc = dev_get_drvdata(dev); -+ unsigned long rtc_unix_time; -+ unsigned long alarm_unix_time; -+ int ret; -+ -+ rtc_unix_time = rtc_readl(rtc, VAL); -+ -+ ret = rtc_tm_to_time(&alrm->time, &alarm_unix_time); -+ if (ret) -+ return ret; -+ -+ if (alarm_unix_time < rtc_unix_time) -+ return -EINVAL; -+ -+ spin_lock_irq(&rtc->lock); -+ rtc->alarm_time = alarm_unix_time; -+ rtc_writel(rtc, TOP, rtc->alarm_time); -+ if (alrm->pending) -+ rtc_writel(rtc, CTRL, rtc_readl(rtc, CTRL) -+ | RTC_BIT(CTRL_TOPEN)); -+ else -+ rtc_writel(rtc, CTRL, rtc_readl(rtc, CTRL) -+ & ~RTC_BIT(CTRL_TOPEN)); -+ spin_unlock_irq(&rtc->lock); -+ -+ return ret; -+} -+ -+static int at32_rtc_ioctl(struct device *dev, unsigned int cmd, -+ unsigned long arg) -+{ -+ struct rtc_at32ap700x *rtc = dev_get_drvdata(dev); -+ int ret = 0; -+ -+ spin_lock_irq(&rtc->lock); -+ -+ switch (cmd) { -+ case RTC_AIE_ON: -+ if (rtc_readl(rtc, VAL) > rtc->alarm_time) { -+ ret = -EINVAL; -+ break; -+ } -+ rtc_writel(rtc, CTRL, rtc_readl(rtc, CTRL) -+ | RTC_BIT(CTRL_TOPEN)); -+ rtc_writel(rtc, ICR, RTC_BIT(ICR_TOPI)); -+ rtc_writel(rtc, IER, RTC_BIT(IER_TOPI)); -+ break; -+ case RTC_AIE_OFF: -+ rtc_writel(rtc, CTRL, rtc_readl(rtc, CTRL) -+ & ~RTC_BIT(CTRL_TOPEN)); -+ rtc_writel(rtc, IDR, RTC_BIT(IDR_TOPI)); -+ rtc_writel(rtc, ICR, RTC_BIT(ICR_TOPI)); -+ break; -+ default: -+ ret = -ENOIOCTLCMD; -+ break; -+ } -+ -+ spin_unlock_irq(&rtc->lock); -+ -+ return ret; -+} -+ -+static irqreturn_t at32_rtc_interrupt(int irq, void *dev_id) -+{ -+ struct rtc_at32ap700x *rtc = (struct rtc_at32ap700x *)dev_id; -+ unsigned long isr = rtc_readl(rtc, ISR); -+ unsigned long events = 0; -+ int ret = IRQ_NONE; -+ -+ spin_lock(&rtc->lock); -+ -+ if (isr & RTC_BIT(ISR_TOPI)) { -+ rtc_writel(rtc, ICR, RTC_BIT(ICR_TOPI)); -+ rtc_writel(rtc, IDR, RTC_BIT(IDR_TOPI)); -+ rtc_writel(rtc, CTRL, rtc_readl(rtc, CTRL) -+ & ~RTC_BIT(CTRL_TOPEN)); -+ rtc_writel(rtc, VAL, rtc->alarm_time); -+ events = RTC_AF | RTC_IRQF; -+ rtc_update_irq(rtc->rtc, 1, events); -+ ret = IRQ_HANDLED; -+ } -+ -+ spin_unlock(&rtc->lock); -+ -+ return ret; -+} -+ -+static struct rtc_class_ops at32_rtc_ops = { -+ .ioctl = at32_rtc_ioctl, -+ .read_time = at32_rtc_readtime, -+ .set_time = at32_rtc_settime, -+ .read_alarm = at32_rtc_readalarm, -+ .set_alarm = at32_rtc_setalarm, -+}; -+ -+static int __init at32_rtc_probe(struct platform_device *pdev) -+{ -+ struct resource *regs; -+ struct rtc_at32ap700x *rtc; -+ int irq = -1; -+ int ret; -+ -+ rtc = kzalloc(sizeof(struct rtc_at32ap700x), GFP_KERNEL); -+ if (!rtc) { -+ dev_dbg(&pdev->dev, "out of memory\n"); -+ return -ENOMEM; -+ } -+ -+ regs = platform_get_resource(pdev, IORESOURCE_MEM, 0); -+ if (!regs) { -+ dev_dbg(&pdev->dev, "no mmio resource defined\n"); -+ ret = -ENXIO; -+ goto out; -+ } -+ -+ irq = platform_get_irq(pdev, 0); -+ if (irq < 0) { -+ dev_dbg(&pdev->dev, "could not get irq\n"); -+ ret = -ENXIO; -+ goto out; -+ } -+ -+ ret = request_irq(irq, at32_rtc_interrupt, IRQF_SHARED, "rtc", rtc); -+ if (ret) { -+ dev_dbg(&pdev->dev, "could not request irq %d\n", irq); -+ goto out; -+ } -+ -+ rtc->irq = irq; -+ rtc->regs = ioremap(regs->start, regs->end - regs->start + 1); -+ if (!rtc->regs) { -+ ret = -ENOMEM; -+ dev_dbg(&pdev->dev, "could not map I/O memory\n"); -+ goto out_free_irq; -+ } -+ spin_lock_init(&rtc->lock); -+ -+ /* -+ * Maybe init RTC: count from zero at 1 Hz, disable wrap irq. -+ * -+ * Do not reset VAL register, as it can hold an old time -+ * from last JTAG reset. -+ */ -+ if (!(rtc_readl(rtc, CTRL) & RTC_BIT(CTRL_EN))) { -+ rtc_writel(rtc, CTRL, RTC_BIT(CTRL_PCLR)); -+ rtc_writel(rtc, IDR, RTC_BIT(IDR_TOPI)); -+ rtc_writel(rtc, CTRL, RTC_BF(CTRL_PSEL, 0xe) -+ | RTC_BIT(CTRL_EN)); -+ } -+ -+ rtc->rtc = rtc_device_register(pdev->name, &pdev->dev, -+ &at32_rtc_ops, THIS_MODULE); -+ if (IS_ERR(rtc->rtc)) { -+ dev_dbg(&pdev->dev, "could not register rtc device\n"); -+ ret = PTR_ERR(rtc->rtc); -+ goto out_iounmap; -+ } -+ -+ platform_set_drvdata(pdev, rtc); -+ -+ dev_info(&pdev->dev, "Atmel RTC for AT32AP700x at %08lx irq %ld\n", -+ (unsigned long)rtc->regs, rtc->irq); -+ -+ return 0; -+ -+out_iounmap: -+ iounmap(rtc->regs); -+out_free_irq: -+ free_irq(irq, rtc); -+out: -+ kfree(rtc); -+ return ret; -+} -+ -+static int __exit at32_rtc_remove(struct platform_device *pdev) -+{ -+ struct rtc_at32ap700x *rtc = platform_get_drvdata(pdev); -+ -+ free_irq(rtc->irq, rtc); -+ iounmap(rtc->regs); -+ rtc_device_unregister(rtc->rtc); -+ kfree(rtc); -+ platform_set_drvdata(pdev, NULL); -+ -+ return 0; -+} -+ -+MODULE_ALIAS("at32ap700x_rtc"); -+ -+static struct platform_driver at32_rtc_driver = { -+ .remove = __exit_p(at32_rtc_remove), -+ .driver = { -+ .name = "at32ap700x_rtc", -+ .owner = THIS_MODULE, -+ }, -+}; -+ -+static int __init at32_rtc_init(void) -+{ -+ return platform_driver_probe(&at32_rtc_driver, at32_rtc_probe); -+} -+module_init(at32_rtc_init); -+ -+static void __exit at32_rtc_exit(void) -+{ -+ platform_driver_unregister(&at32_rtc_driver); -+} -+module_exit(at32_rtc_exit); -+ -+MODULE_AUTHOR("Hans-Christian Egtvedt <hcegtvedt@atmel.com>"); -+MODULE_DESCRIPTION("Real time clock for AVR32 AT32AP700x"); -+MODULE_LICENSE("GPL"); -diff --git a/drivers/serial/atmel_serial.c b/drivers/serial/atmel_serial.c -index 3320bcd..4d6b3c5 100644 ---- a/drivers/serial/atmel_serial.c -+++ b/drivers/serial/atmel_serial.c -@@ -114,6 +114,7 @@ struct atmel_uart_port { - struct uart_port uart; /* uart */ - struct clk *clk; /* uart clock */ - unsigned short suspended; /* is port suspended? */ -+ int break_active; /* break being received */ - }; - - static struct atmel_uart_port atmel_ports[ATMEL_MAX_UART]; -@@ -252,6 +253,7 @@ static void atmel_break_ctl(struct uart_port *port, int break_state) - */ - static void atmel_rx_chars(struct uart_port *port) - { -+ struct atmel_uart_port *atmel_port = (struct atmel_uart_port *) port; - struct tty_struct *tty = port->info->tty; - unsigned int status, ch, flg; - -@@ -267,13 +269,29 @@ static void atmel_rx_chars(struct uart_port *port) - * note that the error handling code is - * out of the main execution path - */ -- if (unlikely(status & (ATMEL_US_PARE | ATMEL_US_FRAME | ATMEL_US_OVRE | ATMEL_US_RXBRK))) { -+ if (unlikely(status & (ATMEL_US_PARE | ATMEL_US_FRAME -+ | ATMEL_US_OVRE | ATMEL_US_RXBRK) -+ || atmel_port->break_active)) { - UART_PUT_CR(port, ATMEL_US_RSTSTA); /* clear error */ -- if (status & ATMEL_US_RXBRK) { -+ if (status & ATMEL_US_RXBRK -+ && !atmel_port->break_active) { - status &= ~(ATMEL_US_PARE | ATMEL_US_FRAME); /* ignore side-effect */ - port->icount.brk++; -+ atmel_port->break_active = 1; -+ UART_PUT_IER(port, ATMEL_US_RXBRK); - if (uart_handle_break(port)) - goto ignore_char; -+ } else { -+ /* -+ * This is either the end-of-break -+ * condition or we've received at -+ * least one character without RXBRK -+ * being set. In both cases, the next -+ * RXBRK will indicate start-of-break. -+ */ -+ UART_PUT_IDR(port, ATMEL_US_RXBRK); -+ status &= ~ATMEL_US_RXBRK; -+ atmel_port->break_active = 0; - } - if (status & ATMEL_US_PARE) - port->icount.parity++; -@@ -352,6 +370,16 @@ static irqreturn_t atmel_interrupt(int irq, void *dev_id) - /* Interrupt receive */ - if (pending & ATMEL_US_RXRDY) - atmel_rx_chars(port); -+ else if (pending & ATMEL_US_RXBRK) { -+ /* -+ * End of break detected. If it came along -+ * with a character, atmel_rx_chars will -+ * handle it. -+ */ -+ UART_PUT_CR(port, ATMEL_US_RSTSTA); -+ UART_PUT_IDR(port, ATMEL_US_RXBRK); -+ atmel_port->break_active = 0; -+ } - - // TODO: All reads to CSR will clear these interrupts! - if (pending & ATMEL_US_RIIC) port->icount.rng++; -diff --git a/drivers/spi/atmel_spi.c b/drivers/spi/atmel_spi.c -index 8b2601d..8f5453f 100644 ---- a/drivers/spi/atmel_spi.c -+++ b/drivers/spi/atmel_spi.c -@@ -412,8 +412,8 @@ static int atmel_spi_setup(struct spi_device *spi) - csr |= SPI_BIT(NCPHA); - - /* TODO: DLYBS and DLYBCT */ -- csr |= SPI_BF(DLYBS, 10); -- csr |= SPI_BF(DLYBCT, 10); -+ csr |= SPI_BF(DLYBS, 0); -+ csr |= SPI_BF(DLYBCT, 0); - - /* chipselect must have been muxed as GPIO (e.g. in board setup) */ - npcs_pin = (unsigned int)spi->controller_data; -diff --git a/drivers/usb/gadget/Kconfig b/drivers/usb/gadget/Kconfig -index f771a7c..0c3d55b 100644 ---- a/drivers/usb/gadget/Kconfig -+++ b/drivers/usb/gadget/Kconfig -@@ -175,6 +175,19 @@ config USB_LH7A40X - default USB_GADGET - select USB_GADGET_SELECTED - -+config USB_GADGET_ATMEL_USBA -+ boolean "Atmel USBA" -+ select USB_GADGET_DUALSPEED -+ depends on AVR32 -+ help -+ USBA is the integrated high-speed USB Device controller on -+ the AT32AP700x processors from Atmel. -+ -+config USB_ATMEL_USBA -+ tristate -+ depends on USB_GADGET_ATMEL_USBA -+ default USB_GADGET -+ select USB_GADGET_SELECTED - - config USB_GADGET_OMAP - boolean "OMAP USB Device Controller" -diff --git a/drivers/usb/gadget/Makefile b/drivers/usb/gadget/Makefile -index 5db1939..c28da01 100644 ---- a/drivers/usb/gadget/Makefile -+++ b/drivers/usb/gadget/Makefile -@@ -8,6 +8,7 @@ obj-$(CONFIG_USB_GOKU) += goku_udc.o - obj-$(CONFIG_USB_OMAP) += omap_udc.o - obj-$(CONFIG_USB_LH7A40X) += lh7a40x_udc.o - obj-$(CONFIG_USB_AT91) += at91_udc.o -+obj-$(CONFIG_USB_ATMEL_USBA) += atmel_usba_udc.o - obj-$(CONFIG_USB_FSL_USB2) += fsl_usb2_udc.o - - # -diff --git a/drivers/usb/gadget/atmel_usba_udc.c b/drivers/usb/gadget/atmel_usba_udc.c -new file mode 100644 -index 0000000..34dbae3 ---- /dev/null -+++ b/drivers/usb/gadget/atmel_usba_udc.c -@@ -0,0 +1,2072 @@ -+/* -+ * Driver for the Atmel USBA high speed USB device controller -+ * -+ * Copyright (C) 2005-2007 Atmel Corporation -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 as -+ * published by the Free Software Foundation. -+ */ -+/* #define DEBUG */ -+ -+#include <linux/clk.h> -+#include <linux/module.h> -+#include <linux/init.h> -+#include <linux/interrupt.h> -+#include <linux/io.h> -+#include <linux/device.h> -+#include <linux/dma-mapping.h> -+#include <linux/list.h> -+#include <linux/platform_device.h> -+#include <linux/usb/ch9.h> -+#include <linux/usb_gadget.h> -+#include <linux/delay.h> -+ -+#include <asm/gpio.h> -+#include <asm/arch/board.h> -+ -+#include "atmel_usba_udc.h" -+ -+#define DMA_ADDR_INVALID (~(dma_addr_t)0) -+ -+#define FIFO_IOMEM_ID 0 -+#define CTRL_IOMEM_ID 1 -+ -+#ifdef DEBUG -+#define DBG_ERR 0x0001 /* report all error returns */ -+#define DBG_HW 0x0002 /* debug hardware initialization */ -+#define DBG_GADGET 0x0004 /* calls to/from gadget driver */ -+#define DBG_INT 0x0008 /* interrupts */ -+#define DBG_BUS 0x0010 /* report changes in bus state */ -+#define DBG_QUEUE 0x0020 /* debug request queue processing */ -+#define DBG_FIFO 0x0040 /* debug FIFO contents */ -+#define DBG_DMA 0x0080 /* debug DMA handling */ -+#define DBG_REQ 0x0100 /* print out queued request length */ -+#define DBG_ALL 0xffff -+#define DBG_NONE 0x0000 -+ -+#define DEBUG_LEVEL (DBG_ERR) -+#define DBG(level, fmt, ...) \ -+ do { \ -+ if ((level) & DEBUG_LEVEL) \ -+ printk(KERN_DEBUG "udc: " fmt, ## __VA_ARGS__); \ -+ } while (0) -+#else -+#define DBG(level, fmt...) -+#endif -+ -+static struct usba_udc the_udc; -+ -+#ifdef CONFIG_DEBUG_FS -+#include <linux/debugfs.h> -+#include <linux/uaccess.h> -+ -+static int queue_dbg_open(struct inode *inode, struct file *file) -+{ -+ struct usba_ep *ep = inode->i_private; -+ struct usba_request *req, *req_copy; -+ struct list_head *queue_data; -+ -+ queue_data = kmalloc(sizeof(*queue_data), GFP_KERNEL); -+ if (!queue_data) -+ return -ENOMEM; -+ INIT_LIST_HEAD(queue_data); -+ -+ spin_lock_irq(&ep->udc->lock); -+ list_for_each_entry(req, &ep->queue, queue) { -+ req_copy = kmalloc(sizeof(*req_copy), GFP_ATOMIC); -+ if (!req_copy) -+ goto fail; -+ memcpy(req_copy, req, sizeof(*req_copy)); -+ list_add_tail(&req_copy->queue, queue_data); -+ } -+ spin_unlock_irq(&ep->udc->lock); -+ -+ file->private_data = queue_data; -+ return 0; -+ -+fail: -+ spin_unlock_irq(&ep->udc->lock); -+ list_for_each_entry_safe(req, req_copy, queue_data, queue) { -+ list_del(&req->queue); -+ kfree(req); -+ } -+ kfree(queue_data); -+ return -ENOMEM; -+} -+ -+/* -+ * bbbbbbbb llllllll IZS sssss nnnn FDL\n\0 -+ * -+ * b: buffer address -+ * l: buffer length -+ * I/i: interrupt/no interrupt -+ * Z/z: zero/no zero -+ * S/s: short ok/short not ok -+ * s: status -+ * n: nr_packets -+ * F/f: submitted/not submitted to FIFO -+ * D/d: using/not using DMA -+ * L/l: last transaction/not last transaction -+ */ -+static ssize_t queue_dbg_read(struct file *file, char __user *buf, -+ size_t nbytes, loff_t *ppos) -+{ -+ struct list_head *queue = file->private_data; -+ struct usba_request *req, *tmp_req; -+ size_t len, remaining, actual = 0; -+ char tmpbuf[38]; -+ -+ if (!access_ok(VERIFY_WRITE, buf, nbytes)) -+ return -EFAULT; -+ -+ mutex_lock(&file->f_dentry->d_inode->i_mutex); -+ list_for_each_entry_safe(req, tmp_req, queue, queue) { -+ len = snprintf(tmpbuf, sizeof(tmpbuf), -+ "%8p %08x %c%c%c %5d %c%c%c\n", -+ req->req.buf, req->req.length, -+ req->req.no_interrupt ? 'i' : 'I', -+ req->req.zero ? 'Z' : 'z', -+ req->req.short_not_ok ? 's' : 'S', -+ req->req.status, -+ req->submitted ? 'F' : 'f', -+ req->using_dma ? 'D' : 'd', -+ req->last_transaction ? 'L' : 'l'); -+ len = min(len, sizeof(tmpbuf)); -+ if (len > nbytes) -+ break; -+ -+ list_del(&req->queue); -+ kfree(req); -+ -+ remaining = __copy_to_user(buf, tmpbuf, len); -+ actual += len - remaining; -+ if (remaining) -+ break; -+ -+ nbytes -= len; -+ buf += len; -+ } -+ mutex_unlock(&file->f_dentry->d_inode->i_mutex); -+ -+ return actual; -+} -+ -+static int queue_dbg_release(struct inode *inode, struct file *file) -+{ -+ struct list_head *queue_data = file->private_data; -+ struct usba_request *req, *tmp_req; -+ -+ list_for_each_entry_safe(req, tmp_req, queue_data, queue) { -+ list_del(&req->queue); -+ kfree(req); -+ } -+ kfree(queue_data); -+ return 0; -+} -+ -+static int regs_dbg_open(struct inode *inode, struct file *file) -+{ -+ struct usba_udc *udc; -+ unsigned int i; -+ u32 *data; -+ int ret = -ENOMEM; -+ -+ mutex_lock(&inode->i_mutex); -+ udc = inode->i_private; -+ data = kmalloc(inode->i_size, GFP_KERNEL); -+ if (!data) -+ goto out; -+ -+ spin_lock_irq(&udc->lock); -+ for (i = 0; i < inode->i_size / 4; i++) -+ data[i] = __raw_readl(udc->regs + i * 4); -+ spin_unlock_irq(&udc->lock); -+ -+ file->private_data = data; -+ ret = 0; -+ -+out: -+ mutex_unlock(&inode->i_mutex); -+ -+ return ret; -+} -+ -+static ssize_t regs_dbg_read(struct file *file, char __user *buf, -+ size_t nbytes, loff_t *ppos) -+{ -+ struct inode *inode = file->f_dentry->d_inode; -+ int ret; -+ -+ mutex_lock(&inode->i_mutex); -+ ret = simple_read_from_buffer(buf, nbytes, ppos, -+ file->private_data, -+ file->f_dentry->d_inode->i_size); -+ mutex_unlock(&inode->i_mutex); -+ -+ return ret; -+} -+ -+static int regs_dbg_release(struct inode *inode, struct file *file) -+{ -+ kfree(file->private_data); -+ return 0; -+} -+ -+const struct file_operations queue_dbg_fops = { -+ .owner = THIS_MODULE, -+ .open = queue_dbg_open, -+ .llseek = no_llseek, -+ .read = queue_dbg_read, -+ .release = queue_dbg_release, -+}; -+ -+const struct file_operations regs_dbg_fops = { -+ .owner = THIS_MODULE, -+ .open = regs_dbg_open, -+ .llseek = generic_file_llseek, -+ .read = regs_dbg_read, -+ .release = regs_dbg_release, -+}; -+ -+static void usba_ep_init_debugfs(struct usba_udc *udc, -+ struct usba_ep *ep) -+{ -+ struct dentry *ep_root; -+ -+ ep_root = debugfs_create_dir(ep_name(ep), udc->debugfs_root); -+ if (!ep_root) -+ goto err_root; -+ ep->debugfs_dir = ep_root; -+ -+ ep->debugfs_queue = debugfs_create_file("queue", 0400, ep_root, -+ ep, &queue_dbg_fops); -+ if (!ep->debugfs_queue) -+ goto err_queue; -+ -+ if (ep_can_dma(ep)) { -+ ep->debugfs_dma_status -+ = debugfs_create_u32("dma_status", 0400, ep_root, -+ &ep->last_dma_status); -+ if (!ep->debugfs_dma_status) -+ goto err_dma_status; -+ } -+ if (ep_is_control(ep)) { -+ ep->debugfs_state -+ = debugfs_create_u32("state", 0400, ep_root, -+ &ep->state); -+ if (!ep->debugfs_state) -+ goto err_state; -+ } -+ -+ return; -+ -+err_state: -+ if (ep_can_dma(ep)) -+ debugfs_remove(ep->debugfs_dma_status); -+err_dma_status: -+ debugfs_remove(ep->debugfs_queue); -+err_queue: -+ debugfs_remove(ep_root); -+err_root: -+ dev_err(&ep->udc->pdev->dev, -+ "failed to create debugfs directory for %s\n", ep_name(ep)); -+} -+ -+static void usba_ep_cleanup_debugfs(struct usba_ep *ep) -+{ -+ debugfs_remove(ep->debugfs_queue); -+ debugfs_remove(ep->debugfs_dma_status); -+ debugfs_remove(ep->debugfs_state); -+ debugfs_remove(ep->debugfs_dir); -+ ep->debugfs_dma_status = NULL; -+ ep->debugfs_dir = NULL; -+} -+ -+static void usba_init_debugfs(struct usba_udc *udc) -+{ -+ struct dentry *root, *regs; -+ struct resource *regs_resource; -+ -+ root = debugfs_create_dir(udc->gadget.name, NULL); -+ if (IS_ERR(root) || !root) -+ goto err_root; -+ udc->debugfs_root = root; -+ -+ regs = debugfs_create_file("regs", 0400, root, udc, ®s_dbg_fops); -+ if (!regs) -+ goto err_regs; -+ -+ regs_resource = platform_get_resource(udc->pdev, IORESOURCE_MEM, -+ CTRL_IOMEM_ID); -+ regs->d_inode->i_size = regs_resource->end - regs_resource->start + 1; -+ udc->debugfs_regs = regs; -+ -+ usba_ep_init_debugfs(udc, to_usba_ep(udc->gadget.ep0)); -+ -+ return; -+ -+err_regs: -+ debugfs_remove(root); -+err_root: -+ udc->debugfs_root = NULL; -+ dev_err(&udc->pdev->dev, "debugfs is not available\n"); -+} -+ -+static void usba_cleanup_debugfs(struct usba_udc *udc) -+{ -+ usba_ep_cleanup_debugfs(to_usba_ep(udc->gadget.ep0)); -+ debugfs_remove(udc->debugfs_regs); -+ debugfs_remove(udc->debugfs_root); -+ udc->debugfs_regs = NULL; -+ udc->debugfs_root = NULL; -+} -+#else -+static inline void usba_ep_init_debugfs(struct usba_udc *udc, -+ struct usba_ep *ep) -+{ -+ -+} -+ -+static inline void usba_ep_cleanup_debugfs(struct usba_ep *ep) -+{ -+ -+} -+ -+static inline void usba_init_debugfs(struct usba_udc *udc) -+{ -+ -+} -+ -+static inline void usba_cleanup_debugfs(struct usba_udc *udc) -+{ -+ -+} -+#endif -+ -+static int vbus_is_present(struct usba_udc *udc) -+{ -+ if (udc->vbus_pin != -1) -+ return gpio_get_value(udc->vbus_pin); -+ -+ /* No Vbus detection: Assume always present */ -+ return 1; -+} -+ -+static void copy_to_fifo(void __iomem *fifo, const void *buf, int len) -+{ -+ unsigned long tmp; -+ -+ DBG(DBG_FIFO, "copy to FIFO (len %d):\n", len); -+ for (; len > 0; len -= 4, buf += 4, fifo += 4) { -+ tmp = *(unsigned long *)buf; -+ if (len >= 4) { -+ DBG(DBG_FIFO, " -> %08lx\n", tmp); -+ __raw_writel(tmp, fifo); -+ } else { -+ do { -+ DBG(DBG_FIFO, " -> %02lx\n", tmp >> 24); -+ __raw_writeb(tmp >> 24, fifo); -+ fifo++; -+ tmp <<= 8; -+ } while (--len); -+ break; -+ } -+ } -+} -+ -+static void copy_from_fifo(void *buf, void __iomem *fifo, int len) -+{ -+ union { -+ unsigned long *w; -+ unsigned char *b; -+ } p; -+ unsigned long tmp; -+ -+ DBG(DBG_FIFO, "copy from FIFO (len %d):\n", len); -+ for (p.w = buf; len > 0; len -= 4, p.w++, fifo += 4) { -+ if (len >= 4) { -+ tmp = __raw_readl(fifo); -+ *p.w = tmp; -+ DBG(DBG_FIFO, " -> %08lx\n", tmp); -+ } else { -+ do { -+ tmp = __raw_readb(fifo); -+ *p.b = tmp; -+ DBG(DBG_FIFO, " -> %02lx\n", tmp); -+ fifo++, p.b++; -+ } while (--len); -+ } -+ } -+} -+ -+static void next_fifo_transaction(struct usba_ep *ep, -+ struct usba_request *req) -+{ -+ unsigned int transaction_len; -+ -+ transaction_len = req->req.length - req->req.actual; -+ req->last_transaction = 1; -+ if (transaction_len > ep->ep.maxpacket) { -+ transaction_len = ep->ep.maxpacket; -+ req->last_transaction = 0; -+ } else if (transaction_len == ep->ep.maxpacket -+ && req->req.zero) { -+ req->last_transaction = 0; -+ } -+ DBG(DBG_QUEUE, "%s: submit_transaction, req %p (length %d)%s\n", -+ ep_name(ep), req, transaction_len, -+ req->last_transaction ? ", done" : ""); -+ -+ copy_to_fifo(ep->fifo, req->req.buf + req->req.actual, transaction_len); -+ usba_ep_writel(ep, SET_STA, USBA_BIT(TX_PK_RDY)); -+ req->req.actual += transaction_len; -+} -+ -+static void submit_request(struct usba_ep *ep, struct usba_request *req) -+{ -+ DBG(DBG_QUEUE, "%s: submit_request: req %p (length %d)\n", -+ ep_name(ep), req, req->req.length); -+ -+ req->req.actual = 0; -+ req->submitted = 1; -+ -+ if (req->using_dma) { -+ if (req->req.length == 0) { -+ usba_ep_writel(ep, CTL_ENB, USBA_BIT(TX_PK_RDY)); -+ return; -+ } -+ -+ if (req->req.zero) -+ usba_ep_writel(ep, CTL_ENB, USBA_BIT(SHORT_PACKET)); -+ else -+ usba_ep_writel(ep, CTL_DIS, USBA_BIT(SHORT_PACKET)); -+ -+ usba_dma_writel(ep, ADDRESS, req->req.dma); -+ usba_dma_writel(ep, CONTROL, req->ctrl); -+ } else { -+ next_fifo_transaction(ep, req); -+ if (req->last_transaction) { -+ usba_ep_writel(ep, CTL_DIS, USBA_BIT(TX_PK_RDY)); -+ usba_ep_writel(ep, CTL_ENB, USBA_BIT(TX_COMPLETE)); -+ } else { -+ usba_ep_writel(ep, CTL_DIS, USBA_BIT(TX_COMPLETE)); -+ usba_ep_writel(ep, CTL_ENB, USBA_BIT(TX_PK_RDY)); -+ } -+ } -+} -+ -+static void submit_next_request(struct usba_ep *ep) -+{ -+ struct usba_request *req; -+ -+ if (list_empty(&ep->queue)) { -+ usba_ep_writel(ep, CTL_DIS, (USBA_BIT(TX_PK_RDY) -+ | USBA_BIT(RX_BK_RDY))); -+ return; -+ } -+ -+ req = list_entry(ep->queue.next, struct usba_request, queue); -+ if (!req->submitted) -+ submit_request(ep, req); -+} -+ -+static void send_status(struct usba_udc *udc, struct usba_ep *ep) -+{ -+ ep->state = STATUS_STAGE_IN; -+ usba_ep_writel(ep, SET_STA, USBA_BIT(TX_PK_RDY)); -+ usba_ep_writel(ep, CTL_ENB, USBA_BIT(TX_COMPLETE)); -+} -+ -+static void receive_data(struct usba_ep *ep) -+{ -+ struct usba_udc *udc = ep->udc; -+ struct usba_request *req; -+ unsigned long status; -+ unsigned int bytecount, nr_busy; -+ int is_complete = 0; -+ -+ status = usba_ep_readl(ep, STA); -+ nr_busy = USBA_BFEXT(BUSY_BANKS, status); -+ -+ DBG(DBG_QUEUE, "receive data: nr_busy=%u\n", nr_busy); -+ -+ while (nr_busy > 0) { -+ if (list_empty(&ep->queue)) { -+ usba_ep_writel(ep, CTL_DIS, USBA_BIT(RX_BK_RDY)); -+ break; -+ } -+ req = list_entry(ep->queue.next, -+ struct usba_request, queue); -+ -+ bytecount = USBA_BFEXT(BYTE_COUNT, status); -+ -+ if (status & (1 << 31)) -+ is_complete = 1; -+ if (req->req.actual + bytecount >= req->req.length) { -+ is_complete = 1; -+ bytecount = req->req.length - req->req.actual; -+ } -+ -+ copy_from_fifo(req->req.buf + req->req.actual, -+ ep->fifo, bytecount); -+ req->req.actual += bytecount; -+ -+ usba_ep_writel(ep, CLR_STA, USBA_BIT(RX_BK_RDY)); -+ -+ if (is_complete) { -+ DBG(DBG_QUEUE, "%s: request done\n", ep_name(ep)); -+ req->req.status = 0; -+ list_del_init(&req->queue); -+ usba_ep_writel(ep, CTL_DIS, USBA_BIT(RX_BK_RDY)); -+ req->req.complete(&ep->ep, &req->req); -+ } -+ -+ status = usba_ep_readl(ep, STA); -+ nr_busy = USBA_BFEXT(BUSY_BANKS, status); -+ -+ if (is_complete && ep_is_control(ep)) { -+ send_status(udc, ep); -+ break; -+ } -+ } -+} -+ -+static void request_complete(struct usba_ep *ep, -+ struct usba_request *req, -+ int status) -+{ -+ struct usba_udc *udc = ep->udc; -+ -+ WARN_ON(!list_empty(&req->queue)); -+ -+ if (req->req.status == -EINPROGRESS) -+ req->req.status = status; -+ -+ if (req->mapped) { -+ dma_unmap_single( -+ &udc->pdev->dev, req->req.dma, req->req.length, -+ ep_is_in(ep) ? DMA_TO_DEVICE : DMA_FROM_DEVICE); -+ req->req.dma = DMA_ADDR_INVALID; -+ req->mapped = 0; -+ } -+ -+ DBG(DBG_GADGET | DBG_REQ, -+ "%s: req %p complete: status %d, actual %u\n", -+ ep_name(ep), req, req->req.status, req->req.actual); -+ req->req.complete(&ep->ep, &req->req); -+} -+ -+static void request_complete_list(struct usba_ep *ep, -+ struct list_head *list, -+ int status) -+{ -+ struct usba_request *req, *tmp_req; -+ -+ list_for_each_entry_safe(req, tmp_req, list, queue) { -+ list_del_init(&req->queue); -+ request_complete(ep, req, status); -+ } -+} -+ -+static int usba_ep_enable(struct usb_ep *_ep, -+ const struct usb_endpoint_descriptor *desc) -+{ -+ struct usba_ep *ep = to_usba_ep(_ep); -+ struct usba_udc *udc = ep->udc; -+ unsigned long flags, ept_cfg, maxpacket; -+ -+ DBG(DBG_GADGET, "%s: ep_enable: desc=%p\n", ep_name(ep), desc); -+ -+ maxpacket = le16_to_cpu(desc->wMaxPacketSize); -+ -+ if (ep->index == 0 -+ || desc->bDescriptorType != USB_DT_ENDPOINT -+ || ((desc->bEndpointAddress & USB_ENDPOINT_NUMBER_MASK) -+ != ep->index) -+ || maxpacket == 0 -+ || maxpacket > ep->fifo_size) { -+ DBG(DBG_ERR, "ep_enable: Invalid argument"); -+ return -EINVAL; -+ } -+ -+ ep->is_isoc = 0; -+ ep->is_in = 0; -+ -+ if ((desc->bmAttributes & USB_ENDPOINT_XFERTYPE_MASK) -+ == USB_ENDPOINT_XFER_ISOC) { -+ if (!ep->can_isoc) { -+ DBG(DBG_ERR, "ep_enable: %s is not isoc capable\n", -+ ep_name(ep)); -+ return -EINVAL; -+ } -+ ep->is_isoc = 1; -+ } -+ -+ if (maxpacket <= 8) -+ ept_cfg = USBA_BF(EPT_SIZE, USBA_EPT_SIZE_8); -+ else -+ /* LSB is bit 1, not 0 */ -+ ept_cfg = USBA_BF(EPT_SIZE, fls(maxpacket - 1) - 3); -+ DBG(DBG_HW, "%s: EPT_SIZE = %lu (maxpacket = %lu)\n", -+ ep_name(ep), ept_cfg, maxpacket); -+ -+ if ((desc->bEndpointAddress & USB_ENDPOINT_DIR_MASK) == USB_DIR_IN) { -+ ep->is_in = 1; -+ ept_cfg |= USBA_BIT(EPT_DIR); -+ } -+ -+ switch (desc->bmAttributes & USB_ENDPOINT_XFERTYPE_MASK) { -+ case USB_ENDPOINT_XFER_CONTROL: -+ ept_cfg |= USBA_BF(EPT_TYPE, USBA_EPT_TYPE_CONTROL); -+ break; -+ case USB_ENDPOINT_XFER_ISOC: -+ ept_cfg |= USBA_BF(EPT_TYPE, USBA_EPT_TYPE_ISO); -+ break; -+ case USB_ENDPOINT_XFER_BULK: -+ ept_cfg |= USBA_BF(EPT_TYPE, USBA_EPT_TYPE_BULK); -+ break; -+ case USB_ENDPOINT_XFER_INT: -+ ept_cfg |= USBA_BF(EPT_TYPE, USBA_EPT_TYPE_INT); -+ break; -+ } -+ ept_cfg |= USBA_BF(BK_NUMBER, ep->nr_banks); -+ -+ spin_lock_irqsave(&ep->udc->lock, flags); -+ -+ if (ep->desc) { -+ spin_unlock_irqrestore(&ep->udc->lock, flags); -+ DBG(DBG_ERR, "ep%d already enabled\n", ep->index); -+ return -EBUSY; -+ } -+ -+ ep->desc = desc; -+ ep->ep.maxpacket = maxpacket; -+ -+ usba_ep_writel(ep, CFG, ept_cfg); -+ usba_ep_writel(ep, CTL_ENB, USBA_BIT(EPT_ENABLE)); -+ -+ if (ep_can_dma(ep)) { -+ u32 ctrl; -+ -+ usba_writel(udc, INT_ENB, -+ (usba_readl(udc, INT_ENB) -+ | USBA_BF(EPT_INT, 1 << ep->index) -+ | USBA_BF(DMA_INT, 1 << ep->index))); -+ ctrl = USBA_BIT(AUTO_VALID) | USBA_BIT(INTDIS_DMA); -+ usba_ep_writel(ep, CTL_ENB, ctrl); -+ } else { -+ usba_writel(udc, INT_ENB, -+ (usba_readl(udc, INT_ENB) -+ | USBA_BF(EPT_INT, 1 << ep->index))); -+ } -+ -+ spin_unlock_irqrestore(&udc->lock, flags); -+ -+ DBG(DBG_HW, "EPT_CFG%d after init: %#08lx\n", ep->index, -+ (unsigned long)usba_ep_readl(ep, CFG)); -+ DBG(DBG_HW, "INT_ENB after init: %#08lx\n", -+ (unsigned long)usba_readl(udc, INT_ENB)); -+ -+ return 0; -+} -+ -+static int usba_ep_disable(struct usb_ep *_ep) -+{ -+ struct usba_ep *ep = to_usba_ep(_ep); -+ struct usba_udc *udc = ep->udc; -+ LIST_HEAD(req_list); -+ unsigned long flags; -+ -+ DBG(DBG_GADGET, "ep_disable: %s\n", ep_name(ep)); -+ -+ spin_lock_irqsave(&udc->lock, flags); -+ -+ if (!ep->desc) { -+ spin_unlock_irqrestore(&udc->lock, flags); -+ DBG(DBG_ERR, "ep_disable: %s not enabled\n", -+ ep_name(ep)); -+ return -EINVAL; -+ } -+ ep->desc = NULL; -+ -+ list_splice_init(&ep->queue, &req_list); -+ if (ep_can_dma(ep)) { -+ usba_dma_writel(ep, CONTROL, 0); -+ usba_dma_writel(ep, ADDRESS, 0); -+ usba_dma_readl(ep, STATUS); -+ } -+ usba_ep_writel(ep, CTL_DIS, USBA_BIT(EPT_ENABLE)); -+ usba_writel(udc, INT_ENB, (usba_readl(udc, INT_ENB) -+ & ~USBA_BF(EPT_INT, 1 << ep->index))); -+ -+ spin_unlock_irqrestore(&udc->lock, flags); -+ -+ request_complete_list(ep, &req_list, -ESHUTDOWN); -+ -+ return 0; -+} -+ -+static struct usb_request * -+usba_ep_alloc_request(struct usb_ep *_ep, unsigned gfp_flags) -+{ -+ struct usba_request *req; -+ -+ DBG(DBG_GADGET, "ep_alloc_request: %p, 0x%x\n", _ep, gfp_flags); -+ -+ req = kzalloc(sizeof(*req), gfp_flags); -+ if (!req) -+ return NULL; -+ -+ INIT_LIST_HEAD(&req->queue); -+ req->req.dma = DMA_ADDR_INVALID; -+ -+ return &req->req; -+} -+ -+static void -+usba_ep_free_request(struct usb_ep *_ep, struct usb_request *_req) -+{ -+ struct usba_request *req = to_usba_req(_req); -+ -+ DBG(DBG_GADGET, "ep_free_request: %p, %p\n", _ep, _req); -+ -+ kfree(req); -+} -+ -+static void *usba_ep_alloc_buffer(struct usb_ep *_ep, unsigned bytes, -+ dma_addr_t *dma, unsigned gfp_flags) -+{ -+ void *buf; -+ -+ if (bytes < L1_CACHE_BYTES) -+ bytes = L1_CACHE_BYTES; -+ -+ buf = kmalloc(bytes, gfp_flags); -+ -+ /* -+ * Seems like we have to map the buffer any chance we get. -+ * ether.c wants us to initialize the dma member of a -+ * different request than the one receiving the buffer, so one -+ * never knows... -+ * -+ * Ah, screw it. The ether driver is probably wrong, and this -+ * is not the right place to do the mapping. The driver -+ * shouldn't mess with our DMA mappings anyway. -+ */ -+ *dma = DMA_ADDR_INVALID; -+ -+ return buf; -+} -+ -+static void usba_ep_free_buffer(struct usb_ep *_ep, void *buf, -+ dma_addr_t dma, unsigned bytes) -+{ -+ DBG(DBG_GADGET, "ep_free_buffer: %s, buf %p (size %u)\n", -+ _ep->name, buf, bytes); -+ kfree(buf); -+} -+ -+static int queue_dma(struct usba_udc *udc, struct usba_ep *ep, -+ struct usba_request *req, gfp_t gfp_flags) -+{ -+ unsigned long flags; -+ int ret; -+ -+ DBG(DBG_DMA, "%s: req l/%u d/%08x %c%c%c\n", -+ ep_name(ep), req->req.length, req->req.dma, -+ req->req.zero ? 'Z' : 'z', -+ req->req.short_not_ok ? 'S' : 's', -+ req->req.no_interrupt ? 'I' : 'i'); -+ -+ if (req->req.length > 0x10000) { -+ /* Lengths from 0 to 65536 (inclusive) are supported */ -+ DBG(DBG_ERR, "invalid request length %u\n", req->req.length); -+ return -EINVAL; -+ } -+ -+ req->using_dma = 1; -+ -+ if (req->req.dma == DMA_ADDR_INVALID) { -+ req->req.dma = dma_map_single( -+ &udc->pdev->dev, req->req.buf, req->req.length, -+ ep_is_in(ep) ? DMA_TO_DEVICE : DMA_FROM_DEVICE); -+ req->mapped = 1; -+ } else { -+ dma_sync_single_for_device( -+ &udc->pdev->dev, req->req.dma, req->req.length, -+ ep_is_in(ep) ? DMA_TO_DEVICE : DMA_FROM_DEVICE); -+ req->mapped = 0; -+ } -+ -+ req->ctrl = (USBA_BF(DMA_BUF_LEN, req->req.length) -+ | USBA_BIT(DMA_CH_EN) | USBA_BIT(DMA_END_BUF_IE) -+ | USBA_BIT(DMA_END_TR_EN) | USBA_BIT(DMA_END_TR_IE)); -+ -+ if (ep_is_in(ep)) -+ req->ctrl |= USBA_BIT(DMA_END_BUF_EN); -+ -+ /* -+ * Add this request to the queue and submit for DMA if -+ * possible. Check if we're still alive first -- we may have -+ * received a reset since last time we checked. -+ */ -+ ret = -ESHUTDOWN; -+ spin_lock_irqsave(&udc->lock, flags); -+ if (ep->desc) { -+ if (list_empty(&ep->queue)) -+ submit_request(ep, req); -+ -+ list_add_tail(&req->queue, &ep->queue); -+ ret = 0; -+ } -+ spin_unlock_irqrestore(&udc->lock, flags); -+ -+ return ret; -+} -+ -+static int usba_ep_queue(struct usb_ep *_ep, struct usb_request *_req, -+ gfp_t gfp_flags) -+{ -+ struct usba_request *req = to_usba_req(_req); -+ struct usba_ep *ep = to_usba_ep(_ep); -+ struct usba_udc *udc = ep->udc; -+ unsigned long flags; -+ int ret; -+ -+ DBG(DBG_GADGET | DBG_QUEUE | DBG_REQ, -+ "%s: queue req %p, len %u\n", ep_name(ep), req, _req->length); -+ -+ if (!udc->driver || udc->gadget.speed == USB_SPEED_UNKNOWN -+ || !ep->desc) -+ return -ESHUTDOWN; -+ -+ req->submitted = 0; -+ req->using_dma = 0; -+ req->last_transaction = 0; -+ -+ _req->status = -EINPROGRESS; -+ _req->actual = 0; -+ -+ if (ep_can_dma(ep)) -+ return queue_dma(udc, ep, req, gfp_flags); -+ -+ /* May have received a reset since last time we checked */ -+ ret = -ESHUTDOWN; -+ spin_lock_irqsave(&udc->lock, flags); -+ if (ep->desc) { -+ list_add_tail(&req->queue, &ep->queue); -+ -+ if (ep_is_in(ep) -+ || (ep_is_control(ep) -+ && (ep->state == DATA_STAGE_IN -+ || ep->state == STATUS_STAGE_IN))) -+ usba_ep_writel(ep, CTL_ENB, USBA_BIT(TX_PK_RDY)); -+ else -+ usba_ep_writel(ep, CTL_ENB, USBA_BIT(RX_BK_RDY)); -+ ret = 0; -+ } -+ spin_unlock_irqrestore(&udc->lock, flags); -+ -+ return ret; -+} -+ -+static void usba_update_req(struct usba_ep *ep, struct usba_request *req, -+ u32 status) -+{ -+ req->req.actual = req->req.length - USBA_BFEXT(DMA_BUF_LEN, status); -+} -+ -+static int stop_dma(struct usba_ep *ep, u32 *pstatus) -+{ -+ unsigned int timeout; -+ u32 status; -+ -+ /* -+ * Stop the DMA controller. When writing both CH_EN -+ * and LINK to 0, the other bits are not affected. -+ */ -+ usba_dma_writel(ep, CONTROL, 0); -+ -+ /* Wait for the FIFO to empty */ -+ for (timeout = 40; timeout; --timeout) { -+ status = usba_dma_readl(ep, STATUS); -+ if (!(status & USBA_BIT(DMA_CH_EN))) -+ break; -+ udelay(1); -+ } -+ -+ if (pstatus) -+ *pstatus = status; -+ -+ if (timeout == 0) { -+ dev_err(&ep->udc->pdev->dev, -+ "%s: timed out waiting for DMA FIFO to empty\n", -+ ep_name(ep)); -+ return -ETIMEDOUT; -+ } -+ -+ return 0; -+} -+ -+static int usba_ep_dequeue(struct usb_ep *_ep, struct usb_request *_req) -+{ -+ struct usba_ep *ep = to_usba_ep(_ep); -+ struct usba_udc *udc = ep->udc; -+ struct usba_request *req = to_usba_req(_req); -+ unsigned long flags; -+ u32 status; -+ -+ DBG(DBG_GADGET | DBG_QUEUE, "ep_dequeue: %s, req %p\n", -+ ep_name(ep), req); -+ -+ spin_lock_irqsave(&udc->lock, flags); -+ -+ if (req->using_dma) { -+ /* -+ * If this request is currently being transferred, -+ * stop the DMA controller and reset the FIFO. -+ */ -+ if (ep->queue.next == &req->queue) { -+ status = usba_dma_readl(ep, STATUS); -+ if (status & USBA_BIT(DMA_CH_EN)) -+ stop_dma(ep, &status); -+ -+#ifdef CONFIG_DEBUG_FS -+ ep->last_dma_status = status; -+#endif -+ -+ usba_writel(udc, EPT_RST, -+ 1 << ep_index(ep)); -+ -+ usba_update_req(ep, req, status); -+ } -+ } -+ -+ /* -+ * Errors should stop the queue from advancing until the -+ * completion function returns. -+ */ -+ list_del_init(&req->queue); -+ spin_unlock_irqrestore(&udc->lock, flags); -+ -+ request_complete(ep, req, -ECONNRESET); -+ -+ /* Process the next request if any */ -+ spin_lock_irqsave(&udc->lock, flags); -+ submit_next_request(ep); -+ spin_unlock_irqrestore(&udc->lock, flags); -+ -+ return 0; -+} -+ -+static int usba_ep_set_halt(struct usb_ep *_ep, int value) -+{ -+ struct usba_ep *ep = to_usba_ep(_ep); -+ struct usba_udc *udc = ep->udc; -+ unsigned long flags; -+ int ret = 0; -+ -+ DBG(DBG_GADGET, "endpoint %s: %s HALT\n", ep_name(ep), -+ value ? "set" : "clear"); -+ -+ if (!ep->desc) { -+ DBG(DBG_ERR, "Attempted to halt uninitialized ep %s\n", -+ ep_name(ep)); -+ return -ENODEV; -+ } -+ if (ep_is_isochronous(ep)) { -+ DBG(DBG_ERR, "Attempted to halt isochronous ep %s\n", -+ ep_name(ep)); -+ return -ENOTTY; -+ } -+ -+ spin_lock_irqsave(&udc->lock, flags); -+ -+ /* -+ * We can't halt IN endpoints while there are still data to be -+ * transferred -+ */ -+ if (!list_empty(&ep->queue) -+ || ((value && ep_is_in(ep) -+ && (usba_ep_readl(ep, STA) -+ & USBA_BF(BUSY_BANKS, -1L))))) { -+ ret = -EAGAIN; -+ } else { -+ if (value) -+ usba_ep_writel(ep, SET_STA, USBA_BIT(FORCE_STALL)); -+ else -+ usba_ep_writel(ep, CLR_STA, (USBA_BIT(FORCE_STALL) -+ | USBA_BIT(TOGGLE_SEQ))); -+ usba_ep_readl(ep, STA); -+ } -+ -+ spin_unlock_irqrestore(&udc->lock, flags); -+ -+ return ret; -+} -+ -+static int usba_ep_fifo_status(struct usb_ep *_ep) -+{ -+ struct usba_ep *ep = to_usba_ep(_ep); -+ -+ return USBA_BFEXT(BYTE_COUNT, usba_ep_readl(ep, STA)); -+} -+ -+static void usba_ep_fifo_flush(struct usb_ep *_ep) -+{ -+ struct usba_ep *ep = to_usba_ep(_ep); -+ struct usba_udc *udc = ep->udc; -+ -+ usba_writel(udc, EPT_RST, 1 << ep->index); -+} -+ -+struct usb_ep_ops usba_ep_ops = { -+ .enable = usba_ep_enable, -+ .disable = usba_ep_disable, -+ .alloc_request = usba_ep_alloc_request, -+ .free_request = usba_ep_free_request, -+ .alloc_buffer = usba_ep_alloc_buffer, -+ .free_buffer = usba_ep_free_buffer, -+ .queue = usba_ep_queue, -+ .dequeue = usba_ep_dequeue, -+ .set_halt = usba_ep_set_halt, -+ .fifo_status = usba_ep_fifo_status, -+ .fifo_flush = usba_ep_fifo_flush, -+}; -+ -+static int usba_udc_get_frame(struct usb_gadget *gadget) -+{ -+ struct usba_udc *udc = to_usba_udc(gadget); -+ -+ return USBA_BFEXT(FRAME_NUMBER, usba_readl(udc, FNUM)); -+} -+ -+struct usb_gadget_ops usba_udc_ops = { -+ .get_frame = usba_udc_get_frame, -+}; -+ -+#define EP(nam, type, idx, dma, isoc) \ -+{ \ -+ .ep = { \ -+ .ops = &usba_ep_ops, \ -+ .name = nam, \ -+ .maxpacket = type##_FIFO_SIZE, \ -+ }, \ -+ .udc = &the_udc, \ -+ .queue = LIST_HEAD_INIT(usba_ep[idx].queue), \ -+ .fifo_size = type##_FIFO_SIZE, \ -+ .nr_banks = type##_NR_BANKS, \ -+ .index = idx, \ -+ .can_dma = dma, \ -+ .can_isoc = isoc, \ -+} -+ -+static struct usba_ep usba_ep[] = { -+ EP("ep0", EP0, 0, 0, 0), -+ EP("ep1in-bulk", BULK, 1, 1, 0), -+ EP("ep2out-bulk", BULK, 2, 1, 0), -+ EP("ep3in-iso", ISO, 3, 1, 1), -+ EP("ep4out-iso", ISO, 4, 1, 1), -+ EP("ep5in-int", INT, 5, 1, 0), -+ EP("ep6out-int", INT, 6, 1, 0), -+}; -+#undef EP -+ -+static struct usb_endpoint_descriptor usba_ep0_desc = { -+ .bLength = USB_DT_ENDPOINT_SIZE, -+ .bDescriptorType = USB_DT_ENDPOINT, -+ .bEndpointAddress = 0, -+ .bmAttributes = USB_ENDPOINT_XFER_CONTROL, -+ .wMaxPacketSize = __constant_cpu_to_le16(64), -+ /* FIXME: I have no idea what to put here */ -+ .bInterval = 1, -+}; -+ -+static void nop_release(struct device *dev) -+{ -+ -+} -+ -+static struct usba_udc the_udc = { -+ .gadget = { -+ .ops = &usba_udc_ops, -+ .ep0 = &usba_ep[0].ep, -+ .ep_list = LIST_HEAD_INIT(the_udc.gadget.ep_list), -+ .is_dualspeed = 1, -+ .name = "atmel_usba_udc", -+ .dev = { -+ .bus_id = "gadget", -+ .release = nop_release, -+ }, -+ }, -+ -+ .lock = SPIN_LOCK_UNLOCKED, -+}; -+ -+/* -+ * Called with interrupts disabled and udc->lock held. -+ */ -+static void reset_all_endpoints(struct usba_udc *udc) -+{ -+ struct usba_ep *ep; -+ struct usba_request *req, *tmp_req; -+ -+ usba_writel(udc, EPT_RST, ~0UL); -+ -+ ep = to_usba_ep(udc->gadget.ep0); -+ list_for_each_entry_safe(req, tmp_req, &ep->queue, queue) { -+ list_del_init(&req->queue); -+ request_complete(ep, req, -ECONNRESET); -+ } -+ -+ list_for_each_entry(ep, &udc->gadget.ep_list, ep.ep_list) { -+ if (ep->desc) -+ usba_ep_disable(&ep->ep); -+ } -+} -+ -+static struct usba_ep *get_ep_by_addr(struct usba_udc *udc, u16 wIndex) -+{ -+ struct usba_ep *ep; -+ -+ if ((wIndex & USB_ENDPOINT_NUMBER_MASK) == 0) -+ return to_usba_ep(udc->gadget.ep0); -+ -+ list_for_each_entry (ep, &udc->gadget.ep_list, ep.ep_list) { -+ u8 bEndpointAddress; -+ -+ if (!ep->desc) -+ continue; -+ bEndpointAddress = ep->desc->bEndpointAddress; -+ if ((wIndex ^ bEndpointAddress) & USB_DIR_IN) -+ continue; -+ if ((wIndex & USB_ENDPOINT_NUMBER_MASK) -+ == (bEndpointAddress & USB_ENDPOINT_NUMBER_MASK)) -+ return ep; -+ } -+ -+ return NULL; -+} -+ -+/* Called with interrupts disabled and udc->lock held */ -+static inline void set_protocol_stall(struct usba_udc *udc, -+ struct usba_ep *ep) -+{ -+ usba_ep_writel(ep, SET_STA, USBA_BIT(FORCE_STALL)); -+ ep->state = WAIT_FOR_SETUP; -+} -+ -+static inline int is_stalled(struct usba_udc *udc, struct usba_ep *ep) -+{ -+ if (usba_ep_readl(ep, STA) & USBA_BIT(FORCE_STALL)) -+ return 1; -+ return 0; -+} -+ -+static inline void set_address(struct usba_udc *udc, unsigned int addr) -+{ -+ u32 regval; -+ -+ DBG(DBG_BUS, "setting address %u...\n", addr); -+ regval = usba_readl(udc, CTRL); -+ regval = USBA_BFINS(DEV_ADDR, addr, regval); -+ usba_writel(udc, CTRL, regval); -+} -+ -+static int do_test_mode(struct usba_udc *udc) -+{ -+ static const char test_packet_buffer[] = { -+ /* JKJKJKJK * 9 */ -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ /* JJKKJJKK * 8 */ -+ 0xAA, 0xAA, 0xAA, 0xAA, 0xAA, 0xAA, 0xAA, 0xAA, -+ /* JJKKJJKK * 8 */ -+ 0xEE, 0xEE, 0xEE, 0xEE, 0xEE, 0xEE, 0xEE, 0xEE, -+ /* JJJJJJJKKKKKKK * 8 */ -+ 0xFE, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, -+ 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, -+ /* JJJJJJJK * 8 */ -+ 0x7F, 0xBF, 0xDF, 0xEF, 0xF7, 0xFB, 0xFD, -+ /* {JKKKKKKK * 10}, JK */ -+ 0xFC, 0x7E, 0xBF, 0xDF, 0xEF, 0xF7, 0xFB, 0xFD, 0x7E -+ }; -+ struct device *dev = &udc->pdev->dev; -+ struct usba_ep *ep; -+ int test_mode; -+ -+ test_mode = udc->test_mode; -+ -+ /* Start from a clean slate */ -+ reset_all_endpoints(udc); -+ -+ switch (test_mode) { -+ case 0x0100: -+ /* Test_J */ -+ usba_writel(udc, TST, USBA_BIT(TST_J_MODE)); -+ dev_info(dev, "Entering Test_J mode...\n"); -+ break; -+ case 0x0200: -+ /* Test_K */ -+ usba_writel(udc, TST, USBA_BIT(TST_K_MODE)); -+ dev_info(dev, "Entering Test_K mode...\n"); -+ break; -+ case 0x0300: -+ /* -+ * Test_SE0_NAK: Force high-speed mode and set up ep0 -+ * for Bulk IN transfers -+ */ -+ ep = &usba_ep[0]; -+ usba_writel(udc, TST, -+ USBA_BF(SPEED_CFG, USBA_SPEED_CFG_FORCE_HIGH)); -+ usba_ep_writel(ep, CFG, -+ USBA_BF(EPT_SIZE, USBA_EPT_SIZE_64) -+ | USBA_BIT(EPT_DIR) -+ | USBA_BF(EPT_TYPE, USBA_EPT_TYPE_BULK) -+ | USBA_BF(BK_NUMBER, 1)); -+ if (!(usba_ep_readl(ep, CFG) & USBA_BIT(EPT_MAPPED))) { -+ set_protocol_stall(udc, ep); -+ dev_err(dev, "Test_SE0_NAK: ep0 not mapped\n"); -+ } else { -+ usba_ep_writel(ep, CTL_ENB, USBA_BIT(EPT_ENABLE)); -+ dev_info(dev, "Entering Test_SE0_NAK mode...\n"); -+ } -+ break; -+ case 0x0400: -+ /* Test_Packet */ -+ ep = &usba_ep[0]; -+ usba_ep_writel(ep, CFG, -+ USBA_BF(EPT_SIZE, USBA_EPT_SIZE_64) -+ | USBA_BIT(EPT_DIR) -+ | USBA_BF(EPT_TYPE, USBA_EPT_TYPE_BULK) -+ | USBA_BF(BK_NUMBER, 1)); -+ if (!(usba_ep_readl(ep, CFG) & USBA_BIT(EPT_MAPPED))) { -+ set_protocol_stall(udc, ep); -+ dev_err(dev, "Test_Packet: ep0 not mapped\n"); -+ } else { -+ usba_ep_writel(ep, CTL_ENB, USBA_BIT(EPT_ENABLE)); -+ usba_writel(udc, TST, USBA_BIT(TST_PKT_MODE)); -+ copy_to_fifo(ep->fifo, test_packet_buffer, -+ sizeof(test_packet_buffer)); -+ usba_ep_writel(ep, SET_STA, USBA_BIT(TX_PK_RDY)); -+ dev_info(dev, "Entering Test_Packet mode...\n"); -+ } -+ break; -+ default: -+ dev_err(dev, "Invalid test mode: 0x%04x\n", test_mode); -+ return -EINVAL; -+ } -+ -+ return 0; -+} -+ -+/* Avoid overly long expressions */ -+static inline bool feature_is_dev_remote_wakeup(struct usb_ctrlrequest *crq) -+{ -+ if (crq->wValue == __constant_cpu_to_le16(USB_DEVICE_REMOTE_WAKEUP)) -+ return true; -+ return false; -+} -+ -+static inline bool feature_is_dev_test_mode(struct usb_ctrlrequest *crq) -+{ -+ if (crq->wValue == __constant_cpu_to_le16(USB_DEVICE_TEST_MODE)) -+ return true; -+ return false; -+} -+ -+static inline bool feature_is_ep_halt(struct usb_ctrlrequest *crq) -+{ -+ if (crq->wValue == __constant_cpu_to_le16(USB_ENDPOINT_HALT)) -+ return true; -+ return false; -+} -+ -+static int handle_ep0_setup(struct usba_udc *udc, struct usba_ep *ep, -+ struct usb_ctrlrequest *crq) -+{ -+ switch (crq->bRequest) { -+ case USB_REQ_GET_STATUS: { -+ u16 status; -+ -+ if (crq->bRequestType == (USB_DIR_IN | USB_RECIP_DEVICE)) { -+ /* Self-powered, no remote wakeup */ -+ status = __constant_cpu_to_le16(1 << 0); -+ } else if (crq->bRequestType -+ == (USB_DIR_IN | USB_RECIP_INTERFACE)) { -+ status = __constant_cpu_to_le16(0); -+ } else if (crq->bRequestType -+ == (USB_DIR_IN | USB_RECIP_ENDPOINT)) { -+ struct usba_ep *target; -+ -+ target = get_ep_by_addr(udc, le16_to_cpu(crq->wIndex)); -+ if (!target) -+ goto stall; -+ -+ status = 0; -+ if (is_stalled(udc, target)) -+ status |= __constant_cpu_to_le16(1); -+ } else { -+ goto delegate; -+ } -+ -+ /* Write directly to the FIFO. No queueing is done. */ -+ if (crq->wLength != __constant_cpu_to_le16(sizeof(status))) -+ goto stall; -+ ep->state = DATA_STAGE_IN; -+ __raw_writew(status, ep->fifo); -+ usba_ep_writel(ep, SET_STA, USBA_BIT(TX_PK_RDY)); -+ break; -+ } -+ -+ case USB_REQ_CLEAR_FEATURE: { -+ if (crq->bRequestType == USB_RECIP_DEVICE) { -+ if (feature_is_dev_remote_wakeup(crq)) { -+ /* TODO: Handle REMOTE_WAKEUP */ -+ } else { -+ /* Can't CLEAR_FEATURE TEST_MODE */ -+ goto stall; -+ } -+ } else if (crq->bRequestType == USB_RECIP_ENDPOINT) { -+ struct usba_ep *target; -+ -+ if (!feature_is_ep_halt(crq) -+ || crq->wLength != __constant_cpu_to_le16(0)) -+ goto stall; -+ target = get_ep_by_addr(udc, le16_to_cpu(crq->wIndex)); -+ if (!target) -+ goto stall; -+ -+ usba_ep_writel(target, CLR_STA, -+ (USBA_BIT(FORCE_STALL) -+ | USBA_BIT(TOGGLE_SEQ))); -+ } else { -+ goto delegate; -+ } -+ -+ send_status(udc, ep); -+ break; -+ } -+ -+ case USB_REQ_SET_FEATURE: { -+ if (crq->bRequestType == USB_RECIP_DEVICE) { -+ if (feature_is_dev_test_mode(crq)) { -+ send_status(udc, ep); -+ ep->state = STATUS_STAGE_TEST; -+ udc->test_mode = le16_to_cpu(crq->wIndex); -+ return 0; -+ } else if (feature_is_dev_remote_wakeup(crq)) { -+ /* TODO: Handle REMOTE_WAKEUP */ -+ } else { -+ goto stall; -+ } -+ } else if (crq->bRequestType == USB_RECIP_ENDPOINT) { -+ struct usba_ep *target; -+ -+ if (!feature_is_ep_halt(crq) -+ || crq->wLength != __constant_cpu_to_le16(0)) -+ goto stall; -+ -+ target = get_ep_by_addr(udc, le16_to_cpu(crq->wIndex)); -+ if (!target) -+ goto stall; -+ -+ usba_ep_writel(target, SET_STA, USBA_BIT(FORCE_STALL)); -+ } else -+ goto delegate; -+ -+ send_status(udc, ep); -+ break; -+ } -+ -+ case USB_REQ_SET_ADDRESS: -+ if (crq->bRequestType != (USB_DIR_OUT | USB_RECIP_DEVICE)) -+ goto delegate; -+ -+ set_address(udc, le16_to_cpu(crq->wValue)); -+ send_status(udc, ep); -+ ep->state = STATUS_STAGE_ADDR; -+ break; -+ -+ default: -+delegate: -+ return udc->driver->setup(&udc->gadget, crq); -+ } -+ -+ return 0; -+ -+stall: -+ printk(KERN_ERR -+ "udc: %s: Invalid setup request: %02x.%02x v%04x i%04x l%d, " -+ "halting endpoint...\n", -+ ep_name(ep), crq->bRequestType, crq->bRequest, -+ le16_to_cpu(crq->wValue), le16_to_cpu(crq->wIndex), -+ le16_to_cpu(crq->wLength)); -+ set_protocol_stall(udc, ep); -+ return -1; -+} -+ -+static void usba_control_irq(struct usba_udc *udc, struct usba_ep *ep) -+{ -+ struct usba_request *req; -+ u32 epstatus; -+ u32 epctrl; -+ -+restart: -+ epstatus = usba_ep_readl(ep, STA); -+ epctrl = usba_ep_readl(ep, CTL); -+ -+ DBG(DBG_INT, "%s [%d]: s/%08x c/%08x\n", -+ ep_name(ep), ep->state, epstatus, epctrl); -+ -+ req = NULL; -+ if (!list_empty(&ep->queue)) -+ req = list_entry(ep->queue.next, -+ struct usba_request, queue); -+ -+ if ((epctrl & USBA_BIT(TX_PK_RDY)) -+ && !(epstatus & USBA_BIT(TX_PK_RDY))) { -+ if (req->submitted) -+ next_fifo_transaction(ep, req); -+ else -+ submit_request(ep, req); -+ -+ if (req->last_transaction) { -+ usba_ep_writel(ep, CTL_DIS, USBA_BIT(TX_PK_RDY)); -+ usba_ep_writel(ep, CTL_ENB, USBA_BIT(TX_COMPLETE)); -+ } -+ goto restart; -+ } -+ if ((epstatus & epctrl) & USBA_BIT(TX_COMPLETE)) { -+ usba_ep_writel(ep, CLR_STA, USBA_BIT(TX_COMPLETE)); -+ -+ switch (ep->state) { -+ case DATA_STAGE_IN: -+ usba_ep_writel(ep, CTL_ENB, USBA_BIT(RX_BK_RDY)); -+ usba_ep_writel(ep, CTL_DIS, USBA_BIT(TX_COMPLETE)); -+ ep->state = STATUS_STAGE_OUT; -+ break; -+ case STATUS_STAGE_ADDR: -+ /* Activate our new address */ -+ usba_writel(udc, CTRL, (usba_readl(udc, CTRL) -+ | USBA_BIT(FADDR_EN))); -+ usba_ep_writel(ep, CTL_DIS, USBA_BIT(TX_COMPLETE)); -+ ep->state = WAIT_FOR_SETUP; -+ break; -+ case STATUS_STAGE_IN: -+ if (req) { -+ list_del_init(&req->queue); -+ request_complete(ep, req, 0); -+ submit_next_request(ep); -+ } -+ usba_ep_writel(ep, CTL_DIS, USBA_BIT(TX_COMPLETE)); -+ ep->state = WAIT_FOR_SETUP; -+ break; -+ case STATUS_STAGE_TEST: -+ usba_ep_writel(ep, CTL_DIS, USBA_BIT(TX_COMPLETE)); -+ ep->state = WAIT_FOR_SETUP; -+ if (do_test_mode(udc)) -+ set_protocol_stall(udc, ep); -+ break; -+ default: -+ printk(KERN_ERR -+ "udc: %s: TXCOMP: Invalid endpoint state %d, " -+ "halting endpoint...\n", -+ ep_name(ep), ep->state); -+ set_protocol_stall(udc, ep); -+ break; -+ } -+ -+ goto restart; -+ } -+ if ((epstatus & epctrl) & USBA_BIT(RX_BK_RDY)) { -+ switch (ep->state) { -+ case STATUS_STAGE_OUT: -+ usba_ep_writel(ep, CLR_STA, USBA_BIT(RX_BK_RDY)); -+ usba_ep_writel(ep, CTL_DIS, USBA_BIT(RX_BK_RDY)); -+ -+ if (req) { -+ list_del_init(&req->queue); -+ request_complete(ep, req, 0); -+ } -+ ep->state = WAIT_FOR_SETUP; -+ break; -+ -+ case DATA_STAGE_OUT: -+ receive_data(ep); -+ break; -+ -+ default: -+ usba_ep_writel(ep, CLR_STA, USBA_BIT(RX_BK_RDY)); -+ usba_ep_writel(ep, CTL_DIS, USBA_BIT(RX_BK_RDY)); -+ printk(KERN_ERR -+ "udc: %s: RXRDY: Invalid endpoint state %d, " -+ "halting endpoint...\n", -+ ep_name(ep), ep->state); -+ set_protocol_stall(udc, ep); -+ break; -+ } -+ -+ goto restart; -+ } -+ if (epstatus & USBA_BIT(RX_SETUP)) { -+ union { -+ struct usb_ctrlrequest crq; -+ unsigned long data[2]; -+ } crq; -+ unsigned int pkt_len; -+ int ret; -+ -+ if (ep->state != WAIT_FOR_SETUP) { -+ /* -+ * Didn't expect a SETUP packet at this -+ * point. Clean up any pending requests (which -+ * may be successful). -+ */ -+ int status = -EPROTO; -+ -+ /* -+ * RXRDY and TXCOMP are dropped when SETUP -+ * packets arrive. Just pretend we received -+ * the status packet. -+ */ -+ if (ep->state == STATUS_STAGE_OUT -+ || ep->state == STATUS_STAGE_IN) { -+ usba_ep_writel(ep, CTL_DIS, -+ USBA_BIT(RX_BK_RDY)); -+ status = 0; -+ } -+ -+ if (req) { -+ list_del_init(&req->queue); -+ request_complete(ep, req, status); -+ } -+ } -+ -+ pkt_len = USBA_BFEXT(BYTE_COUNT, usba_ep_readl(ep, STA)); -+ DBG(DBG_HW, "Packet length: %u\n", pkt_len); -+ if (pkt_len != sizeof(crq)) { -+ printk(KERN_WARNING -+ "udc: Invalid packet length %u (expected %lu)\n", -+ pkt_len, sizeof(crq)); -+ set_protocol_stall(udc, ep); -+ return; -+ } -+ -+ DBG(DBG_FIFO, "Copying ctrl request from 0x%p:\n", ep->fifo); -+ copy_from_fifo(crq.data, ep->fifo, sizeof(crq)); -+ -+ /* Free up one bank in the FIFO so that we can -+ * generate or receive a reply right away. */ -+ usba_ep_writel(ep, CLR_STA, USBA_BIT(RX_SETUP)); -+ -+ /* printk(KERN_DEBUG "setup: %d: %02x.%02x\n", -+ ep->state, crq.crq.bRequestType, -+ crq.crq.bRequest); */ -+ -+ if (crq.crq.bRequestType & USB_DIR_IN) { -+ /* -+ * The USB 2.0 spec states that "if wLength is -+ * zero, there is no data transfer phase." -+ * However, testusb #14 seems to actually -+ * expect a data phase even if wLength = 0... -+ */ -+ ep->state = DATA_STAGE_IN; -+ } else { -+ if (crq.crq.wLength != __constant_cpu_to_le16(0)) -+ ep->state = DATA_STAGE_OUT; -+ else -+ ep->state = STATUS_STAGE_IN; -+ } -+ -+ ret = -1; -+ if (ep->index == 0) -+ ret = handle_ep0_setup(udc, ep, &crq.crq); -+ else -+ ret = udc->driver->setup(&udc->gadget, &crq.crq); -+ -+ DBG(DBG_BUS, "req %02x.%02x, length %d, state %d, ret %d\n", -+ crq.crq.bRequestType, crq.crq.bRequest, -+ le16_to_cpu(crq.crq.wLength), ep->state, ret); -+ -+ if (ret < 0) { -+ /* Let the host know that we failed */ -+ set_protocol_stall(udc, ep); -+ } -+ } -+} -+ -+static void usba_ep_irq(struct usba_udc *udc, struct usba_ep *ep) -+{ -+ struct usba_request *req; -+ u32 epstatus; -+ u32 epctrl; -+ -+ epstatus = usba_ep_readl(ep, STA); -+ epctrl = usba_ep_readl(ep, CTL); -+ -+ DBG(DBG_INT, "%s: interrupt, status: 0x%08x\n", -+ ep_name(ep), epstatus); -+ -+ while ((epctrl & USBA_BIT(TX_PK_RDY)) -+ && !(epstatus & USBA_BIT(TX_PK_RDY))) { -+ DBG(DBG_BUS, "%s: TX PK ready\n", ep_name(ep)); -+ -+ if (list_empty(&ep->queue)) { -+ dev_warn(&udc->pdev->dev, "ep_irq: queue empty\n"); -+ usba_ep_writel(ep, CTL_DIS, USBA_BIT(TX_PK_RDY)); -+ return; -+ } -+ -+ req = list_entry(ep->queue.next, struct usba_request, queue); -+ -+ if (req->using_dma) { -+ /* Send a zero-length packet */ -+ usba_ep_writel(ep, SET_STA, -+ USBA_BIT(TX_PK_RDY)); -+ usba_ep_writel(ep, CTL_DIS, -+ USBA_BIT(TX_PK_RDY)); -+ list_del_init(&req->queue); -+ submit_next_request(ep); -+ request_complete(ep, req, 0); -+ } else { -+ if (req->submitted) -+ next_fifo_transaction(ep, req); -+ else -+ submit_request(ep, req); -+ -+ if (req->last_transaction) { -+ list_del_init(&req->queue); -+ submit_next_request(ep); -+ request_complete(ep, req, 0); -+ } -+ } -+ -+ epstatus = usba_ep_readl(ep, STA); -+ epctrl = usba_ep_readl(ep, CTL); -+ } -+ if ((epstatus & epctrl) & USBA_BIT(RX_BK_RDY)) { -+ DBG(DBG_BUS, "%s: RX data ready\n", ep_name(ep)); -+ receive_data(ep); -+ usba_ep_writel(ep, CLR_STA, USBA_BIT(RX_BK_RDY)); -+ } -+} -+ -+static void usba_dma_irq(struct usba_udc *udc, struct usba_ep *ep) -+{ -+ struct usba_request *req; -+ u32 status, control, pending; -+ -+ status = usba_dma_readl(ep, STATUS); -+ control = usba_dma_readl(ep, CONTROL); -+#ifdef CONFIG_DEBUG_FS -+ ep->last_dma_status = status; -+#endif -+ pending = status & control; -+ DBG(DBG_INT | DBG_DMA, "dma irq, s/%#08x, c/%#08x\n", -+ status, control); -+ -+ if (status & USBA_BIT(DMA_CH_EN)) { -+ dev_err(&udc->pdev->dev, -+ "DMA_CH_EN is set after transfer is finished!\n"); -+ dev_err(&udc->pdev->dev, -+ "status=%#08x, pending=%#08x, control=%#08x\n", -+ status, pending, control); -+ -+ /* -+ * try to pretend nothing happened. We might have to -+ * do something here... -+ */ -+ } -+ -+ if (list_empty(&ep->queue)) -+ /* Might happen if a reset comes along at the right moment */ -+ return; -+ -+ if (pending & (USBA_BIT(DMA_END_TR_ST) | USBA_BIT(DMA_END_BUF_ST))) { -+ req = list_entry(ep->queue.next, struct usba_request, queue); -+ usba_update_req(ep, req, status); -+ -+ list_del_init(&req->queue); -+ submit_next_request(ep); -+ request_complete(ep, req, 0); -+ } -+} -+ -+static irqreturn_t usba_udc_irq(int irq, void *devid) -+{ -+ struct usba_udc *udc = devid; -+ u32 status; -+ u32 dma_status; -+ u32 ep_status; -+ -+ spin_lock(&udc->lock); -+ -+ status = usba_readl(udc, INT_STA); -+ DBG(DBG_INT, "irq, status=%#08x\n", status); -+ -+ if (status & USBA_BIT(DET_SUSPEND)) { -+ usba_writel(udc, INT_CLR, USBA_BIT(DET_SUSPEND)); -+ DBG(DBG_BUS, "Suspend detected\n"); -+ if (udc->gadget.speed != USB_SPEED_UNKNOWN -+ && udc->driver && udc->driver->suspend) -+ udc->driver->suspend(&udc->gadget); -+ } -+ -+ if (status & USBA_BIT(WAKE_UP)) { -+ usba_writel(udc, INT_CLR, USBA_BIT(WAKE_UP)); -+ DBG(DBG_BUS, "Wake Up CPU detected\n"); -+ } -+ -+ if (status & USBA_BIT(END_OF_RESUME)) { -+ usba_writel(udc, INT_CLR, USBA_BIT(END_OF_RESUME)); -+ DBG(DBG_BUS, "Resume detected\n"); -+ if (udc->gadget.speed != USB_SPEED_UNKNOWN -+ && udc->driver && udc->driver->resume) -+ udc->driver->resume(&udc->gadget); -+ } -+ -+ dma_status = USBA_BFEXT(DMA_INT, status); -+ if (dma_status) { -+ int i; -+ -+ for (i = 1; i < USBA_NR_ENDPOINTS; i++) -+ if (dma_status & (1 << i)) -+ usba_dma_irq(udc, &usba_ep[i]); -+ } -+ -+ ep_status = USBA_BFEXT(EPT_INT, status); -+ if (ep_status) { -+ int i; -+ -+ for (i = 0; i < USBA_NR_ENDPOINTS; i++) -+ if (ep_status & (1 << i)) { -+ if (ep_is_control(&usba_ep[i])) -+ usba_control_irq(udc, &usba_ep[i]); -+ else -+ usba_ep_irq(udc, &usba_ep[i]); -+ } -+ } -+ -+ if (status & USBA_BIT(END_OF_RESET)) { -+ struct usba_ep *ep0; -+ -+ usba_writel(udc, INT_CLR, USBA_BIT(END_OF_RESET)); -+ reset_all_endpoints(udc); -+ -+ if (status & USBA_BIT(HIGH_SPEED)) { -+ DBG(DBG_BUS, "High-speed bus reset detected\n"); -+ udc->gadget.speed = USB_SPEED_HIGH; -+ } else { -+ DBG(DBG_BUS, "Full-speed bus reset detected\n"); -+ udc->gadget.speed = USB_SPEED_FULL; -+ } -+ -+ ep0 = &usba_ep[0]; -+ ep0->desc = &usba_ep0_desc; -+ ep0->state = WAIT_FOR_SETUP; -+ usba_ep_writel(ep0, CFG, -+ (USBA_BF(EPT_SIZE, EP0_EPT_SIZE) -+ | USBA_BF(EPT_TYPE, USBA_EPT_TYPE_CONTROL) -+ | USBA_BF(BK_NUMBER, USBA_BK_NUMBER_ONE))); -+ usba_ep_writel(ep0, CTL_ENB, -+ USBA_BIT(EPT_ENABLE) | USBA_BIT(RX_SETUP)); -+ usba_writel(udc, INT_ENB, (usba_readl(udc, INT_ENB) -+ | USBA_BF(EPT_INT, 1) -+ | USBA_BIT(DET_SUSPEND) -+ | USBA_BIT(END_OF_RESUME))); -+ -+ if (!(usba_ep_readl(ep0, CFG) & USBA_BIT(EPT_MAPPED))) -+ dev_warn(&udc->pdev->dev, -+ "WARNING: EP0 configuration is invalid!\n"); -+ } -+ -+ spin_unlock(&udc->lock); -+ -+ return IRQ_HANDLED; -+} -+ -+static irqreturn_t usba_vbus_irq(int irq, void *devid) -+{ -+ struct usba_udc *udc = devid; -+ int vbus; -+ -+ /* debounce */ -+ udelay(10); -+ -+ spin_lock(&udc->lock); -+ vbus = gpio_get_value(udc->vbus_pin); -+ if (vbus != udc->vbus_prev) { -+ if (vbus) { -+ usba_writel(udc, CTRL, USBA_BIT(EN_USBA)); -+ usba_writel(udc, INT_ENB, USBA_BIT(END_OF_RESET)); -+ } else { -+ udc->gadget.speed = USB_SPEED_UNKNOWN; -+ reset_all_endpoints(udc); -+ usba_writel(udc, CTRL, 0); -+ if (udc->driver) -+ udc->driver->disconnect(&udc->gadget); -+ } -+ udc->vbus_prev = vbus; -+ } -+ spin_unlock(&udc->lock); -+ -+ return IRQ_HANDLED; -+} -+ -+int usb_gadget_register_driver(struct usb_gadget_driver *driver) -+{ -+ struct usba_udc *udc = &the_udc; -+ unsigned long flags; -+ int ret; -+ -+ if (!udc->pdev) -+ return -ENODEV; -+ -+ spin_lock_irqsave(&udc->lock, flags); -+ if (udc->driver) { -+ spin_unlock_irqrestore(&udc->lock, flags); -+ return -EBUSY; -+ } -+ -+ udc->driver = driver; -+ udc->gadget.dev.driver = &driver->driver; -+ spin_unlock_irqrestore(&udc->lock, flags); -+ -+ clk_enable(udc->pclk); -+ clk_enable(udc->hclk); -+ -+ ret = driver->bind(&udc->gadget); -+ if (ret) { -+ DBG(DBG_ERR, "Could not bind to driver %s: error %d\n", -+ driver->driver.name, ret); -+ goto err_driver_bind; -+ } -+ -+ DBG(DBG_GADGET, "registered driver `%s'\n", driver->driver.name); -+ -+ udc->vbus_prev = 0; -+ if (udc->vbus_pin != -1) { -+ ret = request_irq(gpio_to_irq(udc->vbus_pin), -+ usba_vbus_irq, 0, "atmel_usba_udc", udc); -+ if (ret) { -+ gpio_free(udc->vbus_pin); -+ udc->vbus_pin = -1; -+ dev_warn(&udc->pdev->dev, -+ "failed to request vbus irq; " -+ "assuming always on\n"); -+ } -+ } -+ -+ /* If Vbus is present, enable the controller and wait for reset */ -+ spin_lock_irqsave(&udc->lock, flags); -+ if (vbus_is_present(udc) && udc->vbus_prev == 0) { -+ usba_writel(udc, CTRL, USBA_BIT(EN_USBA)); -+ usba_writel(udc, INT_ENB, USBA_BIT(END_OF_RESET)); -+ } -+ spin_unlock_irqrestore(&udc->lock, flags); -+ -+ return 0; -+ -+err_driver_bind: -+ udc->driver = NULL; -+ udc->gadget.dev.driver = NULL; -+ return ret; -+} -+EXPORT_SYMBOL(usb_gadget_register_driver); -+ -+int usb_gadget_unregister_driver(struct usb_gadget_driver *driver) -+{ -+ struct usba_udc *udc = &the_udc; -+ unsigned long flags; -+ -+ if (!udc->pdev) -+ return -ENODEV; -+ if (driver != udc->driver) -+ return -EINVAL; -+ -+ if (udc->vbus_pin != -1) -+ free_irq(gpio_to_irq(udc->vbus_pin), udc); -+ -+ spin_lock_irqsave(&udc->lock, flags); -+ udc->gadget.speed = USB_SPEED_UNKNOWN; -+ reset_all_endpoints(udc); -+ spin_unlock_irqrestore(&udc->lock, flags); -+ -+ /* This will also disable the DP pullup */ -+ usba_writel(udc, CTRL, 0); -+ -+ driver->unbind(&udc->gadget); -+ udc->gadget.dev.driver = NULL; -+ udc->driver = NULL; -+ -+ clk_disable(udc->hclk); -+ clk_disable(udc->pclk); -+ -+ DBG(DBG_GADGET, "unregistered driver `%s'\n", driver->driver.name); -+ -+ return 0; -+} -+EXPORT_SYMBOL(usb_gadget_unregister_driver); -+ -+static int __devinit usba_udc_probe(struct platform_device *pdev) -+{ -+ struct usba_platform_data *pdata = pdev->dev.platform_data; -+ struct resource *regs, *fifo; -+ struct clk *pclk, *hclk; -+ struct usba_udc *udc = &the_udc; -+ int irq, ret, i; -+ -+ regs = platform_get_resource(pdev, IORESOURCE_MEM, CTRL_IOMEM_ID); -+ fifo = platform_get_resource(pdev, IORESOURCE_MEM, FIFO_IOMEM_ID); -+ if (!regs || !fifo) -+ return -ENXIO; -+ -+ irq = platform_get_irq(pdev, 0); -+ if (irq < 0) -+ return irq; -+ -+ pclk = clk_get(&pdev->dev, "pclk"); -+ if (IS_ERR(pclk)) -+ return PTR_ERR(pclk); -+ hclk = clk_get(&pdev->dev, "hclk"); -+ if (IS_ERR(hclk)) { -+ ret = PTR_ERR(hclk); -+ goto err_get_hclk; -+ } -+ -+ udc->pdev = pdev; -+ udc->pclk = pclk; -+ udc->hclk = hclk; -+ udc->vbus_pin = -1; -+ -+ ret = -ENOMEM; -+ udc->regs = ioremap(regs->start, regs->end - regs->start + 1); -+ if (!udc->regs) { -+ dev_err(&pdev->dev, "Unable to map I/O memory, aborting.\n"); -+ goto err_map_regs; -+ } -+ dev_info(&pdev->dev, "MMIO registers at 0x%08lx mapped at %p\n", -+ (unsigned long)regs->start, udc->regs); -+ udc->fifo = ioremap(fifo->start, fifo->end - fifo->start + 1); -+ if (!udc->fifo) { -+ dev_err(&pdev->dev, "Unable to map FIFO, aborting.\n"); -+ goto err_map_fifo; -+ } -+ dev_info(&pdev->dev, "FIFO at 0x%08lx mapped at %p\n", -+ (unsigned long)fifo->start, udc->fifo); -+ -+ device_initialize(&udc->gadget.dev); -+ udc->gadget.dev.parent = &pdev->dev; -+ udc->gadget.dev.dma_mask = pdev->dev.dma_mask; -+ -+ platform_set_drvdata(pdev, udc); -+ -+ /* Make sure we start from a clean slate */ -+ clk_enable(pclk); -+ usba_writel(udc, CTRL, 0); -+ clk_disable(pclk); -+ -+ INIT_LIST_HEAD(&usba_ep[0].ep.ep_list); -+ usba_ep[0].ep_regs = udc->regs + USBA_EPT_BASE(0); -+ usba_ep[0].dma_regs = udc->regs + USBA_DMA_BASE(0); -+ usba_ep[0].fifo = udc->fifo + USBA_FIFO_BASE(0); -+ for (i = 1; i < ARRAY_SIZE(usba_ep); i++) { -+ struct usba_ep *ep = &usba_ep[i]; -+ -+ ep->ep_regs = udc->regs + USBA_EPT_BASE(i); -+ ep->dma_regs = udc->regs + USBA_DMA_BASE(i); -+ ep->fifo = udc->fifo + USBA_FIFO_BASE(i); -+ -+ list_add_tail(&ep->ep.ep_list, &udc->gadget.ep_list); -+ } -+ -+ ret = request_irq(irq, usba_udc_irq, IRQF_SAMPLE_RANDOM, -+ "atmel_usba_udc", udc); -+ if (ret) { -+ dev_err(&pdev->dev, "Cannot request irq %d (error %d)\n", -+ irq, ret); -+ goto err_request_irq; -+ } -+ udc->irq = irq; -+ -+ ret = device_add(&udc->gadget.dev); -+ if (ret) { -+ dev_dbg(&pdev->dev, "Could not add gadget: %d\n", ret); -+ goto err_device_add; -+ } -+ -+ if (pdata && pdata->vbus_pin != GPIO_PIN_NONE) -+ if (!gpio_request(pdata->vbus_pin, "atmel_usba_udc")) -+ udc->vbus_pin = pdata->vbus_pin; -+ -+ usba_init_debugfs(udc); -+ for (i = 1; i < ARRAY_SIZE(usba_ep); i++) -+ usba_ep_init_debugfs(udc, &usba_ep[i]); -+ -+ return 0; -+ -+err_device_add: -+ free_irq(irq, udc); -+err_request_irq: -+ iounmap(udc->fifo); -+err_map_fifo: -+ iounmap(udc->regs); -+err_map_regs: -+ clk_put(hclk); -+err_get_hclk: -+ clk_put(pclk); -+ -+ platform_set_drvdata(pdev, NULL); -+ -+ return ret; -+} -+ -+static int __devexit usba_udc_remove(struct platform_device *pdev) -+{ -+ struct usba_udc *udc; -+ int i; -+ -+ udc = platform_get_drvdata(pdev); -+ -+ for (i = 1; i < ARRAY_SIZE(usba_ep); i++) -+ usba_ep_cleanup_debugfs(&usba_ep[i]); -+ usba_cleanup_debugfs(udc); -+ -+ if (udc->vbus_pin != -1) -+ gpio_free(udc->vbus_pin); -+ -+ free_irq(udc->irq, udc); -+ iounmap(udc->fifo); -+ iounmap(udc->regs); -+ clk_put(udc->hclk); -+ clk_put(udc->pclk); -+ -+ device_unregister(&udc->gadget.dev); -+ -+ return 0; -+} -+ -+static struct platform_driver udc_driver = { -+ .probe = usba_udc_probe, -+ .remove = __devexit_p(usba_udc_remove), -+ .driver = { -+ .name = "atmel_usba_udc", -+ }, -+}; -+ -+static int __init udc_init(void) -+{ -+ return platform_driver_register(&udc_driver); -+} -+module_init(udc_init); -+ -+static void __exit udc_exit(void) -+{ -+ platform_driver_unregister(&udc_driver); -+} -+module_exit(udc_exit); -+ -+MODULE_DESCRIPTION("Atmel USBA UDC driver"); -+MODULE_AUTHOR("Haavard Skinnemoen <hskinnemoen@atmel.com>"); -+MODULE_LICENSE("GPL"); -diff --git a/drivers/usb/gadget/atmel_usba_udc.h b/drivers/usb/gadget/atmel_usba_udc.h -new file mode 100644 -index 0000000..408d2ce ---- /dev/null -+++ b/drivers/usb/gadget/atmel_usba_udc.h -@@ -0,0 +1,402 @@ -+/* -+ * Driver for the Atmel USBA high speed USB device controller -+ * -+ * Copyright (C) 2005-2007 Atmel Corporation -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 as -+ * published by the Free Software Foundation. -+ */ -+#ifndef __LINUX_USB_GADGET_USBA_UDC_H__ -+#define __LINUX_USB_GADGET_USBA_UDC_H__ -+ -+/* USB register offsets */ -+#define USBA_CTRL 0x0000 -+#define USBA_FNUM 0x0004 -+#define USBA_INT_ENB 0x0010 -+#define USBA_INT_STA 0x0014 -+#define USBA_INT_CLR 0x0018 -+#define USBA_EPT_RST 0x001c -+#define USBA_TST_SOF_CNT 0x00d0 -+#define USBA_TST_CNT_A 0x00d4 -+#define USBA_TST_CNT_B 0x00d8 -+#define USBA_TST_MODE_REG 0x00dc -+#define USBA_TST 0x00e0 -+ -+/* USB endpoint register offsets */ -+#define USBA_EPT_CFG 0x0000 -+#define USBA_EPT_CTL_ENB 0x0004 -+#define USBA_EPT_CTL_DIS 0x0008 -+#define USBA_EPT_CTL 0x000c -+#define USBA_EPT_SET_STA 0x0014 -+#define USBA_EPT_CLR_STA 0x0018 -+#define USBA_EPT_STA 0x001c -+ -+/* USB DMA register offsets */ -+#define USBA_DMA_NXT_DSC 0x0000 -+#define USBA_DMA_ADDRESS 0x0004 -+#define USBA_DMA_CONTROL 0x0008 -+#define USBA_DMA_STATUS 0x000c -+ -+/* Bitfields in CTRL */ -+#define USBA_DEV_ADDR_OFFSET 0 -+#define USBA_DEV_ADDR_SIZE 7 -+#define USBA_FADDR_EN_OFFSET 7 -+#define USBA_FADDR_EN_SIZE 1 -+#define USBA_EN_USBA_OFFSET 8 -+#define USBA_EN_USBA_SIZE 1 -+#define USBA_DETACH_OFFSET 9 -+#define USBA_DETACH_SIZE 1 -+#define USBA_REMOTE_WAKE_UP_OFFSET 10 -+#define USBA_REMOTE_WAKE_UP_SIZE 1 -+ -+/* Bitfields in FNUM */ -+#define USBA_MICRO_FRAME_NUM_OFFSET 0 -+#define USBA_MICRO_FRAME_NUM_SIZE 3 -+#define USBA_FRAME_NUMBER_OFFSET 3 -+#define USBA_FRAME_NUMBER_SIZE 11 -+#define USBA_FRAME_NUM_ERROR_OFFSET 31 -+#define USBA_FRAME_NUM_ERROR_SIZE 1 -+ -+/* Bitfields in INT_ENB/INT_STA/INT_CLR */ -+#define USBA_HIGH_SPEED_OFFSET 0 -+#define USBA_HIGH_SPEED_SIZE 1 -+#define USBA_DET_SUSPEND_OFFSET 1 -+#define USBA_DET_SUSPEND_SIZE 1 -+#define USBA_MICRO_SOF_OFFSET 2 -+#define USBA_MICRO_SOF_SIZE 1 -+#define USBA_SOF_OFFSET 3 -+#define USBA_SOF_SIZE 1 -+#define USBA_END_OF_RESET_OFFSET 4 -+#define USBA_END_OF_RESET_SIZE 1 -+#define USBA_WAKE_UP_OFFSET 5 -+#define USBA_WAKE_UP_SIZE 1 -+#define USBA_END_OF_RESUME_OFFSET 6 -+#define USBA_END_OF_RESUME_SIZE 1 -+#define USBA_UPSTREAM_RESUME_OFFSET 7 -+#define USBA_UPSTREAM_RESUME_SIZE 1 -+#define USBA_EPT_INT_OFFSET 8 -+#define USBA_EPT_INT_SIZE 16 -+#define USBA_DMA_INT_OFFSET 24 -+#define USBA_DMA_INT_SIZE 8 -+ -+/* Bitfields in EPT_RST */ -+#define USBA_RST_OFFSET 0 -+#define USBA_RST_SIZE 16 -+ -+/* Bitfields in TST_SOF_CNT */ -+#define USBA_SOF_CNT_MAX_OFFSET 0 -+#define USBA_SOF_CNT_MAX_SIZE 7 -+#define USBA_SOF_CNT_LOAD_OFFSET 7 -+#define USBA_SOF_CNT_LOAD_SIZE 1 -+ -+/* Bitfields in TST_CNT_A */ -+#define USBA_CNT_A_MAX_OFFSET 0 -+#define USBA_CNT_A_MAX_SIZE 7 -+#define USBA_CNT_A_LOAD_OFFSET 7 -+#define USBA_CNT_A_LOAD_SIZE 1 -+ -+/* Bitfields in TST_CNT_B */ -+#define USBA_CNT_B_MAX_OFFSET 0 -+#define USBA_CNT_B_MAX_SIZE 7 -+#define USBA_CNT_B_LOAD_OFFSET 7 -+#define USBA_CNT_B_LOAD_SIZE 1 -+ -+/* Bitfields in TST_MODE_REG */ -+#define USBA_TST_MODE_OFFSET 0 -+#define USBA_TST_MODE_SIZE 6 -+ -+/* Bitfields in USBA_TST */ -+#define USBA_SPEED_CFG_OFFSET 0 -+#define USBA_SPEED_CFG_SIZE 2 -+#define USBA_TST_J_MODE_OFFSET 2 -+#define USBA_TST_J_MODE_SIZE 1 -+#define USBA_TST_K_MODE_OFFSET 3 -+#define USBA_TST_K_MODE_SIZE 1 -+#define USBA_TST_PKT_MODE_OFFSET 4 -+#define USBA_TST_PKT_MODE_SIZE 1 -+#define USBA_OPMODE2_OFFSET 5 -+#define USBA_OPMODE2_SIZE 1 -+ -+/* Bitfields in EPT_CFG */ -+#define USBA_EPT_SIZE_OFFSET 0 -+#define USBA_EPT_SIZE_SIZE 3 -+#define USBA_EPT_DIR_OFFSET 3 -+#define USBA_EPT_DIR_SIZE 1 -+#define USBA_EPT_TYPE_OFFSET 4 -+#define USBA_EPT_TYPE_SIZE 2 -+#define USBA_BK_NUMBER_OFFSET 6 -+#define USBA_BK_NUMBER_SIZE 2 -+#define USBA_NB_TRANS_OFFSET 8 -+#define USBA_NB_TRANS_SIZE 2 -+#define USBA_EPT_MAPPED_OFFSET 31 -+#define USBA_EPT_MAPPED_SIZE 1 -+ -+/* Bitfields in EPT_CTL/EPT_CTL_ENB/EPT_CTL_DIS */ -+#define USBA_EPT_ENABLE_OFFSET 0 -+#define USBA_EPT_ENABLE_SIZE 1 -+#define USBA_AUTO_VALID_OFFSET 1 -+#define USBA_AUTO_VALID_SIZE 1 -+#define USBA_INTDIS_DMA_OFFSET 3 -+#define USBA_INTDIS_DMA_SIZE 1 -+#define USBA_NYET_DIS_OFFSET 4 -+#define USBA_NYET_DIS_SIZE 1 -+#define USBA_DATAX_RX_OFFSET 6 -+#define USBA_DATAX_RX_SIZE 1 -+#define USBA_MDATA_RX_OFFSET 7 -+#define USBA_MDATA_RX_SIZE 1 -+/* Bits 8-15 and 31 enable interrupts for respective bits in EPT_STA */ -+#define USBA_BUSY_BANK_IE_OFFSET 18 -+#define USBA_BUSY_BANK_IE_SIZE 1 -+ -+/* Bitfields in EPT_SET_STA/EPT_CLR_STA/EPT_STA */ -+#define USBA_FORCE_STALL_OFFSET 5 -+#define USBA_FORCE_STALL_SIZE 1 -+#define USBA_TOGGLE_SEQ_OFFSET 6 -+#define USBA_TOGGLE_SEQ_SIZE 2 -+#define USBA_ERR_OVFLW_OFFSET 8 -+#define USBA_ERR_OVFLW_SIZE 1 -+#define USBA_RX_BK_RDY_OFFSET 9 -+#define USBA_RX_BK_RDY_SIZE 1 -+#define USBA_KILL_BANK_OFFSET 9 -+#define USBA_KILL_BANK_SIZE 1 -+#define USBA_TX_COMPLETE_OFFSET 10 -+#define USBA_TX_COMPLETE_SIZE 1 -+#define USBA_TX_PK_RDY_OFFSET 11 -+#define USBA_TX_PK_RDY_SIZE 1 -+#define USBA_ISO_ERR_TRANS_OFFSET 11 -+#define USBA_ISO_ERR_TRANS_SIZE 1 -+#define USBA_RX_SETUP_OFFSET 12 -+#define USBA_RX_SETUP_SIZE 1 -+#define USBA_ISO_ERR_FLOW_OFFSET 12 -+#define USBA_ISO_ERR_FLOW_SIZE 1 -+#define USBA_STALL_SENT_OFFSET 13 -+#define USBA_STALL_SENT_SIZE 1 -+#define USBA_ISO_ERR_CRC_OFFSET 13 -+#define USBA_ISO_ERR_CRC_SIZE 1 -+#define USBA_ISO_ERR_NBTRANS_OFFSET 13 -+#define USBA_ISO_ERR_NBTRANS_SIZE 1 -+#define USBA_NAK_IN_OFFSET 14 -+#define USBA_NAK_IN_SIZE 1 -+#define USBA_ISO_ERR_FLUSH_OFFSET 14 -+#define USBA_ISO_ERR_FLUSH_SIZE 1 -+#define USBA_NAK_OUT_OFFSET 15 -+#define USBA_NAK_OUT_SIZE 1 -+#define USBA_CURRENT_BANK_OFFSET 16 -+#define USBA_CURRENT_BANK_SIZE 2 -+#define USBA_BUSY_BANKS_OFFSET 18 -+#define USBA_BUSY_BANKS_SIZE 2 -+#define USBA_BYTE_COUNT_OFFSET 20 -+#define USBA_BYTE_COUNT_SIZE 11 -+#define USBA_SHORT_PACKET_OFFSET 31 -+#define USBA_SHORT_PACKET_SIZE 1 -+ -+/* Bitfields in DMA_CONTROL */ -+#define USBA_DMA_CH_EN_OFFSET 0 -+#define USBA_DMA_CH_EN_SIZE 1 -+#define USBA_DMA_LINK_OFFSET 1 -+#define USBA_DMA_LINK_SIZE 1 -+#define USBA_DMA_END_TR_EN_OFFSET 2 -+#define USBA_DMA_END_TR_EN_SIZE 1 -+#define USBA_DMA_END_BUF_EN_OFFSET 3 -+#define USBA_DMA_END_BUF_EN_SIZE 1 -+#define USBA_DMA_END_TR_IE_OFFSET 4 -+#define USBA_DMA_END_TR_IE_SIZE 1 -+#define USBA_DMA_END_BUF_IE_OFFSET 5 -+#define USBA_DMA_END_BUF_IE_SIZE 1 -+#define USBA_DMA_DESC_LOAD_IE_OFFSET 6 -+#define USBA_DMA_DESC_LOAD_IE_SIZE 1 -+#define USBA_DMA_BURST_LOCK_OFFSET 7 -+#define USBA_DMA_BURST_LOCK_SIZE 1 -+#define USBA_DMA_BUF_LEN_OFFSET 16 -+#define USBA_DMA_BUF_LEN_SIZE 16 -+ -+/* Bitfields in DMA_STATUS */ -+#define USBA_DMA_CH_ACTIVE_OFFSET 1 -+#define USBA_DMA_CH_ACTIVE_SIZE 1 -+#define USBA_DMA_END_TR_ST_OFFSET 4 -+#define USBA_DMA_END_TR_ST_SIZE 1 -+#define USBA_DMA_END_BUF_ST_OFFSET 5 -+#define USBA_DMA_END_BUF_ST_SIZE 1 -+#define USBA_DMA_DESC_LOAD_ST_OFFSET 6 -+#define USBA_DMA_DESC_LOAD_ST_SIZE 1 -+ -+/* Constants for SPEED_CFG */ -+#define USBA_SPEED_CFG_NORMAL 0 -+#define USBA_SPEED_CFG_FORCE_HIGH 2 -+#define USBA_SPEED_CFG_FORCE_FULL 3 -+ -+/* Constants for EPT_SIZE */ -+#define USBA_EPT_SIZE_8 0 -+#define USBA_EPT_SIZE_16 1 -+#define USBA_EPT_SIZE_32 2 -+#define USBA_EPT_SIZE_64 3 -+#define USBA_EPT_SIZE_128 4 -+#define USBA_EPT_SIZE_256 5 -+#define USBA_EPT_SIZE_512 6 -+#define USBA_EPT_SIZE_1024 7 -+ -+/* Constants for EPT_TYPE */ -+#define USBA_EPT_TYPE_CONTROL 0 -+#define USBA_EPT_TYPE_ISO 1 -+#define USBA_EPT_TYPE_BULK 2 -+#define USBA_EPT_TYPE_INT 3 -+ -+/* Constants for BK_NUMBER */ -+#define USBA_BK_NUMBER_ZERO 0 -+#define USBA_BK_NUMBER_ONE 1 -+#define USBA_BK_NUMBER_DOUBLE 2 -+#define USBA_BK_NUMBER_TRIPLE 3 -+ -+/* Bit manipulation macros */ -+#define USBA_BIT(name) \ -+ (1 << USBA_##name##_OFFSET) -+#define USBA_BF(name, value) \ -+ (((value) & ((1 << USBA_##name##_SIZE) - 1)) \ -+ << USBA_##name##_OFFSET) -+#define USBA_BFEXT(name, value) \ -+ (((value) >> USBA_##name##_OFFSET) \ -+ & ((1 << USBA_##name##_SIZE) - 1)) -+#define USBA_BFINS(name, value, old) \ -+ (((old) & ~(((1 << USBA_##name##_SIZE) - 1) \ -+ << USBA_##name##_OFFSET)) \ -+ | USBA_BF(name, value)) -+ -+/* Register access macros */ -+#define usba_readl(udc, reg) \ -+ __raw_readl((udc)->regs + USBA_##reg) -+#define usba_writel(udc, reg, value) \ -+ __raw_writel((value), (udc)->regs + USBA_##reg) -+#define usba_ep_readl(ep, reg) \ -+ __raw_readl((ep)->ep_regs + USBA_EPT_##reg) -+#define usba_ep_writel(ep, reg, value) \ -+ __raw_writel((value), (ep)->ep_regs + USBA_EPT_##reg) -+#define usba_dma_readl(ep, reg) \ -+ __raw_readl((ep)->dma_regs + USBA_DMA_##reg) -+#define usba_dma_writel(ep, reg, value) \ -+ __raw_writel((value), (ep)->dma_regs + USBA_DMA_##reg) -+ -+/* Calculate base address for a given endpoint or DMA controller */ -+#define USBA_EPT_BASE(x) (0x100 + (x) * 0x20) -+#define USBA_DMA_BASE(x) (0x300 + (x) * 0x10) -+#define USBA_FIFO_BASE(x) ((x) << 16) -+ -+/* Synth parameters */ -+#define USBA_NR_ENDPOINTS 7 -+ -+#define EP0_FIFO_SIZE 64 -+#define EP0_EPT_SIZE USBA_EPT_SIZE_64 -+#define EP0_NR_BANKS 1 -+#define BULK_FIFO_SIZE 512 -+#define BULK_EPT_SIZE USBA_EPT_SIZE_512 -+#define BULK_NR_BANKS 2 -+#define ISO_FIFO_SIZE 1024 -+#define ISO_EPT_SIZE USBA_EPT_SIZE_1024 -+#define ISO_NR_BANKS 3 -+#define INT_FIFO_SIZE 64 -+#define INT_EPT_SIZE USBA_EPT_SIZE_64 -+#define INT_NR_BANKS 3 -+ -+enum usba_ctrl_state { -+ WAIT_FOR_SETUP, -+ DATA_STAGE_IN, -+ DATA_STAGE_OUT, -+ STATUS_STAGE_IN, -+ STATUS_STAGE_OUT, -+ STATUS_STAGE_ADDR, -+ STATUS_STAGE_TEST, -+}; -+/* -+ EP_STATE_IDLE, -+ EP_STATE_SETUP, -+ EP_STATE_IN_DATA, -+ EP_STATE_OUT_DATA, -+ EP_STATE_SET_ADDR_STATUS, -+ EP_STATE_RX_STATUS, -+ EP_STATE_TX_STATUS, -+ EP_STATE_HALT, -+*/ -+ -+struct usba_dma_desc { -+ dma_addr_t next; -+ dma_addr_t addr; -+ u32 ctrl; -+}; -+ -+struct usba_ep { -+ int state; -+ void __iomem *ep_regs; -+ void __iomem *dma_regs; -+ void __iomem *fifo; -+ struct usb_ep ep; -+ struct usba_udc *udc; -+ -+ struct list_head queue; -+ const struct usb_endpoint_descriptor *desc; -+ -+ u16 fifo_size; -+ u8 nr_banks; -+ u8 index; -+ unsigned int can_dma:1; -+ unsigned int can_isoc:1; -+ unsigned int is_isoc:1; -+ unsigned int is_in:1; -+ -+#ifdef CONFIG_DEBUG_FS -+ u32 last_dma_status; -+ struct dentry *debugfs_dir; -+ struct dentry *debugfs_queue; -+ struct dentry *debugfs_dma_status; -+ struct dentry *debugfs_state; -+#endif -+}; -+ -+struct usba_request { -+ struct usb_request req; -+ struct list_head queue; -+ -+ u32 ctrl; -+ -+ unsigned int submitted:1; -+ unsigned int last_transaction:1; -+ unsigned int using_dma:1; -+ unsigned int mapped:1; -+}; -+ -+struct usba_udc { -+ /* Protect hw registers from concurrent modifications */ -+ spinlock_t lock; -+ -+ void __iomem *regs; -+ void __iomem *fifo; -+ -+ struct usb_gadget gadget; -+ struct usb_gadget_driver *driver; -+ struct platform_device *pdev; -+ int irq; -+ int vbus_pin; -+ struct clk *pclk; -+ struct clk *hclk; -+ -+ int test_mode; -+ int vbus_prev; -+ -+#ifdef CONFIG_DEBUG_FS -+ struct dentry *debugfs_root; -+ struct dentry *debugfs_regs; -+#endif -+}; -+ -+#define to_usba_ep(x) container_of((x), struct usba_ep, ep) -+#define to_usba_req(x) container_of((x), struct usba_request, req) -+#define to_usba_udc(x) container_of((x), struct usba_udc, gadget) -+ -+#define ep_index(ep) ((ep)->index) -+#define ep_can_dma(ep) ((ep)->can_dma) -+#define ep_is_in(ep) ((ep)->is_in) -+#define ep_is_isochronous(ep) ((ep)->is_isoc) -+#define ep_is_control(ep) (ep_index(ep) == 0) -+#define ep_name(ep) ((ep)->ep.name) -+#define ep_is_idle(ep) ((ep)->state == EP_STATE_IDLE) -+ -+#endif /* __LINUX_USB_GADGET_USBA_UDC_H */ -diff --git a/drivers/usb/gadget/ether.c b/drivers/usb/gadget/ether.c -index 325bf7c..23e874b 100644 ---- a/drivers/usb/gadget/ether.c -+++ b/drivers/usb/gadget/ether.c -@@ -277,7 +277,7 @@ MODULE_PARM_DESC(host_addr, "Host Ethernet Address"); - #define DEV_CONFIG_CDC - #endif - --#ifdef CONFIG_USB_GADGET_HUSB2DEV -+#ifdef CONFIG_USB_GADGET_ATMEL_USBA - #define DEV_CONFIG_CDC - #endif - -diff --git a/drivers/usb/gadget/gadget_chips.h b/drivers/usb/gadget/gadget_chips.h -index d041b91..96e4dbc 100644 ---- a/drivers/usb/gadget/gadget_chips.h -+++ b/drivers/usb/gadget/gadget_chips.h -@@ -75,10 +75,10 @@ - #define gadget_is_pxa27x(g) 0 - #endif - --#ifdef CONFIG_USB_GADGET_HUSB2DEV --#define gadget_is_husb2dev(g) !strcmp("husb2_udc", (g)->name) -+#ifdef CONFIG_USB_GADGET_ATMEL_USBA -+#define gadget_is_atmel_usba(g) !strcmp("atmel_usba_udc", (g)->name) - #else --#define gadget_is_husb2dev(g) 0 -+#define gadget_is_atmel_usba(g) 0 - #endif - - #ifdef CONFIG_USB_GADGET_S3C2410 -@@ -181,7 +181,7 @@ static inline int usb_gadget_controller_number(struct usb_gadget *gadget) - return 0x16; - else if (gadget_is_mpc8272(gadget)) - return 0x17; -- else if (gadget_is_husb2dev(gadget)) -+ else if (gadget_is_atmel_usba(gadget)) - return 0x18; - else if (gadget_is_fsl_usb2(gadget)) - return 0x19; -diff --git a/drivers/usb/gadget/inode.c b/drivers/usb/gadget/inode.c -index 46d0e52..855f8cc 100644 ---- a/drivers/usb/gadget/inode.c -+++ b/drivers/usb/gadget/inode.c -@@ -37,7 +37,7 @@ - #include <linux/device.h> - #include <linux/moduleparam.h> - --#include <linux/usb_gadgetfs.h> -+#include <linux/usb/gadgetfs.h> - #include <linux/usb_gadget.h> - - -diff --git a/drivers/video/Kconfig b/drivers/video/Kconfig -index 403dac7..f3e2897 100644 ---- a/drivers/video/Kconfig -+++ b/drivers/video/Kconfig -@@ -849,6 +849,16 @@ config FB_INTSRAM - Say Y if you want to map Frame Buffer in internal SRAM. Say N if you want - to let frame buffer in external SDRAM. - -+config FB_ATMEL_STN -+ bool "Use a STN display with AT91/AT32 LCD Controller" -+ depends on FB_ATMEL && ARCH_AT91SAM9261 -+ default n -+ help -+ Say Y if you want to connect a STN LCD display to the AT91/AT32 LCD -+ Controller. Say N if you want to connect a TFT. -+ -+ If unsure, say N. -+ - config FB_NVIDIA - tristate "nVidia Framebuffer Support" - depends on FB && PCI -diff --git a/drivers/video/atmel_lcdfb.c b/drivers/video/atmel_lcdfb.c -index e1d5bd0..bb361ab 100644 ---- a/drivers/video/atmel_lcdfb.c -+++ b/drivers/video/atmel_lcdfb.c -@@ -37,7 +37,9 @@ - #endif - - #if defined(CONFIG_ARCH_AT91) --#define ATMEL_LCDFB_FBINFO_DEFAULT FBINFO_DEFAULT -+#define ATMEL_LCDFB_FBINFO_DEFAULT (FBINFO_DEFAULT \ -+ | FBINFO_PARTIAL_PAN_OK \ -+ | FBINFO_HWACCEL_YPAN) - - static inline void atmel_lcdfb_update_dma2d(struct atmel_lcdfb_info *sinfo, - struct fb_var_screeninfo *var) -@@ -74,11 +76,34 @@ static struct fb_fix_screeninfo atmel_lcdfb_fix __initdata = { - .type = FB_TYPE_PACKED_PIXELS, - .visual = FB_VISUAL_TRUECOLOR, - .xpanstep = 0, -- .ypanstep = 0, -+ .ypanstep = 1, - .ywrapstep = 0, - .accel = FB_ACCEL_NONE, - }; - -+static unsigned long compute_hozval(unsigned long xres, unsigned long lcdcon2) -+{ -+ unsigned long value; -+ -+ if (!(cpu_is_at91sam9261() || cpu_is_at32ap7000())) -+ return xres; -+ -+ value = xres; -+ if ((lcdcon2 & ATMEL_LCDC_DISTYPE) != ATMEL_LCDC_DISTYPE_TFT) { -+ /* STN display */ -+ if ((lcdcon2 & ATMEL_LCDC_DISTYPE) == ATMEL_LCDC_DISTYPE_STNCOLOR) { -+ value *= 3; -+ } -+ if ( (lcdcon2 & ATMEL_LCDC_IFWIDTH) == ATMEL_LCDC_IFWIDTH_4 -+ || ( (lcdcon2 & ATMEL_LCDC_IFWIDTH) == ATMEL_LCDC_IFWIDTH_8 -+ && (lcdcon2 & ATMEL_LCDC_SCANMOD) == ATMEL_LCDC_SCANMOD_DUAL )) -+ value = DIV_ROUND_UP(value, 4); -+ else -+ value = DIV_ROUND_UP(value, 8); -+ } -+ -+ return value; -+} - - static void atmel_lcdfb_update_dma(struct fb_info *info, - struct fb_var_screeninfo *var) -@@ -181,6 +206,7 @@ static int atmel_lcdfb_check_var(struct fb_var_screeninfo *var, - var->xoffset = var->yoffset = 0; - - switch (var->bits_per_pixel) { -+ case 1: - case 2: - case 4: - case 8: -@@ -195,8 +221,11 @@ static int atmel_lcdfb_check_var(struct fb_var_screeninfo *var, - var->blue.offset = 10; - var->red.length = var->green.length = var->blue.length = 5; - break; -- case 24: - case 32: -+ var->transp.offset = 24; -+ var->transp.length = 8; -+ /* fall through */ -+ case 24: - var->red.offset = 0; - var->green.offset = 8; - var->blue.offset = 16; -@@ -228,8 +257,10 @@ static int atmel_lcdfb_check_var(struct fb_var_screeninfo *var, - static int atmel_lcdfb_set_par(struct fb_info *info) - { - struct atmel_lcdfb_info *sinfo = info->par; -+ unsigned long hozval_linesz; - unsigned long value; - unsigned long clk_value_khz; -+ unsigned long bits_per_line; - - dev_dbg(info->device, "%s:\n", __func__); - dev_dbg(info->device, " * resolution: %ux%u (%ux%u virtual)\n", -@@ -241,12 +272,15 @@ static int atmel_lcdfb_set_par(struct fb_info *info) - - lcdc_writel(sinfo, ATMEL_LCDC_DMACON, 0); - -- if (info->var.bits_per_pixel <= 8) -+ if (info->var.bits_per_pixel == 1) -+ info->fix.visual = FB_VISUAL_MONO01; -+ else if (info->var.bits_per_pixel <= 8) - info->fix.visual = FB_VISUAL_PSEUDOCOLOR; - else - info->fix.visual = FB_VISUAL_TRUECOLOR; - -- info->fix.line_length = info->var.xres_virtual * (info->var.bits_per_pixel / 8); -+ bits_per_line = info->var.xres_virtual * info->var.bits_per_pixel; -+ info->fix.line_length = DIV_ROUND_UP(bits_per_line, 8); - - /* Re-initialize the DMA engine... */ - dev_dbg(info->device, " * update DMA engine\n"); -@@ -262,18 +296,21 @@ static int atmel_lcdfb_set_par(struct fb_info *info) - /* Set pixel clock */ - clk_value_khz = clk_get_rate(sinfo->lcdc_clk) / 1000; - -- value = clk_value_khz / PICOS2KHZ(info->var.pixclock); -- -- if (clk_value_khz % PICOS2KHZ(info->var.pixclock)) -- value++; -+ value = DIV_ROUND_UP(clk_value_khz, PICOS2KHZ(info->var.pixclock)); - - value = (value / 2) - 1; -+ dev_dbg(info->device, " * programming CLKVAL = 0x%08lx\n", value); - - if (value <= 0) { - dev_notice(info->device, "Bypassing pixel clock divider\n"); - lcdc_writel(sinfo, ATMEL_LCDC_LCDCON1, ATMEL_LCDC_BYPASS); -- } else -+ } else { - lcdc_writel(sinfo, ATMEL_LCDC_LCDCON1, value << ATMEL_LCDC_CLKVAL_OFFSET); -+ info->var.pixclock = KHZ2PICOS(clk_value_khz / (2 * (value + 1))); -+ dev_dbg(info->device, " updated pixclk: %lu KHz\n", -+ PICOS2KHZ(info->var.pixclock)); -+ } -+ - - /* Initialize control register 2 */ - value = sinfo->default_lcdcon2; -@@ -311,9 +348,14 @@ static int atmel_lcdfb_set_par(struct fb_info *info) - dev_dbg(info->device, " * LCDTIM2 = %08lx\n", value); - lcdc_writel(sinfo, ATMEL_LCDC_TIM2, value); - -+ /* Horizontal value (aka line size) */ -+ hozval_linesz = compute_hozval(info->var.xres, -+ lcdc_readl(sinfo, ATMEL_LCDC_LCDCON2)); -+ - /* Display size */ -- value = (info->var.xres - 1) << ATMEL_LCDC_HOZVAL_OFFSET; -+ value = (hozval_linesz - 1) << ATMEL_LCDC_HOZVAL_OFFSET; - value |= info->var.yres - 1; -+ dev_dbg(info->device, " * LCDFRMCFG = %08lx\n", value); - lcdc_writel(sinfo, ATMEL_LCDC_LCDFRMCFG, value); - - /* FIFO Threshold: Use formula from data sheet */ -@@ -421,6 +463,15 @@ static int atmel_lcdfb_setcolreg(unsigned int regno, unsigned int red, - ret = 0; - } - break; -+ -+ case FB_VISUAL_MONO01: -+ if (regno < 2) { -+ val = (regno == 0) ? 0x00 : 0x1F; -+ lcdc_writel(sinfo, ATMEL_LCDC_LUT(regno), val); -+ ret = 0; -+ } -+ break; -+ - } - - return ret; -diff --git a/drivers/video/backlight/Kconfig b/drivers/video/backlight/Kconfig -index fbef663..b6f936a 100644 ---- a/drivers/video/backlight/Kconfig -+++ b/drivers/video/backlight/Kconfig -@@ -8,26 +8,44 @@ menuconfig BACKLIGHT_LCD_SUPPORT - Enable this to be able to choose the drivers for controlling the - backlight and the LCD panel on some platforms, for example on PDAs. - --config BACKLIGHT_CLASS_DEVICE -- tristate "Lowlevel Backlight controls" -+# -+# LCD -+# -+config LCD_CLASS_DEVICE -+ tristate "Lowlevel LCD controls" - depends on BACKLIGHT_LCD_SUPPORT - default m - help -- This framework adds support for low-level control of the LCD -- backlight. This includes support for brightness and power. -+ This framework adds support for low-level control of LCD. -+ Some framebuffer devices connect to platform-specific LCD modules -+ in order to have a platform-specific way to control the flat panel -+ (contrast and applying power to the LCD (not to the backlight!)). - - To have support for your specific LCD panel you will have to - select the proper drivers which depend on this option. - --config LCD_CLASS_DEVICE -- tristate "Lowlevel LCD controls" -+config LCD_LTV350QV -+ tristate "Samsung LTV350QV LCD Panel" -+ depends on LCD_CLASS_DEVICE && SPI_MASTER -+ default n -+ help -+ If you have a Samsung LTV350QV LCD panel, say y to include a -+ power control driver for it. The panel starts up in power -+ off state, so you need this driver in order to see any -+ output. -+ -+ The LTV350QV panel is present on all ATSTK1000 boards. -+ -+# -+# Backlight -+# -+config BACKLIGHT_CLASS_DEVICE -+ tristate "Lowlevel Backlight controls" - depends on BACKLIGHT_LCD_SUPPORT - default m - help -- This framework adds support for low-level control of LCD. -- Some framebuffer devices connect to platform-specific LCD modules -- in order to have a platform-specific way to control the flat panel -- (contrast and applying power to the LCD (not to the backlight!)). -+ This framework adds support for low-level control of the LCD -+ backlight. This includes support for brightness and power. - - To have support for your specific LCD panel you will have to - select the proper drivers which depend on this option. -diff --git a/drivers/video/backlight/Makefile b/drivers/video/backlight/Makefile -index c6e2266..965a78b 100644 ---- a/drivers/video/backlight/Makefile -+++ b/drivers/video/backlight/Makefile -@@ -1,6 +1,8 @@ - # Backlight & LCD drivers - - obj-$(CONFIG_LCD_CLASS_DEVICE) += lcd.o -+obj-$(CONFIG_LCD_LTV350QV) += ltv350qv.o -+ - obj-$(CONFIG_BACKLIGHT_CLASS_DEVICE) += backlight.o - obj-$(CONFIG_BACKLIGHT_CORGI) += corgi_bl.o - obj-$(CONFIG_BACKLIGHT_HP680) += hp680_bl.o -diff --git a/drivers/video/backlight/ltv350qv.c b/drivers/video/backlight/ltv350qv.c -new file mode 100644 -index 0000000..64ce69e ---- /dev/null -+++ b/drivers/video/backlight/ltv350qv.c -@@ -0,0 +1,339 @@ -+/* -+ * Power control for Samsung LTV350QV Quarter VGA LCD Panel -+ * -+ * Copyright (C) 2006, 2007 Atmel Corporation -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 as -+ * published by the Free Software Foundation. -+ */ -+#include <linux/delay.h> -+#include <linux/err.h> -+#include <linux/fb.h> -+#include <linux/init.h> -+#include <linux/lcd.h> -+#include <linux/module.h> -+#include <linux/spi/spi.h> -+ -+#include "ltv350qv.h" -+ -+#define POWER_IS_ON(pwr) ((pwr) <= FB_BLANK_NORMAL) -+ -+struct ltv350qv { -+ struct spi_device *spi; -+ u8 *buffer; -+ int power; -+ struct lcd_device *ld; -+}; -+ -+/* -+ * The power-on and power-off sequences are taken from the -+ * LTV350QV-F04 data sheet from Samsung. The register definitions are -+ * taken from the S6F2002 command list also from Samsung. Both -+ * documents are distributed with the AVR32 Linux BSP CD from Atmel. -+ * -+ * There's still some voodoo going on here, but it's a lot better than -+ * in the first incarnation of the driver where all we had was the raw -+ * numbers from the initialization sequence. -+ */ -+static int ltv350qv_write_reg(struct ltv350qv *lcd, u8 reg, u16 val) -+{ -+ struct spi_message msg; -+ struct spi_transfer index_xfer = { -+ .len = 3, -+ .cs_change = 1, -+ }; -+ struct spi_transfer value_xfer = { -+ .len = 3, -+ }; -+ -+ spi_message_init(&msg); -+ -+ /* register index */ -+ lcd->buffer[0] = LTV_OPC_INDEX; -+ lcd->buffer[1] = 0x00; -+ lcd->buffer[2] = reg & 0x7f; -+ index_xfer.tx_buf = lcd->buffer; -+ spi_message_add_tail(&index_xfer, &msg); -+ -+ /* register value */ -+ lcd->buffer[4] = LTV_OPC_DATA; -+ lcd->buffer[5] = val >> 8; -+ lcd->buffer[6] = val; -+ value_xfer.tx_buf = lcd->buffer + 4; -+ spi_message_add_tail(&value_xfer, &msg); -+ -+ return spi_sync(lcd->spi, &msg); -+} -+ -+/* The comments are taken straight from the data sheet */ -+static int ltv350qv_power_on(struct ltv350qv *lcd) -+{ -+ int ret; -+ -+ /* Power On Reset Display off State */ -+ if (ltv350qv_write_reg(lcd, LTV_PWRCTL1, 0x0000)) -+ goto err; -+ msleep(15); -+ -+ /* Power Setting Function 1 */ -+ if (ltv350qv_write_reg(lcd, LTV_PWRCTL1, LTV_VCOM_DISABLE)) -+ goto err; -+ if (ltv350qv_write_reg(lcd, LTV_PWRCTL2, LTV_VCOML_ENABLE)) -+ goto err_power1; -+ -+ /* Power Setting Function 2 */ -+ if (ltv350qv_write_reg(lcd, LTV_PWRCTL1, -+ LTV_VCOM_DISABLE | LTV_DRIVE_CURRENT(5) -+ | LTV_SUPPLY_CURRENT(5))) -+ goto err_power2; -+ -+ msleep(55); -+ -+ /* Instruction Setting */ -+ ret = ltv350qv_write_reg(lcd, LTV_IFCTL, -+ LTV_NMD | LTV_REV | LTV_NL(0x1d)); -+ ret |= ltv350qv_write_reg(lcd, LTV_DATACTL, -+ LTV_DS_SAME | LTV_CHS_480 -+ | LTV_DF_RGB | LTV_RGB_BGR); -+ ret |= ltv350qv_write_reg(lcd, LTV_ENTRY_MODE, -+ LTV_VSPL_ACTIVE_LOW -+ | LTV_HSPL_ACTIVE_LOW -+ | LTV_DPL_SAMPLE_RISING -+ | LTV_EPL_ACTIVE_LOW -+ | LTV_SS_RIGHT_TO_LEFT); -+ ret |= ltv350qv_write_reg(lcd, LTV_GATECTL1, LTV_CLW(3)); -+ ret |= ltv350qv_write_reg(lcd, LTV_GATECTL2, -+ LTV_NW_INV_1LINE | LTV_FWI(3)); -+ ret |= ltv350qv_write_reg(lcd, LTV_VBP, 0x000a); -+ ret |= ltv350qv_write_reg(lcd, LTV_HBP, 0x0021); -+ ret |= ltv350qv_write_reg(lcd, LTV_SOTCTL, LTV_SDT(3) | LTV_EQ(0)); -+ ret |= ltv350qv_write_reg(lcd, LTV_GAMMA(0), 0x0103); -+ ret |= ltv350qv_write_reg(lcd, LTV_GAMMA(1), 0x0301); -+ ret |= ltv350qv_write_reg(lcd, LTV_GAMMA(2), 0x1f0f); -+ ret |= ltv350qv_write_reg(lcd, LTV_GAMMA(3), 0x1f0f); -+ ret |= ltv350qv_write_reg(lcd, LTV_GAMMA(4), 0x0707); -+ ret |= ltv350qv_write_reg(lcd, LTV_GAMMA(5), 0x0307); -+ ret |= ltv350qv_write_reg(lcd, LTV_GAMMA(6), 0x0707); -+ ret |= ltv350qv_write_reg(lcd, LTV_GAMMA(7), 0x0000); -+ ret |= ltv350qv_write_reg(lcd, LTV_GAMMA(8), 0x0004); -+ ret |= ltv350qv_write_reg(lcd, LTV_GAMMA(9), 0x0000); -+ if (ret) -+ goto err_settings; -+ -+ /* Wait more than 2 frames */ -+ msleep(20); -+ -+ /* Display On Sequence */ -+ ret = ltv350qv_write_reg(lcd, LTV_PWRCTL1, -+ LTV_VCOM_DISABLE | LTV_VCOMOUT_ENABLE -+ | LTV_POWER_ON | LTV_DRIVE_CURRENT(5) -+ | LTV_SUPPLY_CURRENT(5)); -+ ret |= ltv350qv_write_reg(lcd, LTV_GATECTL2, -+ LTV_NW_INV_1LINE | LTV_DSC | LTV_FWI(3)); -+ if (ret) -+ goto err_disp_on; -+ -+ /* Display should now be ON. Phew. */ -+ return 0; -+ -+err_disp_on: -+ /* -+ * Try to recover. Error handling probably isn't very useful -+ * at this point, just make a best effort to switch the panel -+ * off. -+ */ -+ ltv350qv_write_reg(lcd, LTV_PWRCTL1, -+ LTV_VCOM_DISABLE | LTV_DRIVE_CURRENT(5) -+ | LTV_SUPPLY_CURRENT(5)); -+ ltv350qv_write_reg(lcd, LTV_GATECTL2, -+ LTV_NW_INV_1LINE | LTV_FWI(3)); -+err_settings: -+err_power2: -+err_power1: -+ ltv350qv_write_reg(lcd, LTV_PWRCTL2, 0x0000); -+ msleep(1); -+err: -+ ltv350qv_write_reg(lcd, LTV_PWRCTL1, LTV_VCOM_DISABLE); -+ return -EIO; -+} -+ -+static int ltv350qv_power_off(struct ltv350qv *lcd) -+{ -+ int ret; -+ -+ /* Display Off Sequence */ -+ ret = ltv350qv_write_reg(lcd, LTV_PWRCTL1, -+ LTV_VCOM_DISABLE -+ | LTV_DRIVE_CURRENT(5) -+ | LTV_SUPPLY_CURRENT(5)); -+ ret |= ltv350qv_write_reg(lcd, LTV_GATECTL2, -+ LTV_NW_INV_1LINE | LTV_FWI(3)); -+ -+ /* Power down setting 1 */ -+ ret |= ltv350qv_write_reg(lcd, LTV_PWRCTL2, 0x0000); -+ -+ /* Wait at least 1 ms */ -+ msleep(1); -+ -+ /* Power down setting 2 */ -+ ret |= ltv350qv_write_reg(lcd, LTV_PWRCTL1, LTV_VCOM_DISABLE); -+ -+ /* -+ * No point in trying to recover here. If we can't switch the -+ * panel off, what are we supposed to do other than inform the -+ * user about the failure? -+ */ -+ if (ret) -+ return -EIO; -+ -+ /* Display power should now be OFF */ -+ return 0; -+} -+ -+static int ltv350qv_power(struct ltv350qv *lcd, int power) -+{ -+ int ret = 0; -+ -+ if (POWER_IS_ON(power) && !POWER_IS_ON(lcd->power)) -+ ret = ltv350qv_power_on(lcd); -+ else if (!POWER_IS_ON(power) && POWER_IS_ON(lcd->power)) -+ ret = ltv350qv_power_off(lcd); -+ -+ if (!ret) -+ lcd->power = power; -+ -+ return ret; -+} -+ -+static int ltv350qv_set_power(struct lcd_device *ld, int power) -+{ -+ struct ltv350qv *lcd; -+ -+ lcd = class_get_devdata(&ld->class_dev); -+ return ltv350qv_power(lcd, power); -+} -+ -+static int ltv350qv_get_power(struct lcd_device *ld) -+{ -+ struct ltv350qv *lcd; -+ -+ lcd = class_get_devdata(&ld->class_dev); -+ return lcd->power; -+} -+ -+static struct lcd_ops ltv_ops = { -+ .get_power = ltv350qv_get_power, -+ .set_power = ltv350qv_set_power, -+}; -+ -+static int __devinit ltv350qv_probe(struct spi_device *spi) -+{ -+ struct ltv350qv *lcd; -+ struct lcd_device *ld; -+ int ret; -+ -+ lcd = kzalloc(sizeof(struct ltv350qv), GFP_KERNEL); -+ if (!lcd) -+ return -ENOMEM; -+ -+ lcd->spi = spi; -+ lcd->power = FB_BLANK_POWERDOWN; -+ lcd->buffer = kzalloc(8, GFP_KERNEL); -+ -+ ld = lcd_device_register("ltv350qv", lcd, <v_ops); -+ if (IS_ERR(ld)) { -+ ret = PTR_ERR(ld); -+ goto out_free_lcd; -+ } -+ lcd->ld = ld; -+ -+ ret = ltv350qv_power(lcd, FB_BLANK_UNBLANK); -+ if (ret) -+ goto out_unregister; -+ -+ dev_set_drvdata(&spi->dev, lcd); -+ -+ return 0; -+ -+out_unregister: -+ lcd_device_unregister(ld); -+out_free_lcd: -+ kfree(lcd); -+ return ret; -+} -+ -+static int __devexit ltv350qv_remove(struct spi_device *spi) -+{ -+ struct ltv350qv *lcd = dev_get_drvdata(&spi->dev); -+ -+ ltv350qv_power(lcd, FB_BLANK_POWERDOWN); -+ lcd_device_unregister(lcd->ld); -+ kfree(lcd); -+ -+ return 0; -+} -+ -+#ifdef CONFIG_PM -+static int ltv350qv_suspend(struct spi_device *spi, -+ pm_message_t state, u32 level) -+{ -+ struct ltv350qv *lcd = dev_get_drvdata(&spi->dev); -+ -+ if (level == SUSPEND_POWER_DOWN) -+ return ltv350qv_power(lcd, FB_BLANK_POWERDOWN); -+ -+ return 0; -+} -+ -+static int ltv350qv_resume(struct spi_device *spi, u32 level) -+{ -+ struct ltv350qv *lcd = dev_get_drvdata(&spi->dev); -+ -+ if (level == RESUME_POWER_ON) -+ return ltv350qv_power(lcd, FB_BLANK_UNBLANK); -+ -+ return 0; -+} -+#else -+#define ltv350qv_suspend NULL -+#define ltv350qv_resume NULL -+#endif -+ -+/* Power down all displays on reboot, poweroff or halt */ -+static void ltv350qv_shutdown(struct spi_device *spi) -+{ -+ struct ltv350qv *lcd = dev_get_drvdata(&spi->dev); -+ -+ ltv350qv_power(lcd, FB_BLANK_POWERDOWN); -+} -+ -+static struct spi_driver ltv350qv_driver = { -+ .driver = { -+ .name = "ltv350qv", -+ .bus = &spi_bus_type, -+ .owner = THIS_MODULE, -+ }, -+ -+ .probe = ltv350qv_probe, -+ .remove = __devexit_p(ltv350qv_remove), -+ .shutdown = ltv350qv_shutdown, -+ .suspend = ltv350qv_suspend, -+ .resume = ltv350qv_resume, -+}; -+ -+static int __init ltv350qv_init(void) -+{ -+ return spi_register_driver(<v350qv_driver); -+} -+ -+static void __exit ltv350qv_exit(void) -+{ -+ spi_unregister_driver(<v350qv_driver); -+} -+module_init(ltv350qv_init); -+module_exit(ltv350qv_exit); -+ -+MODULE_AUTHOR("Haavard Skinnemoen <hskinnemoen@atmel.com>"); -+MODULE_DESCRIPTION("Samsung LTV350QV LCD Driver"); -+MODULE_LICENSE("GPL"); -diff --git a/drivers/video/backlight/ltv350qv.h b/drivers/video/backlight/ltv350qv.h -new file mode 100644 -index 0000000..189112e ---- /dev/null -+++ b/drivers/video/backlight/ltv350qv.h -@@ -0,0 +1,95 @@ -+/* -+ * Register definitions for Samsung LTV350QV Quarter VGA LCD Panel -+ * -+ * Copyright (C) 2006, 2007 Atmel Corporation -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 as -+ * published by the Free Software Foundation. -+ */ -+#ifndef __LTV350QV_H -+#define __LTV350QV_H -+ -+#define LTV_OPC_INDEX 0x74 -+#define LTV_OPC_DATA 0x76 -+ -+#define LTV_ID 0x00 /* ID Read */ -+#define LTV_IFCTL 0x01 /* Display Interface Control */ -+#define LTV_DATACTL 0x02 /* Display Data Control */ -+#define LTV_ENTRY_MODE 0x03 /* Entry Mode */ -+#define LTV_GATECTL1 0x04 /* Gate Control 1 */ -+#define LTV_GATECTL2 0x05 /* Gate Control 2 */ -+#define LTV_VBP 0x06 /* Vertical Back Porch */ -+#define LTV_HBP 0x07 /* Horizontal Back Porch */ -+#define LTV_SOTCTL 0x08 /* Source Output Timing Control */ -+#define LTV_PWRCTL1 0x09 /* Power Control 1 */ -+#define LTV_PWRCTL2 0x0a /* Power Control 2 */ -+#define LTV_GAMMA(x) (0x10 + (x)) /* Gamma control */ -+ -+/* Bit definitions for LTV_IFCTL */ -+#define LTV_IM (1 << 15) -+#define LTV_NMD (1 << 14) -+#define LTV_SSMD (1 << 13) -+#define LTV_REV (1 << 7) -+#define LTV_NL(x) (((x) & 0x001f) << 0) -+ -+/* Bit definitions for LTV_DATACTL */ -+#define LTV_DS_SAME (0 << 12) -+#define LTV_DS_D_TO_S (1 << 12) -+#define LTV_DS_S_TO_D (2 << 12) -+#define LTV_CHS_384 (0 << 9) -+#define LTV_CHS_480 (1 << 9) -+#define LTV_CHS_492 (2 << 9) -+#define LTV_DF_RGB (0 << 6) -+#define LTV_DF_RGBX (1 << 6) -+#define LTV_DF_XRGB (2 << 6) -+#define LTV_RGB_RGB (0 << 2) -+#define LTV_RGB_BGR (1 << 2) -+#define LTV_RGB_GRB (2 << 2) -+#define LTV_RGB_RBG (3 << 2) -+ -+/* Bit definitions for LTV_ENTRY_MODE */ -+#define LTV_VSPL_ACTIVE_LOW (0 << 15) -+#define LTV_VSPL_ACTIVE_HIGH (1 << 15) -+#define LTV_HSPL_ACTIVE_LOW (0 << 14) -+#define LTV_HSPL_ACTIVE_HIGH (1 << 14) -+#define LTV_DPL_SAMPLE_RISING (0 << 13) -+#define LTV_DPL_SAMPLE_FALLING (1 << 13) -+#define LTV_EPL_ACTIVE_LOW (0 << 12) -+#define LTV_EPL_ACTIVE_HIGH (1 << 12) -+#define LTV_SS_LEFT_TO_RIGHT (0 << 8) -+#define LTV_SS_RIGHT_TO_LEFT (1 << 8) -+#define LTV_STB (1 << 1) -+ -+/* Bit definitions for LTV_GATECTL1 */ -+#define LTV_CLW(x) (((x) & 0x0007) << 12) -+#define LTV_GAON (1 << 5) -+#define LTV_SDR (1 << 3) -+ -+/* Bit definitions for LTV_GATECTL2 */ -+#define LTV_NW_INV_FRAME (0 << 14) -+#define LTV_NW_INV_1LINE (1 << 14) -+#define LTV_NW_INV_2LINE (2 << 14) -+#define LTV_DSC (1 << 12) -+#define LTV_GIF (1 << 8) -+#define LTV_FHN (1 << 7) -+#define LTV_FTI(x) (((x) & 0x0003) << 4) -+#define LTV_FWI(x) (((x) & 0x0003) << 0) -+ -+/* Bit definitions for LTV_SOTCTL */ -+#define LTV_SDT(x) (((x) & 0x0007) << 10) -+#define LTV_EQ(x) (((x) & 0x0007) << 2) -+ -+/* Bit definitions for LTV_PWRCTL1 */ -+#define LTV_VCOM_DISABLE (1 << 14) -+#define LTV_VCOMOUT_ENABLE (1 << 11) -+#define LTV_POWER_ON (1 << 9) -+#define LTV_DRIVE_CURRENT(x) (((x) & 0x0007) << 4) /* 0=off, 5=max */ -+#define LTV_SUPPLY_CURRENT(x) (((x) & 0x0007) << 0) /* 0=off, 5=max */ -+ -+/* Bit definitions for LTV_PWRCTL2 */ -+#define LTV_VCOML_ENABLE (1 << 13) -+#define LTV_VCOML_VOLTAGE(x) (((x) & 0x001f) << 8) /* 0=1V, 31=-1V */ -+#define LTV_VCOMH_VOLTAGE(x) (((x) & 0x001f) << 0) /* 0=3V, 31=4.5V */ -+ -+#endif /* __LTV350QV_H */ -diff --git a/include/asm-arm/arch-at91/board.h b/include/asm-arm/arch-at91/board.h -index 0ce6ee9..d96b10f 100644 ---- a/include/asm-arm/arch-at91/board.h -+++ b/include/asm-arm/arch-at91/board.h -@@ -64,6 +64,7 @@ extern void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data) - - /* Ethernet (EMAC & MACB) */ - struct at91_eth_data { -+ u32 phy_mask; - u8 phy_irq_pin; /* PHY IRQ */ - u8 is_rmii; /* using RMII interface? */ - }; -diff --git a/include/asm-avr32/arch-at32ap/board.h b/include/asm-avr32/arch-at32ap/board.h -index 9fd2e32..9b36eb8 100644 ---- a/include/asm-avr32/arch-at32ap/board.h -+++ b/include/asm-avr32/arch-at32ap/board.h -@@ -6,6 +6,8 @@ - - #include <linux/types.h> - -+#define GPIO_PIN_NONE (-1) -+ - /* Add basic devices: system manager, interrupt controller, portmuxes, etc. */ - void at32_add_system_devices(void); - -@@ -21,6 +23,7 @@ void at32_map_usart(unsigned int hw_id, unsigned int line); - struct platform_device *at32_add_device_usart(unsigned int id); - - struct eth_platform_data { -+ u32 phy_mask; - u8 is_rmii; - }; - struct platform_device * -@@ -30,9 +33,41 @@ struct spi_board_info; - struct platform_device * - at32_add_device_spi(unsigned int id, struct spi_board_info *b, unsigned int n); - -+struct platform_device *at32_add_device_twi(unsigned int id); -+ -+struct mci_platform_data { -+ int detect_pin; -+ int wp_pin; -+}; -+struct platform_device * -+at32_add_device_mci(unsigned int id, struct mci_platform_data *data); -+ -+struct usba_platform_data { -+ int vbus_pin; -+}; -+struct platform_device * -+at32_add_device_usba(unsigned int id, struct usba_platform_data *data); -+ - struct atmel_lcdfb_info; - struct platform_device * - at32_add_device_lcdc(unsigned int id, struct atmel_lcdfb_info *data, - unsigned long fbmem_start, unsigned long fbmem_len); - -+struct platform_device *at32_add_device_ac97c(unsigned int id); -+struct platform_device *at32_add_device_abdac(unsigned int id); -+ -+/* depending on what's hooked up, not all SSC pins will be used */ -+#define ATMEL_SSC_TK 0x01 -+#define ATMEL_SSC_TF 0x02 -+#define ATMEL_SSC_TD 0x04 -+#define ATMEL_SSC_TX (ATMEL_SSC_TK | ATMEL_SSC_TF | ATMEL_SSC_TD) -+ -+#define ATMEL_SSC_RK 0x10 -+#define ATMEL_SSC_RF 0x20 -+#define ATMEL_SSC_RD 0x40 -+#define ATMEL_SSC_RX (ATMEL_SSC_RK | ATMEL_SSC_RF | ATMEL_SSC_RD) -+ -+struct platform_device * -+at32_add_device_ssc(unsigned int id, unsigned int flags); -+ - #endif /* __ASM_ARCH_BOARD_H */ -diff --git a/include/asm-avr32/arch-at32ap/portmux.h b/include/asm-avr32/arch-at32ap/portmux.h -index 9930871..135e034 100644 ---- a/include/asm-avr32/arch-at32ap/portmux.h -+++ b/include/asm-avr32/arch-at32ap/portmux.h -@@ -19,10 +19,23 @@ - #define AT32_GPIOF_OUTPUT 0x00000002 /* (OUT) Enable output driver */ - #define AT32_GPIOF_HIGH 0x00000004 /* (OUT) Set output high */ - #define AT32_GPIOF_DEGLITCH 0x00000008 /* (IN) Filter glitches */ -+#define AT32_GPIOF_MULTIDRV 0x00000010 /* Enable multidriver option */ - - void at32_select_periph(unsigned int pin, unsigned int periph, - unsigned long flags); - void at32_select_gpio(unsigned int pin, unsigned long flags); - void at32_reserve_pin(unsigned int pin); - -+#ifdef CONFIG_GPIO_DEV -+ -+/* Gang allocators and accessors; used by the GPIO /dev driver */ -+int at32_gpio_port_is_valid(unsigned int port); -+int at32_select_gpio_pins(unsigned int port, u32 pins, u32 oe_mask); -+void at32_deselect_pins(unsigned int port, u32 pins); -+ -+u32 at32_gpio_get_value_multiple(unsigned int port, u32 pins); -+void at32_gpio_set_value_multiple(unsigned int port, u32 value, u32 mask); -+ -+#endif /* CONFIG_GPIO_DEV */ -+ - #endif /* __ASM_ARCH_PORTMUX_H__ */ -diff --git a/include/asm-avr32/arch-at32ap/sm.h b/include/asm-avr32/arch-at32ap/sm.h -deleted file mode 100644 -index 265a9ea..0000000 ---- a/include/asm-avr32/arch-at32ap/sm.h -+++ /dev/null -@@ -1,27 +0,0 @@ --/* -- * AT32 System Manager interface. -- * -- * Copyright (C) 2006 Atmel Corporation -- * -- * This program is free software; you can redistribute it and/or modify -- * it under the terms of the GNU General Public License version 2 as -- * published by the Free Software Foundation. -- */ --#ifndef __ASM_AVR32_AT32_SM_H__ --#define __ASM_AVR32_AT32_SM_H__ -- --struct irq_chip; --struct platform_device; -- --struct at32_sm { -- spinlock_t lock; -- void __iomem *regs; -- struct irq_chip *eim_chip; -- unsigned int eim_first_irq; -- struct platform_device *pdev; --}; -- --extern struct platform_device at32_sm_device; --extern struct at32_sm system_manager; -- --#endif /* __ASM_AVR32_AT32_SM_H__ */ -diff --git a/include/asm-avr32/dma-controller.h b/include/asm-avr32/dma-controller.h -new file mode 100644 -index 0000000..56a4965 ---- /dev/null -+++ b/include/asm-avr32/dma-controller.h -@@ -0,0 +1,166 @@ -+/* -+ * Copyright (C) 2005-2006 Atmel Corporation -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 as -+ * published by the Free Software Foundation. -+ */ -+#ifndef __ASM_AVR32_DMA_CONTROLLER_H -+#define __ASM_AVR32_DMA_CONTROLLER_H -+ -+#include <linux/device.h> -+ -+#define DMA_DIR_MEM_TO_MEM 0x0000 -+#define DMA_DIR_MEM_TO_PERIPH 0x0001 -+#define DMA_DIR_PERIPH_TO_MEM 0x0002 -+#define DMA_DIR_PERIPH_TO_PERIPH 0x0003 -+ -+#define DMA_WIDTH_8BIT 0 -+#define DMA_WIDTH_16BIT 1 -+#define DMA_WIDTH_32BIT 2 -+ -+struct dma_request { -+ struct dma_controller *dmac; -+ struct list_head list; -+ -+ unsigned short channel; -+ -+ void (*xfer_complete)(struct dma_request *req); -+ void (*block_complete)(struct dma_request *req); -+ void (*error)(struct dma_request *req); -+}; -+ -+struct dma_request_sg { -+ struct dma_request req; -+ -+ int nr_sg; -+ struct scatterlist *sg; -+ unsigned long block_size; -+ unsigned int nr_blocks; -+ -+ dma_addr_t data_reg; -+ unsigned short periph_id; -+ -+ unsigned char direction; -+ unsigned char width; -+}; -+#define to_dma_request_sg(_req) \ -+ container_of(_req, struct dma_request_sg, req) -+ -+struct dma_request_cyclic { -+ struct dma_request req; -+ -+ int periods; -+ unsigned long buffer_size; -+ -+ dma_addr_t buffer_start; -+ dma_addr_t data_reg; -+ -+ unsigned short periph_id; -+ unsigned char direction; -+ unsigned char width; -+ -+ void *dev_id; -+}; -+#define to_dma_request_cyclic(_req) \ -+ container_of(_req, struct dma_request_cyclic, req) -+ -+struct dma_request_memcpy { -+ struct dma_request req; -+ -+ dma_addr_t src_addr; -+ unsigned int src_width; -+ unsigned int src_stride; -+ -+ dma_addr_t dst_addr; -+ unsigned int dst_width; -+ unsigned int dst_stride; -+ -+ size_t length; -+ -+ unsigned short src_reverse:1; -+ unsigned short dst_reverse:1; -+}; -+#define to_dma_request_memcpy(_req) \ -+ container_of(_req, struct dma_request_memcpy, req) -+ -+struct dma_controller { -+ struct list_head list; -+ int id; -+ struct device *dev; -+ -+ int (*alloc_channel)(struct dma_controller *dmac); -+ void (*release_channel)(struct dma_controller *dmac, -+ int channel); -+ int (*prepare_request_sg)(struct dma_controller *dmac, -+ struct dma_request_sg *req); -+ int (*prepare_request_cyclic)(struct dma_controller *dmac, -+ struct dma_request_cyclic *req); -+ int (*prepare_request_memcpy)(struct dma_controller *dmac, -+ struct dma_request_memcpy *req); -+ int (*start_request)(struct dma_controller *dmac, -+ unsigned int channel); -+ int (*stop_request)(struct dma_controller *dmac, -+ unsigned int channel); -+ dma_addr_t (*get_current_pos)(struct dma_controller *dmac, -+ unsigned int channel); -+}; -+ -+static inline int -+dma_alloc_channel(struct dma_controller *dmac) -+{ -+ return dmac->alloc_channel(dmac); -+} -+ -+static inline void -+dma_release_channel(struct dma_controller *dmac, int chan) -+{ -+ dmac->release_channel(dmac, chan); -+} -+ -+static inline int -+dma_prepare_request_sg(struct dma_controller *dmac, -+ struct dma_request_sg *req) -+{ -+ return dmac->prepare_request_sg(dmac, req); -+} -+ -+static inline int -+dma_prepare_request_cyclic(struct dma_controller *dmac, -+ struct dma_request_cyclic *req) -+{ -+ return dmac->prepare_request_cyclic(dmac, req); -+} -+ -+static inline int -+dma_prepare_request_memcpy(struct dma_controller *dmac, -+ struct dma_request_memcpy *req) -+{ -+ return dmac->prepare_request_memcpy(dmac, req); -+} -+ -+static inline int -+dma_start_request(struct dma_controller *dmac, -+ unsigned int channel) -+{ -+ return dmac->start_request(dmac, channel); -+} -+ -+static inline int -+dma_stop_request(struct dma_controller *dmac, -+ unsigned int channel) -+{ -+ return dmac->stop_request(dmac, channel); -+} -+ -+static inline dma_addr_t -+dma_get_current_pos(struct dma_controller *dmac, -+ unsigned int channel) -+{ -+ return dmac->get_current_pos(dmac, channel); -+} -+ -+extern int register_dma_controller(struct dma_controller *dmac); -+extern struct dma_controller *find_dma_controller(int id); -+ -+#endif /* __ASM_AVR32_DMA_CONTROLLER_H */ -diff --git a/include/asm-avr32/io.h b/include/asm-avr32/io.h -index e30d4b3..64bb92b 100644 ---- a/include/asm-avr32/io.h -+++ b/include/asm-avr32/io.h -@@ -255,6 +255,8 @@ static inline void memset_io(volatile void __iomem *addr, unsigned char val, - memset((void __force *)addr, val, count); - } - -+#define mmiowb() -+ - #define IO_SPACE_LIMIT 0xffffffff - - extern void __iomem *__ioremap(unsigned long offset, size_t size, -diff --git a/include/asm-avr32/pgalloc.h b/include/asm-avr32/pgalloc.h -index bb82e70..0e680f4 100644 ---- a/include/asm-avr32/pgalloc.h -+++ b/include/asm-avr32/pgalloc.h -@@ -27,13 +27,7 @@ static __inline__ void pmd_populate(struct mm_struct *mm, pmd_t *pmd, - */ - static __inline__ pgd_t *pgd_alloc(struct mm_struct *mm) - { -- unsigned int pgd_size = (USER_PTRS_PER_PGD * sizeof(pgd_t)); -- pgd_t *pgd = kmalloc(pgd_size, GFP_KERNEL); -- -- if (pgd) -- memset(pgd, 0, pgd_size); -- -- return pgd; -+ return kcalloc(USER_PTRS_PER_PGD, sizeof(pgd_t), GFP_KERNEL); - } - - static inline void pgd_free(pgd_t *pgd) -@@ -44,18 +38,9 @@ static inline void pgd_free(pgd_t *pgd) - static inline pte_t *pte_alloc_one_kernel(struct mm_struct *mm, - unsigned long address) - { -- int count = 0; - pte_t *pte; - -- do { -- pte = (pte_t *) __get_free_page(GFP_KERNEL | __GFP_REPEAT); -- if (pte) -- clear_page(pte); -- else { -- current->state = TASK_UNINTERRUPTIBLE; -- schedule_timeout(HZ); -- } -- } while (!pte && (count++ < 10)); -+ pte = (pte_t *)get_zeroed_page(GFP_KERNEL | __GFP_REPEAT); - - return pte; - } -@@ -63,18 +48,9 @@ static inline pte_t *pte_alloc_one_kernel(struct mm_struct *mm, - static inline struct page *pte_alloc_one(struct mm_struct *mm, - unsigned long address) - { -- int count = 0; - struct page *pte; - -- do { -- pte = alloc_pages(GFP_KERNEL, 0); -- if (pte) -- clear_page(page_address(pte)); -- else { -- current->state = TASK_UNINTERRUPTIBLE; -- schedule_timeout(HZ); -- } -- } while (!pte && (count++ < 10)); -+ pte = alloc_page(GFP_KERNEL | __GFP_REPEAT | __GFP_ZERO); - - return pte; - } -diff --git a/include/asm-avr32/pgtable.h b/include/asm-avr32/pgtable.h -index f6cc2b0..66e58d7 100644 ---- a/include/asm-avr32/pgtable.h -+++ b/include/asm-avr32/pgtable.h -@@ -32,8 +32,6 @@ - #define USER_PTRS_PER_PGD (TASK_SIZE / PGDIR_SIZE) - #define FIRST_USER_ADDRESS 0 - --#define PTE_PHYS_MASK 0x1ffff000 -- - #ifndef __ASSEMBLY__ - extern pgd_t swapper_pg_dir[PTRS_PER_PGD]; - extern void paging_init(void); -@@ -293,7 +291,7 @@ static inline pte_t pte_mkyoung(pte_t pte) - * trivial. - */ - #define pages_to_mb(x) ((x) >> (20-PAGE_SHIFT)) --#define pte_page(x) phys_to_page(pte_val(x) & PTE_PHYS_MASK) -+#define pte_page(x) (pfn_to_page(pte_pfn(x))) - - /* - * Mark the prot value as uncacheable and unbufferable -diff --git a/include/asm-avr32/unaligned.h b/include/asm-avr32/unaligned.h -index 3042723..36f5fd4 100644 ---- a/include/asm-avr32/unaligned.h -+++ b/include/asm-avr32/unaligned.h -@@ -7,19 +7,10 @@ - * words, but halfwords must be halfword-aligned, and doublewords must - * be word-aligned. - * -- * TODO: Make all this CPU-specific and optimize. -+ * However, swapped word loads must be word-aligned so we can't -+ * optimize word loads in general. - */ - --#include <linux/string.h> -- --/* Use memmove here, so gcc does not insert a __builtin_memcpy. */ -- --#define get_unaligned(ptr) \ -- ({ __typeof__(*(ptr)) __tmp; memmove(&__tmp, (ptr), sizeof(*(ptr))); __tmp; }) -- --#define put_unaligned(val, ptr) \ -- ({ __typeof__(*(ptr)) __tmp = (val); \ -- memmove((ptr), &__tmp, sizeof(*(ptr))); \ -- (void)0; }) -+#include <asm-generic/unaligned.h> - - #endif /* __ASM_AVR32_UNALIGNED_H */ -diff --git a/include/linux/atmel-ssc.h b/include/linux/atmel-ssc.h -new file mode 100644 -index 0000000..0602339 ---- /dev/null -+++ b/include/linux/atmel-ssc.h -@@ -0,0 +1,312 @@ -+#ifndef __INCLUDE_ATMEL_SSC_H -+#define __INCLUDE_ATMEL_SSC_H -+ -+#include <linux/platform_device.h> -+#include <linux/list.h> -+ -+struct ssc_device { -+ struct list_head list; -+ void __iomem *regs; -+ struct platform_device *pdev; -+ struct clk *clk; -+ int user; -+ int irq; -+}; -+ -+struct ssc_device * __must_check ssc_request(unsigned int ssc_num); -+void ssc_free(struct ssc_device *ssc); -+ -+/* SSC register offsets */ -+ -+/* SSC Control Register */ -+#define SSC_CR 0x00000000 -+#define SSC_CR_RXDIS_SIZE 1 -+#define SSC_CR_RXDIS_OFFSET 1 -+#define SSC_CR_RXEN_SIZE 1 -+#define SSC_CR_RXEN_OFFSET 0 -+#define SSC_CR_SWRST_SIZE 1 -+#define SSC_CR_SWRST_OFFSET 15 -+#define SSC_CR_TXDIS_SIZE 1 -+#define SSC_CR_TXDIS_OFFSET 9 -+#define SSC_CR_TXEN_SIZE 1 -+#define SSC_CR_TXEN_OFFSET 8 -+ -+/* SSC Clock Mode Register */ -+#define SSC_CMR 0x00000004 -+#define SSC_CMR_DIV_SIZE 12 -+#define SSC_CMR_DIV_OFFSET 0 -+ -+/* SSC Receive Clock Mode Register */ -+#define SSC_RCMR 0x00000010 -+#define SSC_RCMR_CKG_SIZE 2 -+#define SSC_RCMR_CKG_OFFSET 6 -+#define SSC_RCMR_CKI_SIZE 1 -+#define SSC_RCMR_CKI_OFFSET 5 -+#define SSC_RCMR_CKO_SIZE 3 -+#define SSC_RCMR_CKO_OFFSET 2 -+#define SSC_RCMR_CKS_SIZE 2 -+#define SSC_RCMR_CKS_OFFSET 0 -+#define SSC_RCMR_PERIOD_SIZE 8 -+#define SSC_RCMR_PERIOD_OFFSET 24 -+#define SSC_RCMR_START_SIZE 4 -+#define SSC_RCMR_START_OFFSET 8 -+#define SSC_RCMR_STOP_SIZE 1 -+#define SSC_RCMR_STOP_OFFSET 12 -+#define SSC_RCMR_STTDLY_SIZE 8 -+#define SSC_RCMR_STTDLY_OFFSET 16 -+ -+/* SSC Receive Frame Mode Register */ -+#define SSC_RFMR 0x00000014 -+#define SSC_RFMR_DATLEN_SIZE 5 -+#define SSC_RFMR_DATLEN_OFFSET 0 -+#define SSC_RFMR_DATNB_SIZE 4 -+#define SSC_RFMR_DATNB_OFFSET 8 -+#define SSC_RFMR_FSEDGE_SIZE 1 -+#define SSC_RFMR_FSEDGE_OFFSET 24 -+#define SSC_RFMR_FSLEN_SIZE 4 -+#define SSC_RFMR_FSLEN_OFFSET 16 -+#define SSC_RFMR_FSOS_SIZE 4 -+#define SSC_RFMR_FSOS_OFFSET 20 -+#define SSC_RFMR_LOOP_SIZE 1 -+#define SSC_RFMR_LOOP_OFFSET 5 -+#define SSC_RFMR_MSBF_SIZE 1 -+#define SSC_RFMR_MSBF_OFFSET 7 -+ -+/* SSC Transmit Clock Mode Register */ -+#define SSC_TCMR 0x00000018 -+#define SSC_TCMR_CKG_SIZE 2 -+#define SSC_TCMR_CKG_OFFSET 6 -+#define SSC_TCMR_CKI_SIZE 1 -+#define SSC_TCMR_CKI_OFFSET 5 -+#define SSC_TCMR_CKO_SIZE 3 -+#define SSC_TCMR_CKO_OFFSET 2 -+#define SSC_TCMR_CKS_SIZE 2 -+#define SSC_TCMR_CKS_OFFSET 0 -+#define SSC_TCMR_PERIOD_SIZE 8 -+#define SSC_TCMR_PERIOD_OFFSET 24 -+#define SSC_TCMR_START_SIZE 4 -+#define SSC_TCMR_START_OFFSET 8 -+#define SSC_TCMR_STTDLY_SIZE 8 -+#define SSC_TCMR_STTDLY_OFFSET 16 -+ -+/* SSC Transmit Frame Mode Register */ -+#define SSC_TFMR 0x0000001c -+#define SSC_TFMR_DATDEF_SIZE 1 -+#define SSC_TFMR_DATDEF_OFFSET 5 -+#define SSC_TFMR_DATLEN_SIZE 5 -+#define SSC_TFMR_DATLEN_OFFSET 0 -+#define SSC_TFMR_DATNB_SIZE 4 -+#define SSC_TFMR_DATNB_OFFSET 8 -+#define SSC_TFMR_FSDEN_SIZE 1 -+#define SSC_TFMR_FSDEN_OFFSET 23 -+#define SSC_TFMR_FSEDGE_SIZE 1 -+#define SSC_TFMR_FSEDGE_OFFSET 24 -+#define SSC_TFMR_FSLEN_SIZE 4 -+#define SSC_TFMR_FSLEN_OFFSET 16 -+#define SSC_TFMR_FSOS_SIZE 3 -+#define SSC_TFMR_FSOS_OFFSET 20 -+#define SSC_TFMR_MSBF_SIZE 1 -+#define SSC_TFMR_MSBF_OFFSET 7 -+ -+/* SSC Receive Hold Register */ -+#define SSC_RHR 0x00000020 -+#define SSC_RHR_RDAT_SIZE 32 -+#define SSC_RHR_RDAT_OFFSET 0 -+ -+/* SSC Transmit Hold Register */ -+#define SSC_THR 0x00000024 -+#define SSC_THR_TDAT_SIZE 32 -+#define SSC_THR_TDAT_OFFSET 0 -+ -+/* SSC Receive Sync. Holding Register */ -+#define SSC_RSHR 0x00000030 -+#define SSC_RSHR_RSDAT_SIZE 16 -+#define SSC_RSHR_RSDAT_OFFSET 0 -+ -+/* SSC Transmit Sync. Holding Register */ -+#define SSC_TSHR 0x00000034 -+#define SSC_TSHR_TSDAT_SIZE 16 -+#define SSC_TSHR_RSDAT_OFFSET 0 -+ -+/* SSC Receive Compare 0 Register */ -+#define SSC_RC0R 0x00000038 -+#define SSC_RC0R_CP0_SIZE 16 -+#define SSC_RC0R_CP0_OFFSET 0 -+ -+/* SSC Receive Compare 1 Register */ -+#define SSC_RC1R 0x0000003c -+#define SSC_RC1R_CP1_SIZE 16 -+#define SSC_RC1R_CP1_OFFSET 0 -+ -+/* SSC Status Register */ -+#define SSC_SR 0x00000040 -+#define SSC_SR_CP0_SIZE 1 -+#define SSC_SR_CP0_OFFSET 8 -+#define SSC_SR_CP1_SIZE 1 -+#define SSC_SR_CP1_OFFSET 9 -+#define SSC_SR_ENDRX_SIZE 1 -+#define SSC_SR_ENDRX_OFFSET 6 -+#define SSC_SR_ENDTX_SIZE 1 -+#define SSC_SR_ENDTX_OFFSET 2 -+#define SSC_SR_OVRUN_SIZE 1 -+#define SSC_SR_OVRUN_OFFSET 5 -+#define SSC_SR_RXBUFF_SIZE 1 -+#define SSC_SR_RXBUFF_OFFSET 7 -+#define SSC_SR_RXEN_SIZE 1 -+#define SSC_SR_RXEN_OFFSET 17 -+#define SSC_SR_RXRDY_SIZE 1 -+#define SSC_SR_RXRDY_OFFSET 4 -+#define SSC_SR_RXSYN_SIZE 1 -+#define SSC_SR_RXSYN_OFFSET 11 -+#define SSC_SR_TXBUFE_SIZE 1 -+#define SSC_SR_TXBUFE_OFFSET 3 -+#define SSC_SR_TXEMPTY_SIZE 1 -+#define SSC_SR_TXEMPTY_OFFSET 1 -+#define SSC_SR_TXEN_SIZE 1 -+#define SSC_SR_TXEN_OFFSET 16 -+#define SSC_SR_TXRDY_SIZE 1 -+#define SSC_SR_TXRDY_OFFSET 0 -+#define SSC_SR_TXSYN_SIZE 1 -+#define SSC_SR_TXSYN_OFFSET 10 -+ -+/* SSC Interrupt Enable Register */ -+#define SSC_IER 0x00000044 -+#define SSC_IER_CP0_SIZE 1 -+#define SSC_IER_CP0_OFFSET 8 -+#define SSC_IER_CP1_SIZE 1 -+#define SSC_IER_CP1_OFFSET 9 -+#define SSC_IER_ENDRX_SIZE 1 -+#define SSC_IER_ENDRX_OFFSET 6 -+#define SSC_IER_ENDTX_SIZE 1 -+#define SSC_IER_ENDTX_OFFSET 2 -+#define SSC_IER_OVRUN_SIZE 1 -+#define SSC_IER_OVRUN_OFFSET 5 -+#define SSC_IER_RXBUFF_SIZE 1 -+#define SSC_IER_RXBUFF_OFFSET 7 -+#define SSC_IER_RXRDY_SIZE 1 -+#define SSC_IER_RXRDY_OFFSET 4 -+#define SSC_IER_RXSYN_SIZE 1 -+#define SSC_IER_RXSYN_OFFSET 11 -+#define SSC_IER_TXBUFE_SIZE 1 -+#define SSC_IER_TXBUFE_OFFSET 3 -+#define SSC_IER_TXEMPTY_SIZE 1 -+#define SSC_IER_TXEMPTY_OFFSET 1 -+#define SSC_IER_TXRDY_SIZE 1 -+#define SSC_IER_TXRDY_OFFSET 0 -+#define SSC_IER_TXSYN_SIZE 1 -+#define SSC_IER_TXSYN_OFFSET 10 -+ -+/* SSC Interrupt Disable Register */ -+#define SSC_IDR 0x00000048 -+#define SSC_IDR_CP0_SIZE 1 -+#define SSC_IDR_CP0_OFFSET 8 -+#define SSC_IDR_CP1_SIZE 1 -+#define SSC_IDR_CP1_OFFSET 9 -+#define SSC_IDR_ENDRX_SIZE 1 -+#define SSC_IDR_ENDRX_OFFSET 6 -+#define SSC_IDR_ENDTX_SIZE 1 -+#define SSC_IDR_ENDTX_OFFSET 2 -+#define SSC_IDR_OVRUN_SIZE 1 -+#define SSC_IDR_OVRUN_OFFSET 5 -+#define SSC_IDR_RXBUFF_SIZE 1 -+#define SSC_IDR_RXBUFF_OFFSET 7 -+#define SSC_IDR_RXRDY_SIZE 1 -+#define SSC_IDR_RXRDY_OFFSET 4 -+#define SSC_IDR_RXSYN_SIZE 1 -+#define SSC_IDR_RXSYN_OFFSET 11 -+#define SSC_IDR_TXBUFE_SIZE 1 -+#define SSC_IDR_TXBUFE_OFFSET 3 -+#define SSC_IDR_TXEMPTY_SIZE 1 -+#define SSC_IDR_TXEMPTY_OFFSET 1 -+#define SSC_IDR_TXRDY_SIZE 1 -+#define SSC_IDR_TXRDY_OFFSET 0 -+#define SSC_IDR_TXSYN_SIZE 1 -+#define SSC_IDR_TXSYN_OFFSET 10 -+ -+/* SSC Interrupt Mask Register */ -+#define SSC_IMR 0x0000004c -+#define SSC_IMR_CP0_SIZE 1 -+#define SSC_IMR_CP0_OFFSET 8 -+#define SSC_IMR_CP1_SIZE 1 -+#define SSC_IMR_CP1_OFFSET 9 -+#define SSC_IMR_ENDRX_SIZE 1 -+#define SSC_IMR_ENDRX_OFFSET 6 -+#define SSC_IMR_ENDTX_SIZE 1 -+#define SSC_IMR_ENDTX_OFFSET 2 -+#define SSC_IMR_OVRUN_SIZE 1 -+#define SSC_IMR_OVRUN_OFFSET 5 -+#define SSC_IMR_RXBUFF_SIZE 1 -+#define SSC_IMR_RXBUFF_OFFSET 7 -+#define SSC_IMR_RXRDY_SIZE 1 -+#define SSC_IMR_RXRDY_OFFSET 4 -+#define SSC_IMR_RXSYN_SIZE 1 -+#define SSC_IMR_RXSYN_OFFSET 11 -+#define SSC_IMR_TXBUFE_SIZE 1 -+#define SSC_IMR_TXBUFE_OFFSET 3 -+#define SSC_IMR_TXEMPTY_SIZE 1 -+#define SSC_IMR_TXEMPTY_OFFSET 1 -+#define SSC_IMR_TXRDY_SIZE 1 -+#define SSC_IMR_TXRDY_OFFSET 0 -+#define SSC_IMR_TXSYN_SIZE 1 -+#define SSC_IMR_TXSYN_OFFSET 10 -+ -+/* SSC PDC Receive Pointer Register */ -+#define SSC_PDC_RPR 0x00000100 -+ -+/* SSC PDC Receive Counter Register */ -+#define SSC_PDC_RCR 0x00000104 -+ -+/* SSC PDC Transmit Pointer Register */ -+#define SSC_PDC_TPR 0x00000108 -+ -+/* SSC PDC Receive Next Pointer Register */ -+#define SSC_PDC_RNPR 0x00000110 -+ -+/* SSC PDC Receive Next Counter Register */ -+#define SSC_PDC_RNCR 0x00000114 -+ -+/* SSC PDC Transmit Counter Register */ -+#define SSC_PDC_TCR 0x0000010c -+ -+/* SSC PDC Transmit Next Pointer Register */ -+#define SSC_PDC_TNPR 0x00000118 -+ -+/* SSC PDC Transmit Next Counter Register */ -+#define SSC_PDC_TNCR 0x0000011c -+ -+/* SSC PDC Transfer Control Register */ -+#define SSC_PDC_PTCR 0x00000120 -+#define SSC_PDC_PTCR_RXTDIS_SIZE 1 -+#define SSC_PDC_PTCR_RXTDIS_OFFSET 1 -+#define SSC_PDC_PTCR_RXTEN_SIZE 1 -+#define SSC_PDC_PTCR_RXTEN_OFFSET 0 -+#define SSC_PDC_PTCR_TXTDIS_SIZE 1 -+#define SSC_PDC_PTCR_TXTDIS_OFFSET 9 -+#define SSC_PDC_PTCR_TXTEN_SIZE 1 -+#define SSC_PDC_PTCR_TXTEN_OFFSET 8 -+ -+/* SSC PDC Transfer Status Register */ -+#define SSC_PDC_PTSR 0x00000124 -+#define SSC_PDC_PTSR_RXTEN_SIZE 1 -+#define SSC_PDC_PTSR_RXTEN_OFFSET 0 -+#define SSC_PDC_PTSR_TXTEN_SIZE 1 -+#define SSC_PDC_PTSR_TXTEN_OFFSET 8 -+ -+/* Bit manipulation macros */ -+#define SSC_BIT(name) \ -+ (1 << SSC_##name##_OFFSET) -+#define SSC_BF(name, value) \ -+ (((value) & ((1 << SSC_##name##_SIZE) - 1)) \ -+ << SSC_##name##_OFFSET) -+#define SSC_BFEXT(name, value) \ -+ (((value) >> SSC_##name##_OFFSET) \ -+ & ((1 << SSC_##name##_SIZE) - 1)) -+#define SSC_BFINS(name, value, old) \ -+ (((old) & ~(((1 << SSC_##name##_SIZE) - 1) \ -+ << SSC_##name##_OFFSET)) | SSC_BF(name, value)) -+ -+/* Register access macros */ -+#define ssc_readl(base, reg) __raw_readl(base + SSC_##reg) -+#define ssc_writel(base, reg, value) __raw_writel((value), base + SSC_##reg) -+ -+#endif /* __INCLUDE_ATMEL_SSC_H */ -diff --git a/include/linux/gpio_mouse.h b/include/linux/gpio_mouse.h -new file mode 100644 -index 0000000..44ed7aa ---- /dev/null -+++ b/include/linux/gpio_mouse.h -@@ -0,0 +1,61 @@ -+/* -+ * Driver for simulating a mouse on GPIO lines. -+ * -+ * Copyright (C) 2007 Atmel Corporation -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 as -+ * published by the Free Software Foundation. -+ */ -+ -+#ifndef _GPIO_MOUSE_H -+#define _GPIO_MOUSE_H -+ -+#define GPIO_MOUSE_POLARITY_ACT_HIGH 0x00 -+#define GPIO_MOUSE_POLARITY_ACT_LOW 0x01 -+ -+#define GPIO_MOUSE_PIN_UP 0 -+#define GPIO_MOUSE_PIN_DOWN 1 -+#define GPIO_MOUSE_PIN_LEFT 2 -+#define GPIO_MOUSE_PIN_RIGHT 3 -+#define GPIO_MOUSE_PIN_BLEFT 4 -+#define GPIO_MOUSE_PIN_BMIDDLE 5 -+#define GPIO_MOUSE_PIN_BRIGHT 6 -+#define GPIO_MOUSE_PIN_MAX 7 -+ -+/** -+ * struct gpio_mouse_platform_data -+ * @scan_ms: integer in ms specifying the scan periode. -+ * @polarity: Pin polarity, active high or low. -+ * @up: GPIO line for up value. -+ * @down: GPIO line for down value. -+ * @left: GPIO line for left value. -+ * @right: GPIO line for right value. -+ * @bleft: GPIO line for left button. -+ * @bmiddle: GPIO line for middle button. -+ * @bright: GPIO line for right button. -+ * -+ * This struct must be added to the platform_device in the board code. -+ * It is used by the gpio_mouse driver to setup GPIO lines and to -+ * calculate mouse movement. -+ */ -+struct gpio_mouse_platform_data { -+ int scan_ms; -+ int polarity; -+ -+ union { -+ struct { -+ int up; -+ int down; -+ int left; -+ int right; -+ -+ int bleft; -+ int bmiddle; -+ int bright; -+ }; -+ int pins[GPIO_MOUSE_PIN_MAX]; -+ }; -+}; -+ -+#endif /* _GPIO_MOUSE_H */ -diff --git a/include/linux/leds.h b/include/linux/leds.h -index 88afcef..059abfe 100644 ---- a/include/linux/leds.h -+++ b/include/linux/leds.h -@@ -110,4 +110,18 @@ extern void ledtrig_ide_activity(void); - #define ledtrig_ide_activity() do {} while(0) - #endif - -+/* For the leds-gpio driver */ -+struct gpio_led { -+ const char *name; -+ char *default_trigger; -+ unsigned gpio; -+ u8 active_low; -+}; -+ -+struct gpio_led_platform_data { -+ int num_leds; -+ struct gpio_led *leds; -+}; -+ -+ - #endif /* __LINUX_LEDS_H_INCLUDED */ -diff --git a/include/linux/spi/at73c213.h b/include/linux/spi/at73c213.h -new file mode 100644 -index 0000000..0f20a70 ---- /dev/null -+++ b/include/linux/spi/at73c213.h -@@ -0,0 +1,25 @@ -+/* -+ * Board-specific data used to set up AT73c213 audio DAC driver. -+ */ -+ -+#ifndef __LINUX_SPI_AT73C213_H -+#define __LINUX_SPI_AT73C213_H -+ -+/** -+ * at73c213_board_info - how the external DAC is wired to the device. -+ * -+ * @ssc_id: SSC platform_driver id the DAC shall use to stream the audio. -+ * @dac_clk: the external clock used to provide master clock to the DAC. -+ * @shortname: a short discription for the DAC, seen by userspace tools. -+ * -+ * This struct contains the configuration of the hardware connection to the -+ * external DAC. The DAC needs a master clock and a I2S audio stream. It also -+ * provides a name which is used to identify it in userspace tools. -+ */ -+struct at73c213_board_info { -+ int ssc_id; -+ struct clk *dac_clk; -+ char shortname[32]; -+}; -+ -+#endif /* __LINUX_SPI_AT73C213_H */ -diff --git a/include/linux/usb/Kbuild b/include/linux/usb/Kbuild -index 43f160c..6ce42bf 100644 ---- a/include/linux/usb/Kbuild -+++ b/include/linux/usb/Kbuild -@@ -1,5 +1,6 @@ - unifdef-y += audio.h - unifdef-y += cdc.h - unifdef-y += ch9.h -+unifdef-y += gadgetfs.h - unifdef-y += midi.h - -diff --git a/include/linux/usb/gadgetfs.h b/include/linux/usb/gadgetfs.h -new file mode 100644 -index 0000000..e8654c3 ---- /dev/null -+++ b/include/linux/usb/gadgetfs.h -@@ -0,0 +1,81 @@ -+#ifndef __LINUX_USB_GADGETFS_H -+#define __LINUX_USB_GADGETFS_H -+ -+#include <asm/types.h> -+#include <asm/ioctl.h> -+ -+#include <linux/usb/ch9.h> -+ -+/* -+ * Filesystem based user-mode API to USB Gadget controller hardware -+ * -+ * Other than ep0 operations, most things are done by read() and write() -+ * on endpoint files found in one directory. They are configured by -+ * writing descriptors, and then may be used for normal stream style -+ * i/o requests. When ep0 is configured, the device can enumerate; -+ * when it's closed, the device disconnects from usb. Operations on -+ * ep0 require ioctl() operations. -+ * -+ * Configuration and device descriptors get written to /dev/gadget/$CHIP, -+ * which may then be used to read usb_gadgetfs_event structs. The driver -+ * may activate endpoints as it handles SET_CONFIGURATION setup events, -+ * or earlier; writing endpoint descriptors to /dev/gadget/$ENDPOINT -+ * then performing data transfers by reading or writing. -+ */ -+ -+/* -+ * Events are delivered on the ep0 file descriptor, when the user mode driver -+ * reads from this file descriptor after writing the descriptors. Don't -+ * stop polling this descriptor. -+ */ -+ -+enum usb_gadgetfs_event_type { -+ GADGETFS_NOP = 0, -+ -+ GADGETFS_CONNECT, -+ GADGETFS_DISCONNECT, -+ GADGETFS_SETUP, -+ GADGETFS_SUSPEND, -+ // and likely more ! -+}; -+ -+/* NOTE: this structure must stay the same size and layout on -+ * both 32-bit and 64-bit kernels. -+ */ -+struct usb_gadgetfs_event { -+ union { -+ // NOP, DISCONNECT, SUSPEND: nothing -+ // ... some hardware can't report disconnection -+ -+ // CONNECT: just the speed -+ enum usb_device_speed speed; -+ -+ // SETUP: packet; DATA phase i/o precedes next event -+ // (setup.bmRequestType & USB_DIR_IN) flags direction -+ // ... includes SET_CONFIGURATION, SET_INTERFACE -+ struct usb_ctrlrequest setup; -+ } u; -+ enum usb_gadgetfs_event_type type; -+}; -+ -+ -+/* endpoint ioctls */ -+ -+/* IN transfers may be reported to the gadget driver as complete -+ * when the fifo is loaded, before the host reads the data; -+ * OUT transfers may be reported to the host's "client" driver as -+ * complete when they're sitting in the FIFO unread. -+ * THIS returns how many bytes are "unclaimed" in the endpoint fifo -+ * (needed for precise fault handling, when the hardware allows it) -+ */ -+#define GADGETFS_FIFO_STATUS _IO('g',1) -+ -+/* discards any unclaimed data in the fifo. */ -+#define GADGETFS_FIFO_FLUSH _IO('g',2) -+ -+/* resets endpoint halt+toggle; used to implement set_interface. -+ * some hardware (like pxa2xx) can't support this. -+ */ -+#define GADGETFS_CLEAR_HALT _IO('g',3) -+ -+#endif /* __LINUX_USB_GADGETFS_H */ -diff --git a/include/linux/usb_gadgetfs.h b/include/linux/usb_gadgetfs.h -deleted file mode 100644 -index 8086d5a..0000000 ---- a/include/linux/usb_gadgetfs.h -+++ /dev/null -@@ -1,75 +0,0 @@ -- --#include <asm/types.h> --#include <asm/ioctl.h> -- --#include <linux/usb/ch9.h> -- --/* -- * Filesystem based user-mode API to USB Gadget controller hardware -- * -- * Almost everything can be done with only read and write operations, -- * on endpoint files found in one directory. They are configured by -- * writing descriptors, and then may be used for normal stream style -- * i/o requests. When ep0 is configured, the device can enumerate; -- * when it's closed, the device disconnects from usb. -- * -- * Configuration and device descriptors get written to /dev/gadget/$CHIP, -- * which may then be used to read usb_gadgetfs_event structs. The driver -- * may activate endpoints as it handles SET_CONFIGURATION setup events, -- * or earlier; writing endpoint descriptors to /dev/gadget/$ENDPOINT -- * then performing data transfers by reading or writing. -- */ -- --/* -- * Events are delivered on the ep0 file descriptor, if the user mode driver -- * reads from this file descriptor after writing the descriptors. Don't -- * stop polling this descriptor, if you write that kind of driver. -- */ -- --enum usb_gadgetfs_event_type { -- GADGETFS_NOP = 0, -- -- GADGETFS_CONNECT, -- GADGETFS_DISCONNECT, -- GADGETFS_SETUP, -- GADGETFS_SUSPEND, -- // and likely more ! --}; -- --struct usb_gadgetfs_event { -- enum usb_gadgetfs_event_type type; -- union { -- // NOP, DISCONNECT, SUSPEND: nothing -- // ... some hardware can't report disconnection -- -- // CONNECT: just the speed -- enum usb_device_speed speed; -- -- // SETUP: packet; DATA phase i/o precedes next event -- // (setup.bmRequestType & USB_DIR_IN) flags direction -- // ... includes SET_CONFIGURATION, SET_INTERFACE -- struct usb_ctrlrequest setup; -- } u; --}; -- -- --/* endpoint ioctls */ -- --/* IN transfers may be reported to the gadget driver as complete -- * when the fifo is loaded, before the host reads the data; -- * OUT transfers may be reported to the host's "client" driver as -- * complete when they're sitting in the FIFO unread. -- * THIS returns how many bytes are "unclaimed" in the endpoint fifo -- * (needed for precise fault handling, when the hardware allows it) -- */ --#define GADGETFS_FIFO_STATUS _IO('g',1) -- --/* discards any unclaimed data in the fifo. */ --#define GADGETFS_FIFO_FLUSH _IO('g',2) -- --/* resets endpoint halt+toggle; used to implement set_interface. -- * some hardware (like pxa2xx) can't support this. -- */ --#define GADGETFS_CLEAR_HALT _IO('g',3) -- -- -diff --git a/init/do_mounts.c b/init/do_mounts.c -index 46fe407..efc134c 100644 ---- a/init/do_mounts.c -+++ b/init/do_mounts.c -@@ -25,6 +25,7 @@ int __initdata rd_doload; /* 1 = load RAM disk, 0 = don't load */ - int root_mountflags = MS_RDONLY | MS_SILENT; - char * __initdata root_device_name; - static char __initdata saved_root_name[64]; -+int __initdata root_wait; - - dev_t ROOT_DEV; - -@@ -216,6 +217,14 @@ static int __init root_dev_setup(char *line) - - __setup("root=", root_dev_setup); - -+static int __init rootwait_setup(char *line) -+{ -+ root_wait = simple_strtol(line,NULL,0); -+ return 1; -+} -+ -+__setup("rootwait=", rootwait_setup); -+ - static char * __initdata root_mount_data; - static int __init root_data_setup(char *str) - { -@@ -438,11 +447,24 @@ void __init prepare_namespace(void) - root_device_name += 5; - } - -- is_floppy = MAJOR(ROOT_DEV) == FLOPPY_MAJOR; -- - if (initrd_load()) - goto out; - -+ /* wait for any asynchronous scanning to complete */ -+ if ((ROOT_DEV == 0) && root_wait) { -+ printk(KERN_INFO "Waiting for root device %s...\n", -+ saved_root_name); -+ do { -+ while (driver_probe_done() != 0) -+ msleep(100); -+ ROOT_DEV = name_to_dev_t(saved_root_name); -+ if (ROOT_DEV == 0) -+ msleep(100); -+ } while (ROOT_DEV == 0); -+ } -+ -+ is_floppy = MAJOR(ROOT_DEV) == FLOPPY_MAJOR; -+ - if (is_floppy && rd_doload && rd_load_disk(0)) - ROOT_DEV = Root_RAM0; - -diff --git a/scripts/checkstack.pl b/scripts/checkstack.pl -index f7844f6..6631586 100755 ---- a/scripts/checkstack.pl -+++ b/scripts/checkstack.pl -@@ -12,6 +12,7 @@ - # sh64 port by Paul Mundt - # Random bits by Matt Mackall <mpm@selenic.com> - # M68k port by Geert Uytterhoeven and Andreas Schwab -+# AVR32 port by Haavard Skinnemoen <hskinnemoen@atmel.com> - # - # Usage: - # objdump -d vmlinux | stackcheck.pl [arch] -@@ -37,6 +38,10 @@ my (@stack, $re, $x, $xs); - if ($arch eq 'arm') { - #c0008ffc: e24dd064 sub sp, sp, #100 ; 0x64 - $re = qr/.*sub.*sp, sp, #(([0-9]{2}|[3-9])[0-9]{2})/o; -+ } elsif ($arch eq 'avr32') { -+ #8000008a: 20 1d sub sp,4 -+ #80000ca8: fa cd 05 b0 sub sp,sp,1456 -+ $re = qr/^.*sub.*sp.*,([0-9]{1,8})/o; - } elsif ($arch =~ /^i[3456]86$/) { - #c0105234: 81 ec ac 05 00 00 sub $0x5ac,%esp - $re = qr/^.*[as][du][db] \$(0x$x{1,8}),\%esp$/o; -diff --git a/scripts/kallsyms.c b/scripts/kallsyms.c -index 8b809b2..9ff8502 100644 ---- a/scripts/kallsyms.c -+++ b/scripts/kallsyms.c -@@ -378,6 +378,17 @@ static void build_initial_tok_table(void) - table_cnt = pos; - } - -+static void *find_token(unsigned char *str, int len, unsigned char *token) -+{ -+ int i; -+ -+ for (i = 0; i < len - 1; i++) { -+ if (str[i] == token[0] && str[i+1] == token[1]) -+ return &str[i]; -+ } -+ return NULL; -+} -+ - /* replace a given token in all the valid symbols. Use the sampled symbols - * to update the counts */ - static void compress_symbols(unsigned char *str, int idx) -@@ -391,7 +402,7 @@ static void compress_symbols(unsigned char *str, int idx) - p1 = table[i].sym; - - /* find the token on the symbol */ -- p2 = memmem(p1, len, str, 2); -+ p2 = find_token(p1, len, str); - if (!p2) continue; - - /* decrease the counts for this symbol's tokens */ -@@ -410,7 +421,7 @@ static void compress_symbols(unsigned char *str, int idx) - if (size < 2) break; - - /* find the token on the symbol */ -- p2 = memmem(p1, size, str, 2); -+ p2 = find_token(p1, size, str); - - } while (p2); - -diff --git a/scripts/mod/modpost.h b/scripts/mod/modpost.h -index 0858caa..91ed78f 100644 ---- a/scripts/mod/modpost.h -+++ b/scripts/mod/modpost.h -@@ -9,6 +9,11 @@ - #include <unistd.h> - #include <elf.h> - -+#ifdef __APPLE__ -+typedef uint16_t Elf32_Section; -+typedef uint16_t Elf64_Section; -+#endif -+ - #include "elfconfig.h" - - #if KERNEL_ELFCLASS == ELFCLASS32 -diff --git a/sound/Kconfig b/sound/Kconfig -index 9ea4738..f0551c8 100644 ---- a/sound/Kconfig -+++ b/sound/Kconfig -@@ -63,6 +63,12 @@ source "sound/aoa/Kconfig" - - source "sound/arm/Kconfig" - -+source "sound/avr32/Kconfig" -+ -+if SPI -+source "sound/spi/Kconfig" -+endif -+ - source "sound/mips/Kconfig" - - # the following will depend on the order of config. -diff --git a/sound/Makefile b/sound/Makefile -index b7c7fb7..25f6042 100644 ---- a/sound/Makefile -+++ b/sound/Makefile -@@ -5,7 +5,9 @@ obj-$(CONFIG_SOUND) += soundcore.o - obj-$(CONFIG_SOUND_PRIME) += sound_firmware.o - obj-$(CONFIG_SOUND_PRIME) += oss/ - obj-$(CONFIG_DMASOUND) += oss/ --obj-$(CONFIG_SND) += core/ i2c/ drivers/ isa/ pci/ ppc/ arm/ synth/ usb/ sparc/ parisc/ pcmcia/ mips/ soc/ -+obj-$(CONFIG_SND) += core/ i2c/ drivers/ isa/ pci/ ppc/ arm/ avr32/ synth/ usb/ \ -+ sparc/ spi/ parisc/ pcmcia/ mips/ soc/ -+ - obj-$(CONFIG_SND_AOA) += aoa/ - - # This one must be compilable even if sound is configured out -diff --git a/sound/avr32/Kconfig b/sound/avr32/Kconfig -new file mode 100644 -index 0000000..17d1d91 ---- /dev/null -+++ b/sound/avr32/Kconfig -@@ -0,0 +1,11 @@ -+menu "AVR32 devices" -+ depends on SND != n && AVR32 -+ -+config SND_ATMEL_AC97 -+ tristate "Atmel AC97 Controller Driver" -+ select SND_PCM -+ select SND_AC97_CODEC -+ help -+ ALSA sound driver for the Atmel AC97 controller. -+ -+endmenu -diff --git a/sound/avr32/Makefile b/sound/avr32/Makefile -new file mode 100644 -index 0000000..5d87d0e ---- /dev/null -+++ b/sound/avr32/Makefile -@@ -0,0 +1,3 @@ -+snd-atmel-ac97-objs := ac97c.o -+ -+obj-$(CONFIG_SND_ATMEL_AC97) += snd-atmel-ac97.o -diff --git a/sound/avr32/ac97c.c b/sound/avr32/ac97c.c -new file mode 100644 -index 0000000..0ec0b1c ---- /dev/null -+++ b/sound/avr32/ac97c.c -@@ -0,0 +1,914 @@ -+/* -+ * Driver for the Atmel AC97 controller -+ * -+ * Copyright (C) 2005-2007 Atmel Corporation -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 as published by -+ * the Free Software Foundation. -+ */ -+#include <linux/clk.h> -+#include <linux/delay.h> -+#include <linux/dma-mapping.h> -+#include <linux/init.h> -+#include <linux/interrupt.h> -+#include <linux/module.h> -+#include <linux/platform_device.h> -+#include <linux/mutex.h> -+#include <linux/io.h> -+ -+#include <sound/driver.h> -+#include <sound/core.h> -+#include <sound/initval.h> -+#include <sound/pcm.h> -+#include <sound/pcm_params.h> -+#include <sound/ac97_codec.h> -+#include <sound/memalloc.h> -+ -+#include <asm/dma-controller.h> -+ -+#include "ac97c.h" -+ -+/* Serialize access to opened */ -+static DEFINE_MUTEX(opened_mutex); -+ -+struct atmel_ac97_dma_info { -+ struct dma_request_cyclic req_tx; -+ struct dma_request_cyclic req_rx; -+ unsigned short rx_periph_id; -+ unsigned short tx_periph_id; -+}; -+ -+struct atmel_ac97 { -+ /* Serialize access to opened */ -+ spinlock_t lock; -+ void __iomem *regs; -+ struct snd_pcm_substream *playback_substream; -+ struct snd_pcm_substream *capture_substream; -+ struct snd_card *card; -+ struct snd_pcm *pcm; -+ struct snd_ac97 *ac97; -+ struct snd_ac97_bus *ac97_bus; -+ int opened; -+ int period; -+ u64 cur_format; -+ unsigned int cur_rate; -+ struct clk *mck; -+ struct platform_device *pdev; -+ struct atmel_ac97_dma_info dma; -+}; -+ -+#define get_chip(card) ((struct atmel_ac97 *)(card)->private_data) -+ -+#define ac97c_writel(chip, reg, val) \ -+ __raw_writel((val), (chip)->regs + AC97C_##reg) -+#define ac97c_readl(chip, reg) \ -+ __raw_readl((chip)->regs + AC97C_##reg) -+ -+/* -+ * PCM part -+ */ -+static struct snd_pcm_hardware snd_atmel_ac97_playback_hw = { -+ .info = (SNDRV_PCM_INFO_INTERLEAVED -+ | SNDRV_PCM_INFO_MMAP -+ | SNDRV_PCM_INFO_MMAP_VALID -+ | SNDRV_PCM_INFO_BLOCK_TRANSFER -+ | SNDRV_PCM_INFO_JOINT_DUPLEX), -+ .formats = (SNDRV_PCM_FMTBIT_S16_BE -+ | SNDRV_PCM_FMTBIT_S16_LE), -+ .rates = (SNDRV_PCM_RATE_CONTINUOUS), -+ .rate_min = 4000, -+ .rate_max = 48000, -+ .channels_min = 1, -+ .channels_max = 6, -+ .buffer_bytes_max = 64*1024, -+ .period_bytes_min = 512, -+ .period_bytes_max = 4095, -+ .periods_min = 8, -+ .periods_max = 1024, -+}; -+ -+static struct snd_pcm_hardware snd_atmel_ac97_capture_hw = { -+ .info = (SNDRV_PCM_INFO_INTERLEAVED -+ | SNDRV_PCM_INFO_MMAP -+ | SNDRV_PCM_INFO_MMAP_VALID -+ | SNDRV_PCM_INFO_BLOCK_TRANSFER -+ | SNDRV_PCM_INFO_JOINT_DUPLEX), -+ .formats = (SNDRV_PCM_FMTBIT_S16_BE -+ | SNDRV_PCM_FMTBIT_S16_LE), -+ .rates = (SNDRV_PCM_RATE_CONTINUOUS), -+ .rate_min = 4000, -+ .rate_max = 48000, -+ .channels_min = 1, -+ .channels_max = 2, -+ .buffer_bytes_max = 64*1024, -+ .period_bytes_min = 512, -+ .period_bytes_max = 4095, -+ .periods_min = 8, -+ .periods_max = 1024, -+}; -+ -+/* -+ * PCM functions -+ */ -+static int -+snd_atmel_ac97_playback_open(struct snd_pcm_substream *substream) -+{ -+ struct atmel_ac97 *chip = snd_pcm_substream_chip(substream); -+ struct snd_pcm_runtime *runtime = substream->runtime; -+ -+ mutex_lock(&opened_mutex); -+ chip->opened++; -+ runtime->hw = snd_atmel_ac97_playback_hw; -+ if (chip->cur_rate) { -+ runtime->hw.rate_min = chip->cur_rate; -+ runtime->hw.rate_max = chip->cur_rate; -+ } -+ if (chip->cur_format) -+ runtime->hw.formats = (1ULL << chip->cur_format); -+ mutex_unlock(&opened_mutex); -+ chip->playback_substream = substream; -+ chip->period = 0; -+ return 0; -+} -+ -+static int -+snd_atmel_ac97_capture_open(struct snd_pcm_substream *substream) -+{ -+ struct atmel_ac97 *chip = snd_pcm_substream_chip(substream); -+ struct snd_pcm_runtime *runtime = substream->runtime; -+ -+ mutex_lock(&opened_mutex); -+ chip->opened++; -+ runtime->hw = snd_atmel_ac97_capture_hw; -+ if (chip->cur_rate) { -+ runtime->hw.rate_min = chip->cur_rate; -+ runtime->hw.rate_max = chip->cur_rate; -+ } -+ if (chip->cur_format) -+ runtime->hw.formats = (1ULL << chip->cur_format); -+ mutex_unlock(&opened_mutex); -+ chip->capture_substream = substream; -+ chip->period = 0; -+ return 0; -+} -+ -+static int snd_atmel_ac97_playback_close(struct snd_pcm_substream *substream) -+{ -+ struct atmel_ac97 *chip = snd_pcm_substream_chip(substream); -+ mutex_lock(&opened_mutex); -+ chip->opened--; -+ if (!chip->opened) { -+ chip->cur_rate = 0; -+ chip->cur_format = 0; -+ } -+ mutex_unlock(&opened_mutex); -+ return 0; -+} -+ -+static int snd_atmel_ac97_capture_close(struct snd_pcm_substream *substream) -+{ -+ struct atmel_ac97 *chip = snd_pcm_substream_chip(substream); -+ mutex_lock(&opened_mutex); -+ chip->opened--; -+ if (!chip->opened) { -+ chip->cur_rate = 0; -+ chip->cur_format = 0; -+ } -+ mutex_unlock(&opened_mutex); -+ return 0; -+} -+ -+static int -+snd_atmel_ac97_playback_hw_params(struct snd_pcm_substream *substream, -+ struct snd_pcm_hw_params *hw_params) -+{ -+ struct atmel_ac97 *chip = snd_pcm_substream_chip(substream); -+ int err; -+ -+ err = snd_pcm_lib_malloc_pages(substream, -+ params_buffer_bytes(hw_params)); -+ if (err < 0) -+ return err; -+ -+ /* Set restrictions to params */ -+ mutex_lock(&opened_mutex); -+ chip->cur_rate = params_rate(hw_params); -+ chip->cur_format = params_format(hw_params); -+ mutex_unlock(&opened_mutex); -+ -+ return 0; -+} -+ -+static int -+snd_atmel_ac97_capture_hw_params(struct snd_pcm_substream *substream, -+ struct snd_pcm_hw_params *hw_params) -+{ -+ struct atmel_ac97 *chip = snd_pcm_substream_chip(substream); -+ int err; -+ -+ err = snd_pcm_lib_malloc_pages(substream, -+ params_buffer_bytes(hw_params)); -+ if (err < 0) -+ return err; -+ -+ /* Set restrictions to params */ -+ mutex_lock(&opened_mutex); -+ chip->cur_rate = params_rate(hw_params); -+ chip->cur_format = params_format(hw_params); -+ mutex_unlock(&opened_mutex); -+ -+ return 0; -+} -+ -+static int snd_atmel_ac97_playback_hw_free(struct snd_pcm_substream *substream) -+{ -+ return snd_pcm_lib_free_pages(substream); -+} -+ -+static int snd_atmel_ac97_capture_hw_free(struct snd_pcm_substream *substream) -+{ -+ -+ return snd_pcm_lib_free_pages(substream); -+} -+ -+static int snd_atmel_ac97_playback_prepare(struct snd_pcm_substream *substream) -+{ -+ struct atmel_ac97 *chip = snd_pcm_substream_chip(substream); -+ struct platform_device *pdev = chip->pdev; -+ struct snd_pcm_runtime *runtime = substream->runtime; -+ int block_size = frames_to_bytes(runtime, runtime->period_size); -+ unsigned long word = 0; -+ unsigned long buffer_size = 0; -+ -+ dma_sync_single_for_device(&pdev->dev, runtime->dma_addr, -+ block_size * 2, DMA_TO_DEVICE); -+ -+ /* Assign slots to channels */ -+ switch (substream->runtime->channels) { -+ case 1: -+ word |= AC97C_CH_ASSIGN(PCM_LEFT, A); -+ break; -+ case 2: -+ /* Assign Left and Right slot to Channel A */ -+ word |= AC97C_CH_ASSIGN(PCM_LEFT, A) -+ | AC97C_CH_ASSIGN(PCM_RIGHT, A); -+ break; -+ default: -+ /* TODO: support more than two channels */ -+ return -EINVAL; -+ break; -+ } -+ ac97c_writel(chip, OCA, word); -+ -+ /* Configure sample format and size */ -+ word = AC97C_CMR_PDCEN | AC97C_CMR_SIZE_16; -+ -+ switch (runtime->format) { -+ case SNDRV_PCM_FORMAT_S16_LE: -+ word |= AC97C_CMR_CEM_LITTLE; -+ break; -+ case SNDRV_PCM_FORMAT_S16_BE: /* fall through */ -+ default: -+ word &= ~AC97C_CMR_CEM_LITTLE; -+ break; -+ } -+ -+ ac97c_writel(chip, CAMR, word); -+ -+ /* Set variable rate if needed */ -+ if (runtime->rate != 48000) { -+ word = ac97c_readl(chip, MR); -+ word |= AC97C_MR_VRA; -+ ac97c_writel(chip, MR, word); -+ } else { -+ /* Clear Variable Rate Bit */ -+ word = ac97c_readl(chip, MR); -+ word &= ~AC97C_MR_VRA; -+ ac97c_writel(chip, MR, word); -+ } -+ -+ /* Set rate */ -+ snd_ac97_set_rate(chip->ac97, AC97_PCM_FRONT_DAC_RATE, runtime->rate); -+ -+ buffer_size = frames_to_bytes(runtime, runtime->period_size) * -+ runtime->periods; -+ -+ chip->dma.req_tx.buffer_size = buffer_size; -+ chip->dma.req_tx.periods = runtime->periods; -+ -+ BUG_ON(chip->dma.req_tx.buffer_size != -+ (chip->dma.req_tx.periods * -+ frames_to_bytes(runtime, runtime->period_size))); -+ -+ chip->dma.req_tx.buffer_start = runtime->dma_addr; -+ chip->dma.req_tx.data_reg = (dma_addr_t)(chip->regs + AC97C_CATHR + 2); -+ chip->dma.req_tx.periph_id = chip->dma.tx_periph_id; -+ chip->dma.req_tx.direction = DMA_DIR_MEM_TO_PERIPH; -+ chip->dma.req_tx.width = DMA_WIDTH_16BIT; -+ chip->dma.req_tx.dev_id = chip; -+ -+ return 0; -+} -+ -+static int snd_atmel_ac97_capture_prepare(struct snd_pcm_substream *substream) -+{ -+ struct atmel_ac97 *chip = snd_pcm_substream_chip(substream); -+ struct platform_device *pdev = chip->pdev; -+ struct snd_pcm_runtime *runtime = substream->runtime; -+ int block_size = frames_to_bytes(runtime, runtime->period_size); -+ unsigned long word = 0; -+ unsigned long buffer_size = 0; -+ -+ dma_sync_single_for_device(&pdev->dev, runtime->dma_addr, -+ block_size * 2, DMA_FROM_DEVICE); -+ -+ /* Assign slots to channels */ -+ switch (substream->runtime->channels) { -+ case 1: -+ word |= AC97C_CH_ASSIGN(PCM_LEFT, A); -+ break; -+ case 2: -+ /* Assign Left and Right slot to Channel A */ -+ word |= AC97C_CH_ASSIGN(PCM_LEFT, A) -+ | AC97C_CH_ASSIGN(PCM_RIGHT, A); -+ break; -+ default: -+ /* TODO: support more than two channels */ -+ return -EINVAL; -+ break; -+ } -+ ac97c_writel(chip, ICA, word); -+ -+ /* Configure sample format and size */ -+ word = AC97C_CMR_PDCEN | AC97C_CMR_SIZE_16; -+ -+ switch (runtime->format) { -+ case SNDRV_PCM_FORMAT_S16_LE: -+ word |= AC97C_CMR_CEM_LITTLE; -+ break; -+ case SNDRV_PCM_FORMAT_S16_BE: -+ default: -+ word &= ~(AC97C_CMR_CEM_LITTLE); -+ break; -+ } -+ -+ ac97c_writel(chip, CAMR, word); -+ -+ /* Set variable rate if needed */ -+ if (runtime->rate != 48000) { -+ word = ac97c_readl(chip, MR); -+ word |= AC97C_MR_VRA; -+ ac97c_writel(chip, MR, word); -+ } else { -+ /* Clear Variable Rate Bit */ -+ word = ac97c_readl(chip, MR); -+ word &= ~(AC97C_MR_VRA); -+ ac97c_writel(chip, MR, word); -+ } -+ -+ /* Set rate */ -+ snd_ac97_set_rate(chip->ac97, AC97_PCM_LR_ADC_RATE, runtime->rate); -+ -+ buffer_size = frames_to_bytes(runtime, runtime->period_size) * -+ runtime->periods; -+ -+ chip->dma.req_rx.buffer_size = buffer_size; -+ chip->dma.req_rx.periods = runtime->periods; -+ -+ BUG_ON(chip->dma.req_rx.buffer_size != -+ (chip->dma.req_rx.periods * -+ frames_to_bytes(runtime, runtime->period_size))); -+ -+ chip->dma.req_rx.buffer_start = runtime->dma_addr; -+ chip->dma.req_rx.data_reg = (dma_addr_t)(chip->regs + AC97C_CARHR + 2); -+ chip->dma.req_rx.periph_id = chip->dma.rx_periph_id; -+ chip->dma.req_rx.direction = DMA_DIR_PERIPH_TO_MEM; -+ chip->dma.req_rx.width = DMA_WIDTH_16BIT; -+ chip->dma.req_rx.dev_id = chip; -+ -+ return 0; -+} -+ -+ static int -+snd_atmel_ac97_playback_trigger(struct snd_pcm_substream *substream, int cmd) -+{ -+ struct atmel_ac97 *chip = snd_pcm_substream_chip(substream); -+ unsigned long camr; -+ int flags, err = 0; -+ -+ spin_lock_irqsave(&chip->lock, flags); -+ camr = ac97c_readl(chip, CAMR); -+ -+ switch (cmd) { -+ case SNDRV_PCM_TRIGGER_START: -+ err = dma_prepare_request_cyclic(chip->dma.req_tx.req.dmac, -+ &chip->dma.req_tx); -+ dma_start_request(chip->dma.req_tx.req.dmac, -+ chip->dma.req_tx.req.channel); -+ camr |= AC97C_CMR_CENA; -+ break; -+ case SNDRV_PCM_TRIGGER_STOP: -+ err = dma_stop_request(chip->dma.req_tx.req.dmac, -+ chip->dma.req_tx.req.channel); -+ if (chip->opened <= 1) -+ camr &= ~AC97C_CMR_CENA; -+ break; -+ default: -+ err = -EINVAL; -+ break; -+ } -+ -+ ac97c_writel(chip, CAMR, camr); -+ -+ spin_unlock_irqrestore(&chip->lock, flags); -+ return err; -+} -+ -+ static int -+snd_atmel_ac97_capture_trigger(struct snd_pcm_substream *substream, int cmd) -+{ -+ struct atmel_ac97 *chip = snd_pcm_substream_chip(substream); -+ unsigned long camr; -+ int flags, err = 0; -+ -+ spin_lock_irqsave(&chip->lock, flags); -+ camr = ac97c_readl(chip, CAMR); -+ -+ switch (cmd) { -+ case SNDRV_PCM_TRIGGER_START: -+ err = dma_prepare_request_cyclic(chip->dma.req_rx.req.dmac, -+ &chip->dma.req_rx); -+ dma_start_request(chip->dma.req_rx.req.dmac, -+ chip->dma.req_rx.req.channel); -+ camr |= AC97C_CMR_CENA; -+ break; -+ case SNDRV_PCM_TRIGGER_STOP: -+ err = dma_stop_request(chip->dma.req_rx.req.dmac, -+ chip->dma.req_rx.req.channel); -+ mutex_lock(&opened_mutex); -+ if (chip->opened <= 1) -+ camr &= ~AC97C_CMR_CENA; -+ mutex_unlock(&opened_mutex); -+ break; -+ default: -+ err = -EINVAL; -+ break; -+ } -+ -+ ac97c_writel(chip, CAMR, camr); -+ -+ spin_unlock_irqrestore(&chip->lock, flags); -+ return err; -+} -+ -+ static snd_pcm_uframes_t -+snd_atmel_ac97_playback_pointer(struct snd_pcm_substream *substream) -+{ -+ struct atmel_ac97 *chip = snd_pcm_substream_chip(substream); -+ struct snd_pcm_runtime *runtime = substream->runtime; -+ snd_pcm_uframes_t pos; -+ unsigned long bytes; -+ -+ bytes = (dma_get_current_pos -+ (chip->dma.req_tx.req.dmac, -+ chip->dma.req_tx.req.channel) - runtime->dma_addr); -+ pos = bytes_to_frames(runtime, bytes); -+ if (pos >= runtime->buffer_size) -+ pos -= runtime->buffer_size; -+ -+ return pos; -+} -+ -+ static snd_pcm_uframes_t -+snd_atmel_ac97_capture_pointer(struct snd_pcm_substream *substream) -+{ -+ struct atmel_ac97 *chip = snd_pcm_substream_chip(substream); -+ struct snd_pcm_runtime *runtime = substream->runtime; -+ snd_pcm_uframes_t pos; -+ unsigned long bytes; -+ -+ bytes = (dma_get_current_pos -+ (chip->dma.req_rx.req.dmac, -+ chip->dma.req_rx.req.channel) -+ - runtime->dma_addr); -+ pos = bytes_to_frames(runtime, bytes); -+ if (pos >= runtime->buffer_size) -+ pos -= runtime->buffer_size; -+ -+ -+ return pos; -+} -+ -+static struct snd_pcm_ops atmel_ac97_playback_ops = { -+ .open = snd_atmel_ac97_playback_open, -+ .close = snd_atmel_ac97_playback_close, -+ .ioctl = snd_pcm_lib_ioctl, -+ .hw_params = snd_atmel_ac97_playback_hw_params, -+ .hw_free = snd_atmel_ac97_playback_hw_free, -+ .prepare = snd_atmel_ac97_playback_prepare, -+ .trigger = snd_atmel_ac97_playback_trigger, -+ .pointer = snd_atmel_ac97_playback_pointer, -+}; -+ -+static struct snd_pcm_ops atmel_ac97_capture_ops = { -+ .open = snd_atmel_ac97_capture_open, -+ .close = snd_atmel_ac97_capture_close, -+ .ioctl = snd_pcm_lib_ioctl, -+ .hw_params = snd_atmel_ac97_capture_hw_params, -+ .hw_free = snd_atmel_ac97_capture_hw_free, -+ .prepare = snd_atmel_ac97_capture_prepare, -+ .trigger = snd_atmel_ac97_capture_trigger, -+ .pointer = snd_atmel_ac97_capture_pointer, -+}; -+ -+static struct ac97_pcm atmel_ac97_pcm_defs[] __devinitdata = { -+ /* Playback */ -+ { -+ .exclusive = 1, -+ .r = { { -+ .slots = ((1 << AC97_SLOT_PCM_LEFT) -+ | (1 << AC97_SLOT_PCM_RIGHT) -+ | (1 << AC97_SLOT_PCM_CENTER) -+ | (1 << AC97_SLOT_PCM_SLEFT) -+ | (1 << AC97_SLOT_PCM_SRIGHT) -+ | (1 << AC97_SLOT_LFE)), -+ } } -+ }, -+ /* PCM in */ -+ { -+ .stream = 1, -+ .exclusive = 1, -+ .r = { { -+ .slots = ((1 << AC97_SLOT_PCM_LEFT) -+ | (1 << AC97_SLOT_PCM_RIGHT)), -+ } } -+ }, -+ /* Mic in */ -+ { -+ .stream = 1, -+ .exclusive = 1, -+ .r = { { -+ .slots = (1<<AC97_SLOT_MIC), -+ } } -+ }, -+}; -+ -+static int __devinit snd_atmel_ac97_pcm_new(struct atmel_ac97 *chip) -+{ -+ struct snd_pcm *pcm; -+ int err; -+ -+ err = snd_ac97_pcm_assign(chip->ac97_bus, -+ ARRAY_SIZE(atmel_ac97_pcm_defs), -+ atmel_ac97_pcm_defs); -+ if (err) -+ return err; -+ -+ err = snd_pcm_new(chip->card, "Atmel-AC97", 0, 1, 1, &pcm); -+ if (err) -+ return err; -+ -+ snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, -+ &atmel_ac97_playback_ops); -+ -+ snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, -+ &atmel_ac97_capture_ops); -+ -+ snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV, -+ &chip->pdev->dev, -+ 128 * 1024, 128 * 1024); -+ -+ pcm->private_data = chip; -+ pcm->info_flags = 0; -+ strcpy(pcm->name, "Atmel-AC97"); -+ chip->pcm = pcm; -+ -+ return 0; -+} -+ -+/* -+ * Mixer part. -+ */ -+static int snd_atmel_ac97_mixer_new(struct atmel_ac97 *chip) -+{ -+ int err; -+ struct snd_ac97_template template; -+ -+ memset(&template, 0, sizeof(template)); -+ template.private_data = chip; -+ err = snd_ac97_mixer(chip->ac97_bus, &template, &chip->ac97); -+ -+ return err; -+} -+ -+static void atmel_ac97_error(struct dma_request *_req) -+{ -+ struct dma_request_cyclic *req = to_dma_request_cyclic(_req); -+ struct atmel_ac97 *chip = req->dev_id; -+ -+ dev_dbg(&chip->pdev->dev, "DMA Controller error, channel %d\n", -+ req->req.channel); -+} -+ -+static void atmel_ac97_block_complete(struct dma_request *_req) -+{ -+ struct dma_request_cyclic *req = to_dma_request_cyclic(_req); -+ struct atmel_ac97 *chip = req->dev_id; -+ if (req->periph_id == chip->dma.tx_periph_id) -+ snd_pcm_period_elapsed(chip->playback_substream); -+ else -+ snd_pcm_period_elapsed(chip->capture_substream); -+} -+ -+/* -+ * Codec part. -+ */ -+static void snd_atmel_ac97_write(struct snd_ac97 *ac97, unsigned short reg, -+ unsigned short val) -+{ -+ struct atmel_ac97 *chip = get_chip(ac97); -+ unsigned long word; -+ int timeout = 40; -+ -+ word = (reg & 0x7f) << 16 | val; -+ -+ do { -+ if (ac97c_readl(chip, COSR) & AC97C_CSR_TXRDY) { -+ ac97c_writel(chip, COTHR, word); -+ return; -+ } -+ udelay(1); -+ } while (--timeout); -+ -+ dev_dbg(&chip->pdev->dev, "codec write timeout\n"); -+} -+ -+static unsigned short snd_atmel_ac97_read(struct snd_ac97 *ac97, -+ unsigned short reg) -+{ -+ struct atmel_ac97 *chip = get_chip(ac97); -+ unsigned long word; -+ int timeout = 40; -+ int write = 10; -+ -+ word = (0x80 | (reg & 0x7f)) << 16; -+ -+ if ((ac97c_readl(chip, COSR) & AC97C_CSR_RXRDY) != 0) -+ ac97c_readl(chip, CORHR); -+ -+retry_write: -+ timeout = 40; -+ -+ do { -+ if ((ac97c_readl(chip, COSR) & AC97C_CSR_TXRDY) != 0) { -+ ac97c_writel(chip, COTHR, word); -+ goto read_reg; -+ } -+ mdelay(10); -+ } while (--timeout); -+ -+ if (!--write) -+ goto timed_out; -+ goto retry_write; -+ -+read_reg: -+ do { -+ if ((ac97c_readl(chip, COSR) & AC97C_CSR_RXRDY) != 0) { -+ unsigned short val = ac97c_readl(chip, CORHR); -+ return val; -+ } -+ mdelay(10); -+ } while (--timeout); -+ -+ if (!--write) -+ goto timed_out; -+ goto retry_write; -+ -+timed_out: -+ dev_dbg(&chip->pdev->dev, "codec read timeout\n"); -+ return 0xffff; -+} -+ -+static void snd_atmel_ac97_reset(struct atmel_ac97 *chip) -+{ -+ ac97c_writel(chip, MR, AC97C_MR_WRST); -+ mdelay(1); -+ ac97c_writel(chip, MR, AC97C_MR_ENA); -+} -+ -+static void snd_atmel_ac97_destroy(struct snd_card *card) -+{ -+ struct atmel_ac97 *chip = get_chip(card); -+ -+ if (chip->regs) -+ iounmap(chip->regs); -+ -+ if (chip->mck) { -+ clk_disable(chip->mck); -+ clk_put(chip->mck); -+ } -+ -+ if (chip->dma.req_tx.req.dmac) { -+ dma_release_channel(chip->dma.req_tx.req.dmac, -+ chip->dma.req_tx.req.channel); -+ } -+ if (chip->dma.req_rx.req.dmac) { -+ dma_release_channel(chip->dma.req_rx.req.dmac, -+ chip->dma.req_rx.req.channel); -+ } -+} -+ -+static int __devinit snd_atmel_ac97_create(struct snd_card *card, -+ struct platform_device *pdev) -+{ -+ static struct snd_ac97_bus_ops ops = { -+ .write = snd_atmel_ac97_write, -+ .read = snd_atmel_ac97_read, -+ }; -+ struct atmel_ac97 *chip = get_chip(card); -+ struct resource *regs; -+ struct clk *mck; -+ int err; -+ -+ regs = platform_get_resource(pdev, IORESOURCE_MEM, 0); -+ if (!regs) -+ return -ENXIO; -+ -+ mck = clk_get(&pdev->dev, "pclk"); -+ if (IS_ERR(mck)) -+ return PTR_ERR(mck); -+ clk_enable(mck); -+ chip->mck = mck; -+ -+ card->private_free = snd_atmel_ac97_destroy; -+ -+ spin_lock_init(&chip->lock); -+ chip->card = card; -+ chip->pdev = pdev; -+ -+ chip->regs = ioremap(regs->start, regs->end - regs->start + 1); -+ if (!chip->regs) -+ return -ENOMEM; -+ -+ snd_card_set_dev(card, &pdev->dev); -+ -+ err = snd_ac97_bus(card, 0, &ops, chip, &chip->ac97_bus); -+ -+ return err; -+} -+ -+static int __devinit snd_atmel_ac97_probe(struct platform_device *pdev) -+{ -+ static int dev; -+ struct snd_card *card; -+ struct atmel_ac97 *chip; -+ int err; -+ int ch; -+ -+ mutex_init(&opened_mutex); -+ -+ err = -ENOMEM; -+ card = snd_card_new(SNDRV_DEFAULT_IDX1, SNDRV_DEFAULT_STR1, -+ THIS_MODULE, sizeof(struct atmel_ac97)); -+ if (!card) -+ goto out; -+ chip = get_chip(card); -+ -+ err = snd_atmel_ac97_create(card, pdev); -+ if (err) -+ goto out_free_card; -+ -+ snd_atmel_ac97_reset(chip); -+ -+ err = snd_atmel_ac97_mixer_new(chip); -+ if (err) -+ goto out_free_card; -+ -+ err = snd_atmel_ac97_pcm_new(chip); -+ if (err) -+ goto out_free_card; -+ -+ /* TODO: Get this information from the platform device */ -+ chip->dma.req_tx.req.dmac = find_dma_controller(0); -+ if (!chip->dma.req_tx.req.dmac) { -+ dev_dbg(&chip->pdev->dev, "DMA controller for TX missing\n"); -+ err = -ENODEV; -+ goto out_free_card; -+ } -+ chip->dma.req_rx.req.dmac = find_dma_controller(0); -+ if (!chip->dma.req_rx.req.dmac) { -+ dev_dbg(&chip->pdev->dev, "DMA controller for RX missing\n"); -+ err = -ENODEV; -+ goto out_free_card; -+ } -+ -+ chip->dma.rx_periph_id = 3; -+ chip->dma.tx_periph_id = 4; -+ -+ ch = dma_alloc_channel(chip->dma.req_tx.req.dmac); -+ if (ch < 0) { -+ dev_dbg(&chip->pdev->dev, -+ "could not allocate TX DMA channel\n"); -+ err = ch; -+ goto out_free_card; -+ } -+ chip->dma.req_tx.req.channel = ch; -+ chip->dma.req_tx.width = DMA_WIDTH_16BIT; -+ chip->dma.req_tx.req.block_complete = atmel_ac97_block_complete; -+ chip->dma.req_tx.req.error = atmel_ac97_error; -+ -+ ch = dma_alloc_channel(chip->dma.req_rx.req.dmac); -+ if (ch < 0) { -+ dev_dbg(&chip->pdev->dev, -+ "could not allocate RX DMA channel\n"); -+ err = ch; -+ goto out_free_card; -+ } -+ chip->dma.req_rx.req.channel = ch; -+ chip->dma.req_rx.width = DMA_WIDTH_16BIT; -+ chip->dma.req_rx.req.block_complete = atmel_ac97_block_complete; -+ chip->dma.req_rx.req.error = atmel_ac97_error; -+ -+ strcpy(card->driver, "atmel_ac97c"); -+ strcpy(card->shortname, "atmel_ac97c"); -+ sprintf(card->longname, "Atmel AVR32 AC97 controller"); -+ -+ err = snd_card_register(card); -+ if (err) -+ goto out_free_card; -+ -+ platform_set_drvdata(pdev, card); -+ dev++; -+ -+ dev_info(&pdev->dev, "Atmel AVR32 AC97 controller at 0x%p\n", -+ chip->regs); -+ -+ return 0; -+ -+out_free_card: -+ snd_card_free(card); -+out: -+ return err; -+} -+ -+#ifdef CONFIG_PM -+ static int -+snd_atmel_ac97_suspend(struct platform_device *pdev, pm_message_t msg) -+{ -+ struct snd_card *card = platform_get_drvdata(pdev); -+ struct atmel_ac97 *chip = card->private_data; -+ -+ clk_disable(chip->mck); -+ -+ return 0; -+} -+ -+static int snd_atmel_ac97_resume(struct platform_device *pdev) -+{ -+ struct snd_card *card = dev_get_drvdata(pdev); -+ struct atmel_ac97 *chip = card->private_data; -+ -+ clk_enable(chip->mck); -+ -+ return 0; -+} -+#else -+#define snd_atmel_ac97_suspend NULL -+#define snd_atmel_ac97_resume NULL -+#endif -+ -+static int __devexit snd_atmel_ac97_remove(struct platform_device *pdev) -+{ -+ struct snd_card *card = platform_get_drvdata(pdev); -+ -+ snd_card_free(card); -+ platform_set_drvdata(pdev, NULL); -+ return 0; -+} -+ -+static struct platform_driver atmel_ac97_driver = { -+ .remove = __devexit_p(snd_atmel_ac97_remove), -+ .driver = { -+ .name = "atmel_ac97c", -+ }, -+ .suspend = snd_atmel_ac97_suspend, -+ .resume = snd_atmel_ac97_resume, -+}; -+ -+static int __init atmel_ac97_init(void) -+{ -+ return platform_driver_probe(&atmel_ac97_driver, -+ snd_atmel_ac97_probe); -+} -+module_init(atmel_ac97_init); -+ -+static void __exit atmel_ac97_exit(void) -+{ -+ platform_driver_unregister(&atmel_ac97_driver); -+} -+module_exit(atmel_ac97_exit); -+ -+MODULE_LICENSE("GPL"); -+MODULE_DESCRIPTION("Driver for Atmel AC97 Controller"); -+MODULE_AUTHOR("Haavard Skinnemoen <hskinnemoen@atmel.com>"); -diff --git a/sound/avr32/ac97c.h b/sound/avr32/ac97c.h -new file mode 100644 -index 0000000..96246e7 ---- /dev/null -+++ b/sound/avr32/ac97c.h -@@ -0,0 +1,71 @@ -+/* -+ * Register definitions for the Atmel AC97 Controller. -+ * -+ * Copyright (C) 2005-2006 Atmel Corporation -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 as -+ * published by the Free Software Foundation. -+ */ -+#ifndef __SOUND_AVR32_AC97C_H -+#define __SOUND_AVR32_AC97C_H -+ -+#define AC97C_MR 0x08 -+#define AC97C_ICA 0x10 -+#define AC97C_OCA 0x14 -+#define AC97C_CARHR 0x20 -+#define AC97C_CATHR 0x24 -+#define AC97C_CASR 0x28 -+#define AC97C_CAMR 0x2c -+#define AC97C_CBRHR 0x30 -+#define AC97C_CBTHR 0x34 -+#define AC97C_CBSR 0x38 -+#define AC97C_CBMR 0x3c -+#define AC97C_CORHR 0x40 -+#define AC97C_COTHR 0x44 -+#define AC97C_COSR 0x48 -+#define AC97C_COMR 0x4c -+#define AC97C_SR 0x50 -+#define AC97C_IER 0x54 -+#define AC97C_IDR 0x58 -+#define AC97C_IMR 0x5c -+#define AC97C_VERSION 0xfc -+ -+#define AC97C_CATPR PDC_TPR -+#define AC97C_CATCR PDC_TCR -+#define AC97C_CATNPR PDC_TNPR -+#define AC97C_CATNCR PDC_TNCR -+#define AC97C_CARPR PDC_RPR -+#define AC97C_CARCR PDC_RCR -+#define AC97C_CARNPR PDC_RNPR -+#define AC97C_CARNCR PDC_RNCR -+#define AC97C_PTCR PDC_PTCR -+ -+#define AC97C_MR_ENA (1 << 0) -+#define AC97C_MR_WRST (1 << 1) -+#define AC97C_MR_VRA (1 << 2) -+ -+#define AC97C_CSR_TXRDY (1 << 0) -+#define AC97C_CSR_UNRUN (1 << 2) -+#define AC97C_CSR_RXRDY (1 << 4) -+#define AC97C_CSR_ENDTX (1 << 10) -+#define AC97C_CSR_ENDRX (1 << 14) -+ -+#define AC97C_CMR_SIZE_20 (0 << 16) -+#define AC97C_CMR_SIZE_18 (1 << 16) -+#define AC97C_CMR_SIZE_16 (2 << 16) -+#define AC97C_CMR_SIZE_10 (3 << 16) -+#define AC97C_CMR_CEM_LITTLE (1 << 18) -+#define AC97C_CMR_CEM_BIG (0 << 18) -+#define AC97C_CMR_CENA (1 << 21) -+#define AC97C_CMR_PDCEN (1 << 22) -+ -+#define AC97C_SR_CAEVT (1 << 3) -+ -+#define AC97C_CH_ASSIGN(slot, channel) \ -+ (AC97C_CHANNEL_##channel << (3 * (AC97_SLOT_##slot - 3))) -+#define AC97C_CHANNEL_NONE 0x0 -+#define AC97C_CHANNEL_A 0x1 -+#define AC97C_CHANNEL_B 0x2 -+ -+#endif /* __SOUND_AVR32_AC97C_H */ -diff --git a/sound/oss/Kconfig b/sound/oss/Kconfig -index 4b30ae6..de910e0 100644 ---- a/sound/oss/Kconfig -+++ b/sound/oss/Kconfig -@@ -738,3 +738,7 @@ config SOUND_SH_DAC_AUDIO_CHANNEL - int "DAC channel" - default "1" - depends on SOUND_SH_DAC_AUDIO -+ -+config SOUND_AT32_ABDAC -+ tristate "Atmel AT32 Audio Bitstream DAC (ABDAC) support" -+ depends on SOUND_PRIME && AVR32 -diff --git a/sound/oss/Makefile b/sound/oss/Makefile -index 2489bd6..2b731af 100644 ---- a/sound/oss/Makefile -+++ b/sound/oss/Makefile -@@ -10,6 +10,7 @@ obj-$(CONFIG_SOUND_CS4232) += cs4232.o ad1848.o - - # Please leave it as is, cause the link order is significant ! - -+obj-$(CONFIG_SOUND_AT32_ABDAC) += at32_abdac.o - obj-$(CONFIG_SOUND_SH_DAC_AUDIO) += sh_dac_audio.o - obj-$(CONFIG_SOUND_HAL2) += hal2.o - obj-$(CONFIG_SOUND_AEDSP16) += aedsp16.o -diff --git a/sound/oss/at32_abdac.c b/sound/oss/at32_abdac.c -new file mode 100644 -index 0000000..cb997d7 ---- /dev/null -+++ b/sound/oss/at32_abdac.c -@@ -0,0 +1,722 @@ -+/* -+ * OSS Sound Driver for the Atmel AT32 on-chip DAC. -+ * -+ * Copyright (C) 2006 Atmel Corporation -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 as -+ * published by the Free Software Foundation. -+ */ -+#include <linux/clk.h> -+#include <linux/dma-mapping.h> -+#include <linux/fs.h> -+#include <linux/init.h> -+#include <linux/interrupt.h> -+#include <linux/kernel.h> -+#include <linux/module.h> -+#include <linux/platform_device.h> -+#include <linux/sound.h> -+#include <linux/soundcard.h> -+ -+#include <asm/byteorder.h> -+#include <asm/dma-controller.h> -+#include <asm/io.h> -+#include <asm/uaccess.h> -+ -+/* We want to use the "bizarre" swap-bytes-in-each-halfword macro */ -+#include <linux/byteorder/swabb.h> -+ -+#include "at32_abdac.h" -+ -+#define DMA_BUFFER_SIZE 32768 -+#define DMA_PERIOD_SHIFT 10 -+#define DMA_PERIOD_SIZE (1 << DMA_PERIOD_SHIFT) -+#define DMA_WRITE_THRESHOLD DMA_PERIOD_SIZE -+ -+struct sound_settings { -+ unsigned int format; -+ unsigned int channels; -+ unsigned int sample_rate; -+ /* log2(bytes per sample) */ -+ unsigned int input_order; -+}; -+ -+struct at32_dac { -+ spinlock_t lock; -+ void __iomem *regs; -+ -+ /* head and tail refer to number of words */ -+ struct { -+ u32 *buf; -+ int head; -+ int tail; -+ } dma; -+ -+ struct semaphore sem; -+ wait_queue_head_t write_wait; -+ -+ /* -+ * Read at most ucount bytes from ubuf, translate to 2-channel -+ * signed 16-bit big endian format and write to the DMA buffer -+ * as long as there is room left. Return the number of bytes -+ * successfully copied from ubuf, or -EFAULT if the first -+ * sample from ubuf couldn't be read. This function is not -+ * called unless there is room for at least one sample (4 -+ * bytes) in the DMA buffer. -+ */ -+ ssize_t (*trans)(struct at32_dac *dac, const char __user *ubuf, -+ size_t ucount); -+ -+ struct sound_settings dsp_settings; -+ struct dma_request_cyclic req; -+ -+ struct clk *mck; -+ struct clk *sample_clk; -+ struct platform_device *pdev; -+ int busy; -+ int playing; -+ int dev_dsp; -+}; -+static struct at32_dac *the_dac; -+ -+static inline unsigned int abdac_get_head(struct at32_dac *dac) -+{ -+ return dac->dma.head & ((DMA_BUFFER_SIZE / 4) - 1); -+} -+ -+static inline unsigned int abdac_get_tail(struct at32_dac *dac) -+{ -+ return dac->dma.tail & ((DMA_BUFFER_SIZE / 4) - 1); -+} -+ -+static inline unsigned int abdac_dma_space(struct at32_dac *dac) -+{ -+ unsigned int space; -+ -+ space = ((dac->dma.tail - dac->dma.head - 1) -+ & ((DMA_BUFFER_SIZE / 4) - 1)); -+ return space; -+} -+ -+static void abdac_update_dma_tail(struct at32_dac *dac) -+{ -+ dma_addr_t dma_addr; -+ unsigned int new_tail; -+ -+ if (dac->playing) { -+ dma_addr = dma_get_current_pos(dac->req.req.dmac, -+ dac->req.req.channel); -+ new_tail = (dma_addr - dac->req.buffer_start) / 4; -+ if (new_tail >= dac->dma.head -+ && (dac->dma.tail < dac->dma.head -+ || dac->dma.tail > new_tail)) -+ dev_notice(&dac->pdev->dev, "DMA underrun detected!\n"); -+ dac->dma.tail = new_tail; -+ dev_dbg(&dac->pdev->dev, "update tail: 0x%x - 0x%x = %u\n", -+ dma_addr, dac->req.buffer_start, dac->dma.tail); -+ } -+} -+ -+static int abdac_start(struct at32_dac *dac) -+{ -+ int ret; -+ -+ if (dac->playing) -+ return 0; -+ -+ memset(dac->dma.buf, 0, DMA_BUFFER_SIZE); -+ -+ clk_enable(dac->sample_clk); -+ -+ ret = dma_prepare_request_cyclic(dac->req.req.dmac, &dac->req); -+ if (ret) -+ goto out_stop_clock; -+ -+ dev_dbg(&dac->pdev->dev, "starting DMA...\n"); -+ ret = dma_start_request(dac->req.req.dmac, dac->req.req.channel); -+ if (ret) -+ goto out_stop_request; -+ -+ dac_writel(dac, CTRL, DAC_BIT(EN)); -+ dac->playing = 1; -+ -+ return 0; -+ -+out_stop_request: -+ dma_stop_request(dac->req.req.dmac, -+ dac->req.req.channel); -+out_stop_clock: -+ clk_disable(dac->sample_clk); -+ return ret; -+} -+ -+static int abdac_stop(struct at32_dac *dac) -+{ -+ if (dac->playing) { -+ dma_stop_request(dac->req.req.dmac, dac->req.req.channel); -+ dac_writel(dac, DATA, 0); -+ dac_writel(dac, CTRL, 0); -+ dac->playing = 0; -+ clk_disable(dac->sample_clk); -+ } -+ -+ return 0; -+} -+ -+static int abdac_dma_prepare(struct at32_dac *dac) -+{ -+ dac->dma.buf = dma_alloc_coherent(&dac->pdev->dev, DMA_BUFFER_SIZE, -+ &dac->req.buffer_start, GFP_KERNEL); -+ if (!dac->dma.buf) -+ return -ENOMEM; -+ -+ dac->dma.head = dac->dma.tail = 0; -+ dac->req.periods = DMA_BUFFER_SIZE / DMA_PERIOD_SIZE; -+ dac->req.buffer_size = DMA_BUFFER_SIZE; -+ -+ return 0; -+} -+ -+static void abdac_dma_cleanup(struct at32_dac *dac) -+{ -+ if (dac->dma.buf) -+ dma_free_coherent(&dac->pdev->dev, DMA_BUFFER_SIZE, -+ dac->dma.buf, dac->req.buffer_start); -+ dac->dma.buf = NULL; -+} -+ -+static void abdac_dma_block_complete(struct dma_request *req) -+{ -+ struct dma_request_cyclic *creq = to_dma_request_cyclic(req); -+ struct at32_dac *dac = container_of(creq, struct at32_dac, req); -+ -+ wake_up(&dac->write_wait); -+} -+ -+static void abdac_dma_error(struct dma_request *req) -+{ -+ struct dma_request_cyclic *creq = to_dma_request_cyclic(req); -+ struct at32_dac *dac = container_of(creq, struct at32_dac, req); -+ -+ dev_err(&dac->pdev->dev, "DMA error\n"); -+} -+ -+static irqreturn_t abdac_interrupt(int irq, void *dev_id) -+{ -+ struct at32_dac *dac = dev_id; -+ u32 status; -+ -+ status = dac_readl(dac, INT_STATUS); -+ if (status & DAC_BIT(UNDERRUN)) { -+ dev_err(&dac->pdev->dev, "Underrun detected!\n"); -+ dac_writel(dac, INT_CLR, DAC_BIT(UNDERRUN)); -+ } else { -+ dev_err(&dac->pdev->dev, "Spurious interrupt (status=0x%x)\n", -+ status); -+ dac_writel(dac, INT_CLR, status); -+ } -+ -+ return IRQ_HANDLED; -+} -+ -+static ssize_t trans_s16be(struct at32_dac *dac, const char __user *ubuf, -+ size_t ucount) -+{ -+ ssize_t ret; -+ -+ if (dac->dsp_settings.channels == 2) { -+ const u32 __user *up = (const u32 __user *)ubuf; -+ u32 sample; -+ -+ for (ret = 0; ret < (ssize_t)(ucount - 3); ret += 4) { -+ if (!abdac_dma_space(dac)) -+ break; -+ -+ if (unlikely(__get_user(sample, up++))) { -+ if (ret == 0) -+ ret = -EFAULT; -+ break; -+ } -+ dac->dma.buf[abdac_get_head(dac)] = sample; -+ dac->dma.head++; -+ } -+ } else { -+ const u16 __user *up = (const u16 __user *)ubuf; -+ u16 sample; -+ -+ for (ret = 0; ret < (ssize_t)(ucount - 1); ret += 2) { -+ if (!abdac_dma_space(dac)) -+ break; -+ -+ if (unlikely(__get_user(sample, up++))) { -+ if (ret == 0) -+ ret = -EFAULT; -+ break; -+ } -+ dac->dma.buf[abdac_get_head(dac)] -+ = (sample << 16) | sample; -+ dac->dma.head++; -+ } -+ } -+ -+ return ret; -+} -+ -+static ssize_t trans_s16le(struct at32_dac *dac, const char __user *ubuf, -+ size_t ucount) -+{ -+ ssize_t ret; -+ -+ if (dac->dsp_settings.channels == 2) { -+ const u32 __user *up = (const u32 __user *)ubuf; -+ u32 sample; -+ -+ for (ret = 0; ret < (ssize_t)(ucount - 3); ret += 4) { -+ if (!abdac_dma_space(dac)) -+ break; -+ -+ if (unlikely(__get_user(sample, up++))) { -+ if (ret == 0) -+ ret = -EFAULT; -+ break; -+ } -+ /* Swap bytes in each halfword */ -+ dac->dma.buf[abdac_get_head(dac)] = swahb32(sample); -+ dac->dma.head++; -+ } -+ } else { -+ const u16 __user *up = (const u16 __user *)ubuf; -+ u16 sample; -+ -+ for (ret = 0; ret < (ssize_t)(ucount - 1); ret += 2) { -+ if (!abdac_dma_space(dac)) -+ break; -+ -+ if (unlikely(__get_user(sample, up++))) { -+ if (ret == 0) -+ ret = -EFAULT; -+ break; -+ } -+ sample = swab16(sample); -+ dac->dma.buf[abdac_get_head(dac)] -+ = (sample << 16) | sample; -+ dac->dma.head++; -+ } -+ } -+ -+ return ret; -+} -+ -+static ssize_t abdac_dma_translate_from_user(struct at32_dac *dac, -+ const char __user *buffer, -+ size_t count) -+{ -+ /* At least one buffer must be available at this point */ -+ dev_dbg(&dac->pdev->dev, "copying %zu bytes from user...\n", count); -+ -+ return dac->trans(dac, buffer, count); -+} -+ -+static int abdac_set_format(struct at32_dac *dac, int format) -+{ -+ unsigned int order; -+ -+ switch (format) { -+ case AFMT_S16_BE: -+ order = 1; -+ dac->trans = trans_s16be; -+ break; -+ case AFMT_S16_LE: -+ order = 1; -+ dac->trans = trans_s16le; -+ break; -+ default: -+ dev_dbg(&dac->pdev->dev, "unsupported format: %d\n", format); -+ return -EINVAL; -+ } -+ -+ if (dac->dsp_settings.channels == 2) -+ order++; -+ -+ dac->dsp_settings.input_order = order; -+ dac->dsp_settings.format = format; -+ return 0; -+} -+ -+static int abdac_set_sample_rate(struct at32_dac *dac, unsigned long rate) -+{ -+ unsigned long new_rate; -+ int ret; -+ -+ ret = clk_set_rate(dac->sample_clk, 256 * rate); -+ if (ret < 0) -+ return ret; -+ -+ /* TODO: mplayer seems to have a problem with this */ -+#if 0 -+ new_rate = clk_get_rate(dac->sample_clk); -+ dac->dsp_settings.sample_rate = new_rate / 256; -+#else -+ dac->dsp_settings.sample_rate = rate; -+#endif -+ -+ return 0; -+} -+ -+static ssize_t abdac_dsp_write(struct file *file, -+ const char __user *buffer, -+ size_t count, loff_t *ppos) -+{ -+ struct at32_dac *dac = file->private_data; -+ DECLARE_WAITQUEUE(wait, current); -+ unsigned int avail; -+ ssize_t copied; -+ ssize_t ret; -+ -+ /* Avoid address space checking in the translation functions */ -+ if (!access_ok(buffer, count, VERIFY_READ)) -+ return -EFAULT; -+ -+ down(&dac->sem); -+ -+ if (!dac->dma.buf) { -+ ret = abdac_dma_prepare(dac); -+ if (ret) -+ goto out; -+ } -+ -+ add_wait_queue(&dac->write_wait, &wait); -+ ret = 0; -+ while (count > 0) { -+ do { -+ abdac_update_dma_tail(dac); -+ avail = abdac_dma_space(dac); -+ set_current_state(TASK_INTERRUPTIBLE); -+ if (avail >= DMA_WRITE_THRESHOLD) -+ break; -+ -+ if (file->f_flags & O_NONBLOCK) { -+ if (!ret) -+ ret = -EAGAIN; -+ goto out; -+ } -+ -+ pr_debug("Going to wait (avail = %u, count = %zu)\n", -+ avail, count); -+ -+ up(&dac->sem); -+ schedule(); -+ if (signal_pending(current)) { -+ if (!ret) -+ ret = -ERESTARTSYS; -+ goto out_nosem; -+ } -+ down(&dac->sem); -+ } while (1); -+ -+ copied = abdac_dma_translate_from_user(dac, buffer, count); -+ if (copied < 0) { -+ if (!ret) -+ ret = -EFAULT; -+ goto out; -+ } -+ -+ abdac_start(dac); -+ -+ count -= copied; -+ ret += copied; -+ } -+ -+out: -+ up(&dac->sem); -+out_nosem: -+ remove_wait_queue(&dac->write_wait, &wait); -+ set_current_state(TASK_RUNNING); -+ return ret; -+} -+ -+static int abdac_dsp_ioctl(struct inode *inode, struct file *file, -+ unsigned int cmd, unsigned long arg) -+{ -+ struct at32_dac *dac = file->private_data; -+ int __user *up = (int __user *)arg; -+ struct audio_buf_info abinfo; -+ int val, ret; -+ -+ switch (cmd) { -+ case OSS_GETVERSION: -+ return put_user(SOUND_VERSION, up); -+ -+ case SNDCTL_DSP_SPEED: -+ if (get_user(val, up)) -+ return -EFAULT; -+ if (val >= 0) { -+ abdac_stop(dac); -+ ret = abdac_set_sample_rate(dac, val); -+ if (ret) -+ return ret; -+ } -+ return put_user(dac->dsp_settings.sample_rate, up); -+ -+ case SNDCTL_DSP_STEREO: -+ if (get_user(val, up)) -+ return -EFAULT; -+ abdac_stop(dac); -+ if (val && dac->dsp_settings.channels == 1) -+ dac->dsp_settings.input_order++; -+ else if (!val && dac->dsp_settings.channels != 1) -+ dac->dsp_settings.input_order--; -+ dac->dsp_settings.channels = val ? 2 : 1; -+ return 0; -+ -+ case SNDCTL_DSP_CHANNELS: -+ if (get_user(val, up)) -+ return -EFAULT; -+ -+ if (val) { -+ if (val < 0 || val > 2) -+ return -EINVAL; -+ -+ abdac_stop(dac); -+ dac->dsp_settings.input_order -+ += val - dac->dsp_settings.channels; -+ dac->dsp_settings.channels = val; -+ } -+ return put_user(val, (int *)arg); -+ -+ case SNDCTL_DSP_GETFMTS: -+ return put_user(AFMT_S16_BE | AFMT_S16_BE, up); -+ -+ case SNDCTL_DSP_SETFMT: -+ if (get_user(val, up)) -+ return -EFAULT; -+ -+ if (val == AFMT_QUERY) { -+ val = dac->dsp_settings.format; -+ } else { -+ ret = abdac_set_format(dac, val); -+ if (ret) -+ return ret; -+ } -+ return put_user(val, up); -+ -+ case SNDCTL_DSP_GETOSPACE: -+ abdac_update_dma_tail(dac); -+ abinfo.fragsize = ((1 << dac->dsp_settings.input_order) -+ * (DMA_PERIOD_SIZE / 4)); -+ abinfo.bytes = (abdac_dma_space(dac) -+ << dac->dsp_settings.input_order); -+ abinfo.fragstotal = ((DMA_BUFFER_SIZE * 4) -+ >> (DMA_PERIOD_SHIFT -+ + dac->dsp_settings.input_order)); -+ abinfo.fragments = ((abinfo.bytes -+ >> dac->dsp_settings.input_order) -+ / (DMA_PERIOD_SIZE / 4)); -+ pr_debug("fragments=%d fragstotal=%d fragsize=%d bytes=%d\n", -+ abinfo.fragments, abinfo.fragstotal, abinfo.fragsize, -+ abinfo.bytes); -+ return copy_to_user(up, &abinfo, sizeof(abinfo)) ? -EFAULT : 0; -+ -+ default: -+ dev_dbg(&dac->pdev->dev, "Unimplemented ioctl cmd: 0x%x\n", cmd); -+ return -EINVAL; -+ } -+} -+ -+static int abdac_dsp_open(struct inode *inode, struct file *file) -+{ -+ struct at32_dac *dac = the_dac; -+ int ret; -+ -+ if (file->f_mode & FMODE_READ) -+ return -ENXIO; -+ -+ down(&dac->sem); -+ ret = -EBUSY; -+ if (dac->busy) -+ goto out; -+ -+ dac->dma.head = dac->dma.tail = 0; -+ -+ /* FIXME: What are the correct defaults? */ -+ dac->dsp_settings.channels = 2; -+ abdac_set_format(dac, AFMT_S16_BE); -+ ret = abdac_set_sample_rate(dac, 8000); -+ if (ret) -+ goto out; -+ -+ file->private_data = dac; -+ dac->busy = 1; -+ -+ ret = 0; -+ -+out: -+ up(&dac->sem); -+ return ret; -+} -+ -+static int abdac_dsp_release(struct inode *inode, struct file *file) -+{ -+ struct at32_dac *dac = file->private_data; -+ -+ down(&dac->sem); -+ -+ abdac_stop(dac); -+ abdac_dma_cleanup(dac); -+ dac->busy = 0; -+ -+ up(&dac->sem); -+ -+ return 0; -+} -+ -+static struct file_operations abdac_dsp_fops = { -+ .owner = THIS_MODULE, -+ .llseek = no_llseek, -+ .write = abdac_dsp_write, -+ .ioctl = abdac_dsp_ioctl, -+ .open = abdac_dsp_open, -+ .release = abdac_dsp_release, -+}; -+ -+static int __init abdac_probe(struct platform_device *pdev) -+{ -+ struct at32_dac *dac; -+ struct resource *regs; -+ struct clk *mck; -+ struct clk *sample_clk; -+ int irq; -+ int ret; -+ -+ if (the_dac) -+ return -EBUSY; -+ -+ regs = platform_get_resource(pdev, IORESOURCE_MEM, 0); -+ if (!regs) -+ return -ENXIO; -+ irq = platform_get_irq(pdev, 0); -+ if (irq < 0) -+ return irq; -+ -+ mck = clk_get(&pdev->dev, "pclk"); -+ if (IS_ERR(mck)) -+ return PTR_ERR(mck); -+ sample_clk = clk_get(&pdev->dev, "sample_clk"); -+ if (IS_ERR(sample_clk)) { -+ ret = PTR_ERR(sample_clk); -+ goto out_put_mck; -+ } -+ clk_enable(mck); -+ -+ ret = -ENOMEM; -+ dac = kzalloc(sizeof(struct at32_dac), GFP_KERNEL); -+ if (!dac) -+ goto out_disable_clk; -+ -+ spin_lock_init(&dac->lock); -+ init_MUTEX(&dac->sem); -+ init_waitqueue_head(&dac->write_wait); -+ dac->pdev = pdev; -+ dac->mck = mck; -+ dac->sample_clk = sample_clk; -+ -+ dac->regs = ioremap(regs->start, regs->end - regs->start + 1); -+ if (!dac->regs) -+ goto out_free_dac; -+ -+ ret = request_irq(irq, abdac_interrupt, 0, "dac", dac); -+ if (ret) -+ goto out_unmap_regs; -+ -+ /* FIXME */ -+ dac->req.req.dmac = find_dma_controller(0); -+ if (!dac->req.req.dmac) -+ goto out_free_irq; -+ -+ ret = dma_alloc_channel(dac->req.req.dmac); -+ if (ret < 0) -+ goto out_free_irq; -+ -+ dac->req.req.channel = ret; -+ dac->req.req.block_complete = abdac_dma_block_complete; -+ dac->req.req.error = abdac_dma_error; -+ dac->req.data_reg = regs->start + DAC_DATA; -+ dac->req.periph_id = 2; /* FIXME */ -+ dac->req.direction = DMA_DIR_MEM_TO_PERIPH; -+ dac->req.width = DMA_WIDTH_32BIT; -+ -+ /* Make sure the DAC is silent and disabled */ -+ dac_writel(dac, DATA, 0); -+ dac_writel(dac, CTRL, 0); -+ -+ ret = register_sound_dsp(&abdac_dsp_fops, -1); -+ if (ret < 0) -+ goto out_free_dma; -+ dac->dev_dsp = ret; -+ -+ /* TODO: Register mixer */ -+ -+ the_dac = dac; -+ platform_set_drvdata(pdev, dac); -+ -+ return 0; -+ -+out_free_dma: -+ dma_release_channel(dac->req.req.dmac, dac->req.req.channel); -+out_free_irq: -+ free_irq(irq, dac); -+out_unmap_regs: -+ iounmap(dac->regs); -+out_free_dac: -+ kfree(dac); -+out_disable_clk: -+ clk_disable(mck); -+ clk_put(sample_clk); -+out_put_mck: -+ clk_put(mck); -+ return ret; -+} -+ -+static int __exit abdac_remove(struct platform_device *pdev) -+{ -+ struct at32_dac *dac; -+ -+ dac = platform_get_drvdata(pdev); -+ if (dac) { -+ unregister_sound_dsp(dac->dev_dsp); -+ dma_release_channel(dac->req.req.dmac, dac->req.req.channel); -+ free_irq(platform_get_irq(pdev, 0), dac); -+ iounmap(dac->regs); -+ clk_disable(dac->mck); -+ clk_put(dac->sample_clk); -+ clk_put(dac->mck); -+ kfree(dac); -+ platform_set_drvdata(pdev, NULL); -+ the_dac = NULL; -+ } -+ -+ return 0; -+} -+ -+static struct platform_driver abdac_driver = { -+ .remove = __exit_p(abdac_remove), -+ .driver = { -+ .name = "abdac", -+ }, -+}; -+ -+static int __init abdac_init(void) -+{ -+ return platform_driver_probe(&abdac_driver, abdac_probe); -+} -+module_init(abdac_init); -+ -+static void __exit abdac_exit(void) -+{ -+ platform_driver_unregister(&abdac_driver); -+} -+module_exit(abdac_exit); -+ -+MODULE_AUTHOR("Haavard Skinnemoen <hskinnemoen@atmel.com>"); -+MODULE_DESCRIPTION("Sound Driver for the Atmel AT32 ABDAC"); -+MODULE_LICENSE("GPL"); -diff --git a/sound/oss/at32_abdac.h b/sound/oss/at32_abdac.h -new file mode 100644 -index 0000000..3c88e25 ---- /dev/null -+++ b/sound/oss/at32_abdac.h -@@ -0,0 +1,59 @@ -+/* -+ * Register definitions for the Atmel AT32 on-chip DAC. -+ * -+ * Copyright (C) 2006 Atmel Corporation -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 as -+ * published by the Free Software Foundation. -+ */ -+#ifndef __SOUND_OSS_AT32_ABDAC_H__ -+#define __SOUND_OSS_AT32_ABDAC_H__ -+ -+/* DAC register offsets */ -+#define DAC_DATA 0x0000 -+#define DAC_CTRL 0x0008 -+#define DAC_INT_MASK 0x000c -+#define DAC_INT_EN 0x0010 -+#define DAC_INT_DIS 0x0014 -+#define DAC_INT_CLR 0x0018 -+#define DAC_INT_STATUS 0x001c -+#define DAC_PDC_DATA 0x0020 -+ -+/* Bitfields in CTRL */ -+#define DAC_SWAP_OFFSET 30 -+#define DAC_SWAP_SIZE 1 -+#define DAC_EN_OFFSET 31 -+#define DAC_EN_SIZE 1 -+ -+/* Bitfields in INT_MASK/INT_EN/INT_DIS/INT_STATUS/INT_CLR */ -+#define DAC_UNDERRUN_OFFSET 28 -+#define DAC_UNDERRUN_SIZE 1 -+#define DAC_TX_READY_OFFSET 29 -+#define DAC_TX_READY_SIZE 1 -+#define DAC_TX_BUFFER_EMPTY_OFFSET 30 -+#define DAC_TX_BUFFER_EMPTY_SIZE 1 -+#define DAC_CHANNEL_TX_END_OFFSET 31 -+#define DAC_CHANNEL_TX_END_SIZE 1 -+ -+/* Bit manipulation macros */ -+#define DAC_BIT(name) \ -+ (1 << DAC_##name##_OFFSET) -+#define DAC_BF(name, value) \ -+ (((value) & ((1 << DAC_##name##_SIZE) - 1)) \ -+ << DAC_##name##_OFFSET) -+#define DAC_BFEXT(name, value) \ -+ (((value) >> DAC_##name##_OFFSET) \ -+ & ((1 << DAC_##name##_SIZE) - 1)) -+#define DAC_BFINS(name, value, old) \ -+ (((old) & ~(((1 << DAC_##name##_SIZE) - 1) \ -+ << DAC_##name##_OFFSET)) \ -+ | DAC_BF(name,value)) -+ -+/* Register access macros */ -+#define dac_readl(port, reg) \ -+ __raw_readl((port)->regs + DAC_##reg) -+#define dac_writel(port, reg, value) \ -+ __raw_writel((value), (port)->regs + DAC_##reg) -+ -+#endif /* __SOUND_OSS_AT32_ABDAC_H__ */ -diff --git a/sound/spi/Kconfig b/sound/spi/Kconfig -new file mode 100644 -index 0000000..0d08c29 ---- /dev/null -+++ b/sound/spi/Kconfig -@@ -0,0 +1,31 @@ -+#SPI drivers -+ -+menu "SPI devices" -+ depends on SND != n -+ -+config SND_AT73C213 -+ tristate "Atmel AT73C213 DAC driver" -+ depends on ATMEL_SSC -+ select SND_PCM -+ help -+ Say Y here if you want to use the Atmel AT73C213 external DAC. This -+ DAC can be found on Atmel development boards. -+ -+ This driver requires the Atmel SSC driver for sound sink, a -+ peripheral found on most AT91 and AVR32 microprocessors. -+ -+ To compile this driver as a module, choose M here: the module will be -+ called snd-at73c213. -+ -+config SND_AT73C213_TARGET_BITRATE -+ int "Target bitrate for AT73C213" -+ depends on SND_AT73C213 -+ default "48000" -+ range 8000 50000 -+ help -+ Sets the target bitrate for the bitrate calculator in the driver. -+ Limited by hardware to be between 8000 Hz and 50000 Hz. -+ -+ Set to 48000 Hz by default. -+ -+endmenu -diff --git a/sound/spi/Makefile b/sound/spi/Makefile -new file mode 100644 -index 0000000..026fb73 ---- /dev/null -+++ b/sound/spi/Makefile -@@ -0,0 +1,5 @@ -+# Makefile for SPI drivers -+ -+snd-at73c213-objs := at73c213.o -+ -+obj-$(CONFIG_SND_AT73C213) += snd-at73c213.o -diff --git a/sound/spi/at73c213.c b/sound/spi/at73c213.c -new file mode 100644 -index 0000000..f514f47 ---- /dev/null -+++ b/sound/spi/at73c213.c -@@ -0,0 +1,1121 @@ -+/* -+ * Driver for AT73C213 16-bit stereo DAC connected to Atmel SSC -+ * -+ * Copyright (C) 2006-2007 Atmel Norway -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 as published by -+ * the Free Software Foundation. -+ */ -+ -+/*#define DEBUG*/ -+ -+#include <linux/clk.h> -+#include <linux/err.h> -+#include <linux/delay.h> -+#include <linux/device.h> -+#include <linux/dma-mapping.h> -+#include <linux/init.h> -+#include <linux/interrupt.h> -+#include <linux/module.h> -+#include <linux/platform_device.h> -+#include <linux/io.h> -+ -+#include <sound/driver.h> -+#include <sound/initval.h> -+#include <sound/control.h> -+#include <sound/core.h> -+#include <sound/pcm.h> -+ -+#include <linux/atmel-ssc.h> -+ -+#include <linux/spi/spi.h> -+#include <linux/spi/at73c213.h> -+ -+#include "at73c213.h" -+ -+#define BITRATE_MIN 8000 /* Hardware limit? */ -+#define BITRATE_TARGET CONFIG_SND_AT73C213_TARGET_BITRATE -+#define BITRATE_MAX 50000 /* Hardware limit. */ -+ -+/* Initial (hardware reset) AT73C213 register values. */ -+static u8 snd_at73c213_original_image[18] = -+{ -+ 0x00, /* 00 - CTRL */ -+ 0x05, /* 01 - LLIG */ -+ 0x05, /* 02 - RLIG */ -+ 0x08, /* 03 - LPMG */ -+ 0x08, /* 04 - RPMG */ -+ 0x00, /* 05 - LLOG */ -+ 0x00, /* 06 - RLOG */ -+ 0x22, /* 07 - OLC */ -+ 0x09, /* 08 - MC */ -+ 0x00, /* 09 - CSFC */ -+ 0x00, /* 0A - MISC */ -+ 0x00, /* 0B - */ -+ 0x00, /* 0C - PRECH */ -+ 0x05, /* 0D - AUXG */ -+ 0x00, /* 0E - */ -+ 0x00, /* 0F - */ -+ 0x00, /* 10 - RST */ -+ 0x00, /* 11 - PA_CTRL */ -+}; -+ -+struct snd_at73c213 { -+ struct snd_card *card; -+ struct snd_pcm *pcm; -+ struct snd_pcm_substream *substream; -+ struct at73c213_board_info *board; -+ int irq; -+ int period; -+ unsigned long bitrate; -+ struct clk *bitclk; -+ struct ssc_device *ssc; -+ struct spi_device *spi; -+ u8 spi_wbuffer[2]; -+ u8 spi_rbuffer[2]; -+ /* Image of the SPI registers in AT73C213. */ -+ u8 reg_image[18]; -+ /* Protect registers against concurrent access. */ -+ spinlock_t lock; -+}; -+ -+#define get_chip(card) ((struct snd_at73c213 *)card->private_data) -+ -+static int -+snd_at73c213_write_reg(struct snd_at73c213 *chip, u8 reg, u8 val) -+{ -+ struct spi_message msg; -+ struct spi_transfer msg_xfer = { -+ .len = 2, -+ .cs_change = 0, -+ }; -+ int retval; -+ -+ spi_message_init(&msg); -+ -+ chip->spi_wbuffer[0] = reg; -+ chip->spi_wbuffer[1] = val; -+ -+ msg_xfer.tx_buf = chip->spi_wbuffer; -+ msg_xfer.rx_buf = chip->spi_rbuffer; -+ spi_message_add_tail(&msg_xfer, &msg); -+ -+ retval = spi_sync(chip->spi, &msg); -+ -+ if (!retval) -+ chip->reg_image[reg] = val; -+ -+ return retval; -+} -+ -+static struct snd_pcm_hardware snd_at73c213_playback_hw = { -+ .info = SNDRV_PCM_INFO_INTERLEAVED | -+ SNDRV_PCM_INFO_BLOCK_TRANSFER, -+ .formats = SNDRV_PCM_FMTBIT_S16_BE, -+ .rates = SNDRV_PCM_RATE_CONTINUOUS, -+ .rate_min = 8000, /* Replaced by chip->bitrate later. */ -+ .rate_max = 50000, /* Replaced by chip->bitrate later. */ -+ .channels_min = 2, -+ .channels_max = 2, -+ .buffer_bytes_max = 64 * 1024 - 1, -+ .period_bytes_min = 512, -+ .period_bytes_max = 64 * 1024 - 1, -+ .periods_min = 4, -+ .periods_max = 1024, -+}; -+ -+/* -+ * Calculate and set bitrate and divisions. -+ */ -+static int snd_at73c213_set_bitrate(struct snd_at73c213 *chip) -+{ -+ unsigned long ssc_rate = clk_get_rate(chip->ssc->clk); -+ unsigned long dac_rate_new, ssc_div, status; -+ unsigned long ssc_div_max, ssc_div_min; -+ int max_tries; -+ -+ /* -+ * We connect two clocks here, picking divisors so the I2S clocks -+ * out data at the same rate the DAC clocks it in ... and as close -+ * as practical to the desired target rate. -+ * -+ * The DAC master clock (MCLK) is programmable, and is either 256 -+ * or (not here) 384 times the I2S output clock (BCLK). -+ */ -+ -+ /* SSC clock / (bitrate * stereo * 16-bit). */ -+ ssc_div = ssc_rate / (BITRATE_TARGET * 2 * 16); -+ ssc_div_min = ssc_rate / (BITRATE_MAX * 2 * 16); -+ ssc_div_max = ssc_rate / (BITRATE_MIN * 2 * 16); -+ max_tries = (ssc_div_max - ssc_div_min) / 2; -+ -+ if (max_tries < 1) -+ max_tries = 1; -+ -+ /* ssc_div must be a power of 2. */ -+ ssc_div = (ssc_div + 1) & ~1UL; -+ -+ if ((ssc_rate / (ssc_div * 2 * 16)) < BITRATE_MIN) { -+ ssc_div -= 2; -+ if ((ssc_rate / (ssc_div * 2 * 16)) > BITRATE_MAX) -+ return -ENXIO; -+ } -+ -+ /* Search for a possible bitrate. */ -+ do { -+ /* SSC clock / (ssc divider * 16-bit * stereo). */ -+ if ((ssc_rate / (ssc_div * 2 * 16)) < BITRATE_MIN) -+ return -ENXIO; -+ -+ /* 256 / (2 * 16) = 8 */ -+ dac_rate_new = 8 * (ssc_rate / ssc_div); -+ -+ status = clk_round_rate(chip->board->dac_clk, dac_rate_new); -+ if (status < 0) -+ return status; -+ -+ /* Ignore difference smaller than 256 Hz. */ -+ if ((status/256) == (dac_rate_new/256)) -+ goto set_rate; -+ -+ ssc_div += 2; -+ } while (--max_tries); -+ -+ /* Not able to find a valid bitrate. */ -+ return -ENXIO; -+ -+set_rate: -+ status = clk_set_rate(chip->board->dac_clk, status); -+ if (status < 0) -+ return status; -+ -+ /* Set divider in SSC device. */ -+ ssc_writel(chip->ssc->regs, CMR, ssc_div/2); -+ -+ /* SSC clock / (ssc divider * 16-bit * stereo). */ -+ chip->bitrate = ssc_rate / (ssc_div * 16 * 2); -+ -+ dev_info(&chip->spi->dev, -+ "at73c213: supported bitrate is %lu (%lu divider)\n", -+ chip->bitrate, ssc_div); -+ -+ return 0; -+} -+ -+static int snd_at73c213_pcm_open(struct snd_pcm_substream *substream) -+{ -+ struct snd_at73c213 *chip = snd_pcm_substream_chip(substream); -+ struct snd_pcm_runtime *runtime = substream->runtime; -+ -+ snd_at73c213_playback_hw.rate_min = chip->bitrate; -+ snd_at73c213_playback_hw.rate_max = chip->bitrate; -+ runtime->hw = snd_at73c213_playback_hw; -+ chip->substream = substream; -+ -+ return 0; -+} -+ -+static int snd_at73c213_pcm_close(struct snd_pcm_substream *substream) -+{ -+ struct snd_at73c213 *chip = snd_pcm_substream_chip(substream); -+ chip->substream = NULL; -+ return 0; -+} -+ -+static int snd_at73c213_pcm_hw_params(struct snd_pcm_substream *substream, -+ struct snd_pcm_hw_params *hw_params) -+{ -+ return snd_pcm_lib_malloc_pages(substream, -+ params_buffer_bytes(hw_params)); -+} -+ -+static int snd_at73c213_pcm_hw_free(struct snd_pcm_substream *substream) -+{ -+ return snd_pcm_lib_free_pages(substream); -+} -+ -+static int snd_at73c213_pcm_prepare(struct snd_pcm_substream *substream) -+{ -+ struct snd_at73c213 *chip = snd_pcm_substream_chip(substream); -+ struct snd_pcm_runtime *runtime = substream->runtime; -+ int block_size; -+ -+ block_size = frames_to_bytes(runtime, runtime->period_size); -+ -+ chip->period = 0; -+ -+ ssc_writel(chip->ssc->regs, PDC_TPR, -+ (long)runtime->dma_addr); -+ ssc_writel(chip->ssc->regs, PDC_TCR, runtime->period_size * 2); -+ ssc_writel(chip->ssc->regs, PDC_TNPR, -+ (long)runtime->dma_addr + block_size); -+ ssc_writel(chip->ssc->regs, PDC_TNCR, runtime->period_size * 2); -+ -+ return 0; -+} -+ -+static int snd_at73c213_pcm_trigger(struct snd_pcm_substream *substream, -+ int cmd) -+{ -+ struct snd_at73c213 *chip = snd_pcm_substream_chip(substream); -+ int retval = 0; -+ -+ spin_lock(&chip->lock); -+ -+ switch (cmd) { -+ case SNDRV_PCM_TRIGGER_START: -+ ssc_writel(chip->ssc->regs, IER, SSC_BIT(IER_ENDTX)); -+ ssc_writel(chip->ssc->regs, PDC_PTCR, SSC_BIT(PDC_PTCR_TXTEN)); -+ break; -+ case SNDRV_PCM_TRIGGER_STOP: -+ ssc_writel(chip->ssc->regs, PDC_PTCR, SSC_BIT(PDC_PTCR_TXTDIS)); -+ ssc_writel(chip->ssc->regs, IDR, SSC_BIT(IDR_ENDTX)); -+ break; -+ default: -+ dev_dbg(&chip->spi->dev, "spurious command %x\n", cmd); -+ retval = -EINVAL; -+ break; -+ } -+ -+ spin_unlock(&chip->lock); -+ -+ return retval; -+} -+ -+static snd_pcm_uframes_t -+snd_at73c213_pcm_pointer(struct snd_pcm_substream *substream) -+{ -+ struct snd_at73c213 *chip = snd_pcm_substream_chip(substream); -+ struct snd_pcm_runtime *runtime = substream->runtime; -+ snd_pcm_uframes_t pos; -+ unsigned long bytes; -+ -+ bytes = ssc_readl(chip->ssc->regs, PDC_TPR) -+ - (unsigned long)runtime->dma_addr; -+ -+ pos = bytes_to_frames(runtime, bytes); -+ if (pos >= runtime->buffer_size) -+ pos -= runtime->buffer_size; -+ -+ return pos; -+} -+ -+static struct snd_pcm_ops at73c213_playback_ops = { -+ .open = snd_at73c213_pcm_open, -+ .close = snd_at73c213_pcm_close, -+ .ioctl = snd_pcm_lib_ioctl, -+ .hw_params = snd_at73c213_pcm_hw_params, -+ .hw_free = snd_at73c213_pcm_hw_free, -+ .prepare = snd_at73c213_pcm_prepare, -+ .trigger = snd_at73c213_pcm_trigger, -+ .pointer = snd_at73c213_pcm_pointer, -+}; -+ -+static void snd_at73c213_pcm_free(struct snd_pcm *pcm) -+{ -+ struct snd_at73c213 *chip = snd_pcm_chip(pcm); -+ if (chip->pcm) { -+ snd_pcm_lib_preallocate_free_for_all(chip->pcm); -+ chip->pcm = NULL; -+ } -+} -+ -+static int __devinit snd_at73c213_pcm_new(struct snd_at73c213 *chip, int device) -+{ -+ struct snd_pcm *pcm; -+ int retval; -+ -+ retval = snd_pcm_new(chip->card, chip->card->shortname, -+ device, 1, 0, &pcm); -+ if (retval < 0) -+ goto out; -+ -+ pcm->private_data = chip; -+ pcm->private_free = snd_at73c213_pcm_free; -+ pcm->info_flags = SNDRV_PCM_INFO_BLOCK_TRANSFER; -+ strcpy(pcm->name, "at73c213"); -+ chip->pcm = pcm; -+ -+ snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &at73c213_playback_ops); -+ -+ retval = snd_pcm_lib_preallocate_pages_for_all(chip->pcm, -+ SNDRV_DMA_TYPE_DEV, &chip->ssc->pdev->dev, -+ 64 * 1024, 64 * 1024); -+out: -+ return retval; -+} -+ -+static irqreturn_t snd_at73c213_interrupt(int irq, void *dev_id) -+{ -+ struct snd_at73c213 *chip = dev_id; -+ struct snd_pcm_runtime *runtime = chip->substream->runtime; -+ u32 status; -+ int offset; -+ int block_size; -+ int next_period; -+ int retval = IRQ_NONE; -+ -+ spin_lock(&chip->lock); -+ -+ block_size = frames_to_bytes(runtime, runtime->period_size); -+ status = ssc_readl(chip->ssc->regs, IMR); -+ -+ if (status & SSC_BIT(IMR_ENDTX)) { -+ chip->period++; -+ if (chip->period == runtime->periods) -+ chip->period = 0; -+ next_period = chip->period + 1; -+ if (next_period == runtime->periods) -+ next_period = 0; -+ -+ offset = block_size * next_period; -+ -+ ssc_writel(chip->ssc->regs, PDC_TNPR, -+ (long)runtime->dma_addr + offset); -+ ssc_writel(chip->ssc->regs, PDC_TNCR, runtime->period_size * 2); -+ retval = IRQ_HANDLED; -+ } -+ -+ ssc_readl(chip->ssc->regs, IMR); -+ spin_unlock(&chip->lock); -+ -+ if (status & SSC_BIT(IMR_ENDTX)) -+ snd_pcm_period_elapsed(chip->substream); -+ -+ return retval; -+} -+ -+/* -+ * Mixer functions. -+ */ -+static int snd_at73c213_mono_get(struct snd_kcontrol *kcontrol, -+ struct snd_ctl_elem_value *ucontrol) -+{ -+ struct snd_at73c213 *chip = snd_kcontrol_chip(kcontrol); -+ int reg = kcontrol->private_value & 0xff; -+ int shift = (kcontrol->private_value >> 8) & 0xff; -+ int mask = (kcontrol->private_value >> 16) & 0xff; -+ int invert = (kcontrol->private_value >> 24) & 0xff; -+ -+ spin_lock_irq(&chip->lock); -+ -+ ucontrol->value.integer.value[0] = (chip->reg_image[reg] >> shift) & mask; -+ -+ if (invert) -+ ucontrol->value.integer.value[0] = -+ (mask - ucontrol->value.integer.value[0]); -+ -+ spin_unlock_irq(&chip->lock); -+ -+ return 0; -+} -+ -+static int snd_at73c213_mono_put(struct snd_kcontrol *kcontrol, -+ struct snd_ctl_elem_value *ucontrol) -+{ -+ struct snd_at73c213 *chip = snd_kcontrol_chip(kcontrol); -+ int reg = kcontrol->private_value & 0xff; -+ int shift = (kcontrol->private_value >> 8) & 0xff; -+ int mask = (kcontrol->private_value >> 16) & 0xff; -+ int invert = (kcontrol->private_value >> 24) & 0xff; -+ int change, retval; -+ unsigned short val; -+ -+ val = (ucontrol->value.integer.value[0] & mask); -+ if (invert) -+ val = mask - val; -+ val <<= shift; -+ -+ spin_lock_irq(&chip->lock); -+ -+ val = (chip->reg_image[reg] & ~(mask << shift)) | val; -+ change = val != chip->reg_image[reg]; -+ retval = snd_at73c213_write_reg(chip, reg, val); -+ -+ spin_unlock_irq(&chip->lock); -+ -+ if (retval) -+ return retval; -+ -+ return change; -+} -+ -+static int snd_at73c213_stereo_info(struct snd_kcontrol *kcontrol, -+ struct snd_ctl_elem_info *uinfo) -+{ -+ int mask = (kcontrol->private_value >> 24) & 0xff; -+ -+ if (mask == 1) -+ uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN; -+ else -+ uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; -+ -+ uinfo->count = 2; -+ uinfo->value.integer.min = 0; -+ uinfo->value.integer.max = mask; -+ -+ return 0; -+} -+ -+static int snd_at73c213_stereo_get(struct snd_kcontrol *kcontrol, -+ struct snd_ctl_elem_value *ucontrol) -+{ -+ struct snd_at73c213 *chip = snd_kcontrol_chip(kcontrol); -+ int left_reg = kcontrol->private_value & 0xff; -+ int right_reg = (kcontrol->private_value >> 8) & 0xff; -+ int shift_left = (kcontrol->private_value >> 16) & 0x07; -+ int shift_right = (kcontrol->private_value >> 19) & 0x07; -+ int mask = (kcontrol->private_value >> 24) & 0xff; -+ int invert = (kcontrol->private_value >> 22) & 1; -+ -+ spin_lock_irq(&chip->lock); -+ -+ ucontrol->value.integer.value[0] = -+ (chip->reg_image[left_reg] >> shift_left) & mask; -+ ucontrol->value.integer.value[1] = -+ (chip->reg_image[right_reg] >> shift_right) & mask; -+ -+ if (invert) { -+ ucontrol->value.integer.value[0] = -+ (mask - ucontrol->value.integer.value[0]); -+ ucontrol->value.integer.value[1] = -+ (mask - ucontrol->value.integer.value[1]); -+ } -+ -+ spin_unlock_irq(&chip->lock); -+ -+ return 0; -+} -+ -+static int snd_at73c213_stereo_put(struct snd_kcontrol *kcontrol, -+ struct snd_ctl_elem_value *ucontrol) -+{ -+ struct snd_at73c213 *chip = snd_kcontrol_chip(kcontrol); -+ int left_reg = kcontrol->private_value & 0xff; -+ int right_reg = (kcontrol->private_value >> 8) & 0xff; -+ int shift_left = (kcontrol->private_value >> 16) & 0x07; -+ int shift_right = (kcontrol->private_value >> 19) & 0x07; -+ int mask = (kcontrol->private_value >> 24) & 0xff; -+ int invert = (kcontrol->private_value >> 22) & 1; -+ int change, retval; -+ unsigned short val1, val2; -+ -+ val1 = ucontrol->value.integer.value[0] & mask; -+ val2 = ucontrol->value.integer.value[1] & mask; -+ if (invert) { -+ val1 = mask - val1; -+ val2 = mask - val2; -+ } -+ val1 <<= shift_left; -+ val2 <<= shift_right; -+ -+ spin_lock_irq(&chip->lock); -+ -+ val1 = (chip->reg_image[left_reg] & ~(mask << shift_left)) | val1; -+ val2 = (chip->reg_image[right_reg] & ~(mask << shift_right)) | val2; -+ change = val1 != chip->reg_image[left_reg] -+ || val2 != chip->reg_image[right_reg]; -+ retval = snd_at73c213_write_reg(chip, left_reg, val1); -+ if (retval) { -+ spin_unlock_irq(&chip->lock); -+ goto out; -+ } -+ retval = snd_at73c213_write_reg(chip, right_reg, val2); -+ if (retval) { -+ spin_unlock_irq(&chip->lock); -+ goto out; -+ } -+ -+ spin_unlock_irq(&chip->lock); -+ -+ return change; -+ -+out: -+ return retval; -+} -+ -+static int snd_at73c213_mono_switch_info(struct snd_kcontrol *kcontrol, -+ struct snd_ctl_elem_info *uinfo) -+{ -+ uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN; -+ uinfo->count = 1; -+ uinfo->value.integer.min = 0; -+ uinfo->value.integer.max = 1; -+ -+ return 0; -+} -+ -+static int snd_at73c213_mono_switch_get(struct snd_kcontrol *kcontrol, -+ struct snd_ctl_elem_value *ucontrol) -+{ -+ struct snd_at73c213 *chip = snd_kcontrol_chip(kcontrol); -+ int reg = kcontrol->private_value & 0xff; -+ int shift = (kcontrol->private_value >> 8) & 0xff; -+ int invert = (kcontrol->private_value >> 24) & 0xff; -+ -+ spin_lock_irq(&chip->lock); -+ -+ ucontrol->value.integer.value[0] = (chip->reg_image[reg] >> shift) & 0x01; -+ -+ if (invert) -+ ucontrol->value.integer.value[0] = -+ (0x01 - ucontrol->value.integer.value[0]); -+ -+ spin_unlock_irq(&chip->lock); -+ -+ return 0; -+} -+ -+static int snd_at73c213_mono_switch_put(struct snd_kcontrol *kcontrol, -+ struct snd_ctl_elem_value *ucontrol) -+{ -+ struct snd_at73c213 *chip = snd_kcontrol_chip(kcontrol); -+ int reg = kcontrol->private_value & 0xff; -+ int shift = (kcontrol->private_value >> 8) & 0xff; -+ int mask = (kcontrol->private_value >> 16) & 0xff; -+ int invert = (kcontrol->private_value >> 24) & 0xff; -+ int change, retval; -+ unsigned short val; -+ -+ if (ucontrol->value.integer.value[0]) -+ val = mask; -+ else -+ val = 0; -+ -+ if (invert) -+ val = mask - val; -+ val <<= shift; -+ -+ spin_lock_irq(&chip->lock); -+ -+ val |= (chip->reg_image[reg] & ~(mask << shift)); -+ change = val != chip->reg_image[reg]; -+ -+ retval = snd_at73c213_write_reg(chip, reg, val); -+ -+ spin_unlock_irq(&chip->lock); -+ -+ if (retval) -+ return retval; -+ -+ return change; -+} -+ -+static int snd_at73c213_pa_volume_info(struct snd_kcontrol *kcontrol, -+ struct snd_ctl_elem_info *uinfo) -+{ -+ uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; -+ uinfo->count = 1; -+ uinfo->value.integer.min = 0; -+ uinfo->value.integer.max = ((kcontrol->private_value >> 16) & 0xff) - 1; -+ -+ return 0; -+} -+ -+static int snd_at73c213_line_capture_volume_info( -+ struct snd_kcontrol *kcontrol, -+ struct snd_ctl_elem_info *uinfo) -+{ -+ uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; -+ uinfo->count = 2; -+ /* When inverted will give values 0x10001 => 0. */ -+ uinfo->value.integer.min = 14; -+ uinfo->value.integer.max = 31; -+ -+ return 0; -+} -+ -+static int snd_at73c213_aux_capture_volume_info( -+ struct snd_kcontrol *kcontrol, -+ struct snd_ctl_elem_info *uinfo) -+{ -+ uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; -+ uinfo->count = 1; -+ /* When inverted will give values 0x10001 => 0. */ -+ uinfo->value.integer.min = 14; -+ uinfo->value.integer.max = 31; -+ -+ return 0; -+} -+ -+#define AT73C213_MONO_SWITCH(xname, xindex, reg, shift, mask, invert) \ -+{ \ -+ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \ -+ .name = xname, \ -+ .index = xindex, \ -+ .info = snd_at73c213_mono_switch_info, \ -+ .get = snd_at73c213_mono_switch_get, \ -+ .put = snd_at73c213_mono_switch_put, \ -+ .private_value = (reg | (shift << 8) | (mask << 16) | (invert << 24)) \ -+} -+ -+#define AT73C213_STEREO(xname, xindex, left_reg, right_reg, shift_left, shift_right, mask, invert) \ -+{ \ -+ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \ -+ .name = xname, \ -+ .index = xindex, \ -+ .info = snd_at73c213_stereo_info, \ -+ .get = snd_at73c213_stereo_get, \ -+ .put = snd_at73c213_stereo_put, \ -+ .private_value = (left_reg | (right_reg << 8) \ -+ | (shift_left << 16) | (shift_right << 19) \ -+ | (mask << 24) | (invert << 22)) \ -+} -+ -+static struct snd_kcontrol_new snd_at73c213_controls[] __devinitdata = { -+AT73C213_STEREO("Master Playback Volume", 0, DAC_LMPG, DAC_RMPG, 0, 0, 0x1f, 1), -+AT73C213_STEREO("Master Playback Switch", 0, DAC_LMPG, DAC_RMPG, 5, 5, 1, 1), -+AT73C213_STEREO("PCM Playback Volume", 0, DAC_LLOG, DAC_RLOG, 0, 0, 0x1f, 1), -+AT73C213_STEREO("PCM Playback Switch", 0, DAC_LLOG, DAC_RLOG, 5, 5, 1, 1), -+AT73C213_MONO_SWITCH("Mono PA Playback Switch", 0, DAC_CTRL, DAC_CTRL_ONPADRV, 0x01, 0), -+{ -+ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, -+ .name = "PA Playback Volume", -+ .index = 0, -+ .info = snd_at73c213_pa_volume_info, -+ .get = snd_at73c213_mono_get, -+ .put = snd_at73c213_mono_put, -+ .private_value = PA_CTRL | (PA_CTRL_APAGAIN << 8) | (0x0f << 16) | (1 << 24), -+}, -+AT73C213_MONO_SWITCH("PA High Gain Playback Switch", 0, PA_CTRL, PA_CTRL_APALP, 0x01, 1), -+AT73C213_MONO_SWITCH("PA Playback Switch", 0, PA_CTRL, PA_CTRL_APAON, 0x01, 0), -+{ -+ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, -+ .name = "Aux Capture Volume", -+ .index = 0, -+ .info = snd_at73c213_aux_capture_volume_info, -+ .get = snd_at73c213_mono_get, -+ .put = snd_at73c213_mono_put, -+ .private_value = DAC_AUXG | (0 << 8) | (0x1f << 16) | (1 << 24), -+}, -+AT73C213_MONO_SWITCH("Aux Capture Switch", 0, DAC_CTRL, DAC_CTRL_ONAUXIN, 0x01, 0), -+{ -+ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, -+ .name = "Line Capture Volume", -+ .index = 0, -+ .info = snd_at73c213_line_capture_volume_info, -+ .get = snd_at73c213_stereo_get, -+ .put = snd_at73c213_stereo_put, -+ .private_value = DAC_LLIG | (DAC_RLIG << 8) | (0 << 16) | (0 << 19) -+ | (0x1f << 24) | (1 << 22), -+}, -+AT73C213_MONO_SWITCH("Line Capture Switch", 0, DAC_CTRL, 0, 0x03, 0), -+}; -+ -+static int __devinit snd_at73c213_mixer(struct snd_at73c213 *chip) -+{ -+ struct snd_card *card; -+ int errval, idx; -+ -+ if (chip == NULL || chip->pcm == NULL) -+ return -EINVAL; -+ -+ card = chip->card; -+ -+ strcpy(card->mixername, chip->pcm->name); -+ -+ for (idx = 0; idx < ARRAY_SIZE(snd_at73c213_controls); idx++) { -+ errval = snd_ctl_add(card, -+ snd_ctl_new1(&snd_at73c213_controls[idx], -+ chip)); -+ if (errval < 0) -+ goto cleanup; -+ } -+ -+ return 0; -+ -+cleanup: -+ for (idx = 1; idx < ARRAY_SIZE(snd_at73c213_controls) + 1; idx++) { -+ struct snd_kcontrol *kctl; -+ kctl = snd_ctl_find_numid(card, idx); -+ if (kctl) -+ snd_ctl_remove(card, kctl); -+ } -+ return errval; -+} -+ -+/* -+ * Device functions -+ */ -+static int snd_at73c213_ssc_init(struct snd_at73c213 *chip) -+{ -+ /* -+ * Continuous clock output. -+ * Starts on falling TF. -+ * Delay 1 cycle (1 bit). -+ * Periode is 16 bit (16 - 1). -+ */ -+ ssc_writel(chip->ssc->regs, TCMR, -+ SSC_BF(TCMR_CKO, 1) -+ | SSC_BF(TCMR_START, 4) -+ | SSC_BF(TCMR_STTDLY, 1) -+ | SSC_BF(TCMR_PERIOD, 16 - 1)); -+ /* -+ * Data length is 16 bit (16 - 1). -+ * Transmit MSB first. -+ * Transmit 2 words each transfer. -+ * Frame sync length is 16 bit (16 - 1). -+ * Frame starts on negative pulse. -+ */ -+ ssc_writel(chip->ssc->regs, TFMR, -+ SSC_BF(TFMR_DATLEN, 16 - 1) -+ | SSC_BIT(TFMR_MSBF) -+ | SSC_BF(TFMR_DATNB, 1) -+ | SSC_BF(TFMR_FSLEN, 16 - 1) -+ | SSC_BF(TFMR_FSOS, 1)); -+ -+ return 0; -+} -+ -+static int snd_at73c213_chip_init(struct snd_at73c213 *chip) -+{ -+ int retval; -+ unsigned char dac_ctrl = 0; -+ -+ retval = snd_at73c213_set_bitrate(chip); -+ if (retval) -+ goto out; -+ -+ /* Enable DAC master clock. */ -+ clk_enable(chip->board->dac_clk); -+ -+ /* Initialize at73c213 on SPI bus. */ -+ retval = snd_at73c213_write_reg(chip, DAC_RST, 0x04); -+ if (retval) -+ goto out_clk; -+ msleep(1); -+ retval = snd_at73c213_write_reg(chip, DAC_RST, 0x03); -+ if (retval) -+ goto out_clk; -+ -+ /* Precharge everything. */ -+ retval = snd_at73c213_write_reg(chip, DAC_PRECH, 0xff); -+ if (retval) -+ goto out_clk; -+ retval = snd_at73c213_write_reg(chip, PA_CTRL, (1<<PA_CTRL_APAPRECH)); -+ if (retval) -+ goto out_clk; -+ retval = snd_at73c213_write_reg(chip, DAC_CTRL, -+ (1<<DAC_CTRL_ONLNOL) | (1<<DAC_CTRL_ONLNOR)); -+ if (retval) -+ goto out_clk; -+ -+ msleep(50); -+ -+ /* Stop precharging PA. */ -+ retval = snd_at73c213_write_reg(chip, PA_CTRL, -+ (1<<PA_CTRL_APALP) | 0x0f); -+ if (retval) -+ goto out_clk; -+ -+ msleep(450); -+ -+ /* Stop precharging DAC, turn on master power. */ -+ retval = snd_at73c213_write_reg(chip, DAC_PRECH, (1<<DAC_PRECH_ONMSTR)); -+ if (retval) -+ goto out_clk; -+ -+ msleep(1); -+ -+ /* Turn on DAC. */ -+ dac_ctrl = (1<<DAC_CTRL_ONDACL) | (1<<DAC_CTRL_ONDACR) -+ | (1<<DAC_CTRL_ONLNOL) | (1<<DAC_CTRL_ONLNOR); -+ -+ retval = snd_at73c213_write_reg(chip, DAC_CTRL, dac_ctrl); -+ if (retval) -+ goto out_clk; -+ -+ /* Mute sound. */ -+ retval = snd_at73c213_write_reg(chip, DAC_LMPG, 0x3f); -+ if (retval) -+ goto out_clk; -+ retval = snd_at73c213_write_reg(chip, DAC_RMPG, 0x3f); -+ if (retval) -+ goto out_clk; -+ retval = snd_at73c213_write_reg(chip, DAC_LLOG, 0x3f); -+ if (retval) -+ goto out_clk; -+ retval = snd_at73c213_write_reg(chip, DAC_RLOG, 0x3f); -+ if (retval) -+ goto out_clk; -+ retval = snd_at73c213_write_reg(chip, DAC_LLIG, 0x11); -+ if (retval) -+ goto out_clk; -+ retval = snd_at73c213_write_reg(chip, DAC_RLIG, 0x11); -+ if (retval) -+ goto out_clk; -+ retval = snd_at73c213_write_reg(chip, DAC_AUXG, 0x11); -+ if (retval) -+ goto out_clk; -+ -+ /* Enable I2S device, i.e. clock output. */ -+ ssc_writel(chip->ssc->regs, CR, SSC_BIT(CR_TXEN)); -+ -+ goto out; -+ -+out_clk: -+ clk_disable(chip->board->dac_clk); -+out: -+ return retval; -+} -+ -+static int snd_at73c213_dev_free(struct snd_device *device) -+{ -+ struct snd_at73c213 *chip = device->device_data; -+ -+ ssc_writel(chip->ssc->regs, CR, SSC_BIT(CR_TXDIS)); -+ if (chip->irq >= 0) { -+ free_irq(chip->irq, chip); -+ chip->irq = -1; -+ } -+ -+ return 0; -+} -+ -+static int __devinit snd_at73c213_dev_init(struct snd_card *card, -+ struct spi_device *spi) -+{ -+ static struct snd_device_ops ops = { -+ .dev_free = snd_at73c213_dev_free, -+ }; -+ struct snd_at73c213 *chip = get_chip(card); -+ int irq, retval; -+ -+ irq = chip->ssc->irq; -+ if (irq < 0) -+ return irq; -+ -+ spin_lock_init(&chip->lock); -+ chip->card = card; -+ chip->irq = -1; -+ -+ retval = request_irq(irq, snd_at73c213_interrupt, 0, "at73c213", chip); -+ if (retval) { -+ dev_dbg(&chip->spi->dev, "unable to request irq %d\n", irq); -+ goto out; -+ } -+ chip->irq = irq; -+ -+ memcpy(&chip->reg_image, &snd_at73c213_original_image, -+ sizeof(snd_at73c213_original_image)); -+ -+ retval = snd_at73c213_ssc_init(chip); -+ if (retval) -+ goto out_irq; -+ -+ retval = snd_at73c213_chip_init(chip); -+ if (retval) -+ goto out_irq; -+ -+ retval = snd_at73c213_pcm_new(chip, 0); -+ if (retval) -+ goto out_irq; -+ -+ retval = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops); -+ if (retval) -+ goto out_irq; -+ -+ retval = snd_at73c213_mixer(chip); -+ if (retval) -+ goto out_snd_dev; -+ -+ snd_card_set_dev(card, &spi->dev); -+ -+ goto out; -+ -+out_snd_dev: -+ snd_device_free(card, chip); -+out_irq: -+ free_irq(chip->irq, chip); -+ chip->irq = -1; -+out: -+ return retval; -+} -+ -+static int snd_at73c213_probe(struct spi_device *spi) -+{ -+ struct snd_card *card; -+ struct snd_at73c213 *chip; -+ struct at73c213_board_info *board; -+ int retval; -+ char id[16]; -+ -+ board = spi->dev.platform_data; -+ if (!board) { -+ dev_dbg(&spi->dev, "no platform_data\n"); -+ return -ENXIO; -+ } -+ -+ if (!board->dac_clk) { -+ dev_dbg(&spi->dev, "no DAC clk\n"); -+ return -ENXIO; -+ } -+ -+ if (IS_ERR(board->dac_clk)) { -+ dev_dbg(&spi->dev, "no DAC clk\n"); -+ return PTR_ERR(board->dac_clk); -+ } -+ -+ retval = -ENOMEM; -+ -+ /* Allocate "card" using some unused identifiers. */ -+ snprintf(id, sizeof id, "at73c213_%d", board->ssc_id); -+ card = snd_card_new(-1, id, THIS_MODULE, sizeof(struct snd_at73c213)); -+ if (!card) -+ goto out; -+ -+ chip = card->private_data; -+ chip->spi = spi; -+ chip->board = board; -+ -+ chip->ssc = ssc_request(board->ssc_id); -+ if (IS_ERR(chip->ssc)) { -+ dev_dbg(&spi->dev, "could not get ssc%d device\n", -+ board->ssc_id); -+ retval = PTR_ERR(chip->ssc); -+ goto out_card; -+ } -+ -+ retval = snd_at73c213_dev_init(card, spi); -+ if (retval) -+ goto out_ssc; -+ -+ strcpy(card->driver, "at73c213"); -+ strcpy(card->shortname, board->shortname); -+ sprintf(card->longname, "%s on irq %d", card->shortname, chip->irq); -+ -+ retval = snd_card_register(card); -+ if (retval) -+ goto out_ssc; -+ -+ dev_set_drvdata(&spi->dev, card); -+ -+ goto out; -+ -+out_ssc: -+ ssc_free(chip->ssc); -+out_card: -+ snd_card_free(card); -+out: -+ return retval; -+} -+ -+static int __devexit snd_at73c213_remove(struct spi_device *spi) -+{ -+ struct snd_card *card = dev_get_drvdata(&spi->dev); -+ struct snd_at73c213 *chip = card->private_data; -+ int retval; -+ -+ /* Stop playback. */ -+ ssc_writel(chip->ssc->regs, CR, SSC_BIT(CR_TXDIS)); -+ -+ /* Mute sound. */ -+ retval = snd_at73c213_write_reg(chip, DAC_LMPG, 0x3f); -+ if (retval) -+ goto out; -+ retval = snd_at73c213_write_reg(chip, DAC_RMPG, 0x3f); -+ if (retval) -+ goto out; -+ retval = snd_at73c213_write_reg(chip, DAC_LLOG, 0x3f); -+ if (retval) -+ goto out; -+ retval = snd_at73c213_write_reg(chip, DAC_RLOG, 0x3f); -+ if (retval) -+ goto out; -+ retval = snd_at73c213_write_reg(chip, DAC_LLIG, 0x11); -+ if (retval) -+ goto out; -+ retval = snd_at73c213_write_reg(chip, DAC_RLIG, 0x11); -+ if (retval) -+ goto out; -+ retval = snd_at73c213_write_reg(chip, DAC_AUXG, 0x11); -+ if (retval) -+ goto out; -+ -+ /* Turn off PA. */ -+ retval = snd_at73c213_write_reg(chip, PA_CTRL, (chip->reg_image[PA_CTRL]|0x0f)); -+ if (retval) -+ goto out; -+ msleep(10); -+ retval = snd_at73c213_write_reg(chip, PA_CTRL, (1<<PA_CTRL_APALP)|0x0f); -+ if (retval) -+ goto out; -+ -+ /* Turn off external DAC. */ -+ retval = snd_at73c213_write_reg(chip, DAC_CTRL, 0x0c); -+ if (retval) -+ goto out; -+ msleep(2); -+ retval = snd_at73c213_write_reg(chip, DAC_CTRL, 0x00); -+ if (retval) -+ goto out; -+ -+ /* Turn off master power. */ -+ retval = snd_at73c213_write_reg(chip, DAC_PRECH, 0x00); -+ if (retval) -+ goto out; -+ -+out: -+ /* Stop DAC master clock. */ -+ clk_disable(chip->board->dac_clk); -+ -+ ssc_free(chip->ssc); -+ snd_card_free(card); -+ dev_set_drvdata(&spi->dev, NULL); -+ -+ return 0; -+} -+ -+#ifdef CONFIG_PM -+static int snd_at73c213_suspend(struct spi_device *spi, pm_message_t msg) -+{ -+ struct snd_card *card = dev_get_drvdata(&spi->dev); -+ struct snd_at73c213 *chip = card->private_data; -+ -+ ssc_writel(chip->ssc->regs, CR, SSC_BIT(CR_TXDIS)); -+ clk_disable(chip->board->dac_clk); -+ -+ return 0; -+} -+ -+static int snd_at73c213_resume(struct spi_device *spi) -+{ -+ struct snd_card *card = dev_get_drvdata(&spi->dev); -+ struct snd_at73c213 *chip = card->private_data; -+ -+ clk_enable(chip->board->dac_clk); -+ ssc_writel(chip->ssc->regs, CR, SSC_BIT(CR_TXEN)); -+ -+ return 0; -+} -+#else -+#define snd_at73c213_suspend NULL -+#define snd_at73c213_resume NULL -+#endif -+ -+static struct spi_driver at73c213_driver = { -+ .driver = { -+ .name = "at73c213", -+ }, -+ .probe = snd_at73c213_probe, -+ .suspend = snd_at73c213_suspend, -+ .resume = snd_at73c213_resume, -+ .remove = __devexit_p(snd_at73c213_remove), -+}; -+ -+static int __init at73c213_init(void) -+{ -+ return spi_register_driver(&at73c213_driver); -+} -+module_init(at73c213_init); -+ -+static void __exit at73c213_exit(void) -+{ -+ spi_unregister_driver(&at73c213_driver); -+} -+module_exit(at73c213_exit); -+ -+MODULE_AUTHOR("Hans-Christian Egtvedt <hcegtvedt@atmel.com>"); -+MODULE_DESCRIPTION("Sound driver for AT73C213 with Atmel SSC"); -+MODULE_LICENSE("GPL"); -diff --git a/sound/spi/at73c213.h b/sound/spi/at73c213.h -new file mode 100644 -index 0000000..fd8b372 ---- /dev/null -+++ b/sound/spi/at73c213.h -@@ -0,0 +1,119 @@ -+/* -+ * Driver for the AT73C213 16-bit stereo DAC on Atmel ATSTK1000 -+ * -+ * Copyright (C) 2006 - 2007 Atmel Corporation -+ * -+ * This program is free software; you can redistribute it and/or -+ * modify it under the terms of the GNU General Public License as -+ * published by the Free Software Foundation; either version 2 of the -+ * License, or (at your option) any later version. -+ * -+ * This program is distributed in the hope that it will be useful, but -+ * WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU -+ * General Public License for more details. -+ * -+ * You should have received a copy of the GNU General Public License -+ * along with this program; if not, write to the Free Software -+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA -+ * 02111-1307, USA. -+ * -+ * The full GNU General Public License is included in this -+ * distribution in the file called COPYING. -+ */ -+ -+#ifndef _SND_AT73C213_H -+#define _SND_AT73C213_H -+ -+/* DAC control register */ -+#define DAC_CTRL 0x00 -+#define DAC_CTRL_ONPADRV 7 -+#define DAC_CTRL_ONAUXIN 6 -+#define DAC_CTRL_ONDACR 5 -+#define DAC_CTRL_ONDACL 4 -+#define DAC_CTRL_ONLNOR 3 -+#define DAC_CTRL_ONLNOL 2 -+#define DAC_CTRL_ONLNIR 1 -+#define DAC_CTRL_ONLNIL 0 -+ -+/* DAC left line in gain register */ -+#define DAC_LLIG 0x01 -+#define DAC_LLIG_LLIG 0 -+ -+/* DAC right line in gain register */ -+#define DAC_RLIG 0x02 -+#define DAC_RLIG_RLIG 0 -+ -+/* DAC Left Master Playback Gain Register */ -+#define DAC_LMPG 0x03 -+#define DAC_LMPG_LMPG 0 -+ -+/* DAC Right Master Playback Gain Register */ -+#define DAC_RMPG 0x04 -+#define DAC_RMPG_RMPG 0 -+ -+/* DAC Left Line Out Gain Register */ -+#define DAC_LLOG 0x05 -+#define DAC_LLOG_LLOG 0 -+ -+/* DAC Right Line Out Gain Register */ -+#define DAC_RLOG 0x06 -+#define DAC_RLOG_RLOG 0 -+ -+/* DAC Output Level Control Register */ -+#define DAC_OLC 0x07 -+#define DAC_OLC_RSHORT 7 -+#define DAC_OLC_ROLC 4 -+#define DAC_OLC_LSHORT 3 -+#define DAC_OLC_LOLC 0 -+ -+/* DAC Mixer Control Register */ -+#define DAC_MC 0x08 -+#define DAC_MC_INVR 5 -+#define DAC_MC_INVL 4 -+#define DAC_MC_RMSMIN2 3 -+#define DAC_MC_RMSMIN1 2 -+#define DAC_MC_LMSMIN2 1 -+#define DAC_MC_LMSMIN1 0 -+ -+/* DAC Clock and Sampling Frequency Control Register */ -+#define DAC_CSFC 0x09 -+#define DAC_CSFC_OVRSEL 4 -+ -+/* DAC Miscellaneous Register */ -+#define DAC_MISC 0x0A -+#define DAC_MISC_VCMCAPSEL 7 -+#define DAC_MISC_DINTSEL 4 -+#define DAC_MISC_DITHEN 3 -+#define DAC_MISC_DEEMPEN 2 -+#define DAC_MISC_NBITS 0 -+ -+/* DAC Precharge Control Register */ -+#define DAC_PRECH 0x0C -+#define DAC_PRECH_PRCHGPDRV 7 -+#define DAC_PRECH_PRCHGAUX1 6 -+#define DAC_PRECH_PRCHGLNOR 5 -+#define DAC_PRECH_PRCHGLNOL 4 -+#define DAC_PRECH_PRCHGLNIR 3 -+#define DAC_PRECH_PRCHGLNIL 2 -+#define DAC_PRECH_PRCHG 1 -+#define DAC_PRECH_ONMSTR 0 -+ -+/* DAC Auxiliary Input Gain Control Register */ -+#define DAC_AUXG 0x0D -+#define DAC_AUXG_AUXG 0 -+ -+/* DAC Reset Register */ -+#define DAC_RST 0x10 -+#define DAC_RST_RESMASK 2 -+#define DAC_RST_RESFILZ 1 -+#define DAC_RST_RSTZ 0 -+ -+/* Power Amplifier Control Register */ -+#define PA_CTRL 0x11 -+#define PA_CTRL_APAON 6 -+#define PA_CTRL_APAPRECH 5 -+#define PA_CTRL_APALP 4 -+#define PA_CTRL_APAGAIN 0 -+ -+#endif /* _SND_AT73C213_H */ diff --git a/target/device/Atmel/arch-avr32/kernel-patches-2.6.22.10/linux-2.6.22.10-500-gpio_mouse-setup-for-atstk1000-board.patch b/target/device/Atmel/arch-avr32/kernel-patches-2.6.22.10/linux-2.6.22.10-500-gpio_mouse-setup-for-atstk1000-board.patch deleted file mode 100644 index 330f9e0c4..000000000 --- a/target/device/Atmel/arch-avr32/kernel-patches-2.6.22.10/linux-2.6.22.10-500-gpio_mouse-setup-for-atstk1000-board.patch +++ /dev/null @@ -1,130 +0,0 @@ ->From 9c5fa914202d20756c56e0c4fd76035ed8f8ced8 Mon Sep 17 00:00:00 2001 -From: Hans-Christian Egtvedt <hcegtvedt@atmel.com> -Date: Mon, 6 Aug 2007 08:31:14 +0200 -Subject: [PATCH 1/1] Add gpio_mouse board setup to atstk1000 board - -This patch adds a gpio_mouse_platform_data to the atstk1000 board code and -registers a gpio_mouse platform_device. This will enable a GPIO mouse on header -J1 on GPIO of the ATSTK1000 development kit. The board code is enabled/disabled -in menuconfig. - -By connecting J1 (GPIO) to J25 (SWITCH) you can use the following keys to -simulate a mouse: - -SW0: right -SW1: down -SW2: up -SW3: left -SW5: right button -SW6: middle button -SW7: left button - -Signed-off-by: Hans-Christian Egtvedt <hcegtvedt@atmel.com> ---- - arch/avr32/boards/atstk1000/Kconfig | 16 ++++++++++ - arch/avr32/boards/atstk1000/atstk1002.c | 48 +++++++++++++++++++++++++++++++ - 2 files changed, 64 insertions(+), 0 deletions(-) - -diff --git a/arch/avr32/boards/atstk1000/Kconfig b/arch/avr32/boards/atstk1000/Kconfig -index 718578f..d99d4bd 100644 ---- a/arch/avr32/boards/atstk1000/Kconfig -+++ b/arch/avr32/boards/atstk1000/Kconfig -@@ -50,6 +50,22 @@ config BOARD_ATSTK1002_SPI1 - GPIO lines and accessed through the J1 jumper block. Say "y" - here to configure that SPI controller. - -+config BOARD_ATSTK1002_GPIO_MOUSE -+ bool "Configure gpio_mouse on GPIO J1 header" -+ depends on !BOARD_ATSTK1002_SW4_CUSTOM -+ help -+ Enable gpio_mouse board configuration on GPIO 0 to 7. Connecting a -+ 10-pin flat cable from J1 (GPIO) to J25 (SWITCH) will let a user give -+ mouse inputs using the the switches SW0 to SW7. -+ -+ SW0: right -+ SW1: down -+ SW2: up -+ SW3: left -+ SW5: right button -+ SW6: middle button -+ SW7: left button -+ - config BOARD_ATSTK1002_J2_LED - bool - default BOARD_ATSTK1002_J2_LED8 || BOARD_ATSTK1002_J2_RGB -diff --git a/arch/avr32/boards/atstk1000/atstk1002.c b/arch/avr32/boards/atstk1000/atstk1002.c -index c958fd4..c7560e5 100644 ---- a/arch/avr32/boards/atstk1000/atstk1002.c -+++ b/arch/avr32/boards/atstk1000/atstk1002.c -@@ -17,6 +17,7 @@ - #include <linux/types.h> - #include <linux/spi/spi.h> - #include <linux/spi/at73c213.h> -+#include <linux/gpio_mouse.h> - - #include <video/atmel_lcdc.h> - -@@ -91,6 +92,49 @@ static struct mci_platform_data __initdata mci0_data = { - .wp_pin = GPIO_PIN_NONE, - }; - -+#ifdef CONFIG_BOARD_ATSTK1002_GPIO_MOUSE -+static struct gpio_mouse_platform_data gpio_mouse0_data = { -+ .polarity = GPIO_MOUSE_POLARITY_ACT_LOW, -+ { -+ { -+ .up = GPIO_PIN_PB(2), -+ .down = GPIO_PIN_PB(1), -+ .left = GPIO_PIN_PB(3), -+ .right = GPIO_PIN_PB(0), -+ .bleft = GPIO_PIN_PB(7), -+ .bmiddle = GPIO_PIN_PB(6), -+ .bright = GPIO_PIN_PB(5), -+ }, -+ }, -+ .scan_ms = 10, -+}; -+ -+static struct platform_device gpio_mouse0_device = { -+ .name = "gpio_mouse", -+ .id = 0, -+ .dev = { -+ .platform_data = &gpio_mouse0_data, -+ }, -+}; -+ -+static void __init add_device_gpio_mouse0(void) -+{ -+ struct platform_device *pdev = &gpio_mouse0_device; -+ struct gpio_mouse_platform_data *data = pdev->dev.platform_data; -+ -+ at32_select_gpio(data->up, 0); -+ at32_select_gpio(data->down, 0); -+ at32_select_gpio(data->left, 0); -+ at32_select_gpio(data->right, 0); -+ -+ at32_select_gpio(data->bleft, 0); -+ at32_select_gpio(data->bmiddle, 0); -+ at32_select_gpio(data->bright, 0); -+ -+ platform_device_register(pdev); -+} -+#endif -+ - /* - * The next two functions should go away as the boot loader is - * supposed to initialize the macb address registers with a valid -@@ -321,6 +365,10 @@ static int __init atstk1002_init(void) - #endif - #endif - -+#ifdef CONFIG_BOARD_ATSTK1002_GPIO_MOUSE -+ add_device_gpio_mouse0(); -+#endif -+ - return 0; - } - postcore_initcall(atstk1002_init); --- -1.5.2.3 - diff --git a/target/device/Atmel/arch-avr32/kernel-patches-2.6.22.10/linux-2.6.22.10-501-atmel_mci-minor-fixes-and-cleanups.patch b/target/device/Atmel/arch-avr32/kernel-patches-2.6.22.10/linux-2.6.22.10-501-atmel_mci-minor-fixes-and-cleanups.patch deleted file mode 100644 index 0c4c1d0af..000000000 --- a/target/device/Atmel/arch-avr32/kernel-patches-2.6.22.10/linux-2.6.22.10-501-atmel_mci-minor-fixes-and-cleanups.patch +++ /dev/null @@ -1,290 +0,0 @@ -From: Haavard Skinnemoen <hskinnemoen@atmel.com> -Subject: [PATCH 1/2] atmel_mci: Minor fixes and cleanups - - * Use ios->clock to define when to enable the controller instead of - ios->power_mode. - * Send initialization command (74 idle clock cycles) when power_mode - is set to MMC_POWER_ON. - * Use dev_dbg() and friends instead of pr_debug() and printk(). - * Don't print data- or probe errors when debugging is not enabled. - * Adjust ocr_avail range to 3.2V-3.4V using proper constants. - -Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com> ---- - drivers/mmc/host/atmel-mci.c | 120 ++++++++++++++++++++++------------------- - 1 files changed, 64 insertions(+), 56 deletions(-) - -diff --git a/drivers/mmc/host/atmel-mci.c b/drivers/mmc/host/atmel-mci.c -index 74d343f..1dc91b4 100644 ---- a/drivers/mmc/host/atmel-mci.c -+++ b/drivers/mmc/host/atmel-mci.c -@@ -464,9 +464,8 @@ static void atmci_set_timeout(struct atmel_mci *host, - dtocyc = 15; - } - -- pr_debug("%s: setting timeout to %u cycles\n", -- mmc_hostname(host->mmc), -- dtocyc << dtomul_to_shift[dtomul]); -+ dev_dbg(&host->mmc->class_dev, "setting timeout to %u cycles\n", -+ dtocyc << dtomul_to_shift[dtomul]); - mci_writel(host, DTOR, (MCI_BF(DTOMUL, dtomul) - | MCI_BF(DTOCYC, dtocyc))); - } -@@ -508,9 +507,9 @@ static u32 atmci_prepare_command(struct mmc_host *mmc, - if (!(cmd->flags & MMC_RSP_CRC)) - iflags &= ~MCI_BIT(RCRCE); - -- pr_debug("%s: cmd: op %02x arg %08x flags %08x, cmdflags %08lx\n", -- mmc_hostname(mmc), cmd->opcode, cmd->arg, cmd->flags, -- (unsigned long)cmdr); -+ dev_dbg(&mmc->class_dev, -+ "cmd: op %02x arg %08x flags %08x, cmdflags %08lx\n", -+ cmd->opcode, cmd->arg, cmd->flags, (unsigned long)cmdr); - - *cmd_flags = cmdr; - return iflags; -@@ -589,7 +588,8 @@ static void atmci_request(struct mmc_host *mmc, struct mmc_request *mrq) - - iflags = mci_readl(host, IMR); - if (iflags) -- printk("WARNING: IMR=0x%08x\n", mci_readl(host, IMR)); -+ dev_warn(&mmc->class_dev, "WARNING: IMR=0x%08x\n", -+ mci_readl(host, IMR)); - - WARN_ON(host->mrq != NULL); - host->mrq = mrq; -@@ -623,16 +623,30 @@ static void atmci_request(struct mmc_host *mmc, struct mmc_request *mrq) - static void atmci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios) - { - struct atmel_mci *host = mmc_priv(mmc); -+ u32 mr; - - if (ios->clock) { - u32 clkdiv; - -+ /* Set clock rate */ - clkdiv = host->bus_hz / (2 * ios->clock) - 1; -- if (clkdiv > 255) -+ if (clkdiv > 255) { -+ dev_warn(&mmc->class_dev, -+ "clock %u too slow; using %lu\n", -+ ios->clock, host->bus_hz / (2 * 256)); - clkdiv = 255; -- mci_writel(host, MR, (clkdiv -- | MCI_BIT(WRPROOF) -- | MCI_BIT(RDPROOF))); -+ } -+ -+ mr = mci_readl(host, MR); -+ mr = MCI_BFINS(CLKDIV, clkdiv, mr) -+ | MCI_BIT(WRPROOF) | MCI_BIT(RDPROOF); -+ mci_writel(host, MR, mr); -+ -+ /* Enable the MCI controller */ -+ mci_writel(host, CR, MCI_BIT(MCIEN)); -+ } else { -+ /* Disable the MCI controller */ -+ mci_writel(host, CR, MCI_BIT(MCIDIS)); - } - - switch (ios->bus_width) { -@@ -645,14 +659,19 @@ static void atmci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios) - } - - switch (ios->power_mode) { -- case MMC_POWER_OFF: -- mci_writel(host, CR, MCI_BIT(MCIDIS)); -- break; -- case MMC_POWER_UP: -- mci_writel(host, CR, MCI_BIT(SWRST)); -- break; - case MMC_POWER_ON: -- mci_writel(host, CR, MCI_BIT(MCIEN)); -+ /* Send init sequence (74 clock cycles) */ -+ mci_writel(host, IDR, ~0UL); -+ mci_writel(host, CMDR, MCI_BF(SPCMD, MCI_SPCMD_INIT_CMD)); -+ while (!(mci_readl(host, SR) & MCI_BIT(CMDRDY))) -+ cpu_relax(); -+ break; -+ default: -+ /* -+ * TODO: None of the currently available AVR32-based -+ * boards allow MMC power to be turned off. Implement -+ * power control when this can be tested properly. -+ */ - break; - } - } -@@ -664,11 +683,12 @@ static int atmci_get_ro(struct mmc_host *mmc) - - if (host->wp_pin >= 0) { - read_only = gpio_get_value(host->wp_pin); -- pr_debug("%s: card is %s\n", mmc_hostname(mmc), -- read_only ? "read-only" : "read-write"); -+ dev_dbg(&mmc->class_dev, "card is %s\n", -+ read_only ? "read-only" : "read-write"); - } else { -- pr_debug("%s: no pin for checking read-only switch." -- " Assuming write-enable.\n", mmc_hostname(mmc)); -+ dev_dbg(&mmc->class_dev, -+ "no pin for checking read-only switch." -+ " Assuming write-enable.\n"); - } - - return read_only; -@@ -719,8 +739,7 @@ static void atmci_command_error(struct mmc_host *mmc, - struct mmc_command *cmd, - u32 status) - { -- pr_debug("%s: command error: status=0x%08x\n", -- mmc_hostname(mmc), status); -+ dev_dbg(&mmc->class_dev, "command error: status=0x%08x\n", status); - - if (status & MCI_BIT(RTOE)) - cmd->error = MMC_ERR_TIMEOUT; -@@ -737,7 +756,8 @@ static void atmci_tasklet_func(unsigned long priv) - struct mmc_request *mrq = host->mrq; - struct mmc_data *data = host->data; - -- pr_debug("atmci_tasklet: pending/completed/mask %lx/%lx/%x\n", -+ dev_dbg(&mmc->class_dev, -+ "tasklet: pending/completed/mask %lx/%lx/%x\n", - host->pending_events, host->completed_events, - mci_readl(host, IMR)); - -@@ -784,8 +804,8 @@ static void atmci_tasklet_func(unsigned long priv) - /* DMA controller got bus error => invalid address */ - data->error = MMC_ERR_INVALID; - -- printk(KERN_DEBUG "%s: dma error after %u bytes xfered\n", -- mmc_hostname(mmc), host->data->bytes_xfered); -+ dev_dbg(&mmc->class_dev, "dma error after %u bytes xfered\n", -+ host->data->bytes_xfered); - - if (data->stop - && !mci_set_stop_sent_is_completed(host)) -@@ -803,24 +823,18 @@ static void atmci_tasklet_func(unsigned long priv) - dma_stop_request(host->dma.req.req.dmac, - host->dma.req.req.channel); - -- printk(KERN_DEBUG "%s: data error: status=0x%08x\n", -- mmc_hostname(host->mmc), status); -- - if (status & MCI_BIT(DCRCE)) { -- printk(KERN_DEBUG "%s: Data CRC error\n", -- mmc_hostname(host->mmc)); -+ dev_dbg(&mmc->class_dev, "data CRC error\n"); - data->error = MMC_ERR_BADCRC; - } else if (status & MCI_BIT(DTOE)) { -- printk(KERN_DEBUG "%s: Data Timeout error\n", -- mmc_hostname(host->mmc)); -+ dev_dbg(&mmc->class_dev, "data timeout error\n"); - data->error = MMC_ERR_TIMEOUT; - } else { -- printk(KERN_DEBUG "%s: Data FIFO error\n", -- mmc_hostname(host->mmc)); -+ dev_dbg(&mmc->class_dev, "data FIFO error\n"); - data->error = MMC_ERR_FIFO; - } -- printk(KERN_DEBUG "%s: Bytes xfered: %u\n", -- mmc_hostname(host->mmc), data->bytes_xfered); -+ dev_dbg(&mmc->class_dev, "bytes xfered: %u\n", -+ data->bytes_xfered); - - if (data->stop - && !mci_set_stop_sent_is_completed(host)) -@@ -998,8 +1012,8 @@ static irqreturn_t atmci_detect_change(int irq, void *dev_id) - int present = !gpio_get_value(irq_to_gpio(irq)); - - if (present != host->present) { -- pr_debug("%s: card %s\n", mmc_hostname(host->mmc), -- present ? "inserted" : "removed"); -+ dev_dbg(&mmc->class_dev, "card %s\n", -+ present ? "inserted" : "removed"); - host->present = present; - mci_set_card_detect_pending(host); - tasklet_schedule(&host->tasklet); -@@ -1058,7 +1072,7 @@ static int __devinit atmci_probe(struct platform_device *pdev) - mmc->ops = &atmci_ops; - mmc->f_min = (host->bus_hz + 511) / 512; - mmc->f_max = min((unsigned int)(host->bus_hz / 2), fmax); -- mmc->ocr_avail = 0x00100000; -+ mmc->ocr_avail = MMC_VDD_32_33 | MMC_VDD_33_34; - mmc->caps |= MMC_CAP_4_BIT_DATA; - - tasklet_init(&host->tasklet, atmci_tasklet_func, (unsigned long)mmc); -@@ -1071,8 +1085,7 @@ static int __devinit atmci_probe(struct platform_device *pdev) - host->present = 1; - if (host->detect_pin >= 0) { - if (gpio_request(host->detect_pin, "mmc_detect")) { -- printk(KERN_WARNING "%s: no detect pin available\n", -- mmc_hostname(host->mmc)); -+ dev_dbg(&mmc->class_dev, "no detect pin available\n"); - host->detect_pin = -1; - } else { - host->present = !gpio_get_value(host->detect_pin); -@@ -1080,8 +1093,7 @@ static int __devinit atmci_probe(struct platform_device *pdev) - } - if (host->wp_pin >= 0) { - if (gpio_request(host->wp_pin, "mmc_wp")) { -- printk(KERN_WARNING "%s: no WP pin available\n", -- mmc_hostname(host->mmc)); -+ dev_dbg(&mmc->class_dev, "no WP pin available\n"); - host->wp_pin = -1; - } - } -@@ -1090,14 +1102,12 @@ static int __devinit atmci_probe(struct platform_device *pdev) - ret = -ENOMEM; - host->dma.req.req.dmac = find_dma_controller(0); - if (!host->dma.req.req.dmac) { -- printk(KERN_ERR -- "mmci: No DMA controller available, aborting\n"); -+ dev_dbg(&mmc->class_dev, "no DMA controller available\n"); - goto out_free_irq; - } - ret = dma_alloc_channel(host->dma.req.req.dmac); - if (ret < 0) { -- printk(KERN_ERR -- "mmci: Unable to allocate DMA channel, aborting\n"); -+ dev_dbg(&mmc->class_dev, "unable to allocate DMA channel\n"); - goto out_free_irq; - } - host->dma.req.req.channel = ret; -@@ -1110,7 +1120,6 @@ static int __devinit atmci_probe(struct platform_device *pdev) - - mci_writel(host, CR, MCI_BIT(SWRST)); - mci_writel(host, IDR, ~0UL); -- mci_writel(host, CR, MCI_BIT(MCIEN)); - - platform_set_drvdata(pdev, host); - -@@ -1122,17 +1131,16 @@ static int __devinit atmci_probe(struct platform_device *pdev) - IRQF_TRIGGER_FALLING | IRQF_TRIGGER_RISING, - DRIVER_NAME, mmc); - if (ret) { -- printk(KERN_ERR -- "%s: could not request IRQ %d for detect pin\n", -- mmc_hostname(mmc), -- gpio_to_irq(host->detect_pin)); -+ dev_dbg(&mmc->class_dev, -+ "could not request IRQ %d for detect pin\n", -+ gpio_to_irq(host->detect_pin)); - gpio_free(host->detect_pin); - host->detect_pin = -1; - } - } - -- printk(KERN_INFO "%s: Atmel MCI controller at 0x%08lx irq %d\n", -- mmc_hostname(mmc), host->mapbase, irq); -+ dev_info(&mmc->class_dev, "Atmel MCI controller at 0x%08lx irq %d\n", -+ host->mapbase, irq); - - atmci_init_debugfs(host); - --- -1.5.3.2 - -_______________________________________________ -Kernel mailing list -Kernel@avr32linux.org -http://duppen.flaskehals.net/cgi-bin/mailman/listinfo/kernel diff --git a/target/device/Atmel/arch-avr32/kernel-patches-2.6.22.10/linux-2.6.22.10-502-atmel_mci-fix-two-subtle-but-deadly-races.patch b/target/device/Atmel/arch-avr32/kernel-patches-2.6.22.10/linux-2.6.22.10-502-atmel_mci-fix-two-subtle-but-deadly-races.patch deleted file mode 100644 index be99b8346..000000000 --- a/target/device/Atmel/arch-avr32/kernel-patches-2.6.22.10/linux-2.6.22.10-502-atmel_mci-fix-two-subtle-but-deadly-races.patch +++ /dev/null @@ -1,438 +0,0 @@ -From: Haavard Skinnemoen <hskinnemoen@atmel.com> -Subject: [PATCH 2/2] atmel_mci: Fix two subtle but deadly races - -This patch fixes two possible races in the atmel_mci driver, at least -one of which may cause card probing to fail. - -The first one may happen if a command fails and the next command is -queued before the controller is ready to accept a new one. Fix this by -not enabling error interrupts for commands and instead do any error -handling when the CMDRDY bit has been set. - -The second one may happen after a successful read data transfer where -then next command is queued after the DMA transfer is complete, but -before the whole data transfer from the card is complete (i.e. the -card is still sending CRC, for example.) Fix this by waiting for the -NOTBUSY bit to be set before considering the request to be done. This -will also ensure that we actually see any CRC failures before -completing the request. - -Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com> ---- - drivers/mmc/host/atmel-mci.c | 172 +++++++++++++----------------------------- - 1 files changed, 54 insertions(+), 118 deletions(-) - -diff --git a/drivers/mmc/host/atmel-mci.c b/drivers/mmc/host/atmel-mci.c -index 1dc91b4..45323c9 100644 ---- a/drivers/mmc/host/atmel-mci.c -+++ b/drivers/mmc/host/atmel-mci.c -@@ -28,20 +28,15 @@ - - #define DRIVER_NAME "atmel_mci" - --#define MCI_CMD_ERROR_FLAGS (MCI_BIT(RINDE) | MCI_BIT(RDIRE) | \ -- MCI_BIT(RCRCE) | MCI_BIT(RENDE) | \ -- MCI_BIT(RTOE)) - #define MCI_DATA_ERROR_FLAGS (MCI_BIT(DCRCE) | MCI_BIT(DTOE) | \ - MCI_BIT(OVRE) | MCI_BIT(UNRE)) - - enum { - EVENT_CMD_COMPLETE = 0, -- EVENT_CMD_ERROR, - EVENT_DATA_COMPLETE, - EVENT_DATA_ERROR, - EVENT_STOP_SENT, - EVENT_STOP_COMPLETE, -- EVENT_STOP_ERROR, - EVENT_DMA_ERROR, - EVENT_CARD_DETECT, - }; -@@ -61,13 +56,14 @@ struct atmel_mci { - struct mmc_command *cmd; - struct mmc_data *data; - -+ u32 cmd_status; -+ u32 data_status; -+ u32 stop_status; - u32 stop_cmdr; -- u32 stop_iflags; - - struct tasklet_struct tasklet; - unsigned long pending_events; - unsigned long completed_events; -- u32 error_status; - - int present; - int detect_pin; -@@ -99,8 +95,6 @@ MODULE_PARM_DESC(fmax, "Max frequency in Hz of the MMC bus clock"); - /* Test bit macros for completed events */ - #define mci_cmd_is_complete(host) \ - test_bit(EVENT_CMD_COMPLETE, &host->completed_events) --#define mci_cmd_error_is_complete(host) \ -- test_bit(EVENT_CMD_ERROR, &host->completed_events) - #define mci_data_is_complete(host) \ - test_bit(EVENT_DATA_COMPLETE, &host->completed_events) - #define mci_data_error_is_complete(host) \ -@@ -109,8 +103,6 @@ MODULE_PARM_DESC(fmax, "Max frequency in Hz of the MMC bus clock"); - test_bit(EVENT_STOP_SENT, &host->completed_events) - #define mci_stop_is_complete(host) \ - test_bit(EVENT_STOP_COMPLETE, &host->completed_events) --#define mci_stop_error_is_complete(host) \ -- test_bit(EVENT_STOP_ERROR, &host->completed_events) - #define mci_dma_error_is_complete(host) \ - test_bit(EVENT_DMA_ERROR, &host->completed_events) - #define mci_card_detect_is_complete(host) \ -@@ -119,8 +111,6 @@ MODULE_PARM_DESC(fmax, "Max frequency in Hz of the MMC bus clock"); - /* Test and clear bit macros for pending events */ - #define mci_clear_cmd_is_pending(host) \ - test_and_clear_bit(EVENT_CMD_COMPLETE, &host->pending_events) --#define mci_clear_cmd_error_is_pending(host) \ -- test_and_clear_bit(EVENT_CMD_ERROR, &host->pending_events) - #define mci_clear_data_is_pending(host) \ - test_and_clear_bit(EVENT_DATA_COMPLETE, &host->pending_events) - #define mci_clear_data_error_is_pending(host) \ -@@ -129,8 +119,6 @@ MODULE_PARM_DESC(fmax, "Max frequency in Hz of the MMC bus clock"); - test_and_clear_bit(EVENT_STOP_SENT, &host->pending_events) - #define mci_clear_stop_is_pending(host) \ - test_and_clear_bit(EVENT_STOP_COMPLETE, &host->pending_events) --#define mci_clear_stop_error_is_pending(host) \ -- test_and_clear_bit(EVENT_STOP_ERROR, &host->pending_events) - #define mci_clear_dma_error_is_pending(host) \ - test_and_clear_bit(EVENT_DMA_ERROR, &host->pending_events) - #define mci_clear_card_detect_is_pending(host) \ -@@ -139,8 +127,6 @@ MODULE_PARM_DESC(fmax, "Max frequency in Hz of the MMC bus clock"); - /* Test and set bit macros for completed events */ - #define mci_set_cmd_is_completed(host) \ - test_and_set_bit(EVENT_CMD_COMPLETE, &host->completed_events) --#define mci_set_cmd_error_is_completed(host) \ -- test_and_set_bit(EVENT_CMD_ERROR, &host->completed_events) - #define mci_set_data_is_completed(host) \ - test_and_set_bit(EVENT_DATA_COMPLETE, &host->completed_events) - #define mci_set_data_error_is_completed(host) \ -@@ -149,8 +135,6 @@ MODULE_PARM_DESC(fmax, "Max frequency in Hz of the MMC bus clock"); - test_and_set_bit(EVENT_STOP_SENT, &host->completed_events) - #define mci_set_stop_is_completed(host) \ - test_and_set_bit(EVENT_STOP_COMPLETE, &host->completed_events) --#define mci_set_stop_error_is_completed(host) \ -- test_and_set_bit(EVENT_STOP_ERROR, &host->completed_events) - #define mci_set_dma_error_is_completed(host) \ - test_and_set_bit(EVENT_DMA_ERROR, &host->completed_events) - #define mci_set_card_detect_is_completed(host) \ -@@ -159,8 +143,6 @@ MODULE_PARM_DESC(fmax, "Max frequency in Hz of the MMC bus clock"); - /* Set bit macros for completed events */ - #define mci_set_cmd_complete(host) \ - set_bit(EVENT_CMD_COMPLETE, &host->completed_events) --#define mci_set_cmd_error_complete(host) \ -- set_bit(EVENT_CMD_ERROR, &host->completed_events) - #define mci_set_data_complete(host) \ - set_bit(EVENT_DATA_COMPLETE, &host->completed_events) - #define mci_set_data_error_complete(host) \ -@@ -169,8 +151,6 @@ MODULE_PARM_DESC(fmax, "Max frequency in Hz of the MMC bus clock"); - set_bit(EVENT_STOP_SENT, &host->completed_events) - #define mci_set_stop_complete(host) \ - set_bit(EVENT_STOP_COMPLETE, &host->completed_events) --#define mci_set_stop_error_complete(host) \ -- set_bit(EVENT_STOP_ERROR, &host->completed_events) - #define mci_set_dma_error_complete(host) \ - set_bit(EVENT_DMA_ERROR, &host->completed_events) - #define mci_set_card_detect_complete(host) \ -@@ -179,8 +159,6 @@ MODULE_PARM_DESC(fmax, "Max frequency in Hz of the MMC bus clock"); - /* Set bit macros for pending events */ - #define mci_set_cmd_pending(host) \ - set_bit(EVENT_CMD_COMPLETE, &host->pending_events) --#define mci_set_cmd_error_pending(host) \ -- set_bit(EVENT_CMD_ERROR, &host->pending_events) - #define mci_set_data_pending(host) \ - set_bit(EVENT_DATA_COMPLETE, &host->pending_events) - #define mci_set_data_error_pending(host) \ -@@ -189,8 +167,6 @@ MODULE_PARM_DESC(fmax, "Max frequency in Hz of the MMC bus clock"); - set_bit(EVENT_STOP_SENT, &host->pending_events) - #define mci_set_stop_pending(host) \ - set_bit(EVENT_STOP_COMPLETE, &host->pending_events) --#define mci_set_stop_error_pending(host) \ -- set_bit(EVENT_STOP_ERROR, &host->pending_events) - #define mci_set_dma_error_pending(host) \ - set_bit(EVENT_DMA_ERROR, &host->pending_events) - #define mci_set_card_detect_pending(host) \ -@@ -199,8 +175,6 @@ MODULE_PARM_DESC(fmax, "Max frequency in Hz of the MMC bus clock"); - /* Clear bit macros for pending events */ - #define mci_clear_cmd_pending(host) \ - clear_bit(EVENT_CMD_COMPLETE, &host->pending_events) --#define mci_clear_cmd_error_pending(host) \ -- clear_bit(EVENT_CMD_ERROR, &host->pending_events) - #define mci_clear_data_pending(host) \ - clear_bit(EVENT_DATA_COMPLETE, &host->pending_events) - #define mci_clear_data_error_pending(host) \ -@@ -209,8 +183,6 @@ MODULE_PARM_DESC(fmax, "Max frequency in Hz of the MMC bus clock"); - clear_bit(EVENT_STOP_SENT, &host->pending_events) - #define mci_clear_stop_pending(host) \ - clear_bit(EVENT_STOP_COMPLETE, &host->pending_events) --#define mci_clear_stop_error_pending(host) \ -- clear_bit(EVENT_STOP_ERROR, &host->pending_events) - #define mci_clear_dma_error_pending(host) \ - clear_bit(EVENT_DMA_ERROR, &host->pending_events) - #define mci_clear_card_detect_pending(host) \ -@@ -471,20 +443,16 @@ static void atmci_set_timeout(struct atmel_mci *host, - } - - /* -- * Return mask with interrupt flags to be handled for this command. -+ * Return mask with command flags to be enabled for this command. - */ - static u32 atmci_prepare_command(struct mmc_host *mmc, -- struct mmc_command *cmd, -- u32 *cmd_flags) -+ struct mmc_command *cmd) - { - u32 cmdr; -- u32 iflags; - - cmd->error = MMC_ERR_NONE; - -- cmdr = 0; -- BUG_ON(MCI_BFEXT(CMDNB, cmdr) != 0); -- cmdr = MCI_BFINS(CMDNB, cmd->opcode, cmdr); -+ cmdr = MCI_BF(CMDNB, cmd->opcode); - - if (cmd->flags & MMC_RSP_PRESENT) { - if (cmd->flags & MMC_RSP_136) -@@ -503,16 +471,11 @@ static u32 atmci_prepare_command(struct mmc_host *mmc, - if (mmc->ios.bus_mode == MMC_BUSMODE_OPENDRAIN) - cmdr |= MCI_BIT(OPDCMD); - -- iflags = MCI_BIT(CMDRDY) | MCI_CMD_ERROR_FLAGS; -- if (!(cmd->flags & MMC_RSP_CRC)) -- iflags &= ~MCI_BIT(RCRCE); -- - dev_dbg(&mmc->class_dev, - "cmd: op %02x arg %08x flags %08x, cmdflags %08lx\n", - cmd->opcode, cmd->arg, cmd->flags, (unsigned long)cmdr); - -- *cmd_flags = cmdr; -- return iflags; -+ return cmdr; - } - - static void atmci_start_command(struct atmel_mci *host, -@@ -596,13 +559,13 @@ static void atmci_request(struct mmc_host *mmc, struct mmc_request *mrq) - host->pending_events = 0; - host->completed_events = 0; - -- iflags = atmci_prepare_command(mmc, mrq->cmd, &cmdflags); -+ iflags = MCI_BIT(CMDRDY); -+ cmdflags = atmci_prepare_command(mmc, mrq->cmd); - - if (mrq->stop) { -- BUG_ON(!data); -+ WARN_ON(!data); - -- host->stop_iflags = atmci_prepare_command(mmc, mrq->stop, -- &host->stop_cmdr); -+ host->stop_cmdr = atmci_prepare_command(mmc, mrq->stop); - host->stop_cmdr |= MCI_BF(TRCMD, MCI_TRCMD_STOP_TRANS); - if (!(data->flags & MMC_DATA_WRITE)) - host->stop_cmdr |= MCI_BIT(TRDIR); -@@ -716,7 +679,7 @@ static void send_stop_cmd(struct mmc_host *mmc, struct mmc_data *data, - struct atmel_mci *host = mmc_priv(mmc); - - atmci_start_command(host, data->stop, host->stop_cmdr | flags); -- mci_writel(host, IER, host->stop_iflags); -+ mci_writel(host, IER, MCI_BIT(CMDRDY)); - } - - static void atmci_data_complete(struct atmel_mci *host, struct mmc_data *data) -@@ -735,18 +698,30 @@ static void atmci_data_complete(struct atmel_mci *host, struct mmc_data *data) - atmci_request_end(host->mmc, data->mrq); - } - --static void atmci_command_error(struct mmc_host *mmc, -- struct mmc_command *cmd, -- u32 status) -+static void atmci_command_complete(struct atmel_mci *host, -+ struct mmc_command *cmd, u32 status) - { -- dev_dbg(&mmc->class_dev, "command error: status=0x%08x\n", status); -- - if (status & MCI_BIT(RTOE)) - cmd->error = MMC_ERR_TIMEOUT; -- else if (status & MCI_BIT(RCRCE)) -+ else if ((cmd->flags & MMC_RSP_CRC) -+ && (status & MCI_BIT(RCRCE))) - cmd->error = MMC_ERR_BADCRC; -- else -+ else if (status & (MCI_BIT(RINDE) | MCI_BIT(RDIRE) | MCI_BIT(RENDE))) - cmd->error = MMC_ERR_FAILED; -+ -+ if (cmd->error != MMC_ERR_NONE) { -+ dev_dbg(&host->mmc->class_dev, -+ "command error: op=0x%x status=0x%08x\n", -+ cmd->opcode, status); -+ -+ if (cmd->data) { -+ dma_stop_request(host->dma.req.req.dmac, -+ host->dma.req.req.channel); -+ mci_writel(host, IDR, MCI_BIT(NOTBUSY) -+ | MCI_DATA_ERROR_FLAGS); -+ host->data = NULL; -+ } -+ } - } - - static void atmci_tasklet_func(unsigned long priv) -@@ -761,38 +736,16 @@ static void atmci_tasklet_func(unsigned long priv) - host->pending_events, host->completed_events, - mci_readl(host, IMR)); - -- if (mci_clear_cmd_error_is_pending(host)) { -- struct mmc_command *cmd; -- -- mci_set_cmd_error_complete(host); -- mci_clear_cmd_pending(host); -- cmd = host->mrq->cmd; -- -- if (cmd->data) { -- dma_stop_request(host->dma.req.req.dmac, -- host->dma.req.req.channel); -- host->data = NULL; -- } -- -- atmci_command_error(mmc, cmd, host->error_status); -- atmci_request_end(mmc, cmd->mrq); -- } -- if (mci_clear_stop_error_is_pending(host)) { -- mci_set_stop_error_complete(host); -- mci_clear_stop_pending(host); -- atmci_command_error(mmc, host->mrq->stop, -- host->error_status); -- if (!host->data) -- atmci_request_end(mmc, host->mrq); -- } - if (mci_clear_cmd_is_pending(host)) { - mci_set_cmd_complete(host); -- if (!mrq->data || mci_data_is_complete(host) -+ atmci_command_complete(host, mrq->cmd, host->cmd_status); -+ if (!host->data || mci_data_is_complete(host) - || mci_data_error_is_complete(host)) - atmci_request_end(mmc, mrq); - } - if (mci_clear_stop_is_pending(host)) { - mci_set_stop_complete(host); -+ atmci_command_complete(host, mrq->stop, host->stop_status); - if (mci_data_is_complete(host) - || mci_data_error_is_complete(host)) - atmci_request_end(mmc, mrq); -@@ -815,7 +768,7 @@ static void atmci_tasklet_func(unsigned long priv) - atmci_data_complete(host, data); - } - if (mci_clear_data_error_is_pending(host)) { -- u32 status = host->error_status; -+ u32 status = host->data_status; - - mci_set_data_error_complete(host); - mci_clear_data_pending(host); -@@ -858,10 +811,8 @@ static void atmci_tasklet_func(unsigned long priv) - - /* Clean up queue if present */ - if (mrq) { -- if (!mci_cmd_is_complete(host) -- && !mci_cmd_error_is_complete(host)) { -+ if (!mci_cmd_is_complete(host)) - mrq->cmd->error = MMC_ERR_TIMEOUT; -- } - if (mrq->data && !mci_data_is_complete(host) - && !mci_data_error_is_complete(host)) { - dma_stop_request(host->dma.req.req.dmac, -@@ -869,10 +820,8 @@ static void atmci_tasklet_func(unsigned long priv) - host->data->error = MMC_ERR_TIMEOUT; - atmci_data_complete(host, data); - } -- if (mrq->stop && !mci_stop_is_complete(host) -- && !mci_stop_error_is_complete(host)) { -+ if (mrq->stop && !mci_stop_is_complete(host)) - mrq->stop->error = MMC_ERR_TIMEOUT; -- } - - host->cmd = NULL; - atmci_request_end(mmc, mrq); -@@ -895,13 +844,16 @@ static void atmci_cmd_interrupt(struct mmc_host *mmc, u32 status) - cmd->resp[2] = mci_readl(host, RSPR); - cmd->resp[3] = mci_readl(host, RSPR); - -- mci_writel(host, IDR, MCI_BIT(CMDRDY) | MCI_CMD_ERROR_FLAGS); -+ mci_writel(host, IDR, MCI_BIT(CMDRDY)); - host->cmd = NULL; - -- if (mci_stop_sent_is_complete(host)) -+ if (mci_stop_sent_is_complete(host)) { -+ host->stop_status = status; - mci_set_stop_pending(host); -- else -+ } else { -+ host->cmd_status = status; - mci_set_cmd_pending(host); -+ } - - tasklet_schedule(&host->tasklet); - } -@@ -920,18 +872,16 @@ static void atmci_xfer_complete(struct dma_request *_req) - if (data->stop && !mci_set_stop_sent_is_completed(host)) - send_stop_cmd(host->mmc, data, 0); - -- if (data->flags & MMC_DATA_READ) { -- mci_writel(host, IDR, MCI_DATA_ERROR_FLAGS); -- mci_set_data_pending(host); -- tasklet_schedule(&host->tasklet); -- } else { -- /* -- * For the WRITE case, wait for NOTBUSY. This function -- * is called when everything has been written to the -- * controller, not when the card is done programming. -- */ -- mci_writel(host, IER, MCI_BIT(NOTBUSY)); -- } -+ /* -+ * Regardless of what the documentation says, we have to wait -+ * for NOTBUSY even after block read operations. -+ * -+ * When the DMA transfer is complete, the controller may still -+ * be reading the CRC from the card, i.e. the data transfer is -+ * still in progress and we haven't seen all the potential -+ * error bits yet. -+ */ -+ mci_writel(host, IER, MCI_BIT(NOTBUSY)); - } - - static void atmci_dma_error(struct dma_request *_req) -@@ -963,24 +913,10 @@ static irqreturn_t atmci_interrupt(int irq, void *dev_id) - pending = status & mask; - - do { -- if (pending & MCI_CMD_ERROR_FLAGS) { -- mci_writel(host, IDR, (MCI_BIT(CMDRDY) -- | MCI_BIT(NOTBUSY) -- | MCI_CMD_ERROR_FLAGS -- | MCI_DATA_ERROR_FLAGS)); -- host->error_status = status; -- host->cmd = NULL; -- if (mci_stop_sent_is_complete(host)) -- mci_set_stop_error_pending(host); -- else -- mci_set_cmd_error_pending(host); -- tasklet_schedule(&host->tasklet); -- break; -- } - if (pending & MCI_DATA_ERROR_FLAGS) { - mci_writel(host, IDR, (MCI_BIT(NOTBUSY) - | MCI_DATA_ERROR_FLAGS)); -- host->error_status = status; -+ host->data_status = status; - mci_set_data_error_pending(host); - tasklet_schedule(&host->tasklet); - break; --- -1.5.3.2 - -_______________________________________________ -Kernel mailing list -Kernel@avr32linux.org -http://duppen.flaskehals.net/cgi-bin/mailman/listinfo/kernel diff --git a/target/device/Atmel/arch-avr32/kernel-patches-2.6.23/linux-2.6.23-100-avr32-atmel.2.patch b/target/device/Atmel/arch-avr32/kernel-patches-2.6.23/linux-2.6.23-100-avr32-atmel.2.patch deleted file mode 100644 index 1f0a5f542..000000000 --- a/target/device/Atmel/arch-avr32/kernel-patches-2.6.23/linux-2.6.23-100-avr32-atmel.2.patch +++ /dev/null @@ -1,19857 +0,0 @@ - MAINTAINERS | 7 + - Makefile | 2 +- - arch/avr32/Kconfig | 34 +- - arch/avr32/Makefile | 3 +- - arch/avr32/boards/atngw100/Kconfig | 12 + - arch/avr32/boards/atngw100/flash.c | 5 +- - arch/avr32/boards/atngw100/setup.c | 26 +- - arch/avr32/boards/atstk1000/Kconfig | 82 +- - arch/avr32/boards/atstk1000/Makefile | 2 + - arch/avr32/boards/atstk1000/atstk1000.h | 2 + - arch/avr32/boards/atstk1000/atstk1002.c | 148 ++- - arch/avr32/boards/atstk1000/atstk1003.c | 181 +++ - arch/avr32/boards/atstk1000/atstk1004.c | 152 +++ - arch/avr32/boards/atstk1000/flash.c | 5 +- - arch/avr32/boards/atstk1000/setup.c | 64 + - arch/avr32/configs/atngw100_defconfig | 210 +++- - arch/avr32/configs/atstk1002_defconfig | 482 +++++-- - arch/avr32/configs/atstk1003_defconfig | 1045 ++++++++++++++ - arch/avr32/configs/atstk1004_defconfig | 722 ++++++++++ - arch/avr32/drivers/Makefile | 1 + - arch/avr32/drivers/dw-dmac.c | 761 +++++++++++ - arch/avr32/drivers/dw-dmac.h | 42 + - arch/avr32/kernel/Makefile | 6 +- - arch/avr32/kernel/dma-controller.c | 34 + - arch/avr32/kernel/entry-avr32b.S | 26 +- - arch/avr32/kernel/setup.c | 2 +- - arch/avr32/kernel/vmlinux.lds.S | 143 ++ - arch/avr32/kernel/vmlinux.lds.c | 142 -- - arch/avr32/mach-at32ap/Kconfig | 19 +- - arch/avr32/mach-at32ap/Makefile | 5 +- - arch/avr32/mach-at32ap/at32ap7000.c | 1324 ------------------ - arch/avr32/mach-at32ap/at32ap700x.c | 1754 ++++++++++++++++++++++++ - arch/avr32/mach-at32ap/clock.c | 116 ++ - arch/avr32/mach-at32ap/gpio-dev.c | 573 ++++++++ - arch/avr32/mach-at32ap/hsmc.c | 129 ++- - arch/avr32/mach-at32ap/pio.c | 80 ++ - arch/avr32/mach-at32ap/pm.h | 8 + - arch/avr32/mm/dma-coherent.c | 7 + - arch/avr32/mm/init.c | 12 +- - drivers/char/watchdog/Kconfig | 2 +- - drivers/char/watchdog/at32ap700x_wdt.c | 69 +- - drivers/i2c/busses/Kconfig | 8 + - drivers/i2c/busses/Makefile | 1 + - drivers/i2c/busses/i2c-atmeltwi.c | 436 ++++++ - drivers/i2c/busses/i2c-atmeltwi.h | 117 ++ - drivers/misc/Kconfig | 9 + - drivers/misc/Makefile | 1 + - drivers/misc/atmel-ssc.c | 174 +++ - drivers/mmc/host/Kconfig | 10 + - drivers/mmc/host/Makefile | 1 + - drivers/mmc/host/atmel-mci.c | 1176 ++++++++++++++++ - drivers/mmc/host/atmel-mci.h | 192 +++ - drivers/mtd/chips/cfi_cmdset_0001.c | 43 + - drivers/mtd/chips/cfi_cmdset_0002.c | 6 +- - drivers/pcmcia/Kconfig | 7 + - drivers/pcmcia/Makefile | 1 + - drivers/pcmcia/at32_cf.c | 531 ++++++++ - drivers/pcmcia/cistpl.c | 48 +- - drivers/spi/atmel_spi.c | 4 +- - drivers/usb/gadget/Kconfig | 26 +- - drivers/usb/gadget/Makefile | 1 + - drivers/usb/gadget/atmel_usba_udc.c | 2038 ++++++++++++++++++++++++++++ - drivers/usb/gadget/atmel_usba_udc.h | 350 +++++ - drivers/video/atmel_lcdfb.c | 6 +- - drivers/video/backlight/Kconfig | 12 + - drivers/video/backlight/Makefile | 2 + - drivers/video/backlight/ltv350qv.c | 339 +++++ - drivers/video/backlight/ltv350qv.h | 95 ++ - include/asm-avr32/arch-at32ap/at32ap7000.h | 35 - - include/asm-avr32/arch-at32ap/at32ap700x.h | 35 + - include/asm-avr32/arch-at32ap/board.h | 39 + - include/asm-avr32/arch-at32ap/cpu.h | 2 +- - include/asm-avr32/arch-at32ap/io.h | 4 +- - include/asm-avr32/arch-at32ap/portmux.h | 13 + - include/asm-avr32/arch-at32ap/smc.h | 51 +- - include/asm-avr32/dma-controller.h | 166 +++ - include/asm-avr32/dma-mapping.h | 17 +- - include/asm-avr32/system.h | 13 +- - include/asm-avr32/unistd.h | 13 + - include/linux/atmel-ssc.h | 312 +++++ - include/linux/spi/at73c213.h | 25 + - include/pcmcia/cs_types.h | 2 +- - init/do_mounts.c | 8 +- - scripts/checkstack.pl | 5 + - sound/Kconfig | 6 + - sound/Makefile | 3 +- - sound/avr32/Kconfig | 11 + - sound/avr32/Makefile | 3 + - sound/avr32/ac97c.c | 914 +++++++++++++ - sound/avr32/ac97c.h | 71 + - sound/oss/Kconfig | 4 + - sound/oss/Makefile | 1 + - sound/oss/at32_abdac.c | 722 ++++++++++ - sound/oss/at32_abdac.h | 59 + - sound/spi/Kconfig | 31 + - sound/spi/Makefile | 5 + - sound/spi/at73c213.c | 1121 +++++++++++++++ - sound/spi/at73c213.h | 119 ++ - 98 files changed, 16057 insertions(+), 1826 deletions(-) - create mode 100644 arch/avr32/boards/atngw100/Kconfig - create mode 100644 arch/avr32/boards/atstk1000/atstk1003.c - create mode 100644 arch/avr32/boards/atstk1000/atstk1004.c - create mode 100644 arch/avr32/configs/atstk1003_defconfig - create mode 100644 arch/avr32/configs/atstk1004_defconfig - create mode 100644 arch/avr32/drivers/Makefile - create mode 100644 arch/avr32/drivers/dw-dmac.c - create mode 100644 arch/avr32/drivers/dw-dmac.h - create mode 100644 arch/avr32/kernel/dma-controller.c - create mode 100644 arch/avr32/kernel/vmlinux.lds.S - delete mode 100644 arch/avr32/kernel/vmlinux.lds.c - delete mode 100644 arch/avr32/mach-at32ap/at32ap7000.c - create mode 100644 arch/avr32/mach-at32ap/at32ap700x.c - create mode 100644 arch/avr32/mach-at32ap/gpio-dev.c - create mode 100644 drivers/i2c/busses/i2c-atmeltwi.c - create mode 100644 drivers/i2c/busses/i2c-atmeltwi.h - create mode 100644 drivers/misc/atmel-ssc.c - create mode 100644 drivers/mmc/host/atmel-mci.c - create mode 100644 drivers/mmc/host/atmel-mci.h - create mode 100644 drivers/pcmcia/at32_cf.c - create mode 100644 drivers/usb/gadget/atmel_usba_udc.c - create mode 100644 drivers/usb/gadget/atmel_usba_udc.h - create mode 100644 drivers/video/backlight/ltv350qv.c - create mode 100644 drivers/video/backlight/ltv350qv.h - delete mode 100644 include/asm-avr32/arch-at32ap/at32ap7000.h - create mode 100644 include/asm-avr32/arch-at32ap/at32ap700x.h - create mode 100644 include/asm-avr32/dma-controller.h - create mode 100644 include/linux/atmel-ssc.h - create mode 100644 include/linux/spi/at73c213.h - create mode 100644 sound/avr32/Kconfig - create mode 100644 sound/avr32/Makefile - create mode 100644 sound/avr32/ac97c.c - create mode 100644 sound/avr32/ac97c.h - create mode 100644 sound/oss/at32_abdac.c - create mode 100644 sound/oss/at32_abdac.h - create mode 100644 sound/spi/Kconfig - create mode 100644 sound/spi/Makefile - create mode 100644 sound/spi/at73c213.c - create mode 100644 sound/spi/at73c213.h - -diff --git a/MAINTAINERS b/MAINTAINERS -index 9a91d9e..587afe3 100644 ---- a/MAINTAINERS -+++ b/MAINTAINERS -@@ -669,6 +669,13 @@ P: Haavard Skinnemoen - M: hskinnemoen@atmel.com - S: Supported - -+ATMEL USBA UDC DRIVER -+P: Haavard Skinnemoen -+M: hskinnemoen@atmel.com -+L: kernel@avr32linux.org -+W: http://avr32linux.org/twiki/bin/view/Main/AtmelUsbDeviceDriver -+S: Supported -+ - ATMEL WIRELESS DRIVER - P: Simon Kelley - M: simon@thekelleys.org.uk -diff --git a/arch/avr32/Kconfig b/arch/avr32/Kconfig -index d12346a..62913a4 100644 ---- a/arch/avr32/Kconfig -+++ b/arch/avr32/Kconfig -@@ -87,19 +87,36 @@ config PLATFORM_AT32AP - select MMU - select PERFORMANCE_COUNTERS - -+config CPU_AT32AP700X -+ bool -+ select PLATFORM_AT32AP -+ - choice - prompt "AVR32 CPU type" - default CPU_AT32AP7000 - - config CPU_AT32AP7000 - bool "AT32AP7000" -- select PLATFORM_AT32AP -+ select CPU_AT32AP700X -+ -+config CPU_AT32AP7001 -+ bool "AT32AP7001" -+ select CPU_AT32AP700X -+ -+config CPU_AT32AP7002 -+ bool "AT32AP7002" -+ select CPU_AT32AP700X -+ - endchoice - - # - # CPU Daughterboards for ATSTK1000 - config BOARD_ATSTK1002 - bool -+config BOARD_ATSTK1003 -+ bool -+config BOARD_ATSTK1004 -+ bool - - choice - prompt "AVR32 board type" -@@ -108,6 +125,8 @@ choice - config BOARD_ATSTK1000 - bool "ATSTK1000 evaluation board" - select BOARD_ATSTK1002 if CPU_AT32AP7000 -+ select BOARD_ATSTK1003 if CPU_AT32AP7001 -+ select BOARD_ATSTK1004 if CPU_AT32AP7002 - - config BOARD_ATNGW100 - bool "ATNGW100 Network Gateway" -@@ -116,6 +135,9 @@ endchoice - if BOARD_ATSTK1000 - source "arch/avr32/boards/atstk1000/Kconfig" - endif -+if BOARD_ATNGW100 -+source "arch/avr32/boards/atngw100/Kconfig" -+endif - - choice - prompt "Boot loader type" -@@ -129,15 +151,15 @@ source "arch/avr32/mach-at32ap/Kconfig" - - config LOAD_ADDRESS - hex -- default 0x10000000 if LOADER_U_BOOT=y && CPU_AT32AP7000=y -+ default 0x10000000 if LOADER_U_BOOT=y && CPU_AT32AP700X=y - - config ENTRY_ADDRESS - hex -- default 0x90000000 if LOADER_U_BOOT=y && CPU_AT32AP7000=y -+ default 0x90000000 if LOADER_U_BOOT=y && CPU_AT32AP700X=y - - config PHYS_OFFSET - hex -- default 0x10000000 if CPU_AT32AP7000=y -+ default 0x10000000 if CPU_AT32AP700X=y - - source "kernel/Kconfig.preempt" - -@@ -175,6 +197,10 @@ config OWNERSHIP_TRACE - enabling Nexus-compliant debuggers to keep track of the PID of the - currently executing task. - -+config DW_DMAC -+ tristate "Synopsys DesignWare DMA Controller support" -+ default y if CPU_AT32AP7000 -+ - # FPU emulation goes here - - source "kernel/Kconfig.hz" -diff --git a/arch/avr32/Makefile b/arch/avr32/Makefile -index dc6bc01..96f0030 100644 ---- a/arch/avr32/Makefile -+++ b/arch/avr32/Makefile -@@ -16,7 +16,7 @@ AFLAGS += -mrelax -mno-pic - CFLAGS_MODULE += -mno-relax - LDFLAGS_vmlinux += --relax - --cpuflags-$(CONFIG_CPU_AT32AP7000) += -mcpu=ap7000 -+cpuflags-$(CONFIG_PLATFORM_AT32AP) += -march=ap - - CFLAGS += $(cpuflags-y) - AFLAGS += $(cpuflags-y) -@@ -31,6 +31,7 @@ core-$(CONFIG_BOARD_ATNGW100) += arch/avr32/boards/atngw100/ - core-$(CONFIG_LOADER_U_BOOT) += arch/avr32/boot/u-boot/ - core-y += arch/avr32/kernel/ - core-y += arch/avr32/mm/ -+drivers-y += arch/avr32/drivers/ - libs-y += arch/avr32/lib/ - - archincdir-$(CONFIG_PLATFORM_AT32AP) := arch-at32ap -diff --git a/arch/avr32/boards/atngw100/Kconfig b/arch/avr32/boards/atngw100/Kconfig -new file mode 100644 -index 0000000..5d922df ---- /dev/null -+++ b/arch/avr32/boards/atngw100/Kconfig -@@ -0,0 +1,12 @@ -+# NGW100 customization -+ -+config BOARD_ATNGW100_I2C_GPIO -+ bool "Use GPIO for i2c instead of built-in TWI module" -+ help -+ The driver for the built-in TWI module has been plagued by -+ various problems, while the i2c-gpio driver is based on the -+ trusty old i2c-algo-bit bitbanging engine, making it work -+ on pretty much any setup. -+ -+ Choose 'Y' here if you're having i2c-related problems and -+ want to rule out the i2c bus driver. -diff --git a/arch/avr32/boards/atngw100/flash.c b/arch/avr32/boards/atngw100/flash.c -index f9b32a8..b07ae63 100644 ---- a/arch/avr32/boards/atngw100/flash.c -+++ b/arch/avr32/boards/atngw100/flash.c -@@ -15,7 +15,7 @@ - - #include <asm/arch/smc.h> - --static struct smc_config flash_config __initdata = { -+static struct smc_timing flash_timing __initdata = { - .ncs_read_setup = 0, - .nrd_setup = 40, - .ncs_write_setup = 0, -@@ -28,7 +28,9 @@ static struct smc_config flash_config __initdata = { - - .read_cycle = 120, - .write_cycle = 120, -+}; - -+static struct smc_config flash_config __initdata = { - .bus_width = 2, - .nrd_controlled = 1, - .nwe_controlled = 1, -@@ -82,6 +84,7 @@ static int __init atngw100_flash_init(void) - { - int ret; - -+ smc_set_timing(&flash_config, &flash_timing); - ret = smc_set_configuration(0, &flash_config); - if (ret < 0) { - printk(KERN_ERR "atngw100: failed to set NOR flash timing\n"); -diff --git a/arch/avr32/boards/atngw100/setup.c b/arch/avr32/boards/atngw100/setup.c -index ef80156..2a5f587 100644 ---- a/arch/avr32/boards/atngw100/setup.c -+++ b/arch/avr32/boards/atngw100/setup.c -@@ -42,6 +42,11 @@ static struct spi_board_info spi0_board_info[] __initdata = { - }, - }; - -+static struct mci_platform_data __initdata mci0_data = { -+ .detect_pin = GPIO_PIN_PC(25), -+ .wp_pin = GPIO_PIN_PE(0), -+}; -+ - /* - * The next two functions should go away as the boot loader is - * supposed to initialize the macb address registers with a valid -@@ -124,9 +129,13 @@ static struct platform_device ngw_gpio_leds = { - } - }; - -+#ifdef CONFIG_BOARD_ATNGW100_I2C_GPIO - static struct i2c_gpio_platform_data i2c_gpio_data = { -- .sda_pin = GPIO_PIN_PA(6), -- .scl_pin = GPIO_PIN_PA(7), -+ .sda_pin = GPIO_PIN_PA(6), -+ .scl_pin = GPIO_PIN_PA(7), -+ .sda_is_open_drain = 1, -+ .scl_is_open_drain = 1, -+ .udelay = 2, /* close to 100 kHz */ - }; - - static struct platform_device i2c_gpio_device = { -@@ -136,6 +145,7 @@ static struct platform_device i2c_gpio_device = { - .platform_data = &i2c_gpio_data, - }, - }; -+#endif - - static int __init atngw100_init(void) - { -@@ -154,6 +164,8 @@ static int __init atngw100_init(void) - set_hw_addr(at32_add_device_eth(1, ð_data[1])); - - at32_add_device_spi(0, spi0_board_info, ARRAY_SIZE(spi0_board_info)); -+ at32_add_device_mci(0, &mci0_data); -+ at32_add_device_usba(0, NULL); - - for (i = 0; i < ARRAY_SIZE(ngw_leds); i++) { - at32_select_gpio(ngw_leds[i].gpio, -@@ -161,9 +173,15 @@ static int __init atngw100_init(void) - } - platform_device_register(&ngw_gpio_leds); - -- at32_select_gpio(i2c_gpio_data.sda_pin, 0); -- at32_select_gpio(i2c_gpio_data.scl_pin, 0); -+#ifdef CONFIG_BOARD_ATNGW100_I2C_GPIO -+ at32_select_gpio(i2c_gpio_data.sda_pin, -+ AT32_GPIOF_MULTIDRV | AT32_GPIOF_OUTPUT | AT32_GPIOF_HIGH); -+ at32_select_gpio(i2c_gpio_data.scl_pin, -+ AT32_GPIOF_MULTIDRV | AT32_GPIOF_OUTPUT | AT32_GPIOF_HIGH); - platform_device_register(&i2c_gpio_device); -+#else -+ at32_add_device_twi(0); -+#endif - - return 0; - } -diff --git a/arch/avr32/boards/atstk1000/Kconfig b/arch/avr32/boards/atstk1000/Kconfig -index 718578f..aac73a6 100644 ---- a/arch/avr32/boards/atstk1000/Kconfig -+++ b/arch/avr32/boards/atstk1000/Kconfig -@@ -1,34 +1,34 @@ - # STK1000 customization - --if BOARD_ATSTK1002 -+if BOARD_ATSTK1000 - --config BOARD_ATSTK1002_CUSTOM -- bool "Non-default STK-1002 jumper settings" -+config BOARD_ATSTK100X_CUSTOM -+ bool "Non-default STK1002/STK1003/STK1004 jumper settings" - help - You will normally leave the jumpers on the CPU card at their - default settings. If you need to use certain peripherals, - you will need to change some of those jumpers. - --if BOARD_ATSTK1002_CUSTOM -+if BOARD_ATSTK100X_CUSTOM - --config BOARD_ATSTK1002_SW1_CUSTOM -+config BOARD_ATSTK100X_SW1_CUSTOM - bool "SW1: use SSC1 (not SPI0)" - help - This also prevents using the external DAC as an audio interface, - and means you can't initialize the on-board QVGA display. - --config BOARD_ATSTK1002_SW2_CUSTOM -+config BOARD_ATSTK100X_SW2_CUSTOM - bool "SW2: use IRDA or TIMER0 (not UART-A, MMC/SD, and PS2-A)" - help - If you change this you'll want an updated boot loader putting - the console on UART-C not UART-A. - --config BOARD_ATSTK1002_SW3_CUSTOM -+config BOARD_ATSTK100X_SW3_CUSTOM - bool "SW3: use TIMER1 (not SSC0 and GCLK)" - help - This also prevents using the external DAC as an audio interface. - --config BOARD_ATSTK1002_SW4_CUSTOM -+config BOARD_ATSTK100X_SW4_CUSTOM - bool "SW4: use ISI/Camera (not GPIOs, SPI1, and PS2-B)" - help - To use the camera interface you'll need a custom card (on the -@@ -36,27 +36,29 @@ config BOARD_ATSTK1002_SW4_CUSTOM - - config BOARD_ATSTK1002_SW5_CUSTOM - bool "SW5: use MACB1 (not LCDC)" -+ depends on BOARD_ATSTK1002 - - config BOARD_ATSTK1002_SW6_CUSTOM - bool "SW6: more GPIOs (not MACB0)" -+ depends on BOARD_ATSTK1002 - - endif # custom - --config BOARD_ATSTK1002_SPI1 -+config BOARD_ATSTK100X_SPI1 - bool "Configure SPI1 controller" -- depends on !BOARD_ATSTK1002_SW4_CUSTOM -+ depends on !BOARD_ATSTK100X_SW4_CUSTOM - help - All the signals for the second SPI controller are available on - GPIO lines and accessed through the J1 jumper block. Say "y" - here to configure that SPI controller. - --config BOARD_ATSTK1002_J2_LED -+config BOARD_ATSTK1000_J2_LED - bool -- default BOARD_ATSTK1002_J2_LED8 || BOARD_ATSTK1002_J2_RGB -+ default BOARD_ATSTK1000_J2_LED8 || BOARD_ATSTK1000_J2_RGB - - choice - prompt "LEDs connected to J2:" -- depends on LEDS_GPIO && !BOARD_ATSTK1002_SW4_CUSTOM -+ depends on LEDS_GPIO && !BOARD_ATSTK100X_SW4_CUSTOM - optional - help - Select this if you have jumpered the J2 jumper block to the -@@ -64,16 +66,64 @@ choice - IDC cable. A default "heartbeat" trigger is provided, but - you can of course override this. - --config BOARD_ATSTK1002_J2_LED8 -+config BOARD_ATSTK1000_J2_LED8 - bool "LED0..LED7" - help - Select this if J2 is jumpered to LED0..LED7 amber leds. - --config BOARD_ATSTK1002_J2_RGB -+config BOARD_ATSTK1000_J2_RGB - bool "RGB leds" - help - Select this if J2 is jumpered to the RGB leds. - - endchoice - --endif # stk 1002 -+config BOARD_ATSTK1000_EXTDAC -+ bool -+ depends on !BOARD_ATSTK100X_SW1_CUSTOM && !BOARD_ATSTK100X_SW3_CUSTOM -+ default y -+ -+config BOARD_ATSTK100X_ENABLE_AC97 -+ bool "Use AC97C instead of ABDAC" -+ help -+ Select this if you want to use the built-in AC97 controller -+ instead of the built-in Audio Bitstream DAC. These share -+ the same I/O pins on the AP7000, so both can't be enabled -+ at the same time. -+ -+ Note that the STK1000 kit doesn't ship with an AC97 codec on -+ board, so say N unless you've got an expansion board with an -+ AC97 codec on it that you want to use. -+ -+config BOARD_ATSTK1000_CF_HACKS -+ bool "ATSTK1000 CompactFlash hacks" -+ depends on !BOARD_ATSTK100X_SW4_CUSTOM -+ help -+ Select this if you have re-routed the CompactFlash RESET and -+ CD signals to GPIOs on your STK1000. This is necessary for -+ reset and card detection to work properly, although some CF -+ cards may be able to cope without reset. -+ -+config BOARD_ATSTK1000_CF_RESET_PIN -+ hex "CompactFlash RESET pin" -+ default 0x30 -+ depends on BOARD_ATSTK1000_CF_HACKS -+ help -+ Select which GPIO pin to use for the CompactFlash RESET -+ signal. This is specified as a hexadecimal number and should -+ be defined as 0x20 * gpio_port + pin. -+ -+ The default is 0x30, which is pin 16 on PIOB, aka GPIO14. -+ -+config BOARD_ATSTK1000_CF_DETECT_PIN -+ hex "CompactFlash DETECT pin" -+ default 0x3e -+ depends on BOARD_ATSTK1000_CF_HACKS -+ help -+ Select which GPIO pin to use for the CompactFlash CD -+ signal. This is specified as a hexadecimal number and should -+ be defined as 0x20 * gpio_port + pin. -+ -+ The default is 0x3e, which is pin 30 on PIOB, aka GPIO15. -+ -+endif # stk 1000 -diff --git a/arch/avr32/boards/atstk1000/Makefile b/arch/avr32/boards/atstk1000/Makefile -index 8e09922..beead86 100644 ---- a/arch/avr32/boards/atstk1000/Makefile -+++ b/arch/avr32/boards/atstk1000/Makefile -@@ -1,2 +1,4 @@ - obj-y += setup.o flash.o - obj-$(CONFIG_BOARD_ATSTK1002) += atstk1002.o -+obj-$(CONFIG_BOARD_ATSTK1003) += atstk1003.o -+obj-$(CONFIG_BOARD_ATSTK1004) += atstk1004.o -diff --git a/arch/avr32/boards/atstk1000/atstk1000.h b/arch/avr32/boards/atstk1000/atstk1000.h -index 9a49ed0..9392d32 100644 ---- a/arch/avr32/boards/atstk1000/atstk1000.h -+++ b/arch/avr32/boards/atstk1000/atstk1000.h -@@ -12,4 +12,6 @@ - - extern struct atmel_lcdfb_info atstk1000_lcdc_data; - -+void atstk1000_setup_j2_leds(void); -+ - #endif /* __ARCH_AVR32_BOARDS_ATSTK1000_ATSTK1000_H */ -diff --git a/arch/avr32/boards/atstk1000/atstk1002.c b/arch/avr32/boards/atstk1000/atstk1002.c -index c9981b7..d30de89 100644 ---- a/arch/avr32/boards/atstk1000/atstk1002.c -+++ b/arch/avr32/boards/atstk1000/atstk1002.c -@@ -11,17 +11,17 @@ - #include <linux/etherdevice.h> - #include <linux/init.h> - #include <linux/kernel.h> --#include <linux/leds.h> - #include <linux/platform_device.h> - #include <linux/string.h> - #include <linux/types.h> - #include <linux/spi/spi.h> -+#include <linux/spi/at73c213.h> - - #include <video/atmel_lcdc.h> - - #include <asm/io.h> - #include <asm/setup.h> --#include <asm/arch/at32ap7000.h> -+#include <asm/arch/at32ap700x.h> - #include <asm/arch/board.h> - #include <asm/arch/init.h> - #include <asm/arch/portmux.h> -@@ -48,8 +48,24 @@ static struct eth_platform_data __initdata eth_data[2] = { - }, - }; - --#ifndef CONFIG_BOARD_ATSTK1002_SW1_CUSTOM -+#ifdef CONFIG_BOARD_ATSTK1000_EXTDAC -+static struct at73c213_board_info at73c213_data = { -+ .ssc_id = 0, -+ .shortname = "AVR32 STK1000 external DAC", -+}; -+#endif -+#ifndef CONFIG_BOARD_ATSTK100X_SW1_CUSTOM - static struct spi_board_info spi0_board_info[] __initdata = { -+#ifdef CONFIG_BOARD_ATSTK1000_EXTDAC -+ { -+ /* AT73C213 */ -+ .modalias = "at73c213", -+ .max_speed_hz = 200000, -+ .chip_select = 0, -+ .mode = SPI_MODE_1, -+ .platform_data = &at73c213_data, -+ }, -+#endif - { - /* QVGA display */ - .modalias = "ltv350qv", -@@ -60,12 +76,30 @@ static struct spi_board_info spi0_board_info[] __initdata = { - }; - #endif - --#ifdef CONFIG_BOARD_ATSTK1002_SPI1 -+#ifdef CONFIG_BOARD_ATSTK100X_SPI1 - static struct spi_board_info spi1_board_info[] __initdata = { { - /* patch in custom entries here */ - } }; - #endif - -+static struct mci_platform_data __initdata mci0_data = { -+ .detect_pin = GPIO_PIN_NONE, -+ .wp_pin = GPIO_PIN_NONE, -+}; -+ -+static struct cf_platform_data __initdata cf0_data = { -+#ifdef CONFIG_BOARD_ATSTK1000_CF_HACKS -+ .detect_pin = CONFIG_BOARD_ATSTK1000_CF_DETECT_PIN, -+ .reset_pin = CONFIG_BOARD_ATSTK1000_CF_RESET_PIN, -+#else -+ .detect_pin = GPIO_PIN_NONE, -+ .reset_pin = GPIO_PIN_NONE, -+#endif -+ .vcc_pin = GPIO_PIN_NONE, -+ .ready_pin = GPIO_PIN_PB(27), -+ .cs = 4, -+}; -+ - /* - * The next two functions should go away as the boot loader is - * supposed to initialize the macb address registers with a valid -@@ -121,68 +155,44 @@ static void __init set_hw_addr(struct platform_device *pdev) - clk_put(pclk); - } - --#ifdef CONFIG_BOARD_ATSTK1002_J2_LED -- --static struct gpio_led stk_j2_led[] = { --#ifdef CONFIG_BOARD_ATSTK1002_J2_LED8 --#define LEDSTRING "J2 jumpered to LED8" -- { .name = "led0:amber", .gpio = GPIO_PIN_PB( 8), }, -- { .name = "led1:amber", .gpio = GPIO_PIN_PB( 9), }, -- { .name = "led2:amber", .gpio = GPIO_PIN_PB(10), }, -- { .name = "led3:amber", .gpio = GPIO_PIN_PB(13), }, -- { .name = "led4:amber", .gpio = GPIO_PIN_PB(14), }, -- { .name = "led5:amber", .gpio = GPIO_PIN_PB(15), }, -- { .name = "led6:amber", .gpio = GPIO_PIN_PB(16), }, -- { .name = "led7:amber", .gpio = GPIO_PIN_PB(30), -- .default_trigger = "heartbeat", }, --#else /* RGB */ --#define LEDSTRING "J2 jumpered to RGB LEDs" -- { .name = "r1:red", .gpio = GPIO_PIN_PB( 8), }, -- { .name = "g1:green", .gpio = GPIO_PIN_PB(10), }, -- { .name = "b1:blue", .gpio = GPIO_PIN_PB(14), }, -- -- { .name = "r2:red", .gpio = GPIO_PIN_PB( 9), -- .default_trigger = "heartbeat", }, -- { .name = "g2:green", .gpio = GPIO_PIN_PB(13), }, -- { .name = "b2:blue", .gpio = GPIO_PIN_PB(15), -- .default_trigger = "heartbeat", }, -- /* PB16, PB30 unused */ --#endif --}; -- --static struct gpio_led_platform_data stk_j2_led_data = { -- .num_leds = ARRAY_SIZE(stk_j2_led), -- .leds = stk_j2_led, --}; -- --static struct platform_device stk_j2_led_dev = { -- .name = "leds-gpio", -- .id = 2, /* gpio block J2 */ -- .dev = { -- .platform_data = &stk_j2_led_data, -- }, --}; -- --static void setup_j2_leds(void) -+#ifdef CONFIG_BOARD_ATSTK1000_EXTDAC -+static void __init atstk1002_setup_extdac(void) - { -- unsigned i; -- -- for (i = 0; i < ARRAY_SIZE(stk_j2_led); i++) -- at32_select_gpio(stk_j2_led[i].gpio, AT32_GPIOF_OUTPUT); -- -- printk("STK1002: " LEDSTRING "\n"); -- platform_device_register(&stk_j2_led_dev); -+ struct clk *gclk; -+ struct clk *pll; -+ -+ gclk = clk_get(NULL, "gclk0"); -+ if (IS_ERR(gclk)) -+ goto err_gclk; -+ pll = clk_get(NULL, "pll0"); -+ if (IS_ERR(pll)) -+ goto err_pll; -+ -+ if (clk_set_parent(gclk, pll)) { -+ pr_debug("STK1000: failed to set pll0 as parent for DAC clock\n"); -+ goto err_set_clk; -+ } -+ -+ at32_select_periph(GPIO_PIN_PA(30), GPIO_PERIPH_A, 0); -+ at73c213_data.dac_clk = gclk; -+ -+err_set_clk: -+ clk_put(pll); -+err_pll: -+ clk_put(gclk); -+err_gclk: -+ return; - } -- - #else --static void setup_j2_leds(void) -+static void __init atstk1002_setup_extdac(void) - { -+ - } --#endif -+#endif /* CONFIG_BOARD_ATSTK1000_EXTDAC */ - - void __init setup_board(void) - { --#ifdef CONFIG_BOARD_ATSTK1002_SW2_CUSTOM -+#ifdef CONFIG_BOARD_ATSTK100X_SW2_CUSTOM - at32_map_usart(0, 1); /* USART 0/B: /dev/ttyS1, IRDA */ - #else - at32_map_usart(1, 0); /* USART 1/A: /dev/ttyS0, DB9 */ -@@ -219,7 +229,7 @@ static int __init atstk1002_init(void) - - at32_add_system_devices(); - --#ifdef CONFIG_BOARD_ATSTK1002_SW2_CUSTOM -+#ifdef CONFIG_BOARD_ATSTK100X_SW2_CUSTOM - at32_add_device_usart(1); - #else - at32_add_device_usart(0); -@@ -229,23 +239,35 @@ static int __init atstk1002_init(void) - #ifndef CONFIG_BOARD_ATSTK1002_SW6_CUSTOM - set_hw_addr(at32_add_device_eth(0, ð_data[0])); - #endif --#ifndef CONFIG_BOARD_ATSTK1002_SW1_CUSTOM -+#ifndef CONFIG_BOARD_ATSTK100X_SW1_CUSTOM - at32_add_device_spi(0, spi0_board_info, ARRAY_SIZE(spi0_board_info)); - #endif --#ifdef CONFIG_BOARD_ATSTK1002_SPI1 -+#ifdef CONFIG_BOARD_ATSTK100X_SPI1 - at32_add_device_spi(1, spi1_board_info, ARRAY_SIZE(spi1_board_info)); - #endif -+ at32_add_device_twi(0); -+#ifndef CONFIG_BOARD_ATSTK100X_SW2_CUSTOM -+ at32_add_device_mci(0, &mci0_data); -+#endif - #ifdef CONFIG_BOARD_ATSTK1002_SW5_CUSTOM - set_hw_addr(at32_add_device_eth(1, ð_data[1])); - #else - at32_add_device_lcdc(0, &atstk1000_lcdc_data, - fbmem_start, fbmem_size); - #endif --#ifndef CONFIG_BOARD_ATSTK1002_SW3_CUSTOM -+ at32_add_device_usba(0, NULL); -+#ifdef CONFIG_BOARD_ATSTK100X_ENABLE_AC97 -+ at32_add_device_ac97c(0); -+#else -+ at32_add_device_abdac(0); -+#endif -+ at32_add_device_cf(0, 2, &cf0_data); -+#ifndef CONFIG_BOARD_ATSTK100X_SW3_CUSTOM - at32_add_device_ssc(0, ATMEL_SSC_TX); - #endif - -- setup_j2_leds(); -+ atstk1000_setup_j2_leds(); -+ atstk1002_setup_extdac(); - - return 0; - } -diff --git a/arch/avr32/boards/atstk1000/atstk1003.c b/arch/avr32/boards/atstk1000/atstk1003.c -new file mode 100644 -index 0000000..1842b7c ---- /dev/null -+++ b/arch/avr32/boards/atstk1000/atstk1003.c -@@ -0,0 +1,181 @@ -+/* -+ * ATSTK1003 daughterboard-specific init code -+ * -+ * Copyright (C) 2007 Atmel Corporation -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 as -+ * published by the Free Software Foundation. -+ */ -+#include <linux/clk.h> -+#include <linux/err.h> -+#include <linux/init.h> -+#include <linux/kernel.h> -+#include <linux/platform_device.h> -+#include <linux/string.h> -+#include <linux/types.h> -+ -+#include <linux/spi/at73c213.h> -+#include <linux/spi/spi.h> -+ -+#include <asm/setup.h> -+ -+#include <asm/arch/at32ap700x.h> -+#include <asm/arch/board.h> -+#include <asm/arch/init.h> -+#include <asm/arch/portmux.h> -+ -+#include "atstk1000.h" -+ -+#ifdef CONFIG_BOARD_ATSTK1000_EXTDAC -+static struct at73c213_board_info at73c213_data = { -+ .ssc_id = 0, -+ .shortname = "AVR32 STK1000 external DAC", -+}; -+#endif -+ -+#ifndef CONFIG_BOARD_ATSTK100X_SW1_CUSTOM -+static struct spi_board_info spi0_board_info[] __initdata = { -+#ifdef CONFIG_BOARD_ATSTK1000_EXTDAC -+ { -+ /* AT73C213 */ -+ .modalias = "at73c213", -+ .max_speed_hz = 200000, -+ .chip_select = 0, -+ .mode = SPI_MODE_1, -+ .platform_data = &at73c213_data, -+ }, -+#endif -+ /* -+ * We can control the LTV350QV LCD panel, but it isn't much -+ * point since we don't have an LCD controller... -+ */ -+}; -+#endif -+ -+#ifdef CONFIG_BOARD_ATSTK100X_SPI1 -+static struct spi_board_info spi1_board_info[] __initdata = { { -+ /* patch in custom entries here */ -+} }; -+#endif -+ -+static struct cf_platform_data __initdata cf0_data = { -+#ifdef CONFIG_BOARD_ATSTK1002_CF_HACKS -+ .detect_pin = CONFIG_BOARD_ATSTK1002_CF_DETECT_PIN, -+ .reset_pin = CONFIG_BOARD_ATSTK1002_CF_RESET_PIN, -+#else -+ .detect_pin = GPIO_PIN_NONE, -+ .reset_pin = GPIO_PIN_NONE, -+#endif -+ .vcc_pin = GPIO_PIN_NONE, -+ .ready_pin = GPIO_PIN_PB(27), -+ .cs = 4, -+}; -+ -+#ifdef CONFIG_BOARD_ATSTK1000_EXTDAC -+static void __init atstk1003_setup_extdac(void) -+{ -+ struct clk *gclk; -+ struct clk *pll; -+ -+ gclk = clk_get(NULL, "gclk0"); -+ if (IS_ERR(gclk)) -+ goto err_gclk; -+ pll = clk_get(NULL, "pll0"); -+ if (IS_ERR(pll)) -+ goto err_pll; -+ -+ if (clk_set_parent(gclk, pll)) { -+ pr_debug("STK1000: failed to set pll0 as parent for DAC clock\n"); -+ goto err_set_clk; -+ } -+ -+ at32_select_periph(GPIO_PIN_PA(30), GPIO_PERIPH_A, 0); -+ at73c213_data.dac_clk = gclk; -+ -+err_set_clk: -+ clk_put(pll); -+err_pll: -+ clk_put(gclk); -+err_gclk: -+ return; -+} -+#else -+static void __init atstk1003_setup_extdac(void) -+{ -+ -+} -+#endif /* CONFIG_BOARD_ATSTK1000_EXTDAC */ -+ -+void __init setup_board(void) -+{ -+#ifdef CONFIG_BOARD_ATSTK100X_SW2_CUSTOM -+ at32_map_usart(0, 1); /* USART 0/B: /dev/ttyS1, IRDA */ -+#else -+ at32_map_usart(1, 0); /* USART 1/A: /dev/ttyS0, DB9 */ -+#endif -+ /* USART 2/unused: expansion connector */ -+ at32_map_usart(3, 2); /* USART 3/C: /dev/ttyS2, DB9 */ -+ -+ at32_setup_serial_console(0); -+} -+ -+static int __init atstk1003_init(void) -+{ -+ /* -+ * ATSTK1000 uses 32-bit SDRAM interface. Reserve the -+ * SDRAM-specific pins so that nobody messes with them. -+ */ -+ at32_reserve_pin(GPIO_PIN_PE(0)); /* DATA[16] */ -+ at32_reserve_pin(GPIO_PIN_PE(1)); /* DATA[17] */ -+ at32_reserve_pin(GPIO_PIN_PE(2)); /* DATA[18] */ -+ at32_reserve_pin(GPIO_PIN_PE(3)); /* DATA[19] */ -+ at32_reserve_pin(GPIO_PIN_PE(4)); /* DATA[20] */ -+ at32_reserve_pin(GPIO_PIN_PE(5)); /* DATA[21] */ -+ at32_reserve_pin(GPIO_PIN_PE(6)); /* DATA[22] */ -+ at32_reserve_pin(GPIO_PIN_PE(7)); /* DATA[23] */ -+ at32_reserve_pin(GPIO_PIN_PE(8)); /* DATA[24] */ -+ at32_reserve_pin(GPIO_PIN_PE(9)); /* DATA[25] */ -+ at32_reserve_pin(GPIO_PIN_PE(10)); /* DATA[26] */ -+ at32_reserve_pin(GPIO_PIN_PE(11)); /* DATA[27] */ -+ at32_reserve_pin(GPIO_PIN_PE(12)); /* DATA[28] */ -+ at32_reserve_pin(GPIO_PIN_PE(13)); /* DATA[29] */ -+ at32_reserve_pin(GPIO_PIN_PE(14)); /* DATA[30] */ -+ at32_reserve_pin(GPIO_PIN_PE(15)); /* DATA[31] */ -+ at32_reserve_pin(GPIO_PIN_PE(26)); /* SDCS */ -+ -+ at32_add_system_devices(); -+ -+#ifdef CONFIG_BOARD_ATSTK100X_SW2_CUSTOM -+ at32_add_device_usart(1); -+#else -+ at32_add_device_usart(0); -+#endif -+ at32_add_device_usart(2); -+ -+#ifndef CONFIG_BOARD_ATSTK100X_SW1_CUSTOM -+ at32_add_device_spi(0, spi0_board_info, ARRAY_SIZE(spi0_board_info)); -+#endif -+#ifdef CONFIG_BOARD_ATSTK100X_SPI1 -+ at32_add_device_spi(1, spi1_board_info, ARRAY_SIZE(spi1_board_info)); -+#endif -+#ifndef CONFIG_BOARD_ATSTK100X_SW2_CUSTOM -+ at32_add_device_mci(0, NULL); -+#endif -+ at32_add_device_usba(0, NULL); -+#ifdef CONFIG_BOARD_ATSTK100X_ENABLE_AC97 -+ at32_add_device_ac97c(0); -+#else -+ at32_add_device_abdac(0); -+#endif -+#ifndef CONFIG_BOARD_ATSTK100X_SW3_CUSTOM -+ at32_add_device_ssc(0, ATMEL_SSC_TX); -+#endif -+ at32_add_device_cf(0, 2, &cf0_data); -+ -+ atstk1000_setup_j2_leds(); -+ atstk1003_setup_extdac(); -+ -+ return 0; -+} -+postcore_initcall(atstk1003_init); -diff --git a/arch/avr32/boards/atstk1000/atstk1004.c b/arch/avr32/boards/atstk1000/atstk1004.c -new file mode 100644 -index 0000000..96015dd ---- /dev/null -+++ b/arch/avr32/boards/atstk1000/atstk1004.c -@@ -0,0 +1,152 @@ -+/* -+ * ATSTK1003 daughterboard-specific init code -+ * -+ * Copyright (C) 2007 Atmel Corporation -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 as -+ * published by the Free Software Foundation. -+ */ -+#include <linux/clk.h> -+#include <linux/err.h> -+#include <linux/init.h> -+#include <linux/kernel.h> -+#include <linux/platform_device.h> -+#include <linux/string.h> -+#include <linux/types.h> -+ -+#include <linux/spi/at73c213.h> -+#include <linux/spi/spi.h> -+ -+#include <video/atmel_lcdc.h> -+ -+#include <asm/setup.h> -+ -+#include <asm/arch/at32ap700x.h> -+#include <asm/arch/board.h> -+#include <asm/arch/init.h> -+#include <asm/arch/portmux.h> -+ -+#include "atstk1000.h" -+ -+#ifdef CONFIG_BOARD_ATSTK1000_EXTDAC -+static struct at73c213_board_info at73c213_data = { -+ .ssc_id = 0, -+ .shortname = "AVR32 STK1000 external DAC", -+}; -+#endif -+ -+#ifndef CONFIG_BOARD_ATSTK100X_SW1_CUSTOM -+static struct spi_board_info spi0_board_info[] __initdata = { -+#ifdef CONFIG_BOARD_ATSTK1000_EXTDAC -+ { -+ /* AT73C213 */ -+ .modalias = "at73c213", -+ .max_speed_hz = 200000, -+ .chip_select = 0, -+ .mode = SPI_MODE_1, -+ .platform_data = &at73c213_data, -+ }, -+#endif -+ { -+ /* QVGA display */ -+ .modalias = "ltv350qv", -+ .max_speed_hz = 16000000, -+ .chip_select = 1, -+ .mode = SPI_MODE_3, -+ }, -+}; -+#endif -+ -+#ifdef CONFIG_BOARD_ATSTK100X_SPI1 -+static struct spi_board_info spi1_board_info[] __initdata = { { -+ /* patch in custom entries here */ -+} }; -+#endif -+ -+#ifdef CONFIG_BOARD_ATSTK1000_EXTDAC -+static void __init atstk1004_setup_extdac(void) -+{ -+ struct clk *gclk; -+ struct clk *pll; -+ -+ gclk = clk_get(NULL, "gclk0"); -+ if (IS_ERR(gclk)) -+ goto err_gclk; -+ pll = clk_get(NULL, "pll0"); -+ if (IS_ERR(pll)) -+ goto err_pll; -+ -+ if (clk_set_parent(gclk, pll)) { -+ pr_debug("STK1000: failed to set pll0 as parent for DAC clock\n"); -+ goto err_set_clk; -+ } -+ -+ at32_select_periph(GPIO_PIN_PA(30), GPIO_PERIPH_A, 0); -+ at73c213_data.dac_clk = gclk; -+ -+err_set_clk: -+ clk_put(pll); -+err_pll: -+ clk_put(gclk); -+err_gclk: -+ return; -+} -+#else -+static void __init atstk1004_setup_extdac(void) -+{ -+ -+} -+#endif /* CONFIG_BOARD_ATSTK1000_EXTDAC */ -+ -+void __init setup_board(void) -+{ -+#ifdef CONFIG_BOARD_ATSTK100X_SW2_CUSTOM -+ at32_map_usart(0, 1); /* USART 0/B: /dev/ttyS1, IRDA */ -+#else -+ at32_map_usart(1, 0); /* USART 1/A: /dev/ttyS0, DB9 */ -+#endif -+ /* USART 2/unused: expansion connector */ -+ at32_map_usart(3, 2); /* USART 3/C: /dev/ttyS2, DB9 */ -+ -+ at32_setup_serial_console(0); -+} -+ -+static int __init atstk1004_init(void) -+{ -+ at32_add_system_devices(); -+ -+#ifdef CONFIG_BOARD_ATSTK100X_SW2_CUSTOM -+ at32_add_device_usart(1); -+#else -+ at32_add_device_usart(0); -+#endif -+ at32_add_device_usart(2); -+ -+#ifndef CONFIG_BOARD_ATSTK100X_SW1_CUSTOM -+ at32_add_device_spi(0, spi0_board_info, ARRAY_SIZE(spi0_board_info)); -+#endif -+#ifdef CONFIG_BOARD_ATSTK100X_SPI1 -+ at32_add_device_spi(1, spi1_board_info, ARRAY_SIZE(spi1_board_info)); -+#endif -+#ifndef CONFIG_BOARD_ATSTK100X_SW2_CUSTOM -+ at32_add_device_mci(0, NULL); -+#endif -+ at32_add_device_lcdc(0, &atstk1000_lcdc_data, -+ fbmem_start, fbmem_size); -+ at32_add_device_usba(0, NULL); -+#ifdef CONFIG_BOARD_ATSTK100X_ENABLE_AC97 -+ at32_add_device_ac97c(0); -+#else -+ at32_add_device_abdac(0); -+#endif -+#ifndef CONFIG_BOARD_ATSTK100X_SW3_CUSTOM -+ at32_add_device_ssc(0, ATMEL_SSC_TX); -+#endif -+ -+ atstk1000_setup_j2_leds(); -+ atstk1004_setup_extdac(); -+ -+ return 0; -+} -+postcore_initcall(atstk1004_init); -diff --git a/arch/avr32/boards/atstk1000/flash.c b/arch/avr32/boards/atstk1000/flash.c -index aac4300..3d0a102 100644 ---- a/arch/avr32/boards/atstk1000/flash.c -+++ b/arch/avr32/boards/atstk1000/flash.c -@@ -15,7 +15,7 @@ - - #include <asm/arch/smc.h> - --static struct smc_config flash_config __initdata = { -+static struct smc_timing flash_timing __initdata = { - .ncs_read_setup = 0, - .nrd_setup = 40, - .ncs_write_setup = 0, -@@ -28,7 +28,9 @@ static struct smc_config flash_config __initdata = { - - .read_cycle = 120, - .write_cycle = 120, -+}; - -+static struct smc_config flash_config __initdata = { - .bus_width = 2, - .nrd_controlled = 1, - .nwe_controlled = 1, -@@ -82,6 +84,7 @@ static int __init atstk1000_flash_init(void) - { - int ret; - -+ smc_set_timing(&flash_config, &flash_timing); - ret = smc_set_configuration(0, &flash_config); - if (ret < 0) { - printk(KERN_ERR "atstk1000: failed to set NOR flash timing\n"); -diff --git a/arch/avr32/boards/atstk1000/setup.c b/arch/avr32/boards/atstk1000/setup.c -index c9af409..8bedf93 100644 ---- a/arch/avr32/boards/atstk1000/setup.c -+++ b/arch/avr32/boards/atstk1000/setup.c -@@ -10,13 +10,17 @@ - #include <linux/bootmem.h> - #include <linux/fb.h> - #include <linux/init.h> -+#include <linux/platform_device.h> - #include <linux/types.h> - #include <linux/linkage.h> - - #include <video/atmel_lcdc.h> - - #include <asm/setup.h> -+ -+#include <asm/arch/at32ap700x.h> - #include <asm/arch/board.h> -+#include <asm/arch/portmux.h> - - #include "atstk1000.h" - -@@ -61,3 +65,63 @@ struct atmel_lcdfb_info __initdata atstk1000_lcdc_data = { - .default_monspecs = &atstk1000_default_monspecs, - .guard_time = 2, - }; -+ -+#ifdef CONFIG_BOARD_ATSTK1000_J2_LED -+#include <linux/leds.h> -+ -+static struct gpio_led stk1000_j2_led[] = { -+#ifdef CONFIG_BOARD_ATSTK1000_J2_LED8 -+#define LEDSTRING "J2 jumpered to LED8" -+ { .name = "led0:amber", .gpio = GPIO_PIN_PB( 8), }, -+ { .name = "led1:amber", .gpio = GPIO_PIN_PB( 9), }, -+ { .name = "led2:amber", .gpio = GPIO_PIN_PB(10), }, -+ { .name = "led3:amber", .gpio = GPIO_PIN_PB(13), }, -+ { .name = "led4:amber", .gpio = GPIO_PIN_PB(14), }, -+ { .name = "led5:amber", .gpio = GPIO_PIN_PB(15), }, -+ { .name = "led6:amber", .gpio = GPIO_PIN_PB(16), }, -+ { .name = "led7:amber", .gpio = GPIO_PIN_PB(30), -+ .default_trigger = "heartbeat", }, -+#else /* RGB */ -+#define LEDSTRING "J2 jumpered to RGB LEDs" -+ { .name = "r1:red", .gpio = GPIO_PIN_PB( 8), }, -+ { .name = "g1:green", .gpio = GPIO_PIN_PB(10), }, -+ { .name = "b1:blue", .gpio = GPIO_PIN_PB(14), }, -+ -+ { .name = "r2:red", .gpio = GPIO_PIN_PB( 9), -+ .default_trigger = "heartbeat", }, -+ { .name = "g2:green", .gpio = GPIO_PIN_PB(13), }, -+ { .name = "b2:blue", .gpio = GPIO_PIN_PB(15), -+ .default_trigger = "heartbeat", }, -+ /* PB16, PB30 unused */ -+#endif -+}; -+ -+static struct gpio_led_platform_data stk1000_j2_led_data = { -+ .num_leds = ARRAY_SIZE(stk1000_j2_led), -+ .leds = stk1000_j2_led, -+}; -+ -+static struct platform_device stk1000_j2_led_dev = { -+ .name = "leds-gpio", -+ .id = 2, /* gpio block J2 */ -+ .dev = { -+ .platform_data = &stk1000_j2_led_data, -+ }, -+}; -+ -+void __init atstk1000_setup_j2_leds(void) -+{ -+ unsigned i; -+ -+ for (i = 0; i < ARRAY_SIZE(stk1000_j2_led); i++) -+ at32_select_gpio(stk1000_j2_led[i].gpio, AT32_GPIOF_OUTPUT); -+ -+ printk("STK1000: " LEDSTRING "\n"); -+ platform_device_register(&stk1000_j2_led_dev); -+} -+#else /* CONFIG_BOARD_ATSTK1000_J2_LED */ -+void __init atstk1000_setup_j2_leds(void) -+{ -+ -+} -+#endif /* CONFIG_BOARD_ATSTK1000_J2_LED */ -diff --git a/arch/avr32/configs/atngw100_defconfig b/arch/avr32/configs/atngw100_defconfig -index b799a68..ca4538b 100644 ---- a/arch/avr32/configs/atngw100_defconfig -+++ b/arch/avr32/configs/atngw100_defconfig -@@ -1,7 +1,7 @@ - # - # Automatically generated make config: don't edit --# Linux kernel version: 2.6.22-rc5 --# Sat Jun 23 15:40:05 2007 -+# Linux kernel version: 2.6.22.atmel.1 -+# Thu Jul 12 17:49:20 2007 - # - CONFIG_AVR32=y - CONFIG_GENERIC_GPIO=y -@@ -111,17 +111,22 @@ CONFIG_SUBARCH_AVR32B=y - CONFIG_MMU=y - CONFIG_PERFORMANCE_COUNTERS=y - CONFIG_PLATFORM_AT32AP=y -+CONFIG_CPU_AT32AP700X=y - CONFIG_CPU_AT32AP7000=y -+# CONFIG_CPU_AT32AP7001 is not set -+# CONFIG_CPU_AT32AP7002 is not set - # CONFIG_BOARD_ATSTK1000 is not set - CONFIG_BOARD_ATNGW100=y -+# CONFIG_BOARD_ATNGW100_I2C_GPIO is not set - CONFIG_LOADER_U_BOOT=y - - # - # Atmel AVR32 AP options - # --# CONFIG_AP7000_32_BIT_SMC is not set --CONFIG_AP7000_16_BIT_SMC=y --# CONFIG_AP7000_8_BIT_SMC is not set -+# CONFIG_AP700X_32_BIT_SMC is not set -+CONFIG_AP700X_16_BIT_SMC=y -+# CONFIG_AP700X_8_BIT_SMC is not set -+CONFIG_GPIO_DEV=y - CONFIG_LOAD_ADDRESS=0x10000000 - CONFIG_ENTRY_ADDRESS=0x90000000 - CONFIG_PHYS_OFFSET=0x10000000 -@@ -145,6 +150,7 @@ CONFIG_SPLIT_PTLOCK_CPUS=4 - # CONFIG_RESOURCES_64BIT is not set - CONFIG_ZONE_DMA_FLAG=0 - # CONFIG_OWNERSHIP_TRACE is not set -+CONFIG_DW_DMAC=y - # CONFIG_HZ_100 is not set - CONFIG_HZ_250=y - # CONFIG_HZ_300 is not set -@@ -153,6 +159,27 @@ CONFIG_HZ=250 - CONFIG_CMDLINE="" - - # -+# Power managment options -+# -+ -+# -+# CPU Frequency scaling -+# -+CONFIG_CPU_FREQ=y -+CONFIG_CPU_FREQ_TABLE=y -+# CONFIG_CPU_FREQ_DEBUG is not set -+CONFIG_CPU_FREQ_STAT=m -+# CONFIG_CPU_FREQ_STAT_DETAILS is not set -+CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y -+# CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set -+CONFIG_CPU_FREQ_GOV_PERFORMANCE=y -+CONFIG_CPU_FREQ_GOV_POWERSAVE=y -+CONFIG_CPU_FREQ_GOV_USERSPACE=y -+CONFIG_CPU_FREQ_GOV_ONDEMAND=y -+# CONFIG_CPU_FREQ_GOV_CONSERVATIVE is not set -+CONFIG_CPU_FREQ_AT32AP=y -+ -+# - # Bus options - # - # CONFIG_ARCH_SUPPORTS_MSI is not set -@@ -187,13 +214,8 @@ CONFIG_NET_KEY=y - # CONFIG_NET_KEY_MIGRATE is not set - CONFIG_INET=y - CONFIG_IP_MULTICAST=y --CONFIG_IP_ADVANCED_ROUTER=y --CONFIG_ASK_IP_FIB_HASH=y --# CONFIG_IP_FIB_TRIE is not set -+# CONFIG_IP_ADVANCED_ROUTER is not set - CONFIG_IP_FIB_HASH=y --# CONFIG_IP_MULTIPLE_TABLES is not set --# CONFIG_IP_ROUTE_MULTIPATH is not set --# CONFIG_IP_ROUTE_VERBOSE is not set - CONFIG_IP_PNP=y - CONFIG_IP_PNP_DHCP=y - # CONFIG_IP_PNP_BOOTP is not set -@@ -240,6 +262,7 @@ CONFIG_IPV6_SIT=y - # CONFIG_NETWORK_SECMARK is not set - CONFIG_NETFILTER=y - # CONFIG_NETFILTER_DEBUG is not set -+CONFIG_BRIDGE_NETFILTER=y - - # - # Core Netfilter Configuration -@@ -284,6 +307,7 @@ CONFIG_NETFILTER_XT_MATCH_MAC=m - CONFIG_NETFILTER_XT_MATCH_MARK=m - CONFIG_NETFILTER_XT_MATCH_POLICY=m - CONFIG_NETFILTER_XT_MATCH_MULTIPORT=m -+# CONFIG_NETFILTER_XT_MATCH_PHYSDEV is not set - CONFIG_NETFILTER_XT_MATCH_PKTTYPE=m - CONFIG_NETFILTER_XT_MATCH_QUOTA=m - CONFIG_NETFILTER_XT_MATCH_REALM=m -@@ -359,13 +383,19 @@ CONFIG_IP6_NF_TARGET_REJECT=m - CONFIG_IP6_NF_MANGLE=m - CONFIG_IP6_NF_TARGET_HL=m - CONFIG_IP6_NF_RAW=m -+ -+# -+# Bridge: Netfilter Configuration -+# -+# CONFIG_BRIDGE_NF_EBTABLES is not set - # CONFIG_IP_DCCP is not set - # CONFIG_IP_SCTP is not set - # CONFIG_TIPC is not set - # CONFIG_ATM is not set --# CONFIG_BRIDGE is not set -+CONFIG_BRIDGE=m - CONFIG_VLAN_8021Q=m - # CONFIG_DECNET is not set -+CONFIG_LLC=m - # CONFIG_LLC2 is not set - # CONFIG_IPX is not set - # CONFIG_ATALK is not set -@@ -521,7 +551,6 @@ CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024 - # - # Misc devices - # --# CONFIG_BLINK is not set - # CONFIG_IDE is not set - - # -@@ -545,13 +574,26 @@ CONFIG_NETDEVICES=y - # CONFIG_BONDING is not set - # CONFIG_EQUALIZER is not set - CONFIG_TUN=m --# CONFIG_PHYLIB is not set -+CONFIG_PHYLIB=y -+ -+# -+# MII PHY device drivers -+# -+# CONFIG_MARVELL_PHY is not set -+# CONFIG_DAVICOM_PHY is not set -+# CONFIG_QSEMI_PHY is not set -+# CONFIG_LXT_PHY is not set -+# CONFIG_CICADA_PHY is not set -+# CONFIG_VITESSE_PHY is not set -+# CONFIG_SMSC_PHY is not set -+# CONFIG_BROADCOM_PHY is not set -+# CONFIG_FIXED_PHY is not set - - # - # Ethernet (10 or 100Mbit) - # - CONFIG_NET_ETHERNET=y --CONFIG_MII=y -+# CONFIG_MII is not set - CONFIG_MACB=y - # CONFIG_NETDEV_1000 is not set - # CONFIG_NETDEV_10000 is not set -@@ -625,7 +667,15 @@ CONFIG_UNIX98_PTYS=y - # IPMI - # - # CONFIG_IPMI_HANDLER is not set --# CONFIG_WATCHDOG is not set -+CONFIG_WATCHDOG=y -+# CONFIG_WATCHDOG_NOWAYOUT is not set -+ -+# -+# Watchdog Device Drivers -+# -+# CONFIG_SOFT_WATCHDOG is not set -+CONFIG_AT32AP700X_WDT=y -+CONFIG_AT32AP700X_WDT_TIMEOUT=2 - # CONFIG_HW_RANDOM is not set - # CONFIG_RTC is not set - # CONFIG_GEN_RTC is not set -@@ -636,7 +686,42 @@ CONFIG_UNIX98_PTYS=y - # TPM devices - # - # CONFIG_TCG_TPM is not set --# CONFIG_I2C is not set -+CONFIG_I2C=m -+CONFIG_I2C_BOARDINFO=y -+CONFIG_I2C_CHARDEV=m -+ -+# -+# I2C Algorithms -+# -+CONFIG_I2C_ALGOBIT=m -+# CONFIG_I2C_ALGOPCF is not set -+# CONFIG_I2C_ALGOPCA is not set -+ -+# -+# I2C Hardware Bus support -+# -+CONFIG_I2C_ATMELTWI=m -+CONFIG_I2C_ATMELTWI_BAUDRATE=100000 -+CONFIG_I2C_GPIO=m -+# CONFIG_I2C_OCORES is not set -+# CONFIG_I2C_PARPORT_LIGHT is not set -+# CONFIG_I2C_SIMTEC is not set -+# CONFIG_I2C_STUB is not set -+ -+# -+# Miscellaneous I2C Chip support -+# -+# CONFIG_SENSORS_DS1337 is not set -+# CONFIG_SENSORS_DS1374 is not set -+# CONFIG_SENSORS_EEPROM is not set -+# CONFIG_SENSORS_PCF8574 is not set -+# CONFIG_SENSORS_PCA9539 is not set -+# CONFIG_SENSORS_PCF8591 is not set -+# CONFIG_SENSORS_MAX6875 is not set -+# CONFIG_I2C_DEBUG_CORE is not set -+# CONFIG_I2C_DEBUG_ALGO is not set -+# CONFIG_I2C_DEBUG_BUS is not set -+# CONFIG_I2C_DEBUG_CHIP is not set - - # - # SPI support -@@ -655,7 +740,7 @@ CONFIG_SPI_ATMEL=y - # SPI Protocol Masters - # - # CONFIG_SPI_AT25 is not set --# CONFIG_SPI_SPIDEV is not set -+CONFIG_SPI_SPIDEV=m - - # - # Dallas's 1-wire bus -@@ -706,8 +791,41 @@ CONFIG_SPI_ATMEL=y - # - # USB Gadget Support - # --# CONFIG_USB_GADGET is not set --# CONFIG_MMC is not set -+CONFIG_USB_GADGET=y -+# CONFIG_USB_GADGET_DEBUG_FILES is not set -+CONFIG_USB_GADGET_SELECTED=y -+# CONFIG_USB_GADGET_FSL_USB2 is not set -+# CONFIG_USB_GADGET_NET2280 is not set -+# CONFIG_USB_GADGET_PXA2XX is not set -+# CONFIG_USB_GADGET_GOKU is not set -+# CONFIG_USB_GADGET_LH7A40X is not set -+CONFIG_USB_GADGET_ATMEL_USBA=y -+CONFIG_USB_ATMEL_USBA=y -+# CONFIG_USB_GADGET_OMAP is not set -+# CONFIG_USB_GADGET_AT91 is not set -+# CONFIG_USB_GADGET_DUMMY_HCD is not set -+CONFIG_USB_GADGET_DUALSPEED=y -+CONFIG_USB_ZERO=m -+CONFIG_USB_ETH=m -+CONFIG_USB_ETH_RNDIS=y -+CONFIG_USB_GADGETFS=m -+CONFIG_USB_FILE_STORAGE=m -+# CONFIG_USB_FILE_STORAGE_TEST is not set -+CONFIG_USB_G_SERIAL=m -+# CONFIG_USB_MIDI_GADGET is not set -+CONFIG_MMC=y -+# CONFIG_MMC_DEBUG is not set -+# CONFIG_MMC_UNSAFE_RESUME is not set -+ -+# -+# MMC/SD Card Drivers -+# -+CONFIG_MMC_BLOCK=y -+ -+# -+# MMC/SD Host Controller Drivers -+# -+CONFIG_MMC_ATMELMCI=y - - # - # LED devices -@@ -727,27 +845,62 @@ CONFIG_LEDS_TRIGGERS=y - CONFIG_LEDS_TRIGGER_TIMER=y - CONFIG_LEDS_TRIGGER_HEARTBEAT=y - -+# -+# InfiniBand support -+# - - # --# LED drivers -+# EDAC - error detection and reporting (RAS) (EXPERIMENTAL) - # - - # --# LED Triggers -+# Real Time Clock - # -+CONFIG_RTC_LIB=y -+CONFIG_RTC_CLASS=y -+CONFIG_RTC_HCTOSYS=y -+CONFIG_RTC_HCTOSYS_DEVICE="rtc0" -+# CONFIG_RTC_DEBUG is not set - - # --# InfiniBand support -+# RTC interfaces - # -+CONFIG_RTC_INTF_SYSFS=y -+CONFIG_RTC_INTF_PROC=y -+CONFIG_RTC_INTF_DEV=y -+# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set -+# CONFIG_RTC_DRV_TEST is not set - - # --# EDAC - error detection and reporting (RAS) (EXPERIMENTAL) -+# I2C RTC drivers - # -+# CONFIG_RTC_DRV_DS1307 is not set -+# CONFIG_RTC_DRV_DS1672 is not set -+# CONFIG_RTC_DRV_MAX6900 is not set -+# CONFIG_RTC_DRV_RS5C372 is not set -+# CONFIG_RTC_DRV_ISL1208 is not set -+# CONFIG_RTC_DRV_X1205 is not set -+# CONFIG_RTC_DRV_PCF8563 is not set -+# CONFIG_RTC_DRV_PCF8583 is not set - - # --# Real Time Clock -+# SPI RTC drivers -+# -+# CONFIG_RTC_DRV_RS5C348 is not set -+# CONFIG_RTC_DRV_MAX6902 is not set -+ -+# -+# Platform RTC drivers -+# -+# CONFIG_RTC_DRV_DS1553 is not set -+# CONFIG_RTC_DRV_DS1742 is not set -+# CONFIG_RTC_DRV_M48T86 is not set -+# CONFIG_RTC_DRV_V3020 is not set -+ -+# -+# on-CPU RTC drivers - # --# CONFIG_RTC_CLASS is not set -+CONFIG_RTC_DRV_AT32AP700X=y - - # - # DMA Engine support -@@ -781,7 +934,8 @@ CONFIG_JBD=y - # CONFIG_OCFS2_FS is not set - # CONFIG_MINIX_FS is not set - # CONFIG_ROMFS_FS is not set --# CONFIG_INOTIFY is not set -+CONFIG_INOTIFY=y -+CONFIG_INOTIFY_USER=y - # CONFIG_QUOTA is not set - # CONFIG_DNOTIFY is not set - # CONFIG_AUTOFS_FS is not set -@@ -936,7 +1090,7 @@ CONFIG_TRACE_IRQFLAGS_SUPPORT=y - CONFIG_ENABLE_MUST_CHECK=y - CONFIG_MAGIC_SYSRQ=y - # CONFIG_UNUSED_SYMBOLS is not set --# CONFIG_DEBUG_FS is not set -+CONFIG_DEBUG_FS=y - # CONFIG_HEADERS_CHECK is not set - CONFIG_DEBUG_KERNEL=y - # CONFIG_DEBUG_SHIRQ is not set -diff --git a/arch/avr32/configs/atstk1002_defconfig b/arch/avr32/configs/atstk1002_defconfig -index 3b977fd..c3d4c33 100644 ---- a/arch/avr32/configs/atstk1002_defconfig -+++ b/arch/avr32/configs/atstk1002_defconfig -@@ -1,7 +1,7 @@ - # - # Automatically generated make config: don't edit --# Linux kernel version: 2.6.22-rc5 --# Sat Jun 23 15:32:08 2007 -+# Linux kernel version: 2.6.23.atmel.1 -+# Tue Oct 16 12:57:22 2007 - # - CONFIG_AVR32=y - CONFIG_GENERIC_GPIO=y -@@ -18,20 +18,15 @@ CONFIG_GENERIC_BUG=y - CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" - - # --# Code maturity level options -+# General setup - # - CONFIG_EXPERIMENTAL=y - CONFIG_BROKEN_ON_SMP=y - CONFIG_INIT_ENV_ARG_LIMIT=32 -- --# --# General setup --# - CONFIG_LOCALVERSION="" - # CONFIG_LOCALVERSION_AUTO is not set - CONFIG_SWAP=y - CONFIG_SYSVIPC=y --# CONFIG_IPC_NS is not set - CONFIG_SYSVIPC_SYSCTL=y - CONFIG_POSIX_MQUEUE=y - CONFIG_BSD_PROCESS_ACCT=y -@@ -39,7 +34,7 @@ CONFIG_BSD_PROCESS_ACCT_V3=y - CONFIG_TASKSTATS=y - CONFIG_TASK_DELAY_ACCT=y - # CONFIG_TASK_XACCT is not set --# CONFIG_UTS_NS is not set -+# CONFIG_USER_NS is not set - CONFIG_AUDIT=y - # CONFIG_IKCONFIG is not set - CONFIG_LOG_BUF_SHIFT=14 -@@ -63,7 +58,6 @@ CONFIG_FUTEX=y - CONFIG_ANON_INODES=y - CONFIG_EPOLL=y - CONFIG_SIGNALFD=y --CONFIG_TIMERFD=y - CONFIG_EVENTFD=y - CONFIG_SHMEM=y - CONFIG_VM_EVENT_COUNTERS=y -@@ -74,24 +68,17 @@ CONFIG_SLUB=y - CONFIG_RT_MUTEXES=y - # CONFIG_TINY_SHMEM is not set - CONFIG_BASE_SMALL=1 -- --# --# Loadable module support --# - CONFIG_MODULES=y - CONFIG_MODULE_UNLOAD=y --# CONFIG_MODULE_FORCE_UNLOAD is not set -+CONFIG_MODULE_FORCE_UNLOAD=y - # CONFIG_MODVERSIONS is not set - # CONFIG_MODULE_SRCVERSION_ALL is not set --# CONFIG_KMOD is not set -- --# --# Block layer --# -+CONFIG_KMOD=y - CONFIG_BLOCK=y - # CONFIG_LBD is not set - # CONFIG_BLK_DEV_IO_TRACE is not set - # CONFIG_LSF is not set -+# CONFIG_BLK_DEV_BSG is not set - - # - # IO Schedulers -@@ -99,12 +86,12 @@ CONFIG_BLOCK=y - CONFIG_IOSCHED_NOOP=y - # CONFIG_IOSCHED_AS is not set - # CONFIG_IOSCHED_DEADLINE is not set --# CONFIG_IOSCHED_CFQ is not set -+CONFIG_IOSCHED_CFQ=y - # CONFIG_DEFAULT_AS is not set - # CONFIG_DEFAULT_DEADLINE is not set --# CONFIG_DEFAULT_CFQ is not set --CONFIG_DEFAULT_NOOP=y --CONFIG_DEFAULT_IOSCHED="noop" -+CONFIG_DEFAULT_CFQ=y -+# CONFIG_DEFAULT_NOOP is not set -+CONFIG_DEFAULT_IOSCHED="cfq" - - # - # System Type and features -@@ -114,17 +101,27 @@ CONFIG_MMU=y - CONFIG_PERFORMANCE_COUNTERS=y - CONFIG_PLATFORM_AT32AP=y - CONFIG_CPU_AT32AP7000=y -+# CONFIG_CPU_AT32AP7001 is not set -+# CONFIG_CPU_AT32AP7002 is not set - CONFIG_BOARD_ATSTK1002=y - CONFIG_BOARD_ATSTK1000=y - # CONFIG_BOARD_ATNGW100 is not set -+# CONFIG_BOARD_ATSTK1002_CUSTOM is not set -+# CONFIG_BOARD_ATSTK1002_SPI1 is not set -+# CONFIG_BOARD_ATSTK1002_J2_LED is not set -+# CONFIG_BOARD_ATSTK1002_J2_LED8 is not set -+# CONFIG_BOARD_ATSTK1002_J2_RGB is not set -+# CONFIG_BOARD_ATSTK1002_ENABLE_AC97 is not set -+# CONFIG_BOARD_ATSTK1002_CF_HACKS is not set - CONFIG_LOADER_U_BOOT=y - - # - # Atmel AVR32 AP options - # --# CONFIG_AP7000_32_BIT_SMC is not set --CONFIG_AP7000_16_BIT_SMC=y --# CONFIG_AP7000_8_BIT_SMC is not set -+# CONFIG_AP700X_32_BIT_SMC is not set -+CONFIG_AP700X_16_BIT_SMC=y -+# CONFIG_AP700X_8_BIT_SMC is not set -+CONFIG_GPIO_DEV=y - CONFIG_LOAD_ADDRESS=0x10000000 - CONFIG_ENTRY_ADDRESS=0x90000000 - CONFIG_PHYS_OFFSET=0x10000000 -@@ -147,7 +144,9 @@ CONFIG_FLAT_NODE_MEM_MAP=y - CONFIG_SPLIT_PTLOCK_CPUS=4 - # CONFIG_RESOURCES_64BIT is not set - CONFIG_ZONE_DMA_FLAG=0 -+CONFIG_VIRT_TO_BUS=y - # CONFIG_OWNERSHIP_TRACE is not set -+CONFIG_DW_DMAC=y - # CONFIG_HZ_100 is not set - CONFIG_HZ_250=y - # CONFIG_HZ_300 is not set -@@ -156,6 +155,27 @@ CONFIG_HZ=250 - CONFIG_CMDLINE="" - - # -+# Power managment options -+# -+ -+# -+# CPU Frequency scaling -+# -+CONFIG_CPU_FREQ=y -+CONFIG_CPU_FREQ_TABLE=y -+# CONFIG_CPU_FREQ_DEBUG is not set -+CONFIG_CPU_FREQ_STAT=m -+# CONFIG_CPU_FREQ_STAT_DETAILS is not set -+CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y -+# CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set -+CONFIG_CPU_FREQ_GOV_PERFORMANCE=y -+CONFIG_CPU_FREQ_GOV_POWERSAVE=y -+CONFIG_CPU_FREQ_GOV_USERSPACE=y -+CONFIG_CPU_FREQ_GOV_ONDEMAND=y -+# CONFIG_CPU_FREQ_GOV_CONSERVATIVE is not set -+CONFIG_CPU_FREQ_AT32AP=y -+ -+# - # Bus options - # - # CONFIG_ARCH_SUPPORTS_MSI is not set -@@ -163,7 +183,16 @@ CONFIG_CMDLINE="" - # - # PCCARD (PCMCIA/CardBus) support - # --# CONFIG_PCCARD is not set -+CONFIG_PCCARD=m -+# CONFIG_PCMCIA_DEBUG is not set -+CONFIG_PCMCIA=m -+# CONFIG_PCMCIA_LOAD_CIS is not set -+# CONFIG_PCMCIA_IOCTL is not set -+ -+# -+# PC-card bridges -+# -+CONFIG_AT32_CF=m - - # - # Executable file formats -@@ -251,6 +280,7 @@ CONFIG_DEFAULT_TCP_CONG="cubic" - # CONFIG_MAC80211 is not set - # CONFIG_IEEE80211 is not set - # CONFIG_RFKILL is not set -+# CONFIG_NET_9P is not set - - # - # Device Drivers -@@ -265,10 +295,6 @@ CONFIG_STANDALONE=y - # CONFIG_DEBUG_DRIVER is not set - # CONFIG_DEBUG_DEVRES is not set - # CONFIG_SYS_HYPERVISOR is not set -- --# --# Connector - unified userspace <-> kernelspace linker --# - # CONFIG_CONNECTOR is not set - CONFIG_MTD=y - # CONFIG_MTD_DEBUG is not set -@@ -327,6 +353,8 @@ CONFIG_MTD_PHYSMAP_BANKWIDTH=2 - # - # Self-contained MTD device drivers - # -+CONFIG_MTD_DATAFLASH=m -+# CONFIG_MTD_M25P80 is not set - # CONFIG_MTD_SLRAM is not set - # CONFIG_MTD_PHRAM is not set - # CONFIG_MTD_MTDRAM is not set -@@ -345,20 +373,8 @@ CONFIG_MTD_PHYSMAP_BANKWIDTH=2 - # UBI - Unsorted block images - # - # CONFIG_MTD_UBI is not set -- --# --# Parallel port support --# - # CONFIG_PARPORT is not set -- --# --# Plug and Play support --# --# CONFIG_PNPACPI is not set -- --# --# Block devices --# -+CONFIG_BLK_DEV=y - # CONFIG_BLK_DEV_COW_COMMON is not set - CONFIG_BLK_DEV_LOOP=m - # CONFIG_BLK_DEV_CRYPTOLOOP is not set -@@ -369,11 +385,9 @@ CONFIG_BLK_DEV_RAM_SIZE=4096 - CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024 - # CONFIG_CDROM_PKTCDVD is not set - # CONFIG_ATA_OVER_ETH is not set -- --# --# Misc devices --# --# CONFIG_BLINK is not set -+CONFIG_MISC_DEVICES=y -+# CONFIG_EEPROM_93CX6 is not set -+CONFIG_ATMEL_SSC=m - # CONFIG_IDE is not set - - # -@@ -381,29 +395,34 @@ CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024 - # - # CONFIG_RAID_ATTRS is not set - # CONFIG_SCSI is not set -+# CONFIG_SCSI_DMA is not set - # CONFIG_SCSI_NETLINK is not set - # CONFIG_ATA is not set -- --# --# Multi-device support (RAID and LVM) --# - # CONFIG_MD is not set -- --# --# Network device support --# - CONFIG_NETDEVICES=y -+# CONFIG_NETDEVICES_MULTIQUEUE is not set - CONFIG_DUMMY=y - # CONFIG_BONDING is not set -+# CONFIG_MACVLAN is not set - # CONFIG_EQUALIZER is not set - CONFIG_TUN=m --# CONFIG_PHYLIB is not set -+CONFIG_PHYLIB=y - - # --# Ethernet (10 or 100Mbit) -+# MII PHY device drivers - # -+# CONFIG_MARVELL_PHY is not set -+# CONFIG_DAVICOM_PHY is not set -+# CONFIG_QSEMI_PHY is not set -+CONFIG_LXT_PHY=y -+# CONFIG_CICADA_PHY is not set -+# CONFIG_VITESSE_PHY is not set -+# CONFIG_SMSC_PHY is not set -+# CONFIG_BROADCOM_PHY is not set -+# CONFIG_ICPLUS_PHY is not set -+# CONFIG_FIXED_PHY is not set - CONFIG_NET_ETHERNET=y --CONFIG_MII=y -+# CONFIG_MII is not set - CONFIG_MACB=y - # CONFIG_NETDEV_1000 is not set - # CONFIG_NETDEV_10000 is not set -@@ -413,6 +432,7 @@ CONFIG_MACB=y - # - # CONFIG_WLAN_PRE80211 is not set - # CONFIG_WLAN_80211 is not set -+# CONFIG_NET_PCMCIA is not set - # CONFIG_WAN is not set - CONFIG_PPP=m - # CONFIG_PPP_MULTILINK is not set -@@ -423,27 +443,56 @@ CONFIG_PPP_DEFLATE=m - CONFIG_PPP_BSDCOMP=m - # CONFIG_PPP_MPPE is not set - # CONFIG_PPPOE is not set -+# CONFIG_PPPOL2TP is not set - # CONFIG_SLIP is not set - CONFIG_SLHC=m - # CONFIG_SHAPER is not set - # CONFIG_NETCONSOLE is not set - # CONFIG_NETPOLL is not set - # CONFIG_NET_POLL_CONTROLLER is not set -- --# --# ISDN subsystem --# - # CONFIG_ISDN is not set -- --# --# Telephony Support --# - # CONFIG_PHONE is not set - - # - # Input device support - # --# CONFIG_INPUT is not set -+CONFIG_INPUT=m -+# CONFIG_INPUT_FF_MEMLESS is not set -+CONFIG_INPUT_POLLDEV=m -+ -+# -+# Userland interfaces -+# -+CONFIG_INPUT_MOUSEDEV=m -+CONFIG_INPUT_MOUSEDEV_PSAUX=y -+CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 -+CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 -+# CONFIG_INPUT_JOYDEV is not set -+# CONFIG_INPUT_TSDEV is not set -+# CONFIG_INPUT_EVDEV is not set -+# CONFIG_INPUT_EVBUG is not set -+ -+# -+# Input Device Drivers -+# -+CONFIG_INPUT_KEYBOARD=y -+# CONFIG_KEYBOARD_ATKBD is not set -+# CONFIG_KEYBOARD_SUNKBD is not set -+# CONFIG_KEYBOARD_LKKBD is not set -+# CONFIG_KEYBOARD_XTKBD is not set -+# CONFIG_KEYBOARD_NEWTON is not set -+# CONFIG_KEYBOARD_STOWAWAY is not set -+CONFIG_KEYBOARD_GPIO=m -+CONFIG_INPUT_MOUSE=y -+# CONFIG_MOUSE_PS2 is not set -+# CONFIG_MOUSE_SERIAL is not set -+# CONFIG_MOUSE_APPLETOUCH is not set -+# CONFIG_MOUSE_VSXXXAA is not set -+CONFIG_MOUSE_GPIO=m -+# CONFIG_INPUT_JOYSTICK is not set -+# CONFIG_INPUT_TABLET is not set -+# CONFIG_INPUT_TOUCHSCREEN is not set -+# CONFIG_INPUT_MISC is not set - - # - # Hardware I/O ports -@@ -472,34 +521,88 @@ CONFIG_SERIAL_CORE=y - CONFIG_SERIAL_CORE_CONSOLE=y - CONFIG_UNIX98_PTYS=y - # CONFIG_LEGACY_PTYS is not set -+# CONFIG_IPMI_HANDLER is not set -+CONFIG_WATCHDOG=y -+# CONFIG_WATCHDOG_NOWAYOUT is not set - - # --# IPMI -+# Watchdog Device Drivers - # --# CONFIG_IPMI_HANDLER is not set --# CONFIG_WATCHDOG is not set -+# CONFIG_SOFT_WATCHDOG is not set -+CONFIG_AT32AP700X_WDT=y - # CONFIG_HW_RANDOM is not set - # CONFIG_RTC is not set - # CONFIG_GEN_RTC is not set - # CONFIG_R3964 is not set --# CONFIG_RAW_DRIVER is not set - - # --# TPM devices -+# PCMCIA character devices - # -+# CONFIG_SYNCLINK_CS is not set -+# CONFIG_CARDMAN_4000 is not set -+# CONFIG_CARDMAN_4040 is not set -+# CONFIG_RAW_DRIVER is not set - # CONFIG_TCG_TPM is not set --# CONFIG_I2C is not set -+CONFIG_I2C=m -+CONFIG_I2C_BOARDINFO=y -+CONFIG_I2C_CHARDEV=m -+ -+# -+# I2C Algorithms -+# -+CONFIG_I2C_ALGOBIT=m -+# CONFIG_I2C_ALGOPCF is not set -+# CONFIG_I2C_ALGOPCA is not set -+ -+# -+# I2C Hardware Bus support -+# -+CONFIG_I2C_ATMELTWI=m -+CONFIG_I2C_GPIO=m -+# CONFIG_I2C_OCORES is not set -+# CONFIG_I2C_PARPORT_LIGHT is not set -+# CONFIG_I2C_SIMTEC is not set -+# CONFIG_I2C_TAOS_EVM is not set -+# CONFIG_I2C_STUB is not set -+ -+# -+# Miscellaneous I2C Chip support -+# -+# CONFIG_SENSORS_DS1337 is not set -+# CONFIG_SENSORS_DS1374 is not set -+# CONFIG_DS1682 is not set -+# CONFIG_SENSORS_EEPROM is not set -+# CONFIG_SENSORS_PCF8574 is not set -+# CONFIG_SENSORS_PCA9539 is not set -+# CONFIG_SENSORS_PCF8591 is not set -+# CONFIG_SENSORS_MAX6875 is not set -+# CONFIG_SENSORS_TSL2550 is not set -+# CONFIG_I2C_DEBUG_CORE is not set -+# CONFIG_I2C_DEBUG_ALGO is not set -+# CONFIG_I2C_DEBUG_BUS is not set -+# CONFIG_I2C_DEBUG_CHIP is not set - - # - # SPI support - # --# CONFIG_SPI is not set --# CONFIG_SPI_MASTER is not set -+CONFIG_SPI=y -+# CONFIG_SPI_DEBUG is not set -+CONFIG_SPI_MASTER=y -+ -+# -+# SPI Master Controller Drivers -+# -+CONFIG_SPI_ATMEL=y -+# CONFIG_SPI_BITBANG is not set - - # --# Dallas's 1-wire bus -+# SPI Protocol Masters - # -+# CONFIG_SPI_AT25 is not set -+CONFIG_SPI_SPIDEV=m -+# CONFIG_SPI_TLE62X0 is not set - # CONFIG_W1 is not set -+# CONFIG_POWER_SUPPLY is not set - # CONFIG_HWMON is not set - - # -@@ -517,26 +620,110 @@ CONFIG_UNIX98_PTYS=y - # - # Graphics support - # --# CONFIG_BACKLIGHT_LCD_SUPPORT is not set -+CONFIG_BACKLIGHT_LCD_SUPPORT=y -+CONFIG_LCD_CLASS_DEVICE=y -+CONFIG_LCD_LTV350QV=y -+# CONFIG_BACKLIGHT_CLASS_DEVICE is not set - - # - # Display device support - # - # CONFIG_DISPLAY_SUPPORT is not set - # CONFIG_VGASTATE is not set --# CONFIG_FB is not set -+# CONFIG_VIDEO_OUTPUT_CONTROL is not set -+CONFIG_FB=y -+# CONFIG_FIRMWARE_EDID is not set -+# CONFIG_FB_DDC is not set -+CONFIG_FB_CFB_FILLRECT=y -+CONFIG_FB_CFB_COPYAREA=y -+CONFIG_FB_CFB_IMAGEBLIT=y -+# CONFIG_FB_SYS_FILLRECT is not set -+# CONFIG_FB_SYS_COPYAREA is not set -+# CONFIG_FB_SYS_IMAGEBLIT is not set -+# CONFIG_FB_SYS_FOPS is not set -+CONFIG_FB_DEFERRED_IO=y -+# CONFIG_FB_SVGALIB is not set -+# CONFIG_FB_MACMODES is not set -+# CONFIG_FB_BACKLIGHT is not set -+# CONFIG_FB_MODE_HELPERS is not set -+# CONFIG_FB_TILEBLITTING is not set -+ -+# -+# Frame buffer hardware drivers -+# -+# CONFIG_FB_S1D13XXX is not set -+CONFIG_FB_ATMEL=y -+# CONFIG_FB_VIRTUAL is not set -+# CONFIG_LOGO is not set - - # - # Sound - # --# CONFIG_SOUND is not set -+CONFIG_SOUND=m -+ -+# -+# Advanced Linux Sound Architecture -+# -+CONFIG_SND=m -+CONFIG_SND_TIMER=m -+CONFIG_SND_PCM=m -+# CONFIG_SND_SEQUENCER is not set -+CONFIG_SND_OSSEMUL=y -+CONFIG_SND_MIXER_OSS=m -+CONFIG_SND_PCM_OSS=m -+CONFIG_SND_PCM_OSS_PLUGINS=y -+# CONFIG_SND_DYNAMIC_MINORS is not set -+# CONFIG_SND_SUPPORT_OLD_API is not set -+CONFIG_SND_VERBOSE_PROCFS=y -+# CONFIG_SND_VERBOSE_PRINTK is not set -+# CONFIG_SND_DEBUG is not set -+ -+# -+# Generic devices -+# -+CONFIG_SND_AC97_CODEC=m -+# CONFIG_SND_DUMMY is not set -+# CONFIG_SND_MTPAV is not set -+# CONFIG_SND_SERIAL_U16550 is not set -+# CONFIG_SND_MPU401 is not set -+ -+# -+# AVR32 devices -+# -+CONFIG_SND_ATMEL_AC97=m -+ -+# -+# SPI devices -+# -+CONFIG_SND_AT73C213=m -+CONFIG_SND_AT73C213_TARGET_BITRATE=48000 -+ -+# -+# PCMCIA devices -+# -+# CONFIG_SND_VXPOCKET is not set -+# CONFIG_SND_PDAUDIOCF is not set -+ -+# -+# System on Chip audio support -+# -+# CONFIG_SND_SOC is not set -+ -+# -+# SoC Audio support for SuperH -+# - - # --# USB support -+# Open Sound System - # --# CONFIG_USB_ARCH_HAS_HCD is not set -+# CONFIG_SOUND_PRIME is not set -+CONFIG_AC97_BUS=m -+# CONFIG_HID_SUPPORT is not set -+CONFIG_USB_SUPPORT=y -+CONFIG_USB_ARCH_HAS_HCD=y - # CONFIG_USB_ARCH_HAS_OHCI is not set - # CONFIG_USB_ARCH_HAS_EHCI is not set -+# CONFIG_USB is not set - - # - # NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' -@@ -545,34 +732,108 @@ CONFIG_UNIX98_PTYS=y - # - # USB Gadget Support - # --# CONFIG_USB_GADGET is not set --# CONFIG_MMC is not set -+CONFIG_USB_GADGET=y -+# CONFIG_USB_GADGET_DEBUG is not set -+# CONFIG_USB_GADGET_DEBUG_FILES is not set -+# CONFIG_USB_GADGET_DEBUG_FS is not set -+CONFIG_USB_GADGET_SELECTED=y -+# CONFIG_USB_GADGET_AMD5536UDC is not set -+CONFIG_USB_GADGET_ATMEL_USBA=y -+CONFIG_USB_ATMEL_USBA=y -+# CONFIG_USB_GADGET_FSL_USB2 is not set -+# CONFIG_USB_GADGET_NET2280 is not set -+# CONFIG_USB_GADGET_PXA2XX is not set -+# CONFIG_USB_GADGET_M66592 is not set -+# CONFIG_USB_GADGET_GOKU is not set -+# CONFIG_USB_GADGET_LH7A40X is not set -+# CONFIG_USB_GADGET_OMAP is not set -+# CONFIG_USB_GADGET_S3C2410 is not set -+# CONFIG_USB_GADGET_AT91 is not set -+# CONFIG_USB_GADGET_DUMMY_HCD is not set -+CONFIG_USB_GADGET_DUALSPEED=y -+CONFIG_USB_ZERO=m -+CONFIG_USB_ETH=m -+CONFIG_USB_ETH_RNDIS=y -+CONFIG_USB_GADGETFS=m -+CONFIG_USB_FILE_STORAGE=m -+# CONFIG_USB_FILE_STORAGE_TEST is not set -+CONFIG_USB_G_SERIAL=m -+# CONFIG_USB_MIDI_GADGET is not set -+CONFIG_MMC=y -+# CONFIG_MMC_DEBUG is not set -+# CONFIG_MMC_UNSAFE_RESUME is not set -+ -+# -+# MMC/SD Card Drivers -+# -+CONFIG_MMC_BLOCK=y -+CONFIG_MMC_BLOCK_BOUNCE=y -+ -+# -+# MMC/SD Host Controller Drivers -+# -+CONFIG_MMC_ATMELMCI=y -+CONFIG_NEW_LEDS=y -+CONFIG_LEDS_CLASS=m -+ -+# -+# LED drivers -+# -+CONFIG_LEDS_GPIO=m - - # --# LED devices -+# LED Triggers - # --# CONFIG_NEW_LEDS is not set -+CONFIG_LEDS_TRIGGERS=y -+CONFIG_LEDS_TRIGGER_TIMER=m -+CONFIG_LEDS_TRIGGER_HEARTBEAT=m -+CONFIG_RTC_LIB=y -+CONFIG_RTC_CLASS=y -+# CONFIG_RTC_HCTOSYS is not set -+# CONFIG_RTC_DEBUG is not set - - # --# LED drivers -+# RTC interfaces - # -+CONFIG_RTC_INTF_SYSFS=y -+CONFIG_RTC_INTF_PROC=y -+CONFIG_RTC_INTF_DEV=y -+# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set -+# CONFIG_RTC_DRV_TEST is not set - - # --# LED Triggers -+# I2C RTC drivers - # -+# CONFIG_RTC_DRV_DS1307 is not set -+# CONFIG_RTC_DRV_DS1672 is not set -+# CONFIG_RTC_DRV_MAX6900 is not set -+# CONFIG_RTC_DRV_RS5C372 is not set -+# CONFIG_RTC_DRV_ISL1208 is not set -+# CONFIG_RTC_DRV_X1205 is not set -+# CONFIG_RTC_DRV_PCF8563 is not set -+# CONFIG_RTC_DRV_PCF8583 is not set -+# CONFIG_RTC_DRV_M41T80 is not set - - # --# InfiniBand support -+# SPI RTC drivers - # -+# CONFIG_RTC_DRV_RS5C348 is not set -+# CONFIG_RTC_DRV_MAX6902 is not set - - # --# EDAC - error detection and reporting (RAS) (EXPERIMENTAL) -+# Platform RTC drivers - # -+# CONFIG_RTC_DRV_DS1553 is not set -+# CONFIG_RTC_DRV_STK17TA8 is not set -+# CONFIG_RTC_DRV_DS1742 is not set -+# CONFIG_RTC_DRV_M48T86 is not set -+# CONFIG_RTC_DRV_M48T59 is not set -+# CONFIG_RTC_DRV_V3020 is not set - - # --# Real Time Clock -+# on-CPU RTC drivers - # --# CONFIG_RTC_CLASS is not set -+CONFIG_RTC_DRV_AT32AP700X=y - - # - # DMA Engine support -@@ -588,13 +849,21 @@ CONFIG_UNIX98_PTYS=y - # - - # -+# Userspace I/O -+# -+# CONFIG_UIO is not set -+ -+# - # File systems - # --CONFIG_EXT2_FS=m -+CONFIG_EXT2_FS=y - # CONFIG_EXT2_FS_XATTR is not set - # CONFIG_EXT2_FS_XIP is not set --# CONFIG_EXT3_FS is not set -+CONFIG_EXT3_FS=y -+# CONFIG_EXT3_FS_XATTR is not set - # CONFIG_EXT4DEV_FS is not set -+CONFIG_JBD=y -+# CONFIG_JBD_DEBUG is not set - # CONFIG_REISERFS_FS is not set - # CONFIG_JFS_FS is not set - # CONFIG_FS_POSIX_ACL is not set -@@ -609,7 +878,7 @@ CONFIG_INOTIFY_USER=y - # CONFIG_DNOTIFY is not set - # CONFIG_AUTOFS_FS is not set - # CONFIG_AUTOFS4_FS is not set --# CONFIG_FUSE_FS is not set -+CONFIG_FUSE_FS=m - - # - # CD-ROM/DVD Filesystems -@@ -638,7 +907,7 @@ CONFIG_TMPFS=y - # CONFIG_TMPFS_POSIX_ACL is not set - # CONFIG_HUGETLB_PAGE is not set - CONFIG_RAMFS=y --CONFIG_CONFIGFS_FS=m -+CONFIG_CONFIGFS_FS=y - - # - # Miscellaneous filesystems -@@ -683,12 +952,17 @@ CONFIG_SUNRPC=y - # CONFIG_SUNRPC_BIND34 is not set - # CONFIG_RPCSEC_GSS_KRB5 is not set - # CONFIG_RPCSEC_GSS_SPKM3 is not set --# CONFIG_SMB_FS is not set --# CONFIG_CIFS is not set -+CONFIG_SMB_FS=m -+# CONFIG_SMB_NLS_DEFAULT is not set -+CONFIG_CIFS=m -+# CONFIG_CIFS_STATS is not set -+# CONFIG_CIFS_WEAK_PW_HASH is not set -+# CONFIG_CIFS_XATTR is not set -+# CONFIG_CIFS_DEBUG2 is not set -+# CONFIG_CIFS_EXPERIMENTAL is not set - # CONFIG_NCP_FS is not set - # CONFIG_CODA_FS is not set - # CONFIG_AFS_FS is not set --# CONFIG_9P_FS is not set - - # - # Partition Types -@@ -758,6 +1032,7 @@ CONFIG_DEBUG_FS=y - CONFIG_DEBUG_KERNEL=y - # CONFIG_DEBUG_SHIRQ is not set - CONFIG_DETECT_SOFTLOCKUP=y -+CONFIG_SCHED_DEBUG=y - # CONFIG_SCHEDSTATS is not set - # CONFIG_TIMER_STATS is not set - # CONFIG_DEBUG_RT_MUTEXES is not set -@@ -782,10 +1057,6 @@ CONFIG_FORCED_INLINING=y - # - # CONFIG_KEYS is not set - # CONFIG_SECURITY is not set -- --# --# Cryptographic options --# - # CONFIG_CRYPTO is not set - - # -@@ -796,6 +1067,7 @@ CONFIG_CRC_CCITT=m - # CONFIG_CRC16 is not set - # CONFIG_CRC_ITU_T is not set - CONFIG_CRC32=y -+# CONFIG_CRC7 is not set - # CONFIG_LIBCRC32C is not set - CONFIG_AUDIT_GENERIC=y - CONFIG_ZLIB_INFLATE=y -diff --git a/arch/avr32/configs/atstk1003_defconfig b/arch/avr32/configs/atstk1003_defconfig -new file mode 100644 -index 0000000..0dc834f ---- /dev/null -+++ b/arch/avr32/configs/atstk1003_defconfig -@@ -0,0 +1,1045 @@ -+# -+# Automatically generated make config: don't edit -+# Linux kernel version: 2.6.24-rc1 -+# Thu Nov 1 10:58:37 2007 -+# -+CONFIG_AVR32=y -+CONFIG_GENERIC_GPIO=y -+CONFIG_GENERIC_HARDIRQS=y -+CONFIG_HARDIRQS_SW_RESEND=y -+CONFIG_GENERIC_IRQ_PROBE=y -+CONFIG_RWSEM_GENERIC_SPINLOCK=y -+CONFIG_GENERIC_TIME=y -+# CONFIG_ARCH_HAS_ILOG2_U32 is not set -+# CONFIG_ARCH_HAS_ILOG2_U64 is not set -+CONFIG_GENERIC_HWEIGHT=y -+CONFIG_GENERIC_CALIBRATE_DELAY=y -+CONFIG_GENERIC_BUG=y -+CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" -+ -+# -+# General setup -+# -+CONFIG_EXPERIMENTAL=y -+CONFIG_BROKEN_ON_SMP=y -+CONFIG_INIT_ENV_ARG_LIMIT=32 -+CONFIG_LOCALVERSION="" -+# CONFIG_LOCALVERSION_AUTO is not set -+CONFIG_SWAP=y -+CONFIG_SYSVIPC=y -+CONFIG_SYSVIPC_SYSCTL=y -+CONFIG_POSIX_MQUEUE=y -+CONFIG_BSD_PROCESS_ACCT=y -+CONFIG_BSD_PROCESS_ACCT_V3=y -+CONFIG_TASKSTATS=y -+CONFIG_TASK_DELAY_ACCT=y -+# CONFIG_TASK_XACCT is not set -+# CONFIG_USER_NS is not set -+CONFIG_AUDIT=y -+# CONFIG_IKCONFIG is not set -+CONFIG_LOG_BUF_SHIFT=14 -+# CONFIG_CGROUPS is not set -+CONFIG_FAIR_GROUP_SCHED=y -+CONFIG_FAIR_USER_SCHED=y -+# CONFIG_FAIR_CGROUP_SCHED is not set -+CONFIG_SYSFS_DEPRECATED=y -+CONFIG_RELAY=y -+CONFIG_BLK_DEV_INITRD=y -+CONFIG_INITRAMFS_SOURCE="" -+CONFIG_CC_OPTIMIZE_FOR_SIZE=y -+CONFIG_SYSCTL=y -+CONFIG_EMBEDDED=y -+# CONFIG_SYSCTL_SYSCALL is not set -+CONFIG_KALLSYMS=y -+# CONFIG_KALLSYMS_ALL is not set -+# CONFIG_KALLSYMS_EXTRA_PASS is not set -+CONFIG_HOTPLUG=y -+CONFIG_PRINTK=y -+CONFIG_BUG=y -+CONFIG_ELF_CORE=y -+# CONFIG_BASE_FULL is not set -+CONFIG_FUTEX=y -+CONFIG_ANON_INODES=y -+CONFIG_EPOLL=y -+CONFIG_SIGNALFD=y -+CONFIG_EVENTFD=y -+CONFIG_SHMEM=y -+CONFIG_VM_EVENT_COUNTERS=y -+# CONFIG_SLUB_DEBUG is not set -+# CONFIG_SLAB is not set -+CONFIG_SLUB=y -+# CONFIG_SLOB is not set -+CONFIG_RT_MUTEXES=y -+# CONFIG_TINY_SHMEM is not set -+CONFIG_BASE_SMALL=1 -+CONFIG_MODULES=y -+CONFIG_MODULE_UNLOAD=y -+# CONFIG_MODULE_FORCE_UNLOAD is not set -+# CONFIG_MODVERSIONS is not set -+# CONFIG_MODULE_SRCVERSION_ALL is not set -+# CONFIG_KMOD is not set -+CONFIG_BLOCK=y -+# CONFIG_LBD is not set -+# CONFIG_BLK_DEV_IO_TRACE is not set -+# CONFIG_LSF is not set -+# CONFIG_BLK_DEV_BSG is not set -+ -+# -+# IO Schedulers -+# -+CONFIG_IOSCHED_NOOP=y -+# CONFIG_IOSCHED_AS is not set -+# CONFIG_IOSCHED_DEADLINE is not set -+# CONFIG_IOSCHED_CFQ is not set -+# CONFIG_DEFAULT_AS is not set -+# CONFIG_DEFAULT_DEADLINE is not set -+# CONFIG_DEFAULT_CFQ is not set -+CONFIG_DEFAULT_NOOP=y -+CONFIG_DEFAULT_IOSCHED="noop" -+ -+# -+# System Type and features -+# -+CONFIG_SUBARCH_AVR32B=y -+CONFIG_MMU=y -+CONFIG_PERFORMANCE_COUNTERS=y -+CONFIG_PLATFORM_AT32AP=y -+CONFIG_CPU_AT32AP700X=y -+# CONFIG_CPU_AT32AP7000 is not set -+CONFIG_CPU_AT32AP7001=y -+# CONFIG_CPU_AT32AP7002 is not set -+CONFIG_BOARD_ATSTK1003=y -+CONFIG_BOARD_ATSTK1000=y -+# CONFIG_BOARD_ATNGW100 is not set -+# CONFIG_BOARD_ATSTK100X_CUSTOM is not set -+# CONFIG_BOARD_ATSTK100X_SPI1 is not set -+# CONFIG_BOARD_ATSTK1000_J2_LED is not set -+# CONFIG_BOARD_ATSTK1000_J2_LED8 is not set -+# CONFIG_BOARD_ATSTK1000_J2_RGB is not set -+CONFIG_BOARD_ATSTK1000_EXTDAC=y -+# CONFIG_BOARD_ATSTK100X_ENABLE_AC97 is not set -+# CONFIG_BOARD_ATSTK1000_CF_HACKS is not set -+CONFIG_LOADER_U_BOOT=y -+ -+# -+# Atmel AVR32 AP options -+# -+# CONFIG_AP700X_32_BIT_SMC is not set -+CONFIG_AP700X_16_BIT_SMC=y -+# CONFIG_AP700X_8_BIT_SMC is not set -+# CONFIG_GPIO_DEV is not set -+CONFIG_LOAD_ADDRESS=0x10000000 -+CONFIG_ENTRY_ADDRESS=0x90000000 -+CONFIG_PHYS_OFFSET=0x10000000 -+CONFIG_PREEMPT_NONE=y -+# CONFIG_PREEMPT_VOLUNTARY is not set -+# CONFIG_PREEMPT is not set -+# CONFIG_HAVE_ARCH_BOOTMEM_NODE is not set -+# CONFIG_ARCH_HAVE_MEMORY_PRESENT is not set -+# CONFIG_NEED_NODE_MEMMAP_SIZE is not set -+CONFIG_ARCH_FLATMEM_ENABLE=y -+# CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set -+# CONFIG_ARCH_SPARSEMEM_ENABLE is not set -+CONFIG_SELECT_MEMORY_MODEL=y -+CONFIG_FLATMEM_MANUAL=y -+# CONFIG_DISCONTIGMEM_MANUAL is not set -+# CONFIG_SPARSEMEM_MANUAL is not set -+CONFIG_FLATMEM=y -+CONFIG_FLAT_NODE_MEM_MAP=y -+# CONFIG_SPARSEMEM_STATIC is not set -+# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set -+CONFIG_SPLIT_PTLOCK_CPUS=4 -+# CONFIG_RESOURCES_64BIT is not set -+CONFIG_ZONE_DMA_FLAG=0 -+CONFIG_VIRT_TO_BUS=y -+# CONFIG_OWNERSHIP_TRACE is not set -+CONFIG_DW_DMAC=y -+# CONFIG_HZ_100 is not set -+CONFIG_HZ_250=y -+# CONFIG_HZ_300 is not set -+# CONFIG_HZ_1000 is not set -+CONFIG_HZ=250 -+CONFIG_CMDLINE="" -+ -+# -+# Power management options -+# -+ -+# -+# CPU Frequency scaling -+# -+CONFIG_CPU_FREQ=y -+CONFIG_CPU_FREQ_TABLE=y -+# CONFIG_CPU_FREQ_DEBUG is not set -+# CONFIG_CPU_FREQ_STAT is not set -+CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y -+# CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set -+# CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND is not set -+# CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set -+CONFIG_CPU_FREQ_GOV_PERFORMANCE=y -+# CONFIG_CPU_FREQ_GOV_POWERSAVE is not set -+CONFIG_CPU_FREQ_GOV_USERSPACE=y -+CONFIG_CPU_FREQ_GOV_ONDEMAND=y -+# CONFIG_CPU_FREQ_GOV_CONSERVATIVE is not set -+CONFIG_CPU_FREQ_AT32AP=y -+ -+# -+# Bus options -+# -+# CONFIG_ARCH_SUPPORTS_MSI is not set -+CONFIG_PCCARD=m -+# CONFIG_PCMCIA_DEBUG is not set -+CONFIG_PCMCIA=m -+CONFIG_PCMCIA_LOAD_CIS=y -+# CONFIG_PCMCIA_IOCTL is not set -+ -+# -+# PC-card bridges -+# -+CONFIG_AT32_CF=m -+ -+# -+# Executable file formats -+# -+CONFIG_BINFMT_ELF=y -+# CONFIG_BINFMT_MISC is not set -+ -+# -+# Networking -+# -+CONFIG_NET=y -+ -+# -+# Networking options -+# -+CONFIG_PACKET=y -+CONFIG_PACKET_MMAP=y -+CONFIG_UNIX=y -+# CONFIG_NET_KEY is not set -+CONFIG_INET=y -+# CONFIG_IP_MULTICAST is not set -+# CONFIG_IP_ADVANCED_ROUTER is not set -+CONFIG_IP_FIB_HASH=y -+# CONFIG_IP_PNP is not set -+# CONFIG_NET_IPIP is not set -+# CONFIG_NET_IPGRE is not set -+# CONFIG_ARPD is not set -+# CONFIG_SYN_COOKIES is not set -+# CONFIG_INET_AH is not set -+# CONFIG_INET_ESP is not set -+# CONFIG_INET_IPCOMP is not set -+# CONFIG_INET_XFRM_TUNNEL is not set -+# CONFIG_INET_TUNNEL is not set -+# CONFIG_INET_XFRM_MODE_TRANSPORT is not set -+# CONFIG_INET_XFRM_MODE_TUNNEL is not set -+# CONFIG_INET_XFRM_MODE_BEET is not set -+# CONFIG_INET_LRO is not set -+# CONFIG_INET_DIAG is not set -+# CONFIG_TCP_CONG_ADVANCED is not set -+CONFIG_TCP_CONG_CUBIC=y -+CONFIG_DEFAULT_TCP_CONG="cubic" -+# CONFIG_TCP_MD5SIG is not set -+# CONFIG_IPV6 is not set -+# CONFIG_INET6_XFRM_TUNNEL is not set -+# CONFIG_INET6_TUNNEL is not set -+# CONFIG_NETWORK_SECMARK is not set -+# CONFIG_NETFILTER is not set -+# CONFIG_IP_DCCP is not set -+# CONFIG_IP_SCTP is not set -+# CONFIG_TIPC is not set -+# CONFIG_ATM is not set -+# CONFIG_BRIDGE is not set -+# CONFIG_VLAN_8021Q is not set -+# CONFIG_DECNET is not set -+# CONFIG_LLC2 is not set -+# CONFIG_IPX is not set -+# CONFIG_ATALK is not set -+# CONFIG_X25 is not set -+# CONFIG_LAPB is not set -+# CONFIG_ECONET is not set -+# CONFIG_WAN_ROUTER is not set -+# CONFIG_NET_SCHED is not set -+ -+# -+# Network testing -+# -+# CONFIG_NET_PKTGEN is not set -+# CONFIG_HAMRADIO is not set -+# CONFIG_IRDA is not set -+# CONFIG_BT is not set -+# CONFIG_AF_RXRPC is not set -+ -+# -+# Wireless -+# -+# CONFIG_CFG80211 is not set -+# CONFIG_WIRELESS_EXT is not set -+# CONFIG_MAC80211 is not set -+# CONFIG_IEEE80211 is not set -+# CONFIG_RFKILL is not set -+# CONFIG_NET_9P is not set -+ -+# -+# Device Drivers -+# -+ -+# -+# Generic Driver Options -+# -+CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" -+CONFIG_STANDALONE=y -+# CONFIG_PREVENT_FIRMWARE_BUILD is not set -+CONFIG_FW_LOADER=m -+# CONFIG_DEBUG_DRIVER is not set -+# CONFIG_DEBUG_DEVRES is not set -+# CONFIG_SYS_HYPERVISOR is not set -+# CONFIG_CONNECTOR is not set -+CONFIG_MTD=y -+# CONFIG_MTD_DEBUG is not set -+# CONFIG_MTD_CONCAT is not set -+CONFIG_MTD_PARTITIONS=y -+# CONFIG_MTD_REDBOOT_PARTS is not set -+CONFIG_MTD_CMDLINE_PARTS=y -+ -+# -+# User Modules And Translation Layers -+# -+CONFIG_MTD_CHAR=y -+CONFIG_MTD_BLKDEVS=y -+CONFIG_MTD_BLOCK=y -+# CONFIG_FTL is not set -+# CONFIG_NFTL is not set -+# CONFIG_INFTL is not set -+# CONFIG_RFD_FTL is not set -+# CONFIG_SSFDC is not set -+# CONFIG_MTD_OOPS is not set -+ -+# -+# RAM/ROM/Flash chip drivers -+# -+CONFIG_MTD_CFI=y -+# CONFIG_MTD_JEDECPROBE is not set -+CONFIG_MTD_GEN_PROBE=y -+# CONFIG_MTD_CFI_ADV_OPTIONS is not set -+CONFIG_MTD_MAP_BANK_WIDTH_1=y -+CONFIG_MTD_MAP_BANK_WIDTH_2=y -+CONFIG_MTD_MAP_BANK_WIDTH_4=y -+# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set -+# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set -+# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set -+CONFIG_MTD_CFI_I1=y -+CONFIG_MTD_CFI_I2=y -+# CONFIG_MTD_CFI_I4 is not set -+# CONFIG_MTD_CFI_I8 is not set -+# CONFIG_MTD_CFI_INTELEXT is not set -+CONFIG_MTD_CFI_AMDSTD=y -+# CONFIG_MTD_CFI_STAA is not set -+CONFIG_MTD_CFI_UTIL=y -+# CONFIG_MTD_RAM is not set -+# CONFIG_MTD_ROM is not set -+# CONFIG_MTD_ABSENT is not set -+ -+# -+# Mapping drivers for chip access -+# -+# CONFIG_MTD_COMPLEX_MAPPINGS is not set -+CONFIG_MTD_PHYSMAP=y -+CONFIG_MTD_PHYSMAP_START=0x8000000 -+CONFIG_MTD_PHYSMAP_LEN=0x0 -+CONFIG_MTD_PHYSMAP_BANKWIDTH=2 -+# CONFIG_MTD_PLATRAM is not set -+ -+# -+# Self-contained MTD device drivers -+# -+CONFIG_MTD_DATAFLASH=m -+# CONFIG_MTD_M25P80 is not set -+# CONFIG_MTD_SLRAM is not set -+# CONFIG_MTD_PHRAM is not set -+# CONFIG_MTD_MTDRAM is not set -+# CONFIG_MTD_BLOCK2MTD is not set -+ -+# -+# Disk-On-Chip Device Drivers -+# -+# CONFIG_MTD_DOC2000 is not set -+# CONFIG_MTD_DOC2001 is not set -+# CONFIG_MTD_DOC2001PLUS is not set -+# CONFIG_MTD_NAND is not set -+# CONFIG_MTD_ONENAND is not set -+ -+# -+# UBI - Unsorted block images -+# -+# CONFIG_MTD_UBI is not set -+# CONFIG_PARPORT is not set -+CONFIG_BLK_DEV=y -+# CONFIG_BLK_DEV_COW_COMMON is not set -+CONFIG_BLK_DEV_LOOP=m -+# CONFIG_BLK_DEV_CRYPTOLOOP is not set -+CONFIG_BLK_DEV_NBD=m -+CONFIG_BLK_DEV_RAM=m -+CONFIG_BLK_DEV_RAM_COUNT=16 -+CONFIG_BLK_DEV_RAM_SIZE=4096 -+CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024 -+# CONFIG_CDROM_PKTCDVD is not set -+# CONFIG_ATA_OVER_ETH is not set -+CONFIG_MISC_DEVICES=y -+# CONFIG_EEPROM_93CX6 is not set -+CONFIG_ATMEL_SSC=m -+# CONFIG_IDE is not set -+ -+# -+# SCSI device support -+# -+# CONFIG_RAID_ATTRS is not set -+CONFIG_SCSI=m -+CONFIG_SCSI_DMA=y -+# CONFIG_SCSI_TGT is not set -+# CONFIG_SCSI_NETLINK is not set -+CONFIG_SCSI_PROC_FS=y -+ -+# -+# SCSI support type (disk, tape, CD-ROM) -+# -+# CONFIG_BLK_DEV_SD is not set -+# CONFIG_CHR_DEV_ST is not set -+# CONFIG_CHR_DEV_OSST is not set -+# CONFIG_BLK_DEV_SR is not set -+# CONFIG_CHR_DEV_SG is not set -+# CONFIG_CHR_DEV_SCH is not set -+ -+# -+# Some SCSI devices (e.g. CD jukebox) support multiple LUNs -+# -+# CONFIG_SCSI_MULTI_LUN is not set -+# CONFIG_SCSI_CONSTANTS is not set -+# CONFIG_SCSI_LOGGING is not set -+# CONFIG_SCSI_SCAN_ASYNC is not set -+CONFIG_SCSI_WAIT_SCAN=m -+ -+# -+# SCSI Transports -+# -+# CONFIG_SCSI_SPI_ATTRS is not set -+# CONFIG_SCSI_FC_ATTRS is not set -+# CONFIG_SCSI_ISCSI_ATTRS is not set -+# CONFIG_SCSI_SAS_LIBSAS is not set -+# CONFIG_SCSI_SRP_ATTRS is not set -+CONFIG_SCSI_LOWLEVEL=y -+# CONFIG_ISCSI_TCP is not set -+# CONFIG_SCSI_DEBUG is not set -+# CONFIG_SCSI_LOWLEVEL_PCMCIA is not set -+# CONFIG_ATA is not set -+# CONFIG_MD is not set -+CONFIG_NETDEVICES=y -+# CONFIG_NETDEVICES_MULTIQUEUE is not set -+# CONFIG_DUMMY is not set -+# CONFIG_BONDING is not set -+# CONFIG_MACVLAN is not set -+# CONFIG_EQUALIZER is not set -+CONFIG_TUN=m -+# CONFIG_VETH is not set -+# CONFIG_NET_ETHERNET is not set -+# CONFIG_NETDEV_1000 is not set -+# CONFIG_NETDEV_10000 is not set -+ -+# -+# Wireless LAN -+# -+# CONFIG_WLAN_PRE80211 is not set -+# CONFIG_WLAN_80211 is not set -+# CONFIG_NET_PCMCIA is not set -+# CONFIG_WAN is not set -+CONFIG_PPP=m -+# CONFIG_PPP_MULTILINK is not set -+# CONFIG_PPP_FILTER is not set -+CONFIG_PPP_ASYNC=m -+# CONFIG_PPP_SYNC_TTY is not set -+CONFIG_PPP_DEFLATE=m -+CONFIG_PPP_BSDCOMP=m -+# CONFIG_PPP_MPPE is not set -+# CONFIG_PPPOE is not set -+# CONFIG_PPPOL2TP is not set -+# CONFIG_SLIP is not set -+CONFIG_SLHC=m -+# CONFIG_SHAPER is not set -+# CONFIG_NETCONSOLE is not set -+# CONFIG_NETPOLL is not set -+# CONFIG_NET_POLL_CONTROLLER is not set -+# CONFIG_ISDN is not set -+# CONFIG_PHONE is not set -+ -+# -+# Input device support -+# -+CONFIG_INPUT=m -+# CONFIG_INPUT_FF_MEMLESS is not set -+CONFIG_INPUT_POLLDEV=m -+ -+# -+# Userland interfaces -+# -+CONFIG_INPUT_MOUSEDEV=m -+CONFIG_INPUT_MOUSEDEV_PSAUX=y -+CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 -+CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 -+# CONFIG_INPUT_JOYDEV is not set -+# CONFIG_INPUT_EVDEV is not set -+# CONFIG_INPUT_EVBUG is not set -+ -+# -+# Input Device Drivers -+# -+CONFIG_INPUT_KEYBOARD=y -+# CONFIG_KEYBOARD_ATKBD is not set -+# CONFIG_KEYBOARD_SUNKBD is not set -+# CONFIG_KEYBOARD_LKKBD is not set -+# CONFIG_KEYBOARD_XTKBD is not set -+# CONFIG_KEYBOARD_NEWTON is not set -+# CONFIG_KEYBOARD_STOWAWAY is not set -+CONFIG_KEYBOARD_GPIO=m -+CONFIG_INPUT_MOUSE=y -+# CONFIG_MOUSE_PS2 is not set -+# CONFIG_MOUSE_SERIAL is not set -+# CONFIG_MOUSE_APPLETOUCH is not set -+# CONFIG_MOUSE_VSXXXAA is not set -+CONFIG_MOUSE_GPIO=m -+# CONFIG_INPUT_JOYSTICK is not set -+# CONFIG_INPUT_TABLET is not set -+# CONFIG_INPUT_TOUCHSCREEN is not set -+# CONFIG_INPUT_MISC is not set -+ -+# -+# Hardware I/O ports -+# -+# CONFIG_SERIO is not set -+# CONFIG_GAMEPORT is not set -+ -+# -+# Character devices -+# -+# CONFIG_VT is not set -+# CONFIG_SERIAL_NONSTANDARD is not set -+ -+# -+# Serial drivers -+# -+# CONFIG_SERIAL_8250 is not set -+ -+# -+# Non-8250 serial port support -+# -+CONFIG_SERIAL_ATMEL=y -+CONFIG_SERIAL_ATMEL_CONSOLE=y -+# CONFIG_SERIAL_ATMEL_TTYAT is not set -+CONFIG_SERIAL_CORE=y -+CONFIG_SERIAL_CORE_CONSOLE=y -+CONFIG_UNIX98_PTYS=y -+# CONFIG_LEGACY_PTYS is not set -+# CONFIG_IPMI_HANDLER is not set -+# CONFIG_HW_RANDOM is not set -+# CONFIG_RTC is not set -+# CONFIG_GEN_RTC is not set -+# CONFIG_R3964 is not set -+ -+# -+# PCMCIA character devices -+# -+# CONFIG_SYNCLINK_CS is not set -+# CONFIG_CARDMAN_4000 is not set -+# CONFIG_CARDMAN_4040 is not set -+# CONFIG_RAW_DRIVER is not set -+# CONFIG_TCG_TPM is not set -+CONFIG_I2C=m -+CONFIG_I2C_BOARDINFO=y -+CONFIG_I2C_CHARDEV=m -+ -+# -+# I2C Algorithms -+# -+CONFIG_I2C_ALGOBIT=m -+# CONFIG_I2C_ALGOPCF is not set -+# CONFIG_I2C_ALGOPCA is not set -+ -+# -+# I2C Hardware Bus support -+# -+CONFIG_I2C_ATMELTWI=m -+CONFIG_I2C_GPIO=m -+# CONFIG_I2C_OCORES is not set -+# CONFIG_I2C_PARPORT_LIGHT is not set -+# CONFIG_I2C_SIMTEC is not set -+# CONFIG_I2C_TAOS_EVM is not set -+# CONFIG_I2C_STUB is not set -+ -+# -+# Miscellaneous I2C Chip support -+# -+# CONFIG_SENSORS_DS1337 is not set -+# CONFIG_SENSORS_DS1374 is not set -+# CONFIG_DS1682 is not set -+# CONFIG_SENSORS_EEPROM is not set -+# CONFIG_SENSORS_PCF8574 is not set -+# CONFIG_SENSORS_PCA9539 is not set -+# CONFIG_SENSORS_PCF8591 is not set -+# CONFIG_SENSORS_MAX6875 is not set -+# CONFIG_SENSORS_TSL2550 is not set -+# CONFIG_I2C_DEBUG_CORE is not set -+# CONFIG_I2C_DEBUG_ALGO is not set -+# CONFIG_I2C_DEBUG_BUS is not set -+# CONFIG_I2C_DEBUG_CHIP is not set -+ -+# -+# SPI support -+# -+CONFIG_SPI=y -+# CONFIG_SPI_DEBUG is not set -+CONFIG_SPI_MASTER=y -+ -+# -+# SPI Master Controller Drivers -+# -+CONFIG_SPI_ATMEL=y -+# CONFIG_SPI_BITBANG is not set -+ -+# -+# SPI Protocol Masters -+# -+# CONFIG_SPI_AT25 is not set -+CONFIG_SPI_SPIDEV=m -+# CONFIG_SPI_TLE62X0 is not set -+# CONFIG_W1 is not set -+# CONFIG_POWER_SUPPLY is not set -+# CONFIG_HWMON is not set -+CONFIG_WATCHDOG=y -+# CONFIG_WATCHDOG_NOWAYOUT is not set -+ -+# -+# Watchdog Device Drivers -+# -+# CONFIG_SOFT_WATCHDOG is not set -+CONFIG_AT32AP700X_WDT=y -+ -+# -+# Sonics Silicon Backplane -+# -+CONFIG_SSB_POSSIBLE=y -+# CONFIG_SSB is not set -+ -+# -+# Multifunction device drivers -+# -+# CONFIG_MFD_SM501 is not set -+ -+# -+# Multimedia devices -+# -+# CONFIG_VIDEO_DEV is not set -+# CONFIG_DVB_CORE is not set -+# CONFIG_DAB is not set -+ -+# -+# Graphics support -+# -+# CONFIG_VGASTATE is not set -+# CONFIG_VIDEO_OUTPUT_CONTROL is not set -+# CONFIG_FB is not set -+# CONFIG_BACKLIGHT_LCD_SUPPORT is not set -+ -+# -+# Display device support -+# -+# CONFIG_DISPLAY_SUPPORT is not set -+ -+# -+# Sound -+# -+CONFIG_SOUND=m -+ -+# -+# Advanced Linux Sound Architecture -+# -+CONFIG_SND=m -+CONFIG_SND_TIMER=m -+CONFIG_SND_PCM=m -+# CONFIG_SND_SEQUENCER is not set -+CONFIG_SND_OSSEMUL=y -+CONFIG_SND_MIXER_OSS=m -+CONFIG_SND_PCM_OSS=m -+CONFIG_SND_PCM_OSS_PLUGINS=y -+# CONFIG_SND_DYNAMIC_MINORS is not set -+CONFIG_SND_SUPPORT_OLD_API=y -+CONFIG_SND_VERBOSE_PROCFS=y -+# CONFIG_SND_VERBOSE_PRINTK is not set -+# CONFIG_SND_DEBUG is not set -+ -+# -+# Generic devices -+# -+CONFIG_SND_AC97_CODEC=m -+# CONFIG_SND_DUMMY is not set -+# CONFIG_SND_MTPAV is not set -+# CONFIG_SND_SERIAL_U16550 is not set -+# CONFIG_SND_MPU401 is not set -+ -+# -+# AVR32 devices -+# -+CONFIG_SND_ATMEL_AC97=m -+ -+# -+# SPI devices -+# -+CONFIG_SND_AT73C213=m -+CONFIG_SND_AT73C213_TARGET_BITRATE=48000 -+ -+# -+# PCMCIA devices -+# -+# CONFIG_SND_VXPOCKET is not set -+# CONFIG_SND_PDAUDIOCF is not set -+ -+# -+# System on Chip audio support -+# -+# CONFIG_SND_SOC is not set -+ -+# -+# SoC Audio support for SuperH -+# -+ -+# -+# Open Sound System -+# -+CONFIG_SOUND_PRIME=m -+# CONFIG_SOUND_MSNDCLAS is not set -+# CONFIG_SOUND_MSNDPIN is not set -+CONFIG_SOUND_AT32_ABDAC=m -+CONFIG_AC97_BUS=m -+# CONFIG_HID_SUPPORT is not set -+CONFIG_USB_SUPPORT=y -+CONFIG_USB_ARCH_HAS_HCD=y -+# CONFIG_USB_ARCH_HAS_OHCI is not set -+# CONFIG_USB_ARCH_HAS_EHCI is not set -+# CONFIG_USB is not set -+ -+# -+# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' -+# -+ -+# -+# USB Gadget Support -+# -+CONFIG_USB_GADGET=y -+# CONFIG_USB_GADGET_DEBUG is not set -+# CONFIG_USB_GADGET_DEBUG_FILES is not set -+CONFIG_USB_GADGET_DEBUG_FS=y -+CONFIG_USB_GADGET_SELECTED=y -+# CONFIG_USB_GADGET_AMD5536UDC is not set -+CONFIG_USB_GADGET_ATMEL_USBA=y -+CONFIG_USB_ATMEL_USBA=y -+# CONFIG_USB_GADGET_FSL_USB2 is not set -+# CONFIG_USB_GADGET_NET2280 is not set -+# CONFIG_USB_GADGET_PXA2XX is not set -+# CONFIG_USB_GADGET_M66592 is not set -+# CONFIG_USB_GADGET_GOKU is not set -+# CONFIG_USB_GADGET_LH7A40X is not set -+# CONFIG_USB_GADGET_OMAP is not set -+# CONFIG_USB_GADGET_S3C2410 is not set -+# CONFIG_USB_GADGET_AT91 is not set -+# CONFIG_USB_GADGET_DUMMY_HCD is not set -+CONFIG_USB_GADGET_DUALSPEED=y -+CONFIG_USB_ZERO=m -+CONFIG_USB_ETH=m -+CONFIG_USB_ETH_RNDIS=y -+CONFIG_USB_GADGETFS=m -+CONFIG_USB_FILE_STORAGE=m -+# CONFIG_USB_FILE_STORAGE_TEST is not set -+CONFIG_USB_G_SERIAL=m -+# CONFIG_USB_MIDI_GADGET is not set -+CONFIG_MMC=y -+# CONFIG_MMC_DEBUG is not set -+# CONFIG_MMC_UNSAFE_RESUME is not set -+ -+# -+# MMC/SD Card Drivers -+# -+CONFIG_MMC_BLOCK=y -+# CONFIG_MMC_BLOCK_BOUNCE is not set -+# CONFIG_SDIO_UART is not set -+ -+# -+# MMC/SD Host Controller Drivers -+# -+CONFIG_MMC_ATMELMCI=y -+# CONFIG_MMC_SPI is not set -+CONFIG_NEW_LEDS=y -+CONFIG_LEDS_CLASS=y -+ -+# -+# LED drivers -+# -+CONFIG_LEDS_GPIO=y -+ -+# -+# LED Triggers -+# -+CONFIG_LEDS_TRIGGERS=y -+CONFIG_LEDS_TRIGGER_TIMER=y -+CONFIG_LEDS_TRIGGER_HEARTBEAT=y -+CONFIG_RTC_LIB=y -+CONFIG_RTC_CLASS=y -+CONFIG_RTC_HCTOSYS=y -+CONFIG_RTC_HCTOSYS_DEVICE="rtc0" -+# CONFIG_RTC_DEBUG is not set -+ -+# -+# RTC interfaces -+# -+CONFIG_RTC_INTF_SYSFS=y -+CONFIG_RTC_INTF_PROC=y -+CONFIG_RTC_INTF_DEV=y -+# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set -+# CONFIG_RTC_DRV_TEST is not set -+ -+# -+# I2C RTC drivers -+# -+# CONFIG_RTC_DRV_DS1307 is not set -+# CONFIG_RTC_DRV_DS1374 is not set -+# CONFIG_RTC_DRV_DS1672 is not set -+# CONFIG_RTC_DRV_MAX6900 is not set -+# CONFIG_RTC_DRV_RS5C372 is not set -+# CONFIG_RTC_DRV_ISL1208 is not set -+# CONFIG_RTC_DRV_X1205 is not set -+# CONFIG_RTC_DRV_PCF8563 is not set -+# CONFIG_RTC_DRV_PCF8583 is not set -+# CONFIG_RTC_DRV_M41T80 is not set -+ -+# -+# SPI RTC drivers -+# -+# CONFIG_RTC_DRV_RS5C348 is not set -+# CONFIG_RTC_DRV_MAX6902 is not set -+ -+# -+# Platform RTC drivers -+# -+# CONFIG_RTC_DRV_DS1553 is not set -+# CONFIG_RTC_DRV_STK17TA8 is not set -+# CONFIG_RTC_DRV_DS1742 is not set -+# CONFIG_RTC_DRV_M48T86 is not set -+# CONFIG_RTC_DRV_M48T59 is not set -+# CONFIG_RTC_DRV_V3020 is not set -+ -+# -+# on-CPU RTC drivers -+# -+CONFIG_RTC_DRV_AT32AP700X=y -+ -+# -+# Userspace I/O -+# -+CONFIG_UIO=m -+ -+# -+# File systems -+# -+CONFIG_EXT2_FS=y -+# CONFIG_EXT2_FS_XATTR is not set -+# CONFIG_EXT2_FS_XIP is not set -+CONFIG_EXT3_FS=y -+# CONFIG_EXT3_FS_XATTR is not set -+# CONFIG_EXT4DEV_FS is not set -+CONFIG_JBD=y -+# CONFIG_JBD_DEBUG is not set -+# CONFIG_REISERFS_FS is not set -+# CONFIG_JFS_FS is not set -+# CONFIG_FS_POSIX_ACL is not set -+# CONFIG_XFS_FS is not set -+# CONFIG_GFS2_FS is not set -+# CONFIG_OCFS2_FS is not set -+# CONFIG_MINIX_FS is not set -+# CONFIG_ROMFS_FS is not set -+CONFIG_INOTIFY=y -+CONFIG_INOTIFY_USER=y -+# CONFIG_QUOTA is not set -+# CONFIG_DNOTIFY is not set -+# CONFIG_AUTOFS_FS is not set -+# CONFIG_AUTOFS4_FS is not set -+CONFIG_FUSE_FS=m -+ -+# -+# CD-ROM/DVD Filesystems -+# -+# CONFIG_ISO9660_FS is not set -+# CONFIG_UDF_FS is not set -+ -+# -+# DOS/FAT/NT Filesystems -+# -+CONFIG_FAT_FS=m -+CONFIG_MSDOS_FS=m -+CONFIG_VFAT_FS=m -+CONFIG_FAT_DEFAULT_CODEPAGE=437 -+CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" -+# CONFIG_NTFS_FS is not set -+ -+# -+# Pseudo filesystems -+# -+CONFIG_PROC_FS=y -+CONFIG_PROC_KCORE=y -+CONFIG_PROC_SYSCTL=y -+CONFIG_SYSFS=y -+CONFIG_TMPFS=y -+# CONFIG_TMPFS_POSIX_ACL is not set -+# CONFIG_HUGETLB_PAGE is not set -+CONFIG_CONFIGFS_FS=y -+ -+# -+# Miscellaneous filesystems -+# -+# CONFIG_ADFS_FS is not set -+# CONFIG_AFFS_FS is not set -+# CONFIG_HFS_FS is not set -+# CONFIG_HFSPLUS_FS is not set -+# CONFIG_BEFS_FS is not set -+# CONFIG_BFS_FS is not set -+# CONFIG_EFS_FS is not set -+CONFIG_JFFS2_FS=y -+CONFIG_JFFS2_FS_DEBUG=0 -+CONFIG_JFFS2_FS_WRITEBUFFER=y -+# CONFIG_JFFS2_FS_WBUF_VERIFY is not set -+# CONFIG_JFFS2_SUMMARY is not set -+# CONFIG_JFFS2_FS_XATTR is not set -+# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set -+CONFIG_JFFS2_ZLIB=y -+# CONFIG_JFFS2_LZO is not set -+CONFIG_JFFS2_RTIME=y -+# CONFIG_JFFS2_RUBIN is not set -+# CONFIG_CRAMFS is not set -+# CONFIG_VXFS_FS is not set -+# CONFIG_HPFS_FS is not set -+# CONFIG_QNX4FS_FS is not set -+# CONFIG_SYSV_FS is not set -+# CONFIG_UFS_FS is not set -+CONFIG_NETWORK_FILESYSTEMS=y -+# CONFIG_NFS_FS is not set -+# CONFIG_NFSD is not set -+# CONFIG_SMB_FS is not set -+# CONFIG_CIFS is not set -+# CONFIG_NCP_FS is not set -+# CONFIG_CODA_FS is not set -+# CONFIG_AFS_FS is not set -+ -+# -+# Partition Types -+# -+# CONFIG_PARTITION_ADVANCED is not set -+CONFIG_MSDOS_PARTITION=y -+CONFIG_NLS=m -+CONFIG_NLS_DEFAULT="iso8859-1" -+CONFIG_NLS_CODEPAGE_437=m -+# CONFIG_NLS_CODEPAGE_737 is not set -+# CONFIG_NLS_CODEPAGE_775 is not set -+# CONFIG_NLS_CODEPAGE_850 is not set -+# CONFIG_NLS_CODEPAGE_852 is not set -+# CONFIG_NLS_CODEPAGE_855 is not set -+# CONFIG_NLS_CODEPAGE_857 is not set -+# CONFIG_NLS_CODEPAGE_860 is not set -+# CONFIG_NLS_CODEPAGE_861 is not set -+# CONFIG_NLS_CODEPAGE_862 is not set -+# CONFIG_NLS_CODEPAGE_863 is not set -+# CONFIG_NLS_CODEPAGE_864 is not set -+# CONFIG_NLS_CODEPAGE_865 is not set -+# CONFIG_NLS_CODEPAGE_866 is not set -+# CONFIG_NLS_CODEPAGE_869 is not set -+# CONFIG_NLS_CODEPAGE_936 is not set -+# CONFIG_NLS_CODEPAGE_950 is not set -+# CONFIG_NLS_CODEPAGE_932 is not set -+# CONFIG_NLS_CODEPAGE_949 is not set -+# CONFIG_NLS_CODEPAGE_874 is not set -+# CONFIG_NLS_ISO8859_8 is not set -+# CONFIG_NLS_CODEPAGE_1250 is not set -+# CONFIG_NLS_CODEPAGE_1251 is not set -+# CONFIG_NLS_ASCII is not set -+CONFIG_NLS_ISO8859_1=m -+# CONFIG_NLS_ISO8859_2 is not set -+# CONFIG_NLS_ISO8859_3 is not set -+# CONFIG_NLS_ISO8859_4 is not set -+# CONFIG_NLS_ISO8859_5 is not set -+# CONFIG_NLS_ISO8859_6 is not set -+# CONFIG_NLS_ISO8859_7 is not set -+# CONFIG_NLS_ISO8859_9 is not set -+# CONFIG_NLS_ISO8859_13 is not set -+# CONFIG_NLS_ISO8859_14 is not set -+# CONFIG_NLS_ISO8859_15 is not set -+# CONFIG_NLS_KOI8_R is not set -+# CONFIG_NLS_KOI8_U is not set -+CONFIG_NLS_UTF8=m -+# CONFIG_DLM is not set -+ -+# -+# Kernel hacking -+# -+CONFIG_TRACE_IRQFLAGS_SUPPORT=y -+# CONFIG_PRINTK_TIME is not set -+CONFIG_ENABLE_WARN_DEPRECATED=y -+CONFIG_ENABLE_MUST_CHECK=y -+CONFIG_MAGIC_SYSRQ=y -+# CONFIG_UNUSED_SYMBOLS is not set -+CONFIG_DEBUG_FS=y -+# CONFIG_HEADERS_CHECK is not set -+CONFIG_DEBUG_KERNEL=y -+# CONFIG_DEBUG_SHIRQ is not set -+CONFIG_DETECT_SOFTLOCKUP=y -+CONFIG_SCHED_DEBUG=y -+# CONFIG_SCHEDSTATS is not set -+# CONFIG_TIMER_STATS is not set -+# CONFIG_DEBUG_RT_MUTEXES is not set -+# CONFIG_RT_MUTEX_TESTER is not set -+# CONFIG_DEBUG_SPINLOCK is not set -+# CONFIG_DEBUG_MUTEXES is not set -+# CONFIG_DEBUG_SPINLOCK_SLEEP is not set -+# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set -+# CONFIG_DEBUG_KOBJECT is not set -+CONFIG_DEBUG_BUGVERBOSE=y -+# CONFIG_DEBUG_INFO is not set -+# CONFIG_DEBUG_VM is not set -+# CONFIG_DEBUG_LIST is not set -+# CONFIG_DEBUG_SG is not set -+CONFIG_FRAME_POINTER=y -+CONFIG_FORCED_INLINING=y -+# CONFIG_BOOT_PRINTK_DELAY is not set -+# CONFIG_RCU_TORTURE_TEST is not set -+# CONFIG_FAULT_INJECTION is not set -+# CONFIG_SAMPLES is not set -+# CONFIG_KPROBES is not set -+ -+# -+# Security options -+# -+# CONFIG_KEYS is not set -+# CONFIG_SECURITY is not set -+# CONFIG_SECURITY_FILE_CAPABILITIES is not set -+# CONFIG_CRYPTO is not set -+ -+# -+# Library routines -+# -+CONFIG_BITREVERSE=y -+CONFIG_CRC_CCITT=m -+# CONFIG_CRC16 is not set -+# CONFIG_CRC_ITU_T is not set -+CONFIG_CRC32=y -+# CONFIG_CRC7 is not set -+# CONFIG_LIBCRC32C is not set -+CONFIG_AUDIT_GENERIC=y -+CONFIG_ZLIB_INFLATE=y -+CONFIG_ZLIB_DEFLATE=y -+CONFIG_PLIST=y -+CONFIG_HAS_IOMEM=y -+CONFIG_HAS_IOPORT=y -+CONFIG_HAS_DMA=y -diff --git a/arch/avr32/configs/atstk1004_defconfig b/arch/avr32/configs/atstk1004_defconfig -new file mode 100644 -index 0000000..b002a46 ---- /dev/null -+++ b/arch/avr32/configs/atstk1004_defconfig -@@ -0,0 +1,722 @@ -+# -+# Automatically generated make config: don't edit -+# Linux kernel version: 2.6.24-rc1 -+# Thu Nov 1 11:07:19 2007 -+# -+CONFIG_AVR32=y -+CONFIG_GENERIC_GPIO=y -+CONFIG_GENERIC_HARDIRQS=y -+CONFIG_HARDIRQS_SW_RESEND=y -+CONFIG_GENERIC_IRQ_PROBE=y -+CONFIG_RWSEM_GENERIC_SPINLOCK=y -+CONFIG_GENERIC_TIME=y -+# CONFIG_ARCH_HAS_ILOG2_U32 is not set -+# CONFIG_ARCH_HAS_ILOG2_U64 is not set -+CONFIG_GENERIC_HWEIGHT=y -+CONFIG_GENERIC_CALIBRATE_DELAY=y -+CONFIG_GENERIC_BUG=y -+CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" -+ -+# -+# General setup -+# -+CONFIG_EXPERIMENTAL=y -+CONFIG_BROKEN_ON_SMP=y -+CONFIG_INIT_ENV_ARG_LIMIT=32 -+CONFIG_LOCALVERSION="" -+# CONFIG_LOCALVERSION_AUTO is not set -+CONFIG_SWAP=y -+# CONFIG_SYSVIPC is not set -+# CONFIG_POSIX_MQUEUE is not set -+# CONFIG_BSD_PROCESS_ACCT is not set -+# CONFIG_TASKSTATS is not set -+# CONFIG_USER_NS is not set -+# CONFIG_AUDIT is not set -+# CONFIG_IKCONFIG is not set -+CONFIG_LOG_BUF_SHIFT=14 -+# CONFIG_CGROUPS is not set -+CONFIG_FAIR_GROUP_SCHED=y -+CONFIG_FAIR_USER_SCHED=y -+# CONFIG_FAIR_CGROUP_SCHED is not set -+CONFIG_SYSFS_DEPRECATED=y -+# CONFIG_RELAY is not set -+# CONFIG_BLK_DEV_INITRD is not set -+CONFIG_CC_OPTIMIZE_FOR_SIZE=y -+CONFIG_SYSCTL=y -+CONFIG_EMBEDDED=y -+# CONFIG_SYSCTL_SYSCALL is not set -+CONFIG_KALLSYMS=y -+# CONFIG_KALLSYMS_EXTRA_PASS is not set -+CONFIG_HOTPLUG=y -+CONFIG_PRINTK=y -+CONFIG_BUG=y -+CONFIG_ELF_CORE=y -+# CONFIG_BASE_FULL is not set -+# CONFIG_FUTEX is not set -+# CONFIG_EPOLL is not set -+# CONFIG_SIGNALFD is not set -+# CONFIG_EVENTFD is not set -+CONFIG_SHMEM=y -+CONFIG_VM_EVENT_COUNTERS=y -+# CONFIG_SLAB is not set -+# CONFIG_SLUB is not set -+CONFIG_SLOB=y -+# CONFIG_TINY_SHMEM is not set -+CONFIG_BASE_SMALL=1 -+# CONFIG_MODULES is not set -+CONFIG_BLOCK=y -+# CONFIG_LBD is not set -+# CONFIG_BLK_DEV_IO_TRACE is not set -+# CONFIG_LSF is not set -+# CONFIG_BLK_DEV_BSG is not set -+ -+# -+# IO Schedulers -+# -+CONFIG_IOSCHED_NOOP=y -+# CONFIG_IOSCHED_AS is not set -+# CONFIG_IOSCHED_DEADLINE is not set -+CONFIG_IOSCHED_CFQ=y -+# CONFIG_DEFAULT_AS is not set -+# CONFIG_DEFAULT_DEADLINE is not set -+CONFIG_DEFAULT_CFQ=y -+# CONFIG_DEFAULT_NOOP is not set -+CONFIG_DEFAULT_IOSCHED="cfq" -+ -+# -+# System Type and features -+# -+CONFIG_SUBARCH_AVR32B=y -+CONFIG_MMU=y -+CONFIG_PERFORMANCE_COUNTERS=y -+CONFIG_PLATFORM_AT32AP=y -+CONFIG_CPU_AT32AP700X=y -+# CONFIG_CPU_AT32AP7000 is not set -+# CONFIG_CPU_AT32AP7001 is not set -+CONFIG_CPU_AT32AP7002=y -+CONFIG_BOARD_ATSTK1004=y -+CONFIG_BOARD_ATSTK1000=y -+# CONFIG_BOARD_ATNGW100 is not set -+# CONFIG_BOARD_ATSTK100X_CUSTOM is not set -+# CONFIG_BOARD_ATSTK100X_SPI1 is not set -+# CONFIG_BOARD_ATSTK1000_J2_LED is not set -+# CONFIG_BOARD_ATSTK1000_J2_LED8 is not set -+# CONFIG_BOARD_ATSTK1000_J2_RGB is not set -+CONFIG_BOARD_ATSTK1000_EXTDAC=y -+# CONFIG_BOARD_ATSTK100X_ENABLE_AC97 is not set -+# CONFIG_BOARD_ATSTK1000_CF_HACKS is not set -+CONFIG_LOADER_U_BOOT=y -+ -+# -+# Atmel AVR32 AP options -+# -+# CONFIG_AP700X_32_BIT_SMC is not set -+CONFIG_AP700X_16_BIT_SMC=y -+# CONFIG_AP700X_8_BIT_SMC is not set -+# CONFIG_GPIO_DEV is not set -+CONFIG_LOAD_ADDRESS=0x10000000 -+CONFIG_ENTRY_ADDRESS=0x90000000 -+CONFIG_PHYS_OFFSET=0x10000000 -+CONFIG_PREEMPT_NONE=y -+# CONFIG_PREEMPT_VOLUNTARY is not set -+# CONFIG_PREEMPT is not set -+# CONFIG_HAVE_ARCH_BOOTMEM_NODE is not set -+# CONFIG_ARCH_HAVE_MEMORY_PRESENT is not set -+# CONFIG_NEED_NODE_MEMMAP_SIZE is not set -+CONFIG_ARCH_FLATMEM_ENABLE=y -+# CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set -+# CONFIG_ARCH_SPARSEMEM_ENABLE is not set -+CONFIG_SELECT_MEMORY_MODEL=y -+CONFIG_FLATMEM_MANUAL=y -+# CONFIG_DISCONTIGMEM_MANUAL is not set -+# CONFIG_SPARSEMEM_MANUAL is not set -+CONFIG_FLATMEM=y -+CONFIG_FLAT_NODE_MEM_MAP=y -+# CONFIG_SPARSEMEM_STATIC is not set -+# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set -+CONFIG_SPLIT_PTLOCK_CPUS=4 -+# CONFIG_RESOURCES_64BIT is not set -+CONFIG_ZONE_DMA_FLAG=0 -+CONFIG_VIRT_TO_BUS=y -+# CONFIG_OWNERSHIP_TRACE is not set -+CONFIG_DW_DMAC=y -+# CONFIG_HZ_100 is not set -+CONFIG_HZ_250=y -+# CONFIG_HZ_300 is not set -+# CONFIG_HZ_1000 is not set -+CONFIG_HZ=250 -+CONFIG_CMDLINE="" -+ -+# -+# Power management options -+# -+ -+# -+# CPU Frequency scaling -+# -+CONFIG_CPU_FREQ=y -+CONFIG_CPU_FREQ_TABLE=y -+# CONFIG_CPU_FREQ_DEBUG is not set -+# CONFIG_CPU_FREQ_STAT is not set -+CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y -+# CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set -+# CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND is not set -+# CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set -+CONFIG_CPU_FREQ_GOV_PERFORMANCE=y -+# CONFIG_CPU_FREQ_GOV_POWERSAVE is not set -+CONFIG_CPU_FREQ_GOV_USERSPACE=y -+CONFIG_CPU_FREQ_GOV_ONDEMAND=y -+# CONFIG_CPU_FREQ_GOV_CONSERVATIVE is not set -+CONFIG_CPU_FREQ_AT32AP=y -+ -+# -+# Bus options -+# -+# CONFIG_ARCH_SUPPORTS_MSI is not set -+# CONFIG_PCCARD is not set -+ -+# -+# Executable file formats -+# -+CONFIG_BINFMT_ELF=y -+# CONFIG_BINFMT_MISC is not set -+ -+# -+# Networking -+# -+CONFIG_NET=y -+ -+# -+# Networking options -+# -+CONFIG_PACKET=y -+CONFIG_PACKET_MMAP=y -+CONFIG_UNIX=y -+# CONFIG_NET_KEY is not set -+CONFIG_INET=y -+# CONFIG_IP_MULTICAST is not set -+# CONFIG_IP_ADVANCED_ROUTER is not set -+CONFIG_IP_FIB_HASH=y -+# CONFIG_IP_PNP is not set -+# CONFIG_NET_IPIP is not set -+# CONFIG_NET_IPGRE is not set -+# CONFIG_ARPD is not set -+# CONFIG_SYN_COOKIES is not set -+# CONFIG_INET_AH is not set -+# CONFIG_INET_ESP is not set -+# CONFIG_INET_IPCOMP is not set -+# CONFIG_INET_XFRM_TUNNEL is not set -+# CONFIG_INET_TUNNEL is not set -+# CONFIG_INET_XFRM_MODE_TRANSPORT is not set -+# CONFIG_INET_XFRM_MODE_TUNNEL is not set -+# CONFIG_INET_XFRM_MODE_BEET is not set -+# CONFIG_INET_LRO is not set -+# CONFIG_INET_DIAG is not set -+# CONFIG_TCP_CONG_ADVANCED is not set -+CONFIG_TCP_CONG_CUBIC=y -+CONFIG_DEFAULT_TCP_CONG="cubic" -+# CONFIG_TCP_MD5SIG is not set -+# CONFIG_IPV6 is not set -+# CONFIG_INET6_XFRM_TUNNEL is not set -+# CONFIG_INET6_TUNNEL is not set -+# CONFIG_NETWORK_SECMARK is not set -+# CONFIG_NETFILTER is not set -+# CONFIG_IP_DCCP is not set -+# CONFIG_IP_SCTP is not set -+# CONFIG_TIPC is not set -+# CONFIG_ATM is not set -+# CONFIG_BRIDGE is not set -+# CONFIG_VLAN_8021Q is not set -+# CONFIG_DECNET is not set -+# CONFIG_LLC2 is not set -+# CONFIG_IPX is not set -+# CONFIG_ATALK is not set -+# CONFIG_X25 is not set -+# CONFIG_LAPB is not set -+# CONFIG_ECONET is not set -+# CONFIG_WAN_ROUTER is not set -+# CONFIG_NET_SCHED is not set -+ -+# -+# Network testing -+# -+# CONFIG_NET_PKTGEN is not set -+# CONFIG_HAMRADIO is not set -+# CONFIG_IRDA is not set -+# CONFIG_BT is not set -+# CONFIG_AF_RXRPC is not set -+ -+# -+# Wireless -+# -+# CONFIG_CFG80211 is not set -+# CONFIG_WIRELESS_EXT is not set -+# CONFIG_MAC80211 is not set -+# CONFIG_IEEE80211 is not set -+# CONFIG_RFKILL is not set -+# CONFIG_NET_9P is not set -+ -+# -+# Device Drivers -+# -+ -+# -+# Generic Driver Options -+# -+CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" -+CONFIG_STANDALONE=y -+# CONFIG_PREVENT_FIRMWARE_BUILD is not set -+# CONFIG_FW_LOADER is not set -+# CONFIG_SYS_HYPERVISOR is not set -+# CONFIG_CONNECTOR is not set -+CONFIG_MTD=y -+# CONFIG_MTD_DEBUG is not set -+# CONFIG_MTD_CONCAT is not set -+CONFIG_MTD_PARTITIONS=y -+# CONFIG_MTD_REDBOOT_PARTS is not set -+CONFIG_MTD_CMDLINE_PARTS=y -+ -+# -+# User Modules And Translation Layers -+# -+CONFIG_MTD_CHAR=y -+CONFIG_MTD_BLKDEVS=y -+CONFIG_MTD_BLOCK=y -+# CONFIG_FTL is not set -+# CONFIG_NFTL is not set -+# CONFIG_INFTL is not set -+# CONFIG_RFD_FTL is not set -+# CONFIG_SSFDC is not set -+# CONFIG_MTD_OOPS is not set -+ -+# -+# RAM/ROM/Flash chip drivers -+# -+CONFIG_MTD_CFI=y -+# CONFIG_MTD_JEDECPROBE is not set -+CONFIG_MTD_GEN_PROBE=y -+# CONFIG_MTD_CFI_ADV_OPTIONS is not set -+CONFIG_MTD_MAP_BANK_WIDTH_1=y -+CONFIG_MTD_MAP_BANK_WIDTH_2=y -+CONFIG_MTD_MAP_BANK_WIDTH_4=y -+# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set -+# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set -+# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set -+CONFIG_MTD_CFI_I1=y -+CONFIG_MTD_CFI_I2=y -+# CONFIG_MTD_CFI_I4 is not set -+# CONFIG_MTD_CFI_I8 is not set -+# CONFIG_MTD_CFI_INTELEXT is not set -+CONFIG_MTD_CFI_AMDSTD=y -+# CONFIG_MTD_CFI_STAA is not set -+CONFIG_MTD_CFI_UTIL=y -+# CONFIG_MTD_RAM is not set -+# CONFIG_MTD_ROM is not set -+# CONFIG_MTD_ABSENT is not set -+ -+# -+# Mapping drivers for chip access -+# -+# CONFIG_MTD_COMPLEX_MAPPINGS is not set -+CONFIG_MTD_PHYSMAP=y -+CONFIG_MTD_PHYSMAP_START=0x8000000 -+CONFIG_MTD_PHYSMAP_LEN=0x0 -+CONFIG_MTD_PHYSMAP_BANKWIDTH=2 -+# CONFIG_MTD_PLATRAM is not set -+ -+# -+# Self-contained MTD device drivers -+# -+# CONFIG_MTD_DATAFLASH is not set -+# CONFIG_MTD_M25P80 is not set -+# CONFIG_MTD_SLRAM is not set -+# CONFIG_MTD_PHRAM is not set -+# CONFIG_MTD_MTDRAM is not set -+# CONFIG_MTD_BLOCK2MTD is not set -+ -+# -+# Disk-On-Chip Device Drivers -+# -+# CONFIG_MTD_DOC2000 is not set -+# CONFIG_MTD_DOC2001 is not set -+# CONFIG_MTD_DOC2001PLUS is not set -+# CONFIG_MTD_NAND is not set -+# CONFIG_MTD_ONENAND is not set -+ -+# -+# UBI - Unsorted block images -+# -+# CONFIG_MTD_UBI is not set -+# CONFIG_PARPORT is not set -+# CONFIG_BLK_DEV is not set -+# CONFIG_MISC_DEVICES is not set -+# CONFIG_IDE is not set -+ -+# -+# SCSI device support -+# -+# CONFIG_RAID_ATTRS is not set -+# CONFIG_SCSI is not set -+# CONFIG_SCSI_DMA is not set -+# CONFIG_SCSI_NETLINK is not set -+# CONFIG_ATA is not set -+# CONFIG_MD is not set -+# CONFIG_NETDEVICES is not set -+# CONFIG_ISDN is not set -+# CONFIG_PHONE is not set -+ -+# -+# Input device support -+# -+# CONFIG_INPUT is not set -+ -+# -+# Hardware I/O ports -+# -+# CONFIG_SERIO is not set -+# CONFIG_GAMEPORT is not set -+ -+# -+# Character devices -+# -+# CONFIG_VT is not set -+# CONFIG_SERIAL_NONSTANDARD is not set -+ -+# -+# Serial drivers -+# -+# CONFIG_SERIAL_8250 is not set -+ -+# -+# Non-8250 serial port support -+# -+CONFIG_SERIAL_ATMEL=y -+CONFIG_SERIAL_ATMEL_CONSOLE=y -+# CONFIG_SERIAL_ATMEL_TTYAT is not set -+CONFIG_SERIAL_CORE=y -+CONFIG_SERIAL_CORE_CONSOLE=y -+CONFIG_UNIX98_PTYS=y -+# CONFIG_LEGACY_PTYS is not set -+# CONFIG_IPMI_HANDLER is not set -+# CONFIG_HW_RANDOM is not set -+# CONFIG_RTC is not set -+# CONFIG_GEN_RTC is not set -+# CONFIG_R3964 is not set -+# CONFIG_RAW_DRIVER is not set -+# CONFIG_TCG_TPM is not set -+# CONFIG_I2C is not set -+ -+# -+# SPI support -+# -+CONFIG_SPI=y -+CONFIG_SPI_MASTER=y -+ -+# -+# SPI Master Controller Drivers -+# -+CONFIG_SPI_ATMEL=y -+# CONFIG_SPI_BITBANG is not set -+ -+# -+# SPI Protocol Masters -+# -+# CONFIG_SPI_AT25 is not set -+# CONFIG_SPI_SPIDEV is not set -+# CONFIG_SPI_TLE62X0 is not set -+# CONFIG_W1 is not set -+# CONFIG_POWER_SUPPLY is not set -+# CONFIG_HWMON is not set -+# CONFIG_WATCHDOG is not set -+ -+# -+# Sonics Silicon Backplane -+# -+CONFIG_SSB_POSSIBLE=y -+# CONFIG_SSB is not set -+ -+# -+# Multifunction device drivers -+# -+# CONFIG_MFD_SM501 is not set -+ -+# -+# Multimedia devices -+# -+# CONFIG_VIDEO_DEV is not set -+# CONFIG_DVB_CORE is not set -+# CONFIG_DAB is not set -+ -+# -+# Graphics support -+# -+# CONFIG_VGASTATE is not set -+# CONFIG_VIDEO_OUTPUT_CONTROL is not set -+CONFIG_FB=y -+# CONFIG_FIRMWARE_EDID is not set -+# CONFIG_FB_DDC is not set -+CONFIG_FB_CFB_FILLRECT=y -+CONFIG_FB_CFB_COPYAREA=y -+CONFIG_FB_CFB_IMAGEBLIT=y -+# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set -+# CONFIG_FB_SYS_FILLRECT is not set -+# CONFIG_FB_SYS_COPYAREA is not set -+# CONFIG_FB_SYS_IMAGEBLIT is not set -+# CONFIG_FB_SYS_FOPS is not set -+CONFIG_FB_DEFERRED_IO=y -+# CONFIG_FB_SVGALIB is not set -+# CONFIG_FB_MACMODES is not set -+# CONFIG_FB_BACKLIGHT is not set -+# CONFIG_FB_MODE_HELPERS is not set -+# CONFIG_FB_TILEBLITTING is not set -+ -+# -+# Frame buffer hardware drivers -+# -+# CONFIG_FB_S1D13XXX is not set -+CONFIG_FB_ATMEL=y -+# CONFIG_FB_VIRTUAL is not set -+CONFIG_BACKLIGHT_LCD_SUPPORT=y -+CONFIG_LCD_CLASS_DEVICE=y -+CONFIG_LCD_LTV350QV=y -+# CONFIG_BACKLIGHT_CLASS_DEVICE is not set -+ -+# -+# Display device support -+# -+# CONFIG_DISPLAY_SUPPORT is not set -+# CONFIG_LOGO is not set -+ -+# -+# Sound -+# -+# CONFIG_SOUND is not set -+CONFIG_USB_SUPPORT=y -+# CONFIG_USB_ARCH_HAS_HCD is not set -+# CONFIG_USB_ARCH_HAS_OHCI is not set -+# CONFIG_USB_ARCH_HAS_EHCI is not set -+ -+# -+# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' -+# -+ -+# -+# USB Gadget Support -+# -+CONFIG_USB_GADGET=y -+# CONFIG_USB_GADGET_DEBUG_FILES is not set -+CONFIG_USB_GADGET_SELECTED=y -+# CONFIG_USB_GADGET_AMD5536UDC is not set -+CONFIG_USB_GADGET_ATMEL_USBA=y -+CONFIG_USB_ATMEL_USBA=y -+# CONFIG_USB_GADGET_FSL_USB2 is not set -+# CONFIG_USB_GADGET_NET2280 is not set -+# CONFIG_USB_GADGET_PXA2XX is not set -+# CONFIG_USB_GADGET_M66592 is not set -+# CONFIG_USB_GADGET_GOKU is not set -+# CONFIG_USB_GADGET_LH7A40X is not set -+# CONFIG_USB_GADGET_OMAP is not set -+# CONFIG_USB_GADGET_S3C2410 is not set -+# CONFIG_USB_GADGET_AT91 is not set -+# CONFIG_USB_GADGET_DUMMY_HCD is not set -+CONFIG_USB_GADGET_DUALSPEED=y -+# CONFIG_USB_ZERO is not set -+CONFIG_USB_ETH=y -+# CONFIG_USB_ETH_RNDIS is not set -+# CONFIG_USB_GADGETFS is not set -+# CONFIG_USB_FILE_STORAGE is not set -+# CONFIG_USB_G_SERIAL is not set -+# CONFIG_USB_MIDI_GADGET is not set -+CONFIG_MMC=y -+# CONFIG_MMC_DEBUG is not set -+# CONFIG_MMC_UNSAFE_RESUME is not set -+ -+# -+# MMC/SD Card Drivers -+# -+CONFIG_MMC_BLOCK=y -+# CONFIG_MMC_BLOCK_BOUNCE is not set -+# CONFIG_SDIO_UART is not set -+ -+# -+# MMC/SD Host Controller Drivers -+# -+CONFIG_MMC_ATMELMCI=y -+# CONFIG_MMC_SPI is not set -+CONFIG_NEW_LEDS=y -+CONFIG_LEDS_CLASS=y -+ -+# -+# LED drivers -+# -+CONFIG_LEDS_GPIO=y -+ -+# -+# LED Triggers -+# -+CONFIG_LEDS_TRIGGERS=y -+CONFIG_LEDS_TRIGGER_TIMER=y -+CONFIG_LEDS_TRIGGER_HEARTBEAT=y -+CONFIG_RTC_LIB=y -+CONFIG_RTC_CLASS=y -+CONFIG_RTC_HCTOSYS=y -+CONFIG_RTC_HCTOSYS_DEVICE="rtc0" -+# CONFIG_RTC_DEBUG is not set -+ -+# -+# RTC interfaces -+# -+CONFIG_RTC_INTF_SYSFS=y -+# CONFIG_RTC_INTF_PROC is not set -+CONFIG_RTC_INTF_DEV=y -+# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set -+# CONFIG_RTC_DRV_TEST is not set -+ -+# -+# SPI RTC drivers -+# -+# CONFIG_RTC_DRV_RS5C348 is not set -+# CONFIG_RTC_DRV_MAX6902 is not set -+ -+# -+# Platform RTC drivers -+# -+# CONFIG_RTC_DRV_DS1553 is not set -+# CONFIG_RTC_DRV_STK17TA8 is not set -+# CONFIG_RTC_DRV_DS1742 is not set -+# CONFIG_RTC_DRV_M48T86 is not set -+# CONFIG_RTC_DRV_M48T59 is not set -+# CONFIG_RTC_DRV_V3020 is not set -+ -+# -+# on-CPU RTC drivers -+# -+CONFIG_RTC_DRV_AT32AP700X=y -+ -+# -+# Userspace I/O -+# -+# CONFIG_UIO is not set -+ -+# -+# File systems -+# -+CONFIG_EXT2_FS=y -+# CONFIG_EXT2_FS_XATTR is not set -+# CONFIG_EXT2_FS_XIP is not set -+# CONFIG_EXT3_FS is not set -+# CONFIG_EXT4DEV_FS is not set -+# CONFIG_REISERFS_FS is not set -+# CONFIG_JFS_FS is not set -+# CONFIG_FS_POSIX_ACL is not set -+# CONFIG_XFS_FS is not set -+# CONFIG_GFS2_FS is not set -+# CONFIG_OCFS2_FS is not set -+# CONFIG_MINIX_FS is not set -+# CONFIG_ROMFS_FS is not set -+# CONFIG_INOTIFY is not set -+# CONFIG_QUOTA is not set -+# CONFIG_DNOTIFY is not set -+# CONFIG_AUTOFS_FS is not set -+# CONFIG_AUTOFS4_FS is not set -+# CONFIG_FUSE_FS is not set -+ -+# -+# CD-ROM/DVD Filesystems -+# -+# CONFIG_ISO9660_FS is not set -+# CONFIG_UDF_FS is not set -+ -+# -+# DOS/FAT/NT Filesystems -+# -+# CONFIG_MSDOS_FS is not set -+# CONFIG_VFAT_FS is not set -+# CONFIG_NTFS_FS is not set -+ -+# -+# Pseudo filesystems -+# -+CONFIG_PROC_FS=y -+CONFIG_PROC_KCORE=y -+CONFIG_PROC_SYSCTL=y -+CONFIG_SYSFS=y -+CONFIG_TMPFS=y -+# CONFIG_TMPFS_POSIX_ACL is not set -+# CONFIG_HUGETLB_PAGE is not set -+# CONFIG_CONFIGFS_FS is not set -+ -+# -+# Miscellaneous filesystems -+# -+# CONFIG_ADFS_FS is not set -+# CONFIG_AFFS_FS is not set -+# CONFIG_HFS_FS is not set -+# CONFIG_HFSPLUS_FS is not set -+# CONFIG_BEFS_FS is not set -+# CONFIG_BFS_FS is not set -+# CONFIG_EFS_FS is not set -+CONFIG_JFFS2_FS=y -+CONFIG_JFFS2_FS_DEBUG=0 -+# CONFIG_JFFS2_FS_WRITEBUFFER is not set -+# CONFIG_JFFS2_SUMMARY is not set -+# CONFIG_JFFS2_FS_XATTR is not set -+# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set -+CONFIG_JFFS2_ZLIB=y -+# CONFIG_JFFS2_LZO is not set -+CONFIG_JFFS2_RTIME=y -+# CONFIG_JFFS2_RUBIN is not set -+# CONFIG_CRAMFS is not set -+# CONFIG_VXFS_FS is not set -+# CONFIG_HPFS_FS is not set -+# CONFIG_QNX4FS_FS is not set -+# CONFIG_SYSV_FS is not set -+# CONFIG_UFS_FS is not set -+# CONFIG_NETWORK_FILESYSTEMS is not set -+ -+# -+# Partition Types -+# -+# CONFIG_PARTITION_ADVANCED is not set -+CONFIG_MSDOS_PARTITION=y -+# CONFIG_NLS is not set -+# CONFIG_DLM is not set -+ -+# -+# Kernel hacking -+# -+CONFIG_TRACE_IRQFLAGS_SUPPORT=y -+# CONFIG_PRINTK_TIME is not set -+CONFIG_ENABLE_WARN_DEPRECATED=y -+CONFIG_ENABLE_MUST_CHECK=y -+CONFIG_MAGIC_SYSRQ=y -+# CONFIG_UNUSED_SYMBOLS is not set -+# CONFIG_DEBUG_FS is not set -+# CONFIG_HEADERS_CHECK is not set -+# CONFIG_DEBUG_KERNEL is not set -+# CONFIG_DEBUG_BUGVERBOSE is not set -+# CONFIG_SAMPLES is not set -+ -+# -+# Security options -+# -+# CONFIG_KEYS is not set -+# CONFIG_SECURITY is not set -+# CONFIG_SECURITY_FILE_CAPABILITIES is not set -+# CONFIG_CRYPTO is not set -+ -+# -+# Library routines -+# -+CONFIG_BITREVERSE=y -+# CONFIG_CRC_CCITT is not set -+# CONFIG_CRC16 is not set -+# CONFIG_CRC_ITU_T is not set -+CONFIG_CRC32=y -+# CONFIG_CRC7 is not set -+# CONFIG_LIBCRC32C is not set -+CONFIG_ZLIB_INFLATE=y -+CONFIG_ZLIB_DEFLATE=y -+CONFIG_HAS_IOMEM=y -+CONFIG_HAS_IOPORT=y -+CONFIG_HAS_DMA=y -diff --git a/arch/avr32/drivers/Makefile b/arch/avr32/drivers/Makefile -new file mode 100644 -index 0000000..b429b75 ---- /dev/null -+++ b/arch/avr32/drivers/Makefile -@@ -0,0 +1 @@ -+obj-$(CONFIG_DW_DMAC) += dw-dmac.o -diff --git a/arch/avr32/drivers/dw-dmac.c b/arch/avr32/drivers/dw-dmac.c -new file mode 100644 -index 0000000..224eb30 ---- /dev/null -+++ b/arch/avr32/drivers/dw-dmac.c -@@ -0,0 +1,761 @@ -+/* -+ * Driver for the Synopsys DesignWare DMA Controller -+ * -+ * Copyright (C) 2005-2006 Atmel Corporation -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 as -+ * published by the Free Software Foundation. -+ */ -+#include <linux/clk.h> -+#include <linux/device.h> -+#include <linux/dma-mapping.h> -+#include <linux/dmapool.h> -+#include <linux/init.h> -+#include <linux/interrupt.h> -+#include <linux/module.h> -+#include <linux/platform_device.h> -+ -+#include <asm/dma-controller.h> -+#include <asm/io.h> -+ -+#include "dw-dmac.h" -+ -+#define DMAC_NR_CHANNELS 3 -+#define DMAC_MAX_BLOCKSIZE 4095 -+ -+enum { -+ CH_STATE_FREE = 0, -+ CH_STATE_ALLOCATED, -+ CH_STATE_BUSY, -+}; -+ -+struct dw_dma_lli { -+ dma_addr_t sar; -+ dma_addr_t dar; -+ dma_addr_t llp; -+ u32 ctllo; -+ u32 ctlhi; -+ u32 sstat; -+ u32 dstat; -+}; -+ -+struct dw_dma_block { -+ struct dw_dma_lli *lli_vaddr; -+ dma_addr_t lli_dma_addr; -+}; -+ -+struct dw_dma_channel { -+ unsigned int state; -+ int is_cyclic; -+ struct dma_request_sg *req_sg; -+ struct dma_request_cyclic *req_cyclic; -+ unsigned int nr_blocks; -+ int direction; -+ struct dw_dma_block *block; -+}; -+ -+struct dw_dma_controller { -+ spinlock_t lock; -+ void * __iomem regs; -+ struct dma_pool *lli_pool; -+ struct clk *hclk; -+ struct dma_controller dma; -+ struct dw_dma_channel channel[DMAC_NR_CHANNELS]; -+}; -+#define to_dw_dmac(dmac) container_of(dmac, struct dw_dma_controller, dma) -+ -+#define dmac_writel_hi(dmac, reg, value) \ -+ __raw_writel((value), (dmac)->regs + DW_DMAC_##reg + 4) -+#define dmac_readl_hi(dmac, reg) \ -+ __raw_readl((dmac)->regs + DW_DMAC_##reg + 4) -+#define dmac_writel_lo(dmac, reg, value) \ -+ __raw_writel((value), (dmac)->regs + DW_DMAC_##reg) -+#define dmac_readl_lo(dmac, reg) \ -+ __raw_readl((dmac)->regs + DW_DMAC_##reg) -+#define dmac_chan_writel_hi(dmac, chan, reg, value) \ -+ __raw_writel((value), ((dmac)->regs + 0x58 * (chan) \ -+ + DW_DMAC_CHAN_##reg + 4)) -+#define dmac_chan_readl_hi(dmac, chan, reg) \ -+ __raw_readl((dmac)->regs + 0x58 * (chan) + DW_DMAC_CHAN_##reg + 4) -+#define dmac_chan_writel_lo(dmac, chan, reg, value) \ -+ __raw_writel((value), (dmac)->regs + 0x58 * (chan) + DW_DMAC_CHAN_##reg) -+#define dmac_chan_readl_lo(dmac, chan, reg) \ -+ __raw_readl((dmac)->regs + 0x58 * (chan) + DW_DMAC_CHAN_##reg) -+#define set_channel_bit(dmac, reg, chan) \ -+ dmac_writel_lo(dmac, reg, (1 << (chan)) | (1 << ((chan) + 8))) -+#define clear_channel_bit(dmac, reg, chan) \ -+ dmac_writel_lo(dmac, reg, (0 << (chan)) | (1 << ((chan) + 8))) -+ -+static int dmac_alloc_channel(struct dma_controller *_dmac) -+{ -+ struct dw_dma_controller *dmac = to_dw_dmac(_dmac); -+ struct dw_dma_channel *chan; -+ unsigned long flags; -+ int i; -+ -+ spin_lock_irqsave(&dmac->lock, flags); -+ for (i = 0; i < DMAC_NR_CHANNELS; i++) -+ if (dmac->channel[i].state == CH_STATE_FREE) -+ break; -+ -+ if (i < DMAC_NR_CHANNELS) { -+ chan = &dmac->channel[i]; -+ chan->state = CH_STATE_ALLOCATED; -+ } else { -+ i = -EBUSY; -+ } -+ -+ spin_unlock_irqrestore(&dmac->lock, flags); -+ -+ return i; -+} -+ -+static void dmac_release_channel(struct dma_controller *_dmac, int channel) -+{ -+ struct dw_dma_controller *dmac = to_dw_dmac(_dmac); -+ -+ BUG_ON(channel >= DMAC_NR_CHANNELS -+ || dmac->channel[channel].state != CH_STATE_ALLOCATED); -+ -+ dmac->channel[channel].state = CH_STATE_FREE; -+} -+ -+static struct dw_dma_block *allocate_blocks(struct dw_dma_controller *dmac, -+ unsigned int nr_blocks) -+{ -+ struct dw_dma_block *block; -+ void *p; -+ unsigned int i; -+ -+ block = kmalloc(nr_blocks * sizeof(*block), -+ GFP_KERNEL); -+ if (unlikely(!block)) -+ return NULL; -+ -+ for (i = 0; i < nr_blocks; i++) { -+ p = dma_pool_alloc(dmac->lli_pool, GFP_KERNEL, -+ &block[i].lli_dma_addr); -+ block[i].lli_vaddr = p; -+ if (unlikely(!p)) -+ goto fail; -+ } -+ -+ return block; -+ -+fail: -+ for (i = 0; i < nr_blocks; i++) { -+ if (!block[i].lli_vaddr) -+ break; -+ dma_pool_free(dmac->lli_pool, block[i].lli_vaddr, -+ block[i].lli_dma_addr); -+ } -+ kfree(block); -+ return NULL; -+} -+ -+static void cleanup_channel(struct dw_dma_controller *dmac, -+ struct dw_dma_channel *chan) -+{ -+ unsigned int i; -+ -+ if (chan->nr_blocks > 1) { -+ for (i = 0; i < chan->nr_blocks; i++) -+ dma_pool_free(dmac->lli_pool, chan->block[i].lli_vaddr, -+ chan->block[i].lli_dma_addr); -+ kfree(chan->block); -+ } -+ -+ chan->state = CH_STATE_ALLOCATED; -+} -+ -+static int dmac_prepare_request_sg(struct dma_controller *_dmac, -+ struct dma_request_sg *req) -+{ -+ struct dw_dma_controller *dmac = to_dw_dmac(_dmac); -+ struct dw_dma_channel *chan; -+ unsigned long ctlhi, ctllo, cfghi, cfglo; -+ unsigned long block_size; -+ unsigned int nr_blocks; -+ int ret, i, direction; -+ unsigned long flags; -+ -+ spin_lock_irqsave(&dmac->lock, flags); -+ -+ ret = -EINVAL; -+ if (req->req.channel >= DMAC_NR_CHANNELS -+ || dmac->channel[req->req.channel].state != CH_STATE_ALLOCATED -+ || req->block_size > DMAC_MAX_BLOCKSIZE) { -+ spin_unlock_irqrestore(&dmac->lock, flags); -+ return -EINVAL; -+ } -+ -+ chan = &dmac->channel[req->req.channel]; -+ chan->state = CH_STATE_BUSY; -+ chan->req_sg = req; -+ chan->is_cyclic = 0; -+ -+ /* -+ * We have marked the channel as busy, so no need to keep the -+ * lock as long as we only touch the channel-specific -+ * registers -+ */ -+ spin_unlock_irqrestore(&dmac->lock, flags); -+ -+ /* -+ * There may be limitations in the driver and/or the DMA -+ * controller that prevents us from sending a whole -+ * scatterlist item in one go. Taking this into account, -+ * calculate the number of block transfers we need to set up. -+ * -+ * FIXME: Let the peripheral driver know about the maximum -+ * block size we support. We really don't want to use a -+ * different block size than what was suggested by the -+ * peripheral. -+ * -+ * Each block will get its own Linked List Item (LLI) below. -+ */ -+ block_size = req->block_size; -+ nr_blocks = req->nr_blocks; -+ pr_debug("block_size %lu, nr_blocks %u nr_sg = %u\n", -+ block_size, nr_blocks, req->nr_sg); -+ -+ BUG_ON(nr_blocks == 0); -+ chan->nr_blocks = nr_blocks; -+ -+ ret = -EINVAL; -+ cfglo = cfghi = 0; -+ switch (req->direction) { -+ case DMA_DIR_MEM_TO_PERIPH: -+ direction = DMA_TO_DEVICE; -+ cfghi = req->periph_id << (43 - 32); -+ break; -+ -+ case DMA_DIR_PERIPH_TO_MEM: -+ direction = DMA_FROM_DEVICE; -+ cfghi = req->periph_id << (39 - 32); -+ break; -+ default: -+ goto out_unclaim_channel; -+ } -+ -+ chan->direction = direction; -+ -+ dmac_chan_writel_hi(dmac, req->req.channel, CFG, cfghi); -+ dmac_chan_writel_lo(dmac, req->req.channel, CFG, cfglo); -+ -+ ctlhi = block_size >> req->width; -+ ctllo = ((req->direction << 20) -+ // | (1 << 14) | (1 << 11) // source/dest burst trans len -+ | (req->width << 4) | (req->width << 1) -+ | (1 << 0)); // interrupt enable -+ -+ if (nr_blocks == 1) { -+ /* Only one block: No need to use block chaining */ -+ if (direction == DMA_TO_DEVICE) { -+ dmac_chan_writel_lo(dmac, req->req.channel, SAR, -+ req->sg->dma_address); -+ dmac_chan_writel_lo(dmac, req->req.channel, DAR, -+ req->data_reg); -+ ctllo |= 2 << 7; // no dst increment -+ } else { -+ dmac_chan_writel_lo(dmac, req->req.channel, SAR, -+ req->data_reg); -+ dmac_chan_writel_lo(dmac, req->req.channel, DAR, -+ req->sg->dma_address); -+ ctllo |= 2 << 9; // no src increment -+ } -+ dmac_chan_writel_lo(dmac, req->req.channel, CTL, ctllo); -+ dmac_chan_writel_hi(dmac, req->req.channel, CTL, ctlhi); -+ pr_debug("ctl hi:lo 0x%lx:%lx\n", ctlhi, ctllo); -+ } else { -+ struct dw_dma_lli *lli, *lli_prev = NULL; -+ int j = 0, offset = 0; -+ -+ ret = -ENOMEM; -+ chan->block = allocate_blocks(dmac, nr_blocks); -+ if (!chan->block) -+ goto out_unclaim_channel; -+ -+ if (direction == DMA_TO_DEVICE) -+ ctllo |= 1 << 28 | 1 << 27 | 2 << 7; -+ else -+ ctllo |= 1 << 28 | 1 << 27 | 2 << 9; -+ -+ /* -+ * Map scatterlist items to blocks. One scatterlist -+ * item may need more than one block for the reasons -+ * mentioned above. -+ */ -+ for (i = 0; i < nr_blocks; i++) { -+ lli = chan->block[i].lli_vaddr; -+ if (lli_prev) { -+ lli_prev->llp = chan->block[i].lli_dma_addr; -+ pr_debug("lli[%d] (0x%p/0x%x): 0x%x 0x%x 0x%x 0x%x 0x%x\n", -+ i - 1, chan->block[i - 1].lli_vaddr, -+ chan->block[i - 1].lli_dma_addr, -+ lli_prev->sar, lli_prev->dar, lli_prev->llp, -+ lli_prev->ctllo, lli_prev->ctlhi); -+ } -+ lli->llp = 0; -+ lli->ctllo = ctllo; -+ lli->ctlhi = ctlhi; -+ if (direction == DMA_TO_DEVICE) { -+ lli->sar = req->sg[j].dma_address + offset; -+ lli->dar = req->data_reg; -+ } else { -+ lli->sar = req->data_reg; -+ lli->dar = req->sg[j].dma_address + offset; -+ } -+ lli_prev = lli; -+ -+ offset += block_size; -+ if (offset > req->sg[j].length) { -+ j++; -+ offset = 0; -+ } -+ } -+ -+ pr_debug("lli[%d] (0x%p/0x%x): 0x%x 0x%x 0x%x 0x%x 0x%x\n", -+ i - 1, chan->block[i - 1].lli_vaddr, -+ chan->block[i - 1].lli_dma_addr, lli_prev->sar, -+ lli_prev->dar, lli_prev->llp, -+ lli_prev->ctllo, lli_prev->ctlhi); -+ -+ /* -+ * SAR, DAR and CTL are initialized from the LLI. We -+ * only have to enable the LLI bits in CTL. -+ */ -+ dmac_chan_writel_hi(dmac, req->req.channel, CTL, 0); -+ dmac_chan_writel_lo(dmac, req->req.channel, LLP, -+ chan->block[0].lli_dma_addr); -+ dmac_chan_writel_lo(dmac, req->req.channel, CTL, 1 << 28 | 1 << 27); -+ } -+ -+ set_channel_bit(dmac, MASK_XFER, req->req.channel); -+ set_channel_bit(dmac, MASK_ERROR, req->req.channel); -+ if (req->req.block_complete) -+ set_channel_bit(dmac, MASK_BLOCK, req->req.channel); -+ else -+ clear_channel_bit(dmac, MASK_BLOCK, req->req.channel); -+ -+ return 0; -+ -+out_unclaim_channel: -+ chan->state = CH_STATE_ALLOCATED; -+ return ret; -+} -+ -+static int dmac_prepare_request_cyclic(struct dma_controller *_dmac, -+ struct dma_request_cyclic *req) -+{ -+ struct dw_dma_controller *dmac = to_dw_dmac(_dmac); -+ struct dw_dma_channel *chan; -+ unsigned long ctlhi, ctllo, cfghi, cfglo; -+ unsigned long block_size; -+ int ret, i, direction; -+ unsigned long flags; -+ -+ spin_lock_irqsave(&dmac->lock, flags); -+ -+ block_size = (req->buffer_size/req->periods) >> req->width; -+ -+ ret = -EINVAL; -+ if (req->req.channel >= DMAC_NR_CHANNELS -+ || dmac->channel[req->req.channel].state != CH_STATE_ALLOCATED -+ || (req->periods == 0) -+ || block_size > DMAC_MAX_BLOCKSIZE) { -+ spin_unlock_irqrestore(&dmac->lock, flags); -+ return -EINVAL; -+ } -+ -+ chan = &dmac->channel[req->req.channel]; -+ chan->state = CH_STATE_BUSY; -+ chan->is_cyclic = 1; -+ chan->req_cyclic = req; -+ -+ /* -+ * We have marked the channel as busy, so no need to keep the -+ * lock as long as we only touch the channel-specific -+ * registers -+ */ -+ spin_unlock_irqrestore(&dmac->lock, flags); -+ -+ /* -+ Setup -+ */ -+ BUG_ON(req->buffer_size % req->periods); -+ /* printk(KERN_INFO "block_size = %lu, periods = %u\n", block_size, req->periods); */ -+ -+ chan->nr_blocks = req->periods; -+ -+ ret = -EINVAL; -+ cfglo = cfghi = 0; -+ switch (req->direction) { -+ case DMA_DIR_MEM_TO_PERIPH: -+ direction = DMA_TO_DEVICE; -+ cfghi = req->periph_id << (43 - 32); -+ break; -+ -+ case DMA_DIR_PERIPH_TO_MEM: -+ direction = DMA_FROM_DEVICE; -+ cfghi = req->periph_id << (39 - 32); -+ break; -+ default: -+ goto out_unclaim_channel; -+ } -+ -+ chan->direction = direction; -+ -+ dmac_chan_writel_hi(dmac, req->req.channel, CFG, cfghi); -+ dmac_chan_writel_lo(dmac, req->req.channel, CFG, cfglo); -+ -+ ctlhi = block_size; -+ ctllo = ((req->direction << 20) -+ | (req->width << 4) | (req->width << 1) -+ | (1 << 0)); // interrupt enable -+ -+ { -+ struct dw_dma_lli *lli = NULL, *lli_prev = NULL; -+ -+ ret = -ENOMEM; -+ chan->block = allocate_blocks(dmac, req->periods); -+ if (!chan->block) -+ goto out_unclaim_channel; -+ -+ if (direction == DMA_TO_DEVICE) -+ ctllo |= 1 << 28 | 1 << 27 | 2 << 7; -+ else -+ ctllo |= 1 << 28 | 1 << 27 | 2 << 9; -+ -+ /* -+ * Set up a linked list items where each period gets -+ * an item. The linked list item for the last period -+ * points back to the star of the buffer making a -+ * cyclic buffer. -+ */ -+ for (i = 0; i < req->periods; i++) { -+ lli = chan->block[i].lli_vaddr; -+ if (lli_prev) { -+ lli_prev->llp = chan->block[i].lli_dma_addr; -+ /* printk(KERN_INFO "lli[%d] (0x%p/0x%x): 0x%x 0x%x 0x%x 0x%x 0x%x\n", -+ i - 1, chan->block[i - 1].lli_vaddr, -+ chan->block[i - 1].lli_dma_addr, -+ lli_prev->sar, lli_prev->dar, lli_prev->llp, -+ lli_prev->ctllo, lli_prev->ctlhi);*/ -+ } -+ lli->llp = 0; -+ lli->ctllo = ctllo; -+ lli->ctlhi = ctlhi; -+ if (direction == DMA_TO_DEVICE) { -+ lli->sar = req->buffer_start + i*(block_size << req->width); -+ lli->dar = req->data_reg; -+ } else { -+ lli->sar = req->data_reg; -+ lli->dar = req->buffer_start + i*(block_size << req->width); -+ } -+ lli_prev = lli; -+ } -+ lli->llp = chan->block[0].lli_dma_addr; -+ -+ /*printk(KERN_INFO "lli[%d] (0x%p/0x%x): 0x%x 0x%x 0x%x 0x%x 0x%x\n", -+ i - 1, chan->block[i - 1].lli_vaddr, -+ chan->block[i - 1].lli_dma_addr, lli_prev->sar, -+ lli_prev->dar, lli_prev->llp, -+ lli_prev->ctllo, lli_prev->ctlhi); */ -+ -+ /* -+ * SAR, DAR and CTL are initialized from the LLI. We -+ * only have to enable the LLI bits in CTL. -+ */ -+ dmac_chan_writel_lo(dmac, req->req.channel, LLP, -+ chan->block[0].lli_dma_addr); -+ dmac_chan_writel_lo(dmac, req->req.channel, CTL, 1 << 28 | 1 << 27); -+ } -+ -+ clear_channel_bit(dmac, MASK_XFER, req->req.channel); -+ set_channel_bit(dmac, MASK_ERROR, req->req.channel); -+ if (req->req.block_complete) -+ set_channel_bit(dmac, MASK_BLOCK, req->req.channel); -+ else -+ clear_channel_bit(dmac, MASK_BLOCK, req->req.channel); -+ -+ return 0; -+ -+out_unclaim_channel: -+ chan->state = CH_STATE_ALLOCATED; -+ return ret; -+} -+ -+static int dmac_start_request(struct dma_controller *_dmac, -+ unsigned int channel) -+{ -+ struct dw_dma_controller *dmac = to_dw_dmac(_dmac); -+ -+ BUG_ON(channel >= DMAC_NR_CHANNELS); -+ -+ set_channel_bit(dmac, CH_EN, channel); -+ -+ return 0; -+} -+ -+static dma_addr_t dmac_get_current_pos(struct dma_controller *_dmac, -+ unsigned int channel) -+{ -+ struct dw_dma_controller *dmac = to_dw_dmac(_dmac); -+ struct dw_dma_channel *chan; -+ dma_addr_t current_pos; -+ -+ BUG_ON(channel >= DMAC_NR_CHANNELS); -+ -+ chan = &dmac->channel[channel]; -+ -+ switch (chan->direction) { -+ case DMA_TO_DEVICE: -+ current_pos = dmac_chan_readl_lo(dmac, channel, SAR); -+ break; -+ case DMA_FROM_DEVICE: -+ current_pos = dmac_chan_readl_lo(dmac, channel, DAR); -+ break; -+ default: -+ return 0; -+ } -+ -+ -+ if (!current_pos) { -+ if (chan->is_cyclic) { -+ current_pos = chan->req_cyclic->buffer_start; -+ } else { -+ current_pos = chan->req_sg->sg->dma_address; -+ } -+ } -+ -+ return current_pos; -+} -+ -+ -+static int dmac_stop_request(struct dma_controller *_dmac, -+ unsigned int channel) -+{ -+ struct dw_dma_controller *dmac = to_dw_dmac(_dmac); -+ struct dw_dma_channel *chan; -+ -+ BUG_ON(channel >= DMAC_NR_CHANNELS); -+ -+ chan = &dmac->channel[channel]; -+ pr_debug("stop: st%u s%08x d%08x l%08x ctl0x%08x:0x%08x\n", -+ chan->state, dmac_chan_readl_lo(dmac, channel, SAR), -+ dmac_chan_readl_lo(dmac, channel, DAR), -+ dmac_chan_readl_lo(dmac, channel, LLP), -+ dmac_chan_readl_hi(dmac, channel, CTL), -+ dmac_chan_readl_lo(dmac, channel, CTL)); -+ -+ if (chan->state == CH_STATE_BUSY) { -+ clear_channel_bit(dmac, CH_EN, channel); -+ cleanup_channel(dmac, &dmac->channel[channel]); -+ } -+ -+ return 0; -+} -+ -+ -+static void dmac_block_complete(struct dw_dma_controller *dmac) -+{ -+ struct dw_dma_channel *chan; -+ unsigned long status, chanid; -+ -+ status = dmac_readl_lo(dmac, STATUS_BLOCK); -+ -+ while (status) { -+ struct dma_request *req; -+ chanid = __ffs(status); -+ chan = &dmac->channel[chanid]; -+ -+ if (chan->is_cyclic) { -+ BUG_ON(!chan->req_cyclic -+ || !chan->req_cyclic->req.block_complete); -+ req = &chan->req_cyclic->req; -+ } else { -+ BUG_ON(!chan->req_sg || !chan->req_sg->req.block_complete); -+ req = &chan->req_sg->req; -+ } -+ dmac_writel_lo(dmac, CLEAR_BLOCK, 1 << chanid); -+ req->block_complete(req); -+ status = dmac_readl_lo(dmac, STATUS_BLOCK); -+ } -+} -+ -+static void dmac_xfer_complete(struct dw_dma_controller *dmac) -+{ -+ struct dw_dma_channel *chan; -+ struct dma_request *req; -+ unsigned long status, chanid; -+ -+ status = dmac_readl_lo(dmac, STATUS_XFER); -+ -+ while (status) { -+ chanid = __ffs(status); -+ chan = &dmac->channel[chanid]; -+ -+ dmac_writel_lo(dmac, CLEAR_XFER, 1 << chanid); -+ -+ req = &chan->req_sg->req; -+ BUG_ON(!req); -+ cleanup_channel(dmac, chan); -+ if (req->xfer_complete) -+ req->xfer_complete(req); -+ -+ status = dmac_readl_lo(dmac, STATUS_XFER); -+ } -+} -+ -+static void dmac_error(struct dw_dma_controller *dmac) -+{ -+ struct dw_dma_channel *chan; -+ unsigned long status, chanid; -+ -+ status = dmac_readl_lo(dmac, STATUS_ERROR); -+ -+ while (status) { -+ struct dma_request *req; -+ -+ chanid = __ffs(status); -+ chan = &dmac->channel[chanid]; -+ -+ dmac_writel_lo(dmac, CLEAR_ERROR, 1 << chanid); -+ clear_channel_bit(dmac, CH_EN, chanid); -+ -+ if (chan->is_cyclic) { -+ BUG_ON(!chan->req_cyclic); -+ req = &chan->req_cyclic->req; -+ } else { -+ BUG_ON(!chan->req_sg); -+ req = &chan->req_sg->req; -+ } -+ -+ cleanup_channel(dmac, chan); -+ if (req->error) -+ req->error(req); -+ -+ status = dmac_readl_lo(dmac, STATUS_XFER); -+ } -+} -+ -+static irqreturn_t dmac_interrupt(int irq, void *dev_id) -+{ -+ struct dw_dma_controller *dmac = dev_id; -+ unsigned long status; -+ int ret = IRQ_NONE; -+ -+ spin_lock(&dmac->lock); -+ -+ status = dmac_readl_lo(dmac, STATUS_INT); -+ -+ while (status) { -+ ret = IRQ_HANDLED; -+ if (status & 0x10) -+ dmac_error(dmac); -+ if (status & 0x02) -+ dmac_block_complete(dmac); -+ if (status & 0x01) -+ dmac_xfer_complete(dmac); -+ -+ status = dmac_readl_lo(dmac, STATUS_INT); -+ } -+ -+ spin_unlock(&dmac->lock); -+ return ret; -+} -+ -+static int __devinit dmac_probe(struct platform_device *pdev) -+{ -+ struct dw_dma_controller *dmac; -+ struct resource *regs; -+ int ret; -+ -+ regs = platform_get_resource(pdev, IORESOURCE_MEM, 0); -+ if (!regs) -+ return -ENXIO; -+ -+ dmac = kmalloc(sizeof(*dmac), GFP_KERNEL); -+ if (!dmac) -+ return -ENOMEM; -+ memset(dmac, 0, sizeof(*dmac)); -+ -+ dmac->hclk = clk_get(&pdev->dev, "hclk"); -+ if (IS_ERR(dmac->hclk)) { -+ ret = PTR_ERR(dmac->hclk); -+ goto out_free_dmac; -+ } -+ clk_enable(dmac->hclk); -+ -+ ret = -ENOMEM; -+ dmac->lli_pool = dma_pool_create("dmac", &pdev->dev, -+ sizeof(struct dw_dma_lli), 4, 0); -+ if (!dmac->lli_pool) -+ goto out_disable_clk; -+ -+ spin_lock_init(&dmac->lock); -+ dmac->dma.dev = &pdev->dev; -+ dmac->dma.alloc_channel = dmac_alloc_channel; -+ dmac->dma.release_channel = dmac_release_channel; -+ dmac->dma.prepare_request_sg = dmac_prepare_request_sg; -+ dmac->dma.prepare_request_cyclic = dmac_prepare_request_cyclic; -+ dmac->dma.start_request = dmac_start_request; -+ dmac->dma.stop_request = dmac_stop_request; -+ dmac->dma.get_current_pos = dmac_get_current_pos; -+ -+ dmac->regs = ioremap(regs->start, regs->end - regs->start + 1); -+ if (!dmac->regs) -+ goto out_free_pool; -+ -+ ret = request_irq(platform_get_irq(pdev, 0), dmac_interrupt, -+ IRQF_SAMPLE_RANDOM, pdev->name, dmac); -+ if (ret) -+ goto out_unmap_regs; -+ -+ /* Enable the DMA controller */ -+ dmac_writel_lo(dmac, CFG, 1); -+ -+ register_dma_controller(&dmac->dma); -+ -+ printk(KERN_INFO -+ "dmac%d: DesignWare DMA controller at 0x%p irq %d\n", -+ dmac->dma.id, dmac->regs, platform_get_irq(pdev, 0)); -+ -+ return 0; -+ -+out_unmap_regs: -+ iounmap(dmac->regs); -+out_free_pool: -+ dma_pool_destroy(dmac->lli_pool); -+out_disable_clk: -+ clk_disable(dmac->hclk); -+ clk_put(dmac->hclk); -+out_free_dmac: -+ kfree(dmac); -+ return ret; -+} -+ -+static struct platform_driver dmac_driver = { -+ .probe = dmac_probe, -+ .driver = { -+ .name = "dmaca", -+ }, -+}; -+ -+static int __init dmac_init(void) -+{ -+ return platform_driver_register(&dmac_driver); -+} -+subsys_initcall(dmac_init); -+ -+static void __exit dmac_exit(void) -+{ -+ platform_driver_unregister(&dmac_driver); -+} -+module_exit(dmac_exit); -+ -+MODULE_DESCRIPTION("Synopsys DesignWare DMA Controller driver"); -+MODULE_AUTHOR("Haavard Skinnemoen <hskinnemoen@atmel.com>"); -+MODULE_LICENSE("GPL"); -diff --git a/arch/avr32/drivers/dw-dmac.h b/arch/avr32/drivers/dw-dmac.h -new file mode 100644 -index 0000000..1f67921 ---- /dev/null -+++ b/arch/avr32/drivers/dw-dmac.h -@@ -0,0 +1,42 @@ -+/* -+ * Driver for the Synopsys DesignWare DMA Controller -+ * -+ * Copyright (C) 2005-2006 Atmel Corporation -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 as -+ * published by the Free Software Foundation. -+ */ -+#ifndef __AVR32_DW_DMAC_H__ -+#define __AVR32_DW_DMAC_H__ -+ -+#define DW_DMAC_CFG 0x398 -+#define DW_DMAC_CH_EN 0x3a0 -+ -+#define DW_DMAC_STATUS_XFER 0x2e8 -+#define DW_DMAC_STATUS_BLOCK 0x2f0 -+#define DW_DMAC_STATUS_ERROR 0x308 -+ -+#define DW_DMAC_MASK_XFER 0x310 -+#define DW_DMAC_MASK_BLOCK 0x318 -+#define DW_DMAC_MASK_ERROR 0x330 -+ -+#define DW_DMAC_CLEAR_XFER 0x338 -+#define DW_DMAC_CLEAR_BLOCK 0x340 -+#define DW_DMAC_CLEAR_ERROR 0x358 -+ -+#define DW_DMAC_STATUS_INT 0x360 -+ -+#define DW_DMAC_CHAN_SAR 0x000 -+#define DW_DMAC_CHAN_DAR 0x008 -+#define DW_DMAC_CHAN_LLP 0x010 -+#define DW_DMAC_CHAN_CTL 0x018 -+#define DW_DMAC_CHAN_SSTAT 0x020 -+#define DW_DMAC_CHAN_DSTAT 0x028 -+#define DW_DMAC_CHAN_SSTATAR 0x030 -+#define DW_DMAC_CHAN_DSTATAR 0x038 -+#define DW_DMAC_CHAN_CFG 0x040 -+#define DW_DMAC_CHAN_SGR 0x048 -+#define DW_DMAC_CHAN_DSR 0x050 -+ -+#endif /* __AVR32_DW_DMAC_H__ */ -diff --git a/arch/avr32/kernel/Makefile b/arch/avr32/kernel/Makefile -index 90e5aff..1aedaeb 100644 ---- a/arch/avr32/kernel/Makefile -+++ b/arch/avr32/kernel/Makefile -@@ -9,10 +9,6 @@ obj-y += syscall_table.o syscall-stubs.o irq.o - obj-y += setup.o traps.o semaphore.o ptrace.o - obj-y += signal.o sys_avr32.o process.o time.o - obj-y += init_task.o switch_to.o cpu.o -+obj-y += dma-controller.o - obj-$(CONFIG_MODULES) += module.o avr32_ksyms.o - obj-$(CONFIG_KPROBES) += kprobes.o -- --USE_STANDARD_AS_RULE := true -- --%.lds: %.lds.c FORCE -- $(call if_changed_dep,cpp_lds_S) -diff --git a/arch/avr32/kernel/dma-controller.c b/arch/avr32/kernel/dma-controller.c -new file mode 100644 -index 0000000..fb654b3 ---- /dev/null -+++ b/arch/avr32/kernel/dma-controller.c -@@ -0,0 +1,34 @@ -+/* -+ * Preliminary DMA controller framework for AVR32 -+ * -+ * Copyright (C) 2005-2006 Atmel Corporation -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 as -+ * published by the Free Software Foundation. -+ */ -+#include <asm/dma-controller.h> -+ -+static LIST_HEAD(controllers); -+ -+int register_dma_controller(struct dma_controller *dmac) -+{ -+ static int next_id; -+ -+ dmac->id = next_id++; -+ list_add_tail(&dmac->list, &controllers); -+ -+ return 0; -+} -+EXPORT_SYMBOL(register_dma_controller); -+ -+struct dma_controller *find_dma_controller(int id) -+{ -+ struct dma_controller *dmac; -+ -+ list_for_each_entry(dmac, &controllers, list) -+ if (dmac->id == id) -+ return dmac; -+ return NULL; -+} -+EXPORT_SYMBOL(find_dma_controller); -diff --git a/arch/avr32/kernel/entry-avr32b.S b/arch/avr32/kernel/entry-avr32b.S -index 42657f1..ccadfd9 100644 ---- a/arch/avr32/kernel/entry-avr32b.S -+++ b/arch/avr32/kernel/entry-avr32b.S -@@ -159,11 +159,18 @@ handle_vmalloc_miss: - - .section .scall.text,"ax",@progbits - system_call: -+#ifdef CONFIG_PREEMPT -+ mask_interrupts -+#endif - pushm r12 /* r12_orig */ - stmts --sp, r0-lr -- zero_fp -+ - mfsr r0, SYSREG_RAR_SUP - mfsr r1, SYSREG_RSR_SUP -+#ifdef CONFIG_PREEMPT -+ unmask_interrupts -+#endif -+ zero_fp - stm --sp, r0-r1 - - /* check for syscall tracing */ -@@ -638,6 +645,13 @@ irq_level\level: - stmts --sp,r0-lr - mfsr r8, rar_int\level - mfsr r9, rsr_int\level -+ -+#ifdef CONFIG_PREEMPT -+ sub r11, pc, (. - system_call) -+ cp.w r11, r8 -+ breq 4f -+#endif -+ - pushm r8-r9 - - mov r11, sp -@@ -668,6 +682,16 @@ irq_level\level: - sub sp, -4 /* ignore r12_orig */ - rete - -+#ifdef CONFIG_PREEMPT -+4: mask_interrupts -+ mfsr r8, rsr_int\level -+ sbr r8, 16 -+ mtsr rsr_int\level, r8 -+ ldmts sp++, r0-lr -+ sub sp, -4 /* ignore r12_orig */ -+ rete -+#endif -+ - 2: get_thread_info r0 - ld.w r1, r0[TI_flags] - bld r1, TIF_CPU_GOING_TO_SLEEP -diff --git a/arch/avr32/kernel/setup.c b/arch/avr32/kernel/setup.c -index d08b0bc..4b4c188 100644 ---- a/arch/avr32/kernel/setup.c -+++ b/arch/avr32/kernel/setup.c -@@ -248,7 +248,7 @@ static int __init early_parse_fbmem(char *p) - - fbmem_size = memparse(p, &p); - if (*p == '@') { -- fbmem_start = memparse(p, &p); -+ fbmem_start = memparse(p + 1, &p); - ret = add_reserved_region(fbmem_start, - fbmem_start + fbmem_size - 1, - "Framebuffer"); -diff --git a/arch/avr32/kernel/vmlinux.lds.S b/arch/avr32/kernel/vmlinux.lds.S -new file mode 100644 -index 0000000..ce9ac96 ---- /dev/null -+++ b/arch/avr32/kernel/vmlinux.lds.S -@@ -0,0 +1,143 @@ -+/* -+ * AVR32 linker script for the Linux kernel -+ * -+ * Copyright (C) 2004-2006 Atmel Corporation -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 as -+ * published by the Free Software Foundation. -+ */ -+#define LOAD_OFFSET 0x00000000 -+#include <asm-generic/vmlinux.lds.h> -+#include <asm/cache.h> -+#include <asm/thread_info.h> -+ -+OUTPUT_FORMAT("elf32-avr32", "elf32-avr32", "elf32-avr32") -+OUTPUT_ARCH(avr32) -+ENTRY(_start) -+ -+/* Big endian */ -+jiffies = jiffies_64 + 4; -+ -+SECTIONS -+{ -+ . = CONFIG_ENTRY_ADDRESS; -+ .init : AT(ADDR(.init) - LOAD_OFFSET) { -+ _stext = .; -+ __init_begin = .; -+ _sinittext = .; -+ *(.text.reset) -+ *(.init.text) -+ /* -+ * .exit.text is discarded at runtime, not -+ * link time, to deal with references from -+ * __bug_table -+ */ -+ *(.exit.text) -+ _einittext = .; -+ . = ALIGN(4); -+ __tagtable_begin = .; -+ *(.taglist.init) -+ __tagtable_end = .; -+ *(.init.data) -+ . = ALIGN(16); -+ __setup_start = .; -+ *(.init.setup) -+ __setup_end = .; -+ . = ALIGN(4); -+ __initcall_start = .; -+ INITCALLS -+ __initcall_end = .; -+ __con_initcall_start = .; -+ *(.con_initcall.init) -+ __con_initcall_end = .; -+ __security_initcall_start = .; -+ *(.security_initcall.init) -+ __security_initcall_end = .; -+#ifdef CONFIG_BLK_DEV_INITRD -+ . = ALIGN(32); -+ __initramfs_start = .; -+ *(.init.ramfs) -+ __initramfs_end = .; -+#endif -+ . = ALIGN(PAGE_SIZE); -+ __init_end = .; -+ } -+ -+ .text : AT(ADDR(.text) - LOAD_OFFSET) { -+ _evba = .; -+ _text = .; -+ *(.ex.text) -+ . = 0x50; -+ *(.tlbx.ex.text) -+ . = 0x60; -+ *(.tlbr.ex.text) -+ . = 0x70; -+ *(.tlbw.ex.text) -+ . = 0x100; -+ *(.scall.text) -+ *(.irq.text) -+ TEXT_TEXT -+ SCHED_TEXT -+ LOCK_TEXT -+ KPROBES_TEXT -+ *(.fixup) -+ *(.gnu.warning) -+ _etext = .; -+ } = 0xd703d703 -+ -+ . = ALIGN(4); -+ __ex_table : AT(ADDR(__ex_table) - LOAD_OFFSET) { -+ __start___ex_table = .; -+ *(__ex_table) -+ __stop___ex_table = .; -+ } -+ -+ BUG_TABLE -+ -+ RODATA -+ -+ . = ALIGN(THREAD_SIZE); -+ -+ .data : AT(ADDR(.data) - LOAD_OFFSET) { -+ _data = .; -+ _sdata = .; -+ /* -+ * First, the init task union, aligned to an 8K boundary. -+ */ -+ *(.data.init_task) -+ -+ /* Then, the cacheline aligned data */ -+ . = ALIGN(L1_CACHE_BYTES); -+ *(.data.cacheline_aligned) -+ -+ /* And the rest... */ -+ *(.data.rel*) -+ DATA_DATA -+ CONSTRUCTORS -+ -+ _edata = .; -+ } -+ -+ -+ . = ALIGN(8); -+ .bss : AT(ADDR(.bss) - LOAD_OFFSET) { -+ __bss_start = .; -+ *(.bss) -+ *(COMMON) -+ . = ALIGN(8); -+ __bss_stop = .; -+ _end = .; -+ } -+ -+ /* When something in the kernel is NOT compiled as a module, the module -+ * cleanup code and data are put into these segments. Both can then be -+ * thrown away, as cleanup code is never called unless it's a module. -+ */ -+ /DISCARD/ : { -+ *(.exit.data) -+ *(.exitcall.exit) -+ } -+ -+ DWARF_DEBUG -+} -diff --git a/arch/avr32/kernel/vmlinux.lds.c b/arch/avr32/kernel/vmlinux.lds.c -deleted file mode 100644 -index db0438f..0000000 ---- a/arch/avr32/kernel/vmlinux.lds.c -+++ /dev/null -@@ -1,142 +0,0 @@ --/* -- * AVR32 linker script for the Linux kernel -- * -- * Copyright (C) 2004-2006 Atmel Corporation -- * -- * This program is free software; you can redistribute it and/or modify -- * it under the terms of the GNU General Public License version 2 as -- * published by the Free Software Foundation. -- */ --#define LOAD_OFFSET 0x00000000 --#include <asm-generic/vmlinux.lds.h> -- --OUTPUT_FORMAT("elf32-avr32", "elf32-avr32", "elf32-avr32") --OUTPUT_ARCH(avr32) --ENTRY(_start) -- --/* Big endian */ --jiffies = jiffies_64 + 4; -- --SECTIONS --{ -- . = CONFIG_ENTRY_ADDRESS; -- .init : AT(ADDR(.init) - LOAD_OFFSET) { -- _stext = .; -- __init_begin = .; -- _sinittext = .; -- *(.text.reset) -- *(.init.text) -- /* -- * .exit.text is discarded at runtime, not -- * link time, to deal with references from -- * __bug_table -- */ -- *(.exit.text) -- _einittext = .; -- . = ALIGN(4); -- __tagtable_begin = .; -- *(.taglist.init) -- __tagtable_end = .; -- *(.init.data) -- . = ALIGN(16); -- __setup_start = .; -- *(.init.setup) -- __setup_end = .; -- . = ALIGN(4); -- __initcall_start = .; -- INITCALLS -- __initcall_end = .; -- __con_initcall_start = .; -- *(.con_initcall.init) -- __con_initcall_end = .; -- __security_initcall_start = .; -- *(.security_initcall.init) -- __security_initcall_end = .; --#ifdef CONFIG_BLK_DEV_INITRD -- . = ALIGN(32); -- __initramfs_start = .; -- *(.init.ramfs) -- __initramfs_end = .; --#endif -- . = ALIGN(4096); -- __init_end = .; -- } -- -- . = ALIGN(8192); -- .text : AT(ADDR(.text) - LOAD_OFFSET) { -- _evba = .; -- _text = .; -- *(.ex.text) -- . = 0x50; -- *(.tlbx.ex.text) -- . = 0x60; -- *(.tlbr.ex.text) -- . = 0x70; -- *(.tlbw.ex.text) -- . = 0x100; -- *(.scall.text) -- *(.irq.text) -- TEXT_TEXT -- SCHED_TEXT -- LOCK_TEXT -- KPROBES_TEXT -- *(.fixup) -- *(.gnu.warning) -- _etext = .; -- } = 0xd703d703 -- -- . = ALIGN(4); -- __ex_table : AT(ADDR(__ex_table) - LOAD_OFFSET) { -- __start___ex_table = .; -- *(__ex_table) -- __stop___ex_table = .; -- } -- -- BUG_TABLE -- -- RODATA -- -- . = ALIGN(8192); -- -- .data : AT(ADDR(.data) - LOAD_OFFSET) { -- _data = .; -- _sdata = .; -- /* -- * First, the init task union, aligned to an 8K boundary. -- */ -- *(.data.init_task) -- -- /* Then, the cacheline aligned data */ -- . = ALIGN(32); -- *(.data.cacheline_aligned) -- -- /* And the rest... */ -- *(.data.rel*) -- DATA_DATA -- CONSTRUCTORS -- -- _edata = .; -- } -- -- -- . = ALIGN(8); -- .bss : AT(ADDR(.bss) - LOAD_OFFSET) { -- __bss_start = .; -- *(.bss) -- *(COMMON) -- . = ALIGN(8); -- __bss_stop = .; -- _end = .; -- } -- -- /* When something in the kernel is NOT compiled as a module, the module -- * cleanup code and data are put into these segments. Both can then be -- * thrown away, as cleanup code is never called unless it's a module. -- */ -- /DISCARD/ : { -- *(.exit.data) -- *(.exitcall.exit) -- } -- -- DWARF_DEBUG --} -diff --git a/arch/avr32/mach-at32ap/Kconfig b/arch/avr32/mach-at32ap/Kconfig -index eb30783..0eb590a 100644 ---- a/arch/avr32/mach-at32ap/Kconfig -+++ b/arch/avr32/mach-at32ap/Kconfig -@@ -3,9 +3,9 @@ if PLATFORM_AT32AP - menu "Atmel AVR32 AP options" - - choice -- prompt "AT32AP7000 static memory bus width" -- depends on CPU_AT32AP7000 -- default AP7000_16_BIT_SMC -+ prompt "AT32AP700x static memory bus width" -+ depends on CPU_AT32AP700X -+ default AP700X_16_BIT_SMC - help - Define the width of the AP7000 external static memory interface. - This is used to determine how to mangle the address and/or data -@@ -15,17 +15,24 @@ choice - width for all chip selects, excluding the flash (which is using - raw access and is thus not affected by any of this.) - --config AP7000_32_BIT_SMC -+config AP700X_32_BIT_SMC - bool "32 bit" - --config AP7000_16_BIT_SMC -+config AP700X_16_BIT_SMC - bool "16 bit" - --config AP7000_8_BIT_SMC -+config AP700X_8_BIT_SMC - bool "8 bit" - - endchoice - -+config GPIO_DEV -+ bool "GPIO /dev interface" -+ select CONFIGFS_FS -+ default n -+ help -+ Say `Y' to enable a /dev interface to the GPIO pins. -+ - endmenu - - endif # PLATFORM_AT32AP -diff --git a/arch/avr32/mach-at32ap/Makefile b/arch/avr32/mach-at32ap/Makefile -index a8b4450..0f6162e 100644 ---- a/arch/avr32/mach-at32ap/Makefile -+++ b/arch/avr32/mach-at32ap/Makefile -@@ -1,4 +1,5 @@ - obj-y += at32ap.o clock.o intc.o extint.o pio.o hsmc.o --obj-$(CONFIG_CPU_AT32AP7000) += at32ap7000.o --obj-$(CONFIG_CPU_AT32AP7000) += time-tc.o -+obj-$(CONFIG_CPU_AT32AP700X) += at32ap700x.o -+obj-$(CONFIG_CPU_AT32AP700X) += time-tc.o - obj-$(CONFIG_CPU_FREQ_AT32AP) += cpufreq.o -+obj-$(CONFIG_GPIO_DEV) += gpio-dev.o -diff --git a/arch/avr32/mach-at32ap/at32ap7000.c b/arch/avr32/mach-at32ap/at32ap7000.c -deleted file mode 100644 -index 64cc558..0000000 ---- a/arch/avr32/mach-at32ap/at32ap7000.c -+++ /dev/null -@@ -1,1324 +0,0 @@ --/* -- * Copyright (C) 2005-2006 Atmel Corporation -- * -- * This program is free software; you can redistribute it and/or modify -- * it under the terms of the GNU General Public License version 2 as -- * published by the Free Software Foundation. -- */ --#include <linux/clk.h> --#include <linux/fb.h> --#include <linux/init.h> --#include <linux/platform_device.h> --#include <linux/dma-mapping.h> --#include <linux/spi/spi.h> -- --#include <asm/io.h> -- --#include <asm/arch/at32ap7000.h> --#include <asm/arch/board.h> --#include <asm/arch/portmux.h> -- --#include <video/atmel_lcdc.h> -- --#include "clock.h" --#include "hmatrix.h" --#include "pio.h" --#include "pm.h" -- --/* -- * We can reduce the code size a bit by using a constant here. Since -- * this file is completely chip-specific, it's safe to not use -- * ioremap. Generic drivers should of course never do this. -- */ --#define AT32_PM_BASE 0xfff00000 -- --#define PBMEM(base) \ -- { \ -- .start = base, \ -- .end = base + 0x3ff, \ -- .flags = IORESOURCE_MEM, \ -- } --#define IRQ(num) \ -- { \ -- .start = num, \ -- .end = num, \ -- .flags = IORESOURCE_IRQ, \ -- } --#define NAMED_IRQ(num, _name) \ -- { \ -- .start = num, \ -- .end = num, \ -- .name = _name, \ -- .flags = IORESOURCE_IRQ, \ -- } -- --/* REVISIT these assume *every* device supports DMA, but several -- * don't ... tc, smc, pio, rtc, watchdog, pwm, ps2, and more. -- */ --#define DEFINE_DEV(_name, _id) \ --static u64 _name##_id##_dma_mask = DMA_32BIT_MASK; \ --static struct platform_device _name##_id##_device = { \ -- .name = #_name, \ -- .id = _id, \ -- .dev = { \ -- .dma_mask = &_name##_id##_dma_mask, \ -- .coherent_dma_mask = DMA_32BIT_MASK, \ -- }, \ -- .resource = _name##_id##_resource, \ -- .num_resources = ARRAY_SIZE(_name##_id##_resource), \ --} --#define DEFINE_DEV_DATA(_name, _id) \ --static u64 _name##_id##_dma_mask = DMA_32BIT_MASK; \ --static struct platform_device _name##_id##_device = { \ -- .name = #_name, \ -- .id = _id, \ -- .dev = { \ -- .dma_mask = &_name##_id##_dma_mask, \ -- .platform_data = &_name##_id##_data, \ -- .coherent_dma_mask = DMA_32BIT_MASK, \ -- }, \ -- .resource = _name##_id##_resource, \ -- .num_resources = ARRAY_SIZE(_name##_id##_resource), \ --} -- --#define select_peripheral(pin, periph, flags) \ -- at32_select_periph(GPIO_PIN_##pin, GPIO_##periph, flags) -- --#define DEV_CLK(_name, devname, bus, _index) \ --static struct clk devname##_##_name = { \ -- .name = #_name, \ -- .dev = &devname##_device.dev, \ -- .parent = &bus##_clk, \ -- .mode = bus##_clk_mode, \ -- .get_rate = bus##_clk_get_rate, \ -- .index = _index, \ --} -- --static DEFINE_SPINLOCK(pm_lock); -- --unsigned long at32ap7000_osc_rates[3] = { -- [0] = 32768, -- /* FIXME: these are ATSTK1002-specific */ -- [1] = 20000000, -- [2] = 12000000, --}; -- --static unsigned long osc_get_rate(struct clk *clk) --{ -- return at32ap7000_osc_rates[clk->index]; --} -- --static unsigned long pll_get_rate(struct clk *clk, unsigned long control) --{ -- unsigned long div, mul, rate; -- -- if (!(control & PM_BIT(PLLEN))) -- return 0; -- -- div = PM_BFEXT(PLLDIV, control) + 1; -- mul = PM_BFEXT(PLLMUL, control) + 1; -- -- rate = clk->parent->get_rate(clk->parent); -- rate = (rate + div / 2) / div; -- rate *= mul; -- -- return rate; --} -- --static unsigned long pll0_get_rate(struct clk *clk) --{ -- u32 control; -- -- control = pm_readl(PLL0); -- -- return pll_get_rate(clk, control); --} -- --static unsigned long pll1_get_rate(struct clk *clk) --{ -- u32 control; -- -- control = pm_readl(PLL1); -- -- return pll_get_rate(clk, control); --} -- --/* -- * The AT32AP7000 has five primary clock sources: One 32kHz -- * oscillator, two crystal oscillators and two PLLs. -- */ --static struct clk osc32k = { -- .name = "osc32k", -- .get_rate = osc_get_rate, -- .users = 1, -- .index = 0, --}; --static struct clk osc0 = { -- .name = "osc0", -- .get_rate = osc_get_rate, -- .users = 1, -- .index = 1, --}; --static struct clk osc1 = { -- .name = "osc1", -- .get_rate = osc_get_rate, -- .index = 2, --}; --static struct clk pll0 = { -- .name = "pll0", -- .get_rate = pll0_get_rate, -- .parent = &osc0, --}; --static struct clk pll1 = { -- .name = "pll1", -- .get_rate = pll1_get_rate, -- .parent = &osc0, --}; -- --/* -- * The main clock can be either osc0 or pll0. The boot loader may -- * have chosen one for us, so we don't really know which one until we -- * have a look at the SM. -- */ --static struct clk *main_clock; -- --/* -- * Synchronous clocks are generated from the main clock. The clocks -- * must satisfy the constraint -- * fCPU >= fHSB >= fPB -- * i.e. each clock must not be faster than its parent. -- */ --static unsigned long bus_clk_get_rate(struct clk *clk, unsigned int shift) --{ -- return main_clock->get_rate(main_clock) >> shift; --}; -- --static void cpu_clk_mode(struct clk *clk, int enabled) --{ -- unsigned long flags; -- u32 mask; -- -- spin_lock_irqsave(&pm_lock, flags); -- mask = pm_readl(CPU_MASK); -- if (enabled) -- mask |= 1 << clk->index; -- else -- mask &= ~(1 << clk->index); -- pm_writel(CPU_MASK, mask); -- spin_unlock_irqrestore(&pm_lock, flags); --} -- --static unsigned long cpu_clk_get_rate(struct clk *clk) --{ -- unsigned long cksel, shift = 0; -- -- cksel = pm_readl(CKSEL); -- if (cksel & PM_BIT(CPUDIV)) -- shift = PM_BFEXT(CPUSEL, cksel) + 1; -- -- return bus_clk_get_rate(clk, shift); --} -- --static long cpu_clk_set_rate(struct clk *clk, unsigned long rate, int apply) --{ -- u32 control; -- unsigned long parent_rate, child_div, actual_rate, div; -- -- parent_rate = clk->parent->get_rate(clk->parent); -- control = pm_readl(CKSEL); -- -- if (control & PM_BIT(HSBDIV)) -- child_div = 1 << (PM_BFEXT(HSBSEL, control) + 1); -- else -- child_div = 1; -- -- if (rate > 3 * (parent_rate / 4) || child_div == 1) { -- actual_rate = parent_rate; -- control &= ~PM_BIT(CPUDIV); -- } else { -- unsigned int cpusel; -- div = (parent_rate + rate / 2) / rate; -- if (div > child_div) -- div = child_div; -- cpusel = (div > 1) ? (fls(div) - 2) : 0; -- control = PM_BIT(CPUDIV) | PM_BFINS(CPUSEL, cpusel, control); -- actual_rate = parent_rate / (1 << (cpusel + 1)); -- } -- -- pr_debug("clk %s: new rate %lu (actual rate %lu)\n", -- clk->name, rate, actual_rate); -- -- if (apply) -- pm_writel(CKSEL, control); -- -- return actual_rate; --} -- --static void hsb_clk_mode(struct clk *clk, int enabled) --{ -- unsigned long flags; -- u32 mask; -- -- spin_lock_irqsave(&pm_lock, flags); -- mask = pm_readl(HSB_MASK); -- if (enabled) -- mask |= 1 << clk->index; -- else -- mask &= ~(1 << clk->index); -- pm_writel(HSB_MASK, mask); -- spin_unlock_irqrestore(&pm_lock, flags); --} -- --static unsigned long hsb_clk_get_rate(struct clk *clk) --{ -- unsigned long cksel, shift = 0; -- -- cksel = pm_readl(CKSEL); -- if (cksel & PM_BIT(HSBDIV)) -- shift = PM_BFEXT(HSBSEL, cksel) + 1; -- -- return bus_clk_get_rate(clk, shift); --} -- --static void pba_clk_mode(struct clk *clk, int enabled) --{ -- unsigned long flags; -- u32 mask; -- -- spin_lock_irqsave(&pm_lock, flags); -- mask = pm_readl(PBA_MASK); -- if (enabled) -- mask |= 1 << clk->index; -- else -- mask &= ~(1 << clk->index); -- pm_writel(PBA_MASK, mask); -- spin_unlock_irqrestore(&pm_lock, flags); --} -- --static unsigned long pba_clk_get_rate(struct clk *clk) --{ -- unsigned long cksel, shift = 0; -- -- cksel = pm_readl(CKSEL); -- if (cksel & PM_BIT(PBADIV)) -- shift = PM_BFEXT(PBASEL, cksel) + 1; -- -- return bus_clk_get_rate(clk, shift); --} -- --static void pbb_clk_mode(struct clk *clk, int enabled) --{ -- unsigned long flags; -- u32 mask; -- -- spin_lock_irqsave(&pm_lock, flags); -- mask = pm_readl(PBB_MASK); -- if (enabled) -- mask |= 1 << clk->index; -- else -- mask &= ~(1 << clk->index); -- pm_writel(PBB_MASK, mask); -- spin_unlock_irqrestore(&pm_lock, flags); --} -- --static unsigned long pbb_clk_get_rate(struct clk *clk) --{ -- unsigned long cksel, shift = 0; -- -- cksel = pm_readl(CKSEL); -- if (cksel & PM_BIT(PBBDIV)) -- shift = PM_BFEXT(PBBSEL, cksel) + 1; -- -- return bus_clk_get_rate(clk, shift); --} -- --static struct clk cpu_clk = { -- .name = "cpu", -- .get_rate = cpu_clk_get_rate, -- .set_rate = cpu_clk_set_rate, -- .users = 1, --}; --static struct clk hsb_clk = { -- .name = "hsb", -- .parent = &cpu_clk, -- .get_rate = hsb_clk_get_rate, --}; --static struct clk pba_clk = { -- .name = "pba", -- .parent = &hsb_clk, -- .mode = hsb_clk_mode, -- .get_rate = pba_clk_get_rate, -- .index = 1, --}; --static struct clk pbb_clk = { -- .name = "pbb", -- .parent = &hsb_clk, -- .mode = hsb_clk_mode, -- .get_rate = pbb_clk_get_rate, -- .users = 1, -- .index = 2, --}; -- --/* -------------------------------------------------------------------- -- * Generic Clock operations -- * -------------------------------------------------------------------- */ -- --static void genclk_mode(struct clk *clk, int enabled) --{ -- u32 control; -- -- control = pm_readl(GCCTRL(clk->index)); -- if (enabled) -- control |= PM_BIT(CEN); -- else -- control &= ~PM_BIT(CEN); -- pm_writel(GCCTRL(clk->index), control); --} -- --static unsigned long genclk_get_rate(struct clk *clk) --{ -- u32 control; -- unsigned long div = 1; -- -- control = pm_readl(GCCTRL(clk->index)); -- if (control & PM_BIT(DIVEN)) -- div = 2 * (PM_BFEXT(DIV, control) + 1); -- -- return clk->parent->get_rate(clk->parent) / div; --} -- --static long genclk_set_rate(struct clk *clk, unsigned long rate, int apply) --{ -- u32 control; -- unsigned long parent_rate, actual_rate, div; -- -- parent_rate = clk->parent->get_rate(clk->parent); -- control = pm_readl(GCCTRL(clk->index)); -- -- if (rate > 3 * parent_rate / 4) { -- actual_rate = parent_rate; -- control &= ~PM_BIT(DIVEN); -- } else { -- div = (parent_rate + rate) / (2 * rate) - 1; -- control = PM_BFINS(DIV, div, control) | PM_BIT(DIVEN); -- actual_rate = parent_rate / (2 * (div + 1)); -- } -- -- dev_dbg(clk->dev, "clk %s: new rate %lu (actual rate %lu)\n", -- clk->name, rate, actual_rate); -- -- if (apply) -- pm_writel(GCCTRL(clk->index), control); -- -- return actual_rate; --} -- --int genclk_set_parent(struct clk *clk, struct clk *parent) --{ -- u32 control; -- -- dev_dbg(clk->dev, "clk %s: new parent %s (was %s)\n", -- clk->name, parent->name, clk->parent->name); -- -- control = pm_readl(GCCTRL(clk->index)); -- -- if (parent == &osc1 || parent == &pll1) -- control |= PM_BIT(OSCSEL); -- else if (parent == &osc0 || parent == &pll0) -- control &= ~PM_BIT(OSCSEL); -- else -- return -EINVAL; -- -- if (parent == &pll0 || parent == &pll1) -- control |= PM_BIT(PLLSEL); -- else -- control &= ~PM_BIT(PLLSEL); -- -- pm_writel(GCCTRL(clk->index), control); -- clk->parent = parent; -- -- return 0; --} -- --static void __init genclk_init_parent(struct clk *clk) --{ -- u32 control; -- struct clk *parent; -- -- BUG_ON(clk->index > 7); -- -- control = pm_readl(GCCTRL(clk->index)); -- if (control & PM_BIT(OSCSEL)) -- parent = (control & PM_BIT(PLLSEL)) ? &pll1 : &osc1; -- else -- parent = (control & PM_BIT(PLLSEL)) ? &pll0 : &osc0; -- -- clk->parent = parent; --} -- --/* -------------------------------------------------------------------- -- * System peripherals -- * -------------------------------------------------------------------- */ --static struct resource at32_pm0_resource[] = { -- { -- .start = 0xfff00000, -- .end = 0xfff0007f, -- .flags = IORESOURCE_MEM, -- }, -- IRQ(20), --}; -- --static struct resource at32ap700x_rtc0_resource[] = { -- { -- .start = 0xfff00080, -- .end = 0xfff000af, -- .flags = IORESOURCE_MEM, -- }, -- IRQ(21), --}; -- --static struct resource at32_wdt0_resource[] = { -- { -- .start = 0xfff000b0, -- .end = 0xfff000bf, -- .flags = IORESOURCE_MEM, -- }, --}; -- --static struct resource at32_eic0_resource[] = { -- { -- .start = 0xfff00100, -- .end = 0xfff0013f, -- .flags = IORESOURCE_MEM, -- }, -- IRQ(19), --}; -- --DEFINE_DEV(at32_pm, 0); --DEFINE_DEV(at32ap700x_rtc, 0); --DEFINE_DEV(at32_wdt, 0); --DEFINE_DEV(at32_eic, 0); -- --/* -- * Peripheral clock for PM, RTC, WDT and EIC. PM will ensure that this -- * is always running. -- */ --static struct clk at32_pm_pclk = { -- .name = "pclk", -- .dev = &at32_pm0_device.dev, -- .parent = &pbb_clk, -- .mode = pbb_clk_mode, -- .get_rate = pbb_clk_get_rate, -- .users = 1, -- .index = 0, --}; -- --static struct resource intc0_resource[] = { -- PBMEM(0xfff00400), --}; --struct platform_device at32_intc0_device = { -- .name = "intc", -- .id = 0, -- .resource = intc0_resource, -- .num_resources = ARRAY_SIZE(intc0_resource), --}; --DEV_CLK(pclk, at32_intc0, pbb, 1); -- --static struct clk ebi_clk = { -- .name = "ebi", -- .parent = &hsb_clk, -- .mode = hsb_clk_mode, -- .get_rate = hsb_clk_get_rate, -- .users = 1, --}; --static struct clk hramc_clk = { -- .name = "hramc", -- .parent = &hsb_clk, -- .mode = hsb_clk_mode, -- .get_rate = hsb_clk_get_rate, -- .users = 1, -- .index = 3, --}; -- --static struct resource smc0_resource[] = { -- PBMEM(0xfff03400), --}; --DEFINE_DEV(smc, 0); --DEV_CLK(pclk, smc0, pbb, 13); --DEV_CLK(mck, smc0, hsb, 0); -- --static struct platform_device pdc_device = { -- .name = "pdc", -- .id = 0, --}; --DEV_CLK(hclk, pdc, hsb, 4); --DEV_CLK(pclk, pdc, pba, 16); -- --static struct clk pico_clk = { -- .name = "pico", -- .parent = &cpu_clk, -- .mode = cpu_clk_mode, -- .get_rate = cpu_clk_get_rate, -- .users = 1, --}; -- --/* -------------------------------------------------------------------- -- * HMATRIX -- * -------------------------------------------------------------------- */ -- --static struct clk hmatrix_clk = { -- .name = "hmatrix_clk", -- .parent = &pbb_clk, -- .mode = pbb_clk_mode, -- .get_rate = pbb_clk_get_rate, -- .index = 2, -- .users = 1, --}; --#define HMATRIX_BASE ((void __iomem *)0xfff00800) -- --#define hmatrix_readl(reg) \ -- __raw_readl((HMATRIX_BASE) + HMATRIX_##reg) --#define hmatrix_writel(reg,value) \ -- __raw_writel((value), (HMATRIX_BASE) + HMATRIX_##reg) -- --/* -- * Set bits in the HMATRIX Special Function Register (SFR) used by the -- * External Bus Interface (EBI). This can be used to enable special -- * features like CompactFlash support, NAND Flash support, etc. on -- * certain chipselects. -- */ --static inline void set_ebi_sfr_bits(u32 mask) --{ -- u32 sfr; -- -- clk_enable(&hmatrix_clk); -- sfr = hmatrix_readl(SFR4); -- sfr |= mask; -- hmatrix_writel(SFR4, sfr); -- clk_disable(&hmatrix_clk); --} -- --/* -------------------------------------------------------------------- -- * System Timer/Counter (TC) -- * -------------------------------------------------------------------- */ --static struct resource at32_systc0_resource[] = { -- PBMEM(0xfff00c00), -- IRQ(22), --}; --struct platform_device at32_systc0_device = { -- .name = "systc", -- .id = 0, -- .resource = at32_systc0_resource, -- .num_resources = ARRAY_SIZE(at32_systc0_resource), --}; --DEV_CLK(pclk, at32_systc0, pbb, 3); -- --/* -------------------------------------------------------------------- -- * PIO -- * -------------------------------------------------------------------- */ -- --static struct resource pio0_resource[] = { -- PBMEM(0xffe02800), -- IRQ(13), --}; --DEFINE_DEV(pio, 0); --DEV_CLK(mck, pio0, pba, 10); -- --static struct resource pio1_resource[] = { -- PBMEM(0xffe02c00), -- IRQ(14), --}; --DEFINE_DEV(pio, 1); --DEV_CLK(mck, pio1, pba, 11); -- --static struct resource pio2_resource[] = { -- PBMEM(0xffe03000), -- IRQ(15), --}; --DEFINE_DEV(pio, 2); --DEV_CLK(mck, pio2, pba, 12); -- --static struct resource pio3_resource[] = { -- PBMEM(0xffe03400), -- IRQ(16), --}; --DEFINE_DEV(pio, 3); --DEV_CLK(mck, pio3, pba, 13); -- --static struct resource pio4_resource[] = { -- PBMEM(0xffe03800), -- IRQ(17), --}; --DEFINE_DEV(pio, 4); --DEV_CLK(mck, pio4, pba, 14); -- --void __init at32_add_system_devices(void) --{ -- platform_device_register(&at32_pm0_device); -- platform_device_register(&at32_intc0_device); -- platform_device_register(&at32ap700x_rtc0_device); -- platform_device_register(&at32_wdt0_device); -- platform_device_register(&at32_eic0_device); -- platform_device_register(&smc0_device); -- platform_device_register(&pdc_device); -- -- platform_device_register(&at32_systc0_device); -- -- platform_device_register(&pio0_device); -- platform_device_register(&pio1_device); -- platform_device_register(&pio2_device); -- platform_device_register(&pio3_device); -- platform_device_register(&pio4_device); --} -- --/* -------------------------------------------------------------------- -- * USART -- * -------------------------------------------------------------------- */ -- --static struct atmel_uart_data atmel_usart0_data = { -- .use_dma_tx = 1, -- .use_dma_rx = 1, --}; --static struct resource atmel_usart0_resource[] = { -- PBMEM(0xffe00c00), -- IRQ(6), --}; --DEFINE_DEV_DATA(atmel_usart, 0); --DEV_CLK(usart, atmel_usart0, pba, 4); -- --static struct atmel_uart_data atmel_usart1_data = { -- .use_dma_tx = 1, -- .use_dma_rx = 1, --}; --static struct resource atmel_usart1_resource[] = { -- PBMEM(0xffe01000), -- IRQ(7), --}; --DEFINE_DEV_DATA(atmel_usart, 1); --DEV_CLK(usart, atmel_usart1, pba, 4); -- --static struct atmel_uart_data atmel_usart2_data = { -- .use_dma_tx = 1, -- .use_dma_rx = 1, --}; --static struct resource atmel_usart2_resource[] = { -- PBMEM(0xffe01400), -- IRQ(8), --}; --DEFINE_DEV_DATA(atmel_usart, 2); --DEV_CLK(usart, atmel_usart2, pba, 5); -- --static struct atmel_uart_data atmel_usart3_data = { -- .use_dma_tx = 1, -- .use_dma_rx = 1, --}; --static struct resource atmel_usart3_resource[] = { -- PBMEM(0xffe01800), -- IRQ(9), --}; --DEFINE_DEV_DATA(atmel_usart, 3); --DEV_CLK(usart, atmel_usart3, pba, 6); -- --static inline void configure_usart0_pins(void) --{ -- select_peripheral(PA(8), PERIPH_B, 0); /* RXD */ -- select_peripheral(PA(9), PERIPH_B, 0); /* TXD */ --} -- --static inline void configure_usart1_pins(void) --{ -- select_peripheral(PA(17), PERIPH_A, 0); /* RXD */ -- select_peripheral(PA(18), PERIPH_A, 0); /* TXD */ --} -- --static inline void configure_usart2_pins(void) --{ -- select_peripheral(PB(26), PERIPH_B, 0); /* RXD */ -- select_peripheral(PB(27), PERIPH_B, 0); /* TXD */ --} -- --static inline void configure_usart3_pins(void) --{ -- select_peripheral(PB(18), PERIPH_B, 0); /* RXD */ -- select_peripheral(PB(17), PERIPH_B, 0); /* TXD */ --} -- --static struct platform_device *__initdata at32_usarts[4]; -- --void __init at32_map_usart(unsigned int hw_id, unsigned int line) --{ -- struct platform_device *pdev; -- -- switch (hw_id) { -- case 0: -- pdev = &atmel_usart0_device; -- configure_usart0_pins(); -- break; -- case 1: -- pdev = &atmel_usart1_device; -- configure_usart1_pins(); -- break; -- case 2: -- pdev = &atmel_usart2_device; -- configure_usart2_pins(); -- break; -- case 3: -- pdev = &atmel_usart3_device; -- configure_usart3_pins(); -- break; -- default: -- return; -- } -- -- if (PXSEG(pdev->resource[0].start) == P4SEG) { -- /* Addresses in the P4 segment are permanently mapped 1:1 */ -- struct atmel_uart_data *data = pdev->dev.platform_data; -- data->regs = (void __iomem *)pdev->resource[0].start; -- } -- -- pdev->id = line; -- at32_usarts[line] = pdev; --} -- --struct platform_device *__init at32_add_device_usart(unsigned int id) --{ -- platform_device_register(at32_usarts[id]); -- return at32_usarts[id]; --} -- --struct platform_device *atmel_default_console_device; -- --void __init at32_setup_serial_console(unsigned int usart_id) --{ -- atmel_default_console_device = at32_usarts[usart_id]; --} -- --/* -------------------------------------------------------------------- -- * Ethernet -- * -------------------------------------------------------------------- */ -- --static struct eth_platform_data macb0_data; --static struct resource macb0_resource[] = { -- PBMEM(0xfff01800), -- IRQ(25), --}; --DEFINE_DEV_DATA(macb, 0); --DEV_CLK(hclk, macb0, hsb, 8); --DEV_CLK(pclk, macb0, pbb, 6); -- --static struct eth_platform_data macb1_data; --static struct resource macb1_resource[] = { -- PBMEM(0xfff01c00), -- IRQ(26), --}; --DEFINE_DEV_DATA(macb, 1); --DEV_CLK(hclk, macb1, hsb, 9); --DEV_CLK(pclk, macb1, pbb, 7); -- --struct platform_device *__init --at32_add_device_eth(unsigned int id, struct eth_platform_data *data) --{ -- struct platform_device *pdev; -- -- switch (id) { -- case 0: -- pdev = &macb0_device; -- -- select_peripheral(PC(3), PERIPH_A, 0); /* TXD0 */ -- select_peripheral(PC(4), PERIPH_A, 0); /* TXD1 */ -- select_peripheral(PC(7), PERIPH_A, 0); /* TXEN */ -- select_peripheral(PC(8), PERIPH_A, 0); /* TXCK */ -- select_peripheral(PC(9), PERIPH_A, 0); /* RXD0 */ -- select_peripheral(PC(10), PERIPH_A, 0); /* RXD1 */ -- select_peripheral(PC(13), PERIPH_A, 0); /* RXER */ -- select_peripheral(PC(15), PERIPH_A, 0); /* RXDV */ -- select_peripheral(PC(16), PERIPH_A, 0); /* MDC */ -- select_peripheral(PC(17), PERIPH_A, 0); /* MDIO */ -- -- if (!data->is_rmii) { -- select_peripheral(PC(0), PERIPH_A, 0); /* COL */ -- select_peripheral(PC(1), PERIPH_A, 0); /* CRS */ -- select_peripheral(PC(2), PERIPH_A, 0); /* TXER */ -- select_peripheral(PC(5), PERIPH_A, 0); /* TXD2 */ -- select_peripheral(PC(6), PERIPH_A, 0); /* TXD3 */ -- select_peripheral(PC(11), PERIPH_A, 0); /* RXD2 */ -- select_peripheral(PC(12), PERIPH_A, 0); /* RXD3 */ -- select_peripheral(PC(14), PERIPH_A, 0); /* RXCK */ -- select_peripheral(PC(18), PERIPH_A, 0); /* SPD */ -- } -- break; -- -- case 1: -- pdev = &macb1_device; -- -- select_peripheral(PD(13), PERIPH_B, 0); /* TXD0 */ -- select_peripheral(PD(14), PERIPH_B, 0); /* TXD1 */ -- select_peripheral(PD(11), PERIPH_B, 0); /* TXEN */ -- select_peripheral(PD(12), PERIPH_B, 0); /* TXCK */ -- select_peripheral(PD(10), PERIPH_B, 0); /* RXD0 */ -- select_peripheral(PD(6), PERIPH_B, 0); /* RXD1 */ -- select_peripheral(PD(5), PERIPH_B, 0); /* RXER */ -- select_peripheral(PD(4), PERIPH_B, 0); /* RXDV */ -- select_peripheral(PD(3), PERIPH_B, 0); /* MDC */ -- select_peripheral(PD(2), PERIPH_B, 0); /* MDIO */ -- -- if (!data->is_rmii) { -- select_peripheral(PC(19), PERIPH_B, 0); /* COL */ -- select_peripheral(PC(23), PERIPH_B, 0); /* CRS */ -- select_peripheral(PC(26), PERIPH_B, 0); /* TXER */ -- select_peripheral(PC(27), PERIPH_B, 0); /* TXD2 */ -- select_peripheral(PC(28), PERIPH_B, 0); /* TXD3 */ -- select_peripheral(PC(29), PERIPH_B, 0); /* RXD2 */ -- select_peripheral(PC(30), PERIPH_B, 0); /* RXD3 */ -- select_peripheral(PC(24), PERIPH_B, 0); /* RXCK */ -- select_peripheral(PD(15), PERIPH_B, 0); /* SPD */ -- } -- break; -- -- default: -- return NULL; -- } -- -- memcpy(pdev->dev.platform_data, data, sizeof(struct eth_platform_data)); -- platform_device_register(pdev); -- -- return pdev; --} -- --/* -------------------------------------------------------------------- -- * SPI -- * -------------------------------------------------------------------- */ --static struct resource atmel_spi0_resource[] = { -- PBMEM(0xffe00000), -- IRQ(3), --}; --DEFINE_DEV(atmel_spi, 0); --DEV_CLK(spi_clk, atmel_spi0, pba, 0); -- --static struct resource atmel_spi1_resource[] = { -- PBMEM(0xffe00400), -- IRQ(4), --}; --DEFINE_DEV(atmel_spi, 1); --DEV_CLK(spi_clk, atmel_spi1, pba, 1); -- --static void __init --at32_spi_setup_slaves(unsigned int bus_num, struct spi_board_info *b, -- unsigned int n, const u8 *pins) --{ -- unsigned int pin, mode; -- -- for (; n; n--, b++) { -- b->bus_num = bus_num; -- if (b->chip_select >= 4) -- continue; -- pin = (unsigned)b->controller_data; -- if (!pin) { -- pin = pins[b->chip_select]; -- b->controller_data = (void *)pin; -- } -- mode = AT32_GPIOF_OUTPUT; -- if (!(b->mode & SPI_CS_HIGH)) -- mode |= AT32_GPIOF_HIGH; -- at32_select_gpio(pin, mode); -- } --} -- --struct platform_device *__init --at32_add_device_spi(unsigned int id, struct spi_board_info *b, unsigned int n) --{ -- /* -- * Manage the chipselects as GPIOs, normally using the same pins -- * the SPI controller expects; but boards can use other pins. -- */ -- static u8 __initdata spi0_pins[] = -- { GPIO_PIN_PA(3), GPIO_PIN_PA(4), -- GPIO_PIN_PA(5), GPIO_PIN_PA(20), }; -- static u8 __initdata spi1_pins[] = -- { GPIO_PIN_PB(2), GPIO_PIN_PB(3), -- GPIO_PIN_PB(4), GPIO_PIN_PA(27), }; -- struct platform_device *pdev; -- -- switch (id) { -- case 0: -- pdev = &atmel_spi0_device; -- select_peripheral(PA(0), PERIPH_A, 0); /* MISO */ -- select_peripheral(PA(1), PERIPH_A, 0); /* MOSI */ -- select_peripheral(PA(2), PERIPH_A, 0); /* SCK */ -- at32_spi_setup_slaves(0, b, n, spi0_pins); -- break; -- -- case 1: -- pdev = &atmel_spi1_device; -- select_peripheral(PB(0), PERIPH_B, 0); /* MISO */ -- select_peripheral(PB(1), PERIPH_B, 0); /* MOSI */ -- select_peripheral(PB(5), PERIPH_B, 0); /* SCK */ -- at32_spi_setup_slaves(1, b, n, spi1_pins); -- break; -- -- default: -- return NULL; -- } -- -- spi_register_board_info(b, n); -- platform_device_register(pdev); -- return pdev; --} -- --/* -------------------------------------------------------------------- -- * LCDC -- * -------------------------------------------------------------------- */ --static struct atmel_lcdfb_info atmel_lcdfb0_data; --static struct resource atmel_lcdfb0_resource[] = { -- { -- .start = 0xff000000, -- .end = 0xff000fff, -- .flags = IORESOURCE_MEM, -- }, -- IRQ(1), -- { -- /* Placeholder for pre-allocated fb memory */ -- .start = 0x00000000, -- .end = 0x00000000, -- .flags = 0, -- }, --}; --DEFINE_DEV_DATA(atmel_lcdfb, 0); --DEV_CLK(hck1, atmel_lcdfb0, hsb, 7); --static struct clk atmel_lcdfb0_pixclk = { -- .name = "lcdc_clk", -- .dev = &atmel_lcdfb0_device.dev, -- .mode = genclk_mode, -- .get_rate = genclk_get_rate, -- .set_rate = genclk_set_rate, -- .set_parent = genclk_set_parent, -- .index = 7, --}; -- --struct platform_device *__init --at32_add_device_lcdc(unsigned int id, struct atmel_lcdfb_info *data, -- unsigned long fbmem_start, unsigned long fbmem_len) --{ -- struct platform_device *pdev; -- struct atmel_lcdfb_info *info; -- struct fb_monspecs *monspecs; -- struct fb_videomode *modedb; -- unsigned int modedb_size; -- -- /* -- * Do a deep copy of the fb data, monspecs and modedb. Make -- * sure all allocations are done before setting up the -- * portmux. -- */ -- monspecs = kmemdup(data->default_monspecs, -- sizeof(struct fb_monspecs), GFP_KERNEL); -- if (!monspecs) -- return NULL; -- -- modedb_size = sizeof(struct fb_videomode) * monspecs->modedb_len; -- modedb = kmemdup(monspecs->modedb, modedb_size, GFP_KERNEL); -- if (!modedb) -- goto err_dup_modedb; -- monspecs->modedb = modedb; -- -- switch (id) { -- case 0: -- pdev = &atmel_lcdfb0_device; -- select_peripheral(PC(19), PERIPH_A, 0); /* CC */ -- select_peripheral(PC(20), PERIPH_A, 0); /* HSYNC */ -- select_peripheral(PC(21), PERIPH_A, 0); /* PCLK */ -- select_peripheral(PC(22), PERIPH_A, 0); /* VSYNC */ -- select_peripheral(PC(23), PERIPH_A, 0); /* DVAL */ -- select_peripheral(PC(24), PERIPH_A, 0); /* MODE */ -- select_peripheral(PC(25), PERIPH_A, 0); /* PWR */ -- select_peripheral(PC(26), PERIPH_A, 0); /* DATA0 */ -- select_peripheral(PC(27), PERIPH_A, 0); /* DATA1 */ -- select_peripheral(PC(28), PERIPH_A, 0); /* DATA2 */ -- select_peripheral(PC(29), PERIPH_A, 0); /* DATA3 */ -- select_peripheral(PC(30), PERIPH_A, 0); /* DATA4 */ -- select_peripheral(PC(31), PERIPH_A, 0); /* DATA5 */ -- select_peripheral(PD(0), PERIPH_A, 0); /* DATA6 */ -- select_peripheral(PD(1), PERIPH_A, 0); /* DATA7 */ -- select_peripheral(PD(2), PERIPH_A, 0); /* DATA8 */ -- select_peripheral(PD(3), PERIPH_A, 0); /* DATA9 */ -- select_peripheral(PD(4), PERIPH_A, 0); /* DATA10 */ -- select_peripheral(PD(5), PERIPH_A, 0); /* DATA11 */ -- select_peripheral(PD(6), PERIPH_A, 0); /* DATA12 */ -- select_peripheral(PD(7), PERIPH_A, 0); /* DATA13 */ -- select_peripheral(PD(8), PERIPH_A, 0); /* DATA14 */ -- select_peripheral(PD(9), PERIPH_A, 0); /* DATA15 */ -- select_peripheral(PD(10), PERIPH_A, 0); /* DATA16 */ -- select_peripheral(PD(11), PERIPH_A, 0); /* DATA17 */ -- select_peripheral(PD(12), PERIPH_A, 0); /* DATA18 */ -- select_peripheral(PD(13), PERIPH_A, 0); /* DATA19 */ -- select_peripheral(PD(14), PERIPH_A, 0); /* DATA20 */ -- select_peripheral(PD(15), PERIPH_A, 0); /* DATA21 */ -- select_peripheral(PD(16), PERIPH_A, 0); /* DATA22 */ -- select_peripheral(PD(17), PERIPH_A, 0); /* DATA23 */ -- -- clk_set_parent(&atmel_lcdfb0_pixclk, &pll0); -- clk_set_rate(&atmel_lcdfb0_pixclk, clk_get_rate(&pll0)); -- break; -- -- default: -- goto err_invalid_id; -- } -- -- if (fbmem_len) { -- pdev->resource[2].start = fbmem_start; -- pdev->resource[2].end = fbmem_start + fbmem_len - 1; -- pdev->resource[2].flags = IORESOURCE_MEM; -- } -- -- info = pdev->dev.platform_data; -- memcpy(info, data, sizeof(struct atmel_lcdfb_info)); -- info->default_monspecs = monspecs; -- -- platform_device_register(pdev); -- return pdev; -- --err_invalid_id: -- kfree(modedb); --err_dup_modedb: -- kfree(monspecs); -- return NULL; --} -- --/* -------------------------------------------------------------------- -- * SSC -- * -------------------------------------------------------------------- */ --static struct resource ssc0_resource[] = { -- PBMEM(0xffe01c00), -- IRQ(10), --}; --DEFINE_DEV(ssc, 0); --DEV_CLK(pclk, ssc0, pba, 7); -- --static struct resource ssc1_resource[] = { -- PBMEM(0xffe02000), -- IRQ(11), --}; --DEFINE_DEV(ssc, 1); --DEV_CLK(pclk, ssc1, pba, 8); -- --static struct resource ssc2_resource[] = { -- PBMEM(0xffe02400), -- IRQ(12), --}; --DEFINE_DEV(ssc, 2); --DEV_CLK(pclk, ssc2, pba, 9); -- --struct platform_device *__init --at32_add_device_ssc(unsigned int id, unsigned int flags) --{ -- struct platform_device *pdev; -- -- switch (id) { -- case 0: -- pdev = &ssc0_device; -- if (flags & ATMEL_SSC_RF) -- select_peripheral(PA(21), PERIPH_A, 0); /* RF */ -- if (flags & ATMEL_SSC_RK) -- select_peripheral(PA(22), PERIPH_A, 0); /* RK */ -- if (flags & ATMEL_SSC_TK) -- select_peripheral(PA(23), PERIPH_A, 0); /* TK */ -- if (flags & ATMEL_SSC_TF) -- select_peripheral(PA(24), PERIPH_A, 0); /* TF */ -- if (flags & ATMEL_SSC_TD) -- select_peripheral(PA(25), PERIPH_A, 0); /* TD */ -- if (flags & ATMEL_SSC_RD) -- select_peripheral(PA(26), PERIPH_A, 0); /* RD */ -- break; -- case 1: -- pdev = &ssc1_device; -- if (flags & ATMEL_SSC_RF) -- select_peripheral(PA(0), PERIPH_B, 0); /* RF */ -- if (flags & ATMEL_SSC_RK) -- select_peripheral(PA(1), PERIPH_B, 0); /* RK */ -- if (flags & ATMEL_SSC_TK) -- select_peripheral(PA(2), PERIPH_B, 0); /* TK */ -- if (flags & ATMEL_SSC_TF) -- select_peripheral(PA(3), PERIPH_B, 0); /* TF */ -- if (flags & ATMEL_SSC_TD) -- select_peripheral(PA(4), PERIPH_B, 0); /* TD */ -- if (flags & ATMEL_SSC_RD) -- select_peripheral(PA(5), PERIPH_B, 0); /* RD */ -- break; -- case 2: -- pdev = &ssc2_device; -- if (flags & ATMEL_SSC_TD) -- select_peripheral(PB(13), PERIPH_A, 0); /* TD */ -- if (flags & ATMEL_SSC_RD) -- select_peripheral(PB(14), PERIPH_A, 0); /* RD */ -- if (flags & ATMEL_SSC_TK) -- select_peripheral(PB(15), PERIPH_A, 0); /* TK */ -- if (flags & ATMEL_SSC_TF) -- select_peripheral(PB(16), PERIPH_A, 0); /* TF */ -- if (flags & ATMEL_SSC_RF) -- select_peripheral(PB(17), PERIPH_A, 0); /* RF */ -- if (flags & ATMEL_SSC_RK) -- select_peripheral(PB(18), PERIPH_A, 0); /* RK */ -- break; -- default: -- return NULL; -- } -- -- platform_device_register(pdev); -- return pdev; --} -- --/* -------------------------------------------------------------------- -- * GCLK -- * -------------------------------------------------------------------- */ --static struct clk gclk0 = { -- .name = "gclk0", -- .mode = genclk_mode, -- .get_rate = genclk_get_rate, -- .set_rate = genclk_set_rate, -- .set_parent = genclk_set_parent, -- .index = 0, --}; --static struct clk gclk1 = { -- .name = "gclk1", -- .mode = genclk_mode, -- .get_rate = genclk_get_rate, -- .set_rate = genclk_set_rate, -- .set_parent = genclk_set_parent, -- .index = 1, --}; --static struct clk gclk2 = { -- .name = "gclk2", -- .mode = genclk_mode, -- .get_rate = genclk_get_rate, -- .set_rate = genclk_set_rate, -- .set_parent = genclk_set_parent, -- .index = 2, --}; --static struct clk gclk3 = { -- .name = "gclk3", -- .mode = genclk_mode, -- .get_rate = genclk_get_rate, -- .set_rate = genclk_set_rate, -- .set_parent = genclk_set_parent, -- .index = 3, --}; --static struct clk gclk4 = { -- .name = "gclk4", -- .mode = genclk_mode, -- .get_rate = genclk_get_rate, -- .set_rate = genclk_set_rate, -- .set_parent = genclk_set_parent, -- .index = 4, --}; -- --struct clk *at32_clock_list[] = { -- &osc32k, -- &osc0, -- &osc1, -- &pll0, -- &pll1, -- &cpu_clk, -- &hsb_clk, -- &pba_clk, -- &pbb_clk, -- &at32_pm_pclk, -- &at32_intc0_pclk, -- &hmatrix_clk, -- &ebi_clk, -- &hramc_clk, -- &smc0_pclk, -- &smc0_mck, -- &pdc_hclk, -- &pdc_pclk, -- &pico_clk, -- &pio0_mck, -- &pio1_mck, -- &pio2_mck, -- &pio3_mck, -- &pio4_mck, -- &at32_systc0_pclk, -- &atmel_usart0_usart, -- &atmel_usart1_usart, -- &atmel_usart2_usart, -- &atmel_usart3_usart, -- &macb0_hclk, -- &macb0_pclk, -- &macb1_hclk, -- &macb1_pclk, -- &atmel_spi0_spi_clk, -- &atmel_spi1_spi_clk, -- &atmel_lcdfb0_hck1, -- &atmel_lcdfb0_pixclk, -- &ssc0_pclk, -- &ssc1_pclk, -- &ssc2_pclk, -- &gclk0, -- &gclk1, -- &gclk2, -- &gclk3, -- &gclk4, --}; --unsigned int at32_nr_clocks = ARRAY_SIZE(at32_clock_list); -- --void __init at32_portmux_init(void) --{ -- at32_init_pio(&pio0_device); -- at32_init_pio(&pio1_device); -- at32_init_pio(&pio2_device); -- at32_init_pio(&pio3_device); -- at32_init_pio(&pio4_device); --} -- --void __init at32_clock_init(void) --{ -- u32 cpu_mask = 0, hsb_mask = 0, pba_mask = 0, pbb_mask = 0; -- int i; -- -- if (pm_readl(MCCTRL) & PM_BIT(PLLSEL)) { -- main_clock = &pll0; -- cpu_clk.parent = &pll0; -- } else { -- main_clock = &osc0; -- cpu_clk.parent = &osc0; -- } -- -- if (pm_readl(PLL0) & PM_BIT(PLLOSC)) -- pll0.parent = &osc1; -- if (pm_readl(PLL1) & PM_BIT(PLLOSC)) -- pll1.parent = &osc1; -- -- genclk_init_parent(&gclk0); -- genclk_init_parent(&gclk1); -- genclk_init_parent(&gclk2); -- genclk_init_parent(&gclk3); -- genclk_init_parent(&gclk4); -- genclk_init_parent(&atmel_lcdfb0_pixclk); -- -- /* -- * Turn on all clocks that have at least one user already, and -- * turn off everything else. We only do this for module -- * clocks, and even though it isn't particularly pretty to -- * check the address of the mode function, it should do the -- * trick... -- */ -- for (i = 0; i < ARRAY_SIZE(at32_clock_list); i++) { -- struct clk *clk = at32_clock_list[i]; -- -- if (clk->users == 0) -- continue; -- -- if (clk->mode == &cpu_clk_mode) -- cpu_mask |= 1 << clk->index; -- else if (clk->mode == &hsb_clk_mode) -- hsb_mask |= 1 << clk->index; -- else if (clk->mode == &pba_clk_mode) -- pba_mask |= 1 << clk->index; -- else if (clk->mode == &pbb_clk_mode) -- pbb_mask |= 1 << clk->index; -- } -- -- pm_writel(CPU_MASK, cpu_mask); -- pm_writel(HSB_MASK, hsb_mask); -- pm_writel(PBA_MASK, pba_mask); -- pm_writel(PBB_MASK, pbb_mask); --} -diff --git a/arch/avr32/mach-at32ap/at32ap700x.c b/arch/avr32/mach-at32ap/at32ap700x.c -new file mode 100644 -index 0000000..7fd93a5 ---- /dev/null -+++ b/arch/avr32/mach-at32ap/at32ap700x.c -@@ -0,0 +1,1754 @@ -+/* -+ * Copyright (C) 2005-2006 Atmel Corporation -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 as -+ * published by the Free Software Foundation. -+ */ -+#include <linux/clk.h> -+#include <linux/fb.h> -+#include <linux/init.h> -+#include <linux/platform_device.h> -+#include <linux/dma-mapping.h> -+#include <linux/spi/spi.h> -+ -+#include <asm/io.h> -+ -+#include <asm/arch/at32ap700x.h> -+#include <asm/arch/board.h> -+#include <asm/arch/portmux.h> -+ -+#include <video/atmel_lcdc.h> -+ -+#include "clock.h" -+#include "hmatrix.h" -+#include "pio.h" -+#include "pm.h" -+ -+ -+#define PBMEM(base) \ -+ { \ -+ .start = base, \ -+ .end = base + 0x3ff, \ -+ .flags = IORESOURCE_MEM, \ -+ } -+#define IRQ(num) \ -+ { \ -+ .start = num, \ -+ .end = num, \ -+ .flags = IORESOURCE_IRQ, \ -+ } -+#define NAMED_IRQ(num, _name) \ -+ { \ -+ .start = num, \ -+ .end = num, \ -+ .name = _name, \ -+ .flags = IORESOURCE_IRQ, \ -+ } -+ -+/* REVISIT these assume *every* device supports DMA, but several -+ * don't ... tc, smc, pio, rtc, watchdog, pwm, ps2, and more. -+ */ -+#define DEFINE_DEV(_name, _id) \ -+static u64 _name##_id##_dma_mask = DMA_32BIT_MASK; \ -+static struct platform_device _name##_id##_device = { \ -+ .name = #_name, \ -+ .id = _id, \ -+ .dev = { \ -+ .dma_mask = &_name##_id##_dma_mask, \ -+ .coherent_dma_mask = DMA_32BIT_MASK, \ -+ }, \ -+ .resource = _name##_id##_resource, \ -+ .num_resources = ARRAY_SIZE(_name##_id##_resource), \ -+} -+#define DEFINE_DEV_DATA(_name, _id) \ -+static u64 _name##_id##_dma_mask = DMA_32BIT_MASK; \ -+static struct platform_device _name##_id##_device = { \ -+ .name = #_name, \ -+ .id = _id, \ -+ .dev = { \ -+ .dma_mask = &_name##_id##_dma_mask, \ -+ .platform_data = &_name##_id##_data, \ -+ .coherent_dma_mask = DMA_32BIT_MASK, \ -+ }, \ -+ .resource = _name##_id##_resource, \ -+ .num_resources = ARRAY_SIZE(_name##_id##_resource), \ -+} -+ -+#define select_peripheral(pin, periph, flags) \ -+ at32_select_periph(GPIO_PIN_##pin, GPIO_##periph, flags) -+ -+#define DEV_CLK(_name, devname, bus, _index) \ -+static struct clk devname##_##_name = { \ -+ .name = #_name, \ -+ .dev = &devname##_device.dev, \ -+ .parent = &bus##_clk, \ -+ .mode = bus##_clk_mode, \ -+ .get_rate = bus##_clk_get_rate, \ -+ .index = _index, \ -+} -+ -+static DEFINE_SPINLOCK(pm_lock); -+ -+unsigned long at32ap7000_osc_rates[3] = { -+ [0] = 32768, -+ /* FIXME: these are ATSTK1002-specific */ -+ [1] = 20000000, -+ [2] = 12000000, -+}; -+ -+static unsigned long osc_get_rate(struct clk *clk) -+{ -+ return at32ap7000_osc_rates[clk->index]; -+} -+ -+static unsigned long pll_get_rate(struct clk *clk, unsigned long control) -+{ -+ unsigned long div, mul, rate; -+ -+ if (!(control & PM_BIT(PLLEN))) -+ return 0; -+ -+ div = PM_BFEXT(PLLDIV, control) + 1; -+ mul = PM_BFEXT(PLLMUL, control) + 1; -+ -+ rate = clk->parent->get_rate(clk->parent); -+ rate = (rate + div / 2) / div; -+ rate *= mul; -+ -+ return rate; -+} -+ -+static unsigned long pll0_get_rate(struct clk *clk) -+{ -+ u32 control; -+ -+ control = pm_readl(PLL0); -+ -+ return pll_get_rate(clk, control); -+} -+ -+static unsigned long pll1_get_rate(struct clk *clk) -+{ -+ u32 control; -+ -+ control = pm_readl(PLL1); -+ -+ return pll_get_rate(clk, control); -+} -+ -+/* -+ * The AT32AP7000 has five primary clock sources: One 32kHz -+ * oscillator, two crystal oscillators and two PLLs. -+ */ -+static struct clk osc32k = { -+ .name = "osc32k", -+ .get_rate = osc_get_rate, -+ .users = 1, -+ .index = 0, -+}; -+static struct clk osc0 = { -+ .name = "osc0", -+ .get_rate = osc_get_rate, -+ .users = 1, -+ .index = 1, -+}; -+static struct clk osc1 = { -+ .name = "osc1", -+ .get_rate = osc_get_rate, -+ .index = 2, -+}; -+static struct clk pll0 = { -+ .name = "pll0", -+ .get_rate = pll0_get_rate, -+ .parent = &osc0, -+}; -+static struct clk pll1 = { -+ .name = "pll1", -+ .get_rate = pll1_get_rate, -+ .parent = &osc0, -+}; -+ -+/* -+ * The main clock can be either osc0 or pll0. The boot loader may -+ * have chosen one for us, so we don't really know which one until we -+ * have a look at the SM. -+ */ -+static struct clk *main_clock; -+ -+/* -+ * Synchronous clocks are generated from the main clock. The clocks -+ * must satisfy the constraint -+ * fCPU >= fHSB >= fPB -+ * i.e. each clock must not be faster than its parent. -+ */ -+static unsigned long bus_clk_get_rate(struct clk *clk, unsigned int shift) -+{ -+ return main_clock->get_rate(main_clock) >> shift; -+}; -+ -+static void cpu_clk_mode(struct clk *clk, int enabled) -+{ -+ unsigned long flags; -+ u32 mask; -+ -+ spin_lock_irqsave(&pm_lock, flags); -+ mask = pm_readl(CPU_MASK); -+ if (enabled) -+ mask |= 1 << clk->index; -+ else -+ mask &= ~(1 << clk->index); -+ pm_writel(CPU_MASK, mask); -+ spin_unlock_irqrestore(&pm_lock, flags); -+} -+ -+static unsigned long cpu_clk_get_rate(struct clk *clk) -+{ -+ unsigned long cksel, shift = 0; -+ -+ cksel = pm_readl(CKSEL); -+ if (cksel & PM_BIT(CPUDIV)) -+ shift = PM_BFEXT(CPUSEL, cksel) + 1; -+ -+ return bus_clk_get_rate(clk, shift); -+} -+ -+static long cpu_clk_set_rate(struct clk *clk, unsigned long rate, int apply) -+{ -+ u32 control; -+ unsigned long parent_rate, child_div, actual_rate, div; -+ -+ parent_rate = clk->parent->get_rate(clk->parent); -+ control = pm_readl(CKSEL); -+ -+ if (control & PM_BIT(HSBDIV)) -+ child_div = 1 << (PM_BFEXT(HSBSEL, control) + 1); -+ else -+ child_div = 1; -+ -+ if (rate > 3 * (parent_rate / 4) || child_div == 1) { -+ actual_rate = parent_rate; -+ control &= ~PM_BIT(CPUDIV); -+ } else { -+ unsigned int cpusel; -+ div = (parent_rate + rate / 2) / rate; -+ if (div > child_div) -+ div = child_div; -+ cpusel = (div > 1) ? (fls(div) - 2) : 0; -+ control = PM_BIT(CPUDIV) | PM_BFINS(CPUSEL, cpusel, control); -+ actual_rate = parent_rate / (1 << (cpusel + 1)); -+ } -+ -+ pr_debug("clk %s: new rate %lu (actual rate %lu)\n", -+ clk->name, rate, actual_rate); -+ -+ if (apply) -+ pm_writel(CKSEL, control); -+ -+ return actual_rate; -+} -+ -+static void hsb_clk_mode(struct clk *clk, int enabled) -+{ -+ unsigned long flags; -+ u32 mask; -+ -+ spin_lock_irqsave(&pm_lock, flags); -+ mask = pm_readl(HSB_MASK); -+ if (enabled) -+ mask |= 1 << clk->index; -+ else -+ mask &= ~(1 << clk->index); -+ pm_writel(HSB_MASK, mask); -+ spin_unlock_irqrestore(&pm_lock, flags); -+} -+ -+static unsigned long hsb_clk_get_rate(struct clk *clk) -+{ -+ unsigned long cksel, shift = 0; -+ -+ cksel = pm_readl(CKSEL); -+ if (cksel & PM_BIT(HSBDIV)) -+ shift = PM_BFEXT(HSBSEL, cksel) + 1; -+ -+ return bus_clk_get_rate(clk, shift); -+} -+ -+static void pba_clk_mode(struct clk *clk, int enabled) -+{ -+ unsigned long flags; -+ u32 mask; -+ -+ spin_lock_irqsave(&pm_lock, flags); -+ mask = pm_readl(PBA_MASK); -+ if (enabled) -+ mask |= 1 << clk->index; -+ else -+ mask &= ~(1 << clk->index); -+ pm_writel(PBA_MASK, mask); -+ spin_unlock_irqrestore(&pm_lock, flags); -+} -+ -+static unsigned long pba_clk_get_rate(struct clk *clk) -+{ -+ unsigned long cksel, shift = 0; -+ -+ cksel = pm_readl(CKSEL); -+ if (cksel & PM_BIT(PBADIV)) -+ shift = PM_BFEXT(PBASEL, cksel) + 1; -+ -+ return bus_clk_get_rate(clk, shift); -+} -+ -+static void pbb_clk_mode(struct clk *clk, int enabled) -+{ -+ unsigned long flags; -+ u32 mask; -+ -+ spin_lock_irqsave(&pm_lock, flags); -+ mask = pm_readl(PBB_MASK); -+ if (enabled) -+ mask |= 1 << clk->index; -+ else -+ mask &= ~(1 << clk->index); -+ pm_writel(PBB_MASK, mask); -+ spin_unlock_irqrestore(&pm_lock, flags); -+} -+ -+static unsigned long pbb_clk_get_rate(struct clk *clk) -+{ -+ unsigned long cksel, shift = 0; -+ -+ cksel = pm_readl(CKSEL); -+ if (cksel & PM_BIT(PBBDIV)) -+ shift = PM_BFEXT(PBBSEL, cksel) + 1; -+ -+ return bus_clk_get_rate(clk, shift); -+} -+ -+static struct clk cpu_clk = { -+ .name = "cpu", -+ .get_rate = cpu_clk_get_rate, -+ .set_rate = cpu_clk_set_rate, -+ .users = 1, -+}; -+static struct clk hsb_clk = { -+ .name = "hsb", -+ .parent = &cpu_clk, -+ .get_rate = hsb_clk_get_rate, -+}; -+static struct clk pba_clk = { -+ .name = "pba", -+ .parent = &hsb_clk, -+ .mode = hsb_clk_mode, -+ .get_rate = pba_clk_get_rate, -+ .index = 1, -+}; -+static struct clk pbb_clk = { -+ .name = "pbb", -+ .parent = &hsb_clk, -+ .mode = hsb_clk_mode, -+ .get_rate = pbb_clk_get_rate, -+ .users = 1, -+ .index = 2, -+}; -+ -+/* -------------------------------------------------------------------- -+ * Generic Clock operations -+ * -------------------------------------------------------------------- */ -+ -+static void genclk_mode(struct clk *clk, int enabled) -+{ -+ u32 control; -+ -+ control = pm_readl(GCCTRL(clk->index)); -+ if (enabled) -+ control |= PM_BIT(CEN); -+ else -+ control &= ~PM_BIT(CEN); -+ pm_writel(GCCTRL(clk->index), control); -+} -+ -+static unsigned long genclk_get_rate(struct clk *clk) -+{ -+ u32 control; -+ unsigned long div = 1; -+ -+ control = pm_readl(GCCTRL(clk->index)); -+ if (control & PM_BIT(DIVEN)) -+ div = 2 * (PM_BFEXT(DIV, control) + 1); -+ -+ return clk->parent->get_rate(clk->parent) / div; -+} -+ -+static long genclk_set_rate(struct clk *clk, unsigned long rate, int apply) -+{ -+ u32 control; -+ unsigned long parent_rate, actual_rate, div; -+ -+ parent_rate = clk->parent->get_rate(clk->parent); -+ control = pm_readl(GCCTRL(clk->index)); -+ -+ if (rate > 3 * parent_rate / 4) { -+ actual_rate = parent_rate; -+ control &= ~PM_BIT(DIVEN); -+ } else { -+ div = (parent_rate + rate) / (2 * rate) - 1; -+ control = PM_BFINS(DIV, div, control) | PM_BIT(DIVEN); -+ actual_rate = parent_rate / (2 * (div + 1)); -+ } -+ -+ dev_dbg(clk->dev, "clk %s: new rate %lu (actual rate %lu)\n", -+ clk->name, rate, actual_rate); -+ -+ if (apply) -+ pm_writel(GCCTRL(clk->index), control); -+ -+ return actual_rate; -+} -+ -+int genclk_set_parent(struct clk *clk, struct clk *parent) -+{ -+ u32 control; -+ -+ dev_dbg(clk->dev, "clk %s: new parent %s (was %s)\n", -+ clk->name, parent->name, clk->parent->name); -+ -+ control = pm_readl(GCCTRL(clk->index)); -+ -+ if (parent == &osc1 || parent == &pll1) -+ control |= PM_BIT(OSCSEL); -+ else if (parent == &osc0 || parent == &pll0) -+ control &= ~PM_BIT(OSCSEL); -+ else -+ return -EINVAL; -+ -+ if (parent == &pll0 || parent == &pll1) -+ control |= PM_BIT(PLLSEL); -+ else -+ control &= ~PM_BIT(PLLSEL); -+ -+ pm_writel(GCCTRL(clk->index), control); -+ clk->parent = parent; -+ -+ return 0; -+} -+ -+static void __init genclk_init_parent(struct clk *clk) -+{ -+ u32 control; -+ struct clk *parent; -+ -+ BUG_ON(clk->index > 7); -+ -+ control = pm_readl(GCCTRL(clk->index)); -+ if (control & PM_BIT(OSCSEL)) -+ parent = (control & PM_BIT(PLLSEL)) ? &pll1 : &osc1; -+ else -+ parent = (control & PM_BIT(PLLSEL)) ? &pll0 : &osc0; -+ -+ clk->parent = parent; -+} -+ -+/* -------------------------------------------------------------------- -+ * System peripherals -+ * -------------------------------------------------------------------- */ -+static struct resource at32_pm0_resource[] = { -+ { -+ .start = 0xfff00000, -+ .end = 0xfff0007f, -+ .flags = IORESOURCE_MEM, -+ }, -+ IRQ(20), -+}; -+ -+static struct resource at32ap700x_rtc0_resource[] = { -+ { -+ .start = 0xfff00080, -+ .end = 0xfff000af, -+ .flags = IORESOURCE_MEM, -+ }, -+ IRQ(21), -+}; -+ -+static struct resource at32_wdt0_resource[] = { -+ { -+ .start = 0xfff000b0, -+ .end = 0xfff000cf, -+ .flags = IORESOURCE_MEM, -+ }, -+}; -+ -+static struct resource at32_eic0_resource[] = { -+ { -+ .start = 0xfff00100, -+ .end = 0xfff0013f, -+ .flags = IORESOURCE_MEM, -+ }, -+ IRQ(19), -+}; -+ -+DEFINE_DEV(at32_pm, 0); -+DEFINE_DEV(at32ap700x_rtc, 0); -+DEFINE_DEV(at32_wdt, 0); -+DEFINE_DEV(at32_eic, 0); -+ -+/* -+ * Peripheral clock for PM, RTC, WDT and EIC. PM will ensure that this -+ * is always running. -+ */ -+static struct clk at32_pm_pclk = { -+ .name = "pclk", -+ .dev = &at32_pm0_device.dev, -+ .parent = &pbb_clk, -+ .mode = pbb_clk_mode, -+ .get_rate = pbb_clk_get_rate, -+ .users = 1, -+ .index = 0, -+}; -+ -+static struct resource intc0_resource[] = { -+ PBMEM(0xfff00400), -+}; -+struct platform_device at32_intc0_device = { -+ .name = "intc", -+ .id = 0, -+ .resource = intc0_resource, -+ .num_resources = ARRAY_SIZE(intc0_resource), -+}; -+DEV_CLK(pclk, at32_intc0, pbb, 1); -+ -+static struct clk ebi_clk = { -+ .name = "ebi", -+ .parent = &hsb_clk, -+ .mode = hsb_clk_mode, -+ .get_rate = hsb_clk_get_rate, -+ .users = 1, -+}; -+static struct clk hramc_clk = { -+ .name = "hramc", -+ .parent = &hsb_clk, -+ .mode = hsb_clk_mode, -+ .get_rate = hsb_clk_get_rate, -+ .users = 1, -+ .index = 3, -+}; -+ -+static struct resource smc0_resource[] = { -+ PBMEM(0xfff03400), -+}; -+DEFINE_DEV(smc, 0); -+DEV_CLK(pclk, smc0, pbb, 13); -+DEV_CLK(mck, smc0, hsb, 0); -+ -+static struct platform_device pdc_device = { -+ .name = "pdc", -+ .id = 0, -+}; -+DEV_CLK(hclk, pdc, hsb, 4); -+DEV_CLK(pclk, pdc, pba, 16); -+ -+static struct clk pico_clk = { -+ .name = "pico", -+ .parent = &cpu_clk, -+ .mode = cpu_clk_mode, -+ .get_rate = cpu_clk_get_rate, -+ .users = 1, -+}; -+ -+static struct resource dmaca0_resource[] = { -+ { -+ .start = 0xff200000, -+ .end = 0xff20ffff, -+ .flags = IORESOURCE_MEM, -+ }, -+ IRQ(2), -+}; -+DEFINE_DEV(dmaca, 0); -+DEV_CLK(hclk, dmaca0, hsb, 10); -+ -+/* -------------------------------------------------------------------- -+ * HMATRIX -+ * -------------------------------------------------------------------- */ -+ -+static struct clk hmatrix_clk = { -+ .name = "hmatrix_clk", -+ .parent = &pbb_clk, -+ .mode = pbb_clk_mode, -+ .get_rate = pbb_clk_get_rate, -+ .index = 2, -+ .users = 1, -+}; -+#define HMATRIX_BASE ((void __iomem *)0xfff00800) -+ -+#define hmatrix_readl(reg) \ -+ __raw_readl((HMATRIX_BASE) + HMATRIX_##reg) -+#define hmatrix_writel(reg,value) \ -+ __raw_writel((value), (HMATRIX_BASE) + HMATRIX_##reg) -+ -+/* -+ * Set bits in the HMATRIX Special Function Register (SFR) used by the -+ * External Bus Interface (EBI). This can be used to enable special -+ * features like CompactFlash support, NAND Flash support, etc. on -+ * certain chipselects. -+ */ -+static inline void set_ebi_sfr_bits(u32 mask) -+{ -+ u32 sfr; -+ -+ clk_enable(&hmatrix_clk); -+ sfr = hmatrix_readl(SFR4); -+ sfr |= mask; -+ hmatrix_writel(SFR4, sfr); -+ clk_disable(&hmatrix_clk); -+} -+ -+/* -------------------------------------------------------------------- -+ * System Timer/Counter (TC) -+ * -------------------------------------------------------------------- */ -+static struct resource at32_systc0_resource[] = { -+ PBMEM(0xfff00c00), -+ IRQ(22), -+}; -+struct platform_device at32_systc0_device = { -+ .name = "systc", -+ .id = 0, -+ .resource = at32_systc0_resource, -+ .num_resources = ARRAY_SIZE(at32_systc0_resource), -+}; -+DEV_CLK(pclk, at32_systc0, pbb, 3); -+ -+/* -------------------------------------------------------------------- -+ * PIO -+ * -------------------------------------------------------------------- */ -+ -+static struct resource pio0_resource[] = { -+ PBMEM(0xffe02800), -+ IRQ(13), -+}; -+DEFINE_DEV(pio, 0); -+DEV_CLK(mck, pio0, pba, 10); -+ -+static struct resource pio1_resource[] = { -+ PBMEM(0xffe02c00), -+ IRQ(14), -+}; -+DEFINE_DEV(pio, 1); -+DEV_CLK(mck, pio1, pba, 11); -+ -+static struct resource pio2_resource[] = { -+ PBMEM(0xffe03000), -+ IRQ(15), -+}; -+DEFINE_DEV(pio, 2); -+DEV_CLK(mck, pio2, pba, 12); -+ -+static struct resource pio3_resource[] = { -+ PBMEM(0xffe03400), -+ IRQ(16), -+}; -+DEFINE_DEV(pio, 3); -+DEV_CLK(mck, pio3, pba, 13); -+ -+static struct resource pio4_resource[] = { -+ PBMEM(0xffe03800), -+ IRQ(17), -+}; -+DEFINE_DEV(pio, 4); -+DEV_CLK(mck, pio4, pba, 14); -+ -+void __init at32_add_system_devices(void) -+{ -+ platform_device_register(&at32_pm0_device); -+ platform_device_register(&at32_intc0_device); -+ platform_device_register(&at32ap700x_rtc0_device); -+ platform_device_register(&at32_wdt0_device); -+ platform_device_register(&at32_eic0_device); -+ platform_device_register(&smc0_device); -+ platform_device_register(&pdc_device); -+ platform_device_register(&dmaca0_device); -+ -+ platform_device_register(&at32_systc0_device); -+ -+ platform_device_register(&pio0_device); -+ platform_device_register(&pio1_device); -+ platform_device_register(&pio2_device); -+ platform_device_register(&pio3_device); -+ platform_device_register(&pio4_device); -+} -+ -+/* -------------------------------------------------------------------- -+ * USART -+ * -------------------------------------------------------------------- */ -+ -+static struct atmel_uart_data atmel_usart0_data = { -+ .use_dma_tx = 1, -+ .use_dma_rx = 1, -+}; -+static struct resource atmel_usart0_resource[] = { -+ PBMEM(0xffe00c00), -+ IRQ(6), -+}; -+DEFINE_DEV_DATA(atmel_usart, 0); -+DEV_CLK(usart, atmel_usart0, pba, 4); -+ -+static struct atmel_uart_data atmel_usart1_data = { -+ .use_dma_tx = 1, -+ .use_dma_rx = 1, -+}; -+static struct resource atmel_usart1_resource[] = { -+ PBMEM(0xffe01000), -+ IRQ(7), -+}; -+DEFINE_DEV_DATA(atmel_usart, 1); -+DEV_CLK(usart, atmel_usart1, pba, 4); -+ -+static struct atmel_uart_data atmel_usart2_data = { -+ .use_dma_tx = 1, -+ .use_dma_rx = 1, -+}; -+static struct resource atmel_usart2_resource[] = { -+ PBMEM(0xffe01400), -+ IRQ(8), -+}; -+DEFINE_DEV_DATA(atmel_usart, 2); -+DEV_CLK(usart, atmel_usart2, pba, 5); -+ -+static struct atmel_uart_data atmel_usart3_data = { -+ .use_dma_tx = 1, -+ .use_dma_rx = 1, -+}; -+static struct resource atmel_usart3_resource[] = { -+ PBMEM(0xffe01800), -+ IRQ(9), -+}; -+DEFINE_DEV_DATA(atmel_usart, 3); -+DEV_CLK(usart, atmel_usart3, pba, 6); -+ -+static inline void configure_usart0_pins(void) -+{ -+ select_peripheral(PA(8), PERIPH_B, 0); /* RXD */ -+ select_peripheral(PA(9), PERIPH_B, 0); /* TXD */ -+} -+ -+static inline void configure_usart1_pins(void) -+{ -+ select_peripheral(PA(17), PERIPH_A, 0); /* RXD */ -+ select_peripheral(PA(18), PERIPH_A, 0); /* TXD */ -+} -+ -+static inline void configure_usart2_pins(void) -+{ -+ select_peripheral(PB(26), PERIPH_B, 0); /* RXD */ -+ select_peripheral(PB(27), PERIPH_B, 0); /* TXD */ -+} -+ -+static inline void configure_usart3_pins(void) -+{ -+ select_peripheral(PB(18), PERIPH_B, 0); /* RXD */ -+ select_peripheral(PB(17), PERIPH_B, 0); /* TXD */ -+} -+ -+static struct platform_device *__initdata at32_usarts[4]; -+ -+void __init at32_map_usart(unsigned int hw_id, unsigned int line) -+{ -+ struct platform_device *pdev; -+ -+ switch (hw_id) { -+ case 0: -+ pdev = &atmel_usart0_device; -+ configure_usart0_pins(); -+ break; -+ case 1: -+ pdev = &atmel_usart1_device; -+ configure_usart1_pins(); -+ break; -+ case 2: -+ pdev = &atmel_usart2_device; -+ configure_usart2_pins(); -+ break; -+ case 3: -+ pdev = &atmel_usart3_device; -+ configure_usart3_pins(); -+ break; -+ default: -+ return; -+ } -+ -+ if (PXSEG(pdev->resource[0].start) == P4SEG) { -+ /* Addresses in the P4 segment are permanently mapped 1:1 */ -+ struct atmel_uart_data *data = pdev->dev.platform_data; -+ data->regs = (void __iomem *)pdev->resource[0].start; -+ } -+ -+ pdev->id = line; -+ at32_usarts[line] = pdev; -+} -+ -+struct platform_device *__init at32_add_device_usart(unsigned int id) -+{ -+ platform_device_register(at32_usarts[id]); -+ return at32_usarts[id]; -+} -+ -+struct platform_device *atmel_default_console_device; -+ -+void __init at32_setup_serial_console(unsigned int usart_id) -+{ -+ atmel_default_console_device = at32_usarts[usart_id]; -+} -+ -+/* -------------------------------------------------------------------- -+ * Ethernet -+ * -------------------------------------------------------------------- */ -+ -+#ifdef CONFIG_CPU_AT32AP7000 -+static struct eth_platform_data macb0_data; -+static struct resource macb0_resource[] = { -+ PBMEM(0xfff01800), -+ IRQ(25), -+}; -+DEFINE_DEV_DATA(macb, 0); -+DEV_CLK(hclk, macb0, hsb, 8); -+DEV_CLK(pclk, macb0, pbb, 6); -+ -+static struct eth_platform_data macb1_data; -+static struct resource macb1_resource[] = { -+ PBMEM(0xfff01c00), -+ IRQ(26), -+}; -+DEFINE_DEV_DATA(macb, 1); -+DEV_CLK(hclk, macb1, hsb, 9); -+DEV_CLK(pclk, macb1, pbb, 7); -+ -+struct platform_device *__init -+at32_add_device_eth(unsigned int id, struct eth_platform_data *data) -+{ -+ struct platform_device *pdev; -+ -+ switch (id) { -+ case 0: -+ pdev = &macb0_device; -+ -+ select_peripheral(PC(3), PERIPH_A, 0); /* TXD0 */ -+ select_peripheral(PC(4), PERIPH_A, 0); /* TXD1 */ -+ select_peripheral(PC(7), PERIPH_A, 0); /* TXEN */ -+ select_peripheral(PC(8), PERIPH_A, 0); /* TXCK */ -+ select_peripheral(PC(9), PERIPH_A, 0); /* RXD0 */ -+ select_peripheral(PC(10), PERIPH_A, 0); /* RXD1 */ -+ select_peripheral(PC(13), PERIPH_A, 0); /* RXER */ -+ select_peripheral(PC(15), PERIPH_A, 0); /* RXDV */ -+ select_peripheral(PC(16), PERIPH_A, 0); /* MDC */ -+ select_peripheral(PC(17), PERIPH_A, 0); /* MDIO */ -+ -+ if (!data->is_rmii) { -+ select_peripheral(PC(0), PERIPH_A, 0); /* COL */ -+ select_peripheral(PC(1), PERIPH_A, 0); /* CRS */ -+ select_peripheral(PC(2), PERIPH_A, 0); /* TXER */ -+ select_peripheral(PC(5), PERIPH_A, 0); /* TXD2 */ -+ select_peripheral(PC(6), PERIPH_A, 0); /* TXD3 */ -+ select_peripheral(PC(11), PERIPH_A, 0); /* RXD2 */ -+ select_peripheral(PC(12), PERIPH_A, 0); /* RXD3 */ -+ select_peripheral(PC(14), PERIPH_A, 0); /* RXCK */ -+ select_peripheral(PC(18), PERIPH_A, 0); /* SPD */ -+ } -+ break; -+ -+ case 1: -+ pdev = &macb1_device; -+ -+ select_peripheral(PD(13), PERIPH_B, 0); /* TXD0 */ -+ select_peripheral(PD(14), PERIPH_B, 0); /* TXD1 */ -+ select_peripheral(PD(11), PERIPH_B, 0); /* TXEN */ -+ select_peripheral(PD(12), PERIPH_B, 0); /* TXCK */ -+ select_peripheral(PD(10), PERIPH_B, 0); /* RXD0 */ -+ select_peripheral(PD(6), PERIPH_B, 0); /* RXD1 */ -+ select_peripheral(PD(5), PERIPH_B, 0); /* RXER */ -+ select_peripheral(PD(4), PERIPH_B, 0); /* RXDV */ -+ select_peripheral(PD(3), PERIPH_B, 0); /* MDC */ -+ select_peripheral(PD(2), PERIPH_B, 0); /* MDIO */ -+ -+ if (!data->is_rmii) { -+ select_peripheral(PC(19), PERIPH_B, 0); /* COL */ -+ select_peripheral(PC(23), PERIPH_B, 0); /* CRS */ -+ select_peripheral(PC(26), PERIPH_B, 0); /* TXER */ -+ select_peripheral(PC(27), PERIPH_B, 0); /* TXD2 */ -+ select_peripheral(PC(28), PERIPH_B, 0); /* TXD3 */ -+ select_peripheral(PC(29), PERIPH_B, 0); /* RXD2 */ -+ select_peripheral(PC(30), PERIPH_B, 0); /* RXD3 */ -+ select_peripheral(PC(24), PERIPH_B, 0); /* RXCK */ -+ select_peripheral(PD(15), PERIPH_B, 0); /* SPD */ -+ } -+ break; -+ -+ default: -+ return NULL; -+ } -+ -+ memcpy(pdev->dev.platform_data, data, sizeof(struct eth_platform_data)); -+ platform_device_register(pdev); -+ -+ return pdev; -+} -+#endif -+ -+/* -------------------------------------------------------------------- -+ * SPI -+ * -------------------------------------------------------------------- */ -+static struct resource atmel_spi0_resource[] = { -+ PBMEM(0xffe00000), -+ IRQ(3), -+}; -+DEFINE_DEV(atmel_spi, 0); -+DEV_CLK(spi_clk, atmel_spi0, pba, 0); -+ -+static struct resource atmel_spi1_resource[] = { -+ PBMEM(0xffe00400), -+ IRQ(4), -+}; -+DEFINE_DEV(atmel_spi, 1); -+DEV_CLK(spi_clk, atmel_spi1, pba, 1); -+ -+static void __init -+at32_spi_setup_slaves(unsigned int bus_num, struct spi_board_info *b, -+ unsigned int n, const u8 *pins) -+{ -+ unsigned int pin, mode; -+ -+ for (; n; n--, b++) { -+ b->bus_num = bus_num; -+ if (b->chip_select >= 4) -+ continue; -+ pin = (unsigned)b->controller_data; -+ if (!pin) { -+ pin = pins[b->chip_select]; -+ b->controller_data = (void *)pin; -+ } -+ mode = AT32_GPIOF_OUTPUT; -+ if (!(b->mode & SPI_CS_HIGH)) -+ mode |= AT32_GPIOF_HIGH; -+ at32_select_gpio(pin, mode); -+ } -+} -+ -+struct platform_device *__init -+at32_add_device_spi(unsigned int id, struct spi_board_info *b, unsigned int n) -+{ -+ /* -+ * Manage the chipselects as GPIOs, normally using the same pins -+ * the SPI controller expects; but boards can use other pins. -+ */ -+ static u8 __initdata spi0_pins[] = -+ { GPIO_PIN_PA(3), GPIO_PIN_PA(4), -+ GPIO_PIN_PA(5), GPIO_PIN_PA(20), }; -+ static u8 __initdata spi1_pins[] = -+ { GPIO_PIN_PB(2), GPIO_PIN_PB(3), -+ GPIO_PIN_PB(4), GPIO_PIN_PA(27), }; -+ struct platform_device *pdev; -+ -+ switch (id) { -+ case 0: -+ pdev = &atmel_spi0_device; -+ select_peripheral(PA(0), PERIPH_A, 0); /* MISO */ -+ select_peripheral(PA(1), PERIPH_A, 0); /* MOSI */ -+ select_peripheral(PA(2), PERIPH_A, 0); /* SCK */ -+ at32_spi_setup_slaves(0, b, n, spi0_pins); -+ break; -+ -+ case 1: -+ pdev = &atmel_spi1_device; -+ select_peripheral(PB(0), PERIPH_B, 0); /* MISO */ -+ select_peripheral(PB(1), PERIPH_B, 0); /* MOSI */ -+ select_peripheral(PB(5), PERIPH_B, 0); /* SCK */ -+ at32_spi_setup_slaves(1, b, n, spi1_pins); -+ break; -+ -+ default: -+ return NULL; -+ } -+ -+ spi_register_board_info(b, n); -+ platform_device_register(pdev); -+ return pdev; -+} -+ -+/* -------------------------------------------------------------------- -+ * TWI -+ * -------------------------------------------------------------------- */ -+static struct resource atmel_twi0_resource[] __initdata = { -+ PBMEM(0xffe00800), -+ IRQ(5), -+}; -+static struct clk atmel_twi0_pclk = { -+ .name = "twi_pclk", -+ .parent = &pba_clk, -+ .mode = pba_clk_mode, -+ .get_rate = pba_clk_get_rate, -+ .index = 2, -+}; -+ -+struct platform_device *__init at32_add_device_twi(unsigned int id) -+{ -+ struct platform_device *pdev; -+ -+ if (id != 0) -+ return NULL; -+ -+ pdev = platform_device_alloc("atmel_twi", id); -+ if (!pdev) -+ return NULL; -+ -+ if (platform_device_add_resources(pdev, atmel_twi0_resource, -+ ARRAY_SIZE(atmel_twi0_resource))) -+ goto err_add_resources; -+ -+ select_peripheral(PA(6), PERIPH_A, 0); /* SDA */ -+ select_peripheral(PA(7), PERIPH_A, 0); /* SDL */ -+ -+ atmel_twi0_pclk.dev = &pdev->dev; -+ -+ platform_device_add(pdev); -+ return pdev; -+ -+err_add_resources: -+ platform_device_put(pdev); -+ return NULL; -+} -+ -+/* -------------------------------------------------------------------- -+ * MMC -+ * -------------------------------------------------------------------- */ -+static struct resource atmel_mci0_resource[] __initdata = { -+ PBMEM(0xfff02400), -+ IRQ(28), -+}; -+static struct clk atmel_mci0_pclk = { -+ .name = "mci_clk", -+ .parent = &pbb_clk, -+ .mode = pbb_clk_mode, -+ .get_rate = pbb_clk_get_rate, -+ .index = 9, -+}; -+ -+struct platform_device *__init -+at32_add_device_mci(unsigned int id, struct mci_platform_data *data) -+{ -+ struct platform_device *pdev; -+ -+ if (id != 0) -+ return NULL; -+ -+ pdev = platform_device_alloc("atmel_mci", id); -+ if (!pdev) -+ goto fail; -+ -+ if (platform_device_add_resources(pdev, atmel_mci0_resource, -+ ARRAY_SIZE(atmel_mci0_resource))) -+ goto fail; -+ -+ if (data && platform_device_add_data(pdev, data, -+ sizeof(struct mci_platform_data))) -+ goto fail; -+ -+ select_peripheral(PA(10), PERIPH_A, 0); /* CLK */ -+ select_peripheral(PA(11), PERIPH_A, 0); /* CMD */ -+ select_peripheral(PA(12), PERIPH_A, 0); /* DATA0 */ -+ select_peripheral(PA(13), PERIPH_A, 0); /* DATA1 */ -+ select_peripheral(PA(14), PERIPH_A, 0); /* DATA2 */ -+ select_peripheral(PA(15), PERIPH_A, 0); /* DATA3 */ -+ -+ if (data) { -+ if (data->detect_pin != GPIO_PIN_NONE) -+ at32_select_gpio(data->detect_pin, 0); -+ if (data->wp_pin != GPIO_PIN_NONE) -+ at32_select_gpio(data->wp_pin, 0); -+ } -+ -+ atmel_mci0_pclk.dev = &pdev->dev; -+ -+ platform_device_add(pdev); -+ return pdev; -+ -+fail: -+ platform_device_put(pdev); -+ return NULL; -+} -+ -+/* -------------------------------------------------------------------- -+ * LCDC -+ * -------------------------------------------------------------------- */ -+#if defined(CONFIG_CPU_AT32AP7000) || defined(CONFIG_CPU_AT32AP7002) -+static struct atmel_lcdfb_info atmel_lcdfb0_data; -+static struct resource atmel_lcdfb0_resource[] = { -+ { -+ .start = 0xff000000, -+ .end = 0xff000fff, -+ .flags = IORESOURCE_MEM, -+ }, -+ IRQ(1), -+ { -+ /* Placeholder for pre-allocated fb memory */ -+ .start = 0x00000000, -+ .end = 0x00000000, -+ .flags = 0, -+ }, -+}; -+DEFINE_DEV_DATA(atmel_lcdfb, 0); -+DEV_CLK(hck1, atmel_lcdfb0, hsb, 7); -+static struct clk atmel_lcdfb0_pixclk = { -+ .name = "lcdc_clk", -+ .dev = &atmel_lcdfb0_device.dev, -+ .mode = genclk_mode, -+ .get_rate = genclk_get_rate, -+ .set_rate = genclk_set_rate, -+ .set_parent = genclk_set_parent, -+ .index = 7, -+}; -+ -+struct platform_device *__init -+at32_add_device_lcdc(unsigned int id, struct atmel_lcdfb_info *data, -+ unsigned long fbmem_start, unsigned long fbmem_len) -+{ -+ struct platform_device *pdev; -+ struct atmel_lcdfb_info *info; -+ struct fb_monspecs *monspecs; -+ struct fb_videomode *modedb; -+ unsigned int modedb_size; -+ -+ /* -+ * Do a deep copy of the fb data, monspecs and modedb. Make -+ * sure all allocations are done before setting up the -+ * portmux. -+ */ -+ monspecs = kmemdup(data->default_monspecs, -+ sizeof(struct fb_monspecs), GFP_KERNEL); -+ if (!monspecs) -+ return NULL; -+ -+ modedb_size = sizeof(struct fb_videomode) * monspecs->modedb_len; -+ modedb = kmemdup(monspecs->modedb, modedb_size, GFP_KERNEL); -+ if (!modedb) -+ goto err_dup_modedb; -+ monspecs->modedb = modedb; -+ -+ switch (id) { -+ case 0: -+ pdev = &atmel_lcdfb0_device; -+ select_peripheral(PC(19), PERIPH_A, 0); /* CC */ -+ select_peripheral(PC(20), PERIPH_A, 0); /* HSYNC */ -+ select_peripheral(PC(21), PERIPH_A, 0); /* PCLK */ -+ select_peripheral(PC(22), PERIPH_A, 0); /* VSYNC */ -+ select_peripheral(PC(23), PERIPH_A, 0); /* DVAL */ -+ select_peripheral(PC(24), PERIPH_A, 0); /* MODE */ -+ select_peripheral(PC(25), PERIPH_A, 0); /* PWR */ -+ select_peripheral(PC(26), PERIPH_A, 0); /* DATA0 */ -+ select_peripheral(PC(27), PERIPH_A, 0); /* DATA1 */ -+ select_peripheral(PC(28), PERIPH_A, 0); /* DATA2 */ -+ select_peripheral(PC(29), PERIPH_A, 0); /* DATA3 */ -+ select_peripheral(PC(30), PERIPH_A, 0); /* DATA4 */ -+ select_peripheral(PC(31), PERIPH_A, 0); /* DATA5 */ -+ select_peripheral(PD(0), PERIPH_A, 0); /* DATA6 */ -+ select_peripheral(PD(1), PERIPH_A, 0); /* DATA7 */ -+ select_peripheral(PD(2), PERIPH_A, 0); /* DATA8 */ -+ select_peripheral(PD(3), PERIPH_A, 0); /* DATA9 */ -+ select_peripheral(PD(4), PERIPH_A, 0); /* DATA10 */ -+ select_peripheral(PD(5), PERIPH_A, 0); /* DATA11 */ -+ select_peripheral(PD(6), PERIPH_A, 0); /* DATA12 */ -+ select_peripheral(PD(7), PERIPH_A, 0); /* DATA13 */ -+ select_peripheral(PD(8), PERIPH_A, 0); /* DATA14 */ -+ select_peripheral(PD(9), PERIPH_A, 0); /* DATA15 */ -+ select_peripheral(PD(10), PERIPH_A, 0); /* DATA16 */ -+ select_peripheral(PD(11), PERIPH_A, 0); /* DATA17 */ -+ select_peripheral(PD(12), PERIPH_A, 0); /* DATA18 */ -+ select_peripheral(PD(13), PERIPH_A, 0); /* DATA19 */ -+ select_peripheral(PD(14), PERIPH_A, 0); /* DATA20 */ -+ select_peripheral(PD(15), PERIPH_A, 0); /* DATA21 */ -+ select_peripheral(PD(16), PERIPH_A, 0); /* DATA22 */ -+ select_peripheral(PD(17), PERIPH_A, 0); /* DATA23 */ -+ -+ clk_set_parent(&atmel_lcdfb0_pixclk, &pll0); -+ clk_set_rate(&atmel_lcdfb0_pixclk, clk_get_rate(&pll0)); -+ break; -+ -+ default: -+ goto err_invalid_id; -+ } -+ -+ if (fbmem_len) { -+ pdev->resource[2].start = fbmem_start; -+ pdev->resource[2].end = fbmem_start + fbmem_len - 1; -+ pdev->resource[2].flags = IORESOURCE_MEM; -+ } -+ -+ info = pdev->dev.platform_data; -+ memcpy(info, data, sizeof(struct atmel_lcdfb_info)); -+ info->default_monspecs = monspecs; -+ -+ platform_device_register(pdev); -+ return pdev; -+ -+err_invalid_id: -+ kfree(modedb); -+err_dup_modedb: -+ kfree(monspecs); -+ return NULL; -+} -+#endif -+ -+/* -------------------------------------------------------------------- -+ * SSC -+ * -------------------------------------------------------------------- */ -+static struct resource ssc0_resource[] = { -+ PBMEM(0xffe01c00), -+ IRQ(10), -+}; -+DEFINE_DEV(ssc, 0); -+DEV_CLK(pclk, ssc0, pba, 7); -+ -+static struct resource ssc1_resource[] = { -+ PBMEM(0xffe02000), -+ IRQ(11), -+}; -+DEFINE_DEV(ssc, 1); -+DEV_CLK(pclk, ssc1, pba, 8); -+ -+static struct resource ssc2_resource[] = { -+ PBMEM(0xffe02400), -+ IRQ(12), -+}; -+DEFINE_DEV(ssc, 2); -+DEV_CLK(pclk, ssc2, pba, 9); -+ -+struct platform_device *__init -+at32_add_device_ssc(unsigned int id, unsigned int flags) -+{ -+ struct platform_device *pdev; -+ -+ switch (id) { -+ case 0: -+ pdev = &ssc0_device; -+ if (flags & ATMEL_SSC_RF) -+ select_peripheral(PA(21), PERIPH_A, 0); /* RF */ -+ if (flags & ATMEL_SSC_RK) -+ select_peripheral(PA(22), PERIPH_A, 0); /* RK */ -+ if (flags & ATMEL_SSC_TK) -+ select_peripheral(PA(23), PERIPH_A, 0); /* TK */ -+ if (flags & ATMEL_SSC_TF) -+ select_peripheral(PA(24), PERIPH_A, 0); /* TF */ -+ if (flags & ATMEL_SSC_TD) -+ select_peripheral(PA(25), PERIPH_A, 0); /* TD */ -+ if (flags & ATMEL_SSC_RD) -+ select_peripheral(PA(26), PERIPH_A, 0); /* RD */ -+ break; -+ case 1: -+ pdev = &ssc1_device; -+ if (flags & ATMEL_SSC_RF) -+ select_peripheral(PA(0), PERIPH_B, 0); /* RF */ -+ if (flags & ATMEL_SSC_RK) -+ select_peripheral(PA(1), PERIPH_B, 0); /* RK */ -+ if (flags & ATMEL_SSC_TK) -+ select_peripheral(PA(2), PERIPH_B, 0); /* TK */ -+ if (flags & ATMEL_SSC_TF) -+ select_peripheral(PA(3), PERIPH_B, 0); /* TF */ -+ if (flags & ATMEL_SSC_TD) -+ select_peripheral(PA(4), PERIPH_B, 0); /* TD */ -+ if (flags & ATMEL_SSC_RD) -+ select_peripheral(PA(5), PERIPH_B, 0); /* RD */ -+ break; -+ case 2: -+ pdev = &ssc2_device; -+ if (flags & ATMEL_SSC_TD) -+ select_peripheral(PB(13), PERIPH_A, 0); /* TD */ -+ if (flags & ATMEL_SSC_RD) -+ select_peripheral(PB(14), PERIPH_A, 0); /* RD */ -+ if (flags & ATMEL_SSC_TK) -+ select_peripheral(PB(15), PERIPH_A, 0); /* TK */ -+ if (flags & ATMEL_SSC_TF) -+ select_peripheral(PB(16), PERIPH_A, 0); /* TF */ -+ if (flags & ATMEL_SSC_RF) -+ select_peripheral(PB(17), PERIPH_A, 0); /* RF */ -+ if (flags & ATMEL_SSC_RK) -+ select_peripheral(PB(18), PERIPH_A, 0); /* RK */ -+ break; -+ default: -+ return NULL; -+ } -+ -+ platform_device_register(pdev); -+ return pdev; -+} -+ -+/* -------------------------------------------------------------------- -+ * USB Device Controller -+ * -------------------------------------------------------------------- */ -+static struct resource usba0_resource[] __initdata = { -+ { -+ .start = 0xff300000, -+ .end = 0xff3fffff, -+ .flags = IORESOURCE_MEM, -+ }, { -+ .start = 0xfff03000, -+ .end = 0xfff033ff, -+ .flags = IORESOURCE_MEM, -+ }, -+ IRQ(31), -+}; -+static struct clk usba0_pclk = { -+ .name = "pclk", -+ .parent = &pbb_clk, -+ .mode = pbb_clk_mode, -+ .get_rate = pbb_clk_get_rate, -+ .index = 12, -+}; -+static struct clk usba0_hclk = { -+ .name = "hclk", -+ .parent = &hsb_clk, -+ .mode = hsb_clk_mode, -+ .get_rate = hsb_clk_get_rate, -+ .index = 6, -+}; -+ -+struct platform_device *__init -+at32_add_device_usba(unsigned int id, struct usba_platform_data *data) -+{ -+ struct platform_device *pdev; -+ -+ if (id != 0) -+ return NULL; -+ -+ pdev = platform_device_alloc("atmel_usba_udc", 0); -+ if (!pdev) -+ return NULL; -+ -+ if (platform_device_add_resources(pdev, usba0_resource, -+ ARRAY_SIZE(usba0_resource))) -+ goto out_free_pdev; -+ -+ if (data) { -+ if (platform_device_add_data(pdev, data, sizeof(*data))) -+ goto out_free_pdev; -+ -+ if (data->vbus_pin != GPIO_PIN_NONE) -+ at32_select_gpio(data->vbus_pin, 0); -+ } -+ -+ usba0_pclk.dev = &pdev->dev; -+ usba0_hclk.dev = &pdev->dev; -+ -+ platform_device_add(pdev); -+ -+ return pdev; -+ -+out_free_pdev: -+ platform_device_put(pdev); -+ return NULL; -+} -+ -+/* -------------------------------------------------------------------- -+ * IDE / CompactFlash -+ * -------------------------------------------------------------------- */ -+#if defined(CONFIG_CPU_AT32AP7000) || defined(CONFIG_CPU_AT32AP7001) -+static struct resource at32_smc_cs4_resource[] __initdata = { -+ { -+ .start = 0x04000000, -+ .end = 0x07ffffff, -+ .flags = IORESOURCE_MEM, -+ }, -+ IRQ(~0UL), /* Magic IRQ will be overridden */ -+}; -+static struct resource at32_smc_cs5_resource[] __initdata = { -+ { -+ .start = 0x20000000, -+ .end = 0x23ffffff, -+ .flags = IORESOURCE_MEM, -+ }, -+ IRQ(~0UL), /* Magic IRQ will be overridden */ -+}; -+ -+static int __init at32_init_ide_or_cf(struct platform_device *pdev, -+ unsigned int cs, unsigned int extint) -+{ -+ static unsigned int extint_pin_map[4] __initdata = { -+ GPIO_PIN_PB(25), -+ GPIO_PIN_PB(26), -+ GPIO_PIN_PB(27), -+ GPIO_PIN_PB(28), -+ }; -+ static bool common_pins_initialized __initdata = false; -+ unsigned int extint_pin; -+ int ret; -+ -+ if (extint >= ARRAY_SIZE(extint_pin_map)) -+ return -EINVAL; -+ extint_pin = extint_pin_map[extint]; -+ -+ switch (cs) { -+ case 4: -+ ret = platform_device_add_resources(pdev, -+ at32_smc_cs4_resource, -+ ARRAY_SIZE(at32_smc_cs4_resource)); -+ if (ret) -+ return ret; -+ -+ select_peripheral(PE(21), PERIPH_A, 0); /* NCS4 -> OE_N */ -+ set_ebi_sfr_bits(HMATRIX_BIT(CS4A)); -+ break; -+ case 5: -+ ret = platform_device_add_resources(pdev, -+ at32_smc_cs5_resource, -+ ARRAY_SIZE(at32_smc_cs5_resource)); -+ if (ret) -+ return ret; -+ -+ select_peripheral(PE(22), PERIPH_A, 0); /* NCS5 -> OE_N */ -+ set_ebi_sfr_bits(HMATRIX_BIT(CS5A)); -+ break; -+ default: -+ return -EINVAL; -+ } -+ -+ if (!common_pins_initialized) { -+ select_peripheral(PE(19), PERIPH_A, 0); /* CFCE1 -> CS0_N */ -+ select_peripheral(PE(20), PERIPH_A, 0); /* CFCE2 -> CS1_N */ -+ select_peripheral(PE(23), PERIPH_A, 0); /* CFRNW -> DIR */ -+ select_peripheral(PE(24), PERIPH_A, 0); /* NWAIT <- IORDY */ -+ common_pins_initialized = true; -+ } -+ -+ at32_select_periph(extint_pin, GPIO_PERIPH_A, AT32_GPIOF_DEGLITCH); -+ -+ pdev->resource[1].start = EIM_IRQ_BASE + extint; -+ pdev->resource[1].end = pdev->resource[1].start; -+ -+ return 0; -+} -+ -+struct platform_device *__init -+at32_add_device_ide(unsigned int id, unsigned int extint, -+ struct ide_platform_data *data) -+{ -+ struct platform_device *pdev; -+ -+ pdev = platform_device_alloc("at32_ide", id); -+ if (!pdev) -+ goto fail; -+ -+ if (platform_device_add_data(pdev, data, -+ sizeof(struct ide_platform_data))) -+ goto fail; -+ -+ if (at32_init_ide_or_cf(pdev, data->cs, extint)) -+ goto fail; -+ -+ platform_device_add(pdev); -+ return pdev; -+ -+fail: -+ platform_device_put(pdev); -+ return NULL; -+} -+ -+struct platform_device *__init -+at32_add_device_cf(unsigned int id, unsigned int extint, -+ struct cf_platform_data *data) -+{ -+ struct platform_device *pdev; -+ -+ pdev = platform_device_alloc("at32_cf", id); -+ if (!pdev) -+ goto fail; -+ -+ if (platform_device_add_data(pdev, data, -+ sizeof(struct cf_platform_data))) -+ goto fail; -+ -+ if (at32_init_ide_or_cf(pdev, data->cs, extint)) -+ goto fail; -+ -+ if (data->detect_pin != GPIO_PIN_NONE) -+ at32_select_gpio(data->detect_pin, AT32_GPIOF_DEGLITCH); -+ if (data->reset_pin != GPIO_PIN_NONE) -+ at32_select_gpio(data->reset_pin, 0); -+ if (data->vcc_pin != GPIO_PIN_NONE) -+ at32_select_gpio(data->vcc_pin, 0); -+ /* READY is used as extint, so we can't select it as gpio */ -+ -+ platform_device_add(pdev); -+ return pdev; -+ -+fail: -+ platform_device_put(pdev); -+ return NULL; -+} -+#endif -+ -+/* -------------------------------------------------------------------- -+ * AC97C -+ * -------------------------------------------------------------------- */ -+static struct resource atmel_ac97c0_resource[] __initdata = { -+ PBMEM(0xfff02800), -+ IRQ(29), -+}; -+static struct clk atmel_ac97c0_pclk = { -+ .name = "pclk", -+ .parent = &pbb_clk, -+ .mode = pbb_clk_mode, -+ .get_rate = pbb_clk_get_rate, -+ .index = 10, -+}; -+ -+struct platform_device *__init at32_add_device_ac97c(unsigned int id) -+{ -+ struct platform_device *pdev; -+ -+ if (id != 0) -+ return NULL; -+ -+ pdev = platform_device_alloc("atmel_ac97c", id); -+ if (!pdev) -+ return NULL; -+ -+ if (platform_device_add_resources(pdev, atmel_ac97c0_resource, -+ ARRAY_SIZE(atmel_ac97c0_resource))) -+ goto err_add_resources; -+ -+ select_peripheral(PB(20), PERIPH_B, 0); /* SYNC */ -+ select_peripheral(PB(21), PERIPH_B, 0); /* SDO */ -+ select_peripheral(PB(22), PERIPH_B, 0); /* SDI */ -+ select_peripheral(PB(23), PERIPH_B, 0); /* SCLK */ -+ -+ atmel_ac97c0_pclk.dev = &pdev->dev; -+ -+ platform_device_add(pdev); -+ return pdev; -+ -+err_add_resources: -+ platform_device_put(pdev); -+ return NULL; -+} -+ -+/* -------------------------------------------------------------------- -+ * ABDAC -+ * -------------------------------------------------------------------- */ -+static struct resource abdac0_resource[] __initdata = { -+ PBMEM(0xfff02000), -+ IRQ(27), -+}; -+static struct clk abdac0_pclk = { -+ .name = "pclk", -+ .parent = &pbb_clk, -+ .mode = pbb_clk_mode, -+ .get_rate = pbb_clk_get_rate, -+ .index = 8, -+}; -+static struct clk abdac0_sample_clk = { -+ .name = "sample_clk", -+ .mode = genclk_mode, -+ .get_rate = genclk_get_rate, -+ .set_rate = genclk_set_rate, -+ .set_parent = genclk_set_parent, -+ .index = 6, -+}; -+ -+struct platform_device *__init at32_add_device_abdac(unsigned int id) -+{ -+ struct platform_device *pdev; -+ -+ if (id != 0) -+ return NULL; -+ -+ pdev = platform_device_alloc("abdac", id); -+ if (!pdev) -+ return NULL; -+ -+ if (platform_device_add_resources(pdev, abdac0_resource, -+ ARRAY_SIZE(abdac0_resource))) -+ goto err_add_resources; -+ -+ select_peripheral(PB(20), PERIPH_A, 0); /* DATA1 */ -+ select_peripheral(PB(21), PERIPH_A, 0); /* DATA0 */ -+ select_peripheral(PB(22), PERIPH_A, 0); /* DATAN1 */ -+ select_peripheral(PB(23), PERIPH_A, 0); /* DATAN0 */ -+ -+ abdac0_pclk.dev = &pdev->dev; -+ abdac0_sample_clk.dev = &pdev->dev; -+ -+ platform_device_add(pdev); -+ return pdev; -+ -+err_add_resources: -+ platform_device_put(pdev); -+ return NULL; -+} -+ -+/* -------------------------------------------------------------------- -+ * GCLK -+ * -------------------------------------------------------------------- */ -+static struct clk gclk0 = { -+ .name = "gclk0", -+ .mode = genclk_mode, -+ .get_rate = genclk_get_rate, -+ .set_rate = genclk_set_rate, -+ .set_parent = genclk_set_parent, -+ .index = 0, -+}; -+static struct clk gclk1 = { -+ .name = "gclk1", -+ .mode = genclk_mode, -+ .get_rate = genclk_get_rate, -+ .set_rate = genclk_set_rate, -+ .set_parent = genclk_set_parent, -+ .index = 1, -+}; -+static struct clk gclk2 = { -+ .name = "gclk2", -+ .mode = genclk_mode, -+ .get_rate = genclk_get_rate, -+ .set_rate = genclk_set_rate, -+ .set_parent = genclk_set_parent, -+ .index = 2, -+}; -+static struct clk gclk3 = { -+ .name = "gclk3", -+ .mode = genclk_mode, -+ .get_rate = genclk_get_rate, -+ .set_rate = genclk_set_rate, -+ .set_parent = genclk_set_parent, -+ .index = 3, -+}; -+static struct clk gclk4 = { -+ .name = "gclk4", -+ .mode = genclk_mode, -+ .get_rate = genclk_get_rate, -+ .set_rate = genclk_set_rate, -+ .set_parent = genclk_set_parent, -+ .index = 4, -+}; -+ -+struct clk *at32_clock_list[] = { -+ &osc32k, -+ &osc0, -+ &osc1, -+ &pll0, -+ &pll1, -+ &cpu_clk, -+ &hsb_clk, -+ &pba_clk, -+ &pbb_clk, -+ &at32_pm_pclk, -+ &at32_intc0_pclk, -+ &hmatrix_clk, -+ &ebi_clk, -+ &hramc_clk, -+ &smc0_pclk, -+ &smc0_mck, -+ &pdc_hclk, -+ &pdc_pclk, -+ &dmaca0_hclk, -+ &pico_clk, -+ &pio0_mck, -+ &pio1_mck, -+ &pio2_mck, -+ &pio3_mck, -+ &pio4_mck, -+ &at32_systc0_pclk, -+ &atmel_usart0_usart, -+ &atmel_usart1_usart, -+ &atmel_usart2_usart, -+ &atmel_usart3_usart, -+#if defined(CONFIG_CPU_AT32AP7000) -+ &macb0_hclk, -+ &macb0_pclk, -+ &macb1_hclk, -+ &macb1_pclk, -+#endif -+ &atmel_spi0_spi_clk, -+ &atmel_spi1_spi_clk, -+ &atmel_twi0_pclk, -+ &atmel_mci0_pclk, -+#if defined(CONFIG_CPU_AT32AP7000) || defined(CONFIG_CPU_AT32AP7002) -+ &atmel_lcdfb0_hck1, -+ &atmel_lcdfb0_pixclk, -+#endif -+ &ssc0_pclk, -+ &ssc1_pclk, -+ &ssc2_pclk, -+ &usba0_hclk, -+ &usba0_pclk, -+ &atmel_ac97c0_pclk, -+ &abdac0_pclk, -+ &abdac0_sample_clk, -+ &gclk0, -+ &gclk1, -+ &gclk2, -+ &gclk3, -+ &gclk4, -+}; -+unsigned int at32_nr_clocks = ARRAY_SIZE(at32_clock_list); -+ -+void __init at32_portmux_init(void) -+{ -+ at32_init_pio(&pio0_device); -+ at32_init_pio(&pio1_device); -+ at32_init_pio(&pio2_device); -+ at32_init_pio(&pio3_device); -+ at32_init_pio(&pio4_device); -+} -+ -+void __init at32_clock_init(void) -+{ -+ u32 cpu_mask = 0, hsb_mask = 0, pba_mask = 0, pbb_mask = 0; -+ int i; -+ -+ if (pm_readl(MCCTRL) & PM_BIT(PLLSEL)) { -+ main_clock = &pll0; -+ cpu_clk.parent = &pll0; -+ } else { -+ main_clock = &osc0; -+ cpu_clk.parent = &osc0; -+ } -+ -+ if (pm_readl(PLL0) & PM_BIT(PLLOSC)) -+ pll0.parent = &osc1; -+ if (pm_readl(PLL1) & PM_BIT(PLLOSC)) -+ pll1.parent = &osc1; -+ -+ genclk_init_parent(&gclk0); -+ genclk_init_parent(&gclk1); -+ genclk_init_parent(&gclk2); -+ genclk_init_parent(&gclk3); -+ genclk_init_parent(&gclk4); -+#if defined(CONFIG_CPU_AT32AP7000) || defined(CONFIG_CPU_AT32AP7002) -+ genclk_init_parent(&atmel_lcdfb0_pixclk); -+#endif -+ genclk_init_parent(&abdac0_sample_clk); -+ -+ /* -+ * Turn on all clocks that have at least one user already, and -+ * turn off everything else. We only do this for module -+ * clocks, and even though it isn't particularly pretty to -+ * check the address of the mode function, it should do the -+ * trick... -+ */ -+ for (i = 0; i < ARRAY_SIZE(at32_clock_list); i++) { -+ struct clk *clk = at32_clock_list[i]; -+ -+ if (clk->users == 0) -+ continue; -+ -+ if (clk->mode == &cpu_clk_mode) -+ cpu_mask |= 1 << clk->index; -+ else if (clk->mode == &hsb_clk_mode) -+ hsb_mask |= 1 << clk->index; -+ else if (clk->mode == &pba_clk_mode) -+ pba_mask |= 1 << clk->index; -+ else if (clk->mode == &pbb_clk_mode) -+ pbb_mask |= 1 << clk->index; -+ } -+ -+ pm_writel(CPU_MASK, cpu_mask); -+ pm_writel(HSB_MASK, hsb_mask); -+ pm_writel(PBA_MASK, pba_mask); -+ pm_writel(PBB_MASK, pbb_mask); -+} -diff --git a/arch/avr32/mach-at32ap/clock.c b/arch/avr32/mach-at32ap/clock.c -index 0f8c89c..4642117 100644 ---- a/arch/avr32/mach-at32ap/clock.c -+++ b/arch/avr32/mach-at32ap/clock.c -@@ -150,3 +150,119 @@ struct clk *clk_get_parent(struct clk *clk) - return clk->parent; - } - EXPORT_SYMBOL(clk_get_parent); -+ -+ -+ -+#ifdef CONFIG_DEBUG_FS -+ -+/* /sys/kernel/debug/at32ap_clk */ -+ -+#include <linux/io.h> -+#include <linux/debugfs.h> -+#include <linux/seq_file.h> -+#include "pm.h" -+ -+ -+#define NEST_DELTA 2 -+#define NEST_MAX 6 -+ -+struct clkinf { -+ struct seq_file *s; -+ unsigned nest; -+}; -+ -+static void -+dump_clock(struct clk *parent, struct clkinf *r) -+{ -+ unsigned nest = r->nest; -+ char buf[16 + NEST_MAX]; -+ struct clk *clk; -+ unsigned i; -+ -+ /* skip clocks coupled to devices that aren't registered */ -+ if (parent->dev && !parent->dev->bus_id[0] && !parent->users) -+ return; -+ -+ /* <nest spaces> name <pad to end> */ -+ memset(buf, ' ', sizeof(buf) - 1); -+ buf[sizeof(buf) - 1] = 0; -+ i = strlen(parent->name); -+ memcpy(buf + nest, parent->name, -+ min(i, (unsigned)(sizeof(buf) - 1 - nest))); -+ -+ seq_printf(r->s, "%s%c users=%2d %-3s %9ld Hz", -+ buf, parent->set_parent ? '*' : ' ', -+ parent->users, -+ parent->users ? "on" : "off", /* NOTE: not-paranoid!! */ -+ clk_get_rate(parent)); -+ if (parent->dev) -+ seq_printf(r->s, ", for %s", parent->dev->bus_id); -+ seq_printf(r->s, "\n"); -+ -+ /* cost of this scan is small, but not linear... */ -+ r->nest = nest + NEST_DELTA; -+ for (i = 3; i < at32_nr_clocks; i++) { -+ clk = at32_clock_list[i]; -+ if (clk->parent == parent) -+ dump_clock(clk, r); -+ } -+ r->nest = nest; -+} -+ -+static int clk_show(struct seq_file *s, void *unused) -+{ -+ struct clkinf r; -+ int i; -+ -+ /* show all the power manager registers */ -+ seq_printf(s, "MCCTRL = %8x\n", pm_readl(MCCTRL)); -+ seq_printf(s, "CKSEL = %8x\n", pm_readl(CKSEL)); -+ seq_printf(s, "CPUMASK = %8x\n", pm_readl(CPU_MASK)); -+ seq_printf(s, "HSBMASK = %8x\n", pm_readl(HSB_MASK)); -+ seq_printf(s, "PBAMASK = %8x\n", pm_readl(PBA_MASK)); -+ seq_printf(s, "PBBMASK = %8x\n", pm_readl(PBB_MASK)); -+ seq_printf(s, "PLL0 = %8x\n", pm_readl(PLL0)); -+ seq_printf(s, "PLL1 = %8x\n", pm_readl(PLL1)); -+ seq_printf(s, "IMR = %8x\n", pm_readl(IMR)); -+ for (i = 0; i < 8; i++) { -+ if (i == 5) -+ continue; -+ seq_printf(s, "GCCTRL%d = %8x\n", i, pm_readl(GCCTRL(i))); -+ } -+ -+ seq_printf(s, "\n"); -+ -+ /* show clock tree as derived from the three oscillators -+ * we "know" are at the head of the list -+ */ -+ r.s = s; -+ r.nest = 0; -+ dump_clock(at32_clock_list[0], &r); -+ dump_clock(at32_clock_list[1], &r); -+ dump_clock(at32_clock_list[2], &r); -+ -+ return 0; -+} -+ -+static int clk_open(struct inode *inode, struct file *file) -+{ -+ return single_open(file, clk_show, NULL); -+} -+ -+static const struct file_operations clk_operations = { -+ .open = clk_open, -+ .read = seq_read, -+ .llseek = seq_lseek, -+ .release = single_release, -+}; -+ -+static int __init clk_debugfs_init(void) -+{ -+ (void) debugfs_create_file("at32ap_clk", S_IFREG | S_IRUGO, -+ NULL, NULL, &clk_operations); -+ -+ return 0; -+} -+postcore_initcall(clk_debugfs_init); -+ -+#endif -diff --git a/arch/avr32/mach-at32ap/gpio-dev.c b/arch/avr32/mach-at32ap/gpio-dev.c -new file mode 100644 -index 0000000..8cf6d11 ---- /dev/null -+++ b/arch/avr32/mach-at32ap/gpio-dev.c -@@ -0,0 +1,573 @@ -+/* -+ * GPIO /dev and configfs interface -+ * -+ * Copyright (C) 2006-2007 Atmel Corporation -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 as -+ * published by the Free Software Foundation. -+ */ -+#include <linux/kernel.h> -+#include <linux/configfs.h> -+#include <linux/cdev.h> -+#include <linux/device.h> -+#include <linux/fs.h> -+#include <linux/interrupt.h> -+#include <linux/module.h> -+#include <linux/poll.h> -+#include <linux/uaccess.h> -+#include <linux/wait.h> -+ -+#include <asm/gpio.h> -+#include <asm/arch/portmux.h> -+ -+#define GPIO_DEV_MAX 8 -+ -+static struct class *gpio_dev_class; -+static dev_t gpio_devt; -+ -+struct gpio_item { -+ spinlock_t lock; -+ -+ int enabled; -+ int initialized; -+ int port; -+ u32 pin_mask; -+ u32 oe_mask; -+ -+ /* Pin state last time we read it (for blocking reads) */ -+ u32 pin_state; -+ int changed; -+ -+ wait_queue_head_t change_wq; -+ struct fasync_struct *async_queue; -+ -+ int id; -+ struct class_device *gpio_dev; -+ struct cdev char_dev; -+ struct config_item item; -+}; -+ -+struct gpio_attribute { -+ struct configfs_attribute attr; -+ ssize_t (*show)(struct gpio_item *, char *); -+ ssize_t (*store)(struct gpio_item *, const char *, size_t); -+}; -+ -+static irqreturn_t gpio_dev_interrupt(int irq, void *dev_id) -+{ -+ struct gpio_item *gpio = dev_id; -+ u32 old_state, new_state; -+ -+ old_state = gpio->pin_state; -+ new_state = at32_gpio_get_value_multiple(gpio->port, gpio->pin_mask); -+ gpio->pin_state = new_state; -+ -+ if (new_state != old_state) { -+ gpio->changed = 1; -+ wake_up_interruptible(&gpio->change_wq); -+ -+ if (gpio->async_queue) -+ kill_fasync(&gpio->async_queue, SIGIO, POLL_IN); -+ } -+ -+ return IRQ_HANDLED; -+} -+ -+static int gpio_dev_open(struct inode *inode, struct file *file) -+{ -+ struct gpio_item *gpio = container_of(inode->i_cdev, -+ struct gpio_item, -+ char_dev); -+ unsigned int irq; -+ unsigned int i; -+ int ret; -+ -+ nonseekable_open(inode, file); -+ config_item_get(&gpio->item); -+ file->private_data = gpio; -+ -+ gpio->pin_state = at32_gpio_get_value_multiple(gpio->port, -+ gpio->pin_mask); -+ gpio->changed = 1; -+ -+ for (i = 0; i < 32; i++) { -+ if (gpio->pin_mask & (1 << i)) { -+ irq = gpio_to_irq(32 * gpio->port + i); -+ ret = request_irq(irq, gpio_dev_interrupt, 0, -+ "gpio-dev", gpio); -+ if (ret) -+ goto err_irq; -+ } -+ } -+ -+ return 0; -+ -+err_irq: -+ while (i--) { -+ if (gpio->pin_mask & (1 << i)) { -+ irq = gpio_to_irq(32 * gpio->port + i); -+ free_irq(irq, gpio); -+ } -+ } -+ -+ config_item_put(&gpio->item); -+ -+ return ret; -+} -+ -+static int gpio_dev_fasync(int fd, struct file *file, int mode) -+{ -+ struct gpio_item *gpio = file->private_data; -+ -+ return fasync_helper(fd, file, mode, &gpio->async_queue); -+} -+ -+static int gpio_dev_release(struct inode *inode, struct file *file) -+{ -+ struct gpio_item *gpio = file->private_data; -+ unsigned int irq; -+ unsigned int i; -+ -+ gpio_dev_fasync(-1, file, 0); -+ -+ for (i = 0; i < 32; i++) { -+ if (gpio->pin_mask & (1 << i)) { -+ irq = gpio_to_irq(32 * gpio->port + i); -+ free_irq(irq, gpio); -+ } -+ } -+ -+ config_item_put(&gpio->item); -+ -+ return 0; -+} -+ -+static unsigned int gpio_dev_poll(struct file *file, poll_table *wait) -+{ -+ struct gpio_item *gpio = file->private_data; -+ unsigned int mask = 0; -+ -+ poll_wait(file, &gpio->change_wq, wait); -+ if (gpio->changed) -+ mask |= POLLIN | POLLRDNORM; -+ -+ return mask; -+} -+ -+static ssize_t gpio_dev_read(struct file *file, char __user *buf, -+ size_t count, loff_t *offset) -+{ -+ struct gpio_item *gpio = file->private_data; -+ u32 value; -+ -+ spin_lock_irq(&gpio->lock); -+ while (!gpio->changed) { -+ spin_unlock_irq(&gpio->lock); -+ -+ if (file->f_flags & O_NONBLOCK) -+ return -EAGAIN; -+ -+ if (wait_event_interruptible(gpio->change_wq, gpio->changed)) -+ return -ERESTARTSYS; -+ -+ spin_lock_irq(&gpio->lock); -+ } -+ -+ gpio->changed = 0; -+ value = at32_gpio_get_value_multiple(gpio->port, gpio->pin_mask); -+ -+ spin_unlock_irq(&gpio->lock); -+ -+ count = min(count, (size_t)4); -+ if (copy_to_user(buf, &value, count)) -+ return -EFAULT; -+ -+ return count; -+} -+ -+static ssize_t gpio_dev_write(struct file *file, const char __user *buf, -+ size_t count, loff_t *offset) -+{ -+ struct gpio_item *gpio = file->private_data; -+ u32 value = 0; -+ u32 mask = ~0UL; -+ -+ count = min(count, (size_t)4); -+ if (copy_from_user(&value, buf, count)) -+ return -EFAULT; -+ -+ /* Assuming big endian */ -+ mask <<= (4 - count) * 8; -+ mask &= gpio->pin_mask; -+ -+ at32_gpio_set_value_multiple(gpio->port, value, mask); -+ -+ return count; -+} -+ -+static struct file_operations gpio_dev_fops = { -+ .owner = THIS_MODULE, -+ .llseek = no_llseek, -+ .open = gpio_dev_open, -+ .release = gpio_dev_release, -+ .fasync = gpio_dev_fasync, -+ .poll = gpio_dev_poll, -+ .read = gpio_dev_read, -+ .write = gpio_dev_write, -+}; -+ -+static struct gpio_item *to_gpio_item(struct config_item *item) -+{ -+ return item ? container_of(item, struct gpio_item, item) : NULL; -+} -+ -+static ssize_t gpio_show_gpio_id(struct gpio_item *gpio, char *page) -+{ -+ return sprintf(page, "%d\n", gpio->port); -+} -+ -+static ssize_t gpio_store_gpio_id(struct gpio_item *gpio, -+ const char *page, size_t count) -+{ -+ unsigned long id; -+ char *p = (char *)page; -+ ssize_t ret = -EINVAL; -+ -+ id = simple_strtoul(p, &p, 0); -+ if (!p || (*p && (*p != '\n'))) -+ return -EINVAL; -+ -+ /* Switching PIO is not allowed when live... */ -+ spin_lock(&gpio->lock); -+ if (!gpio->enabled) { -+ ret = -ENXIO; -+ if (at32_gpio_port_is_valid(id)) { -+ gpio->port = id; -+ ret = count; -+ } -+ } -+ spin_unlock(&gpio->lock); -+ -+ return ret; -+} -+ -+static ssize_t gpio_show_pin_mask(struct gpio_item *gpio, char *page) -+{ -+ return sprintf(page, "0x%08x\n", gpio->pin_mask); -+} -+ -+static ssize_t gpio_store_pin_mask(struct gpio_item *gpio, -+ const char *page, size_t count) -+{ -+ u32 new_mask; -+ char *p = (char *)page; -+ ssize_t ret = -EINVAL; -+ -+ new_mask = simple_strtoul(p, &p, 0); -+ if (!p || (*p && (*p != '\n'))) -+ return -EINVAL; -+ -+ /* Can't update the pin mask while live. */ -+ spin_lock(&gpio->lock); -+ if (!gpio->enabled) { -+ gpio->oe_mask &= new_mask; -+ gpio->pin_mask = new_mask; -+ ret = count; -+ } -+ spin_unlock(&gpio->lock); -+ -+ return ret; -+} -+ -+static ssize_t gpio_show_oe_mask(struct gpio_item *gpio, char *page) -+{ -+ return sprintf(page, "0x%08x\n", gpio->oe_mask); -+} -+ -+static ssize_t gpio_store_oe_mask(struct gpio_item *gpio, -+ const char *page, size_t count) -+{ -+ u32 mask; -+ char *p = (char *)page; -+ ssize_t ret = -EINVAL; -+ -+ mask = simple_strtoul(p, &p, 0); -+ if (!p || (*p && (*p != '\n'))) -+ return -EINVAL; -+ -+ spin_lock(&gpio->lock); -+ if (!gpio->enabled) { -+ gpio->oe_mask = mask & gpio->pin_mask; -+ ret = count; -+ } -+ spin_unlock(&gpio->lock); -+ -+ return ret; -+} -+ -+static ssize_t gpio_show_enabled(struct gpio_item *gpio, char *page) -+{ -+ return sprintf(page, "%d\n", gpio->enabled); -+} -+ -+static ssize_t gpio_store_enabled(struct gpio_item *gpio, -+ const char *page, size_t count) -+{ -+ char *p = (char *)page; -+ int enabled; -+ int ret; -+ -+ enabled = simple_strtoul(p, &p, 0); -+ if (!p || (*p && (*p != '\n'))) -+ return -EINVAL; -+ -+ /* make it a boolean value */ -+ enabled = !!enabled; -+ -+ if (gpio->enabled == enabled) -+ /* No change; do nothing. */ -+ return count; -+ -+ BUG_ON(gpio->id >= GPIO_DEV_MAX); -+ -+ if (!enabled) { -+ class_device_unregister(gpio->gpio_dev); -+ cdev_del(&gpio->char_dev); -+ at32_deselect_pins(gpio->port, gpio->pin_mask); -+ gpio->initialized = 0; -+ } else { -+ if (gpio->port < 0 || !gpio->pin_mask) -+ return -ENODEV; -+ } -+ -+ /* Disallow any updates to gpio_id or pin_mask */ -+ spin_lock(&gpio->lock); -+ gpio->enabled = enabled; -+ spin_unlock(&gpio->lock); -+ -+ if (!enabled) -+ return count; -+ -+ /* Now, try to allocate the pins */ -+ ret = at32_select_gpio_pins(gpio->port, gpio->pin_mask, gpio->oe_mask); -+ if (ret) -+ goto err_alloc_pins; -+ -+ gpio->initialized = 1; -+ -+ cdev_init(&gpio->char_dev, &gpio_dev_fops); -+ gpio->char_dev.owner = THIS_MODULE; -+ ret = cdev_add(&gpio->char_dev, MKDEV(MAJOR(gpio_devt), gpio->id), 1); -+ if (ret < 0) -+ goto err_cdev_add; -+ gpio->gpio_dev = class_device_create(gpio_dev_class, NULL, -+ MKDEV(MAJOR(gpio_devt), gpio->id), -+ NULL, -+ "gpio%d", gpio->id); -+ if (IS_ERR(gpio->gpio_dev)) { -+ printk(KERN_ERR "failed to create gpio%d\n", gpio->id); -+ ret = PTR_ERR(gpio->gpio_dev); -+ goto err_class_dev; -+ } -+ -+ printk(KERN_INFO "created gpio%d (port%d/0x%08x) as (%d:%d)\n", -+ gpio->id, gpio->port, gpio->pin_mask, -+ MAJOR(gpio->gpio_dev->devt), MINOR(gpio->gpio_dev->devt)); -+ -+ return 0; -+ -+err_class_dev: -+ cdev_del(&gpio->char_dev); -+err_cdev_add: -+ at32_deselect_pins(gpio->port, gpio->pin_mask); -+ gpio->initialized = 0; -+err_alloc_pins: -+ spin_lock(&gpio->lock); -+ gpio->enabled = 0; -+ spin_unlock(&gpio->lock); -+ -+ return ret; -+} -+ -+static struct gpio_attribute gpio_item_attr_gpio_id = { -+ .attr = { -+ .ca_owner = THIS_MODULE, -+ .ca_name = "gpio_id", -+ .ca_mode = S_IRUGO | S_IWUSR, -+ }, -+ .show = gpio_show_gpio_id, -+ .store = gpio_store_gpio_id, -+}; -+static struct gpio_attribute gpio_item_attr_pin_mask = { -+ .attr = { -+ .ca_owner = THIS_MODULE, -+ .ca_name = "pin_mask", -+ .ca_mode = S_IRUGO | S_IWUSR, -+ }, -+ .show = gpio_show_pin_mask, -+ .store = gpio_store_pin_mask, -+}; -+static struct gpio_attribute gpio_item_attr_oe_mask = { -+ .attr = { -+ .ca_owner = THIS_MODULE, -+ .ca_name = "oe_mask", -+ .ca_mode = S_IRUGO | S_IWUSR, -+ }, -+ .show = gpio_show_oe_mask, -+ .store = gpio_store_oe_mask, -+}; -+static struct gpio_attribute gpio_item_attr_enabled = { -+ .attr = { -+ .ca_owner = THIS_MODULE, -+ .ca_name = "enabled", -+ .ca_mode = S_IRUGO | S_IWUSR, -+ }, -+ .show = gpio_show_enabled, -+ .store = gpio_store_enabled, -+}; -+ -+static struct configfs_attribute *gpio_item_attrs[] = { -+ &gpio_item_attr_gpio_id.attr, -+ &gpio_item_attr_pin_mask.attr, -+ &gpio_item_attr_oe_mask.attr, -+ &gpio_item_attr_enabled.attr, -+ NULL, -+}; -+ -+static ssize_t gpio_show_attr(struct config_item *item, -+ struct configfs_attribute *attr, -+ char *page) -+{ -+ struct gpio_item *gpio_item = to_gpio_item(item); -+ struct gpio_attribute *gpio_attr -+ = container_of(attr, struct gpio_attribute, attr); -+ ssize_t ret = 0; -+ -+ if (gpio_attr->show) -+ ret = gpio_attr->show(gpio_item, page); -+ return ret; -+} -+ -+static ssize_t gpio_store_attr(struct config_item *item, -+ struct configfs_attribute *attr, -+ const char *page, size_t count) -+{ -+ struct gpio_item *gpio_item = to_gpio_item(item); -+ struct gpio_attribute *gpio_attr -+ = container_of(attr, struct gpio_attribute, attr); -+ ssize_t ret = -EINVAL; -+ -+ if (gpio_attr->store) -+ ret = gpio_attr->store(gpio_item, page, count); -+ return ret; -+} -+ -+static void gpio_release(struct config_item *item) -+{ -+ kfree(to_gpio_item(item)); -+} -+ -+static struct configfs_item_operations gpio_item_ops = { -+ .release = gpio_release, -+ .show_attribute = gpio_show_attr, -+ .store_attribute = gpio_store_attr, -+}; -+ -+static struct config_item_type gpio_item_type = { -+ .ct_item_ops = &gpio_item_ops, -+ .ct_attrs = gpio_item_attrs, -+ .ct_owner = THIS_MODULE, -+}; -+ -+static struct config_item *gpio_make_item(struct config_group *group, -+ const char *name) -+{ -+ static int next_id; -+ struct gpio_item *gpio; -+ -+ if (next_id >= GPIO_DEV_MAX) -+ return NULL; -+ -+ gpio = kzalloc(sizeof(struct gpio_item), GFP_KERNEL); -+ if (!gpio) -+ return NULL; -+ -+ gpio->id = next_id++; -+ config_item_init_type_name(&gpio->item, name, &gpio_item_type); -+ spin_lock_init(&gpio->lock); -+ init_waitqueue_head(&gpio->change_wq); -+ -+ return &gpio->item; -+} -+ -+static void gpio_drop_item(struct config_group *group, -+ struct config_item *item) -+{ -+ struct gpio_item *gpio = to_gpio_item(item); -+ -+ spin_lock(&gpio->lock); -+ if (gpio->enabled) { -+ class_device_unregister(gpio->gpio_dev); -+ cdev_del(&gpio->char_dev); -+ } -+ -+ if (gpio->initialized) { -+ at32_deselect_pins(gpio->port, gpio->pin_mask); -+ gpio->initialized = 0; -+ gpio->enabled = 0; -+ } -+ spin_unlock(&gpio->lock); -+} -+ -+static struct configfs_group_operations gpio_group_ops = { -+ .make_item = gpio_make_item, -+ .drop_item = gpio_drop_item, -+}; -+ -+static struct config_item_type gpio_group_type = { -+ .ct_group_ops = &gpio_group_ops, -+ .ct_owner = THIS_MODULE, -+}; -+ -+static struct configfs_subsystem gpio_subsys = { -+ .su_group = { -+ .cg_item = { -+ .ci_namebuf = "gpio", -+ .ci_type = &gpio_group_type, -+ }, -+ }, -+}; -+ -+static int __init gpio_dev_init(void) -+{ -+ int err; -+ -+ gpio_dev_class = class_create(THIS_MODULE, "gpio-dev"); -+ if (IS_ERR(gpio_dev_class)) { -+ err = PTR_ERR(gpio_dev_class); -+ goto err_class_create; -+ } -+ -+ err = alloc_chrdev_region(&gpio_devt, 0, GPIO_DEV_MAX, "gpio"); -+ if (err < 0) -+ goto err_alloc_chrdev; -+ -+ /* Configfs initialization */ -+ config_group_init(&gpio_subsys.su_group); -+ mutex_init(&gpio_subsys.su_mutex); -+ err = configfs_register_subsystem(&gpio_subsys); -+ if (err) -+ goto err_register_subsys; -+ -+ return 0; -+ -+err_register_subsys: -+ unregister_chrdev_region(gpio_devt, GPIO_DEV_MAX); -+err_alloc_chrdev: -+ class_destroy(gpio_dev_class); -+err_class_create: -+ printk(KERN_WARNING "Failed to initialize gpio /dev interface\n"); -+ return err; -+} -+late_initcall(gpio_dev_init); -diff --git a/arch/avr32/mach-at32ap/hsmc.c b/arch/avr32/mach-at32ap/hsmc.c -index 5e22a75..704607f 100644 ---- a/arch/avr32/mach-at32ap/hsmc.c -+++ b/arch/avr32/mach-at32ap/hsmc.c -@@ -29,16 +29,25 @@ struct hsmc { - - static struct hsmc *hsmc; - --int smc_set_configuration(int cs, const struct smc_config *config) -+void smc_set_timing(struct smc_config *config, -+ const struct smc_timing *timing) - { -+ int recover; -+ int cycle; -+ - unsigned long mul; -- unsigned long offset; -- u32 setup, pulse, cycle, mode; - -- if (!hsmc) -- return -ENODEV; -- if (cs >= NR_CHIP_SELECTS) -- return -EINVAL; -+ /* Reset all SMC timings */ -+ config->ncs_read_setup = 0; -+ config->nrd_setup = 0; -+ config->ncs_write_setup = 0; -+ config->nwe_setup = 0; -+ config->ncs_read_pulse = 0; -+ config->nrd_pulse = 0; -+ config->ncs_write_pulse = 0; -+ config->nwe_pulse = 0; -+ config->read_cycle = 0; -+ config->write_cycle = 0; - - /* - * cycles = x / T = x * f -@@ -50,16 +59,102 @@ int smc_set_configuration(int cs, const struct smc_config *config) - - #define ns2cyc(x) ((((x) * mul) + 65535) >> 16) - -- setup = (HSMC_BF(NWE_SETUP, ns2cyc(config->nwe_setup)) -- | HSMC_BF(NCS_WR_SETUP, ns2cyc(config->ncs_write_setup)) -- | HSMC_BF(NRD_SETUP, ns2cyc(config->nrd_setup)) -- | HSMC_BF(NCS_RD_SETUP, ns2cyc(config->ncs_read_setup))); -- pulse = (HSMC_BF(NWE_PULSE, ns2cyc(config->nwe_pulse)) -- | HSMC_BF(NCS_WR_PULSE, ns2cyc(config->ncs_write_pulse)) -- | HSMC_BF(NRD_PULSE, ns2cyc(config->nrd_pulse)) -- | HSMC_BF(NCS_RD_PULSE, ns2cyc(config->ncs_read_pulse))); -- cycle = (HSMC_BF(NWE_CYCLE, ns2cyc(config->write_cycle)) -- | HSMC_BF(NRD_CYCLE, ns2cyc(config->read_cycle))); -+ if (timing->ncs_read_setup > 0) -+ config->ncs_read_setup = ns2cyc(timing->ncs_read_setup); -+ -+ if (timing->nrd_setup > 0) -+ config->nrd_setup = ns2cyc(timing->nrd_setup); -+ -+ if (timing->ncs_write_setup > 0) -+ config->ncs_write_setup = ns2cyc(timing->ncs_write_setup); -+ -+ if (timing->nwe_setup > 0) -+ config->nwe_setup = ns2cyc(timing->nwe_setup); -+ -+ if (timing->ncs_read_pulse > 0) -+ config->ncs_read_pulse = ns2cyc(timing->ncs_read_pulse); -+ -+ if (timing->nrd_pulse > 0) -+ config->nrd_pulse = ns2cyc(timing->nrd_pulse); -+ -+ if (timing->ncs_write_pulse > 0) -+ config->ncs_write_pulse = ns2cyc(timing->ncs_write_pulse); -+ -+ if (timing->nwe_pulse > 0) -+ config->nwe_pulse = ns2cyc(timing->nwe_pulse); -+ -+ if (timing->read_cycle > 0) -+ config->read_cycle = ns2cyc(timing->read_cycle); -+ -+ if (timing->write_cycle > 0) -+ config->write_cycle = ns2cyc(timing->write_cycle); -+ -+ /* Extend read cycle in needed */ -+ if (timing->ncs_read_recover > 0) -+ recover = ns2cyc(timing->ncs_read_recover); -+ else -+ recover = 1; -+ -+ cycle = config->ncs_read_setup + config->ncs_read_pulse + recover; -+ -+ if (config->read_cycle < cycle) -+ config->read_cycle = cycle; -+ -+ /* Extend read cycle in needed */ -+ if (timing->nrd_recover > 0) -+ recover = ns2cyc(timing->nrd_recover); -+ else -+ recover = 1; -+ -+ cycle = config->nrd_setup + config->nrd_pulse + recover; -+ -+ if (config->read_cycle < cycle) -+ config->read_cycle = cycle; -+ -+ /* Extend write cycle in needed */ -+ if (timing->ncs_write_recover > 0) -+ recover = ns2cyc(timing->ncs_write_recover); -+ else -+ recover = 1; -+ -+ cycle = config->ncs_write_setup + config->ncs_write_pulse + recover; -+ -+ if (config->write_cycle < cycle) -+ config->write_cycle = cycle; -+ -+ /* Extend write cycle in needed */ -+ if (timing->nwe_recover > 0) -+ recover = ns2cyc(timing->nwe_recover); -+ else -+ recover = 1; -+ -+ cycle = config->nwe_setup + config->nwe_pulse + recover; -+ -+ if (config->write_cycle < cycle) -+ config->write_cycle = cycle; -+} -+EXPORT_SYMBOL(smc_set_timing); -+ -+int smc_set_configuration(int cs, const struct smc_config *config) -+{ -+ unsigned long offset; -+ u32 setup, pulse, cycle, mode; -+ -+ if (!hsmc) -+ return -ENODEV; -+ if (cs >= NR_CHIP_SELECTS) -+ return -EINVAL; -+ -+ setup = (HSMC_BF(NWE_SETUP, config->nwe_setup) -+ | HSMC_BF(NCS_WR_SETUP, config->ncs_write_setup) -+ | HSMC_BF(NRD_SETUP, config->nrd_setup) -+ | HSMC_BF(NCS_RD_SETUP, config->ncs_read_setup)); -+ pulse = (HSMC_BF(NWE_PULSE, config->nwe_pulse) -+ | HSMC_BF(NCS_WR_PULSE, config->ncs_write_pulse) -+ | HSMC_BF(NRD_PULSE, config->nrd_pulse) -+ | HSMC_BF(NCS_RD_PULSE, config->ncs_read_pulse)); -+ cycle = (HSMC_BF(NWE_CYCLE, config->write_cycle) -+ | HSMC_BF(NRD_CYCLE, config->read_cycle)); - - switch (config->bus_width) { - case 1: -diff --git a/arch/avr32/mach-at32ap/pio.c b/arch/avr32/mach-at32ap/pio.c -index 1eb99b8..c978c36 100644 ---- a/arch/avr32/mach-at32ap/pio.c -+++ b/arch/avr32/mach-at32ap/pio.c -@@ -110,6 +110,10 @@ void __init at32_select_gpio(unsigned int pin, unsigned long flags) - pio_writel(pio, SODR, mask); - else - pio_writel(pio, CODR, mask); -+ if (flags & AT32_GPIOF_MULTIDRV) -+ pio_writel(pio, MDER, mask); -+ else -+ pio_writel(pio, MDDR, mask); - pio_writel(pio, PUDR, mask); - pio_writel(pio, OER, mask); - } else { -@@ -158,6 +162,82 @@ fail: - dump_stack(); - } - -+#ifdef CONFIG_GPIO_DEV -+ -+/* Gang allocators and accessors; used by the GPIO /dev driver */ -+int at32_gpio_port_is_valid(unsigned int port) -+{ -+ return port < MAX_NR_PIO_DEVICES && pio_dev[port].regs != NULL; -+} -+ -+int at32_select_gpio_pins(unsigned int port, u32 pins, u32 oe_mask) -+{ -+ struct pio_device *pio; -+ u32 old, new; -+ -+ pio = &pio_dev[port]; -+ BUG_ON(port > ARRAY_SIZE(pio_dev) || !pio->regs || (oe_mask & ~pins)); -+ -+ /* Try to allocate the pins */ -+ do { -+ old = pio->pinmux_mask; -+ if (old & pins) -+ return -EBUSY; -+ -+ new = old | pins; -+ } while (cmpxchg(&pio->pinmux_mask, old, new) != old); -+ -+ /* That went well, now configure the port */ -+ pio_writel(pio, OER, oe_mask); -+ pio_writel(pio, PER, pins); -+ -+ return 0; -+} -+ -+void at32_deselect_pins(unsigned int port, u32 pins) -+{ -+ struct pio_device *pio; -+ u32 old, new; -+ -+ pio = &pio_dev[port]; -+ BUG_ON(port > ARRAY_SIZE(pio_dev) || !pio->regs); -+ -+ /* Return to a "safe" mux configuration */ -+ pio_writel(pio, PUER, pins); -+ pio_writel(pio, ODR, pins); -+ -+ /* Deallocate the pins */ -+ do { -+ old = pio->pinmux_mask; -+ new = old & ~pins; -+ } while (cmpxchg(&pio->pinmux_mask, old, new) != old); -+} -+ -+u32 at32_gpio_get_value_multiple(unsigned int port, u32 pins) -+{ -+ struct pio_device *pio; -+ -+ pio = &pio_dev[port]; -+ BUG_ON(port > ARRAY_SIZE(pio_dev) || !pio->regs); -+ -+ return pio_readl(pio, PDSR) & pins; -+} -+ -+void at32_gpio_set_value_multiple(unsigned int port, u32 value, u32 mask) -+{ -+ struct pio_device *pio; -+ -+ pio = &pio_dev[port]; -+ BUG_ON(port > ARRAY_SIZE(pio_dev) || !pio->regs); -+ -+ /* No atomic updates for now... */ -+ pio_writel(pio, CODR, ~value & mask); -+ pio_writel(pio, SODR, value & mask); -+} -+ -+#endif /* CONFIG_GPIO_DEV */ -+ -+ - /*--------------------------------------------------------------------------*/ - - /* GPIO API */ -diff --git a/arch/avr32/mach-at32ap/pm.h b/arch/avr32/mach-at32ap/pm.h -index a1f8ace..47efd0d 100644 ---- a/arch/avr32/mach-at32ap/pm.h -+++ b/arch/avr32/mach-at32ap/pm.h -@@ -4,6 +4,14 @@ - #ifndef __ARCH_AVR32_MACH_AT32AP_PM_H__ - #define __ARCH_AVR32_MACH_AT32AP_PM_H__ - -+/* -+ * We can reduce the code size a bit by using a constant here. Since -+ * this file is only used on AVR32 AP CPUs with segmentation enabled, -+ * it's safe to not use ioremap. Generic drivers should of course -+ * never do this. -+ */ -+#define AT32_PM_BASE 0xfff00000 -+ - /* PM register offsets */ - #define PM_MCCTRL 0x0000 - #define PM_CKSEL 0x0004 -diff --git a/arch/avr32/mm/dma-coherent.c b/arch/avr32/mm/dma-coherent.c -index 099212d..26f29c6 100644 ---- a/arch/avr32/mm/dma-coherent.c -+++ b/arch/avr32/mm/dma-coherent.c -@@ -41,6 +41,13 @@ static struct page *__dma_alloc(struct device *dev, size_t size, - struct page *page, *free, *end; - int order; - -+ /* Following is a work-around (a.k.a. hack) to prevent pages -+ * with __GFP_COMP being passed to split_page() which cannot -+ * handle them. The real problem is that this flag probably -+ * should be 0 on AVR32 as it is not supported on this -+ * platform--see CONFIG_HUGETLB_PAGE. */ -+ gfp &= ~(__GFP_COMP); -+ - size = PAGE_ALIGN(size); - order = get_order(size); - -diff --git a/arch/avr32/mm/init.c b/arch/avr32/mm/init.c -index 82cf708..480760b 100644 ---- a/arch/avr32/mm/init.c -+++ b/arch/avr32/mm/init.c -@@ -224,19 +224,9 @@ void free_initmem(void) - - #ifdef CONFIG_BLK_DEV_INITRD - --static int keep_initrd; -- - void free_initrd_mem(unsigned long start, unsigned long end) - { -- if (!keep_initrd) -- free_area(start, end, "initrd"); --} -- --static int __init keepinitrd_setup(char *__unused) --{ -- keep_initrd = 1; -- return 1; -+ free_area(start, end, "initrd"); - } - --__setup("keepinitrd", keepinitrd_setup); - #endif -diff --git a/drivers/char/watchdog/Kconfig b/drivers/char/watchdog/Kconfig -index 37bddc1..8c30dec 100644 ---- a/drivers/char/watchdog/Kconfig -+++ b/drivers/char/watchdog/Kconfig -@@ -223,7 +223,7 @@ config DAVINCI_WATCHDOG - - config AT32AP700X_WDT - tristate "AT32AP700x watchdog" -- depends on CPU_AT32AP7000 -+ depends on CPU_AT32AP700X - help - Watchdog timer embedded into AT32AP700x devices. This will reboot - your system when the timeout is reached. -diff --git a/drivers/char/watchdog/at32ap700x_wdt.c b/drivers/char/watchdog/at32ap700x_wdt.c -index 54a5161..fb5ed64 100644 ---- a/drivers/char/watchdog/at32ap700x_wdt.c -+++ b/drivers/char/watchdog/at32ap700x_wdt.c -@@ -6,6 +6,19 @@ - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -+ * -+ * -+ * Errata: WDT Clear is blocked after WDT Reset -+ * -+ * A watchdog timer event will, after reset, block writes to the WDT_CLEAR -+ * register, preventing the program to clear the next Watchdog Timer Reset. -+ * -+ * If you still want to use the WDT after a WDT reset a small code can be -+ * insterted at the startup checking the AVR32_PM.rcause register for WDT reset -+ * and use a GPIO pin to reset the system. This method requires that one of the -+ * GPIO pins are available and connected externally to the RESET_N pin. After -+ * the GPIO pin has pulled down the reset line the GPIO will be reset and leave -+ * the pin tristated with pullup. - */ - - #include <linux/init.h> -@@ -44,6 +57,13 @@ MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default=" - - #define WDT_CLR 0x04 - -+#define WDT_RCAUSE 0x10 -+#define WDT_RCAUSE_POR 0 -+#define WDT_RCAUSE_EXT 2 -+#define WDT_RCAUSE_WDT 3 -+#define WDT_RCAUSE_JTAG 4 -+#define WDT_RCAUSE_SERP 5 -+ - #define WDT_BIT(name) (1 << WDT_##name) - #define WDT_BF(name, value) ((value) << WDT_##name) - -@@ -56,6 +76,7 @@ struct wdt_at32ap700x { - void __iomem *regs; - spinlock_t io_lock; - int timeout; -+ int boot_status; - unsigned long users; - struct miscdevice miscdev; - }; -@@ -126,7 +147,7 @@ static int at32_wdt_close(struct inode *inode, struct file *file) - at32_wdt_stop(); - } else { - dev_dbg(wdt->miscdev.parent, -- "Unexpected close, not stopping watchdog!\n"); -+ "unexpected close, not stopping watchdog!\n"); - at32_wdt_pat(); - } - clear_bit(1, &wdt->users); -@@ -154,6 +175,33 @@ static int at32_wdt_settimeout(int time) - return 0; - } - -+/* -+ * Get the watchdog status. -+ */ -+static int at32_wdt_get_status(void) -+{ -+ int rcause; -+ int status = 0; -+ -+ rcause = wdt_readl(wdt, RCAUSE); -+ -+ switch (rcause) { -+ case WDT_BIT(RCAUSE_EXT): -+ status = WDIOF_EXTERN1; -+ break; -+ case WDT_BIT(RCAUSE_WDT): -+ status = WDIOF_CARDRESET; -+ break; -+ case WDT_BIT(RCAUSE_POR): /* fall through */ -+ case WDT_BIT(RCAUSE_JTAG): /* fall through */ -+ case WDT_BIT(RCAUSE_SERP): /* fall through */ -+ default: -+ break; -+ } -+ -+ return status; -+} -+ - static struct watchdog_info at32_wdt_info = { - .identity = "at32ap700x watchdog", - .options = WDIOF_SETTIMEOUT | -@@ -194,10 +242,12 @@ static int at32_wdt_ioctl(struct inode *inode, struct file *file, - case WDIOC_GETTIMEOUT: - ret = put_user(wdt->timeout, p); - break; -- case WDIOC_GETSTATUS: /* fall through */ -- case WDIOC_GETBOOTSTATUS: -+ case WDIOC_GETSTATUS: - ret = put_user(0, p); - break; -+ case WDIOC_GETBOOTSTATUS: -+ ret = put_user(wdt->boot_status, p); -+ break; - case WDIOC_SETOPTIONS: - ret = get_user(time, p); - if (ret) -@@ -282,8 +332,19 @@ static int __init at32_wdt_probe(struct platform_device *pdev) - dev_dbg(&pdev->dev, "could not map I/O memory\n"); - goto err_free; - } -+ - spin_lock_init(&wdt->io_lock); -- wdt->users = 0; -+ wdt->boot_status = at32_wdt_get_status(); -+ -+ /* Work-around for watchdog silicon errata. */ -+ if (wdt->boot_status & WDIOF_CARDRESET) { -+ dev_info(&pdev->dev, "CPU must be reset with external " -+ "reset or POR due to silicon errata.\n"); -+ ret = -EIO; -+ goto err_iounmap; -+ } else { -+ wdt->users = 0; -+ } - wdt->miscdev.minor = WATCHDOG_MINOR; - wdt->miscdev.name = "watchdog"; - wdt->miscdev.fops = &at32_wdt_fops; -diff --git a/drivers/i2c/busses/Kconfig b/drivers/i2c/busses/Kconfig -index 9f3a4cd..6f5bcd6 100644 ---- a/drivers/i2c/busses/Kconfig -+++ b/drivers/i2c/busses/Kconfig -@@ -80,6 +80,14 @@ config I2C_AT91 - This supports the use of the I2C interface on Atmel AT91 - processors. - -+config I2C_ATMELTWI -+ tristate "Atmel Two-Wire Interface (TWI)" -+ depends on I2C && (ARCH_AT91 || PLATFORM_AT32AP) -+ help -+ Atmel on-chip TWI controller. Say Y if you have an AT32 or -+ AT91-based device and want to use its built-in TWI -+ functionality. -+ - config I2C_AU1550 - tristate "Au1550/Au1200 SMBus interface" - depends on SOC_AU1550 || SOC_AU1200 -diff --git a/drivers/i2c/busses/Makefile b/drivers/i2c/busses/Makefile -index 5b752e4..e4644a8 100644 ---- a/drivers/i2c/busses/Makefile -+++ b/drivers/i2c/busses/Makefile -@@ -52,6 +52,7 @@ obj-$(CONFIG_I2C_VIAPRO) += i2c-viapro.o - obj-$(CONFIG_I2C_VOODOO3) += i2c-voodoo3.o - obj-$(CONFIG_SCx200_ACB) += scx200_acb.o - obj-$(CONFIG_SCx200_I2C) += scx200_i2c.o -+obj-$(CONFIG_I2C_ATMELTWI) += i2c-atmeltwi.o - - ifeq ($(CONFIG_I2C_DEBUG_BUS),y) - EXTRA_CFLAGS += -DDEBUG -diff --git a/drivers/i2c/busses/i2c-atmeltwi.c b/drivers/i2c/busses/i2c-atmeltwi.c -new file mode 100644 -index 0000000..3f78b31 ---- /dev/null -+++ b/drivers/i2c/busses/i2c-atmeltwi.c -@@ -0,0 +1,436 @@ -+/* -+ * i2c Support for Atmel's Two-Wire Interface (TWI) -+ * -+ * Based on the work of Copyright (C) 2004 Rick Bronson -+ * Converted to 2.6 by Andrew Victor <andrew at sanpeople.com> -+ * Ported to AVR32 and heavily modified by Espen Krangnes -+ * <ekrangnes at atmel.com> -+ * -+ * Copyright (C) 2006 Atmel Corporation -+ * -+ * Borrowed heavily from the original work by: -+ * Copyright (C) 2000 Philip Edelbrock <phil at stimpy.netroedge.com> -+ * -+ * Partialy rewriten by Karel Hojdar <cmkaho at seznam.cz> -+ * bugs removed, interrupt routine markedly rewritten -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License as published by -+ * the Free Software Foundation; either version 2 of the License, or -+ * (at your option) any later version. -+ */ -+#undef VERBOSE_DEBUG -+ -+#include <linux/module.h> -+#include <linux/slab.h> -+#include <linux/i2c.h> -+#include <linux/init.h> -+#include <linux/clk.h> -+#include <linux/err.h> -+#include <linux/interrupt.h> -+#include <linux/platform_device.h> -+#include <linux/completion.h> -+#include <linux/io.h> -+ -+#include "i2c-atmeltwi.h" -+ -+static unsigned int baudrate = 100 * 1000; -+module_param(baudrate, uint, S_IRUGO); -+MODULE_PARM_DESC(baudrate, "The TWI baudrate"); -+ -+ -+struct atmel_twi { -+ void __iomem *regs; -+ struct i2c_adapter adapter; -+ struct clk *pclk; -+ struct completion comp; -+ u32 mask; -+ u8 *buf; -+ u16 len; -+ u16 acks_left; -+ int status; -+ unsigned int irq; -+ -+}; -+#define to_atmel_twi(adap) container_of(adap, struct atmel_twi, adapter) -+ -+/* -+ * (Re)Initialize the TWI hardware registers. -+ */ -+static int twi_hwinit(struct atmel_twi *twi) -+{ -+ unsigned long cdiv, ckdiv = 0; -+ -+ /* REVISIT: wait till SCL is high before resetting; otherwise, -+ * some versions will wedge forever. -+ */ -+ -+ twi_writel(twi, IDR, ~0UL); -+ twi_writel(twi, CR, TWI_BIT(SWRST)); /*Reset peripheral*/ -+ twi_readl(twi, SR); -+ -+ cdiv = (clk_get_rate(twi->pclk) / (2 * baudrate)) - 4; -+ -+ while (cdiv > 255) { -+ ckdiv++; -+ cdiv = cdiv >> 1; -+ } -+ -+ /* REVISIT: there are various errata to consider re CDIV and CHDIV -+ * here, at least on at91 parts. -+ */ -+ -+ if (ckdiv > 7) -+ return -EINVAL; -+ else -+ twi_writel(twi, CWGR, TWI_BF(CKDIV, ckdiv) -+ | TWI_BF(CHDIV, cdiv) -+ | TWI_BF(CLDIV, cdiv)); -+ return 0; -+} -+ -+/* -+ * Waits for the i2c status register to set the specified bitmask -+ * Returns 0 if timed out ... ~100ms is much longer than the SMBus -+ * limit, but I2C has no limit at all. -+ */ -+static int twi_complete(struct atmel_twi *twi, u32 mask) -+{ -+ int timeout = msecs_to_jiffies(100); -+ -+ mask |= TWI_BIT(TXCOMP); -+ twi->mask = mask | TWI_BIT(NACK) | TWI_BIT(OVRE); -+ init_completion(&twi->comp); -+ -+ twi_writel(twi, IER, mask); -+ -+ if (!wait_for_completion_timeout(&twi->comp, timeout)) { -+ /* RESET TWI interface */ -+ twi_writel(twi, CR, TWI_BIT(SWRST)); -+ -+ /* Reinitialize TWI */ -+ twi_hwinit(twi); -+ -+ return -ETIMEDOUT; -+ } -+ return 0; -+} -+ -+/* -+ * Generic i2c master transfer entrypoint. -+ */ -+static int twi_xfer(struct i2c_adapter *adap, struct i2c_msg *pmsg, int num) -+{ -+ struct atmel_twi *twi = to_atmel_twi(adap); -+ int i; -+ -+ dev_dbg(&adap->dev, "twi_xfer: processing %d messages:\n", num); -+ -+ twi->status = 0; -+ for (i = 0; i < num; i++, pmsg++) { -+ twi->len = pmsg->len; -+ twi->buf = pmsg->buf; -+ twi->acks_left = pmsg->len; -+ twi_writel(twi, MMR, TWI_BF(DADR, pmsg->addr) | -+ (pmsg->flags & I2C_M_RD ? TWI_BIT(MREAD) : 0)); -+ twi_writel(twi, IADR, TWI_BF(IADR, pmsg->addr)); -+ -+ dev_dbg(&adap->dev, -+ "#%d: %s %d byte%s %s dev 0x%02x\n", -+ i, -+ pmsg->flags & I2C_M_RD ? "reading" : "writing", -+ pmsg->len, -+ pmsg->len > 1 ? "s" : "", -+ pmsg->flags & I2C_M_RD ? "from" : "to", pmsg->addr); -+ -+ /* enable */ -+ twi_writel(twi, CR, TWI_BIT(MSEN)); -+ -+ if (pmsg->flags & I2C_M_RD) { -+ /* cleanup after previous RX overruns */ -+ while (twi_readl(twi, SR) & TWI_BIT(RXRDY)) -+ twi_readl(twi, RHR); -+ -+ if (twi->len == 1) -+ twi_writel(twi, CR, -+ TWI_BIT(START) | TWI_BIT(STOP)); -+ else -+ twi_writel(twi, CR, TWI_BIT(START)); -+ -+ if (twi_complete(twi, TWI_BIT(RXRDY)) == -ETIMEDOUT) { -+ dev_dbg(&adap->dev, "RX[%d] timeout. " -+ "Stopped with %d bytes left\n", -+ i, twi->acks_left); -+ return -ETIMEDOUT; -+ } -+ } else { -+ twi_writel(twi, THR, twi->buf[0]); -+ twi->acks_left--; -+ /* REVISIT: some chips don't start automagically: -+ * twi_writel(twi, CR, TWI_BIT(START)); -+ */ -+ if (twi_complete(twi, TWI_BIT(TXRDY)) == -ETIMEDOUT) { -+ dev_dbg(&adap->dev, "TX[%d] timeout. " -+ "Stopped with %d bytes left\n", -+ i, twi->acks_left); -+ return -ETIMEDOUT; -+ } -+ /* REVISIT: an erratum workaround may be needed here; -+ * see sam9261 "STOP not generated" (START either). -+ */ -+ } -+ -+ /* Disable TWI interface */ -+ twi_writel(twi, CR, TWI_BIT(MSDIS)); -+ -+ if (twi->status) -+ return twi->status; -+ -+ /* WARNING: This driver lies about properly supporting -+ * repeated start, or it would *ALWAYS* return here. It -+ * has issued a STOP. Continuing is a false claim -- that -+ * a second (or third, etc.) message is part of the same -+ * "combined" (no STOPs between parts) message. -+ */ -+ -+ } /* end cur msg */ -+ -+ return i; -+} -+ -+ -+static irqreturn_t twi_interrupt(int irq, void *dev_id) -+{ -+ struct atmel_twi *twi = dev_id; -+ int status = twi_readl(twi, SR); -+ -+ /* Save state for later debug prints */ -+ int old_status = status; -+ -+ if (twi->mask & status) { -+ -+ status &= twi->mask; -+ -+ if (status & TWI_BIT(RXRDY)) { -+ if ((status & TWI_BIT(OVRE)) && twi->acks_left) { -+ /* Note weakness in fault reporting model: -+ * we can't say "the first N of these data -+ * bytes are valid". -+ */ -+ dev_err(&twi->adapter.dev, -+ "OVERRUN RX! %04x, lost %d\n", -+ old_status, twi->acks_left); -+ twi->acks_left = 0; -+ twi_writel(twi, CR, TWI_BIT(STOP)); -+ twi->status = -EOVERFLOW; -+ } else if (twi->acks_left > 0) { -+ twi->buf[twi->len - twi->acks_left] = -+ twi_readl(twi, RHR); -+ twi->acks_left--; -+ } -+ if (status & TWI_BIT(TXCOMP)) -+ goto done; -+ if (twi->acks_left == 1) -+ twi_writel(twi, CR, TWI_BIT(STOP)); -+ -+ } else if (status & (TWI_BIT(NACK) | TWI_BIT(TXCOMP))) { -+ goto done; -+ -+ } else if (status & TWI_BIT(TXRDY)) { -+ if (twi->acks_left > 0) { -+ twi->acks_left--; -+ twi_writel(twi, THR, -+ twi->buf[twi->len - twi->acks_left]); -+ } else -+ twi_writel(twi, CR, TWI_BIT(STOP)); -+ } -+ -+ if (twi->acks_left == 0) -+ twi_writel(twi, IDR, ~TWI_BIT(TXCOMP)); -+ } -+ -+ /* enabling this message helps trigger overruns/underruns ... */ -+ dev_vdbg(&twi->adapter.dev, -+ "ISR: SR 0x%04X, mask 0x%04X, acks %i\n", -+ old_status, -+ twi->acks_left ? twi->mask : TWI_BIT(TXCOMP), -+ twi->acks_left); -+ -+ return IRQ_HANDLED; -+ -+done: -+ /* Note weak fault reporting model: we can't report how many -+ * bytes we sent before the NAK, or let upper layers choose -+ * whether to continue. The I2C stack doesn't allow that... -+ */ -+ if (status & TWI_BIT(NACK)) { -+ dev_dbg(&twi->adapter.dev, "NACK received! %d to go\n", -+ twi->acks_left); -+ twi->status = -EPIPE; -+ -+ /* TX underrun morphs automagically into a premature STOP; -+ * we'll probably observe UVRE even when it's not documented. -+ */ -+ } else if (twi->acks_left && (twi->mask & TWI_BIT(TXRDY))) { -+ dev_err(&twi->adapter.dev, "UNDERRUN TX! %04x, %d to go\n", -+ old_status, twi->acks_left); -+ twi->status = -ENOSR; -+ } -+ -+ twi_writel(twi, IDR, ~0UL); -+ complete(&twi->comp); -+ -+ dev_dbg(&twi->adapter.dev, "ISR: SR 0x%04X, acks %i --> %d\n", -+ old_status, twi->acks_left, twi->status); -+ -+ return IRQ_HANDLED; -+} -+ -+ -+/* -+ * Return list of supported functionality. -+ * -+ * NOTE: see warning above about repeated starts; this driver is falsely -+ * claiming to support "combined" transfers. The mid-message STOPs mean -+ * some slaves will never work with this driver. (Use i2c-gpio...) -+ */ -+static u32 twi_func(struct i2c_adapter *adapter) -+{ -+ return (I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL) -+ & ~I2C_FUNC_SMBUS_QUICK; -+} -+ -+static struct i2c_algorithm twi_algorithm = { -+ .master_xfer = twi_xfer, -+ .functionality = twi_func, -+}; -+ -+/* -+ * Main initialization routine. -+ */ -+static int __init twi_probe(struct platform_device *pdev) -+{ -+ struct atmel_twi *twi; -+ struct resource *regs; -+ struct clk *pclk; -+ struct i2c_adapter *adapter; -+ int rc, irq; -+ -+ regs = platform_get_resource(pdev, IORESOURCE_MEM, 0); -+ if (!regs) -+ return -ENXIO; -+ -+ pclk = clk_get(&pdev->dev, "pclk"); -+ if (IS_ERR(pclk)) -+ return PTR_ERR(pclk); -+ clk_enable(pclk); -+ -+ rc = -ENOMEM; -+ twi = kzalloc(sizeof(struct atmel_twi), GFP_KERNEL); -+ if (!twi) { -+ dev_dbg(&pdev->dev, "can't allocate interface!\n"); -+ goto err_alloc_twi; -+ } -+ -+ twi->pclk = pclk; -+ twi->regs = ioremap(regs->start, regs->end - regs->start + 1); -+ if (!twi->regs) -+ goto err_ioremap; -+ -+ irq = platform_get_irq(pdev, 0); -+ rc = request_irq(irq, twi_interrupt, 0, "twi", twi); -+ if (rc) { -+ dev_dbg(&pdev->dev, "can't bind irq!\n"); -+ goto err_irq; -+ } -+ twi->irq = irq; -+ -+ rc = twi_hwinit(twi); -+ if (rc) { -+ dev_err(&pdev->dev, "Unable to set baudrate\n"); -+ goto err_hw_init; -+ } -+ -+ adapter = &twi->adapter; -+ sprintf(adapter->name, "TWI"); -+ adapter->algo = &twi_algorithm; -+ adapter->class = I2C_CLASS_ALL; -+ adapter->nr = pdev->id; -+ adapter->dev.parent = &pdev->dev; -+ -+ platform_set_drvdata(pdev, twi); -+ -+ rc = i2c_add_numbered_adapter(adapter); -+ if (rc) { -+ dev_dbg(&pdev->dev, "Adapter %s registration failed\n", -+ adapter->name); -+ goto err_register; -+ } -+ -+ dev_info(&pdev->dev, -+ "Atmel TWI/I2C adapter (baudrate %dk) at 0x%08lx.\n", -+ baudrate/1000, (unsigned long)regs->start); -+ -+ return 0; -+ -+ -+err_register: -+ platform_set_drvdata(pdev, NULL); -+ -+err_hw_init: -+ free_irq(irq, twi); -+ -+err_irq: -+ iounmap(twi->regs); -+ -+err_ioremap: -+ kfree(twi); -+ -+err_alloc_twi: -+ clk_disable(pclk); -+ clk_put(pclk); -+ -+ return rc; -+} -+ -+static int __exit twi_remove(struct platform_device *pdev) -+{ -+ struct atmel_twi *twi = platform_get_drvdata(pdev); -+ int res; -+ -+ platform_set_drvdata(pdev, NULL); -+ res = i2c_del_adapter(&twi->adapter); -+ twi_writel(twi, CR, TWI_BIT(MSDIS)); -+ iounmap(twi->regs); -+ clk_disable(twi->pclk); -+ clk_put(twi->pclk); -+ free_irq(twi->irq, twi); -+ kfree(twi); -+ -+ return res; -+} -+ -+static struct platform_driver twi_driver = { -+ .remove = __exit_p(twi_remove), -+ .driver = { -+ .name = "atmel_twi", -+ .owner = THIS_MODULE, -+ }, -+}; -+ -+static int __init atmel_twi_init(void) -+{ -+ return platform_driver_probe(&twi_driver, twi_probe); -+} -+ -+static void __exit atmel_twi_exit(void) -+{ -+ platform_driver_unregister(&twi_driver); -+} -+ -+module_init(atmel_twi_init); -+module_exit(atmel_twi_exit); -+ -+MODULE_AUTHOR("Espen Krangnes"); -+MODULE_DESCRIPTION("I2C driver for Atmel TWI"); -+MODULE_LICENSE("GPL"); -diff --git a/drivers/i2c/busses/i2c-atmeltwi.h b/drivers/i2c/busses/i2c-atmeltwi.h -new file mode 100644 -index 0000000..1aca065 ---- /dev/null -+++ b/drivers/i2c/busses/i2c-atmeltwi.h -@@ -0,0 +1,117 @@ -+/* -+ * Register definitions for the Atmel Two-Wire Interface -+ */ -+ -+#ifndef __ATMELTWI_H__ -+#define __ATMELTWI_H__ -+ -+/* TWI register offsets */ -+#define TWI_CR 0x0000 -+#define TWI_MMR 0x0004 -+#define TWI_SMR 0x0008 -+#define TWI_IADR 0x000c -+#define TWI_CWGR 0x0010 -+#define TWI_SR 0x0020 -+#define TWI_IER 0x0024 -+#define TWI_IDR 0x0028 -+#define TWI_IMR 0x002c -+#define TWI_RHR 0x0030 -+#define TWI_THR 0x0034 -+ -+/* Bitfields in CR */ -+#define TWI_START_OFFSET 0 -+#define TWI_START_SIZE 1 -+#define TWI_STOP_OFFSET 1 -+#define TWI_STOP_SIZE 1 -+#define TWI_MSEN_OFFSET 2 -+#define TWI_MSEN_SIZE 1 -+#define TWI_MSDIS_OFFSET 3 -+#define TWI_MSDIS_SIZE 1 -+#define TWI_SVEN_OFFSET 4 -+#define TWI_SVEN_SIZE 1 -+#define TWI_SVDIS_OFFSET 5 -+#define TWI_SVDIS_SIZE 1 -+#define TWI_SWRST_OFFSET 7 -+#define TWI_SWRST_SIZE 1 -+ -+/* Bitfields in MMR */ -+#define TWI_IADRSZ_OFFSET 8 -+#define TWI_IADRSZ_SIZE 2 -+#define TWI_MREAD_OFFSET 12 -+#define TWI_MREAD_SIZE 1 -+#define TWI_DADR_OFFSET 16 -+#define TWI_DADR_SIZE 7 -+ -+/* Bitfields in SMR */ -+#define TWI_SADR_OFFSET 16 -+#define TWI_SADR_SIZE 7 -+ -+/* Bitfields in IADR */ -+#define TWI_IADR_OFFSET 0 -+#define TWI_IADR_SIZE 24 -+ -+/* Bitfields in CWGR */ -+#define TWI_CLDIV_OFFSET 0 -+#define TWI_CLDIV_SIZE 8 -+#define TWI_CHDIV_OFFSET 8 -+#define TWI_CHDIV_SIZE 8 -+#define TWI_CKDIV_OFFSET 16 -+#define TWI_CKDIV_SIZE 3 -+ -+/* Bitfields in SR */ -+#define TWI_TXCOMP_OFFSET 0 -+#define TWI_TXCOMP_SIZE 1 -+#define TWI_RXRDY_OFFSET 1 -+#define TWI_RXRDY_SIZE 1 -+#define TWI_TXRDY_OFFSET 2 -+#define TWI_TXRDY_SIZE 1 -+#define TWI_SVDIR_OFFSET 3 -+#define TWI_SVDIR_SIZE 1 -+#define TWI_SVACC_OFFSET 4 -+#define TWI_SVACC_SIZE 1 -+#define TWI_GCACC_OFFSET 5 -+#define TWI_GCACC_SIZE 1 -+#define TWI_OVRE_OFFSET 6 -+#define TWI_OVRE_SIZE 1 -+#define TWI_UNRE_OFFSET 7 -+#define TWI_UNRE_SIZE 1 -+#define TWI_NACK_OFFSET 8 -+#define TWI_NACK_SIZE 1 -+#define TWI_ARBLST_OFFSET 9 -+#define TWI_ARBLST_SIZE 1 -+ -+/* Bitfields in RHR */ -+#define TWI_RXDATA_OFFSET 0 -+#define TWI_RXDATA_SIZE 8 -+ -+/* Bitfields in THR */ -+#define TWI_TXDATA_OFFSET 0 -+#define TWI_TXDATA_SIZE 8 -+ -+/* Constants for IADRSZ */ -+#define TWI_IADRSZ_NO_ADDR 0 -+#define TWI_IADRSZ_ONE_BYTE 1 -+#define TWI_IADRSZ_TWO_BYTES 2 -+#define TWI_IADRSZ_THREE_BYTES 3 -+ -+/* Bit manipulation macros */ -+#define TWI_BIT(name) \ -+ (1 << TWI_##name##_OFFSET) -+#define TWI_BF(name, value) \ -+ (((value) & ((1 << TWI_##name##_SIZE) - 1)) \ -+ << TWI_##name##_OFFSET) -+#define TWI_BFEXT(name, value) \ -+ (((value) >> TWI_##name##_OFFSET) \ -+ & ((1 << TWI_##name##_SIZE) - 1)) -+#define TWI_BFINS(name, value, old) \ -+ (((old) & ~(((1 << TWI_##name##_SIZE) - 1) \ -+ << TWI_##name##_OFFSET)) \ -+ | TWI_BF(name, (value))) -+ -+/* Register access macros */ -+#define twi_readl(port, reg) \ -+ __raw_readl((port)->regs + TWI_##reg) -+#define twi_writel(port, reg, value) \ -+ __raw_writel((value), (port)->regs + TWI_##reg) -+ -+#endif /* __ATMELTWI_H__ */ -diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig -index 73e248f..9e848cc 100644 ---- a/drivers/misc/Kconfig -+++ b/drivers/misc/Kconfig -@@ -202,5 +202,14 @@ config THINKPAD_ACPI_BAY - - If you are not sure, say Y here. - -+config ATMEL_SSC -+ tristate "Device driver for Atmel SSC peripheral" -+ depends on AVR32 || ARCH_AT91 -+ ---help--- -+ This option enables device driver support for Atmel Syncronized -+ Serial Communication peripheral (SSC). -+ -+ The SSC peripheral supports a wide variety of serial frame based -+ communications, i.e. I2S, SPI, etc. - - endif # MISC_DEVICES -diff --git a/drivers/misc/Makefile b/drivers/misc/Makefile -index b5ce0e3..40d8ed1 100644 ---- a/drivers/misc/Makefile -+++ b/drivers/misc/Makefile -@@ -15,3 +15,4 @@ obj-$(CONFIG_SGI_IOC4) += ioc4.o - obj-$(CONFIG_SONY_LAPTOP) += sony-laptop.o - obj-$(CONFIG_THINKPAD_ACPI) += thinkpad_acpi.o - obj-$(CONFIG_EEPROM_93CX6) += eeprom_93cx6.o -+obj-$(CONFIG_ATMEL_SSC) += atmel-ssc.o -diff --git a/drivers/misc/atmel-ssc.c b/drivers/misc/atmel-ssc.c -new file mode 100644 -index 0000000..058ccac ---- /dev/null -+++ b/drivers/misc/atmel-ssc.c -@@ -0,0 +1,174 @@ -+/* -+ * Atmel SSC driver -+ * -+ * Copyright (C) 2007 Atmel Corporation -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 as -+ * published by the Free Software Foundation. -+ */ -+ -+#include <linux/platform_device.h> -+#include <linux/list.h> -+#include <linux/clk.h> -+#include <linux/err.h> -+#include <linux/io.h> -+#include <linux/list.h> -+#include <linux/spinlock.h> -+#include <linux/atmel-ssc.h> -+ -+/* Serialize access to ssc_list and user count */ -+static DEFINE_SPINLOCK(user_lock); -+static LIST_HEAD(ssc_list); -+ -+struct ssc_device *ssc_request(unsigned int ssc_num) -+{ -+ int ssc_valid = 0; -+ struct ssc_device *ssc; -+ -+ spin_lock(&user_lock); -+ list_for_each_entry(ssc, &ssc_list, list) { -+ if (ssc->pdev->id == ssc_num) { -+ ssc_valid = 1; -+ break; -+ } -+ } -+ -+ if (!ssc_valid) { -+ spin_unlock(&user_lock); -+ dev_dbg(&ssc->pdev->dev, "could not find requested device\n"); -+ return ERR_PTR(-ENODEV); -+ } -+ -+ if (ssc->user) { -+ spin_unlock(&user_lock); -+ dev_dbg(&ssc->pdev->dev, "module busy\n"); -+ return ERR_PTR(-EBUSY); -+ } -+ ssc->user++; -+ spin_unlock(&user_lock); -+ -+ clk_enable(ssc->clk); -+ -+ return ssc; -+} -+EXPORT_SYMBOL(ssc_request); -+ -+void ssc_free(struct ssc_device *ssc) -+{ -+ spin_lock(&user_lock); -+ if (ssc->user) { -+ ssc->user--; -+ clk_disable(ssc->clk); -+ } else { -+ dev_dbg(&ssc->pdev->dev, "device already free\n"); -+ } -+ spin_unlock(&user_lock); -+} -+EXPORT_SYMBOL(ssc_free); -+ -+static int __init ssc_probe(struct platform_device *pdev) -+{ -+ int retval = 0; -+ struct resource *regs; -+ struct ssc_device *ssc; -+ -+ ssc = kzalloc(sizeof(struct ssc_device), GFP_KERNEL); -+ if (!ssc) { -+ dev_dbg(&pdev->dev, "out of memory\n"); -+ retval = -ENOMEM; -+ goto out; -+ } -+ -+ regs = platform_get_resource(pdev, IORESOURCE_MEM, 0); -+ if (!regs) { -+ dev_dbg(&pdev->dev, "no mmio resource defined\n"); -+ retval = -ENXIO; -+ goto out_free; -+ } -+ -+ ssc->clk = clk_get(&pdev->dev, "pclk"); -+ if (IS_ERR(ssc->clk)) { -+ dev_dbg(&pdev->dev, "no pclk clock defined\n"); -+ retval = -ENXIO; -+ goto out_free; -+ } -+ -+ ssc->pdev = pdev; -+ ssc->regs = ioremap(regs->start, regs->end - regs->start + 1); -+ if (!ssc->regs) { -+ dev_dbg(&pdev->dev, "ioremap failed\n"); -+ retval = -EINVAL; -+ goto out_clk; -+ } -+ -+ /* disable all interrupts */ -+ clk_enable(ssc->clk); -+ ssc_writel(ssc->regs, IDR, ~0UL); -+ ssc_readl(ssc->regs, SR); -+ clk_disable(ssc->clk); -+ -+ ssc->irq = platform_get_irq(pdev, 0); -+ if (!ssc->irq) { -+ dev_dbg(&pdev->dev, "could not get irq\n"); -+ retval = -ENXIO; -+ goto out_unmap; -+ } -+ -+ spin_lock(&user_lock); -+ list_add_tail(&ssc->list, &ssc_list); -+ spin_unlock(&user_lock); -+ -+ platform_set_drvdata(pdev, ssc); -+ -+ dev_info(&pdev->dev, "Atmel SSC device at 0x%p (irq %d)\n", -+ ssc->regs, ssc->irq); -+ -+ goto out; -+ -+out_unmap: -+ iounmap(ssc->regs); -+out_clk: -+ clk_put(ssc->clk); -+out_free: -+ kfree(ssc); -+out: -+ return retval; -+} -+ -+static int __devexit ssc_remove(struct platform_device *pdev) -+{ -+ struct ssc_device *ssc = platform_get_drvdata(pdev); -+ -+ spin_lock(&user_lock); -+ iounmap(ssc->regs); -+ clk_put(ssc->clk); -+ list_del(&ssc->list); -+ kfree(ssc); -+ spin_unlock(&user_lock); -+ -+ return 0; -+} -+ -+static struct platform_driver ssc_driver = { -+ .remove = __devexit_p(ssc_remove), -+ .driver = { -+ .name = "ssc", -+ }, -+}; -+ -+static int __init ssc_init(void) -+{ -+ return platform_driver_probe(&ssc_driver, ssc_probe); -+} -+module_init(ssc_init); -+ -+static void __exit ssc_exit(void) -+{ -+ platform_driver_unregister(&ssc_driver); -+} -+module_exit(ssc_exit); -+ -+MODULE_AUTHOR("Hans-Christian Egtvedt <hcegtvedt@atmel.com>"); -+MODULE_DESCRIPTION("SSC driver for Atmel AVR32 and AT91"); -+MODULE_LICENSE("GPL"); -diff --git a/drivers/mmc/host/Kconfig b/drivers/mmc/host/Kconfig -index e23082f..1de1716 100644 ---- a/drivers/mmc/host/Kconfig -+++ b/drivers/mmc/host/Kconfig -@@ -74,6 +74,16 @@ config MMC_AT91 - - If unsure, say N. - -+config MMC_ATMELMCI -+ tristate "Atmel Multimedia Card Interface support" -+ depends on AVR32 && MMC -+ help -+ This selects the Atmel Multimedia Card Interface. If you have -+ a AT91 (ARM) or AT32 (AVR32) platform with a Multimedia Card -+ slot, say Y or M here. -+ -+ If unsure, say N. -+ - config MMC_IMX - tristate "Motorola i.MX Multimedia Card Interface support" - depends on ARCH_IMX -diff --git a/drivers/mmc/host/Makefile b/drivers/mmc/host/Makefile -index 6685f64..4b8e6e2 100644 ---- a/drivers/mmc/host/Makefile -+++ b/drivers/mmc/host/Makefile -@@ -14,5 +14,6 @@ obj-$(CONFIG_MMC_WBSD) += wbsd.o - obj-$(CONFIG_MMC_AU1X) += au1xmmc.o - obj-$(CONFIG_MMC_OMAP) += omap.o - obj-$(CONFIG_MMC_AT91) += at91_mci.o -+obj-$(CONFIG_MMC_ATMELMCI) += atmel-mci.o - obj-$(CONFIG_MMC_TIFM_SD) += tifm_sd.o - -diff --git a/drivers/mmc/host/atmel-mci.c b/drivers/mmc/host/atmel-mci.c -new file mode 100644 -index 0000000..6792ad9 ---- /dev/null -+++ b/drivers/mmc/host/atmel-mci.c -@@ -0,0 +1,1176 @@ -+/* -+ * Atmel MultiMedia Card Interface driver -+ * -+ * Copyright (C) 2004-2006 Atmel Corporation -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 as -+ * published by the Free Software Foundation. -+ */ -+#include <linux/blkdev.h> -+#include <linux/clk.h> -+#include <linux/device.h> -+#include <linux/dma-mapping.h> -+#include <linux/init.h> -+#include <linux/interrupt.h> -+#include <linux/ioport.h> -+#include <linux/module.h> -+#include <linux/platform_device.h> -+ -+#include <linux/mmc/host.h> -+ -+#include <asm/dma-controller.h> -+#include <asm/io.h> -+#include <asm/arch/board.h> -+#include <asm/arch/gpio.h> -+ -+#include "atmel-mci.h" -+ -+#define DRIVER_NAME "atmel_mci" -+ -+#define MCI_DATA_ERROR_FLAGS (MCI_BIT(DCRCE) | MCI_BIT(DTOE) | \ -+ MCI_BIT(OVRE) | MCI_BIT(UNRE)) -+ -+enum { -+ EVENT_CMD_COMPLETE = 0, -+ EVENT_DATA_COMPLETE, -+ EVENT_DATA_ERROR, -+ EVENT_STOP_SENT, -+ EVENT_STOP_COMPLETE, -+ EVENT_DMA_COMPLETE, -+ EVENT_DMA_ERROR, -+ EVENT_CARD_DETECT, -+}; -+ -+struct atmel_mci_dma { -+ struct dma_request_sg req; -+ unsigned short rx_periph_id; -+ unsigned short tx_periph_id; -+}; -+ -+struct atmel_mci { -+ struct mmc_host *mmc; -+ void __iomem *regs; -+ struct atmel_mci_dma dma; -+ -+ struct mmc_request *mrq; -+ struct mmc_command *cmd; -+ struct mmc_data *data; -+ -+ u32 cmd_status; -+ u32 data_status; -+ u32 stop_status; -+ u32 stop_cmdr; -+ -+ struct tasklet_struct tasklet; -+ unsigned long pending_events; -+ unsigned long completed_events; -+ -+ int present; -+ int detect_pin; -+ int wp_pin; -+ -+ unsigned long bus_hz; -+ unsigned long mapbase; -+ struct clk *mck; -+ struct platform_device *pdev; -+ -+#ifdef CONFIG_DEBUG_FS -+ struct dentry *debugfs_root; -+ struct dentry *debugfs_regs; -+ struct dentry *debugfs_req; -+ struct dentry *debugfs_pending_events; -+ struct dentry *debugfs_completed_events; -+#endif -+}; -+ -+/* Those printks take an awful lot of time... */ -+#ifndef DEBUG -+static unsigned int fmax = 15000000U; -+#else -+static unsigned int fmax = 1000000U; -+#endif -+module_param(fmax, uint, 0444); -+MODULE_PARM_DESC(fmax, "Max frequency in Hz of the MMC bus clock"); -+ -+/* Test bit macros for completed events */ -+#define mci_cmd_is_complete(host) \ -+ test_bit(EVENT_CMD_COMPLETE, &host->completed_events) -+#define mci_data_is_complete(host) \ -+ test_bit(EVENT_DATA_COMPLETE, &host->completed_events) -+#define mci_data_error_is_complete(host) \ -+ test_bit(EVENT_DATA_ERROR, &host->completed_events) -+#define mci_stop_sent_is_complete(host) \ -+ test_bit(EVENT_STOP_SENT, &host->completed_events) -+#define mci_stop_is_complete(host) \ -+ test_bit(EVENT_STOP_COMPLETE, &host->completed_events) -+#define mci_dma_is_complete(host) \ -+ test_bit(EVENT_DMA_COMPLETE, &host->completed_events) -+#define mci_dma_error_is_complete(host) \ -+ test_bit(EVENT_DMA_ERROR, &host->completed_events) -+#define mci_card_detect_is_complete(host) \ -+ test_bit(EVENT_CARD_DETECT, &host->completed_events) -+ -+/* Test and clear bit macros for pending events */ -+#define mci_clear_cmd_is_pending(host) \ -+ test_and_clear_bit(EVENT_CMD_COMPLETE, &host->pending_events) -+#define mci_clear_data_is_pending(host) \ -+ test_and_clear_bit(EVENT_DATA_COMPLETE, &host->pending_events) -+#define mci_clear_data_error_is_pending(host) \ -+ test_and_clear_bit(EVENT_DATA_ERROR, &host->pending_events) -+#define mci_clear_stop_sent_is_pending(host) \ -+ test_and_clear_bit(EVENT_STOP_SENT, &host->pending_events) -+#define mci_clear_stop_is_pending(host) \ -+ test_and_clear_bit(EVENT_STOP_COMPLETE, &host->pending_events) -+#define mci_clear_dma_error_is_pending(host) \ -+ test_and_clear_bit(EVENT_DMA_ERROR, &host->pending_events) -+#define mci_clear_card_detect_is_pending(host) \ -+ test_and_clear_bit(EVENT_CARD_DETECT, &host->pending_events) -+ -+/* Test and set bit macros for completed events */ -+#define mci_set_cmd_is_completed(host) \ -+ test_and_set_bit(EVENT_CMD_COMPLETE, &host->completed_events) -+#define mci_set_data_is_completed(host) \ -+ test_and_set_bit(EVENT_DATA_COMPLETE, &host->completed_events) -+#define mci_set_data_error_is_completed(host) \ -+ test_and_set_bit(EVENT_DATA_ERROR, &host->completed_events) -+#define mci_set_stop_sent_is_completed(host) \ -+ test_and_set_bit(EVENT_STOP_SENT, &host->completed_events) -+#define mci_set_stop_is_completed(host) \ -+ test_and_set_bit(EVENT_STOP_COMPLETE, &host->completed_events) -+#define mci_set_dma_error_is_completed(host) \ -+ test_and_set_bit(EVENT_DMA_ERROR, &host->completed_events) -+#define mci_set_card_detect_is_completed(host) \ -+ test_and_set_bit(EVENT_CARD_DETECT, &host->completed_events) -+ -+/* Set bit macros for completed events */ -+#define mci_set_cmd_complete(host) \ -+ set_bit(EVENT_CMD_COMPLETE, &host->completed_events) -+#define mci_set_data_complete(host) \ -+ set_bit(EVENT_DATA_COMPLETE, &host->completed_events) -+#define mci_set_data_error_complete(host) \ -+ set_bit(EVENT_DATA_ERROR, &host->completed_events) -+#define mci_set_stop_sent_complete(host) \ -+ set_bit(EVENT_STOP_SENT, &host->completed_events) -+#define mci_set_stop_complete(host) \ -+ set_bit(EVENT_STOP_COMPLETE, &host->completed_events) -+#define mci_set_dma_complete(host) \ -+ set_bit(EVENT_DMA_COMPLETE, &host->completed_events) -+#define mci_set_dma_error_complete(host) \ -+ set_bit(EVENT_DMA_ERROR, &host->completed_events) -+#define mci_set_card_detect_complete(host) \ -+ set_bit(EVENT_CARD_DETECT, &host->completed_events) -+ -+/* Set bit macros for pending events */ -+#define mci_set_cmd_pending(host) \ -+ set_bit(EVENT_CMD_COMPLETE, &host->pending_events) -+#define mci_set_data_pending(host) \ -+ set_bit(EVENT_DATA_COMPLETE, &host->pending_events) -+#define mci_set_data_error_pending(host) \ -+ set_bit(EVENT_DATA_ERROR, &host->pending_events) -+#define mci_set_stop_sent_pending(host) \ -+ set_bit(EVENT_STOP_SENT, &host->pending_events) -+#define mci_set_stop_pending(host) \ -+ set_bit(EVENT_STOP_COMPLETE, &host->pending_events) -+#define mci_set_dma_error_pending(host) \ -+ set_bit(EVENT_DMA_ERROR, &host->pending_events) -+#define mci_set_card_detect_pending(host) \ -+ set_bit(EVENT_CARD_DETECT, &host->pending_events) -+ -+/* Clear bit macros for pending events */ -+#define mci_clear_cmd_pending(host) \ -+ clear_bit(EVENT_CMD_COMPLETE, &host->pending_events) -+#define mci_clear_data_pending(host) \ -+ clear_bit(EVENT_DATA_COMPLETE, &host->pending_events) -+#define mci_clear_data_error_pending(host) \ -+ clear_bit(EVENT_DATA_ERROR, &host->pending_events) -+#define mci_clear_stop_sent_pending(host) \ -+ clear_bit(EVENT_STOP_SENT, &host->pending_events) -+#define mci_clear_stop_pending(host) \ -+ clear_bit(EVENT_STOP_COMPLETE, &host->pending_events) -+#define mci_clear_dma_error_pending(host) \ -+ clear_bit(EVENT_DMA_ERROR, &host->pending_events) -+#define mci_clear_card_detect_pending(host) \ -+ clear_bit(EVENT_CARD_DETECT, &host->pending_events) -+ -+ -+#ifdef CONFIG_DEBUG_FS -+#include <linux/debugfs.h> -+ -+#define DBG_REQ_BUF_SIZE (4096 - sizeof(unsigned int)) -+ -+struct req_dbg_data { -+ unsigned int nbytes; -+ char str[DBG_REQ_BUF_SIZE]; -+}; -+ -+static int req_dbg_open(struct inode *inode, struct file *file) -+{ -+ struct atmel_mci *host; -+ struct mmc_request *mrq; -+ struct mmc_command *cmd, *stop; -+ struct mmc_data *data; -+ struct req_dbg_data *priv; -+ char *str; -+ unsigned long n = 0; -+ -+ priv = kzalloc(DBG_REQ_BUF_SIZE, GFP_KERNEL); -+ if (!priv) -+ return -ENOMEM; -+ str = priv->str; -+ -+ mutex_lock(&inode->i_mutex); -+ host = inode->i_private; -+ -+ spin_lock_irq(&host->mmc->lock); -+ mrq = host->mrq; -+ if (mrq) { -+ cmd = mrq->cmd; -+ data = mrq->data; -+ stop = mrq->stop; -+ n = snprintf(str, DBG_REQ_BUF_SIZE, -+ "CMD%u(0x%x) %x %x %x %x %x (err %u)\n", -+ cmd->opcode, cmd->arg, cmd->flags, -+ cmd->resp[0], cmd->resp[1], cmd->resp[2], -+ cmd->resp[3], cmd->error); -+ if (n < DBG_REQ_BUF_SIZE && data) -+ n += snprintf(str + n, DBG_REQ_BUF_SIZE - n, -+ "DATA %u * %u (%u) %x (err %u)\n", -+ data->blocks, data->blksz, -+ data->bytes_xfered, data->flags, -+ data->error); -+ if (n < DBG_REQ_BUF_SIZE && stop) -+ n += snprintf(str + n, DBG_REQ_BUF_SIZE - n, -+ "CMD%u(0x%x) %x %x %x %x %x (err %u)\n", -+ stop->opcode, stop->arg, stop->flags, -+ stop->resp[0], stop->resp[1], -+ stop->resp[2], stop->resp[3], -+ stop->error); -+ } -+ spin_unlock_irq(&host->mmc->lock); -+ mutex_unlock(&inode->i_mutex); -+ -+ priv->nbytes = min(n, DBG_REQ_BUF_SIZE); -+ file->private_data = priv; -+ -+ return 0; -+} -+ -+static ssize_t req_dbg_read(struct file *file, char __user *buf, -+ size_t nbytes, loff_t *ppos) -+{ -+ struct req_dbg_data *priv = file->private_data; -+ -+ return simple_read_from_buffer(buf, nbytes, ppos, -+ priv->str, priv->nbytes); -+} -+ -+static int req_dbg_release(struct inode *inode, struct file *file) -+{ -+ kfree(file->private_data); -+ return 0; -+} -+ -+static const struct file_operations req_dbg_fops = { -+ .owner = THIS_MODULE, -+ .open = req_dbg_open, -+ .llseek = no_llseek, -+ .read = req_dbg_read, -+ .release = req_dbg_release, -+}; -+ -+static int regs_dbg_open(struct inode *inode, struct file *file) -+{ -+ struct atmel_mci *host; -+ unsigned int i; -+ u32 *data; -+ int ret = -ENOMEM; -+ -+ mutex_lock(&inode->i_mutex); -+ host = inode->i_private; -+ data = kmalloc(inode->i_size, GFP_KERNEL); -+ if (!data) -+ goto out; -+ -+ spin_lock_irq(&host->mmc->lock); -+ for (i = 0; i < inode->i_size / 4; i++) -+ data[i] = __raw_readl(host->regs + i * 4); -+ spin_unlock_irq(&host->mmc->lock); -+ -+ file->private_data = data; -+ ret = 0; -+ -+out: -+ mutex_unlock(&inode->i_mutex); -+ -+ return ret; -+} -+ -+static ssize_t regs_dbg_read(struct file *file, char __user *buf, -+ size_t nbytes, loff_t *ppos) -+{ -+ struct inode *inode = file->f_dentry->d_inode; -+ int ret; -+ -+ mutex_lock(&inode->i_mutex); -+ ret = simple_read_from_buffer(buf, nbytes, ppos, -+ file->private_data, -+ file->f_dentry->d_inode->i_size); -+ mutex_unlock(&inode->i_mutex); -+ -+ return ret; -+} -+ -+static int regs_dbg_release(struct inode *inode, struct file *file) -+{ -+ kfree(file->private_data); -+ return 0; -+} -+ -+static const struct file_operations regs_dbg_fops = { -+ .owner = THIS_MODULE, -+ .open = regs_dbg_open, -+ .llseek = generic_file_llseek, -+ .read = regs_dbg_read, -+ .release = regs_dbg_release, -+}; -+ -+static void atmci_init_debugfs(struct atmel_mci *host) -+{ -+ struct mmc_host *mmc; -+ struct dentry *root, *regs; -+ struct resource *res; -+ -+ mmc = host->mmc; -+ root = debugfs_create_dir(mmc_hostname(mmc), NULL); -+ if (IS_ERR(root) || !root) -+ goto err_root; -+ host->debugfs_root = root; -+ -+ regs = debugfs_create_file("regs", 0400, root, host, ®s_dbg_fops); -+ if (!regs) -+ goto err_regs; -+ -+ res = platform_get_resource(host->pdev, IORESOURCE_MEM, 0); -+ regs->d_inode->i_size = res->end - res->start + 1; -+ host->debugfs_regs = regs; -+ -+ host->debugfs_req = debugfs_create_file("req", 0400, root, -+ host, &req_dbg_fops); -+ if (!host->debugfs_req) -+ goto err_req; -+ -+ host->debugfs_pending_events -+ = debugfs_create_u32("pending_events", 0400, root, -+ (u32 *)&host->pending_events); -+ if (!host->debugfs_pending_events) -+ goto err_pending_events; -+ -+ host->debugfs_completed_events -+ = debugfs_create_u32("completed_events", 0400, root, -+ (u32 *)&host->completed_events); -+ if (!host->debugfs_completed_events) -+ goto err_completed_events; -+ -+ return; -+ -+err_completed_events: -+ debugfs_remove(host->debugfs_pending_events); -+err_pending_events: -+ debugfs_remove(host->debugfs_req); -+err_req: -+ debugfs_remove(host->debugfs_regs); -+err_regs: -+ debugfs_remove(host->debugfs_root); -+err_root: -+ host->debugfs_root = NULL; -+ dev_err(&host->pdev->dev, -+ "failed to initialize debugfs for %s\n", -+ mmc_hostname(mmc)); -+} -+ -+static void atmci_cleanup_debugfs(struct atmel_mci *host) -+{ -+ if (host->debugfs_root) { -+ debugfs_remove(host->debugfs_completed_events); -+ debugfs_remove(host->debugfs_pending_events); -+ debugfs_remove(host->debugfs_req); -+ debugfs_remove(host->debugfs_regs); -+ debugfs_remove(host->debugfs_root); -+ host->debugfs_root = NULL; -+ } -+} -+#else -+static inline void atmci_init_debugfs(struct atmel_mci *host) -+{ -+ -+} -+ -+static inline void atmci_cleanup_debugfs(struct atmel_mci *host) -+{ -+ -+} -+#endif /* CONFIG_DEBUG_FS */ -+ -+static inline unsigned int ns_to_clocks(struct atmel_mci *host, -+ unsigned int ns) -+{ -+ return (ns * (host->bus_hz / 1000000) + 999) / 1000; -+} -+ -+static void atmci_set_timeout(struct atmel_mci *host, -+ struct mmc_data *data) -+{ -+ static unsigned dtomul_to_shift[] = { -+ 0, 4, 7, 8, 10, 12, 16, 20 -+ }; -+ unsigned timeout; -+ unsigned dtocyc, dtomul; -+ -+ timeout = ns_to_clocks(host, data->timeout_ns) + data->timeout_clks; -+ -+ for (dtomul = 0; dtomul < 8; dtomul++) { -+ unsigned shift = dtomul_to_shift[dtomul]; -+ dtocyc = (timeout + (1 << shift) - 1) >> shift; -+ if (dtocyc < 15) -+ break; -+ } -+ -+ if (dtomul >= 8) { -+ dtomul = 7; -+ dtocyc = 15; -+ } -+ -+ dev_dbg(&host->mmc->class_dev, "setting timeout to %u cycles\n", -+ dtocyc << dtomul_to_shift[dtomul]); -+ mci_writel(host, DTOR, (MCI_BF(DTOMUL, dtomul) -+ | MCI_BF(DTOCYC, dtocyc))); -+} -+ -+/* -+ * Return mask with command flags to be enabled for this command. -+ */ -+static u32 atmci_prepare_command(struct mmc_host *mmc, -+ struct mmc_command *cmd) -+{ -+ u32 cmdr; -+ -+ cmd->error = MMC_ERR_NONE; -+ -+ cmdr = MCI_BF(CMDNB, cmd->opcode); -+ -+ if (cmd->flags & MMC_RSP_PRESENT) { -+ if (cmd->flags & MMC_RSP_136) -+ cmdr |= MCI_BF(RSPTYP, MCI_RSPTYP_136_BIT); -+ else -+ cmdr |= MCI_BF(RSPTYP, MCI_RSPTYP_48_BIT); -+ } -+ -+ /* -+ * This should really be MAXLAT_5 for CMD2 and ACMD41, but -+ * it's too difficult to determine whether this is an ACMD or -+ * not. Better make it 64. -+ */ -+ cmdr |= MCI_BIT(MAXLAT); -+ -+ if (mmc->ios.bus_mode == MMC_BUSMODE_OPENDRAIN) -+ cmdr |= MCI_BIT(OPDCMD); -+ -+ dev_dbg(&mmc->class_dev, -+ "cmd: op %02x arg %08x flags %08x, cmdflags %08lx\n", -+ cmd->opcode, cmd->arg, cmd->flags, (unsigned long)cmdr); -+ -+ return cmdr; -+} -+ -+static void atmci_start_command(struct atmel_mci *host, -+ struct mmc_command *cmd, -+ u32 cmd_flags) -+{ -+ WARN_ON(host->cmd); -+ host->cmd = cmd; -+ -+ mci_writel(host, ARGR, cmd->arg); -+ mci_writel(host, CMDR, cmd_flags); -+ -+ if (cmd->data) -+ dma_start_request(host->dma.req.req.dmac, -+ host->dma.req.req.channel); -+} -+ -+/* -+ * Returns a mask of flags to be set in the command register when the -+ * command to start the transfer is to be sent. -+ */ -+static u32 atmci_prepare_data(struct mmc_host *mmc, struct mmc_data *data) -+{ -+ struct atmel_mci *host = mmc_priv(mmc); -+ u32 cmd_flags; -+ -+ WARN_ON(host->data); -+ host->data = data; -+ -+ atmci_set_timeout(host, data); -+ mci_writel(host, BLKR, (MCI_BF(BCNT, data->blocks) -+ | MCI_BF(BLKLEN, data->blksz))); -+ host->dma.req.block_size = data->blksz; -+ host->dma.req.nr_blocks = data->blocks; -+ -+ cmd_flags = MCI_BF(TRCMD, MCI_TRCMD_START_TRANS); -+ if (data->flags & MMC_DATA_STREAM) -+ cmd_flags |= MCI_BF(TRTYP, MCI_TRTYP_STREAM); -+ else if (data->blocks > 1) -+ cmd_flags |= MCI_BF(TRTYP, MCI_TRTYP_MULTI_BLOCK); -+ else -+ cmd_flags |= MCI_BF(TRTYP, MCI_TRTYP_BLOCK); -+ -+ if (data->flags & MMC_DATA_READ) { -+ cmd_flags |= MCI_BIT(TRDIR); -+ host->dma.req.nr_sg -+ = dma_map_sg(&host->pdev->dev, data->sg, -+ data->sg_len, DMA_FROM_DEVICE); -+ host->dma.req.periph_id = host->dma.rx_periph_id; -+ host->dma.req.direction = DMA_DIR_PERIPH_TO_MEM; -+ host->dma.req.data_reg = host->mapbase + MCI_RDR; -+ } else { -+ host->dma.req.nr_sg -+ = dma_map_sg(&host->pdev->dev, data->sg, -+ data->sg_len, DMA_TO_DEVICE); -+ host->dma.req.periph_id = host->dma.tx_periph_id; -+ host->dma.req.direction = DMA_DIR_MEM_TO_PERIPH; -+ host->dma.req.data_reg = host->mapbase + MCI_TDR; -+ } -+ host->dma.req.sg = data->sg; -+ -+ dma_prepare_request_sg(host->dma.req.req.dmac, &host->dma.req); -+ -+ return cmd_flags; -+} -+ -+static void atmci_request(struct mmc_host *mmc, struct mmc_request *mrq) -+{ -+ struct atmel_mci *host = mmc_priv(mmc); -+ struct mmc_data *data = mrq->data; -+ u32 iflags; -+ u32 cmdflags = 0; -+ -+ iflags = mci_readl(host, IMR); -+ if (iflags) -+ dev_warn(&mmc->class_dev, "WARNING: IMR=0x%08x\n", -+ mci_readl(host, IMR)); -+ -+ WARN_ON(host->mrq != NULL); -+ host->mrq = mrq; -+ host->pending_events = 0; -+ host->completed_events = 0; -+ -+ iflags = MCI_BIT(CMDRDY); -+ cmdflags = atmci_prepare_command(mmc, mrq->cmd); -+ -+ if (mrq->stop) { -+ WARN_ON(!data); -+ -+ host->stop_cmdr = atmci_prepare_command(mmc, mrq->stop); -+ host->stop_cmdr |= MCI_BF(TRCMD, MCI_TRCMD_STOP_TRANS); -+ if (!(data->flags & MMC_DATA_WRITE)) -+ host->stop_cmdr |= MCI_BIT(TRDIR); -+ if (data->flags & MMC_DATA_STREAM) -+ host->stop_cmdr |= MCI_BF(TRTYP, MCI_TRTYP_STREAM); -+ else -+ host->stop_cmdr |= MCI_BF(TRTYP, MCI_TRTYP_MULTI_BLOCK); -+ } -+ if (data) { -+ cmdflags |= atmci_prepare_data(mmc, data); -+ iflags |= MCI_DATA_ERROR_FLAGS; -+ } -+ -+ atmci_start_command(host, mrq->cmd, cmdflags); -+ mci_writel(host, IER, iflags); -+} -+ -+static void atmci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios) -+{ -+ struct atmel_mci *host = mmc_priv(mmc); -+ u32 mr; -+ -+ if (ios->clock) { -+ u32 clkdiv; -+ -+ /* Set clock rate */ -+ clkdiv = host->bus_hz / (2 * ios->clock) - 1; -+ if (clkdiv > 255) { -+ dev_warn(&mmc->class_dev, -+ "clock %u too slow; using %lu\n", -+ ios->clock, host->bus_hz / (2 * 256)); -+ clkdiv = 255; -+ } -+ -+ mr = mci_readl(host, MR); -+ mr = MCI_BFINS(CLKDIV, clkdiv, mr) -+ | MCI_BIT(WRPROOF) | MCI_BIT(RDPROOF); -+ mci_writel(host, MR, mr); -+ -+ /* Enable the MCI controller */ -+ mci_writel(host, CR, MCI_BIT(MCIEN)); -+ } else { -+ /* Disable the MCI controller */ -+ mci_writel(host, CR, MCI_BIT(MCIDIS)); -+ } -+ -+ switch (ios->bus_width) { -+ case MMC_BUS_WIDTH_1: -+ mci_writel(host, SDCR, 0); -+ break; -+ case MMC_BUS_WIDTH_4: -+ mci_writel(host, SDCR, MCI_BIT(SDCBUS)); -+ break; -+ } -+ -+ switch (ios->power_mode) { -+ case MMC_POWER_ON: -+ /* Send init sequence (74 clock cycles) */ -+ mci_writel(host, IDR, ~0UL); -+ mci_writel(host, CMDR, MCI_BF(SPCMD, MCI_SPCMD_INIT_CMD)); -+ while (!(mci_readl(host, SR) & MCI_BIT(CMDRDY))) -+ cpu_relax(); -+ break; -+ default: -+ /* -+ * TODO: None of the currently available AVR32-based -+ * boards allow MMC power to be turned off. Implement -+ * power control when this can be tested properly. -+ */ -+ break; -+ } -+} -+ -+static int atmci_get_ro(struct mmc_host *mmc) -+{ -+ int read_only = 0; -+ struct atmel_mci *host = mmc_priv(mmc); -+ -+ if (host->wp_pin >= 0) { -+ read_only = gpio_get_value(host->wp_pin); -+ dev_dbg(&mmc->class_dev, "card is %s\n", -+ read_only ? "read-only" : "read-write"); -+ } else { -+ dev_dbg(&mmc->class_dev, -+ "no pin for checking read-only switch." -+ " Assuming write-enable.\n"); -+ } -+ -+ return read_only; -+} -+ -+static struct mmc_host_ops atmci_ops = { -+ .request = atmci_request, -+ .set_ios = atmci_set_ios, -+ .get_ro = atmci_get_ro, -+}; -+ -+static void atmci_request_end(struct mmc_host *mmc, struct mmc_request *mrq) -+{ -+ struct atmel_mci *host = mmc_priv(mmc); -+ -+ WARN_ON(host->cmd || host->data); -+ host->mrq = NULL; -+ -+ mmc_request_done(mmc, mrq); -+} -+ -+static void send_stop_cmd(struct mmc_host *mmc, struct mmc_data *data, -+ u32 flags) -+{ -+ struct atmel_mci *host = mmc_priv(mmc); -+ -+ atmci_start_command(host, data->stop, host->stop_cmdr | flags); -+ mci_writel(host, IER, MCI_BIT(CMDRDY)); -+} -+ -+static void atmci_data_complete(struct atmel_mci *host, struct mmc_data *data) -+{ -+ host->data = NULL; -+ dma_unmap_sg(&host->pdev->dev, data->sg, host->dma.req.nr_sg, -+ ((data->flags & MMC_DATA_WRITE) -+ ? DMA_TO_DEVICE : DMA_FROM_DEVICE)); -+ -+ /* -+ * Data might complete before command for very short transfers -+ * (like READ_SCR) -+ */ -+ if (mci_cmd_is_complete(host) -+ && (!data->stop || mci_stop_is_complete(host))) -+ atmci_request_end(host->mmc, data->mrq); -+} -+ -+static void atmci_command_complete(struct atmel_mci *host, -+ struct mmc_command *cmd, u32 status) -+{ -+ if (status & MCI_BIT(RTOE)) -+ cmd->error = MMC_ERR_TIMEOUT; -+ else if ((cmd->flags & MMC_RSP_CRC) -+ && (status & MCI_BIT(RCRCE))) -+ cmd->error = MMC_ERR_BADCRC; -+ else if (status & (MCI_BIT(RINDE) | MCI_BIT(RDIRE) | MCI_BIT(RENDE))) -+ cmd->error = MMC_ERR_FAILED; -+ -+ if (cmd->error != MMC_ERR_NONE) { -+ dev_dbg(&host->mmc->class_dev, -+ "command error: op=0x%x status=0x%08x\n", -+ cmd->opcode, status); -+ -+ if (cmd->data) { -+ dma_stop_request(host->dma.req.req.dmac, -+ host->dma.req.req.channel); -+ mci_writel(host, IDR, MCI_BIT(NOTBUSY) -+ | MCI_DATA_ERROR_FLAGS); -+ host->data = NULL; -+ } -+ } -+} -+ -+static void atmci_tasklet_func(unsigned long priv) -+{ -+ struct mmc_host *mmc = (struct mmc_host *)priv; -+ struct atmel_mci *host = mmc_priv(mmc); -+ struct mmc_request *mrq = host->mrq; -+ struct mmc_data *data = host->data; -+ -+ dev_vdbg(&mmc->class_dev, -+ "tasklet: pending/completed/mask %lx/%lx/%x\n", -+ host->pending_events, host->completed_events, -+ mci_readl(host, IMR)); -+ -+ if (mci_clear_cmd_is_pending(host)) { -+ mci_set_cmd_complete(host); -+ atmci_command_complete(host, mrq->cmd, host->cmd_status); -+ if (!host->data || mci_data_is_complete(host) -+ || mci_data_error_is_complete(host)) -+ atmci_request_end(mmc, mrq); -+ } -+ if (mci_clear_stop_is_pending(host)) { -+ mci_set_stop_complete(host); -+ atmci_command_complete(host, mrq->stop, host->stop_status); -+ if (mci_data_is_complete(host) -+ || mci_data_error_is_complete(host)) -+ atmci_request_end(mmc, mrq); -+ } -+ if (mci_clear_dma_error_is_pending(host)) { -+ mci_set_dma_error_complete(host); -+ mci_clear_data_pending(host); -+ -+ /* DMA controller got bus error => invalid address */ -+ data->error = MMC_ERR_INVALID; -+ -+ dev_dbg(&mmc->class_dev, "dma error after %u bytes xfered\n", -+ host->data->bytes_xfered); -+ -+ if (data->stop -+ && !mci_set_stop_sent_is_completed(host)) -+ /* TODO: Check if card is still present */ -+ send_stop_cmd(host->mmc, data, 0); -+ -+ atmci_data_complete(host, data); -+ } -+ if (mci_clear_data_error_is_pending(host)) { -+ u32 status = host->data_status; -+ -+ mci_set_data_error_complete(host); -+ mci_clear_data_pending(host); -+ -+ dma_stop_request(host->dma.req.req.dmac, -+ host->dma.req.req.channel); -+ -+ if (status & MCI_BIT(DCRCE)) { -+ dev_dbg(&mmc->class_dev, "data CRC error\n"); -+ data->error = MMC_ERR_BADCRC; -+ } else if (status & MCI_BIT(DTOE)) { -+ dev_dbg(&mmc->class_dev, "data timeout error\n"); -+ data->error = MMC_ERR_TIMEOUT; -+ } else { -+ dev_dbg(&mmc->class_dev, "data FIFO error\n"); -+ data->error = MMC_ERR_FIFO; -+ } -+ dev_dbg(&mmc->class_dev, "bytes xfered: %u\n", -+ data->bytes_xfered); -+ -+ if (data->stop -+ && !mci_set_stop_sent_is_completed(host)) -+ /* TODO: Check if card is still present */ -+ send_stop_cmd(host->mmc, data, 0); -+ -+ atmci_data_complete(host, data); -+ } -+ if (mci_clear_data_is_pending(host)) { -+ mci_set_data_complete(host); -+ data->bytes_xfered = data->blocks * data->blksz; -+ atmci_data_complete(host, data); -+ } -+ if (mci_clear_card_detect_is_pending(host)) { -+ /* Reset controller if card is gone */ -+ if (!host->present) { -+ mci_writel(host, CR, MCI_BIT(SWRST)); -+ mci_writel(host, IDR, ~0UL); -+ mci_writel(host, CR, MCI_BIT(MCIEN)); -+ } -+ -+ /* Clean up queue if present */ -+ if (mrq) { -+ if (!mci_cmd_is_complete(host)) -+ mrq->cmd->error = MMC_ERR_TIMEOUT; -+ if (mrq->data && !mci_data_is_complete(host) -+ && !mci_data_error_is_complete(host)) { -+ dma_stop_request(host->dma.req.req.dmac, -+ host->dma.req.req.channel); -+ host->data->error = MMC_ERR_TIMEOUT; -+ atmci_data_complete(host, data); -+ } -+ if (mrq->stop && !mci_stop_is_complete(host)) -+ mrq->stop->error = MMC_ERR_TIMEOUT; -+ -+ host->cmd = NULL; -+ atmci_request_end(mmc, mrq); -+ } -+ mmc_detect_change(host->mmc, msecs_to_jiffies(100)); -+ } -+} -+ -+static void atmci_cmd_interrupt(struct mmc_host *mmc, u32 status) -+{ -+ struct atmel_mci *host = mmc_priv(mmc); -+ struct mmc_command *cmd = host->cmd; -+ -+ /* -+ * Read the response now so that we're free to send a new -+ * command immediately. -+ */ -+ cmd->resp[0] = mci_readl(host, RSPR); -+ cmd->resp[1] = mci_readl(host, RSPR); -+ cmd->resp[2] = mci_readl(host, RSPR); -+ cmd->resp[3] = mci_readl(host, RSPR); -+ -+ mci_writel(host, IDR, MCI_BIT(CMDRDY)); -+ host->cmd = NULL; -+ -+ if (mci_stop_sent_is_complete(host)) { -+ host->stop_status = status; -+ mci_set_stop_pending(host); -+ } else { -+ if (host->mrq->stop && mci_dma_is_complete(host) -+ && !mci_set_stop_sent_is_completed(host)) -+ send_stop_cmd(host->mmc, host->data, 0); -+ host->cmd_status = status; -+ mci_set_cmd_pending(host); -+ } -+ -+ tasklet_schedule(&host->tasklet); -+} -+ -+static void atmci_xfer_complete(struct dma_request *_req) -+{ -+ struct dma_request_sg *req = to_dma_request_sg(_req); -+ struct atmel_mci_dma *dma; -+ struct atmel_mci *host; -+ struct mmc_data *data; -+ -+ dma = container_of(req, struct atmel_mci_dma, req); -+ host = container_of(dma, struct atmel_mci, dma); -+ data = host->data; -+ -+ /* -+ * This callback may be called before we see the CMDRDY -+ * interrupt under heavy irq load (possibly caused by other -+ * drivers) or when interrupts are disabled for a long time. -+ */ -+ mci_set_dma_complete(host); -+ if (data->stop && mci_cmd_is_complete(host) -+ && !mci_set_stop_sent_is_completed(host)) -+ send_stop_cmd(host->mmc, data, 0); -+ -+ /* -+ * Regardless of what the documentation says, we have to wait -+ * for NOTBUSY even after block read operations. -+ * -+ * When the DMA transfer is complete, the controller may still -+ * be reading the CRC from the card, i.e. the data transfer is -+ * still in progress and we haven't seen all the potential -+ * error bits yet. -+ */ -+ mci_writel(host, IER, MCI_BIT(NOTBUSY)); -+} -+ -+static void atmci_dma_error(struct dma_request *_req) -+{ -+ struct dma_request_sg *req = to_dma_request_sg(_req); -+ struct atmel_mci_dma *dma; -+ struct atmel_mci *host; -+ -+ dma = container_of(req, struct atmel_mci_dma, req); -+ host = container_of(dma, struct atmel_mci, dma); -+ -+ mci_writel(host, IDR, (MCI_BIT(NOTBUSY) -+ | MCI_DATA_ERROR_FLAGS)); -+ -+ mci_set_dma_error_pending(host); -+ tasklet_schedule(&host->tasklet); -+} -+ -+static irqreturn_t atmci_interrupt(int irq, void *dev_id) -+{ -+ struct mmc_host *mmc = dev_id; -+ struct atmel_mci *host = mmc_priv(mmc); -+ u32 status, mask, pending; -+ -+ spin_lock(&mmc->lock); -+ -+ status = mci_readl(host, SR); -+ mask = mci_readl(host, IMR); -+ pending = status & mask; -+ -+ do { -+ if (pending & MCI_DATA_ERROR_FLAGS) { -+ mci_writel(host, IDR, (MCI_BIT(NOTBUSY) -+ | MCI_DATA_ERROR_FLAGS)); -+ host->data_status = status; -+ mci_set_data_error_pending(host); -+ tasklet_schedule(&host->tasklet); -+ break; -+ } -+ if (pending & MCI_BIT(CMDRDY)) -+ atmci_cmd_interrupt(mmc, status); -+ if (pending & MCI_BIT(NOTBUSY)) { -+ mci_writel(host, IDR, (MCI_BIT(NOTBUSY) -+ | MCI_DATA_ERROR_FLAGS)); -+ mci_set_data_pending(host); -+ tasklet_schedule(&host->tasklet); -+ } -+ -+ status = mci_readl(host, SR); -+ mask = mci_readl(host, IMR); -+ pending = status & mask; -+ } while (pending); -+ -+ spin_unlock(&mmc->lock); -+ -+ return IRQ_HANDLED; -+} -+ -+static irqreturn_t atmci_detect_change(int irq, void *dev_id) -+{ -+ struct mmc_host *mmc = dev_id; -+ struct atmel_mci *host = mmc_priv(mmc); -+ -+ int present = !gpio_get_value(irq_to_gpio(irq)); -+ -+ if (present != host->present) { -+ dev_dbg(&mmc->class_dev, "card %s\n", -+ present ? "inserted" : "removed"); -+ host->present = present; -+ mci_set_card_detect_pending(host); -+ tasklet_schedule(&host->tasklet); -+ } -+ return IRQ_HANDLED; -+} -+ -+static int __devinit atmci_probe(struct platform_device *pdev) -+{ -+ struct mci_platform_data *board; -+ struct atmel_mci *host; -+ struct mmc_host *mmc; -+ struct resource *regs; -+ int irq; -+ int ret; -+ -+ regs = platform_get_resource(pdev, IORESOURCE_MEM, 0); -+ if (!regs) -+ return -ENXIO; -+ irq = platform_get_irq(pdev, 0); -+ if (irq < 0) -+ return irq; -+ -+ board = pdev->dev.platform_data; -+ -+ mmc = mmc_alloc_host(sizeof(struct atmel_mci), &pdev->dev); -+ if (!mmc) -+ return -ENOMEM; -+ -+ host = mmc_priv(mmc); -+ host->pdev = pdev; -+ host->mmc = mmc; -+ if (board) { -+ host->detect_pin = board->detect_pin; -+ host->wp_pin = board->wp_pin; -+ } else { -+ host->detect_pin = -1; -+ host->detect_pin = -1; -+ } -+ -+ host->mck = clk_get(&pdev->dev, "mci_clk"); -+ if (IS_ERR(host->mck)) { -+ ret = PTR_ERR(host->mck); -+ goto out_free_host; -+ } -+ clk_enable(host->mck); -+ -+ ret = -ENOMEM; -+ host->regs = ioremap(regs->start, regs->end - regs->start + 1); -+ if (!host->regs) -+ goto out_disable_clk; -+ -+ host->bus_hz = clk_get_rate(host->mck); -+ host->mapbase = regs->start; -+ -+ mmc->ops = &atmci_ops; -+ mmc->f_min = (host->bus_hz + 511) / 512; -+ mmc->f_max = min((unsigned int)(host->bus_hz / 2), fmax); -+ mmc->ocr_avail = MMC_VDD_32_33 | MMC_VDD_33_34; -+ mmc->caps |= MMC_CAP_4_BIT_DATA; -+ -+ tasklet_init(&host->tasklet, atmci_tasklet_func, (unsigned long)mmc); -+ -+ ret = request_irq(irq, atmci_interrupt, 0, "mmci", mmc); -+ if (ret) -+ goto out_unmap; -+ -+ /* Assume card is present if we don't have a detect pin */ -+ host->present = 1; -+ if (host->detect_pin >= 0) { -+ if (gpio_request(host->detect_pin, "mmc_detect")) { -+ dev_dbg(&mmc->class_dev, "no detect pin available\n"); -+ host->detect_pin = -1; -+ } else { -+ host->present = !gpio_get_value(host->detect_pin); -+ } -+ } -+ if (host->wp_pin >= 0) { -+ if (gpio_request(host->wp_pin, "mmc_wp")) { -+ dev_dbg(&mmc->class_dev, "no WP pin available\n"); -+ host->wp_pin = -1; -+ } -+ } -+ -+ /* TODO: Get this information from platform data */ -+ ret = -ENOMEM; -+ host->dma.req.req.dmac = find_dma_controller(0); -+ if (!host->dma.req.req.dmac) { -+ dev_dbg(&mmc->class_dev, "no DMA controller available\n"); -+ goto out_free_irq; -+ } -+ ret = dma_alloc_channel(host->dma.req.req.dmac); -+ if (ret < 0) { -+ dev_dbg(&mmc->class_dev, "unable to allocate DMA channel\n"); -+ goto out_free_irq; -+ } -+ host->dma.req.req.channel = ret; -+ host->dma.req.width = DMA_WIDTH_32BIT; -+ host->dma.req.req.xfer_complete = atmci_xfer_complete; -+ host->dma.req.req.block_complete = NULL; // atmci_block_complete; -+ host->dma.req.req.error = atmci_dma_error; -+ host->dma.rx_periph_id = 0; -+ host->dma.tx_periph_id = 1; -+ -+ mci_writel(host, CR, MCI_BIT(SWRST)); -+ mci_writel(host, IDR, ~0UL); -+ -+ platform_set_drvdata(pdev, host); -+ -+ mmc_add_host(mmc); -+ -+ if (host->detect_pin >= 0) { -+ ret = request_irq(gpio_to_irq(host->detect_pin), -+ atmci_detect_change, -+ IRQF_TRIGGER_FALLING | IRQF_TRIGGER_RISING, -+ DRIVER_NAME, mmc); -+ if (ret) { -+ dev_dbg(&mmc->class_dev, -+ "could not request IRQ %d for detect pin\n", -+ gpio_to_irq(host->detect_pin)); -+ gpio_free(host->detect_pin); -+ host->detect_pin = -1; -+ } -+ } -+ -+ dev_info(&mmc->class_dev, "Atmel MCI controller at 0x%08lx irq %d\n", -+ host->mapbase, irq); -+ -+ atmci_init_debugfs(host); -+ -+ return 0; -+ -+out_free_irq: -+ if (host->detect_pin >= 0) -+ gpio_free(host->detect_pin); -+ if (host->wp_pin >= 0) -+ gpio_free(host->wp_pin); -+ free_irq(irq, mmc); -+out_unmap: -+ iounmap(host->regs); -+out_disable_clk: -+ clk_disable(host->mck); -+ clk_put(host->mck); -+out_free_host: -+ mmc_free_host(mmc); -+ return ret; -+} -+ -+static int __devexit atmci_remove(struct platform_device *pdev) -+{ -+ struct atmel_mci *host = platform_get_drvdata(pdev); -+ -+ platform_set_drvdata(pdev, NULL); -+ -+ if (host) { -+ atmci_cleanup_debugfs(host); -+ -+ if (host->detect_pin >= 0) { -+ free_irq(gpio_to_irq(host->detect_pin), host->mmc); -+ cancel_delayed_work(&host->mmc->detect); -+ gpio_free(host->detect_pin); -+ } -+ -+ mmc_remove_host(host->mmc); -+ -+ mci_writel(host, IDR, ~0UL); -+ mci_writel(host, CR, MCI_BIT(MCIDIS)); -+ mci_readl(host, SR); -+ -+ dma_release_channel(host->dma.req.req.dmac, -+ host->dma.req.req.channel); -+ -+ if (host->wp_pin >= 0) -+ gpio_free(host->wp_pin); -+ -+ free_irq(platform_get_irq(pdev, 0), host->mmc); -+ iounmap(host->regs); -+ -+ clk_disable(host->mck); -+ clk_put(host->mck); -+ -+ mmc_free_host(host->mmc); -+ } -+ return 0; -+} -+ -+static struct platform_driver atmci_driver = { -+ .probe = atmci_probe, -+ .remove = __devexit_p(atmci_remove), -+ .driver = { -+ .name = DRIVER_NAME, -+ }, -+}; -+ -+static int __init atmci_init(void) -+{ -+ return platform_driver_register(&atmci_driver); -+} -+ -+static void __exit atmci_exit(void) -+{ -+ platform_driver_unregister(&atmci_driver); -+} -+ -+module_init(atmci_init); -+module_exit(atmci_exit); -+ -+MODULE_DESCRIPTION("Atmel Multimedia Card Interface driver"); -+MODULE_LICENSE("GPL"); -diff --git a/drivers/mmc/host/atmel-mci.h b/drivers/mmc/host/atmel-mci.h -new file mode 100644 -index 0000000..60d15c4 ---- /dev/null -+++ b/drivers/mmc/host/atmel-mci.h -@@ -0,0 +1,192 @@ -+/* -+ * Atmel MultiMedia Card Interface driver -+ * -+ * Copyright (C) 2004-2006 Atmel Corporation -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 as -+ * published by the Free Software Foundation. -+ */ -+#ifndef __DRIVERS_MMC_ATMEL_MCI_H__ -+#define __DRIVERS_MMC_ATMEL_MCI_H__ -+ -+/* MCI register offsets */ -+#define MCI_CR 0x0000 -+#define MCI_MR 0x0004 -+#define MCI_DTOR 0x0008 -+#define MCI_SDCR 0x000c -+#define MCI_ARGR 0x0010 -+#define MCI_CMDR 0x0014 -+#define MCI_BLKR 0x0018 -+#define MCI_RSPR 0x0020 -+#define MCI_RSPR1 0x0024 -+#define MCI_RSPR2 0x0028 -+#define MCI_RSPR3 0x002c -+#define MCI_RDR 0x0030 -+#define MCI_TDR 0x0034 -+#define MCI_SR 0x0040 -+#define MCI_IER 0x0044 -+#define MCI_IDR 0x0048 -+#define MCI_IMR 0x004c -+ -+/* Bitfields in CR */ -+#define MCI_MCIEN_OFFSET 0 -+#define MCI_MCIEN_SIZE 1 -+#define MCI_MCIDIS_OFFSET 1 -+#define MCI_MCIDIS_SIZE 1 -+#define MCI_PWSEN_OFFSET 2 -+#define MCI_PWSEN_SIZE 1 -+#define MCI_PWSDIS_OFFSET 3 -+#define MCI_PWSDIS_SIZE 1 -+#define MCI_SWRST_OFFSET 7 -+#define MCI_SWRST_SIZE 1 -+ -+/* Bitfields in MR */ -+#define MCI_CLKDIV_OFFSET 0 -+#define MCI_CLKDIV_SIZE 8 -+#define MCI_PWSDIV_OFFSET 8 -+#define MCI_PWSDIV_SIZE 3 -+#define MCI_RDPROOF_OFFSET 11 -+#define MCI_RDPROOF_SIZE 1 -+#define MCI_WRPROOF_OFFSET 12 -+#define MCI_WRPROOF_SIZE 1 -+#define MCI_DMAPADV_OFFSET 14 -+#define MCI_DMAPADV_SIZE 1 -+#define MCI_BLKLEN_OFFSET 16 -+#define MCI_BLKLEN_SIZE 16 -+ -+/* Bitfields in DTOR */ -+#define MCI_DTOCYC_OFFSET 0 -+#define MCI_DTOCYC_SIZE 4 -+#define MCI_DTOMUL_OFFSET 4 -+#define MCI_DTOMUL_SIZE 3 -+ -+/* Bitfields in SDCR */ -+#define MCI_SDCSEL_OFFSET 0 -+#define MCI_SDCSEL_SIZE 4 -+#define MCI_SDCBUS_OFFSET 7 -+#define MCI_SDCBUS_SIZE 1 -+ -+/* Bitfields in ARGR */ -+#define MCI_ARG_OFFSET 0 -+#define MCI_ARG_SIZE 32 -+ -+/* Bitfields in CMDR */ -+#define MCI_CMDNB_OFFSET 0 -+#define MCI_CMDNB_SIZE 6 -+#define MCI_RSPTYP_OFFSET 6 -+#define MCI_RSPTYP_SIZE 2 -+#define MCI_SPCMD_OFFSET 8 -+#define MCI_SPCMD_SIZE 3 -+#define MCI_OPDCMD_OFFSET 11 -+#define MCI_OPDCMD_SIZE 1 -+#define MCI_MAXLAT_OFFSET 12 -+#define MCI_MAXLAT_SIZE 1 -+#define MCI_TRCMD_OFFSET 16 -+#define MCI_TRCMD_SIZE 2 -+#define MCI_TRDIR_OFFSET 18 -+#define MCI_TRDIR_SIZE 1 -+#define MCI_TRTYP_OFFSET 19 -+#define MCI_TRTYP_SIZE 2 -+ -+/* Bitfields in BLKR */ -+#define MCI_BCNT_OFFSET 0 -+#define MCI_BCNT_SIZE 16 -+ -+/* Bitfields in RSPRn */ -+#define MCI_RSP_OFFSET 0 -+#define MCI_RSP_SIZE 32 -+ -+/* Bitfields in SR/IER/IDR/IMR */ -+#define MCI_CMDRDY_OFFSET 0 -+#define MCI_CMDRDY_SIZE 1 -+#define MCI_RXRDY_OFFSET 1 -+#define MCI_RXRDY_SIZE 1 -+#define MCI_TXRDY_OFFSET 2 -+#define MCI_TXRDY_SIZE 1 -+#define MCI_BLKE_OFFSET 3 -+#define MCI_BLKE_SIZE 1 -+#define MCI_DTIP_OFFSET 4 -+#define MCI_DTIP_SIZE 1 -+#define MCI_NOTBUSY_OFFSET 5 -+#define MCI_NOTBUSY_SIZE 1 -+#define MCI_ENDRX_OFFSET 6 -+#define MCI_ENDRX_SIZE 1 -+#define MCI_ENDTX_OFFSET 7 -+#define MCI_ENDTX_SIZE 1 -+#define MCI_RXBUFF_OFFSET 14 -+#define MCI_RXBUFF_SIZE 1 -+#define MCI_TXBUFE_OFFSET 15 -+#define MCI_TXBUFE_SIZE 1 -+#define MCI_RINDE_OFFSET 16 -+#define MCI_RINDE_SIZE 1 -+#define MCI_RDIRE_OFFSET 17 -+#define MCI_RDIRE_SIZE 1 -+#define MCI_RCRCE_OFFSET 18 -+#define MCI_RCRCE_SIZE 1 -+#define MCI_RENDE_OFFSET 19 -+#define MCI_RENDE_SIZE 1 -+#define MCI_RTOE_OFFSET 20 -+#define MCI_RTOE_SIZE 1 -+#define MCI_DCRCE_OFFSET 21 -+#define MCI_DCRCE_SIZE 1 -+#define MCI_DTOE_OFFSET 22 -+#define MCI_DTOE_SIZE 1 -+#define MCI_OVRE_OFFSET 30 -+#define MCI_OVRE_SIZE 1 -+#define MCI_UNRE_OFFSET 31 -+#define MCI_UNRE_SIZE 1 -+ -+/* Constants for DTOMUL */ -+#define MCI_DTOMUL_1_CYCLE 0 -+#define MCI_DTOMUL_16_CYCLES 1 -+#define MCI_DTOMUL_128_CYCLES 2 -+#define MCI_DTOMUL_256_CYCLES 3 -+#define MCI_DTOMUL_1024_CYCLES 4 -+#define MCI_DTOMUL_4096_CYCLES 5 -+#define MCI_DTOMUL_65536_CYCLES 6 -+#define MCI_DTOMUL_1048576_CYCLES 7 -+ -+/* Constants for RSPTYP */ -+#define MCI_RSPTYP_NO_RESP 0 -+#define MCI_RSPTYP_48_BIT 1 -+#define MCI_RSPTYP_136_BIT 2 -+ -+/* Constants for SPCMD */ -+#define MCI_SPCMD_NO_SPEC_CMD 0 -+#define MCI_SPCMD_INIT_CMD 1 -+#define MCI_SPCMD_SYNC_CMD 2 -+#define MCI_SPCMD_INT_CMD 4 -+#define MCI_SPCMD_INT_RESP 5 -+ -+/* Constants for TRCMD */ -+#define MCI_TRCMD_NO_TRANS 0 -+#define MCI_TRCMD_START_TRANS 1 -+#define MCI_TRCMD_STOP_TRANS 2 -+ -+/* Constants for TRTYP */ -+#define MCI_TRTYP_BLOCK 0 -+#define MCI_TRTYP_MULTI_BLOCK 1 -+#define MCI_TRTYP_STREAM 2 -+ -+/* Bit manipulation macros */ -+#define MCI_BIT(name) \ -+ (1 << MCI_##name##_OFFSET) -+#define MCI_BF(name,value) \ -+ (((value) & ((1 << MCI_##name##_SIZE) - 1)) \ -+ << MCI_##name##_OFFSET) -+#define MCI_BFEXT(name,value) \ -+ (((value) >> MCI_##name##_OFFSET) \ -+ & ((1 << MCI_##name##_SIZE) - 1)) -+#define MCI_BFINS(name,value,old) \ -+ (((old) & ~(((1 << MCI_##name##_SIZE) - 1) \ -+ << MCI_##name##_OFFSET)) \ -+ | MCI_BF(name,value)) -+ -+/* Register access macros */ -+#define mci_readl(port,reg) \ -+ __raw_readl((port)->regs + MCI_##reg) -+#define mci_writel(port,reg,value) \ -+ __raw_writel((value), (port)->regs + MCI_##reg) -+ -+#endif /* __DRIVERS_MMC_ATMEL_MCI_H__ */ -diff --git a/drivers/mtd/chips/cfi_cmdset_0001.c b/drivers/mtd/chips/cfi_cmdset_0001.c -index 2f19fa7..94304ca 100644 ---- a/drivers/mtd/chips/cfi_cmdset_0001.c -+++ b/drivers/mtd/chips/cfi_cmdset_0001.c -@@ -50,6 +50,7 @@ - #define I82802AC 0x00ac - #define MANUFACTURER_ST 0x0020 - #define M50LPW080 0x002F -+#define AT49BV640D 0x02de - - static int cfi_intelext_read (struct mtd_info *, loff_t, size_t, size_t *, u_char *); - static int cfi_intelext_write_words(struct mtd_info *, loff_t, size_t, size_t *, const u_char *); -@@ -156,6 +157,47 @@ static void cfi_tell_features(struct cfi_pri_intelext *extp) - } - #endif - -+/* Atmel chips don't use the same PRI format as Intel chips */ -+static void fixup_convert_atmel_pri(struct mtd_info *mtd, void *param) -+{ -+ struct map_info *map = mtd->priv; -+ struct cfi_private *cfi = map->fldrv_priv; -+ struct cfi_pri_intelext *extp = cfi->cmdset_priv; -+ struct cfi_pri_atmel atmel_pri; -+ uint32_t features = 0; -+ -+ /* Reverse byteswapping */ -+ extp->FeatureSupport = cpu_to_le32(extp->FeatureSupport); -+ extp->BlkStatusRegMask = cpu_to_le16(extp->BlkStatusRegMask); -+ extp->ProtRegAddr = cpu_to_le16(extp->ProtRegAddr); -+ -+ memcpy(&atmel_pri, extp, sizeof(atmel_pri)); -+ memset((char *)extp + 5, 0, sizeof(*extp) - 5); -+ -+ printk(KERN_ERR "atmel Features: %02x\n", atmel_pri.Features); -+ -+ if (atmel_pri.Features & 0x01) /* chip erase supported */ -+ features |= (1<<0); -+ if (atmel_pri.Features & 0x02) /* erase suspend supported */ -+ features |= (1<<1); -+ if (atmel_pri.Features & 0x04) /* program suspend supported */ -+ features |= (1<<2); -+ if (atmel_pri.Features & 0x08) /* simultaneous operations supported */ -+ features |= (1<<9); -+ if (atmel_pri.Features & 0x20) /* page mode read supported */ -+ features |= (1<<7); -+ if (atmel_pri.Features & 0x40) /* queued erase supported */ -+ features |= (1<<4); -+ if (atmel_pri.Features & 0x80) /* Protection bits supported */ -+ features |= (1<<6); -+ -+ extp->FeatureSupport = features; -+ -+ /* burst write mode not supported */ -+ cfi->cfiq->BufWriteTimeoutTyp = 0; -+ cfi->cfiq->BufWriteTimeoutMax = 0; -+} -+ - #ifdef CMDSET0001_DISABLE_ERASE_SUSPEND_ON_WRITE - /* Some Intel Strata Flash prior to FPO revision C has bugs in this area */ - static void fixup_intel_strataflash(struct mtd_info *mtd, void* param) -@@ -233,6 +275,7 @@ static void fixup_use_powerup_lock(struct mtd_info *mtd, void *param) - } - - static struct cfi_fixup cfi_fixup_table[] = { -+ { CFI_MFR_ATMEL, CFI_ID_ANY, fixup_convert_atmel_pri, NULL }, - #ifdef CMDSET0001_DISABLE_ERASE_SUSPEND_ON_WRITE - { CFI_MFR_ANY, CFI_ID_ANY, fixup_intel_strataflash, NULL }, - #endif -diff --git a/drivers/mtd/chips/cfi_cmdset_0002.c b/drivers/mtd/chips/cfi_cmdset_0002.c -index 1f64458..205977b 100644 ---- a/drivers/mtd/chips/cfi_cmdset_0002.c -+++ b/drivers/mtd/chips/cfi_cmdset_0002.c -@@ -185,6 +185,10 @@ static void fixup_convert_atmel_pri(struct mtd_info *mtd, void *param) - extp->TopBottom = 2; - else - extp->TopBottom = 3; -+ -+ /* burst write mode not supported */ -+ cfi->cfiq->BufWriteTimeoutTyp = 0; -+ cfi->cfiq->BufWriteTimeoutMax = 0; - } - - static void fixup_use_secsi(struct mtd_info *mtd, void *param) -@@ -217,6 +221,7 @@ static void fixup_use_atmel_lock(struct mtd_info *mtd, void *param) - } - - static struct cfi_fixup cfi_fixup_table[] = { -+ { CFI_MFR_ATMEL, CFI_ID_ANY, fixup_convert_atmel_pri, NULL }, - #ifdef AMD_BOOTLOC_BUG - { CFI_MFR_AMD, CFI_ID_ANY, fixup_amd_bootblock, NULL }, - #endif -@@ -229,7 +234,6 @@ static struct cfi_fixup cfi_fixup_table[] = { - #if !FORCE_WORD_WRITE - { CFI_MFR_ANY, CFI_ID_ANY, fixup_use_write_buffers, NULL, }, - #endif -- { CFI_MFR_ATMEL, CFI_ID_ANY, fixup_convert_atmel_pri, NULL }, - { 0, 0, NULL, NULL } - }; - static struct cfi_fixup jedec_fixup_table[] = { -diff --git a/drivers/pcmcia/Kconfig b/drivers/pcmcia/Kconfig -index c0c77f8..7623315 100644 ---- a/drivers/pcmcia/Kconfig -+++ b/drivers/pcmcia/Kconfig -@@ -271,6 +271,13 @@ config AT91_CF - Say Y here to support the CompactFlash controller on AT91 chips. - Or choose M to compile the driver as a module named "at91_cf". - -+config AT32_CF -+ tristate "AT32AP CompactFlash Controller" -+ depends on PCMCIA && AVR32 && PLATFORM_AT32AP -+ help -+ Say Y here to support the CompactFlash controller on AT32 chips. -+ Or choose M to compile the driver as a module named "at32_cf". -+ - config PCCARD_NONSTATIC - tristate - -diff --git a/drivers/pcmcia/Makefile b/drivers/pcmcia/Makefile -index 4276965..08d7ffa 100644 ---- a/drivers/pcmcia/Makefile -+++ b/drivers/pcmcia/Makefile -@@ -37,6 +37,7 @@ obj-$(CONFIG_PCMCIA_VRC4171) += vrc4171_card.o - obj-$(CONFIG_PCMCIA_VRC4173) += vrc4173_cardu.o - obj-$(CONFIG_OMAP_CF) += omap_cf.o - obj-$(CONFIG_AT91_CF) += at91_cf.o -+obj-$(CONFIG_AT32_CF) += at32_cf.o - - sa11xx_core-y += soc_common.o sa11xx_base.o - pxa2xx_core-y += soc_common.o pxa2xx_base.o -diff --git a/drivers/pcmcia/at32_cf.c b/drivers/pcmcia/at32_cf.c -new file mode 100644 -index 0000000..ebe1495 ---- /dev/null -+++ b/drivers/pcmcia/at32_cf.c -@@ -0,0 +1,531 @@ -+/* -+ * Driver for AVR32 Static Memory Controller: CompactFlash support -+ * -+ * Copyright (C) 2006 Atmel Norway -+ * -+ * This program is free software; you can redistribute it and/or -+ * modify it under the terms of the GNU General Public License as -+ * published by the Free Software Foundation; either version 2 of the -+ * License, or (at your option) any later version. -+ * -+ * This program is distributed in the hope that it will be useful, but -+ * WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU -+ * General Public License for more details. -+ * -+ * You should have received a copy of the GNU General Public License -+ * along with this program; if not, write to the Free Software -+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA -+ * 02111-1307, USA. -+ * -+ * The full GNU General Public License is included in this -+ * distribution in the file called COPYING. -+ */ -+#include <linux/module.h> -+#include <linux/kernel.h> -+#include <linux/platform_device.h> -+#include <linux/init.h> -+#include <linux/device.h> -+#include <linux/delay.h> -+#include <linux/interrupt.h> -+#include <linux/err.h> -+#include <linux/clk.h> -+#include <linux/dma-mapping.h> -+ -+#include <pcmcia/ss.h> -+ -+#include <asm/gpio.h> -+#include <asm/io.h> -+#include <asm/arch/board.h> -+ -+#include <asm/arch/smc.h> -+ -+struct at32_cf_socket { -+ struct pcmcia_socket socket; -+ int detect_pin; -+ int reset_pin; -+ int vcc_pin; -+ int ready_pin; -+ struct resource res_attr; -+ struct resource res_mem; -+ struct resource res_io; -+ struct smc_config smc; -+ unsigned int irq; -+ unsigned int cf_cs; -+ socket_state_t state; -+ unsigned present:1; -+}; -+#define to_at32_cf(sock) container_of(sock, struct at32_cf_socket, socket) -+ -+/* -+ * We have the following memory layout relative to the base address: -+ * -+ * Alt IDE Mode: 00e0 0000 -> 00ff ffff -+ * True IDE Mode: 00c0 0000 -> 00df ffff -+ * I/O memory: 0080 0000 -> 00bf ffff -+ * Common memory: 0040 0000 -> 007f ffff -+ * Attribute memory: 0000 0000 -> 003f ffff -+ */ -+#define CF_ATTR_OFFSET 0x00000000 -+#define CF_MEM_OFFSET 0x00400000 -+#define CF_IO_OFFSET 0x00800000 -+#define CF_RES_SIZE 4096 -+ -+#ifdef DEBUG -+ -+static int pc_debug; -+module_param(pc_debug, int, 0644); -+ -+static void at32_cf_debug(struct at32_cf_socket *cf, const char *func, -+ int level, const char *fmt, ...) -+{ -+ va_list args; -+ -+ if (pc_debug > level) { -+ printk(KERN_DEBUG "at32_cf/%u: %s: ", cf->cf_cs, func); -+ va_start(args, fmt); -+ vprintk(fmt, args); -+ va_end(args); -+ } -+} -+ -+#define debug(cf, lvl, fmt, arg...) \ -+ at32_cf_debug(cf, __func__, lvl, fmt, ##arg) -+ -+#else -+#define debug(cf, lvl, fmt, arg...) do { } while (0) -+#endif -+ -+static inline int at32_cf_present(struct at32_cf_socket *cf) -+{ -+ int present = 1; -+ -+ /* If we don't have a detect pin, assume the card is present */ -+ if (cf->detect_pin >= 0) -+ present = !gpio_get_value(cf->detect_pin); -+ -+ return present; -+} -+ -+static irqreturn_t at32_cf_irq(int irq, void *dev_id) -+{ -+ struct at32_cf_socket *cf = dev_id; -+ unsigned int present; -+ -+ present = at32_cf_present(cf); -+ if (present != cf->present) { -+ cf->present = present; -+ debug(cf, 3, "card %s\n", present ? "present" : "gone"); -+ pcmcia_parse_events(&cf->socket, SS_DETECT); -+ } -+ -+ return IRQ_HANDLED; -+} -+ -+static int at32_cf_get_status(struct pcmcia_socket *sock, u_int *value) -+{ -+ struct at32_cf_socket *cf; -+ u_int status = 0; -+ -+ cf = container_of(sock, struct at32_cf_socket, socket); -+ -+ if (at32_cf_present(cf)) { -+ /* NOTE: gpio on AP7xxx is 3.3V */ -+ status = SS_DETECT | SS_3VCARD; -+ if (cf->ready_pin < 0 || gpio_get_value(cf->ready_pin)) -+ status |= SS_READY; -+ if (cf->vcc_pin < 0 || gpio_get_value(cf->vcc_pin)) -+ status |= SS_POWERON; -+ } -+ -+ *value = status; -+ return 0; -+} -+ -+static int at32_cf_set_socket(struct pcmcia_socket *sock, socket_state_t *state) -+{ -+ struct at32_cf_socket *cf = container_of(sock, struct at32_cf_socket, socket); -+ -+ debug(cf, 2, "mask: %s%s%s%s%s%sflags: %s%s%s%s%s%sVcc %d Vpp %d irq %d\n", -+ (state->csc_mask==0)?"<NONE> ":"", -+ (state->csc_mask&SS_DETECT)?"DETECT ":"", -+ (state->csc_mask&SS_READY)?"READY ":"", -+ (state->csc_mask&SS_BATDEAD)?"BATDEAD ":"", -+ (state->csc_mask&SS_BATWARN)?"BATWARN ":"", -+ (state->csc_mask&SS_STSCHG)?"STSCHG ":"", -+ (state->flags==0)?"<NONE> ":"", -+ (state->flags&SS_PWR_AUTO)?"PWR_AUTO ":"", -+ (state->flags&SS_IOCARD)?"IOCARD ":"", -+ (state->flags&SS_RESET)?"RESET ":"", -+ (state->flags&SS_SPKR_ENA)?"SPKR_ENA ":"", -+ (state->flags&SS_OUTPUT_ENA)?"OUTPUT_ENA ":"", -+ state->Vcc, state->Vpp, state->io_irq); -+ -+ /* -+ * TODO: Allow boards to override this in case they have level -+ * converters. -+ */ -+ switch (state->Vcc) { -+ case 0: -+ if (cf->vcc_pin >= 0) -+ gpio_set_value(cf->vcc_pin, 0); -+ break; -+ case 33: -+ if (cf->vcc_pin >= 0) -+ gpio_set_value(cf->vcc_pin, 1); -+ break; -+ default: -+ return -EINVAL; -+ } -+ -+ if (cf->reset_pin >= 0) -+ gpio_set_value(cf->reset_pin, state->flags & SS_RESET); -+ -+ cf->state = *state; -+ -+ return 0; -+} -+ -+static int at32_cf_socket_init(struct pcmcia_socket *sock) -+{ -+ debug(to_at32_cf(sock), 2, "called\n"); -+ -+ return 0; -+} -+ -+static int at32_cf_suspend(struct pcmcia_socket *sock) -+{ -+ debug(to_at32_cf(sock), 2, "called\n"); -+ -+ at32_cf_set_socket(sock, &dead_socket); -+ -+ return 0; -+} -+ -+static int at32_cf_set_io_map(struct pcmcia_socket *sock, -+ struct pccard_io_map *map) -+{ -+ struct at32_cf_socket *cf = container_of(sock, struct at32_cf_socket, socket); -+ int retval; -+ -+ debug(cf, 2, "map %u speed %u start 0x%08x stop 0x%08x\n", -+ map->map, map->speed, map->start, map->stop); -+ debug(cf, 2, "flags: %s%s%s%s%s%s%s%s\n", -+ (map->flags == 0) ? "<NONE>":"", -+ (map->flags & MAP_ACTIVE) ? "ACTIVE " : "", -+ (map->flags & MAP_16BIT) ? "16BIT " : "", -+ (map->flags & MAP_AUTOSZ) ? "AUTOSZ " : "", -+ (map->flags & MAP_0WS) ? "0WS " : "", -+ (map->flags & MAP_WRPROT) ? "WRPROT " : "", -+ (map->flags & MAP_USE_WAIT) ? "USE_WAIT " : "", -+ (map->flags & MAP_PREFETCH) ? "PREFETCH " : ""); -+ -+ map->flags &= MAP_ACTIVE | MAP_16BIT | MAP_USE_WAIT; -+ -+ if (map->flags & MAP_16BIT) -+ cf->smc.bus_width = 2; -+ else -+ cf->smc.bus_width = 1; -+ -+ if (map->flags & MAP_USE_WAIT) -+ cf->smc.nwait_mode = 3; -+ else -+ cf->smc.nwait_mode = 0; -+ -+ retval = smc_set_configuration(cf->cf_cs, &cf->smc); -+ if (retval) { -+ printk(KERN_ERR "at32_cf: could not set up SMC for I/O\n"); -+ return retval; -+ } -+ -+ map->start = cf->socket.io_offset; -+ map->stop = map->start + CF_RES_SIZE - 1; -+ -+ return 0; -+} -+ -+static int -+at32_cf_set_mem_map(struct pcmcia_socket *sock, struct pccard_mem_map *map) -+{ -+ struct at32_cf_socket *cf; -+ struct resource *res; -+ int retval; -+ -+ cf = container_of(sock, struct at32_cf_socket, socket); -+ -+ debug(cf, 2, "map %u speed %u card_start %08x\n", -+ map->map, map->speed, map->card_start); -+ debug(cf, 2, "flags: %s%s%s%s%s%s%s%s\n", -+ (map->flags==0)?"<NONE>":"", -+ (map->flags&MAP_ACTIVE)?"ACTIVE ":"", -+ (map->flags&MAP_16BIT)?"16BIT ":"", -+ (map->flags&MAP_AUTOSZ)?"AUTOSZ ":"", -+ (map->flags&MAP_0WS)?"0WS ":"", -+ (map->flags&MAP_WRPROT)?"WRPROT ":"", -+ (map->flags&MAP_ATTRIB)?"ATTRIB ":"", -+ (map->flags&MAP_USE_WAIT)?"USE_WAIT ":""); -+ -+ if (map->card_start) -+ return -EINVAL; -+ -+ map->flags &= MAP_ACTIVE | MAP_ATTRIB | MAP_16BIT | MAP_USE_WAIT; -+ -+ if (map->flags & MAP_ATTRIB) { -+ res = &cf->res_attr; -+ -+ /* Linksys WCF12 seems to use WAIT when reading CIS */ -+ map->flags |= MAP_USE_WAIT; -+ } else { -+ res = &cf->res_mem; -+ } -+ -+ if (map->flags & MAP_USE_WAIT) -+ cf->smc.nwait_mode = 3; -+ else -+ cf->smc.nwait_mode = 0; -+ -+ retval = smc_set_configuration(cf->cf_cs, &cf->smc); -+ if (retval) { -+ printk(KERN_ERR "at32_cf: could not set up SMC for mem\n"); -+ return retval; -+ } -+ -+ map->static_start = res->start; -+ -+ return 0; -+} -+ -+static struct pccard_operations at32_cf_ops = { -+ .init = at32_cf_socket_init, -+ .suspend = at32_cf_suspend, -+ .get_status = at32_cf_get_status, -+ .set_socket = at32_cf_set_socket, -+ .set_io_map = at32_cf_set_io_map, -+ .set_mem_map = at32_cf_set_mem_map, -+}; -+ -+static int __init request_pin(struct platform_device *pdev, -+ unsigned int pin, const char *name) -+{ -+ if (gpio_request(pin, name)) { -+ dev_warn(&pdev->dev, "failed to request %s pin\n", name); -+ return -1; -+ } -+ -+ return pin; -+} -+ -+static struct smc_timing at32_cf_timing __initdata = { -+ .ncs_read_setup = 30, -+ .nrd_setup = 100, -+ .ncs_write_setup = 30, -+ .nwe_setup = 100, -+ -+ .ncs_read_pulse = 360, -+ .nrd_pulse = 290, -+ .ncs_write_pulse = 360, -+ .nwe_pulse = 290, -+ -+ .read_cycle = 420, -+ .write_cycle = 420, -+}; -+ -+static int __init at32_cf_probe(struct platform_device *pdev) -+{ -+ struct at32_cf_socket *cf; -+ struct cf_platform_data *board = pdev->dev.platform_data; -+ struct resource *res_skt; -+ int irq; -+ int ret; -+ -+ dev_dbg(&pdev->dev, "probe"); -+ -+ if (!board) -+ return -ENXIO; -+ -+ res_skt = platform_get_resource(pdev, IORESOURCE_MEM, 0); -+ if (!res_skt) -+ return -ENXIO; -+ -+ irq = platform_get_irq(pdev, 0); -+ if (irq < 0) -+ return irq; -+ -+ cf = kzalloc(sizeof(struct at32_cf_socket), GFP_KERNEL); -+ if (!cf) -+ return -ENOMEM; -+ -+ cf->detect_pin = -1; -+ cf->reset_pin = -1; -+ cf->vcc_pin = -1; -+ cf->ready_pin = -1; -+ cf->cf_cs = board->cs; -+ -+ if (board->detect_pin) -+ cf->detect_pin = request_pin(pdev, board->detect_pin, -+ "cf_detect"); -+ if (board->reset_pin) -+ cf->reset_pin = request_pin(pdev, board->reset_pin, -+ "cf_reset"); -+ if (board->vcc_pin) -+ cf->vcc_pin = request_pin(pdev, board->reset_pin, -+ "cf_vcc"); -+ if (board->ready_pin) -+ /* READY is also used for irq through EIM */ -+ cf->ready_pin = board->ready_pin; -+ -+ debug(cf, 2, "pins: detect=%d reset=%d vcc=%d\n", -+ cf->detect_pin, cf->reset_pin, cf->vcc_pin); -+ -+ cf->socket.pci_irq = irq; -+ cf->socket.ops = &at32_cf_ops; -+ cf->socket.resource_ops = &pccard_static_ops; -+ cf->socket.dev.parent = &pdev->dev; -+ cf->socket.owner = THIS_MODULE; -+ cf->socket.features = -+ SS_CAP_MEM_ALIGN | SS_CAP_STATIC_MAP | SS_CAP_PCCARD; -+ cf->socket.map_size = CF_RES_SIZE; -+ -+ cf->res_attr.start = res_skt->start + CF_ATTR_OFFSET; -+ cf->res_attr.end = cf->res_attr.start + CF_RES_SIZE - 1; -+ cf->res_attr.name = "attribute"; -+ cf->res_attr.flags = IORESOURCE_MEM; -+ ret = request_resource(res_skt, &cf->res_attr); -+ if (ret) -+ goto err_request_res_attr; -+ -+ cf->res_mem.start = res_skt->start + CF_MEM_OFFSET; -+ cf->res_mem.end = cf->res_mem.start + CF_RES_SIZE - 1; -+ cf->res_mem.name = "memory"; -+ cf->res_mem.flags = IORESOURCE_MEM; -+ ret = request_resource(res_skt, &cf->res_mem); -+ if (ret) -+ goto err_request_res_mem; -+ -+ cf->res_io.start = res_skt->start + CF_IO_OFFSET; -+ cf->res_io.end = cf->res_io.start + CF_RES_SIZE - 1; -+ cf->res_io.name = "io"; -+ cf->res_io.flags = IORESOURCE_MEM; -+ ret = request_resource(res_skt, &cf->res_io); -+ if (ret) -+ goto err_request_res_io; -+ -+ cf->socket.io_offset = cf->res_io.start; -+ -+ if (cf->detect_pin >= 0) { -+ ret = request_irq(gpio_to_irq(cf->detect_pin), at32_cf_irq, -+ IRQF_SHARED, "cf_detect", cf); -+ if (ret) { -+ debug(cf, 1, -+ "failed to request cf_detect interrupt\n"); -+ goto err_detect_irq; -+ } -+ } -+ -+ /* Setup SMC timings */ -+ smc_set_timing(&cf->smc, &at32_cf_timing); -+ -+ cf->smc.bus_width = 2; -+ cf->smc.nrd_controlled = 1; -+ cf->smc.nwe_controlled = 1; -+ cf->smc.nwait_mode = 0; -+ cf->smc.byte_write = 0; -+ cf->smc.tdf_cycles = 8; -+ cf->smc.tdf_mode = 0; -+ -+ ret = smc_set_configuration(cf->cf_cs, &cf->smc); -+ if (ret) { -+ debug(cf, 1, "failed to configure SMC\n", ret); -+ goto err_smc; -+ } -+ -+ ret = pcmcia_register_socket(&cf->socket); -+ if (ret) { -+ debug(cf, 1, "failed to register socket: %d\n", ret); -+ goto err_register_socket; -+ } -+ -+ if (cf->reset_pin >= 0) -+ gpio_direction_output(cf->reset_pin, 0); -+ -+ platform_set_drvdata(pdev, cf); -+ -+ dev_info(&pdev->dev, "Atmel SMC CF interface at 0x%08lx\n", -+ (unsigned long)res_skt->start); -+ -+ return 0; -+ -+err_register_socket: -+err_smc: -+ if (cf->detect_pin >= 0) -+ free_irq(gpio_to_irq(cf->detect_pin), cf); -+err_detect_irq: -+ release_resource(&cf->res_io); -+err_request_res_io: -+ release_resource(&cf->res_mem); -+err_request_res_mem: -+ release_resource(&cf->res_attr); -+err_request_res_attr: -+ if (cf->vcc_pin >= 0) -+ gpio_free(cf->vcc_pin); -+ if (cf->reset_pin >= 0) -+ gpio_free(cf->reset_pin); -+ if (cf->detect_pin >= 0) -+ gpio_free(cf->detect_pin); -+ kfree(cf); -+ -+ return ret; -+} -+ -+static int __exit at32_cf_remove(struct platform_device *pdev) -+{ -+ struct at32_cf_socket *cf = platform_get_drvdata(pdev); -+ -+ pcmcia_unregister_socket(&cf->socket); -+ if (cf->detect_pin >= 0) { -+ free_irq(gpio_to_irq(cf->detect_pin), cf); -+ gpio_free(cf->detect_pin); -+ } -+ if (cf->vcc_pin >= 0) -+ gpio_free(cf->vcc_pin); -+ if (cf->reset_pin >= 0) -+ gpio_free(cf->reset_pin); -+ -+ release_resource(&cf->res_io); -+ release_resource(&cf->res_mem); -+ release_resource(&cf->res_attr); -+ kfree(cf); -+ platform_set_drvdata(pdev, NULL); -+ -+ return 0; -+} -+ -+static struct platform_driver at32_cf_driver = { -+ .remove = __exit_p(at32_cf_remove), -+ .driver = { -+ .name = "at32_cf", -+ .owner = THIS_MODULE, -+ }, -+}; -+ -+static int __init at32_cf_init(void) -+{ -+ int ret; -+ -+ ret = platform_driver_probe(&at32_cf_driver, at32_cf_probe); -+ if (ret) -+ printk(KERN_ERR "at32_cf: probe failed: %d\n", ret); -+ return ret; -+} -+ -+static void __exit at32_cf_exit(void) -+{ -+ platform_driver_unregister(&at32_cf_driver); -+} -+ -+module_init(at32_cf_init); -+module_exit(at32_cf_exit); -+ -+MODULE_LICENSE("GPL"); -+MODULE_DESCRIPTION("Driver for SMC PCMCIA interface"); -+MODULE_AUTHOR("Hans-Christian Egtvedt <hcegtvedt@atmel.com>"); -diff --git a/drivers/pcmcia/cistpl.c b/drivers/pcmcia/cistpl.c -index d154dee..06a85d7 100644 ---- a/drivers/pcmcia/cistpl.c -+++ b/drivers/pcmcia/cistpl.c -@@ -25,6 +25,7 @@ - #include <linux/ioport.h> - #include <asm/io.h> - #include <asm/byteorder.h> -+#include <asm/unaligned.h> - - #include <pcmcia/cs_types.h> - #include <pcmcia/ss.h> -@@ -401,6 +402,15 @@ EXPORT_SYMBOL(pcmcia_replace_cis); - - ======================================================================*/ - -+static inline u16 cis_get_u16(void *ptr) -+{ -+ return le16_to_cpu(get_unaligned((__le16 *) ptr)); -+} -+static inline u32 cis_get_u32(void *ptr) -+{ -+ return le32_to_cpu(get_unaligned((__le32 *) ptr)); -+} -+ - typedef struct tuple_flags { - u_int link_space:4; - u_int has_link:1; -@@ -461,7 +471,7 @@ static int follow_link(struct pcmcia_socket *s, tuple_t *tuple) - /* Get indirect link from the MFC tuple */ - read_cis_cache(s, LINK_SPACE(tuple->Flags), - tuple->LinkOffset, 5, link); -- ofs = le32_to_cpu(*(__le32 *)(link+1)); -+ ofs = cis_get_u32(link + 1); - SPACE(tuple->Flags) = (link[0] == CISTPL_MFC_ATTR); - /* Move to the next indirect link */ - tuple->LinkOffset += 5; -@@ -668,10 +678,10 @@ static int parse_checksum(tuple_t *tuple, cistpl_checksum_t *csum) - u_char *p; - if (tuple->TupleDataLen < 5) - return CS_BAD_TUPLE; -- p = (u_char *)tuple->TupleData; -- csum->addr = tuple->CISOffset+(short)le16_to_cpu(*(__le16 *)p)-2; -- csum->len = le16_to_cpu(*(__le16 *)(p + 2)); -- csum->sum = *(p+4); -+ p = (u_char *) tuple->TupleData; -+ csum->addr = tuple->CISOffset + cis_get_u16(p) - 2; -+ csum->len = cis_get_u16(p + 2); -+ csum->sum = *(p + 4); - return CS_SUCCESS; - } - -@@ -681,7 +691,7 @@ static int parse_longlink(tuple_t *tuple, cistpl_longlink_t *link) - { - if (tuple->TupleDataLen < 4) - return CS_BAD_TUPLE; -- link->addr = le32_to_cpu(*(__le32 *)tuple->TupleData); -+ link->addr = cis_get_u32(tuple->TupleData); - return CS_SUCCESS; - } - -@@ -700,7 +710,8 @@ static int parse_longlink_mfc(tuple_t *tuple, - return CS_BAD_TUPLE; - for (i = 0; i < link->nfn; i++) { - link->fn[i].space = *p; p++; -- link->fn[i].addr = le32_to_cpu(*(__le32 *)p); p += 4; -+ link->fn[i].addr = cis_get_u32(p); -+ p += 4; - } - return CS_SUCCESS; - } -@@ -787,12 +798,10 @@ static int parse_jedec(tuple_t *tuple, cistpl_jedec_t *jedec) - - static int parse_manfid(tuple_t *tuple, cistpl_manfid_t *m) - { -- __le16 *p; - if (tuple->TupleDataLen < 4) - return CS_BAD_TUPLE; -- p = (__le16 *)tuple->TupleData; -- m->manf = le16_to_cpu(p[0]); -- m->card = le16_to_cpu(p[1]); -+ m->manf = cis_get_u16(tuple->TupleData); -+ m->card = cis_get_u16(tuple->TupleData + 2); - return CS_SUCCESS; - } - -@@ -1091,7 +1100,7 @@ static int parse_cftable_entry(tuple_t *tuple, - break; - case 0x20: - entry->mem.nwin = 1; -- entry->mem.win[0].len = le16_to_cpu(*(__le16 *)p) << 8; -+ entry->mem.win[0].len = cis_get_u16(p) << 8; - entry->mem.win[0].card_addr = 0; - entry->mem.win[0].host_addr = 0; - p += 2; -@@ -1099,9 +1108,8 @@ static int parse_cftable_entry(tuple_t *tuple, - break; - case 0x40: - entry->mem.nwin = 1; -- entry->mem.win[0].len = le16_to_cpu(*(__le16 *)p) << 8; -- entry->mem.win[0].card_addr = -- le16_to_cpu(*(__le16 *)(p+2)) << 8; -+ entry->mem.win[0].len = cis_get_u16(p) << 8; -+ entry->mem.win[0].card_addr = cis_get_u16(p + 2) << 8; - entry->mem.win[0].host_addr = 0; - p += 4; - if (p > q) return CS_BAD_TUPLE; -@@ -1138,7 +1146,7 @@ static int parse_bar(tuple_t *tuple, cistpl_bar_t *bar) - p = (u_char *)tuple->TupleData; - bar->attr = *p; - p += 2; -- bar->size = le32_to_cpu(*(__le32 *)p); -+ bar->size = cis_get_u32(p); - return CS_SUCCESS; - } - -@@ -1151,7 +1159,7 @@ static int parse_config_cb(tuple_t *tuple, cistpl_config_t *config) - return CS_BAD_TUPLE; - config->last_idx = *(++p); - p++; -- config->base = le32_to_cpu(*(__le32 *)p); -+ config->base = cis_get_u32(p); - config->subtuples = tuple->TupleDataLen - 6; - return CS_SUCCESS; - } -@@ -1267,7 +1275,7 @@ static int parse_vers_2(tuple_t *tuple, cistpl_vers_2_t *v2) - - v2->vers = p[0]; - v2->comply = p[1]; -- v2->dindex = le16_to_cpu(*(__le16 *)(p+2)); -+ v2->dindex = cis_get_u16(p +2 ); - v2->vspec8 = p[6]; - v2->vspec9 = p[7]; - v2->nhdr = p[8]; -@@ -1308,8 +1316,8 @@ static int parse_format(tuple_t *tuple, cistpl_format_t *fmt) - - fmt->type = p[0]; - fmt->edc = p[1]; -- fmt->offset = le32_to_cpu(*(__le32 *)(p+2)); -- fmt->length = le32_to_cpu(*(__le32 *)(p+6)); -+ fmt->offset = cis_get_u32(p + 2); -+ fmt->length = cis_get_u32(p + 6); - - return CS_SUCCESS; - } -diff --git a/drivers/spi/atmel_spi.c b/drivers/spi/atmel_spi.c -index b046974..bc90604 100644 ---- a/drivers/spi/atmel_spi.c -+++ b/drivers/spi/atmel_spi.c -@@ -491,8 +491,8 @@ static int atmel_spi_setup(struct spi_device *spi) - csr |= SPI_BIT(NCPHA); - - /* TODO: DLYBS and DLYBCT */ -- csr |= SPI_BF(DLYBS, 10); -- csr |= SPI_BF(DLYBCT, 10); -+ csr |= SPI_BF(DLYBS, 0); -+ csr |= SPI_BF(DLYBCT, 0); - - /* chipselect must have been muxed as GPIO (e.g. in board setup) */ - npcs_pin = (unsigned int)spi->controller_data; -diff --git a/drivers/usb/gadget/Kconfig b/drivers/usb/gadget/Kconfig -index 767aed5..f81d08d 100644 ---- a/drivers/usb/gadget/Kconfig -+++ b/drivers/usb/gadget/Kconfig -@@ -67,6 +67,17 @@ config USB_GADGET_DEBUG_FILES - driver on a new board. Enable these files by choosing "Y" - here. If in doubt, or to conserve kernel memory, say "N". - -+config USB_GADGET_DEBUG_FS -+ boolean "Debugging information files in debugfs" -+ depends on USB_GADGET && DEBUG_FS -+ help -+ Some of the drivers in the "gadget" framework can expose -+ debugging information in files under /sys/kernel/debug/. -+ The information in these files may help when you're -+ troubleshooting or bringing up a driver on a new board. -+ Enable these files by choosing "Y" here. If in doubt, or -+ to conserve kernel memory, say "N". -+ - config USB_GADGET_SELECTED - boolean - -@@ -103,6 +114,20 @@ config USB_AMD5536UDC - default USB_GADGET - select USB_GADGET_SELECTED - -+config USB_GADGET_ATMEL_USBA -+ boolean "Atmel USBA" -+ select USB_GADGET_DUALSPEED -+ depends on AVR32 -+ help -+ USBA is the integrated high-speed USB Device controller on -+ the AT32AP700x processors from Atmel. -+ -+config USB_ATMEL_USBA -+ tristate -+ depends on USB_GADGET_ATMEL_USBA -+ default USB_GADGET -+ select USB_GADGET_SELECTED -+ - config USB_GADGET_FSL_USB2 - boolean "Freescale Highspeed USB DR Peripheral Controller" - depends on MPC834x || PPC_MPC831x -@@ -228,7 +253,6 @@ config USB_LH7A40X - default USB_GADGET - select USB_GADGET_SELECTED - -- - config USB_GADGET_OMAP - boolean "OMAP USB Device Controller" - depends on ARCH_OMAP -diff --git a/drivers/usb/gadget/Makefile b/drivers/usb/gadget/Makefile -index 1bc0f03..904e57b 100644 ---- a/drivers/usb/gadget/Makefile -+++ b/drivers/usb/gadget/Makefile -@@ -14,6 +14,7 @@ obj-$(CONFIG_USB_OMAP) += omap_udc.o - obj-$(CONFIG_USB_LH7A40X) += lh7a40x_udc.o - obj-$(CONFIG_USB_S3C2410) += s3c2410_udc.o - obj-$(CONFIG_USB_AT91) += at91_udc.o -+obj-$(CONFIG_USB_ATMEL_USBA) += atmel_usba_udc.o - obj-$(CONFIG_USB_FSL_USB2) += fsl_usb2_udc.o - obj-$(CONFIG_USB_M66592) += m66592-udc.o - -diff --git a/drivers/usb/gadget/atmel_usba_udc.c b/drivers/usb/gadget/atmel_usba_udc.c -new file mode 100644 -index 0000000..e35362d ---- /dev/null -+++ b/drivers/usb/gadget/atmel_usba_udc.c -@@ -0,0 +1,2038 @@ -+/* -+ * Driver for the Atmel USBA high speed USB device controller -+ * -+ * Copyright (C) 2005-2007 Atmel Corporation -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 as -+ * published by the Free Software Foundation. -+ */ -+#include <linux/clk.h> -+#include <linux/module.h> -+#include <linux/init.h> -+#include <linux/interrupt.h> -+#include <linux/io.h> -+#include <linux/device.h> -+#include <linux/dma-mapping.h> -+#include <linux/list.h> -+#include <linux/platform_device.h> -+#include <linux/usb/ch9.h> -+#include <linux/usb_gadget.h> -+#include <linux/delay.h> -+ -+#include <asm/gpio.h> -+#include <asm/arch/board.h> -+ -+#include "atmel_usba_udc.h" -+ -+ -+static struct usba_udc the_udc; -+ -+#ifdef CONFIG_USB_GADGET_DEBUG_FS -+#include <linux/debugfs.h> -+#include <linux/uaccess.h> -+ -+static int queue_dbg_open(struct inode *inode, struct file *file) -+{ -+ struct usba_ep *ep = inode->i_private; -+ struct usba_request *req, *req_copy; -+ struct list_head *queue_data; -+ -+ queue_data = kmalloc(sizeof(*queue_data), GFP_KERNEL); -+ if (!queue_data) -+ return -ENOMEM; -+ INIT_LIST_HEAD(queue_data); -+ -+ spin_lock_irq(&ep->udc->lock); -+ list_for_each_entry(req, &ep->queue, queue) { -+ req_copy = kmalloc(sizeof(*req_copy), GFP_ATOMIC); -+ if (!req_copy) -+ goto fail; -+ memcpy(req_copy, req, sizeof(*req_copy)); -+ list_add_tail(&req_copy->queue, queue_data); -+ } -+ spin_unlock_irq(&ep->udc->lock); -+ -+ file->private_data = queue_data; -+ return 0; -+ -+fail: -+ spin_unlock_irq(&ep->udc->lock); -+ list_for_each_entry_safe(req, req_copy, queue_data, queue) { -+ list_del(&req->queue); -+ kfree(req); -+ } -+ kfree(queue_data); -+ return -ENOMEM; -+} -+ -+/* -+ * bbbbbbbb llllllll IZS sssss nnnn FDL\n\0 -+ * -+ * b: buffer address -+ * l: buffer length -+ * I/i: interrupt/no interrupt -+ * Z/z: zero/no zero -+ * S/s: short ok/short not ok -+ * s: status -+ * n: nr_packets -+ * F/f: submitted/not submitted to FIFO -+ * D/d: using/not using DMA -+ * L/l: last transaction/not last transaction -+ */ -+static ssize_t queue_dbg_read(struct file *file, char __user *buf, -+ size_t nbytes, loff_t *ppos) -+{ -+ struct list_head *queue = file->private_data; -+ struct usba_request *req, *tmp_req; -+ size_t len, remaining, actual = 0; -+ char tmpbuf[38]; -+ -+ if (!access_ok(VERIFY_WRITE, buf, nbytes)) -+ return -EFAULT; -+ -+ mutex_lock(&file->f_dentry->d_inode->i_mutex); -+ list_for_each_entry_safe(req, tmp_req, queue, queue) { -+ len = snprintf(tmpbuf, sizeof(tmpbuf), -+ "%8p %08x %c%c%c %5d %c%c%c\n", -+ req->req.buf, req->req.length, -+ req->req.no_interrupt ? 'i' : 'I', -+ req->req.zero ? 'Z' : 'z', -+ req->req.short_not_ok ? 's' : 'S', -+ req->req.status, -+ req->submitted ? 'F' : 'f', -+ req->using_dma ? 'D' : 'd', -+ req->last_transaction ? 'L' : 'l'); -+ len = min(len, sizeof(tmpbuf)); -+ if (len > nbytes) -+ break; -+ -+ list_del(&req->queue); -+ kfree(req); -+ -+ remaining = __copy_to_user(buf, tmpbuf, len); -+ actual += len - remaining; -+ if (remaining) -+ break; -+ -+ nbytes -= len; -+ buf += len; -+ } -+ mutex_unlock(&file->f_dentry->d_inode->i_mutex); -+ -+ return actual; -+} -+ -+static int queue_dbg_release(struct inode *inode, struct file *file) -+{ -+ struct list_head *queue_data = file->private_data; -+ struct usba_request *req, *tmp_req; -+ -+ list_for_each_entry_safe(req, tmp_req, queue_data, queue) { -+ list_del(&req->queue); -+ kfree(req); -+ } -+ kfree(queue_data); -+ return 0; -+} -+ -+static int regs_dbg_open(struct inode *inode, struct file *file) -+{ -+ struct usba_udc *udc; -+ unsigned int i; -+ u32 *data; -+ int ret = -ENOMEM; -+ -+ mutex_lock(&inode->i_mutex); -+ udc = inode->i_private; -+ data = kmalloc(inode->i_size, GFP_KERNEL); -+ if (!data) -+ goto out; -+ -+ spin_lock_irq(&udc->lock); -+ for (i = 0; i < inode->i_size / 4; i++) -+ data[i] = __raw_readl(udc->regs + i * 4); -+ spin_unlock_irq(&udc->lock); -+ -+ file->private_data = data; -+ ret = 0; -+ -+out: -+ mutex_unlock(&inode->i_mutex); -+ -+ return ret; -+} -+ -+static ssize_t regs_dbg_read(struct file *file, char __user *buf, -+ size_t nbytes, loff_t *ppos) -+{ -+ struct inode *inode = file->f_dentry->d_inode; -+ int ret; -+ -+ mutex_lock(&inode->i_mutex); -+ ret = simple_read_from_buffer(buf, nbytes, ppos, -+ file->private_data, -+ file->f_dentry->d_inode->i_size); -+ mutex_unlock(&inode->i_mutex); -+ -+ return ret; -+} -+ -+static int regs_dbg_release(struct inode *inode, struct file *file) -+{ -+ kfree(file->private_data); -+ return 0; -+} -+ -+const struct file_operations queue_dbg_fops = { -+ .owner = THIS_MODULE, -+ .open = queue_dbg_open, -+ .llseek = no_llseek, -+ .read = queue_dbg_read, -+ .release = queue_dbg_release, -+}; -+ -+const struct file_operations regs_dbg_fops = { -+ .owner = THIS_MODULE, -+ .open = regs_dbg_open, -+ .llseek = generic_file_llseek, -+ .read = regs_dbg_read, -+ .release = regs_dbg_release, -+}; -+ -+static void usba_ep_init_debugfs(struct usba_udc *udc, -+ struct usba_ep *ep) -+{ -+ struct dentry *ep_root; -+ -+ ep_root = debugfs_create_dir(ep->ep.name, udc->debugfs_root); -+ if (!ep_root) -+ goto err_root; -+ ep->debugfs_dir = ep_root; -+ -+ ep->debugfs_queue = debugfs_create_file("queue", 0400, ep_root, -+ ep, &queue_dbg_fops); -+ if (!ep->debugfs_queue) -+ goto err_queue; -+ -+ if (ep->can_dma) { -+ ep->debugfs_dma_status -+ = debugfs_create_u32("dma_status", 0400, ep_root, -+ &ep->last_dma_status); -+ if (!ep->debugfs_dma_status) -+ goto err_dma_status; -+ } -+ if (ep_is_control(ep)) { -+ ep->debugfs_state -+ = debugfs_create_u32("state", 0400, ep_root, -+ &ep->state); -+ if (!ep->debugfs_state) -+ goto err_state; -+ } -+ -+ return; -+ -+err_state: -+ if (ep->can_dma) -+ debugfs_remove(ep->debugfs_dma_status); -+err_dma_status: -+ debugfs_remove(ep->debugfs_queue); -+err_queue: -+ debugfs_remove(ep_root); -+err_root: -+ dev_err(&ep->udc->pdev->dev, -+ "failed to create debugfs directory for %s\n", ep->ep.name); -+} -+ -+static void usba_ep_cleanup_debugfs(struct usba_ep *ep) -+{ -+ debugfs_remove(ep->debugfs_queue); -+ debugfs_remove(ep->debugfs_dma_status); -+ debugfs_remove(ep->debugfs_state); -+ debugfs_remove(ep->debugfs_dir); -+ ep->debugfs_dma_status = NULL; -+ ep->debugfs_dir = NULL; -+} -+ -+static void usba_init_debugfs(struct usba_udc *udc) -+{ -+ struct dentry *root, *regs; -+ struct resource *regs_resource; -+ -+ root = debugfs_create_dir(udc->gadget.name, NULL); -+ if (IS_ERR(root) || !root) -+ goto err_root; -+ udc->debugfs_root = root; -+ -+ regs = debugfs_create_file("regs", 0400, root, udc, ®s_dbg_fops); -+ if (!regs) -+ goto err_regs; -+ -+ regs_resource = platform_get_resource(udc->pdev, IORESOURCE_MEM, -+ CTRL_IOMEM_ID); -+ regs->d_inode->i_size = regs_resource->end - regs_resource->start + 1; -+ udc->debugfs_regs = regs; -+ -+ usba_ep_init_debugfs(udc, to_usba_ep(udc->gadget.ep0)); -+ -+ return; -+ -+err_regs: -+ debugfs_remove(root); -+err_root: -+ udc->debugfs_root = NULL; -+ dev_err(&udc->pdev->dev, "debugfs is not available\n"); -+} -+ -+static void usba_cleanup_debugfs(struct usba_udc *udc) -+{ -+ usba_ep_cleanup_debugfs(to_usba_ep(udc->gadget.ep0)); -+ debugfs_remove(udc->debugfs_regs); -+ debugfs_remove(udc->debugfs_root); -+ udc->debugfs_regs = NULL; -+ udc->debugfs_root = NULL; -+} -+#else -+static inline void usba_ep_init_debugfs(struct usba_udc *udc, -+ struct usba_ep *ep) -+{ -+ -+} -+ -+static inline void usba_ep_cleanup_debugfs(struct usba_ep *ep) -+{ -+ -+} -+ -+static inline void usba_init_debugfs(struct usba_udc *udc) -+{ -+ -+} -+ -+static inline void usba_cleanup_debugfs(struct usba_udc *udc) -+{ -+ -+} -+#endif -+ -+static int vbus_is_present(struct usba_udc *udc) -+{ -+ if (udc->vbus_pin != -1) -+ return gpio_get_value(udc->vbus_pin); -+ -+ /* No Vbus detection: Assume always present */ -+ return 1; -+} -+ -+static void copy_to_fifo(void __iomem *fifo, const void *buf, int len) -+{ -+ unsigned long tmp; -+ -+ DBG(DBG_FIFO, "copy to FIFO (len %d):\n", len); -+ for (; len > 0; len -= 4, buf += 4, fifo += 4) { -+ tmp = *(unsigned long *)buf; -+ if (len >= 4) { -+ DBG(DBG_FIFO, " -> %08lx\n", tmp); -+ __raw_writel(tmp, fifo); -+ } else { -+ do { -+ DBG(DBG_FIFO, " -> %02lx\n", tmp >> 24); -+ __raw_writeb(tmp >> 24, fifo); -+ fifo++; -+ tmp <<= 8; -+ } while (--len); -+ break; -+ } -+ } -+} -+ -+static void copy_from_fifo(void *buf, void __iomem *fifo, int len) -+{ -+ union { -+ unsigned long *w; -+ unsigned char *b; -+ } p; -+ unsigned long tmp; -+ -+ DBG(DBG_FIFO, "copy from FIFO (len %d):\n", len); -+ for (p.w = buf; len > 0; len -= 4, p.w++, fifo += 4) { -+ if (len >= 4) { -+ tmp = __raw_readl(fifo); -+ *p.w = tmp; -+ DBG(DBG_FIFO, " -> %08lx\n", tmp); -+ } else { -+ do { -+ tmp = __raw_readb(fifo); -+ *p.b = tmp; -+ DBG(DBG_FIFO, " -> %02lx\n", tmp); -+ fifo++, p.b++; -+ } while (--len); -+ } -+ } -+} -+ -+static void next_fifo_transaction(struct usba_ep *ep, struct usba_request *req) -+{ -+ unsigned int transaction_len; -+ -+ transaction_len = req->req.length - req->req.actual; -+ req->last_transaction = 1; -+ if (transaction_len > ep->ep.maxpacket) { -+ transaction_len = ep->ep.maxpacket; -+ req->last_transaction = 0; -+ } else if (transaction_len == ep->ep.maxpacket && req->req.zero) -+ req->last_transaction = 0; -+ -+ DBG(DBG_QUEUE, "%s: submit_transaction, req %p (length %d)%s\n", -+ ep->ep.name, req, transaction_len, -+ req->last_transaction ? ", done" : ""); -+ -+ copy_to_fifo(ep->fifo, req->req.buf + req->req.actual, transaction_len); -+ usba_ep_writel(ep, SET_STA, USBA_TX_PK_RDY); -+ req->req.actual += transaction_len; -+} -+ -+static void submit_request(struct usba_ep *ep, struct usba_request *req) -+{ -+ DBG(DBG_QUEUE, "%s: submit_request: req %p (length %d)\n", -+ ep->ep.name, req, req->req.length); -+ -+ req->req.actual = 0; -+ req->submitted = 1; -+ -+ if (req->using_dma) { -+ if (req->req.length == 0) { -+ usba_ep_writel(ep, CTL_ENB, USBA_TX_PK_RDY); -+ return; -+ } -+ -+ if (req->req.zero) -+ usba_ep_writel(ep, CTL_ENB, USBA_SHORT_PACKET); -+ else -+ usba_ep_writel(ep, CTL_DIS, USBA_SHORT_PACKET); -+ -+ usba_dma_writel(ep, ADDRESS, req->req.dma); -+ usba_dma_writel(ep, CONTROL, req->ctrl); -+ } else { -+ next_fifo_transaction(ep, req); -+ if (req->last_transaction) { -+ usba_ep_writel(ep, CTL_DIS, USBA_TX_PK_RDY); -+ usba_ep_writel(ep, CTL_ENB, USBA_TX_COMPLETE); -+ } else { -+ usba_ep_writel(ep, CTL_DIS, USBA_TX_COMPLETE); -+ usba_ep_writel(ep, CTL_ENB, USBA_TX_PK_RDY); -+ } -+ } -+} -+ -+static void submit_next_request(struct usba_ep *ep) -+{ -+ struct usba_request *req; -+ -+ if (list_empty(&ep->queue)) { -+ usba_ep_writel(ep, CTL_DIS, USBA_TX_PK_RDY | USBA_RX_BK_RDY); -+ return; -+ } -+ -+ req = list_entry(ep->queue.next, struct usba_request, queue); -+ if (!req->submitted) -+ submit_request(ep, req); -+} -+ -+static void send_status(struct usba_udc *udc, struct usba_ep *ep) -+{ -+ ep->state = STATUS_STAGE_IN; -+ usba_ep_writel(ep, SET_STA, USBA_TX_PK_RDY); -+ usba_ep_writel(ep, CTL_ENB, USBA_TX_COMPLETE); -+} -+ -+static void receive_data(struct usba_ep *ep) -+{ -+ struct usba_udc *udc = ep->udc; -+ struct usba_request *req; -+ unsigned long status; -+ unsigned int bytecount, nr_busy; -+ int is_complete = 0; -+ -+ status = usba_ep_readl(ep, STA); -+ nr_busy = USBA_BFEXT(BUSY_BANKS, status); -+ -+ DBG(DBG_QUEUE, "receive data: nr_busy=%u\n", nr_busy); -+ -+ while (nr_busy > 0) { -+ if (list_empty(&ep->queue)) { -+ usba_ep_writel(ep, CTL_DIS, USBA_RX_BK_RDY); -+ break; -+ } -+ req = list_entry(ep->queue.next, -+ struct usba_request, queue); -+ -+ bytecount = USBA_BFEXT(BYTE_COUNT, status); -+ -+ if (status & (1 << 31)) -+ is_complete = 1; -+ if (req->req.actual + bytecount >= req->req.length) { -+ is_complete = 1; -+ bytecount = req->req.length - req->req.actual; -+ } -+ -+ copy_from_fifo(req->req.buf + req->req.actual, -+ ep->fifo, bytecount); -+ req->req.actual += bytecount; -+ -+ usba_ep_writel(ep, CLR_STA, USBA_RX_BK_RDY); -+ -+ if (is_complete) { -+ DBG(DBG_QUEUE, "%s: request done\n", ep->ep.name); -+ req->req.status = 0; -+ list_del_init(&req->queue); -+ usba_ep_writel(ep, CTL_DIS, USBA_RX_BK_RDY); -+ spin_unlock(&udc->lock); -+ req->req.complete(&ep->ep, &req->req); -+ spin_lock(&udc->lock); -+ } -+ -+ status = usba_ep_readl(ep, STA); -+ nr_busy = USBA_BFEXT(BUSY_BANKS, status); -+ -+ if (is_complete && ep_is_control(ep)) { -+ send_status(udc, ep); -+ break; -+ } -+ } -+} -+ -+static void -+request_complete(struct usba_ep *ep, struct usba_request *req, int status) -+{ -+ struct usba_udc *udc = ep->udc; -+ -+ WARN_ON(!list_empty(&req->queue)); -+ -+ if (req->req.status == -EINPROGRESS) -+ req->req.status = status; -+ -+ if (req->mapped) { -+ dma_unmap_single( -+ &udc->pdev->dev, req->req.dma, req->req.length, -+ ep->is_in ? DMA_TO_DEVICE : DMA_FROM_DEVICE); -+ req->req.dma = DMA_ADDR_INVALID; -+ req->mapped = 0; -+ } -+ -+ DBG(DBG_GADGET | DBG_REQ, -+ "%s: req %p complete: status %d, actual %u\n", -+ ep->ep.name, req, req->req.status, req->req.actual); -+ -+ spin_unlock(&udc->lock); -+ req->req.complete(&ep->ep, &req->req); -+ spin_lock(&udc->lock); -+} -+ -+static void -+request_complete_list(struct usba_ep *ep, struct list_head *list, int status) -+{ -+ struct usba_request *req, *tmp_req; -+ -+ list_for_each_entry_safe(req, tmp_req, list, queue) { -+ list_del_init(&req->queue); -+ request_complete(ep, req, status); -+ } -+} -+ -+static int -+usba_ep_enable(struct usb_ep *_ep, const struct usb_endpoint_descriptor *desc) -+{ -+ struct usba_ep *ep = to_usba_ep(_ep); -+ struct usba_udc *udc = ep->udc; -+ unsigned long flags, ept_cfg, maxpacket; -+ unsigned int nr_trans; -+ -+ DBG(DBG_GADGET, "%s: ep_enable: desc=%p\n", ep->ep.name, desc); -+ -+ maxpacket = le16_to_cpu(desc->wMaxPacketSize) & 0x7ff; -+ -+ if (((desc->bEndpointAddress & USB_ENDPOINT_NUMBER_MASK) != ep->index) -+ || ep->index == 0 -+ || desc->bDescriptorType != USB_DT_ENDPOINT -+ || maxpacket == 0 -+ || maxpacket > ep->fifo_size) { -+ DBG(DBG_ERR, "ep_enable: Invalid argument"); -+ return -EINVAL; -+ } -+ -+ ep->is_isoc = 0; -+ ep->is_in = 0; -+ -+ if (maxpacket <= 8) -+ ept_cfg = USBA_BF(EPT_SIZE, USBA_EPT_SIZE_8); -+ else -+ /* LSB is bit 1, not 0 */ -+ ept_cfg = USBA_BF(EPT_SIZE, fls(maxpacket - 1) - 3); -+ -+ DBG(DBG_HW, "%s: EPT_SIZE = %lu (maxpacket = %lu)\n", -+ ep->ep.name, ept_cfg, maxpacket); -+ -+ if ((desc->bEndpointAddress & USB_ENDPOINT_DIR_MASK) == USB_DIR_IN) { -+ ep->is_in = 1; -+ ept_cfg |= USBA_EPT_DIR_IN; -+ } -+ -+ switch (desc->bmAttributes & USB_ENDPOINT_XFERTYPE_MASK) { -+ case USB_ENDPOINT_XFER_CONTROL: -+ ept_cfg |= USBA_BF(EPT_TYPE, USBA_EPT_TYPE_CONTROL); -+ ept_cfg |= USBA_BF(BK_NUMBER, USBA_BK_NUMBER_ONE); -+ break; -+ case USB_ENDPOINT_XFER_ISOC: -+ if (!ep->can_isoc) { -+ DBG(DBG_ERR, "ep_enable: %s is not isoc capable\n", -+ ep->ep.name); -+ return -EINVAL; -+ } -+ -+ /* -+ * Bits 11:12 specify number of _additional_ -+ * transactions per microframe. -+ */ -+ nr_trans = ((le16_to_cpu(desc->wMaxPacketSize) >> 11) & 3) + 1; -+ if (nr_trans > 3) -+ return -EINVAL; -+ -+ ep->is_isoc = 1; -+ ept_cfg |= USBA_BF(EPT_TYPE, USBA_EPT_TYPE_ISO); -+ -+ /* -+ * Do triple-buffering on high-bandwidth iso endpoints. -+ */ -+ if (nr_trans > 1 && ep->nr_banks == 3) -+ ept_cfg |= USBA_BF(BK_NUMBER, USBA_BK_NUMBER_TRIPLE); -+ else -+ ept_cfg |= USBA_BF(BK_NUMBER, USBA_BK_NUMBER_DOUBLE); -+ ept_cfg |= USBA_BF(NB_TRANS, nr_trans); -+ break; -+ case USB_ENDPOINT_XFER_BULK: -+ ept_cfg |= USBA_BF(EPT_TYPE, USBA_EPT_TYPE_BULK); -+ ept_cfg |= USBA_BF(BK_NUMBER, USBA_BK_NUMBER_DOUBLE); -+ break; -+ case USB_ENDPOINT_XFER_INT: -+ ept_cfg |= USBA_BF(EPT_TYPE, USBA_EPT_TYPE_INT); -+ ept_cfg |= USBA_BF(BK_NUMBER, USBA_BK_NUMBER_DOUBLE); -+ break; -+ } -+ -+ spin_lock_irqsave(&ep->udc->lock, flags); -+ -+ if (ep->desc) { -+ spin_unlock_irqrestore(&ep->udc->lock, flags); -+ DBG(DBG_ERR, "ep%d already enabled\n", ep->index); -+ return -EBUSY; -+ } -+ -+ ep->desc = desc; -+ ep->ep.maxpacket = maxpacket; -+ -+ usba_ep_writel(ep, CFG, ept_cfg); -+ usba_ep_writel(ep, CTL_ENB, USBA_EPT_ENABLE); -+ -+ if (ep->can_dma) { -+ u32 ctrl; -+ -+ usba_writel(udc, INT_ENB, -+ (usba_readl(udc, INT_ENB) -+ | USBA_BF(EPT_INT, 1 << ep->index) -+ | USBA_BF(DMA_INT, 1 << ep->index))); -+ ctrl = USBA_AUTO_VALID | USBA_INTDIS_DMA; -+ usba_ep_writel(ep, CTL_ENB, ctrl); -+ } else { -+ usba_writel(udc, INT_ENB, -+ (usba_readl(udc, INT_ENB) -+ | USBA_BF(EPT_INT, 1 << ep->index))); -+ } -+ -+ spin_unlock_irqrestore(&udc->lock, flags); -+ -+ DBG(DBG_HW, "EPT_CFG%d after init: %#08lx\n", ep->index, -+ (unsigned long)usba_ep_readl(ep, CFG)); -+ DBG(DBG_HW, "INT_ENB after init: %#08lx\n", -+ (unsigned long)usba_readl(udc, INT_ENB)); -+ -+ return 0; -+} -+ -+static int usba_ep_disable(struct usb_ep *_ep) -+{ -+ struct usba_ep *ep = to_usba_ep(_ep); -+ struct usba_udc *udc = ep->udc; -+ LIST_HEAD(req_list); -+ unsigned long flags; -+ -+ DBG(DBG_GADGET, "ep_disable: %s\n", ep->ep.name); -+ -+ spin_lock_irqsave(&udc->lock, flags); -+ -+ if (!ep->desc) { -+ spin_unlock_irqrestore(&udc->lock, flags); -+ DBG(DBG_ERR, "ep_disable: %s not enabled\n", ep->ep.name); -+ return -EINVAL; -+ } -+ ep->desc = NULL; -+ -+ list_splice_init(&ep->queue, &req_list); -+ if (ep->can_dma) { -+ usba_dma_writel(ep, CONTROL, 0); -+ usba_dma_writel(ep, ADDRESS, 0); -+ usba_dma_readl(ep, STATUS); -+ } -+ usba_ep_writel(ep, CTL_DIS, USBA_EPT_ENABLE); -+ usba_writel(udc, INT_ENB, -+ usba_readl(udc, INT_ENB) -+ & ~USBA_BF(EPT_INT, 1 << ep->index)); -+ -+ request_complete_list(ep, &req_list, -ESHUTDOWN); -+ -+ spin_unlock_irqrestore(&udc->lock, flags); -+ -+ return 0; -+} -+ -+static struct usb_request * -+usba_ep_alloc_request(struct usb_ep *_ep, gfp_t gfp_flags) -+{ -+ struct usba_request *req; -+ -+ DBG(DBG_GADGET, "ep_alloc_request: %p, 0x%x\n", _ep, gfp_flags); -+ -+ req = kzalloc(sizeof(*req), gfp_flags); -+ if (!req) -+ return NULL; -+ -+ INIT_LIST_HEAD(&req->queue); -+ req->req.dma = DMA_ADDR_INVALID; -+ -+ return &req->req; -+} -+ -+static void -+usba_ep_free_request(struct usb_ep *_ep, struct usb_request *_req) -+{ -+ struct usba_request *req = to_usba_req(_req); -+ -+ DBG(DBG_GADGET, "ep_free_request: %p, %p\n", _ep, _req); -+ -+ kfree(req); -+} -+ -+static int queue_dma(struct usba_udc *udc, struct usba_ep *ep, -+ struct usba_request *req, gfp_t gfp_flags) -+{ -+ unsigned long flags; -+ int ret; -+ -+ DBG(DBG_DMA, "%s: req l/%u d/%08x %c%c%c\n", -+ ep->ep.name, req->req.length, req->req.dma, -+ req->req.zero ? 'Z' : 'z', -+ req->req.short_not_ok ? 'S' : 's', -+ req->req.no_interrupt ? 'I' : 'i'); -+ -+ if (req->req.length > 0x10000) { -+ /* Lengths from 0 to 65536 (inclusive) are supported */ -+ DBG(DBG_ERR, "invalid request length %u\n", req->req.length); -+ return -EINVAL; -+ } -+ -+ req->using_dma = 1; -+ -+ if (req->req.dma == DMA_ADDR_INVALID) { -+ req->req.dma = dma_map_single( -+ &udc->pdev->dev, req->req.buf, req->req.length, -+ ep->is_in ? DMA_TO_DEVICE : DMA_FROM_DEVICE); -+ req->mapped = 1; -+ } else { -+ dma_sync_single_for_device( -+ &udc->pdev->dev, req->req.dma, req->req.length, -+ ep->is_in ? DMA_TO_DEVICE : DMA_FROM_DEVICE); -+ req->mapped = 0; -+ } -+ -+ req->ctrl = USBA_BF(DMA_BUF_LEN, req->req.length) -+ | USBA_DMA_CH_EN | USBA_DMA_END_BUF_IE -+ | USBA_DMA_END_TR_EN | USBA_DMA_END_TR_IE; -+ -+ if (ep->is_in) -+ req->ctrl |= USBA_DMA_END_BUF_EN; -+ -+ /* -+ * Add this request to the queue and submit for DMA if -+ * possible. Check if we're still alive first -- we may have -+ * received a reset since last time we checked. -+ */ -+ ret = -ESHUTDOWN; -+ spin_lock_irqsave(&udc->lock, flags); -+ if (ep->desc) { -+ if (list_empty(&ep->queue)) -+ submit_request(ep, req); -+ -+ list_add_tail(&req->queue, &ep->queue); -+ ret = 0; -+ } -+ spin_unlock_irqrestore(&udc->lock, flags); -+ -+ return ret; -+} -+ -+static int -+usba_ep_queue(struct usb_ep *_ep, struct usb_request *_req, gfp_t gfp_flags) -+{ -+ struct usba_request *req = to_usba_req(_req); -+ struct usba_ep *ep = to_usba_ep(_ep); -+ struct usba_udc *udc = ep->udc; -+ unsigned long flags; -+ int ret; -+ -+ DBG(DBG_GADGET | DBG_QUEUE | DBG_REQ, "%s: queue req %p, len %u\n", -+ ep->ep.name, req, _req->length); -+ -+ if (!udc->driver || udc->gadget.speed == USB_SPEED_UNKNOWN || !ep->desc) -+ return -ESHUTDOWN; -+ -+ req->submitted = 0; -+ req->using_dma = 0; -+ req->last_transaction = 0; -+ -+ _req->status = -EINPROGRESS; -+ _req->actual = 0; -+ -+ if (ep->can_dma) -+ return queue_dma(udc, ep, req, gfp_flags); -+ -+ /* May have received a reset since last time we checked */ -+ ret = -ESHUTDOWN; -+ spin_lock_irqsave(&udc->lock, flags); -+ if (ep->desc) { -+ list_add_tail(&req->queue, &ep->queue); -+ -+ if (ep->is_in || (ep_is_control(ep) -+ && (ep->state == DATA_STAGE_IN -+ || ep->state == STATUS_STAGE_IN))) -+ usba_ep_writel(ep, CTL_ENB, USBA_TX_PK_RDY); -+ else -+ usba_ep_writel(ep, CTL_ENB, USBA_RX_BK_RDY); -+ ret = 0; -+ } -+ spin_unlock_irqrestore(&udc->lock, flags); -+ -+ return ret; -+} -+ -+static void -+usba_update_req(struct usba_ep *ep, struct usba_request *req, u32 status) -+{ -+ req->req.actual = req->req.length - USBA_BFEXT(DMA_BUF_LEN, status); -+} -+ -+static int stop_dma(struct usba_ep *ep, u32 *pstatus) -+{ -+ unsigned int timeout; -+ u32 status; -+ -+ /* -+ * Stop the DMA controller. When writing both CH_EN -+ * and LINK to 0, the other bits are not affected. -+ */ -+ usba_dma_writel(ep, CONTROL, 0); -+ -+ /* Wait for the FIFO to empty */ -+ for (timeout = 40; timeout; --timeout) { -+ status = usba_dma_readl(ep, STATUS); -+ if (!(status & USBA_DMA_CH_EN)) -+ break; -+ udelay(1); -+ } -+ -+ if (pstatus) -+ *pstatus = status; -+ -+ if (timeout == 0) { -+ dev_err(&ep->udc->pdev->dev, -+ "%s: timed out waiting for DMA FIFO to empty\n", -+ ep->ep.name); -+ return -ETIMEDOUT; -+ } -+ -+ return 0; -+} -+ -+static int usba_ep_dequeue(struct usb_ep *_ep, struct usb_request *_req) -+{ -+ struct usba_ep *ep = to_usba_ep(_ep); -+ struct usba_udc *udc = ep->udc; -+ struct usba_request *req = to_usba_req(_req); -+ unsigned long flags; -+ u32 status; -+ -+ DBG(DBG_GADGET | DBG_QUEUE, "ep_dequeue: %s, req %p\n", -+ ep->ep.name, req); -+ -+ spin_lock_irqsave(&udc->lock, flags); -+ -+ if (req->using_dma) { -+ /* -+ * If this request is currently being transferred, -+ * stop the DMA controller and reset the FIFO. -+ */ -+ if (ep->queue.next == &req->queue) { -+ status = usba_dma_readl(ep, STATUS); -+ if (status & USBA_DMA_CH_EN) -+ stop_dma(ep, &status); -+ -+#ifdef CONFIG_USB_GADGET_DEBUG_FS -+ ep->last_dma_status = status; -+#endif -+ -+ usba_writel(udc, EPT_RST, 1 << ep->index); -+ -+ usba_update_req(ep, req, status); -+ } -+ } -+ -+ /* -+ * Errors should stop the queue from advancing until the -+ * completion function returns. -+ */ -+ list_del_init(&req->queue); -+ -+ request_complete(ep, req, -ECONNRESET); -+ -+ /* Process the next request if any */ -+ submit_next_request(ep); -+ spin_unlock_irqrestore(&udc->lock, flags); -+ -+ return 0; -+} -+ -+static int usba_ep_set_halt(struct usb_ep *_ep, int value) -+{ -+ struct usba_ep *ep = to_usba_ep(_ep); -+ struct usba_udc *udc = ep->udc; -+ unsigned long flags; -+ int ret = 0; -+ -+ DBG(DBG_GADGET, "endpoint %s: %s HALT\n", ep->ep.name, -+ value ? "set" : "clear"); -+ -+ if (!ep->desc) { -+ DBG(DBG_ERR, "Attempted to halt uninitialized ep %s\n", -+ ep->ep.name); -+ return -ENODEV; -+ } -+ if (ep->is_isoc) { -+ DBG(DBG_ERR, "Attempted to halt isochronous ep %s\n", -+ ep->ep.name); -+ return -ENOTTY; -+ } -+ -+ spin_lock_irqsave(&udc->lock, flags); -+ -+ /* -+ * We can't halt IN endpoints while there are still data to be -+ * transferred -+ */ -+ if (!list_empty(&ep->queue) -+ || ((value && ep->is_in && (usba_ep_readl(ep, STA) -+ & USBA_BF(BUSY_BANKS, -1L))))) { -+ ret = -EAGAIN; -+ } else { -+ if (value) -+ usba_ep_writel(ep, SET_STA, USBA_FORCE_STALL); -+ else -+ usba_ep_writel(ep, CLR_STA, -+ USBA_FORCE_STALL | USBA_TOGGLE_CLR); -+ usba_ep_readl(ep, STA); -+ } -+ -+ spin_unlock_irqrestore(&udc->lock, flags); -+ -+ return ret; -+} -+ -+static int usba_ep_fifo_status(struct usb_ep *_ep) -+{ -+ struct usba_ep *ep = to_usba_ep(_ep); -+ -+ return USBA_BFEXT(BYTE_COUNT, usba_ep_readl(ep, STA)); -+} -+ -+static void usba_ep_fifo_flush(struct usb_ep *_ep) -+{ -+ struct usba_ep *ep = to_usba_ep(_ep); -+ struct usba_udc *udc = ep->udc; -+ -+ usba_writel(udc, EPT_RST, 1 << ep->index); -+} -+ -+static const struct usb_ep_ops usba_ep_ops = { -+ .enable = usba_ep_enable, -+ .disable = usba_ep_disable, -+ .alloc_request = usba_ep_alloc_request, -+ .free_request = usba_ep_free_request, -+ .queue = usba_ep_queue, -+ .dequeue = usba_ep_dequeue, -+ .set_halt = usba_ep_set_halt, -+ .fifo_status = usba_ep_fifo_status, -+ .fifo_flush = usba_ep_fifo_flush, -+}; -+ -+static int usba_udc_get_frame(struct usb_gadget *gadget) -+{ -+ struct usba_udc *udc = to_usba_udc(gadget); -+ -+ return USBA_BFEXT(FRAME_NUMBER, usba_readl(udc, FNUM)); -+} -+ -+static const struct usb_gadget_ops usba_udc_ops = { -+ .get_frame = usba_udc_get_frame, -+}; -+ -+#define EP(nam, idx, maxpkt, maxbk, dma, isoc) \ -+{ \ -+ .ep = { \ -+ .ops = &usba_ep_ops, \ -+ .name = nam, \ -+ .maxpacket = maxpkt, \ -+ }, \ -+ .udc = &the_udc, \ -+ .queue = LIST_HEAD_INIT(usba_ep[idx].queue), \ -+ .fifo_size = maxpkt, \ -+ .nr_banks = maxbk, \ -+ .index = idx, \ -+ .can_dma = dma, \ -+ .can_isoc = isoc, \ -+} -+ -+static struct usba_ep usba_ep[] = { -+ EP("ep0", 0, 64, 1, 0, 0), -+ EP("ep1in-bulk", 1, 512, 2, 1, 1), -+ EP("ep2out-bulk", 2, 512, 2, 1, 1), -+ EP("ep3in-int", 3, 64, 3, 1, 0), -+ EP("ep4out-int", 4, 64, 3, 1, 0), -+ EP("ep5in-iso", 5, 1024, 3, 1, 1), -+ EP("ep6out-iso", 6, 1024, 3, 1, 1), -+}; -+#undef EP -+ -+static struct usb_endpoint_descriptor usba_ep0_desc = { -+ .bLength = USB_DT_ENDPOINT_SIZE, -+ .bDescriptorType = USB_DT_ENDPOINT, -+ .bEndpointAddress = 0, -+ .bmAttributes = USB_ENDPOINT_XFER_CONTROL, -+ .wMaxPacketSize = __constant_cpu_to_le16(64), -+ /* FIXME: I have no idea what to put here */ -+ .bInterval = 1, -+}; -+ -+static void nop_release(struct device *dev) -+{ -+ -+} -+ -+static struct usba_udc the_udc = { -+ .gadget = { -+ .ops = &usba_udc_ops, -+ .ep0 = &usba_ep[0].ep, -+ .ep_list = LIST_HEAD_INIT(the_udc.gadget.ep_list), -+ .is_dualspeed = 1, -+ .name = "atmel_usba_udc", -+ .dev = { -+ .bus_id = "gadget", -+ .release = nop_release, -+ }, -+ }, -+ -+ .lock = SPIN_LOCK_UNLOCKED, -+}; -+ -+/* -+ * Called with interrupts disabled and udc->lock held. -+ */ -+static void reset_all_endpoints(struct usba_udc *udc) -+{ -+ struct usba_ep *ep; -+ struct usba_request *req, *tmp_req; -+ -+ usba_writel(udc, EPT_RST, ~0UL); -+ -+ ep = to_usba_ep(udc->gadget.ep0); -+ list_for_each_entry_safe(req, tmp_req, &ep->queue, queue) { -+ list_del_init(&req->queue); -+ request_complete(ep, req, -ECONNRESET); -+ } -+ -+ list_for_each_entry(ep, &udc->gadget.ep_list, ep.ep_list) { -+ if (ep->desc) -+ usba_ep_disable(&ep->ep); -+ } -+} -+ -+static struct usba_ep *get_ep_by_addr(struct usba_udc *udc, u16 wIndex) -+{ -+ struct usba_ep *ep; -+ -+ if ((wIndex & USB_ENDPOINT_NUMBER_MASK) == 0) -+ return to_usba_ep(udc->gadget.ep0); -+ -+ list_for_each_entry (ep, &udc->gadget.ep_list, ep.ep_list) { -+ u8 bEndpointAddress; -+ -+ if (!ep->desc) -+ continue; -+ bEndpointAddress = ep->desc->bEndpointAddress; -+ if ((wIndex ^ bEndpointAddress) & USB_DIR_IN) -+ continue; -+ if ((bEndpointAddress & USB_ENDPOINT_NUMBER_MASK) -+ == (wIndex & USB_ENDPOINT_NUMBER_MASK)) -+ return ep; -+ } -+ -+ return NULL; -+} -+ -+/* Called with interrupts disabled and udc->lock held */ -+static inline void set_protocol_stall(struct usba_udc *udc, struct usba_ep *ep) -+{ -+ usba_ep_writel(ep, SET_STA, USBA_FORCE_STALL); -+ ep->state = WAIT_FOR_SETUP; -+} -+ -+static inline int is_stalled(struct usba_udc *udc, struct usba_ep *ep) -+{ -+ if (usba_ep_readl(ep, STA) & USBA_FORCE_STALL) -+ return 1; -+ return 0; -+} -+ -+static inline void set_address(struct usba_udc *udc, unsigned int addr) -+{ -+ u32 regval; -+ -+ DBG(DBG_BUS, "setting address %u...\n", addr); -+ regval = usba_readl(udc, CTRL); -+ regval = USBA_BFINS(DEV_ADDR, addr, regval); -+ usba_writel(udc, CTRL, regval); -+} -+ -+static int do_test_mode(struct usba_udc *udc) -+{ -+ static const char test_packet_buffer[] = { -+ /* JKJKJKJK * 9 */ -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ /* JJKKJJKK * 8 */ -+ 0xAA, 0xAA, 0xAA, 0xAA, 0xAA, 0xAA, 0xAA, 0xAA, -+ /* JJKKJJKK * 8 */ -+ 0xEE, 0xEE, 0xEE, 0xEE, 0xEE, 0xEE, 0xEE, 0xEE, -+ /* JJJJJJJKKKKKKK * 8 */ -+ 0xFE, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, -+ 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, -+ /* JJJJJJJK * 8 */ -+ 0x7F, 0xBF, 0xDF, 0xEF, 0xF7, 0xFB, 0xFD, -+ /* {JKKKKKKK * 10}, JK */ -+ 0xFC, 0x7E, 0xBF, 0xDF, 0xEF, 0xF7, 0xFB, 0xFD, 0x7E -+ }; -+ struct usba_ep *ep; -+ struct device *dev = &udc->pdev->dev; -+ int test_mode; -+ -+ test_mode = udc->test_mode; -+ -+ /* Start from a clean slate */ -+ reset_all_endpoints(udc); -+ -+ switch (test_mode) { -+ case 0x0100: -+ /* Test_J */ -+ usba_writel(udc, TST, USBA_TST_J_MODE); -+ dev_info(dev, "Entering Test_J mode...\n"); -+ break; -+ case 0x0200: -+ /* Test_K */ -+ usba_writel(udc, TST, USBA_TST_K_MODE); -+ dev_info(dev, "Entering Test_K mode...\n"); -+ break; -+ case 0x0300: -+ /* -+ * Test_SE0_NAK: Force high-speed mode and set up ep0 -+ * for Bulk IN transfers -+ */ -+ ep = &usba_ep[0]; -+ usba_writel(udc, TST, -+ USBA_BF(SPEED_CFG, USBA_SPEED_CFG_FORCE_HIGH)); -+ usba_ep_writel(ep, CFG, -+ USBA_BF(EPT_SIZE, USBA_EPT_SIZE_64) -+ | USBA_EPT_DIR_IN -+ | USBA_BF(EPT_TYPE, USBA_EPT_TYPE_BULK) -+ | USBA_BF(BK_NUMBER, 1)); -+ if (!(usba_ep_readl(ep, CFG) & USBA_EPT_MAPPED)) { -+ set_protocol_stall(udc, ep); -+ dev_err(dev, "Test_SE0_NAK: ep0 not mapped\n"); -+ } else { -+ usba_ep_writel(ep, CTL_ENB, USBA_EPT_ENABLE); -+ dev_info(dev, "Entering Test_SE0_NAK mode...\n"); -+ } -+ break; -+ case 0x0400: -+ /* Test_Packet */ -+ ep = &usba_ep[0]; -+ usba_ep_writel(ep, CFG, -+ USBA_BF(EPT_SIZE, USBA_EPT_SIZE_64) -+ | USBA_EPT_DIR_IN -+ | USBA_BF(EPT_TYPE, USBA_EPT_TYPE_BULK) -+ | USBA_BF(BK_NUMBER, 1)); -+ if (!(usba_ep_readl(ep, CFG) & USBA_EPT_MAPPED)) { -+ set_protocol_stall(udc, ep); -+ dev_err(dev, "Test_Packet: ep0 not mapped\n"); -+ } else { -+ usba_ep_writel(ep, CTL_ENB, USBA_EPT_ENABLE); -+ usba_writel(udc, TST, USBA_TST_PKT_MODE); -+ copy_to_fifo(ep->fifo, test_packet_buffer, -+ sizeof(test_packet_buffer)); -+ usba_ep_writel(ep, SET_STA, USBA_TX_PK_RDY); -+ dev_info(dev, "Entering Test_Packet mode...\n"); -+ } -+ break; -+ default: -+ dev_err(dev, "Invalid test mode: 0x%04x\n", test_mode); -+ return -EINVAL; -+ } -+ -+ return 0; -+} -+ -+/* Avoid overly long expressions */ -+static inline bool feature_is_dev_remote_wakeup(struct usb_ctrlrequest *crq) -+{ -+ if (crq->wValue == __constant_cpu_to_le16(USB_DEVICE_REMOTE_WAKEUP)) -+ return true; -+ return false; -+} -+ -+static inline bool feature_is_dev_test_mode(struct usb_ctrlrequest *crq) -+{ -+ if (crq->wValue == __constant_cpu_to_le16(USB_DEVICE_TEST_MODE)) -+ return true; -+ return false; -+} -+ -+static inline bool feature_is_ep_halt(struct usb_ctrlrequest *crq) -+{ -+ if (crq->wValue == __constant_cpu_to_le16(USB_ENDPOINT_HALT)) -+ return true; -+ return false; -+} -+ -+static int handle_ep0_setup(struct usba_udc *udc, struct usba_ep *ep, -+ struct usb_ctrlrequest *crq) -+{ -+ int retval = 0;; -+ -+ switch (crq->bRequest) { -+ case USB_REQ_GET_STATUS: { -+ u16 status; -+ -+ if (crq->bRequestType == (USB_DIR_IN | USB_RECIP_DEVICE)) { -+ /* Self-powered, no remote wakeup */ -+ status = __constant_cpu_to_le16(1 << 0); -+ } else if (crq->bRequestType -+ == (USB_DIR_IN | USB_RECIP_INTERFACE)) { -+ status = __constant_cpu_to_le16(0); -+ } else if (crq->bRequestType -+ == (USB_DIR_IN | USB_RECIP_ENDPOINT)) { -+ struct usba_ep *target; -+ -+ target = get_ep_by_addr(udc, le16_to_cpu(crq->wIndex)); -+ if (!target) -+ goto stall; -+ -+ status = 0; -+ if (is_stalled(udc, target)) -+ status |= __constant_cpu_to_le16(1); -+ } else -+ goto delegate; -+ -+ /* Write directly to the FIFO. No queueing is done. */ -+ if (crq->wLength != __constant_cpu_to_le16(sizeof(status))) -+ goto stall; -+ ep->state = DATA_STAGE_IN; -+ __raw_writew(status, ep->fifo); -+ usba_ep_writel(ep, SET_STA, USBA_TX_PK_RDY); -+ break; -+ } -+ -+ case USB_REQ_CLEAR_FEATURE: { -+ if (crq->bRequestType == USB_RECIP_DEVICE) { -+ if (feature_is_dev_remote_wakeup(crq)) { -+ /* TODO: Handle REMOTE_WAKEUP */ -+ } else { -+ /* Can't CLEAR_FEATURE TEST_MODE */ -+ goto stall; -+ } -+ } else if (crq->bRequestType == USB_RECIP_ENDPOINT) { -+ struct usba_ep *target; -+ -+ if (crq->wLength != __constant_cpu_to_le16(0) -+ || !feature_is_ep_halt(crq)) -+ goto stall; -+ target = get_ep_by_addr(udc, le16_to_cpu(crq->wIndex)); -+ if (!target) -+ goto stall; -+ -+ usba_ep_writel(target, CLR_STA, USBA_FORCE_STALL); -+ if (target->index != 0) -+ usba_ep_writel(target, CLR_STA, -+ USBA_TOGGLE_CLR); -+ } else { -+ goto delegate; -+ } -+ -+ send_status(udc, ep); -+ break; -+ } -+ -+ case USB_REQ_SET_FEATURE: { -+ if (crq->bRequestType == USB_RECIP_DEVICE) { -+ if (feature_is_dev_test_mode(crq)) { -+ send_status(udc, ep); -+ ep->state = STATUS_STAGE_TEST; -+ udc->test_mode = le16_to_cpu(crq->wIndex); -+ return 0; -+ } else if (feature_is_dev_remote_wakeup(crq)) { -+ /* TODO: Handle REMOTE_WAKEUP */ -+ } else { -+ goto stall; -+ } -+ } else if (crq->bRequestType == USB_RECIP_ENDPOINT) { -+ struct usba_ep *target; -+ -+ if (crq->wLength != __constant_cpu_to_le16(0) -+ || !feature_is_ep_halt(crq)) -+ goto stall; -+ -+ target = get_ep_by_addr(udc, le16_to_cpu(crq->wIndex)); -+ if (!target) -+ goto stall; -+ -+ usba_ep_writel(target, SET_STA, USBA_FORCE_STALL); -+ } else -+ goto delegate; -+ -+ send_status(udc, ep); -+ break; -+ } -+ -+ case USB_REQ_SET_ADDRESS: -+ if (crq->bRequestType != (USB_DIR_OUT | USB_RECIP_DEVICE)) -+ goto delegate; -+ -+ set_address(udc, le16_to_cpu(crq->wValue)); -+ send_status(udc, ep); -+ ep->state = STATUS_STAGE_ADDR; -+ break; -+ -+ default: -+delegate: -+ spin_unlock(&udc->lock); -+ retval = udc->driver->setup(&udc->gadget, crq); -+ spin_lock(&udc->lock); -+ } -+ -+ return retval; -+ -+stall: -+ printk(KERN_ERR -+ "udc: %s: Invalid setup request: %02x.%02x v%04x i%04x l%d, " -+ "halting endpoint...\n", -+ ep->ep.name, crq->bRequestType, crq->bRequest, -+ le16_to_cpu(crq->wValue), le16_to_cpu(crq->wIndex), -+ le16_to_cpu(crq->wLength)); -+ set_protocol_stall(udc, ep); -+ return -1; -+} -+ -+static void usba_control_irq(struct usba_udc *udc, struct usba_ep *ep) -+{ -+ struct usba_request *req; -+ u32 epstatus; -+ u32 epctrl; -+ -+restart: -+ epstatus = usba_ep_readl(ep, STA); -+ epctrl = usba_ep_readl(ep, CTL); -+ -+ DBG(DBG_INT, "%s [%d]: s/%08x c/%08x\n", -+ ep->ep.name, ep->state, epstatus, epctrl); -+ -+ req = NULL; -+ if (!list_empty(&ep->queue)) -+ req = list_entry(ep->queue.next, -+ struct usba_request, queue); -+ -+ if ((epctrl & USBA_TX_PK_RDY) && !(epstatus & USBA_TX_PK_RDY)) { -+ if (req->submitted) -+ next_fifo_transaction(ep, req); -+ else -+ submit_request(ep, req); -+ -+ if (req->last_transaction) { -+ usba_ep_writel(ep, CTL_DIS, USBA_TX_PK_RDY); -+ usba_ep_writel(ep, CTL_ENB, USBA_TX_COMPLETE); -+ } -+ goto restart; -+ } -+ if ((epstatus & epctrl) & USBA_TX_COMPLETE) { -+ usba_ep_writel(ep, CLR_STA, USBA_TX_COMPLETE); -+ -+ switch (ep->state) { -+ case DATA_STAGE_IN: -+ usba_ep_writel(ep, CTL_ENB, USBA_RX_BK_RDY); -+ usba_ep_writel(ep, CTL_DIS, USBA_TX_COMPLETE); -+ ep->state = STATUS_STAGE_OUT; -+ break; -+ case STATUS_STAGE_ADDR: -+ /* Activate our new address */ -+ usba_writel(udc, CTRL, (usba_readl(udc, CTRL) -+ | USBA_FADDR_EN)); -+ usba_ep_writel(ep, CTL_DIS, USBA_TX_COMPLETE); -+ ep->state = WAIT_FOR_SETUP; -+ break; -+ case STATUS_STAGE_IN: -+ if (req) { -+ list_del_init(&req->queue); -+ request_complete(ep, req, 0); -+ submit_next_request(ep); -+ } -+ usba_ep_writel(ep, CTL_DIS, USBA_TX_COMPLETE); -+ ep->state = WAIT_FOR_SETUP; -+ break; -+ case STATUS_STAGE_TEST: -+ usba_ep_writel(ep, CTL_DIS, USBA_TX_COMPLETE); -+ ep->state = WAIT_FOR_SETUP; -+ if (do_test_mode(udc)) -+ set_protocol_stall(udc, ep); -+ break; -+ default: -+ printk(KERN_ERR -+ "udc: %s: TXCOMP: Invalid endpoint state %d, " -+ "halting endpoint...\n", -+ ep->ep.name, ep->state); -+ set_protocol_stall(udc, ep); -+ break; -+ } -+ -+ goto restart; -+ } -+ if ((epstatus & epctrl) & USBA_RX_BK_RDY) { -+ switch (ep->state) { -+ case STATUS_STAGE_OUT: -+ usba_ep_writel(ep, CLR_STA, USBA_RX_BK_RDY); -+ usba_ep_writel(ep, CTL_DIS, USBA_RX_BK_RDY); -+ -+ if (req) { -+ list_del_init(&req->queue); -+ request_complete(ep, req, 0); -+ } -+ ep->state = WAIT_FOR_SETUP; -+ break; -+ -+ case DATA_STAGE_OUT: -+ receive_data(ep); -+ break; -+ -+ default: -+ usba_ep_writel(ep, CLR_STA, USBA_RX_BK_RDY); -+ usba_ep_writel(ep, CTL_DIS, USBA_RX_BK_RDY); -+ printk(KERN_ERR -+ "udc: %s: RXRDY: Invalid endpoint state %d, " -+ "halting endpoint...\n", -+ ep->ep.name, ep->state); -+ set_protocol_stall(udc, ep); -+ break; -+ } -+ -+ goto restart; -+ } -+ if (epstatus & USBA_RX_SETUP) { -+ union { -+ struct usb_ctrlrequest crq; -+ unsigned long data[2]; -+ } crq; -+ unsigned int pkt_len; -+ int ret; -+ -+ if (ep->state != WAIT_FOR_SETUP) { -+ /* -+ * Didn't expect a SETUP packet at this -+ * point. Clean up any pending requests (which -+ * may be successful). -+ */ -+ int status = -EPROTO; -+ -+ /* -+ * RXRDY and TXCOMP are dropped when SETUP -+ * packets arrive. Just pretend we received -+ * the status packet. -+ */ -+ if (ep->state == STATUS_STAGE_OUT -+ || ep->state == STATUS_STAGE_IN) { -+ usba_ep_writel(ep, CTL_DIS, USBA_RX_BK_RDY); -+ status = 0; -+ } -+ -+ if (req) { -+ list_del_init(&req->queue); -+ request_complete(ep, req, status); -+ } -+ } -+ -+ pkt_len = USBA_BFEXT(BYTE_COUNT, usba_ep_readl(ep, STA)); -+ DBG(DBG_HW, "Packet length: %u\n", pkt_len); -+ if (pkt_len != sizeof(crq)) { -+ printk(KERN_WARNING "udc: Invalid packet length %u " -+ "(expected %lu)\n", pkt_len, sizeof(crq)); -+ set_protocol_stall(udc, ep); -+ return; -+ } -+ -+ DBG(DBG_FIFO, "Copying ctrl request from 0x%p:\n", ep->fifo); -+ copy_from_fifo(crq.data, ep->fifo, sizeof(crq)); -+ -+ /* Free up one bank in the FIFO so that we can -+ * generate or receive a reply right away. */ -+ usba_ep_writel(ep, CLR_STA, USBA_RX_SETUP); -+ -+ /* printk(KERN_DEBUG "setup: %d: %02x.%02x\n", -+ ep->state, crq.crq.bRequestType, -+ crq.crq.bRequest); */ -+ -+ if (crq.crq.bRequestType & USB_DIR_IN) { -+ /* -+ * The USB 2.0 spec states that "if wLength is -+ * zero, there is no data transfer phase." -+ * However, testusb #14 seems to actually -+ * expect a data phase even if wLength = 0... -+ */ -+ ep->state = DATA_STAGE_IN; -+ } else { -+ if (crq.crq.wLength != __constant_cpu_to_le16(0)) -+ ep->state = DATA_STAGE_OUT; -+ else -+ ep->state = STATUS_STAGE_IN; -+ } -+ -+ ret = -1; -+ if (ep->index == 0) -+ ret = handle_ep0_setup(udc, ep, &crq.crq); -+ else { -+ spin_unlock(&udc->lock); -+ ret = udc->driver->setup(&udc->gadget, &crq.crq); -+ spin_lock(&udc->lock); -+ } -+ -+ DBG(DBG_BUS, "req %02x.%02x, length %d, state %d, ret %d\n", -+ crq.crq.bRequestType, crq.crq.bRequest, -+ le16_to_cpu(crq.crq.wLength), ep->state, ret); -+ -+ if (ret < 0) { -+ /* Let the host know that we failed */ -+ set_protocol_stall(udc, ep); -+ } -+ } -+} -+ -+static void usba_ep_irq(struct usba_udc *udc, struct usba_ep *ep) -+{ -+ struct usba_request *req; -+ u32 epstatus; -+ u32 epctrl; -+ -+ epstatus = usba_ep_readl(ep, STA); -+ epctrl = usba_ep_readl(ep, CTL); -+ -+ DBG(DBG_INT, "%s: interrupt, status: 0x%08x\n", ep->ep.name, epstatus); -+ -+ while ((epctrl & USBA_TX_PK_RDY) && !(epstatus & USBA_TX_PK_RDY)) { -+ DBG(DBG_BUS, "%s: TX PK ready\n", ep->ep.name); -+ -+ if (list_empty(&ep->queue)) { -+ dev_warn(&udc->pdev->dev, "ep_irq: queue empty\n"); -+ usba_ep_writel(ep, CTL_DIS, USBA_TX_PK_RDY); -+ return; -+ } -+ -+ req = list_entry(ep->queue.next, struct usba_request, queue); -+ -+ if (req->using_dma) { -+ /* Send a zero-length packet */ -+ usba_ep_writel(ep, SET_STA, -+ USBA_TX_PK_RDY); -+ usba_ep_writel(ep, CTL_DIS, -+ USBA_TX_PK_RDY); -+ list_del_init(&req->queue); -+ submit_next_request(ep); -+ request_complete(ep, req, 0); -+ } else { -+ if (req->submitted) -+ next_fifo_transaction(ep, req); -+ else -+ submit_request(ep, req); -+ -+ if (req->last_transaction) { -+ list_del_init(&req->queue); -+ submit_next_request(ep); -+ request_complete(ep, req, 0); -+ } -+ } -+ -+ epstatus = usba_ep_readl(ep, STA); -+ epctrl = usba_ep_readl(ep, CTL); -+ } -+ if ((epstatus & epctrl) & USBA_RX_BK_RDY) { -+ DBG(DBG_BUS, "%s: RX data ready\n", ep->ep.name); -+ receive_data(ep); -+ usba_ep_writel(ep, CLR_STA, USBA_RX_BK_RDY); -+ } -+} -+ -+static void usba_dma_irq(struct usba_udc *udc, struct usba_ep *ep) -+{ -+ struct usba_request *req; -+ u32 status, control, pending; -+ -+ status = usba_dma_readl(ep, STATUS); -+ control = usba_dma_readl(ep, CONTROL); -+#ifdef CONFIG_USB_GADGET_DEBUG_FS -+ ep->last_dma_status = status; -+#endif -+ pending = status & control; -+ DBG(DBG_INT | DBG_DMA, "dma irq, s/%#08x, c/%#08x\n", status, control); -+ -+ if (status & USBA_DMA_CH_EN) { -+ dev_err(&udc->pdev->dev, -+ "DMA_CH_EN is set after transfer is finished!\n"); -+ dev_err(&udc->pdev->dev, -+ "status=%#08x, pending=%#08x, control=%#08x\n", -+ status, pending, control); -+ -+ /* -+ * try to pretend nothing happened. We might have to -+ * do something here... -+ */ -+ } -+ -+ if (list_empty(&ep->queue)) -+ /* Might happen if a reset comes along at the right moment */ -+ return; -+ -+ if (pending & (USBA_DMA_END_TR_ST | USBA_DMA_END_BUF_ST)) { -+ req = list_entry(ep->queue.next, struct usba_request, queue); -+ usba_update_req(ep, req, status); -+ -+ list_del_init(&req->queue); -+ submit_next_request(ep); -+ request_complete(ep, req, 0); -+ } -+} -+ -+static irqreturn_t usba_udc_irq(int irq, void *devid) -+{ -+ struct usba_udc *udc = devid; -+ u32 status; -+ u32 dma_status; -+ u32 ep_status; -+ -+ spin_lock(&udc->lock); -+ -+ status = usba_readl(udc, INT_STA); -+ DBG(DBG_INT, "irq, status=%#08x\n", status); -+ -+ if (status & USBA_DET_SUSPEND) { -+ usba_writel(udc, INT_CLR, USBA_DET_SUSPEND); -+ DBG(DBG_BUS, "Suspend detected\n"); -+ if (udc->gadget.speed != USB_SPEED_UNKNOWN -+ && udc->driver && udc->driver->suspend) { -+ spin_unlock(&udc->lock); -+ udc->driver->suspend(&udc->gadget); -+ spin_lock(&udc->lock); -+ } -+ } -+ -+ if (status & USBA_WAKE_UP) { -+ usba_writel(udc, INT_CLR, USBA_WAKE_UP); -+ DBG(DBG_BUS, "Wake Up CPU detected\n"); -+ } -+ -+ if (status & USBA_END_OF_RESUME) { -+ usba_writel(udc, INT_CLR, USBA_END_OF_RESUME); -+ DBG(DBG_BUS, "Resume detected\n"); -+ if (udc->gadget.speed != USB_SPEED_UNKNOWN -+ && udc->driver && udc->driver->resume) { -+ spin_unlock(&udc->lock); -+ udc->driver->resume(&udc->gadget); -+ spin_lock(&udc->lock); -+ } -+ } -+ -+ dma_status = USBA_BFEXT(DMA_INT, status); -+ if (dma_status) { -+ int i; -+ -+ for (i = 1; i < USBA_NR_ENDPOINTS; i++) -+ if (dma_status & (1 << i)) -+ usba_dma_irq(udc, &usba_ep[i]); -+ } -+ -+ ep_status = USBA_BFEXT(EPT_INT, status); -+ if (ep_status) { -+ int i; -+ -+ for (i = 0; i < USBA_NR_ENDPOINTS; i++) -+ if (ep_status & (1 << i)) { -+ if (ep_is_control(&usba_ep[i])) -+ usba_control_irq(udc, &usba_ep[i]); -+ else -+ usba_ep_irq(udc, &usba_ep[i]); -+ } -+ } -+ -+ if (status & USBA_END_OF_RESET) { -+ struct usba_ep *ep0; -+ -+ usba_writel(udc, INT_CLR, USBA_END_OF_RESET); -+ reset_all_endpoints(udc); -+ -+ if (status & USBA_HIGH_SPEED) { -+ DBG(DBG_BUS, "High-speed bus reset detected\n"); -+ udc->gadget.speed = USB_SPEED_HIGH; -+ } else { -+ DBG(DBG_BUS, "Full-speed bus reset detected\n"); -+ udc->gadget.speed = USB_SPEED_FULL; -+ } -+ -+ ep0 = &usba_ep[0]; -+ ep0->desc = &usba_ep0_desc; -+ ep0->state = WAIT_FOR_SETUP; -+ usba_ep_writel(ep0, CFG, -+ (USBA_BF(EPT_SIZE, EP0_EPT_SIZE) -+ | USBA_BF(EPT_TYPE, USBA_EPT_TYPE_CONTROL) -+ | USBA_BF(BK_NUMBER, USBA_BK_NUMBER_ONE))); -+ usba_ep_writel(ep0, CTL_ENB, -+ USBA_EPT_ENABLE | USBA_RX_SETUP); -+ usba_writel(udc, INT_ENB, -+ (usba_readl(udc, INT_ENB) -+ | USBA_BF(EPT_INT, 1) -+ | USBA_DET_SUSPEND -+ | USBA_END_OF_RESUME)); -+ -+ if (!(usba_ep_readl(ep0, CFG) & USBA_EPT_MAPPED)) -+ dev_warn(&udc->pdev->dev, -+ "WARNING: EP0 configuration is invalid!\n"); -+ } -+ -+ spin_unlock(&udc->lock); -+ -+ return IRQ_HANDLED; -+} -+ -+static irqreturn_t usba_vbus_irq(int irq, void *devid) -+{ -+ struct usba_udc *udc = devid; -+ int vbus; -+ -+ /* debounce */ -+ udelay(10); -+ -+ spin_lock(&udc->lock); -+ -+ /* May happen if Vbus pin toggles during probe() */ -+ if (!udc->driver) -+ goto out; -+ -+ vbus = gpio_get_value(udc->vbus_pin); -+ if (vbus != udc->vbus_prev) { -+ if (vbus) { -+ usba_writel(udc, CTRL, USBA_EN_USBA); -+ usba_writel(udc, INT_ENB, USBA_END_OF_RESET); -+ } else { -+ udc->gadget.speed = USB_SPEED_UNKNOWN; -+ reset_all_endpoints(udc); -+ usba_writel(udc, CTRL, 0); -+ spin_unlock(&udc->lock); -+ udc->driver->disconnect(&udc->gadget); -+ spin_lock(&udc->lock); -+ } -+ udc->vbus_prev = vbus; -+ } -+ -+out: -+ spin_unlock(&udc->lock); -+ -+ return IRQ_HANDLED; -+} -+ -+int usb_gadget_register_driver(struct usb_gadget_driver *driver) -+{ -+ struct usba_udc *udc = &the_udc; -+ unsigned long flags; -+ int ret; -+ -+ if (!udc->pdev) -+ return -ENODEV; -+ -+ spin_lock_irqsave(&udc->lock, flags); -+ if (udc->driver) { -+ spin_unlock_irqrestore(&udc->lock, flags); -+ return -EBUSY; -+ } -+ -+ udc->driver = driver; -+ udc->gadget.dev.driver = &driver->driver; -+ spin_unlock_irqrestore(&udc->lock, flags); -+ -+ clk_enable(udc->pclk); -+ clk_enable(udc->hclk); -+ -+ ret = driver->bind(&udc->gadget); -+ if (ret) { -+ DBG(DBG_ERR, "Could not bind to driver %s: error %d\n", -+ driver->driver.name, ret); -+ goto err_driver_bind; -+ } -+ -+ DBG(DBG_GADGET, "registered driver `%s'\n", driver->driver.name); -+ -+ udc->vbus_prev = 0; -+ if (udc->vbus_pin != -1) -+ enable_irq(gpio_to_irq(udc->vbus_pin)); -+ -+ /* If Vbus is present, enable the controller and wait for reset */ -+ spin_lock_irqsave(&udc->lock, flags); -+ if (vbus_is_present(udc) && udc->vbus_prev == 0) { -+ usba_writel(udc, CTRL, USBA_EN_USBA); -+ usba_writel(udc, INT_ENB, USBA_END_OF_RESET); -+ } -+ spin_unlock_irqrestore(&udc->lock, flags); -+ -+ return 0; -+ -+err_driver_bind: -+ udc->driver = NULL; -+ udc->gadget.dev.driver = NULL; -+ return ret; -+} -+EXPORT_SYMBOL(usb_gadget_register_driver); -+ -+int usb_gadget_unregister_driver(struct usb_gadget_driver *driver) -+{ -+ struct usba_udc *udc = &the_udc; -+ unsigned long flags; -+ -+ if (!udc->pdev) -+ return -ENODEV; -+ if (driver != udc->driver) -+ return -EINVAL; -+ -+ if (udc->vbus_pin != -1) -+ disable_irq(gpio_to_irq(udc->vbus_pin)); -+ -+ spin_lock_irqsave(&udc->lock, flags); -+ udc->gadget.speed = USB_SPEED_UNKNOWN; -+ reset_all_endpoints(udc); -+ spin_unlock_irqrestore(&udc->lock, flags); -+ -+ /* This will also disable the DP pullup */ -+ usba_writel(udc, CTRL, 0); -+ -+ driver->unbind(&udc->gadget); -+ udc->gadget.dev.driver = NULL; -+ udc->driver = NULL; -+ -+ clk_disable(udc->hclk); -+ clk_disable(udc->pclk); -+ -+ DBG(DBG_GADGET, "unregistered driver `%s'\n", driver->driver.name); -+ -+ return 0; -+} -+EXPORT_SYMBOL(usb_gadget_unregister_driver); -+ -+static int __init usba_udc_probe(struct platform_device *pdev) -+{ -+ struct usba_platform_data *pdata = pdev->dev.platform_data; -+ struct resource *regs, *fifo; -+ struct clk *pclk, *hclk; -+ struct usba_udc *udc = &the_udc; -+ int irq, ret, i; -+ -+ regs = platform_get_resource(pdev, IORESOURCE_MEM, CTRL_IOMEM_ID); -+ fifo = platform_get_resource(pdev, IORESOURCE_MEM, FIFO_IOMEM_ID); -+ if (!regs || !fifo) -+ return -ENXIO; -+ -+ irq = platform_get_irq(pdev, 0); -+ if (irq < 0) -+ return irq; -+ -+ pclk = clk_get(&pdev->dev, "pclk"); -+ if (IS_ERR(pclk)) -+ return PTR_ERR(pclk); -+ hclk = clk_get(&pdev->dev, "hclk"); -+ if (IS_ERR(hclk)) { -+ ret = PTR_ERR(hclk); -+ goto err_get_hclk; -+ } -+ -+ udc->pdev = pdev; -+ udc->pclk = pclk; -+ udc->hclk = hclk; -+ udc->vbus_pin = -1; -+ -+ ret = -ENOMEM; -+ udc->regs = ioremap(regs->start, regs->end - regs->start + 1); -+ if (!udc->regs) { -+ dev_err(&pdev->dev, "Unable to map I/O memory, aborting.\n"); -+ goto err_map_regs; -+ } -+ dev_info(&pdev->dev, "MMIO registers at 0x%08lx mapped at %p\n", -+ (unsigned long)regs->start, udc->regs); -+ udc->fifo = ioremap(fifo->start, fifo->end - fifo->start + 1); -+ if (!udc->fifo) { -+ dev_err(&pdev->dev, "Unable to map FIFO, aborting.\n"); -+ goto err_map_fifo; -+ } -+ dev_info(&pdev->dev, "FIFO at 0x%08lx mapped at %p\n", -+ (unsigned long)fifo->start, udc->fifo); -+ -+ device_initialize(&udc->gadget.dev); -+ udc->gadget.dev.parent = &pdev->dev; -+ udc->gadget.dev.dma_mask = pdev->dev.dma_mask; -+ -+ platform_set_drvdata(pdev, udc); -+ -+ /* Make sure we start from a clean slate */ -+ clk_enable(pclk); -+ usba_writel(udc, CTRL, 0); -+ clk_disable(pclk); -+ -+ INIT_LIST_HEAD(&usba_ep[0].ep.ep_list); -+ usba_ep[0].ep_regs = udc->regs + USBA_EPT_BASE(0); -+ usba_ep[0].dma_regs = udc->regs + USBA_DMA_BASE(0); -+ usba_ep[0].fifo = udc->fifo + USBA_FIFO_BASE(0); -+ for (i = 1; i < ARRAY_SIZE(usba_ep); i++) { -+ struct usba_ep *ep = &usba_ep[i]; -+ -+ ep->ep_regs = udc->regs + USBA_EPT_BASE(i); -+ ep->dma_regs = udc->regs + USBA_DMA_BASE(i); -+ ep->fifo = udc->fifo + USBA_FIFO_BASE(i); -+ -+ list_add_tail(&ep->ep.ep_list, &udc->gadget.ep_list); -+ } -+ -+ ret = request_irq(irq, usba_udc_irq, 0, "atmel_usba_udc", udc); -+ if (ret) { -+ dev_err(&pdev->dev, "Cannot request irq %d (error %d)\n", -+ irq, ret); -+ goto err_request_irq; -+ } -+ udc->irq = irq; -+ -+ ret = device_add(&udc->gadget.dev); -+ if (ret) { -+ dev_dbg(&pdev->dev, "Could not add gadget: %d\n", ret); -+ goto err_device_add; -+ } -+ -+ if (pdata && pdata->vbus_pin != GPIO_PIN_NONE) { -+ if (!gpio_request(pdata->vbus_pin, "atmel_usba_udc")) { -+ udc->vbus_pin = pdata->vbus_pin; -+ -+ ret = request_irq(gpio_to_irq(udc->vbus_pin), -+ usba_vbus_irq, 0, -+ "atmel_usba_udc", udc); -+ if (ret) { -+ gpio_free(udc->vbus_pin); -+ udc->vbus_pin = -1; -+ dev_warn(&udc->pdev->dev, -+ "failed to request vbus irq; " -+ "assuming always on\n"); -+ } else { -+ disable_irq(gpio_to_irq(udc->vbus_pin)); -+ } -+ } -+ } -+ -+ usba_init_debugfs(udc); -+ for (i = 1; i < ARRAY_SIZE(usba_ep); i++) -+ usba_ep_init_debugfs(udc, &usba_ep[i]); -+ -+ return 0; -+ -+err_device_add: -+ free_irq(irq, udc); -+err_request_irq: -+ iounmap(udc->fifo); -+err_map_fifo: -+ iounmap(udc->regs); -+err_map_regs: -+ clk_put(hclk); -+err_get_hclk: -+ clk_put(pclk); -+ -+ platform_set_drvdata(pdev, NULL); -+ -+ return ret; -+} -+ -+static int __exit usba_udc_remove(struct platform_device *pdev) -+{ -+ struct usba_udc *udc; -+ int i; -+ -+ udc = platform_get_drvdata(pdev); -+ -+ for (i = 1; i < ARRAY_SIZE(usba_ep); i++) -+ usba_ep_cleanup_debugfs(&usba_ep[i]); -+ usba_cleanup_debugfs(udc); -+ -+ if (udc->vbus_pin != -1) -+ gpio_free(udc->vbus_pin); -+ -+ free_irq(udc->irq, udc); -+ iounmap(udc->fifo); -+ iounmap(udc->regs); -+ clk_put(udc->hclk); -+ clk_put(udc->pclk); -+ -+ device_unregister(&udc->gadget.dev); -+ -+ return 0; -+} -+ -+static struct platform_driver udc_driver = { -+ .remove = __exit_p(usba_udc_remove), -+ .driver = { -+ .name = "atmel_usba_udc", -+ }, -+}; -+ -+static int __init udc_init(void) -+{ -+ return platform_driver_probe(&udc_driver, usba_udc_probe); -+} -+module_init(udc_init); -+ -+static void __exit udc_exit(void) -+{ -+ platform_driver_unregister(&udc_driver); -+} -+module_exit(udc_exit); -+ -+MODULE_DESCRIPTION("Atmel USBA UDC driver"); -+MODULE_AUTHOR("Haavard Skinnemoen <hskinnemoen@atmel.com>"); -+MODULE_LICENSE("GPL"); -diff --git a/drivers/usb/gadget/atmel_usba_udc.h b/drivers/usb/gadget/atmel_usba_udc.h -new file mode 100644 -index 0000000..f4f0f8b ---- /dev/null -+++ b/drivers/usb/gadget/atmel_usba_udc.h -@@ -0,0 +1,350 @@ -+/* -+ * Driver for the Atmel USBA high speed USB device controller -+ * -+ * Copyright (C) 2005-2007 Atmel Corporation -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 as -+ * published by the Free Software Foundation. -+ */ -+#ifndef __LINUX_USB_GADGET_USBA_UDC_H__ -+#define __LINUX_USB_GADGET_USBA_UDC_H__ -+ -+/* USB register offsets */ -+#define USBA_CTRL 0x0000 -+#define USBA_FNUM 0x0004 -+#define USBA_INT_ENB 0x0010 -+#define USBA_INT_STA 0x0014 -+#define USBA_INT_CLR 0x0018 -+#define USBA_EPT_RST 0x001c -+#define USBA_TST 0x00e0 -+ -+/* USB endpoint register offsets */ -+#define USBA_EPT_CFG 0x0000 -+#define USBA_EPT_CTL_ENB 0x0004 -+#define USBA_EPT_CTL_DIS 0x0008 -+#define USBA_EPT_CTL 0x000c -+#define USBA_EPT_SET_STA 0x0014 -+#define USBA_EPT_CLR_STA 0x0018 -+#define USBA_EPT_STA 0x001c -+ -+/* USB DMA register offsets */ -+#define USBA_DMA_NXT_DSC 0x0000 -+#define USBA_DMA_ADDRESS 0x0004 -+#define USBA_DMA_CONTROL 0x0008 -+#define USBA_DMA_STATUS 0x000c -+ -+/* Bitfields in CTRL */ -+#define USBA_DEV_ADDR_OFFSET 0 -+#define USBA_DEV_ADDR_SIZE 7 -+#define USBA_FADDR_EN (1 << 7) -+#define USBA_EN_USBA (1 << 8) -+#define USBA_DETACH (1 << 9) -+#define USBA_REMOTE_WAKE_UP (1 << 10) -+ -+/* Bitfields in FNUM */ -+#define USBA_MICRO_FRAME_NUM_OFFSET 0 -+#define USBA_MICRO_FRAME_NUM_SIZE 3 -+#define USBA_FRAME_NUMBER_OFFSET 3 -+#define USBA_FRAME_NUMBER_SIZE 11 -+#define USBA_FRAME_NUM_ERROR (1 << 31) -+ -+/* Bitfields in INT_ENB/INT_STA/INT_CLR */ -+#define USBA_HIGH_SPEED (1 << 0) -+#define USBA_DET_SUSPEND (1 << 1) -+#define USBA_MICRO_SOF (1 << 2) -+#define USBA_SOF (1 << 3) -+#define USBA_END_OF_RESET (1 << 4) -+#define USBA_WAKE_UP (1 << 5) -+#define USBA_END_OF_RESUME (1 << 6) -+#define USBA_UPSTREAM_RESUME (1 << 7) -+#define USBA_EPT_INT_OFFSET 8 -+#define USBA_EPT_INT_SIZE 16 -+#define USBA_DMA_INT_OFFSET 24 -+#define USBA_DMA_INT_SIZE 8 -+ -+/* Bitfields in EPT_RST */ -+#define USBA_RST_OFFSET 0 -+#define USBA_RST_SIZE 16 -+ -+/* Bitfields in USBA_TST */ -+#define USBA_SPEED_CFG_OFFSET 0 -+#define USBA_SPEED_CFG_SIZE 2 -+#define USBA_TST_J_MODE (1 << 2) -+#define USBA_TST_K_MODE (1 << 3) -+#define USBA_TST_PKT_MODE (1 << 4) -+#define USBA_OPMODE2 (1 << 5) -+ -+/* Bitfields in EPT_CFG */ -+#define USBA_EPT_SIZE_OFFSET 0 -+#define USBA_EPT_SIZE_SIZE 3 -+#define USBA_EPT_DIR_IN (1 << 3) -+#define USBA_EPT_TYPE_OFFSET 4 -+#define USBA_EPT_TYPE_SIZE 2 -+#define USBA_BK_NUMBER_OFFSET 6 -+#define USBA_BK_NUMBER_SIZE 2 -+#define USBA_NB_TRANS_OFFSET 8 -+#define USBA_NB_TRANS_SIZE 2 -+#define USBA_EPT_MAPPED (1 << 31) -+ -+/* Bitfields in EPT_CTL/EPT_CTL_ENB/EPT_CTL_DIS */ -+#define USBA_EPT_ENABLE (1 << 0) -+#define USBA_AUTO_VALID (1 << 1) -+#define USBA_INTDIS_DMA (1 << 3) -+#define USBA_NYET_DIS (1 << 4) -+#define USBA_DATAX_RX (1 << 6) -+#define USBA_MDATA_RX (1 << 7) -+/* Bits 8-15 and 31 enable interrupts for respective bits in EPT_STA */ -+#define USBA_BUSY_BANK_IE (1 << 18) -+ -+/* Bitfields in EPT_SET_STA/EPT_CLR_STA/EPT_STA */ -+#define USBA_FORCE_STALL (1 << 5) -+#define USBA_TOGGLE_CLR (1 << 6) -+#define USBA_TOGGLE_SEQ_OFFSET 6 -+#define USBA_TOGGLE_SEQ_SIZE 2 -+#define USBA_ERR_OVFLW (1 << 8) -+#define USBA_RX_BK_RDY (1 << 9) -+#define USBA_KILL_BANK (1 << 9) -+#define USBA_TX_COMPLETE (1 << 10) -+#define USBA_TX_PK_RDY (1 << 11) -+#define USBA_ISO_ERR_TRANS (1 << 11) -+#define USBA_RX_SETUP (1 << 12) -+#define USBA_ISO_ERR_FLOW (1 << 12) -+#define USBA_STALL_SENT (1 << 13) -+#define USBA_ISO_ERR_CRC (1 << 13) -+#define USBA_ISO_ERR_NBTRANS (1 << 13) -+#define USBA_NAK_IN (1 << 14) -+#define USBA_ISO_ERR_FLUSH (1 << 14) -+#define USBA_NAK_OUT (1 << 15) -+#define USBA_CURRENT_BANK_OFFSET 16 -+#define USBA_CURRENT_BANK_SIZE 2 -+#define USBA_BUSY_BANKS_OFFSET 18 -+#define USBA_BUSY_BANKS_SIZE 2 -+#define USBA_BYTE_COUNT_OFFSET 20 -+#define USBA_BYTE_COUNT_SIZE 11 -+#define USBA_SHORT_PACKET (1 << 31) -+ -+/* Bitfields in DMA_CONTROL */ -+#define USBA_DMA_CH_EN (1 << 0) -+#define USBA_DMA_LINK (1 << 1) -+#define USBA_DMA_END_TR_EN (1 << 2) -+#define USBA_DMA_END_BUF_EN (1 << 3) -+#define USBA_DMA_END_TR_IE (1 << 4) -+#define USBA_DMA_END_BUF_IE (1 << 5) -+#define USBA_DMA_DESC_LOAD_IE (1 << 6) -+#define USBA_DMA_BURST_LOCK (1 << 7) -+#define USBA_DMA_BUF_LEN_OFFSET 16 -+#define USBA_DMA_BUF_LEN_SIZE 16 -+ -+/* Bitfields in DMA_STATUS */ -+#define USBA_DMA_CH_ACTIVE (1 << 1) -+#define USBA_DMA_END_TR_ST (1 << 4) -+#define USBA_DMA_END_BUF_ST (1 << 5) -+#define USBA_DMA_DESC_LOAD_ST (1 << 6) -+ -+/* Constants for SPEED_CFG */ -+#define USBA_SPEED_CFG_NORMAL 0 -+#define USBA_SPEED_CFG_FORCE_HIGH 2 -+#define USBA_SPEED_CFG_FORCE_FULL 3 -+ -+/* Constants for EPT_SIZE */ -+#define USBA_EPT_SIZE_8 0 -+#define USBA_EPT_SIZE_16 1 -+#define USBA_EPT_SIZE_32 2 -+#define USBA_EPT_SIZE_64 3 -+#define USBA_EPT_SIZE_128 4 -+#define USBA_EPT_SIZE_256 5 -+#define USBA_EPT_SIZE_512 6 -+#define USBA_EPT_SIZE_1024 7 -+ -+/* Constants for EPT_TYPE */ -+#define USBA_EPT_TYPE_CONTROL 0 -+#define USBA_EPT_TYPE_ISO 1 -+#define USBA_EPT_TYPE_BULK 2 -+#define USBA_EPT_TYPE_INT 3 -+ -+/* Constants for BK_NUMBER */ -+#define USBA_BK_NUMBER_ZERO 0 -+#define USBA_BK_NUMBER_ONE 1 -+#define USBA_BK_NUMBER_DOUBLE 2 -+#define USBA_BK_NUMBER_TRIPLE 3 -+ -+/* Bit manipulation macros */ -+#define USBA_BF(name, value) \ -+ (((value) & ((1 << USBA_##name##_SIZE) - 1)) \ -+ << USBA_##name##_OFFSET) -+#define USBA_BFEXT(name, value) \ -+ (((value) >> USBA_##name##_OFFSET) \ -+ & ((1 << USBA_##name##_SIZE) - 1)) -+#define USBA_BFINS(name, value, old) \ -+ (((old) & ~(((1 << USBA_##name##_SIZE) - 1) \ -+ << USBA_##name##_OFFSET)) \ -+ | USBA_BF(name, value)) -+ -+/* Register access macros */ -+#define usba_readl(udc, reg) \ -+ __raw_readl((udc)->regs + USBA_##reg) -+#define usba_writel(udc, reg, value) \ -+ __raw_writel((value), (udc)->regs + USBA_##reg) -+#define usba_ep_readl(ep, reg) \ -+ __raw_readl((ep)->ep_regs + USBA_EPT_##reg) -+#define usba_ep_writel(ep, reg, value) \ -+ __raw_writel((value), (ep)->ep_regs + USBA_EPT_##reg) -+#define usba_dma_readl(ep, reg) \ -+ __raw_readl((ep)->dma_regs + USBA_DMA_##reg) -+#define usba_dma_writel(ep, reg, value) \ -+ __raw_writel((value), (ep)->dma_regs + USBA_DMA_##reg) -+ -+/* Calculate base address for a given endpoint or DMA controller */ -+#define USBA_EPT_BASE(x) (0x100 + (x) * 0x20) -+#define USBA_DMA_BASE(x) (0x300 + (x) * 0x10) -+#define USBA_FIFO_BASE(x) ((x) << 16) -+ -+/* Synth parameters */ -+#define USBA_NR_ENDPOINTS 7 -+ -+#define EP0_FIFO_SIZE 64 -+#define EP0_EPT_SIZE USBA_EPT_SIZE_64 -+#define EP0_NR_BANKS 1 -+ -+/* -+ * REVISIT: Try to eliminate this value. Can we rely on req->mapped to -+ * provide this information? -+ */ -+#define DMA_ADDR_INVALID (~(dma_addr_t)0) -+ -+#define FIFO_IOMEM_ID 0 -+#define CTRL_IOMEM_ID 1 -+ -+#ifdef DEBUG -+#define DBG_ERR 0x0001 /* report all error returns */ -+#define DBG_HW 0x0002 /* debug hardware initialization */ -+#define DBG_GADGET 0x0004 /* calls to/from gadget driver */ -+#define DBG_INT 0x0008 /* interrupts */ -+#define DBG_BUS 0x0010 /* report changes in bus state */ -+#define DBG_QUEUE 0x0020 /* debug request queue processing */ -+#define DBG_FIFO 0x0040 /* debug FIFO contents */ -+#define DBG_DMA 0x0080 /* debug DMA handling */ -+#define DBG_REQ 0x0100 /* print out queued request length */ -+#define DBG_ALL 0xffff -+#define DBG_NONE 0x0000 -+ -+#define DEBUG_LEVEL (DBG_ERR) -+#define DBG(level, fmt, ...) \ -+ do { \ -+ if ((level) & DEBUG_LEVEL) \ -+ printk(KERN_DEBUG "udc: " fmt, ## __VA_ARGS__); \ -+ } while (0) -+#else -+#define DBG(level, fmt...) -+#endif -+ -+enum usba_ctrl_state { -+ WAIT_FOR_SETUP, -+ DATA_STAGE_IN, -+ DATA_STAGE_OUT, -+ STATUS_STAGE_IN, -+ STATUS_STAGE_OUT, -+ STATUS_STAGE_ADDR, -+ STATUS_STAGE_TEST, -+}; -+/* -+ EP_STATE_IDLE, -+ EP_STATE_SETUP, -+ EP_STATE_IN_DATA, -+ EP_STATE_OUT_DATA, -+ EP_STATE_SET_ADDR_STATUS, -+ EP_STATE_RX_STATUS, -+ EP_STATE_TX_STATUS, -+ EP_STATE_HALT, -+*/ -+ -+struct usba_dma_desc { -+ dma_addr_t next; -+ dma_addr_t addr; -+ u32 ctrl; -+}; -+ -+struct usba_ep { -+ int state; -+ void __iomem *ep_regs; -+ void __iomem *dma_regs; -+ void __iomem *fifo; -+ struct usb_ep ep; -+ struct usba_udc *udc; -+ -+ struct list_head queue; -+ const struct usb_endpoint_descriptor *desc; -+ -+ u16 fifo_size; -+ u8 nr_banks; -+ u8 index; -+ unsigned int can_dma:1; -+ unsigned int can_isoc:1; -+ unsigned int is_isoc:1; -+ unsigned int is_in:1; -+ -+#ifdef CONFIG_USB_GADGET_DEBUG_FS -+ u32 last_dma_status; -+ struct dentry *debugfs_dir; -+ struct dentry *debugfs_queue; -+ struct dentry *debugfs_dma_status; -+ struct dentry *debugfs_state; -+#endif -+}; -+ -+struct usba_request { -+ struct usb_request req; -+ struct list_head queue; -+ -+ u32 ctrl; -+ -+ unsigned int submitted:1; -+ unsigned int last_transaction:1; -+ unsigned int using_dma:1; -+ unsigned int mapped:1; -+}; -+ -+struct usba_udc { -+ /* Protect hw registers from concurrent modifications */ -+ spinlock_t lock; -+ -+ void __iomem *regs; -+ void __iomem *fifo; -+ -+ struct usb_gadget gadget; -+ struct usb_gadget_driver *driver; -+ struct platform_device *pdev; -+ int irq; -+ int vbus_pin; -+ struct clk *pclk; -+ struct clk *hclk; -+ -+ int test_mode; -+ int vbus_prev; -+ -+#ifdef CONFIG_USB_GADGET_DEBUG_FS -+ struct dentry *debugfs_root; -+ struct dentry *debugfs_regs; -+#endif -+}; -+ -+static inline struct usba_ep *to_usba_ep(struct usb_ep *ep) -+{ -+ return container_of(ep, struct usba_ep, ep); -+} -+ -+static inline struct usba_request *to_usba_req(struct usb_request *req) -+{ -+ return container_of(req, struct usba_request, req); -+} -+ -+static inline struct usba_udc *to_usba_udc(struct usb_gadget *gadget) -+{ -+ return container_of(gadget, struct usba_udc, gadget); -+} -+ -+#define ep_is_control(ep) ((ep)->index == 0) -+#define ep_is_idle(ep) ((ep)->state == EP_STATE_IDLE) -+ -+#endif /* __LINUX_USB_GADGET_USBA_UDC_H */ -diff --git a/drivers/video/atmel_lcdfb.c b/drivers/video/atmel_lcdfb.c -index 235b618..bb361ab 100644 ---- a/drivers/video/atmel_lcdfb.c -+++ b/drivers/video/atmel_lcdfb.c -@@ -37,7 +37,9 @@ - #endif - - #if defined(CONFIG_ARCH_AT91) --#define ATMEL_LCDFB_FBINFO_DEFAULT FBINFO_DEFAULT -+#define ATMEL_LCDFB_FBINFO_DEFAULT (FBINFO_DEFAULT \ -+ | FBINFO_PARTIAL_PAN_OK \ -+ | FBINFO_HWACCEL_YPAN) - - static inline void atmel_lcdfb_update_dma2d(struct atmel_lcdfb_info *sinfo, - struct fb_var_screeninfo *var) -@@ -74,7 +76,7 @@ static struct fb_fix_screeninfo atmel_lcdfb_fix __initdata = { - .type = FB_TYPE_PACKED_PIXELS, - .visual = FB_VISUAL_TRUECOLOR, - .xpanstep = 0, -- .ypanstep = 0, -+ .ypanstep = 1, - .ywrapstep = 0, - .accel = FB_ACCEL_NONE, - }; -diff --git a/drivers/video/backlight/Kconfig b/drivers/video/backlight/Kconfig -index 2580f5f..b6f936a 100644 ---- a/drivers/video/backlight/Kconfig -+++ b/drivers/video/backlight/Kconfig -@@ -24,6 +24,18 @@ config LCD_CLASS_DEVICE - To have support for your specific LCD panel you will have to - select the proper drivers which depend on this option. - -+config LCD_LTV350QV -+ tristate "Samsung LTV350QV LCD Panel" -+ depends on LCD_CLASS_DEVICE && SPI_MASTER -+ default n -+ help -+ If you have a Samsung LTV350QV LCD panel, say y to include a -+ power control driver for it. The panel starts up in power -+ off state, so you need this driver in order to see any -+ output. -+ -+ The LTV350QV panel is present on all ATSTK1000 boards. -+ - # - # Backlight - # -diff --git a/drivers/video/backlight/Makefile b/drivers/video/backlight/Makefile -index c6e2266..965a78b 100644 ---- a/drivers/video/backlight/Makefile -+++ b/drivers/video/backlight/Makefile -@@ -1,6 +1,8 @@ - # Backlight & LCD drivers - - obj-$(CONFIG_LCD_CLASS_DEVICE) += lcd.o -+obj-$(CONFIG_LCD_LTV350QV) += ltv350qv.o -+ - obj-$(CONFIG_BACKLIGHT_CLASS_DEVICE) += backlight.o - obj-$(CONFIG_BACKLIGHT_CORGI) += corgi_bl.o - obj-$(CONFIG_BACKLIGHT_HP680) += hp680_bl.o -diff --git a/drivers/video/backlight/ltv350qv.c b/drivers/video/backlight/ltv350qv.c -new file mode 100644 -index 0000000..751dc53 ---- /dev/null -+++ b/drivers/video/backlight/ltv350qv.c -@@ -0,0 +1,339 @@ -+/* -+ * Power control for Samsung LTV350QV Quarter VGA LCD Panel -+ * -+ * Copyright (C) 2006, 2007 Atmel Corporation -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 as -+ * published by the Free Software Foundation. -+ */ -+#include <linux/delay.h> -+#include <linux/err.h> -+#include <linux/fb.h> -+#include <linux/init.h> -+#include <linux/lcd.h> -+#include <linux/module.h> -+#include <linux/spi/spi.h> -+ -+#include "ltv350qv.h" -+ -+#define POWER_IS_ON(pwr) ((pwr) <= FB_BLANK_NORMAL) -+ -+struct ltv350qv { -+ struct spi_device *spi; -+ u8 *buffer; -+ int power; -+ struct lcd_device *ld; -+}; -+ -+/* -+ * The power-on and power-off sequences are taken from the -+ * LTV350QV-F04 data sheet from Samsung. The register definitions are -+ * taken from the S6F2002 command list also from Samsung. Both -+ * documents are distributed with the AVR32 Linux BSP CD from Atmel. -+ * -+ * There's still some voodoo going on here, but it's a lot better than -+ * in the first incarnation of the driver where all we had was the raw -+ * numbers from the initialization sequence. -+ */ -+static int ltv350qv_write_reg(struct ltv350qv *lcd, u8 reg, u16 val) -+{ -+ struct spi_message msg; -+ struct spi_transfer index_xfer = { -+ .len = 3, -+ .cs_change = 1, -+ }; -+ struct spi_transfer value_xfer = { -+ .len = 3, -+ }; -+ -+ spi_message_init(&msg); -+ -+ /* register index */ -+ lcd->buffer[0] = LTV_OPC_INDEX; -+ lcd->buffer[1] = 0x00; -+ lcd->buffer[2] = reg & 0x7f; -+ index_xfer.tx_buf = lcd->buffer; -+ spi_message_add_tail(&index_xfer, &msg); -+ -+ /* register value */ -+ lcd->buffer[4] = LTV_OPC_DATA; -+ lcd->buffer[5] = val >> 8; -+ lcd->buffer[6] = val; -+ value_xfer.tx_buf = lcd->buffer + 4; -+ spi_message_add_tail(&value_xfer, &msg); -+ -+ return spi_sync(lcd->spi, &msg); -+} -+ -+/* The comments are taken straight from the data sheet */ -+static int ltv350qv_power_on(struct ltv350qv *lcd) -+{ -+ int ret; -+ -+ /* Power On Reset Display off State */ -+ if (ltv350qv_write_reg(lcd, LTV_PWRCTL1, 0x0000)) -+ goto err; -+ msleep(15); -+ -+ /* Power Setting Function 1 */ -+ if (ltv350qv_write_reg(lcd, LTV_PWRCTL1, LTV_VCOM_DISABLE)) -+ goto err; -+ if (ltv350qv_write_reg(lcd, LTV_PWRCTL2, LTV_VCOML_ENABLE)) -+ goto err_power1; -+ -+ /* Power Setting Function 2 */ -+ if (ltv350qv_write_reg(lcd, LTV_PWRCTL1, -+ LTV_VCOM_DISABLE | LTV_DRIVE_CURRENT(5) -+ | LTV_SUPPLY_CURRENT(5))) -+ goto err_power2; -+ -+ msleep(55); -+ -+ /* Instruction Setting */ -+ ret = ltv350qv_write_reg(lcd, LTV_IFCTL, -+ LTV_NMD | LTV_REV | LTV_NL(0x1d)); -+ ret |= ltv350qv_write_reg(lcd, LTV_DATACTL, -+ LTV_DS_SAME | LTV_CHS_480 -+ | LTV_DF_RGB | LTV_RGB_BGR); -+ ret |= ltv350qv_write_reg(lcd, LTV_ENTRY_MODE, -+ LTV_VSPL_ACTIVE_LOW -+ | LTV_HSPL_ACTIVE_LOW -+ | LTV_DPL_SAMPLE_RISING -+ | LTV_EPL_ACTIVE_LOW -+ | LTV_SS_RIGHT_TO_LEFT); -+ ret |= ltv350qv_write_reg(lcd, LTV_GATECTL1, LTV_CLW(3)); -+ ret |= ltv350qv_write_reg(lcd, LTV_GATECTL2, -+ LTV_NW_INV_1LINE | LTV_FWI(3)); -+ ret |= ltv350qv_write_reg(lcd, LTV_VBP, 0x000a); -+ ret |= ltv350qv_write_reg(lcd, LTV_HBP, 0x0021); -+ ret |= ltv350qv_write_reg(lcd, LTV_SOTCTL, LTV_SDT(3) | LTV_EQ(0)); -+ ret |= ltv350qv_write_reg(lcd, LTV_GAMMA(0), 0x0103); -+ ret |= ltv350qv_write_reg(lcd, LTV_GAMMA(1), 0x0301); -+ ret |= ltv350qv_write_reg(lcd, LTV_GAMMA(2), 0x1f0f); -+ ret |= ltv350qv_write_reg(lcd, LTV_GAMMA(3), 0x1f0f); -+ ret |= ltv350qv_write_reg(lcd, LTV_GAMMA(4), 0x0707); -+ ret |= ltv350qv_write_reg(lcd, LTV_GAMMA(5), 0x0307); -+ ret |= ltv350qv_write_reg(lcd, LTV_GAMMA(6), 0x0707); -+ ret |= ltv350qv_write_reg(lcd, LTV_GAMMA(7), 0x0000); -+ ret |= ltv350qv_write_reg(lcd, LTV_GAMMA(8), 0x0004); -+ ret |= ltv350qv_write_reg(lcd, LTV_GAMMA(9), 0x0000); -+ if (ret) -+ goto err_settings; -+ -+ /* Wait more than 2 frames */ -+ msleep(20); -+ -+ /* Display On Sequence */ -+ ret = ltv350qv_write_reg(lcd, LTV_PWRCTL1, -+ LTV_VCOM_DISABLE | LTV_VCOMOUT_ENABLE -+ | LTV_POWER_ON | LTV_DRIVE_CURRENT(5) -+ | LTV_SUPPLY_CURRENT(5)); -+ ret |= ltv350qv_write_reg(lcd, LTV_GATECTL2, -+ LTV_NW_INV_1LINE | LTV_DSC | LTV_FWI(3)); -+ if (ret) -+ goto err_disp_on; -+ -+ /* Display should now be ON. Phew. */ -+ return 0; -+ -+err_disp_on: -+ /* -+ * Try to recover. Error handling probably isn't very useful -+ * at this point, just make a best effort to switch the panel -+ * off. -+ */ -+ ltv350qv_write_reg(lcd, LTV_PWRCTL1, -+ LTV_VCOM_DISABLE | LTV_DRIVE_CURRENT(5) -+ | LTV_SUPPLY_CURRENT(5)); -+ ltv350qv_write_reg(lcd, LTV_GATECTL2, -+ LTV_NW_INV_1LINE | LTV_FWI(3)); -+err_settings: -+err_power2: -+err_power1: -+ ltv350qv_write_reg(lcd, LTV_PWRCTL2, 0x0000); -+ msleep(1); -+err: -+ ltv350qv_write_reg(lcd, LTV_PWRCTL1, LTV_VCOM_DISABLE); -+ return -EIO; -+} -+ -+static int ltv350qv_power_off(struct ltv350qv *lcd) -+{ -+ int ret; -+ -+ /* Display Off Sequence */ -+ ret = ltv350qv_write_reg(lcd, LTV_PWRCTL1, -+ LTV_VCOM_DISABLE -+ | LTV_DRIVE_CURRENT(5) -+ | LTV_SUPPLY_CURRENT(5)); -+ ret |= ltv350qv_write_reg(lcd, LTV_GATECTL2, -+ LTV_NW_INV_1LINE | LTV_FWI(3)); -+ -+ /* Power down setting 1 */ -+ ret |= ltv350qv_write_reg(lcd, LTV_PWRCTL2, 0x0000); -+ -+ /* Wait at least 1 ms */ -+ msleep(1); -+ -+ /* Power down setting 2 */ -+ ret |= ltv350qv_write_reg(lcd, LTV_PWRCTL1, LTV_VCOM_DISABLE); -+ -+ /* -+ * No point in trying to recover here. If we can't switch the -+ * panel off, what are we supposed to do other than inform the -+ * user about the failure? -+ */ -+ if (ret) -+ return -EIO; -+ -+ /* Display power should now be OFF */ -+ return 0; -+} -+ -+static int ltv350qv_power(struct ltv350qv *lcd, int power) -+{ -+ int ret = 0; -+ -+ if (POWER_IS_ON(power) && !POWER_IS_ON(lcd->power)) -+ ret = ltv350qv_power_on(lcd); -+ else if (!POWER_IS_ON(power) && POWER_IS_ON(lcd->power)) -+ ret = ltv350qv_power_off(lcd); -+ -+ if (!ret) -+ lcd->power = power; -+ -+ return ret; -+} -+ -+static int ltv350qv_set_power(struct lcd_device *ld, int power) -+{ -+ struct ltv350qv *lcd; -+ -+ lcd = lcd_get_data(ld); -+ return ltv350qv_power(lcd, power); -+} -+ -+static int ltv350qv_get_power(struct lcd_device *ld) -+{ -+ struct ltv350qv *lcd; -+ -+ lcd = lcd_get_data(ld); -+ return lcd->power; -+} -+ -+static struct lcd_ops ltv_ops = { -+ .get_power = ltv350qv_get_power, -+ .set_power = ltv350qv_set_power, -+}; -+ -+static int __devinit ltv350qv_probe(struct spi_device *spi) -+{ -+ struct ltv350qv *lcd; -+ struct lcd_device *ld; -+ int ret; -+ -+ lcd = kzalloc(sizeof(struct ltv350qv), GFP_KERNEL); -+ if (!lcd) -+ return -ENOMEM; -+ -+ lcd->spi = spi; -+ lcd->power = FB_BLANK_POWERDOWN; -+ lcd->buffer = kzalloc(8, GFP_KERNEL); -+ -+ ld = lcd_device_register("ltv350qv", &spi->dev, lcd, <v_ops); -+ if (IS_ERR(ld)) { -+ ret = PTR_ERR(ld); -+ goto out_free_lcd; -+ } -+ lcd->ld = ld; -+ -+ ret = ltv350qv_power(lcd, FB_BLANK_UNBLANK); -+ if (ret) -+ goto out_unregister; -+ -+ dev_set_drvdata(&spi->dev, lcd); -+ -+ return 0; -+ -+out_unregister: -+ lcd_device_unregister(ld); -+out_free_lcd: -+ kfree(lcd); -+ return ret; -+} -+ -+static int __devexit ltv350qv_remove(struct spi_device *spi) -+{ -+ struct ltv350qv *lcd = dev_get_drvdata(&spi->dev); -+ -+ ltv350qv_power(lcd, FB_BLANK_POWERDOWN); -+ lcd_device_unregister(lcd->ld); -+ kfree(lcd); -+ -+ return 0; -+} -+ -+#ifdef CONFIG_PM -+static int ltv350qv_suspend(struct spi_device *spi, -+ pm_message_t state, u32 level) -+{ -+ struct ltv350qv *lcd = dev_get_drvdata(&spi->dev); -+ -+ if (level == SUSPEND_POWER_DOWN) -+ return ltv350qv_power(lcd, FB_BLANK_POWERDOWN); -+ -+ return 0; -+} -+ -+static int ltv350qv_resume(struct spi_device *spi, u32 level) -+{ -+ struct ltv350qv *lcd = dev_get_drvdata(&spi->dev); -+ -+ if (level == RESUME_POWER_ON) -+ return ltv350qv_power(lcd, FB_BLANK_UNBLANK); -+ -+ return 0; -+} -+#else -+#define ltv350qv_suspend NULL -+#define ltv350qv_resume NULL -+#endif -+ -+/* Power down all displays on reboot, poweroff or halt */ -+static void ltv350qv_shutdown(struct spi_device *spi) -+{ -+ struct ltv350qv *lcd = dev_get_drvdata(&spi->dev); -+ -+ ltv350qv_power(lcd, FB_BLANK_POWERDOWN); -+} -+ -+static struct spi_driver ltv350qv_driver = { -+ .driver = { -+ .name = "ltv350qv", -+ .bus = &spi_bus_type, -+ .owner = THIS_MODULE, -+ }, -+ -+ .probe = ltv350qv_probe, -+ .remove = __devexit_p(ltv350qv_remove), -+ .shutdown = ltv350qv_shutdown, -+ .suspend = ltv350qv_suspend, -+ .resume = ltv350qv_resume, -+}; -+ -+static int __init ltv350qv_init(void) -+{ -+ return spi_register_driver(<v350qv_driver); -+} -+ -+static void __exit ltv350qv_exit(void) -+{ -+ spi_unregister_driver(<v350qv_driver); -+} -+module_init(ltv350qv_init); -+module_exit(ltv350qv_exit); -+ -+MODULE_AUTHOR("Haavard Skinnemoen <hskinnemoen@atmel.com>"); -+MODULE_DESCRIPTION("Samsung LTV350QV LCD Driver"); -+MODULE_LICENSE("GPL"); -diff --git a/drivers/video/backlight/ltv350qv.h b/drivers/video/backlight/ltv350qv.h -new file mode 100644 -index 0000000..189112e ---- /dev/null -+++ b/drivers/video/backlight/ltv350qv.h -@@ -0,0 +1,95 @@ -+/* -+ * Register definitions for Samsung LTV350QV Quarter VGA LCD Panel -+ * -+ * Copyright (C) 2006, 2007 Atmel Corporation -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 as -+ * published by the Free Software Foundation. -+ */ -+#ifndef __LTV350QV_H -+#define __LTV350QV_H -+ -+#define LTV_OPC_INDEX 0x74 -+#define LTV_OPC_DATA 0x76 -+ -+#define LTV_ID 0x00 /* ID Read */ -+#define LTV_IFCTL 0x01 /* Display Interface Control */ -+#define LTV_DATACTL 0x02 /* Display Data Control */ -+#define LTV_ENTRY_MODE 0x03 /* Entry Mode */ -+#define LTV_GATECTL1 0x04 /* Gate Control 1 */ -+#define LTV_GATECTL2 0x05 /* Gate Control 2 */ -+#define LTV_VBP 0x06 /* Vertical Back Porch */ -+#define LTV_HBP 0x07 /* Horizontal Back Porch */ -+#define LTV_SOTCTL 0x08 /* Source Output Timing Control */ -+#define LTV_PWRCTL1 0x09 /* Power Control 1 */ -+#define LTV_PWRCTL2 0x0a /* Power Control 2 */ -+#define LTV_GAMMA(x) (0x10 + (x)) /* Gamma control */ -+ -+/* Bit definitions for LTV_IFCTL */ -+#define LTV_IM (1 << 15) -+#define LTV_NMD (1 << 14) -+#define LTV_SSMD (1 << 13) -+#define LTV_REV (1 << 7) -+#define LTV_NL(x) (((x) & 0x001f) << 0) -+ -+/* Bit definitions for LTV_DATACTL */ -+#define LTV_DS_SAME (0 << 12) -+#define LTV_DS_D_TO_S (1 << 12) -+#define LTV_DS_S_TO_D (2 << 12) -+#define LTV_CHS_384 (0 << 9) -+#define LTV_CHS_480 (1 << 9) -+#define LTV_CHS_492 (2 << 9) -+#define LTV_DF_RGB (0 << 6) -+#define LTV_DF_RGBX (1 << 6) -+#define LTV_DF_XRGB (2 << 6) -+#define LTV_RGB_RGB (0 << 2) -+#define LTV_RGB_BGR (1 << 2) -+#define LTV_RGB_GRB (2 << 2) -+#define LTV_RGB_RBG (3 << 2) -+ -+/* Bit definitions for LTV_ENTRY_MODE */ -+#define LTV_VSPL_ACTIVE_LOW (0 << 15) -+#define LTV_VSPL_ACTIVE_HIGH (1 << 15) -+#define LTV_HSPL_ACTIVE_LOW (0 << 14) -+#define LTV_HSPL_ACTIVE_HIGH (1 << 14) -+#define LTV_DPL_SAMPLE_RISING (0 << 13) -+#define LTV_DPL_SAMPLE_FALLING (1 << 13) -+#define LTV_EPL_ACTIVE_LOW (0 << 12) -+#define LTV_EPL_ACTIVE_HIGH (1 << 12) -+#define LTV_SS_LEFT_TO_RIGHT (0 << 8) -+#define LTV_SS_RIGHT_TO_LEFT (1 << 8) -+#define LTV_STB (1 << 1) -+ -+/* Bit definitions for LTV_GATECTL1 */ -+#define LTV_CLW(x) (((x) & 0x0007) << 12) -+#define LTV_GAON (1 << 5) -+#define LTV_SDR (1 << 3) -+ -+/* Bit definitions for LTV_GATECTL2 */ -+#define LTV_NW_INV_FRAME (0 << 14) -+#define LTV_NW_INV_1LINE (1 << 14) -+#define LTV_NW_INV_2LINE (2 << 14) -+#define LTV_DSC (1 << 12) -+#define LTV_GIF (1 << 8) -+#define LTV_FHN (1 << 7) -+#define LTV_FTI(x) (((x) & 0x0003) << 4) -+#define LTV_FWI(x) (((x) & 0x0003) << 0) -+ -+/* Bit definitions for LTV_SOTCTL */ -+#define LTV_SDT(x) (((x) & 0x0007) << 10) -+#define LTV_EQ(x) (((x) & 0x0007) << 2) -+ -+/* Bit definitions for LTV_PWRCTL1 */ -+#define LTV_VCOM_DISABLE (1 << 14) -+#define LTV_VCOMOUT_ENABLE (1 << 11) -+#define LTV_POWER_ON (1 << 9) -+#define LTV_DRIVE_CURRENT(x) (((x) & 0x0007) << 4) /* 0=off, 5=max */ -+#define LTV_SUPPLY_CURRENT(x) (((x) & 0x0007) << 0) /* 0=off, 5=max */ -+ -+/* Bit definitions for LTV_PWRCTL2 */ -+#define LTV_VCOML_ENABLE (1 << 13) -+#define LTV_VCOML_VOLTAGE(x) (((x) & 0x001f) << 8) /* 0=1V, 31=-1V */ -+#define LTV_VCOMH_VOLTAGE(x) (((x) & 0x001f) << 0) /* 0=3V, 31=4.5V */ -+ -+#endif /* __LTV350QV_H */ -diff --git a/include/asm-avr32/arch-at32ap/at32ap7000.h b/include/asm-avr32/arch-at32ap/at32ap7000.h -deleted file mode 100644 -index 3914d7b..0000000 ---- a/include/asm-avr32/arch-at32ap/at32ap7000.h -+++ /dev/null -@@ -1,35 +0,0 @@ --/* -- * Pin definitions for AT32AP7000. -- * -- * Copyright (C) 2006 Atmel Corporation -- * -- * This program is free software; you can redistribute it and/or modify -- * it under the terms of the GNU General Public License version 2 as -- * published by the Free Software Foundation. -- */ --#ifndef __ASM_ARCH_AT32AP7000_H__ --#define __ASM_ARCH_AT32AP7000_H__ -- --#define GPIO_PERIPH_A 0 --#define GPIO_PERIPH_B 1 -- --#define NR_GPIO_CONTROLLERS 4 -- --/* -- * Pin numbers identifying specific GPIO pins on the chip. They can -- * also be converted to IRQ numbers by passing them through -- * gpio_to_irq(). -- */ --#define GPIO_PIOA_BASE (0) --#define GPIO_PIOB_BASE (GPIO_PIOA_BASE + 32) --#define GPIO_PIOC_BASE (GPIO_PIOB_BASE + 32) --#define GPIO_PIOD_BASE (GPIO_PIOC_BASE + 32) --#define GPIO_PIOE_BASE (GPIO_PIOD_BASE + 32) -- --#define GPIO_PIN_PA(N) (GPIO_PIOA_BASE + (N)) --#define GPIO_PIN_PB(N) (GPIO_PIOB_BASE + (N)) --#define GPIO_PIN_PC(N) (GPIO_PIOC_BASE + (N)) --#define GPIO_PIN_PD(N) (GPIO_PIOD_BASE + (N)) --#define GPIO_PIN_PE(N) (GPIO_PIOE_BASE + (N)) -- --#endif /* __ASM_ARCH_AT32AP7000_H__ */ -diff --git a/include/asm-avr32/arch-at32ap/at32ap700x.h b/include/asm-avr32/arch-at32ap/at32ap700x.h -new file mode 100644 -index 0000000..99684d6 ---- /dev/null -+++ b/include/asm-avr32/arch-at32ap/at32ap700x.h -@@ -0,0 +1,35 @@ -+/* -+ * Pin definitions for AT32AP7000. -+ * -+ * Copyright (C) 2006 Atmel Corporation -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 as -+ * published by the Free Software Foundation. -+ */ -+#ifndef __ASM_ARCH_AT32AP700X_H__ -+#define __ASM_ARCH_AT32AP700X_H__ -+ -+#define GPIO_PERIPH_A 0 -+#define GPIO_PERIPH_B 1 -+ -+#define NR_GPIO_CONTROLLERS 4 -+ -+/* -+ * Pin numbers identifying specific GPIO pins on the chip. They can -+ * also be converted to IRQ numbers by passing them through -+ * gpio_to_irq(). -+ */ -+#define GPIO_PIOA_BASE (0) -+#define GPIO_PIOB_BASE (GPIO_PIOA_BASE + 32) -+#define GPIO_PIOC_BASE (GPIO_PIOB_BASE + 32) -+#define GPIO_PIOD_BASE (GPIO_PIOC_BASE + 32) -+#define GPIO_PIOE_BASE (GPIO_PIOD_BASE + 32) -+ -+#define GPIO_PIN_PA(N) (GPIO_PIOA_BASE + (N)) -+#define GPIO_PIN_PB(N) (GPIO_PIOB_BASE + (N)) -+#define GPIO_PIN_PC(N) (GPIO_PIOC_BASE + (N)) -+#define GPIO_PIN_PD(N) (GPIO_PIOD_BASE + (N)) -+#define GPIO_PIN_PE(N) (GPIO_PIOE_BASE + (N)) -+ -+#endif /* __ASM_ARCH_AT32AP700X_H__ */ -diff --git a/include/asm-avr32/arch-at32ap/board.h b/include/asm-avr32/arch-at32ap/board.h -index 0215965..7aa1c29 100644 ---- a/include/asm-avr32/arch-at32ap/board.h -+++ b/include/asm-avr32/arch-at32ap/board.h -@@ -6,6 +6,8 @@ - - #include <linux/types.h> - -+#define GPIO_PIN_NONE (-1) -+ - /* Add basic devices: system manager, interrupt controller, portmuxes, etc. */ - void at32_add_system_devices(void); - -@@ -31,11 +33,26 @@ struct spi_board_info; - struct platform_device * - at32_add_device_spi(unsigned int id, struct spi_board_info *b, unsigned int n); - -+struct platform_device *at32_add_device_twi(unsigned int id); -+ - struct atmel_lcdfb_info; - struct platform_device * - at32_add_device_lcdc(unsigned int id, struct atmel_lcdfb_info *data, - unsigned long fbmem_start, unsigned long fbmem_len); - -+struct usba_platform_data { -+ int vbus_pin; -+}; -+struct platform_device * -+at32_add_device_usba(unsigned int id, struct usba_platform_data *data); -+ -+struct ide_platform_data { -+ u8 cs; -+}; -+struct platform_device * -+at32_add_device_ide(unsigned int id, unsigned int extint, -+ struct ide_platform_data *data); -+ - /* depending on what's hooked up, not all SSC pins will be used */ - #define ATMEL_SSC_TK 0x01 - #define ATMEL_SSC_TF 0x02 -@@ -50,4 +67,26 @@ at32_add_device_lcdc(unsigned int id, struct atmel_lcdfb_info *data, - struct platform_device * - at32_add_device_ssc(unsigned int id, unsigned int flags); - -+struct platform_device *at32_add_device_twi(unsigned int id); -+ -+struct mci_platform_data { -+ int detect_pin; -+ int wp_pin; -+}; -+struct platform_device * -+at32_add_device_mci(unsigned int id, struct mci_platform_data *data); -+struct platform_device *at32_add_device_ac97c(unsigned int id); -+struct platform_device *at32_add_device_abdac(unsigned int id); -+ -+struct cf_platform_data { -+ int detect_pin; -+ int reset_pin; -+ int vcc_pin; -+ int ready_pin; -+ u8 cs; -+}; -+struct platform_device * -+at32_add_device_cf(unsigned int id, unsigned int extint, -+ struct cf_platform_data *data); -+ - #endif /* __ASM_ARCH_BOARD_H */ -diff --git a/include/asm-avr32/arch-at32ap/cpu.h b/include/asm-avr32/arch-at32ap/cpu.h -index a762f42..0dc2026 100644 ---- a/include/asm-avr32/arch-at32ap/cpu.h -+++ b/include/asm-avr32/arch-at32ap/cpu.h -@@ -14,7 +14,7 @@ - * Only AT32AP7000 is defined for now. We can identify the specific - * chip at runtime, but I'm not sure if it's really worth it. - */ --#ifdef CONFIG_CPU_AT32AP7000 -+#ifdef CONFIG_CPU_AT32AP700X - # define cpu_is_at32ap7000() (1) - #else - # define cpu_is_at32ap7000() (0) -diff --git a/include/asm-avr32/arch-at32ap/io.h b/include/asm-avr32/arch-at32ap/io.h -index ee59e40..4ec6abc 100644 ---- a/include/asm-avr32/arch-at32ap/io.h -+++ b/include/asm-avr32/arch-at32ap/io.h -@@ -4,7 +4,7 @@ - /* For "bizarre" halfword swapping */ - #include <linux/byteorder/swabb.h> - --#if defined(CONFIG_AP7000_32_BIT_SMC) -+#if defined(CONFIG_AP700X_32_BIT_SMC) - # define __swizzle_addr_b(addr) (addr ^ 3UL) - # define __swizzle_addr_w(addr) (addr ^ 2UL) - # define __swizzle_addr_l(addr) (addr) -@@ -14,7 +14,7 @@ - # define __mem_ioswabb(a, x) (x) - # define __mem_ioswabw(a, x) swab16(x) - # define __mem_ioswabl(a, x) swab32(x) --#elif defined(CONFIG_AP7000_16_BIT_SMC) -+#elif defined(CONFIG_AP700X_16_BIT_SMC) - # define __swizzle_addr_b(addr) (addr ^ 1UL) - # define __swizzle_addr_w(addr) (addr) - # define __swizzle_addr_l(addr) (addr) -diff --git a/include/asm-avr32/arch-at32ap/portmux.h b/include/asm-avr32/arch-at32ap/portmux.h -index 9930871..135e034 100644 ---- a/include/asm-avr32/arch-at32ap/portmux.h -+++ b/include/asm-avr32/arch-at32ap/portmux.h -@@ -19,10 +19,23 @@ - #define AT32_GPIOF_OUTPUT 0x00000002 /* (OUT) Enable output driver */ - #define AT32_GPIOF_HIGH 0x00000004 /* (OUT) Set output high */ - #define AT32_GPIOF_DEGLITCH 0x00000008 /* (IN) Filter glitches */ -+#define AT32_GPIOF_MULTIDRV 0x00000010 /* Enable multidriver option */ - - void at32_select_periph(unsigned int pin, unsigned int periph, - unsigned long flags); - void at32_select_gpio(unsigned int pin, unsigned long flags); - void at32_reserve_pin(unsigned int pin); - -+#ifdef CONFIG_GPIO_DEV -+ -+/* Gang allocators and accessors; used by the GPIO /dev driver */ -+int at32_gpio_port_is_valid(unsigned int port); -+int at32_select_gpio_pins(unsigned int port, u32 pins, u32 oe_mask); -+void at32_deselect_pins(unsigned int port, u32 pins); -+ -+u32 at32_gpio_get_value_multiple(unsigned int port, u32 pins); -+void at32_gpio_set_value_multiple(unsigned int port, u32 value, u32 mask); -+ -+#endif /* CONFIG_GPIO_DEV */ -+ - #endif /* __ASM_ARCH_PORTMUX_H__ */ -diff --git a/include/asm-avr32/arch-at32ap/smc.h b/include/asm-avr32/arch-at32ap/smc.h -index 07152b7..c98eea4 100644 ---- a/include/asm-avr32/arch-at32ap/smc.h -+++ b/include/asm-avr32/arch-at32ap/smc.h -@@ -15,22 +15,50 @@ - /* - * All timing parameters are in nanoseconds. - */ -+struct smc_timing { -+ /* Delay from address valid to assertion of given strobe */ -+ int ncs_read_setup; -+ int nrd_setup; -+ int ncs_write_setup; -+ int nwe_setup; -+ -+ /* Pulse length of given strobe */ -+ int ncs_read_pulse; -+ int nrd_pulse; -+ int ncs_write_pulse; -+ int nwe_pulse; -+ -+ /* Total cycle length of given operation */ -+ int read_cycle; -+ int write_cycle; -+ -+ /* Minimal recovery times, will extend cycle if needed */ -+ int ncs_read_recover; -+ int nrd_recover; -+ int ncs_write_recover; -+ int nwe_recover; -+}; -+ -+/* -+ * All timing parameters are in clock cycles. -+ */ - struct smc_config { -+ - /* Delay from address valid to assertion of given strobe */ -- u16 ncs_read_setup; -- u16 nrd_setup; -- u16 ncs_write_setup; -- u16 nwe_setup; -+ u8 ncs_read_setup; -+ u8 nrd_setup; -+ u8 ncs_write_setup; -+ u8 nwe_setup; - - /* Pulse length of given strobe */ -- u16 ncs_read_pulse; -- u16 nrd_pulse; -- u16 ncs_write_pulse; -- u16 nwe_pulse; -+ u8 ncs_read_pulse; -+ u8 nrd_pulse; -+ u8 ncs_write_pulse; -+ u8 nwe_pulse; - - /* Total cycle length of given operation */ -- u16 read_cycle; -- u16 write_cycle; -+ u8 read_cycle; -+ u8 write_cycle; - - /* Bus width in bytes */ - u8 bus_width; -@@ -76,6 +104,9 @@ struct smc_config { - unsigned int tdf_mode:1; - }; - -+extern void smc_set_timing(struct smc_config *config, -+ const struct smc_timing *timing); -+ - extern int smc_set_configuration(int cs, const struct smc_config *config); - extern struct smc_config *smc_get_configuration(int cs); - -diff --git a/include/asm-avr32/dma-controller.h b/include/asm-avr32/dma-controller.h -new file mode 100644 -index 0000000..56a4965 ---- /dev/null -+++ b/include/asm-avr32/dma-controller.h -@@ -0,0 +1,166 @@ -+/* -+ * Copyright (C) 2005-2006 Atmel Corporation -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 as -+ * published by the Free Software Foundation. -+ */ -+#ifndef __ASM_AVR32_DMA_CONTROLLER_H -+#define __ASM_AVR32_DMA_CONTROLLER_H -+ -+#include <linux/device.h> -+ -+#define DMA_DIR_MEM_TO_MEM 0x0000 -+#define DMA_DIR_MEM_TO_PERIPH 0x0001 -+#define DMA_DIR_PERIPH_TO_MEM 0x0002 -+#define DMA_DIR_PERIPH_TO_PERIPH 0x0003 -+ -+#define DMA_WIDTH_8BIT 0 -+#define DMA_WIDTH_16BIT 1 -+#define DMA_WIDTH_32BIT 2 -+ -+struct dma_request { -+ struct dma_controller *dmac; -+ struct list_head list; -+ -+ unsigned short channel; -+ -+ void (*xfer_complete)(struct dma_request *req); -+ void (*block_complete)(struct dma_request *req); -+ void (*error)(struct dma_request *req); -+}; -+ -+struct dma_request_sg { -+ struct dma_request req; -+ -+ int nr_sg; -+ struct scatterlist *sg; -+ unsigned long block_size; -+ unsigned int nr_blocks; -+ -+ dma_addr_t data_reg; -+ unsigned short periph_id; -+ -+ unsigned char direction; -+ unsigned char width; -+}; -+#define to_dma_request_sg(_req) \ -+ container_of(_req, struct dma_request_sg, req) -+ -+struct dma_request_cyclic { -+ struct dma_request req; -+ -+ int periods; -+ unsigned long buffer_size; -+ -+ dma_addr_t buffer_start; -+ dma_addr_t data_reg; -+ -+ unsigned short periph_id; -+ unsigned char direction; -+ unsigned char width; -+ -+ void *dev_id; -+}; -+#define to_dma_request_cyclic(_req) \ -+ container_of(_req, struct dma_request_cyclic, req) -+ -+struct dma_request_memcpy { -+ struct dma_request req; -+ -+ dma_addr_t src_addr; -+ unsigned int src_width; -+ unsigned int src_stride; -+ -+ dma_addr_t dst_addr; -+ unsigned int dst_width; -+ unsigned int dst_stride; -+ -+ size_t length; -+ -+ unsigned short src_reverse:1; -+ unsigned short dst_reverse:1; -+}; -+#define to_dma_request_memcpy(_req) \ -+ container_of(_req, struct dma_request_memcpy, req) -+ -+struct dma_controller { -+ struct list_head list; -+ int id; -+ struct device *dev; -+ -+ int (*alloc_channel)(struct dma_controller *dmac); -+ void (*release_channel)(struct dma_controller *dmac, -+ int channel); -+ int (*prepare_request_sg)(struct dma_controller *dmac, -+ struct dma_request_sg *req); -+ int (*prepare_request_cyclic)(struct dma_controller *dmac, -+ struct dma_request_cyclic *req); -+ int (*prepare_request_memcpy)(struct dma_controller *dmac, -+ struct dma_request_memcpy *req); -+ int (*start_request)(struct dma_controller *dmac, -+ unsigned int channel); -+ int (*stop_request)(struct dma_controller *dmac, -+ unsigned int channel); -+ dma_addr_t (*get_current_pos)(struct dma_controller *dmac, -+ unsigned int channel); -+}; -+ -+static inline int -+dma_alloc_channel(struct dma_controller *dmac) -+{ -+ return dmac->alloc_channel(dmac); -+} -+ -+static inline void -+dma_release_channel(struct dma_controller *dmac, int chan) -+{ -+ dmac->release_channel(dmac, chan); -+} -+ -+static inline int -+dma_prepare_request_sg(struct dma_controller *dmac, -+ struct dma_request_sg *req) -+{ -+ return dmac->prepare_request_sg(dmac, req); -+} -+ -+static inline int -+dma_prepare_request_cyclic(struct dma_controller *dmac, -+ struct dma_request_cyclic *req) -+{ -+ return dmac->prepare_request_cyclic(dmac, req); -+} -+ -+static inline int -+dma_prepare_request_memcpy(struct dma_controller *dmac, -+ struct dma_request_memcpy *req) -+{ -+ return dmac->prepare_request_memcpy(dmac, req); -+} -+ -+static inline int -+dma_start_request(struct dma_controller *dmac, -+ unsigned int channel) -+{ -+ return dmac->start_request(dmac, channel); -+} -+ -+static inline int -+dma_stop_request(struct dma_controller *dmac, -+ unsigned int channel) -+{ -+ return dmac->stop_request(dmac, channel); -+} -+ -+static inline dma_addr_t -+dma_get_current_pos(struct dma_controller *dmac, -+ unsigned int channel) -+{ -+ return dmac->get_current_pos(dmac, channel); -+} -+ -+extern int register_dma_controller(struct dma_controller *dmac); -+extern struct dma_controller *find_dma_controller(int id); -+ -+#endif /* __ASM_AVR32_DMA_CONTROLLER_H */ -diff --git a/include/asm-avr32/dma-mapping.h b/include/asm-avr32/dma-mapping.h -index 21bb60b..81e3426 100644 ---- a/include/asm-avr32/dma-mapping.h -+++ b/include/asm-avr32/dma-mapping.h -@@ -264,7 +264,11 @@ static inline void - dma_sync_single_for_cpu(struct device *dev, dma_addr_t dma_handle, - size_t size, enum dma_data_direction direction) - { -- dma_cache_sync(dev, bus_to_virt(dma_handle), size, direction); -+ /* -+ * No need to do anything since the CPU isn't supposed to -+ * touch this memory after we flushed it at mapping- or -+ * sync-for-device time. -+ */ - } - - static inline void -@@ -309,12 +313,11 @@ static inline void - dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg, - int nents, enum dma_data_direction direction) - { -- int i; -- -- for (i = 0; i < nents; i++) { -- dma_cache_sync(dev, page_address(sg[i].page) + sg[i].offset, -- sg[i].length, direction); -- } -+ /* -+ * No need to do anything since the CPU isn't supposed to -+ * touch this memory after we flushed it at mapping- or -+ * sync-for-device time. -+ */ - } - - static inline void -diff --git a/include/asm-avr32/system.h b/include/asm-avr32/system.h -index a8236ba..dc2d527 100644 ---- a/include/asm-avr32/system.h -+++ b/include/asm-avr32/system.h -@@ -73,11 +73,16 @@ extern struct task_struct *__switch_to(struct task_struct *, - - extern void __xchg_called_with_bad_pointer(void); - --#ifdef __CHECKER__ --extern unsigned long __builtin_xchg(void *ptr, unsigned long x); --#endif -+static inline unsigned long xchg_u32(u32 val, volatile u32 *m) -+{ -+ u32 ret; - --#define xchg_u32(val, m) __builtin_xchg((void *)m, val) -+ asm volatile("xchg %[ret], %[m], %[val]" -+ : [ret] "=&r"(ret), "=m"(*m) -+ : "m"(*m), [m] "r"(m), [val] "r"(val) -+ : "memory"); -+ return ret; -+} - - static inline unsigned long __xchg(unsigned long x, - volatile void *ptr, -diff --git a/include/asm-avr32/unistd.h b/include/asm-avr32/unistd.h -index 3b4e35b..de09009 100644 ---- a/include/asm-avr32/unistd.h -+++ b/include/asm-avr32/unistd.h -@@ -303,6 +303,19 @@ - #ifdef __KERNEL__ - #define NR_syscalls 282 - -+/* Old stuff */ -+#define __IGNORE_uselib -+#define __IGNORE_mmap -+ -+/* NUMA stuff */ -+#define __IGNORE_mbind -+#define __IGNORE_get_mempolicy -+#define __IGNORE_set_mempolicy -+#define __IGNORE_migrate_pages -+#define __IGNORE_move_pages -+ -+/* SMP stuff */ -+#define __IGNORE_getcpu - - #define __ARCH_WANT_IPC_PARSE_VERSION - #define __ARCH_WANT_STAT64 -diff --git a/include/linux/atmel-ssc.h b/include/linux/atmel-ssc.h -new file mode 100644 -index 0000000..0602339 ---- /dev/null -+++ b/include/linux/atmel-ssc.h -@@ -0,0 +1,312 @@ -+#ifndef __INCLUDE_ATMEL_SSC_H -+#define __INCLUDE_ATMEL_SSC_H -+ -+#include <linux/platform_device.h> -+#include <linux/list.h> -+ -+struct ssc_device { -+ struct list_head list; -+ void __iomem *regs; -+ struct platform_device *pdev; -+ struct clk *clk; -+ int user; -+ int irq; -+}; -+ -+struct ssc_device * __must_check ssc_request(unsigned int ssc_num); -+void ssc_free(struct ssc_device *ssc); -+ -+/* SSC register offsets */ -+ -+/* SSC Control Register */ -+#define SSC_CR 0x00000000 -+#define SSC_CR_RXDIS_SIZE 1 -+#define SSC_CR_RXDIS_OFFSET 1 -+#define SSC_CR_RXEN_SIZE 1 -+#define SSC_CR_RXEN_OFFSET 0 -+#define SSC_CR_SWRST_SIZE 1 -+#define SSC_CR_SWRST_OFFSET 15 -+#define SSC_CR_TXDIS_SIZE 1 -+#define SSC_CR_TXDIS_OFFSET 9 -+#define SSC_CR_TXEN_SIZE 1 -+#define SSC_CR_TXEN_OFFSET 8 -+ -+/* SSC Clock Mode Register */ -+#define SSC_CMR 0x00000004 -+#define SSC_CMR_DIV_SIZE 12 -+#define SSC_CMR_DIV_OFFSET 0 -+ -+/* SSC Receive Clock Mode Register */ -+#define SSC_RCMR 0x00000010 -+#define SSC_RCMR_CKG_SIZE 2 -+#define SSC_RCMR_CKG_OFFSET 6 -+#define SSC_RCMR_CKI_SIZE 1 -+#define SSC_RCMR_CKI_OFFSET 5 -+#define SSC_RCMR_CKO_SIZE 3 -+#define SSC_RCMR_CKO_OFFSET 2 -+#define SSC_RCMR_CKS_SIZE 2 -+#define SSC_RCMR_CKS_OFFSET 0 -+#define SSC_RCMR_PERIOD_SIZE 8 -+#define SSC_RCMR_PERIOD_OFFSET 24 -+#define SSC_RCMR_START_SIZE 4 -+#define SSC_RCMR_START_OFFSET 8 -+#define SSC_RCMR_STOP_SIZE 1 -+#define SSC_RCMR_STOP_OFFSET 12 -+#define SSC_RCMR_STTDLY_SIZE 8 -+#define SSC_RCMR_STTDLY_OFFSET 16 -+ -+/* SSC Receive Frame Mode Register */ -+#define SSC_RFMR 0x00000014 -+#define SSC_RFMR_DATLEN_SIZE 5 -+#define SSC_RFMR_DATLEN_OFFSET 0 -+#define SSC_RFMR_DATNB_SIZE 4 -+#define SSC_RFMR_DATNB_OFFSET 8 -+#define SSC_RFMR_FSEDGE_SIZE 1 -+#define SSC_RFMR_FSEDGE_OFFSET 24 -+#define SSC_RFMR_FSLEN_SIZE 4 -+#define SSC_RFMR_FSLEN_OFFSET 16 -+#define SSC_RFMR_FSOS_SIZE 4 -+#define SSC_RFMR_FSOS_OFFSET 20 -+#define SSC_RFMR_LOOP_SIZE 1 -+#define SSC_RFMR_LOOP_OFFSET 5 -+#define SSC_RFMR_MSBF_SIZE 1 -+#define SSC_RFMR_MSBF_OFFSET 7 -+ -+/* SSC Transmit Clock Mode Register */ -+#define SSC_TCMR 0x00000018 -+#define SSC_TCMR_CKG_SIZE 2 -+#define SSC_TCMR_CKG_OFFSET 6 -+#define SSC_TCMR_CKI_SIZE 1 -+#define SSC_TCMR_CKI_OFFSET 5 -+#define SSC_TCMR_CKO_SIZE 3 -+#define SSC_TCMR_CKO_OFFSET 2 -+#define SSC_TCMR_CKS_SIZE 2 -+#define SSC_TCMR_CKS_OFFSET 0 -+#define SSC_TCMR_PERIOD_SIZE 8 -+#define SSC_TCMR_PERIOD_OFFSET 24 -+#define SSC_TCMR_START_SIZE 4 -+#define SSC_TCMR_START_OFFSET 8 -+#define SSC_TCMR_STTDLY_SIZE 8 -+#define SSC_TCMR_STTDLY_OFFSET 16 -+ -+/* SSC Transmit Frame Mode Register */ -+#define SSC_TFMR 0x0000001c -+#define SSC_TFMR_DATDEF_SIZE 1 -+#define SSC_TFMR_DATDEF_OFFSET 5 -+#define SSC_TFMR_DATLEN_SIZE 5 -+#define SSC_TFMR_DATLEN_OFFSET 0 -+#define SSC_TFMR_DATNB_SIZE 4 -+#define SSC_TFMR_DATNB_OFFSET 8 -+#define SSC_TFMR_FSDEN_SIZE 1 -+#define SSC_TFMR_FSDEN_OFFSET 23 -+#define SSC_TFMR_FSEDGE_SIZE 1 -+#define SSC_TFMR_FSEDGE_OFFSET 24 -+#define SSC_TFMR_FSLEN_SIZE 4 -+#define SSC_TFMR_FSLEN_OFFSET 16 -+#define SSC_TFMR_FSOS_SIZE 3 -+#define SSC_TFMR_FSOS_OFFSET 20 -+#define SSC_TFMR_MSBF_SIZE 1 -+#define SSC_TFMR_MSBF_OFFSET 7 -+ -+/* SSC Receive Hold Register */ -+#define SSC_RHR 0x00000020 -+#define SSC_RHR_RDAT_SIZE 32 -+#define SSC_RHR_RDAT_OFFSET 0 -+ -+/* SSC Transmit Hold Register */ -+#define SSC_THR 0x00000024 -+#define SSC_THR_TDAT_SIZE 32 -+#define SSC_THR_TDAT_OFFSET 0 -+ -+/* SSC Receive Sync. Holding Register */ -+#define SSC_RSHR 0x00000030 -+#define SSC_RSHR_RSDAT_SIZE 16 -+#define SSC_RSHR_RSDAT_OFFSET 0 -+ -+/* SSC Transmit Sync. Holding Register */ -+#define SSC_TSHR 0x00000034 -+#define SSC_TSHR_TSDAT_SIZE 16 -+#define SSC_TSHR_RSDAT_OFFSET 0 -+ -+/* SSC Receive Compare 0 Register */ -+#define SSC_RC0R 0x00000038 -+#define SSC_RC0R_CP0_SIZE 16 -+#define SSC_RC0R_CP0_OFFSET 0 -+ -+/* SSC Receive Compare 1 Register */ -+#define SSC_RC1R 0x0000003c -+#define SSC_RC1R_CP1_SIZE 16 -+#define SSC_RC1R_CP1_OFFSET 0 -+ -+/* SSC Status Register */ -+#define SSC_SR 0x00000040 -+#define SSC_SR_CP0_SIZE 1 -+#define SSC_SR_CP0_OFFSET 8 -+#define SSC_SR_CP1_SIZE 1 -+#define SSC_SR_CP1_OFFSET 9 -+#define SSC_SR_ENDRX_SIZE 1 -+#define SSC_SR_ENDRX_OFFSET 6 -+#define SSC_SR_ENDTX_SIZE 1 -+#define SSC_SR_ENDTX_OFFSET 2 -+#define SSC_SR_OVRUN_SIZE 1 -+#define SSC_SR_OVRUN_OFFSET 5 -+#define SSC_SR_RXBUFF_SIZE 1 -+#define SSC_SR_RXBUFF_OFFSET 7 -+#define SSC_SR_RXEN_SIZE 1 -+#define SSC_SR_RXEN_OFFSET 17 -+#define SSC_SR_RXRDY_SIZE 1 -+#define SSC_SR_RXRDY_OFFSET 4 -+#define SSC_SR_RXSYN_SIZE 1 -+#define SSC_SR_RXSYN_OFFSET 11 -+#define SSC_SR_TXBUFE_SIZE 1 -+#define SSC_SR_TXBUFE_OFFSET 3 -+#define SSC_SR_TXEMPTY_SIZE 1 -+#define SSC_SR_TXEMPTY_OFFSET 1 -+#define SSC_SR_TXEN_SIZE 1 -+#define SSC_SR_TXEN_OFFSET 16 -+#define SSC_SR_TXRDY_SIZE 1 -+#define SSC_SR_TXRDY_OFFSET 0 -+#define SSC_SR_TXSYN_SIZE 1 -+#define SSC_SR_TXSYN_OFFSET 10 -+ -+/* SSC Interrupt Enable Register */ -+#define SSC_IER 0x00000044 -+#define SSC_IER_CP0_SIZE 1 -+#define SSC_IER_CP0_OFFSET 8 -+#define SSC_IER_CP1_SIZE 1 -+#define SSC_IER_CP1_OFFSET 9 -+#define SSC_IER_ENDRX_SIZE 1 -+#define SSC_IER_ENDRX_OFFSET 6 -+#define SSC_IER_ENDTX_SIZE 1 -+#define SSC_IER_ENDTX_OFFSET 2 -+#define SSC_IER_OVRUN_SIZE 1 -+#define SSC_IER_OVRUN_OFFSET 5 -+#define SSC_IER_RXBUFF_SIZE 1 -+#define SSC_IER_RXBUFF_OFFSET 7 -+#define SSC_IER_RXRDY_SIZE 1 -+#define SSC_IER_RXRDY_OFFSET 4 -+#define SSC_IER_RXSYN_SIZE 1 -+#define SSC_IER_RXSYN_OFFSET 11 -+#define SSC_IER_TXBUFE_SIZE 1 -+#define SSC_IER_TXBUFE_OFFSET 3 -+#define SSC_IER_TXEMPTY_SIZE 1 -+#define SSC_IER_TXEMPTY_OFFSET 1 -+#define SSC_IER_TXRDY_SIZE 1 -+#define SSC_IER_TXRDY_OFFSET 0 -+#define SSC_IER_TXSYN_SIZE 1 -+#define SSC_IER_TXSYN_OFFSET 10 -+ -+/* SSC Interrupt Disable Register */ -+#define SSC_IDR 0x00000048 -+#define SSC_IDR_CP0_SIZE 1 -+#define SSC_IDR_CP0_OFFSET 8 -+#define SSC_IDR_CP1_SIZE 1 -+#define SSC_IDR_CP1_OFFSET 9 -+#define SSC_IDR_ENDRX_SIZE 1 -+#define SSC_IDR_ENDRX_OFFSET 6 -+#define SSC_IDR_ENDTX_SIZE 1 -+#define SSC_IDR_ENDTX_OFFSET 2 -+#define SSC_IDR_OVRUN_SIZE 1 -+#define SSC_IDR_OVRUN_OFFSET 5 -+#define SSC_IDR_RXBUFF_SIZE 1 -+#define SSC_IDR_RXBUFF_OFFSET 7 -+#define SSC_IDR_RXRDY_SIZE 1 -+#define SSC_IDR_RXRDY_OFFSET 4 -+#define SSC_IDR_RXSYN_SIZE 1 -+#define SSC_IDR_RXSYN_OFFSET 11 -+#define SSC_IDR_TXBUFE_SIZE 1 -+#define SSC_IDR_TXBUFE_OFFSET 3 -+#define SSC_IDR_TXEMPTY_SIZE 1 -+#define SSC_IDR_TXEMPTY_OFFSET 1 -+#define SSC_IDR_TXRDY_SIZE 1 -+#define SSC_IDR_TXRDY_OFFSET 0 -+#define SSC_IDR_TXSYN_SIZE 1 -+#define SSC_IDR_TXSYN_OFFSET 10 -+ -+/* SSC Interrupt Mask Register */ -+#define SSC_IMR 0x0000004c -+#define SSC_IMR_CP0_SIZE 1 -+#define SSC_IMR_CP0_OFFSET 8 -+#define SSC_IMR_CP1_SIZE 1 -+#define SSC_IMR_CP1_OFFSET 9 -+#define SSC_IMR_ENDRX_SIZE 1 -+#define SSC_IMR_ENDRX_OFFSET 6 -+#define SSC_IMR_ENDTX_SIZE 1 -+#define SSC_IMR_ENDTX_OFFSET 2 -+#define SSC_IMR_OVRUN_SIZE 1 -+#define SSC_IMR_OVRUN_OFFSET 5 -+#define SSC_IMR_RXBUFF_SIZE 1 -+#define SSC_IMR_RXBUFF_OFFSET 7 -+#define SSC_IMR_RXRDY_SIZE 1 -+#define SSC_IMR_RXRDY_OFFSET 4 -+#define SSC_IMR_RXSYN_SIZE 1 -+#define SSC_IMR_RXSYN_OFFSET 11 -+#define SSC_IMR_TXBUFE_SIZE 1 -+#define SSC_IMR_TXBUFE_OFFSET 3 -+#define SSC_IMR_TXEMPTY_SIZE 1 -+#define SSC_IMR_TXEMPTY_OFFSET 1 -+#define SSC_IMR_TXRDY_SIZE 1 -+#define SSC_IMR_TXRDY_OFFSET 0 -+#define SSC_IMR_TXSYN_SIZE 1 -+#define SSC_IMR_TXSYN_OFFSET 10 -+ -+/* SSC PDC Receive Pointer Register */ -+#define SSC_PDC_RPR 0x00000100 -+ -+/* SSC PDC Receive Counter Register */ -+#define SSC_PDC_RCR 0x00000104 -+ -+/* SSC PDC Transmit Pointer Register */ -+#define SSC_PDC_TPR 0x00000108 -+ -+/* SSC PDC Receive Next Pointer Register */ -+#define SSC_PDC_RNPR 0x00000110 -+ -+/* SSC PDC Receive Next Counter Register */ -+#define SSC_PDC_RNCR 0x00000114 -+ -+/* SSC PDC Transmit Counter Register */ -+#define SSC_PDC_TCR 0x0000010c -+ -+/* SSC PDC Transmit Next Pointer Register */ -+#define SSC_PDC_TNPR 0x00000118 -+ -+/* SSC PDC Transmit Next Counter Register */ -+#define SSC_PDC_TNCR 0x0000011c -+ -+/* SSC PDC Transfer Control Register */ -+#define SSC_PDC_PTCR 0x00000120 -+#define SSC_PDC_PTCR_RXTDIS_SIZE 1 -+#define SSC_PDC_PTCR_RXTDIS_OFFSET 1 -+#define SSC_PDC_PTCR_RXTEN_SIZE 1 -+#define SSC_PDC_PTCR_RXTEN_OFFSET 0 -+#define SSC_PDC_PTCR_TXTDIS_SIZE 1 -+#define SSC_PDC_PTCR_TXTDIS_OFFSET 9 -+#define SSC_PDC_PTCR_TXTEN_SIZE 1 -+#define SSC_PDC_PTCR_TXTEN_OFFSET 8 -+ -+/* SSC PDC Transfer Status Register */ -+#define SSC_PDC_PTSR 0x00000124 -+#define SSC_PDC_PTSR_RXTEN_SIZE 1 -+#define SSC_PDC_PTSR_RXTEN_OFFSET 0 -+#define SSC_PDC_PTSR_TXTEN_SIZE 1 -+#define SSC_PDC_PTSR_TXTEN_OFFSET 8 -+ -+/* Bit manipulation macros */ -+#define SSC_BIT(name) \ -+ (1 << SSC_##name##_OFFSET) -+#define SSC_BF(name, value) \ -+ (((value) & ((1 << SSC_##name##_SIZE) - 1)) \ -+ << SSC_##name##_OFFSET) -+#define SSC_BFEXT(name, value) \ -+ (((value) >> SSC_##name##_OFFSET) \ -+ & ((1 << SSC_##name##_SIZE) - 1)) -+#define SSC_BFINS(name, value, old) \ -+ (((old) & ~(((1 << SSC_##name##_SIZE) - 1) \ -+ << SSC_##name##_OFFSET)) | SSC_BF(name, value)) -+ -+/* Register access macros */ -+#define ssc_readl(base, reg) __raw_readl(base + SSC_##reg) -+#define ssc_writel(base, reg, value) __raw_writel((value), base + SSC_##reg) -+ -+#endif /* __INCLUDE_ATMEL_SSC_H */ -diff --git a/include/linux/spi/at73c213.h b/include/linux/spi/at73c213.h -new file mode 100644 -index 0000000..0f20a70 ---- /dev/null -+++ b/include/linux/spi/at73c213.h -@@ -0,0 +1,25 @@ -+/* -+ * Board-specific data used to set up AT73c213 audio DAC driver. -+ */ -+ -+#ifndef __LINUX_SPI_AT73C213_H -+#define __LINUX_SPI_AT73C213_H -+ -+/** -+ * at73c213_board_info - how the external DAC is wired to the device. -+ * -+ * @ssc_id: SSC platform_driver id the DAC shall use to stream the audio. -+ * @dac_clk: the external clock used to provide master clock to the DAC. -+ * @shortname: a short discription for the DAC, seen by userspace tools. -+ * -+ * This struct contains the configuration of the hardware connection to the -+ * external DAC. The DAC needs a master clock and a I2S audio stream. It also -+ * provides a name which is used to identify it in userspace tools. -+ */ -+struct at73c213_board_info { -+ int ssc_id; -+ struct clk *dac_clk; -+ char shortname[32]; -+}; -+ -+#endif /* __LINUX_SPI_AT73C213_H */ -diff --git a/include/pcmcia/cs_types.h b/include/pcmcia/cs_types.h -index c1d1629..5f38803 100644 ---- a/include/pcmcia/cs_types.h -+++ b/include/pcmcia/cs_types.h -@@ -21,7 +21,7 @@ - #include <sys/types.h> - #endif - --#if defined(__arm__) || defined(__mips__) -+#if defined(__arm__) || defined(__mips__) || defined(__avr32__) - /* This (ioaddr_t) is exposed to userspace & hence cannot be changed. */ - typedef u_int ioaddr_t; - #else -diff --git a/init/do_mounts.c b/init/do_mounts.c -index 4efa1e5..0e88ed1 100644 ---- a/init/do_mounts.c -+++ b/init/do_mounts.c -@@ -219,8 +219,14 @@ __setup("root=", root_dev_setup); - - static int __init rootwait_setup(char *str) - { -- if (*str) -+ if (*str && *str != '=') - return 0; -+ -+ if (*str) -+ printk(KERN_WARNING -+ "WARNING: \"rootwait=1\" is deprecated, " -+ "use \"rootwait\" instead.\n"); -+ - root_wait = 1; - return 1; - } -diff --git a/scripts/checkstack.pl b/scripts/checkstack.pl -index f7844f6..6631586 100755 ---- a/scripts/checkstack.pl -+++ b/scripts/checkstack.pl -@@ -12,6 +12,7 @@ - # sh64 port by Paul Mundt - # Random bits by Matt Mackall <mpm@selenic.com> - # M68k port by Geert Uytterhoeven and Andreas Schwab -+# AVR32 port by Haavard Skinnemoen <hskinnemoen@atmel.com> - # - # Usage: - # objdump -d vmlinux | stackcheck.pl [arch] -@@ -37,6 +38,10 @@ my (@stack, $re, $x, $xs); - if ($arch eq 'arm') { - #c0008ffc: e24dd064 sub sp, sp, #100 ; 0x64 - $re = qr/.*sub.*sp, sp, #(([0-9]{2}|[3-9])[0-9]{2})/o; -+ } elsif ($arch eq 'avr32') { -+ #8000008a: 20 1d sub sp,4 -+ #80000ca8: fa cd 05 b0 sub sp,sp,1456 -+ $re = qr/^.*sub.*sp.*,([0-9]{1,8})/o; - } elsif ($arch =~ /^i[3456]86$/) { - #c0105234: 81 ec ac 05 00 00 sub $0x5ac,%esp - $re = qr/^.*[as][du][db] \$(0x$x{1,8}),\%esp$/o; -diff --git a/sound/Kconfig b/sound/Kconfig -index e48b9b3..29a9979 100644 ---- a/sound/Kconfig -+++ b/sound/Kconfig -@@ -63,6 +63,12 @@ source "sound/aoa/Kconfig" - - source "sound/arm/Kconfig" - -+source "sound/avr32/Kconfig" -+ -+if SPI -+source "sound/spi/Kconfig" -+endif -+ - source "sound/mips/Kconfig" - - source "sound/sh/Kconfig" -diff --git a/sound/Makefile b/sound/Makefile -index 3ead922..e655df7 100644 ---- a/sound/Makefile -+++ b/sound/Makefile -@@ -5,7 +5,8 @@ obj-$(CONFIG_SOUND) += soundcore.o - obj-$(CONFIG_SOUND_PRIME) += sound_firmware.o - obj-$(CONFIG_SOUND_PRIME) += oss/ - obj-$(CONFIG_DMASOUND) += oss/ --obj-$(CONFIG_SND) += core/ i2c/ drivers/ isa/ pci/ ppc/ arm/ sh/ synth/ usb/ sparc/ parisc/ pcmcia/ mips/ soc/ -+obj-$(CONFIG_SND) += core/ i2c/ drivers/ isa/ pci/ ppc/ arm/ avr32/ sh/ synth/ usb/ sparc/ spi/ parisc/ pcmcia/ mips/ soc/ -+ - obj-$(CONFIG_SND_AOA) += aoa/ - - # This one must be compilable even if sound is configured out -diff --git a/sound/avr32/Kconfig b/sound/avr32/Kconfig -new file mode 100644 -index 0000000..17d1d91 ---- /dev/null -+++ b/sound/avr32/Kconfig -@@ -0,0 +1,11 @@ -+menu "AVR32 devices" -+ depends on SND != n && AVR32 -+ -+config SND_ATMEL_AC97 -+ tristate "Atmel AC97 Controller Driver" -+ select SND_PCM -+ select SND_AC97_CODEC -+ help -+ ALSA sound driver for the Atmel AC97 controller. -+ -+endmenu -diff --git a/sound/avr32/Makefile b/sound/avr32/Makefile -new file mode 100644 -index 0000000..5d87d0e ---- /dev/null -+++ b/sound/avr32/Makefile -@@ -0,0 +1,3 @@ -+snd-atmel-ac97-objs := ac97c.o -+ -+obj-$(CONFIG_SND_ATMEL_AC97) += snd-atmel-ac97.o -diff --git a/sound/avr32/ac97c.c b/sound/avr32/ac97c.c -new file mode 100644 -index 0000000..0ec0b1c ---- /dev/null -+++ b/sound/avr32/ac97c.c -@@ -0,0 +1,914 @@ -+/* -+ * Driver for the Atmel AC97 controller -+ * -+ * Copyright (C) 2005-2007 Atmel Corporation -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 as published by -+ * the Free Software Foundation. -+ */ -+#include <linux/clk.h> -+#include <linux/delay.h> -+#include <linux/dma-mapping.h> -+#include <linux/init.h> -+#include <linux/interrupt.h> -+#include <linux/module.h> -+#include <linux/platform_device.h> -+#include <linux/mutex.h> -+#include <linux/io.h> -+ -+#include <sound/driver.h> -+#include <sound/core.h> -+#include <sound/initval.h> -+#include <sound/pcm.h> -+#include <sound/pcm_params.h> -+#include <sound/ac97_codec.h> -+#include <sound/memalloc.h> -+ -+#include <asm/dma-controller.h> -+ -+#include "ac97c.h" -+ -+/* Serialize access to opened */ -+static DEFINE_MUTEX(opened_mutex); -+ -+struct atmel_ac97_dma_info { -+ struct dma_request_cyclic req_tx; -+ struct dma_request_cyclic req_rx; -+ unsigned short rx_periph_id; -+ unsigned short tx_periph_id; -+}; -+ -+struct atmel_ac97 { -+ /* Serialize access to opened */ -+ spinlock_t lock; -+ void __iomem *regs; -+ struct snd_pcm_substream *playback_substream; -+ struct snd_pcm_substream *capture_substream; -+ struct snd_card *card; -+ struct snd_pcm *pcm; -+ struct snd_ac97 *ac97; -+ struct snd_ac97_bus *ac97_bus; -+ int opened; -+ int period; -+ u64 cur_format; -+ unsigned int cur_rate; -+ struct clk *mck; -+ struct platform_device *pdev; -+ struct atmel_ac97_dma_info dma; -+}; -+ -+#define get_chip(card) ((struct atmel_ac97 *)(card)->private_data) -+ -+#define ac97c_writel(chip, reg, val) \ -+ __raw_writel((val), (chip)->regs + AC97C_##reg) -+#define ac97c_readl(chip, reg) \ -+ __raw_readl((chip)->regs + AC97C_##reg) -+ -+/* -+ * PCM part -+ */ -+static struct snd_pcm_hardware snd_atmel_ac97_playback_hw = { -+ .info = (SNDRV_PCM_INFO_INTERLEAVED -+ | SNDRV_PCM_INFO_MMAP -+ | SNDRV_PCM_INFO_MMAP_VALID -+ | SNDRV_PCM_INFO_BLOCK_TRANSFER -+ | SNDRV_PCM_INFO_JOINT_DUPLEX), -+ .formats = (SNDRV_PCM_FMTBIT_S16_BE -+ | SNDRV_PCM_FMTBIT_S16_LE), -+ .rates = (SNDRV_PCM_RATE_CONTINUOUS), -+ .rate_min = 4000, -+ .rate_max = 48000, -+ .channels_min = 1, -+ .channels_max = 6, -+ .buffer_bytes_max = 64*1024, -+ .period_bytes_min = 512, -+ .period_bytes_max = 4095, -+ .periods_min = 8, -+ .periods_max = 1024, -+}; -+ -+static struct snd_pcm_hardware snd_atmel_ac97_capture_hw = { -+ .info = (SNDRV_PCM_INFO_INTERLEAVED -+ | SNDRV_PCM_INFO_MMAP -+ | SNDRV_PCM_INFO_MMAP_VALID -+ | SNDRV_PCM_INFO_BLOCK_TRANSFER -+ | SNDRV_PCM_INFO_JOINT_DUPLEX), -+ .formats = (SNDRV_PCM_FMTBIT_S16_BE -+ | SNDRV_PCM_FMTBIT_S16_LE), -+ .rates = (SNDRV_PCM_RATE_CONTINUOUS), -+ .rate_min = 4000, -+ .rate_max = 48000, -+ .channels_min = 1, -+ .channels_max = 2, -+ .buffer_bytes_max = 64*1024, -+ .period_bytes_min = 512, -+ .period_bytes_max = 4095, -+ .periods_min = 8, -+ .periods_max = 1024, -+}; -+ -+/* -+ * PCM functions -+ */ -+static int -+snd_atmel_ac97_playback_open(struct snd_pcm_substream *substream) -+{ -+ struct atmel_ac97 *chip = snd_pcm_substream_chip(substream); -+ struct snd_pcm_runtime *runtime = substream->runtime; -+ -+ mutex_lock(&opened_mutex); -+ chip->opened++; -+ runtime->hw = snd_atmel_ac97_playback_hw; -+ if (chip->cur_rate) { -+ runtime->hw.rate_min = chip->cur_rate; -+ runtime->hw.rate_max = chip->cur_rate; -+ } -+ if (chip->cur_format) -+ runtime->hw.formats = (1ULL << chip->cur_format); -+ mutex_unlock(&opened_mutex); -+ chip->playback_substream = substream; -+ chip->period = 0; -+ return 0; -+} -+ -+static int -+snd_atmel_ac97_capture_open(struct snd_pcm_substream *substream) -+{ -+ struct atmel_ac97 *chip = snd_pcm_substream_chip(substream); -+ struct snd_pcm_runtime *runtime = substream->runtime; -+ -+ mutex_lock(&opened_mutex); -+ chip->opened++; -+ runtime->hw = snd_atmel_ac97_capture_hw; -+ if (chip->cur_rate) { -+ runtime->hw.rate_min = chip->cur_rate; -+ runtime->hw.rate_max = chip->cur_rate; -+ } -+ if (chip->cur_format) -+ runtime->hw.formats = (1ULL << chip->cur_format); -+ mutex_unlock(&opened_mutex); -+ chip->capture_substream = substream; -+ chip->period = 0; -+ return 0; -+} -+ -+static int snd_atmel_ac97_playback_close(struct snd_pcm_substream *substream) -+{ -+ struct atmel_ac97 *chip = snd_pcm_substream_chip(substream); -+ mutex_lock(&opened_mutex); -+ chip->opened--; -+ if (!chip->opened) { -+ chip->cur_rate = 0; -+ chip->cur_format = 0; -+ } -+ mutex_unlock(&opened_mutex); -+ return 0; -+} -+ -+static int snd_atmel_ac97_capture_close(struct snd_pcm_substream *substream) -+{ -+ struct atmel_ac97 *chip = snd_pcm_substream_chip(substream); -+ mutex_lock(&opened_mutex); -+ chip->opened--; -+ if (!chip->opened) { -+ chip->cur_rate = 0; -+ chip->cur_format = 0; -+ } -+ mutex_unlock(&opened_mutex); -+ return 0; -+} -+ -+static int -+snd_atmel_ac97_playback_hw_params(struct snd_pcm_substream *substream, -+ struct snd_pcm_hw_params *hw_params) -+{ -+ struct atmel_ac97 *chip = snd_pcm_substream_chip(substream); -+ int err; -+ -+ err = snd_pcm_lib_malloc_pages(substream, -+ params_buffer_bytes(hw_params)); -+ if (err < 0) -+ return err; -+ -+ /* Set restrictions to params */ -+ mutex_lock(&opened_mutex); -+ chip->cur_rate = params_rate(hw_params); -+ chip->cur_format = params_format(hw_params); -+ mutex_unlock(&opened_mutex); -+ -+ return 0; -+} -+ -+static int -+snd_atmel_ac97_capture_hw_params(struct snd_pcm_substream *substream, -+ struct snd_pcm_hw_params *hw_params) -+{ -+ struct atmel_ac97 *chip = snd_pcm_substream_chip(substream); -+ int err; -+ -+ err = snd_pcm_lib_malloc_pages(substream, -+ params_buffer_bytes(hw_params)); -+ if (err < 0) -+ return err; -+ -+ /* Set restrictions to params */ -+ mutex_lock(&opened_mutex); -+ chip->cur_rate = params_rate(hw_params); -+ chip->cur_format = params_format(hw_params); -+ mutex_unlock(&opened_mutex); -+ -+ return 0; -+} -+ -+static int snd_atmel_ac97_playback_hw_free(struct snd_pcm_substream *substream) -+{ -+ return snd_pcm_lib_free_pages(substream); -+} -+ -+static int snd_atmel_ac97_capture_hw_free(struct snd_pcm_substream *substream) -+{ -+ -+ return snd_pcm_lib_free_pages(substream); -+} -+ -+static int snd_atmel_ac97_playback_prepare(struct snd_pcm_substream *substream) -+{ -+ struct atmel_ac97 *chip = snd_pcm_substream_chip(substream); -+ struct platform_device *pdev = chip->pdev; -+ struct snd_pcm_runtime *runtime = substream->runtime; -+ int block_size = frames_to_bytes(runtime, runtime->period_size); -+ unsigned long word = 0; -+ unsigned long buffer_size = 0; -+ -+ dma_sync_single_for_device(&pdev->dev, runtime->dma_addr, -+ block_size * 2, DMA_TO_DEVICE); -+ -+ /* Assign slots to channels */ -+ switch (substream->runtime->channels) { -+ case 1: -+ word |= AC97C_CH_ASSIGN(PCM_LEFT, A); -+ break; -+ case 2: -+ /* Assign Left and Right slot to Channel A */ -+ word |= AC97C_CH_ASSIGN(PCM_LEFT, A) -+ | AC97C_CH_ASSIGN(PCM_RIGHT, A); -+ break; -+ default: -+ /* TODO: support more than two channels */ -+ return -EINVAL; -+ break; -+ } -+ ac97c_writel(chip, OCA, word); -+ -+ /* Configure sample format and size */ -+ word = AC97C_CMR_PDCEN | AC97C_CMR_SIZE_16; -+ -+ switch (runtime->format) { -+ case SNDRV_PCM_FORMAT_S16_LE: -+ word |= AC97C_CMR_CEM_LITTLE; -+ break; -+ case SNDRV_PCM_FORMAT_S16_BE: /* fall through */ -+ default: -+ word &= ~AC97C_CMR_CEM_LITTLE; -+ break; -+ } -+ -+ ac97c_writel(chip, CAMR, word); -+ -+ /* Set variable rate if needed */ -+ if (runtime->rate != 48000) { -+ word = ac97c_readl(chip, MR); -+ word |= AC97C_MR_VRA; -+ ac97c_writel(chip, MR, word); -+ } else { -+ /* Clear Variable Rate Bit */ -+ word = ac97c_readl(chip, MR); -+ word &= ~AC97C_MR_VRA; -+ ac97c_writel(chip, MR, word); -+ } -+ -+ /* Set rate */ -+ snd_ac97_set_rate(chip->ac97, AC97_PCM_FRONT_DAC_RATE, runtime->rate); -+ -+ buffer_size = frames_to_bytes(runtime, runtime->period_size) * -+ runtime->periods; -+ -+ chip->dma.req_tx.buffer_size = buffer_size; -+ chip->dma.req_tx.periods = runtime->periods; -+ -+ BUG_ON(chip->dma.req_tx.buffer_size != -+ (chip->dma.req_tx.periods * -+ frames_to_bytes(runtime, runtime->period_size))); -+ -+ chip->dma.req_tx.buffer_start = runtime->dma_addr; -+ chip->dma.req_tx.data_reg = (dma_addr_t)(chip->regs + AC97C_CATHR + 2); -+ chip->dma.req_tx.periph_id = chip->dma.tx_periph_id; -+ chip->dma.req_tx.direction = DMA_DIR_MEM_TO_PERIPH; -+ chip->dma.req_tx.width = DMA_WIDTH_16BIT; -+ chip->dma.req_tx.dev_id = chip; -+ -+ return 0; -+} -+ -+static int snd_atmel_ac97_capture_prepare(struct snd_pcm_substream *substream) -+{ -+ struct atmel_ac97 *chip = snd_pcm_substream_chip(substream); -+ struct platform_device *pdev = chip->pdev; -+ struct snd_pcm_runtime *runtime = substream->runtime; -+ int block_size = frames_to_bytes(runtime, runtime->period_size); -+ unsigned long word = 0; -+ unsigned long buffer_size = 0; -+ -+ dma_sync_single_for_device(&pdev->dev, runtime->dma_addr, -+ block_size * 2, DMA_FROM_DEVICE); -+ -+ /* Assign slots to channels */ -+ switch (substream->runtime->channels) { -+ case 1: -+ word |= AC97C_CH_ASSIGN(PCM_LEFT, A); -+ break; -+ case 2: -+ /* Assign Left and Right slot to Channel A */ -+ word |= AC97C_CH_ASSIGN(PCM_LEFT, A) -+ | AC97C_CH_ASSIGN(PCM_RIGHT, A); -+ break; -+ default: -+ /* TODO: support more than two channels */ -+ return -EINVAL; -+ break; -+ } -+ ac97c_writel(chip, ICA, word); -+ -+ /* Configure sample format and size */ -+ word = AC97C_CMR_PDCEN | AC97C_CMR_SIZE_16; -+ -+ switch (runtime->format) { -+ case SNDRV_PCM_FORMAT_S16_LE: -+ word |= AC97C_CMR_CEM_LITTLE; -+ break; -+ case SNDRV_PCM_FORMAT_S16_BE: -+ default: -+ word &= ~(AC97C_CMR_CEM_LITTLE); -+ break; -+ } -+ -+ ac97c_writel(chip, CAMR, word); -+ -+ /* Set variable rate if needed */ -+ if (runtime->rate != 48000) { -+ word = ac97c_readl(chip, MR); -+ word |= AC97C_MR_VRA; -+ ac97c_writel(chip, MR, word); -+ } else { -+ /* Clear Variable Rate Bit */ -+ word = ac97c_readl(chip, MR); -+ word &= ~(AC97C_MR_VRA); -+ ac97c_writel(chip, MR, word); -+ } -+ -+ /* Set rate */ -+ snd_ac97_set_rate(chip->ac97, AC97_PCM_LR_ADC_RATE, runtime->rate); -+ -+ buffer_size = frames_to_bytes(runtime, runtime->period_size) * -+ runtime->periods; -+ -+ chip->dma.req_rx.buffer_size = buffer_size; -+ chip->dma.req_rx.periods = runtime->periods; -+ -+ BUG_ON(chip->dma.req_rx.buffer_size != -+ (chip->dma.req_rx.periods * -+ frames_to_bytes(runtime, runtime->period_size))); -+ -+ chip->dma.req_rx.buffer_start = runtime->dma_addr; -+ chip->dma.req_rx.data_reg = (dma_addr_t)(chip->regs + AC97C_CARHR + 2); -+ chip->dma.req_rx.periph_id = chip->dma.rx_periph_id; -+ chip->dma.req_rx.direction = DMA_DIR_PERIPH_TO_MEM; -+ chip->dma.req_rx.width = DMA_WIDTH_16BIT; -+ chip->dma.req_rx.dev_id = chip; -+ -+ return 0; -+} -+ -+ static int -+snd_atmel_ac97_playback_trigger(struct snd_pcm_substream *substream, int cmd) -+{ -+ struct atmel_ac97 *chip = snd_pcm_substream_chip(substream); -+ unsigned long camr; -+ int flags, err = 0; -+ -+ spin_lock_irqsave(&chip->lock, flags); -+ camr = ac97c_readl(chip, CAMR); -+ -+ switch (cmd) { -+ case SNDRV_PCM_TRIGGER_START: -+ err = dma_prepare_request_cyclic(chip->dma.req_tx.req.dmac, -+ &chip->dma.req_tx); -+ dma_start_request(chip->dma.req_tx.req.dmac, -+ chip->dma.req_tx.req.channel); -+ camr |= AC97C_CMR_CENA; -+ break; -+ case SNDRV_PCM_TRIGGER_STOP: -+ err = dma_stop_request(chip->dma.req_tx.req.dmac, -+ chip->dma.req_tx.req.channel); -+ if (chip->opened <= 1) -+ camr &= ~AC97C_CMR_CENA; -+ break; -+ default: -+ err = -EINVAL; -+ break; -+ } -+ -+ ac97c_writel(chip, CAMR, camr); -+ -+ spin_unlock_irqrestore(&chip->lock, flags); -+ return err; -+} -+ -+ static int -+snd_atmel_ac97_capture_trigger(struct snd_pcm_substream *substream, int cmd) -+{ -+ struct atmel_ac97 *chip = snd_pcm_substream_chip(substream); -+ unsigned long camr; -+ int flags, err = 0; -+ -+ spin_lock_irqsave(&chip->lock, flags); -+ camr = ac97c_readl(chip, CAMR); -+ -+ switch (cmd) { -+ case SNDRV_PCM_TRIGGER_START: -+ err = dma_prepare_request_cyclic(chip->dma.req_rx.req.dmac, -+ &chip->dma.req_rx); -+ dma_start_request(chip->dma.req_rx.req.dmac, -+ chip->dma.req_rx.req.channel); -+ camr |= AC97C_CMR_CENA; -+ break; -+ case SNDRV_PCM_TRIGGER_STOP: -+ err = dma_stop_request(chip->dma.req_rx.req.dmac, -+ chip->dma.req_rx.req.channel); -+ mutex_lock(&opened_mutex); -+ if (chip->opened <= 1) -+ camr &= ~AC97C_CMR_CENA; -+ mutex_unlock(&opened_mutex); -+ break; -+ default: -+ err = -EINVAL; -+ break; -+ } -+ -+ ac97c_writel(chip, CAMR, camr); -+ -+ spin_unlock_irqrestore(&chip->lock, flags); -+ return err; -+} -+ -+ static snd_pcm_uframes_t -+snd_atmel_ac97_playback_pointer(struct snd_pcm_substream *substream) -+{ -+ struct atmel_ac97 *chip = snd_pcm_substream_chip(substream); -+ struct snd_pcm_runtime *runtime = substream->runtime; -+ snd_pcm_uframes_t pos; -+ unsigned long bytes; -+ -+ bytes = (dma_get_current_pos -+ (chip->dma.req_tx.req.dmac, -+ chip->dma.req_tx.req.channel) - runtime->dma_addr); -+ pos = bytes_to_frames(runtime, bytes); -+ if (pos >= runtime->buffer_size) -+ pos -= runtime->buffer_size; -+ -+ return pos; -+} -+ -+ static snd_pcm_uframes_t -+snd_atmel_ac97_capture_pointer(struct snd_pcm_substream *substream) -+{ -+ struct atmel_ac97 *chip = snd_pcm_substream_chip(substream); -+ struct snd_pcm_runtime *runtime = substream->runtime; -+ snd_pcm_uframes_t pos; -+ unsigned long bytes; -+ -+ bytes = (dma_get_current_pos -+ (chip->dma.req_rx.req.dmac, -+ chip->dma.req_rx.req.channel) -+ - runtime->dma_addr); -+ pos = bytes_to_frames(runtime, bytes); -+ if (pos >= runtime->buffer_size) -+ pos -= runtime->buffer_size; -+ -+ -+ return pos; -+} -+ -+static struct snd_pcm_ops atmel_ac97_playback_ops = { -+ .open = snd_atmel_ac97_playback_open, -+ .close = snd_atmel_ac97_playback_close, -+ .ioctl = snd_pcm_lib_ioctl, -+ .hw_params = snd_atmel_ac97_playback_hw_params, -+ .hw_free = snd_atmel_ac97_playback_hw_free, -+ .prepare = snd_atmel_ac97_playback_prepare, -+ .trigger = snd_atmel_ac97_playback_trigger, -+ .pointer = snd_atmel_ac97_playback_pointer, -+}; -+ -+static struct snd_pcm_ops atmel_ac97_capture_ops = { -+ .open = snd_atmel_ac97_capture_open, -+ .close = snd_atmel_ac97_capture_close, -+ .ioctl = snd_pcm_lib_ioctl, -+ .hw_params = snd_atmel_ac97_capture_hw_params, -+ .hw_free = snd_atmel_ac97_capture_hw_free, -+ .prepare = snd_atmel_ac97_capture_prepare, -+ .trigger = snd_atmel_ac97_capture_trigger, -+ .pointer = snd_atmel_ac97_capture_pointer, -+}; -+ -+static struct ac97_pcm atmel_ac97_pcm_defs[] __devinitdata = { -+ /* Playback */ -+ { -+ .exclusive = 1, -+ .r = { { -+ .slots = ((1 << AC97_SLOT_PCM_LEFT) -+ | (1 << AC97_SLOT_PCM_RIGHT) -+ | (1 << AC97_SLOT_PCM_CENTER) -+ | (1 << AC97_SLOT_PCM_SLEFT) -+ | (1 << AC97_SLOT_PCM_SRIGHT) -+ | (1 << AC97_SLOT_LFE)), -+ } } -+ }, -+ /* PCM in */ -+ { -+ .stream = 1, -+ .exclusive = 1, -+ .r = { { -+ .slots = ((1 << AC97_SLOT_PCM_LEFT) -+ | (1 << AC97_SLOT_PCM_RIGHT)), -+ } } -+ }, -+ /* Mic in */ -+ { -+ .stream = 1, -+ .exclusive = 1, -+ .r = { { -+ .slots = (1<<AC97_SLOT_MIC), -+ } } -+ }, -+}; -+ -+static int __devinit snd_atmel_ac97_pcm_new(struct atmel_ac97 *chip) -+{ -+ struct snd_pcm *pcm; -+ int err; -+ -+ err = snd_ac97_pcm_assign(chip->ac97_bus, -+ ARRAY_SIZE(atmel_ac97_pcm_defs), -+ atmel_ac97_pcm_defs); -+ if (err) -+ return err; -+ -+ err = snd_pcm_new(chip->card, "Atmel-AC97", 0, 1, 1, &pcm); -+ if (err) -+ return err; -+ -+ snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, -+ &atmel_ac97_playback_ops); -+ -+ snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, -+ &atmel_ac97_capture_ops); -+ -+ snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV, -+ &chip->pdev->dev, -+ 128 * 1024, 128 * 1024); -+ -+ pcm->private_data = chip; -+ pcm->info_flags = 0; -+ strcpy(pcm->name, "Atmel-AC97"); -+ chip->pcm = pcm; -+ -+ return 0; -+} -+ -+/* -+ * Mixer part. -+ */ -+static int snd_atmel_ac97_mixer_new(struct atmel_ac97 *chip) -+{ -+ int err; -+ struct snd_ac97_template template; -+ -+ memset(&template, 0, sizeof(template)); -+ template.private_data = chip; -+ err = snd_ac97_mixer(chip->ac97_bus, &template, &chip->ac97); -+ -+ return err; -+} -+ -+static void atmel_ac97_error(struct dma_request *_req) -+{ -+ struct dma_request_cyclic *req = to_dma_request_cyclic(_req); -+ struct atmel_ac97 *chip = req->dev_id; -+ -+ dev_dbg(&chip->pdev->dev, "DMA Controller error, channel %d\n", -+ req->req.channel); -+} -+ -+static void atmel_ac97_block_complete(struct dma_request *_req) -+{ -+ struct dma_request_cyclic *req = to_dma_request_cyclic(_req); -+ struct atmel_ac97 *chip = req->dev_id; -+ if (req->periph_id == chip->dma.tx_periph_id) -+ snd_pcm_period_elapsed(chip->playback_substream); -+ else -+ snd_pcm_period_elapsed(chip->capture_substream); -+} -+ -+/* -+ * Codec part. -+ */ -+static void snd_atmel_ac97_write(struct snd_ac97 *ac97, unsigned short reg, -+ unsigned short val) -+{ -+ struct atmel_ac97 *chip = get_chip(ac97); -+ unsigned long word; -+ int timeout = 40; -+ -+ word = (reg & 0x7f) << 16 | val; -+ -+ do { -+ if (ac97c_readl(chip, COSR) & AC97C_CSR_TXRDY) { -+ ac97c_writel(chip, COTHR, word); -+ return; -+ } -+ udelay(1); -+ } while (--timeout); -+ -+ dev_dbg(&chip->pdev->dev, "codec write timeout\n"); -+} -+ -+static unsigned short snd_atmel_ac97_read(struct snd_ac97 *ac97, -+ unsigned short reg) -+{ -+ struct atmel_ac97 *chip = get_chip(ac97); -+ unsigned long word; -+ int timeout = 40; -+ int write = 10; -+ -+ word = (0x80 | (reg & 0x7f)) << 16; -+ -+ if ((ac97c_readl(chip, COSR) & AC97C_CSR_RXRDY) != 0) -+ ac97c_readl(chip, CORHR); -+ -+retry_write: -+ timeout = 40; -+ -+ do { -+ if ((ac97c_readl(chip, COSR) & AC97C_CSR_TXRDY) != 0) { -+ ac97c_writel(chip, COTHR, word); -+ goto read_reg; -+ } -+ mdelay(10); -+ } while (--timeout); -+ -+ if (!--write) -+ goto timed_out; -+ goto retry_write; -+ -+read_reg: -+ do { -+ if ((ac97c_readl(chip, COSR) & AC97C_CSR_RXRDY) != 0) { -+ unsigned short val = ac97c_readl(chip, CORHR); -+ return val; -+ } -+ mdelay(10); -+ } while (--timeout); -+ -+ if (!--write) -+ goto timed_out; -+ goto retry_write; -+ -+timed_out: -+ dev_dbg(&chip->pdev->dev, "codec read timeout\n"); -+ return 0xffff; -+} -+ -+static void snd_atmel_ac97_reset(struct atmel_ac97 *chip) -+{ -+ ac97c_writel(chip, MR, AC97C_MR_WRST); -+ mdelay(1); -+ ac97c_writel(chip, MR, AC97C_MR_ENA); -+} -+ -+static void snd_atmel_ac97_destroy(struct snd_card *card) -+{ -+ struct atmel_ac97 *chip = get_chip(card); -+ -+ if (chip->regs) -+ iounmap(chip->regs); -+ -+ if (chip->mck) { -+ clk_disable(chip->mck); -+ clk_put(chip->mck); -+ } -+ -+ if (chip->dma.req_tx.req.dmac) { -+ dma_release_channel(chip->dma.req_tx.req.dmac, -+ chip->dma.req_tx.req.channel); -+ } -+ if (chip->dma.req_rx.req.dmac) { -+ dma_release_channel(chip->dma.req_rx.req.dmac, -+ chip->dma.req_rx.req.channel); -+ } -+} -+ -+static int __devinit snd_atmel_ac97_create(struct snd_card *card, -+ struct platform_device *pdev) -+{ -+ static struct snd_ac97_bus_ops ops = { -+ .write = snd_atmel_ac97_write, -+ .read = snd_atmel_ac97_read, -+ }; -+ struct atmel_ac97 *chip = get_chip(card); -+ struct resource *regs; -+ struct clk *mck; -+ int err; -+ -+ regs = platform_get_resource(pdev, IORESOURCE_MEM, 0); -+ if (!regs) -+ return -ENXIO; -+ -+ mck = clk_get(&pdev->dev, "pclk"); -+ if (IS_ERR(mck)) -+ return PTR_ERR(mck); -+ clk_enable(mck); -+ chip->mck = mck; -+ -+ card->private_free = snd_atmel_ac97_destroy; -+ -+ spin_lock_init(&chip->lock); -+ chip->card = card; -+ chip->pdev = pdev; -+ -+ chip->regs = ioremap(regs->start, regs->end - regs->start + 1); -+ if (!chip->regs) -+ return -ENOMEM; -+ -+ snd_card_set_dev(card, &pdev->dev); -+ -+ err = snd_ac97_bus(card, 0, &ops, chip, &chip->ac97_bus); -+ -+ return err; -+} -+ -+static int __devinit snd_atmel_ac97_probe(struct platform_device *pdev) -+{ -+ static int dev; -+ struct snd_card *card; -+ struct atmel_ac97 *chip; -+ int err; -+ int ch; -+ -+ mutex_init(&opened_mutex); -+ -+ err = -ENOMEM; -+ card = snd_card_new(SNDRV_DEFAULT_IDX1, SNDRV_DEFAULT_STR1, -+ THIS_MODULE, sizeof(struct atmel_ac97)); -+ if (!card) -+ goto out; -+ chip = get_chip(card); -+ -+ err = snd_atmel_ac97_create(card, pdev); -+ if (err) -+ goto out_free_card; -+ -+ snd_atmel_ac97_reset(chip); -+ -+ err = snd_atmel_ac97_mixer_new(chip); -+ if (err) -+ goto out_free_card; -+ -+ err = snd_atmel_ac97_pcm_new(chip); -+ if (err) -+ goto out_free_card; -+ -+ /* TODO: Get this information from the platform device */ -+ chip->dma.req_tx.req.dmac = find_dma_controller(0); -+ if (!chip->dma.req_tx.req.dmac) { -+ dev_dbg(&chip->pdev->dev, "DMA controller for TX missing\n"); -+ err = -ENODEV; -+ goto out_free_card; -+ } -+ chip->dma.req_rx.req.dmac = find_dma_controller(0); -+ if (!chip->dma.req_rx.req.dmac) { -+ dev_dbg(&chip->pdev->dev, "DMA controller for RX missing\n"); -+ err = -ENODEV; -+ goto out_free_card; -+ } -+ -+ chip->dma.rx_periph_id = 3; -+ chip->dma.tx_periph_id = 4; -+ -+ ch = dma_alloc_channel(chip->dma.req_tx.req.dmac); -+ if (ch < 0) { -+ dev_dbg(&chip->pdev->dev, -+ "could not allocate TX DMA channel\n"); -+ err = ch; -+ goto out_free_card; -+ } -+ chip->dma.req_tx.req.channel = ch; -+ chip->dma.req_tx.width = DMA_WIDTH_16BIT; -+ chip->dma.req_tx.req.block_complete = atmel_ac97_block_complete; -+ chip->dma.req_tx.req.error = atmel_ac97_error; -+ -+ ch = dma_alloc_channel(chip->dma.req_rx.req.dmac); -+ if (ch < 0) { -+ dev_dbg(&chip->pdev->dev, -+ "could not allocate RX DMA channel\n"); -+ err = ch; -+ goto out_free_card; -+ } -+ chip->dma.req_rx.req.channel = ch; -+ chip->dma.req_rx.width = DMA_WIDTH_16BIT; -+ chip->dma.req_rx.req.block_complete = atmel_ac97_block_complete; -+ chip->dma.req_rx.req.error = atmel_ac97_error; -+ -+ strcpy(card->driver, "atmel_ac97c"); -+ strcpy(card->shortname, "atmel_ac97c"); -+ sprintf(card->longname, "Atmel AVR32 AC97 controller"); -+ -+ err = snd_card_register(card); -+ if (err) -+ goto out_free_card; -+ -+ platform_set_drvdata(pdev, card); -+ dev++; -+ -+ dev_info(&pdev->dev, "Atmel AVR32 AC97 controller at 0x%p\n", -+ chip->regs); -+ -+ return 0; -+ -+out_free_card: -+ snd_card_free(card); -+out: -+ return err; -+} -+ -+#ifdef CONFIG_PM -+ static int -+snd_atmel_ac97_suspend(struct platform_device *pdev, pm_message_t msg) -+{ -+ struct snd_card *card = platform_get_drvdata(pdev); -+ struct atmel_ac97 *chip = card->private_data; -+ -+ clk_disable(chip->mck); -+ -+ return 0; -+} -+ -+static int snd_atmel_ac97_resume(struct platform_device *pdev) -+{ -+ struct snd_card *card = dev_get_drvdata(pdev); -+ struct atmel_ac97 *chip = card->private_data; -+ -+ clk_enable(chip->mck); -+ -+ return 0; -+} -+#else -+#define snd_atmel_ac97_suspend NULL -+#define snd_atmel_ac97_resume NULL -+#endif -+ -+static int __devexit snd_atmel_ac97_remove(struct platform_device *pdev) -+{ -+ struct snd_card *card = platform_get_drvdata(pdev); -+ -+ snd_card_free(card); -+ platform_set_drvdata(pdev, NULL); -+ return 0; -+} -+ -+static struct platform_driver atmel_ac97_driver = { -+ .remove = __devexit_p(snd_atmel_ac97_remove), -+ .driver = { -+ .name = "atmel_ac97c", -+ }, -+ .suspend = snd_atmel_ac97_suspend, -+ .resume = snd_atmel_ac97_resume, -+}; -+ -+static int __init atmel_ac97_init(void) -+{ -+ return platform_driver_probe(&atmel_ac97_driver, -+ snd_atmel_ac97_probe); -+} -+module_init(atmel_ac97_init); -+ -+static void __exit atmel_ac97_exit(void) -+{ -+ platform_driver_unregister(&atmel_ac97_driver); -+} -+module_exit(atmel_ac97_exit); -+ -+MODULE_LICENSE("GPL"); -+MODULE_DESCRIPTION("Driver for Atmel AC97 Controller"); -+MODULE_AUTHOR("Haavard Skinnemoen <hskinnemoen@atmel.com>"); -diff --git a/sound/avr32/ac97c.h b/sound/avr32/ac97c.h -new file mode 100644 -index 0000000..96246e7 ---- /dev/null -+++ b/sound/avr32/ac97c.h -@@ -0,0 +1,71 @@ -+/* -+ * Register definitions for the Atmel AC97 Controller. -+ * -+ * Copyright (C) 2005-2006 Atmel Corporation -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 as -+ * published by the Free Software Foundation. -+ */ -+#ifndef __SOUND_AVR32_AC97C_H -+#define __SOUND_AVR32_AC97C_H -+ -+#define AC97C_MR 0x08 -+#define AC97C_ICA 0x10 -+#define AC97C_OCA 0x14 -+#define AC97C_CARHR 0x20 -+#define AC97C_CATHR 0x24 -+#define AC97C_CASR 0x28 -+#define AC97C_CAMR 0x2c -+#define AC97C_CBRHR 0x30 -+#define AC97C_CBTHR 0x34 -+#define AC97C_CBSR 0x38 -+#define AC97C_CBMR 0x3c -+#define AC97C_CORHR 0x40 -+#define AC97C_COTHR 0x44 -+#define AC97C_COSR 0x48 -+#define AC97C_COMR 0x4c -+#define AC97C_SR 0x50 -+#define AC97C_IER 0x54 -+#define AC97C_IDR 0x58 -+#define AC97C_IMR 0x5c -+#define AC97C_VERSION 0xfc -+ -+#define AC97C_CATPR PDC_TPR -+#define AC97C_CATCR PDC_TCR -+#define AC97C_CATNPR PDC_TNPR -+#define AC97C_CATNCR PDC_TNCR -+#define AC97C_CARPR PDC_RPR -+#define AC97C_CARCR PDC_RCR -+#define AC97C_CARNPR PDC_RNPR -+#define AC97C_CARNCR PDC_RNCR -+#define AC97C_PTCR PDC_PTCR -+ -+#define AC97C_MR_ENA (1 << 0) -+#define AC97C_MR_WRST (1 << 1) -+#define AC97C_MR_VRA (1 << 2) -+ -+#define AC97C_CSR_TXRDY (1 << 0) -+#define AC97C_CSR_UNRUN (1 << 2) -+#define AC97C_CSR_RXRDY (1 << 4) -+#define AC97C_CSR_ENDTX (1 << 10) -+#define AC97C_CSR_ENDRX (1 << 14) -+ -+#define AC97C_CMR_SIZE_20 (0 << 16) -+#define AC97C_CMR_SIZE_18 (1 << 16) -+#define AC97C_CMR_SIZE_16 (2 << 16) -+#define AC97C_CMR_SIZE_10 (3 << 16) -+#define AC97C_CMR_CEM_LITTLE (1 << 18) -+#define AC97C_CMR_CEM_BIG (0 << 18) -+#define AC97C_CMR_CENA (1 << 21) -+#define AC97C_CMR_PDCEN (1 << 22) -+ -+#define AC97C_SR_CAEVT (1 << 3) -+ -+#define AC97C_CH_ASSIGN(slot, channel) \ -+ (AC97C_CHANNEL_##channel << (3 * (AC97_SLOT_##slot - 3))) -+#define AC97C_CHANNEL_NONE 0x0 -+#define AC97C_CHANNEL_A 0x1 -+#define AC97C_CHANNEL_B 0x2 -+ -+#endif /* __SOUND_AVR32_AC97C_H */ -diff --git a/sound/oss/Kconfig b/sound/oss/Kconfig -index af37cd0..e3cc557 100644 ---- a/sound/oss/Kconfig -+++ b/sound/oss/Kconfig -@@ -654,3 +654,7 @@ config SOUND_SH_DAC_AUDIO_CHANNEL - int "DAC channel" - default "1" - depends on SOUND_SH_DAC_AUDIO -+ -+config SOUND_AT32_ABDAC -+ tristate "Atmel AT32 Audio Bitstream DAC (ABDAC) support" -+ depends on SOUND_PRIME && AVR32 -diff --git a/sound/oss/Makefile b/sound/oss/Makefile -index 1200670..fafc246 100644 ---- a/sound/oss/Makefile -+++ b/sound/oss/Makefile -@@ -10,6 +10,7 @@ obj-$(CONFIG_SOUND_CS4232) += cs4232.o ad1848.o - - # Please leave it as is, cause the link order is significant ! - -+obj-$(CONFIG_SOUND_AT32_ABDAC) += at32_abdac.o - obj-$(CONFIG_SOUND_SH_DAC_AUDIO) += sh_dac_audio.o - obj-$(CONFIG_SOUND_HAL2) += hal2.o - obj-$(CONFIG_SOUND_AEDSP16) += aedsp16.o -diff --git a/sound/oss/at32_abdac.c b/sound/oss/at32_abdac.c -new file mode 100644 -index 0000000..cb997d7 ---- /dev/null -+++ b/sound/oss/at32_abdac.c -@@ -0,0 +1,722 @@ -+/* -+ * OSS Sound Driver for the Atmel AT32 on-chip DAC. -+ * -+ * Copyright (C) 2006 Atmel Corporation -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 as -+ * published by the Free Software Foundation. -+ */ -+#include <linux/clk.h> -+#include <linux/dma-mapping.h> -+#include <linux/fs.h> -+#include <linux/init.h> -+#include <linux/interrupt.h> -+#include <linux/kernel.h> -+#include <linux/module.h> -+#include <linux/platform_device.h> -+#include <linux/sound.h> -+#include <linux/soundcard.h> -+ -+#include <asm/byteorder.h> -+#include <asm/dma-controller.h> -+#include <asm/io.h> -+#include <asm/uaccess.h> -+ -+/* We want to use the "bizarre" swap-bytes-in-each-halfword macro */ -+#include <linux/byteorder/swabb.h> -+ -+#include "at32_abdac.h" -+ -+#define DMA_BUFFER_SIZE 32768 -+#define DMA_PERIOD_SHIFT 10 -+#define DMA_PERIOD_SIZE (1 << DMA_PERIOD_SHIFT) -+#define DMA_WRITE_THRESHOLD DMA_PERIOD_SIZE -+ -+struct sound_settings { -+ unsigned int format; -+ unsigned int channels; -+ unsigned int sample_rate; -+ /* log2(bytes per sample) */ -+ unsigned int input_order; -+}; -+ -+struct at32_dac { -+ spinlock_t lock; -+ void __iomem *regs; -+ -+ /* head and tail refer to number of words */ -+ struct { -+ u32 *buf; -+ int head; -+ int tail; -+ } dma; -+ -+ struct semaphore sem; -+ wait_queue_head_t write_wait; -+ -+ /* -+ * Read at most ucount bytes from ubuf, translate to 2-channel -+ * signed 16-bit big endian format and write to the DMA buffer -+ * as long as there is room left. Return the number of bytes -+ * successfully copied from ubuf, or -EFAULT if the first -+ * sample from ubuf couldn't be read. This function is not -+ * called unless there is room for at least one sample (4 -+ * bytes) in the DMA buffer. -+ */ -+ ssize_t (*trans)(struct at32_dac *dac, const char __user *ubuf, -+ size_t ucount); -+ -+ struct sound_settings dsp_settings; -+ struct dma_request_cyclic req; -+ -+ struct clk *mck; -+ struct clk *sample_clk; -+ struct platform_device *pdev; -+ int busy; -+ int playing; -+ int dev_dsp; -+}; -+static struct at32_dac *the_dac; -+ -+static inline unsigned int abdac_get_head(struct at32_dac *dac) -+{ -+ return dac->dma.head & ((DMA_BUFFER_SIZE / 4) - 1); -+} -+ -+static inline unsigned int abdac_get_tail(struct at32_dac *dac) -+{ -+ return dac->dma.tail & ((DMA_BUFFER_SIZE / 4) - 1); -+} -+ -+static inline unsigned int abdac_dma_space(struct at32_dac *dac) -+{ -+ unsigned int space; -+ -+ space = ((dac->dma.tail - dac->dma.head - 1) -+ & ((DMA_BUFFER_SIZE / 4) - 1)); -+ return space; -+} -+ -+static void abdac_update_dma_tail(struct at32_dac *dac) -+{ -+ dma_addr_t dma_addr; -+ unsigned int new_tail; -+ -+ if (dac->playing) { -+ dma_addr = dma_get_current_pos(dac->req.req.dmac, -+ dac->req.req.channel); -+ new_tail = (dma_addr - dac->req.buffer_start) / 4; -+ if (new_tail >= dac->dma.head -+ && (dac->dma.tail < dac->dma.head -+ || dac->dma.tail > new_tail)) -+ dev_notice(&dac->pdev->dev, "DMA underrun detected!\n"); -+ dac->dma.tail = new_tail; -+ dev_dbg(&dac->pdev->dev, "update tail: 0x%x - 0x%x = %u\n", -+ dma_addr, dac->req.buffer_start, dac->dma.tail); -+ } -+} -+ -+static int abdac_start(struct at32_dac *dac) -+{ -+ int ret; -+ -+ if (dac->playing) -+ return 0; -+ -+ memset(dac->dma.buf, 0, DMA_BUFFER_SIZE); -+ -+ clk_enable(dac->sample_clk); -+ -+ ret = dma_prepare_request_cyclic(dac->req.req.dmac, &dac->req); -+ if (ret) -+ goto out_stop_clock; -+ -+ dev_dbg(&dac->pdev->dev, "starting DMA...\n"); -+ ret = dma_start_request(dac->req.req.dmac, dac->req.req.channel); -+ if (ret) -+ goto out_stop_request; -+ -+ dac_writel(dac, CTRL, DAC_BIT(EN)); -+ dac->playing = 1; -+ -+ return 0; -+ -+out_stop_request: -+ dma_stop_request(dac->req.req.dmac, -+ dac->req.req.channel); -+out_stop_clock: -+ clk_disable(dac->sample_clk); -+ return ret; -+} -+ -+static int abdac_stop(struct at32_dac *dac) -+{ -+ if (dac->playing) { -+ dma_stop_request(dac->req.req.dmac, dac->req.req.channel); -+ dac_writel(dac, DATA, 0); -+ dac_writel(dac, CTRL, 0); -+ dac->playing = 0; -+ clk_disable(dac->sample_clk); -+ } -+ -+ return 0; -+} -+ -+static int abdac_dma_prepare(struct at32_dac *dac) -+{ -+ dac->dma.buf = dma_alloc_coherent(&dac->pdev->dev, DMA_BUFFER_SIZE, -+ &dac->req.buffer_start, GFP_KERNEL); -+ if (!dac->dma.buf) -+ return -ENOMEM; -+ -+ dac->dma.head = dac->dma.tail = 0; -+ dac->req.periods = DMA_BUFFER_SIZE / DMA_PERIOD_SIZE; -+ dac->req.buffer_size = DMA_BUFFER_SIZE; -+ -+ return 0; -+} -+ -+static void abdac_dma_cleanup(struct at32_dac *dac) -+{ -+ if (dac->dma.buf) -+ dma_free_coherent(&dac->pdev->dev, DMA_BUFFER_SIZE, -+ dac->dma.buf, dac->req.buffer_start); -+ dac->dma.buf = NULL; -+} -+ -+static void abdac_dma_block_complete(struct dma_request *req) -+{ -+ struct dma_request_cyclic *creq = to_dma_request_cyclic(req); -+ struct at32_dac *dac = container_of(creq, struct at32_dac, req); -+ -+ wake_up(&dac->write_wait); -+} -+ -+static void abdac_dma_error(struct dma_request *req) -+{ -+ struct dma_request_cyclic *creq = to_dma_request_cyclic(req); -+ struct at32_dac *dac = container_of(creq, struct at32_dac, req); -+ -+ dev_err(&dac->pdev->dev, "DMA error\n"); -+} -+ -+static irqreturn_t abdac_interrupt(int irq, void *dev_id) -+{ -+ struct at32_dac *dac = dev_id; -+ u32 status; -+ -+ status = dac_readl(dac, INT_STATUS); -+ if (status & DAC_BIT(UNDERRUN)) { -+ dev_err(&dac->pdev->dev, "Underrun detected!\n"); -+ dac_writel(dac, INT_CLR, DAC_BIT(UNDERRUN)); -+ } else { -+ dev_err(&dac->pdev->dev, "Spurious interrupt (status=0x%x)\n", -+ status); -+ dac_writel(dac, INT_CLR, status); -+ } -+ -+ return IRQ_HANDLED; -+} -+ -+static ssize_t trans_s16be(struct at32_dac *dac, const char __user *ubuf, -+ size_t ucount) -+{ -+ ssize_t ret; -+ -+ if (dac->dsp_settings.channels == 2) { -+ const u32 __user *up = (const u32 __user *)ubuf; -+ u32 sample; -+ -+ for (ret = 0; ret < (ssize_t)(ucount - 3); ret += 4) { -+ if (!abdac_dma_space(dac)) -+ break; -+ -+ if (unlikely(__get_user(sample, up++))) { -+ if (ret == 0) -+ ret = -EFAULT; -+ break; -+ } -+ dac->dma.buf[abdac_get_head(dac)] = sample; -+ dac->dma.head++; -+ } -+ } else { -+ const u16 __user *up = (const u16 __user *)ubuf; -+ u16 sample; -+ -+ for (ret = 0; ret < (ssize_t)(ucount - 1); ret += 2) { -+ if (!abdac_dma_space(dac)) -+ break; -+ -+ if (unlikely(__get_user(sample, up++))) { -+ if (ret == 0) -+ ret = -EFAULT; -+ break; -+ } -+ dac->dma.buf[abdac_get_head(dac)] -+ = (sample << 16) | sample; -+ dac->dma.head++; -+ } -+ } -+ -+ return ret; -+} -+ -+static ssize_t trans_s16le(struct at32_dac *dac, const char __user *ubuf, -+ size_t ucount) -+{ -+ ssize_t ret; -+ -+ if (dac->dsp_settings.channels == 2) { -+ const u32 __user *up = (const u32 __user *)ubuf; -+ u32 sample; -+ -+ for (ret = 0; ret < (ssize_t)(ucount - 3); ret += 4) { -+ if (!abdac_dma_space(dac)) -+ break; -+ -+ if (unlikely(__get_user(sample, up++))) { -+ if (ret == 0) -+ ret = -EFAULT; -+ break; -+ } -+ /* Swap bytes in each halfword */ -+ dac->dma.buf[abdac_get_head(dac)] = swahb32(sample); -+ dac->dma.head++; -+ } -+ } else { -+ const u16 __user *up = (const u16 __user *)ubuf; -+ u16 sample; -+ -+ for (ret = 0; ret < (ssize_t)(ucount - 1); ret += 2) { -+ if (!abdac_dma_space(dac)) -+ break; -+ -+ if (unlikely(__get_user(sample, up++))) { -+ if (ret == 0) -+ ret = -EFAULT; -+ break; -+ } -+ sample = swab16(sample); -+ dac->dma.buf[abdac_get_head(dac)] -+ = (sample << 16) | sample; -+ dac->dma.head++; -+ } -+ } -+ -+ return ret; -+} -+ -+static ssize_t abdac_dma_translate_from_user(struct at32_dac *dac, -+ const char __user *buffer, -+ size_t count) -+{ -+ /* At least one buffer must be available at this point */ -+ dev_dbg(&dac->pdev->dev, "copying %zu bytes from user...\n", count); -+ -+ return dac->trans(dac, buffer, count); -+} -+ -+static int abdac_set_format(struct at32_dac *dac, int format) -+{ -+ unsigned int order; -+ -+ switch (format) { -+ case AFMT_S16_BE: -+ order = 1; -+ dac->trans = trans_s16be; -+ break; -+ case AFMT_S16_LE: -+ order = 1; -+ dac->trans = trans_s16le; -+ break; -+ default: -+ dev_dbg(&dac->pdev->dev, "unsupported format: %d\n", format); -+ return -EINVAL; -+ } -+ -+ if (dac->dsp_settings.channels == 2) -+ order++; -+ -+ dac->dsp_settings.input_order = order; -+ dac->dsp_settings.format = format; -+ return 0; -+} -+ -+static int abdac_set_sample_rate(struct at32_dac *dac, unsigned long rate) -+{ -+ unsigned long new_rate; -+ int ret; -+ -+ ret = clk_set_rate(dac->sample_clk, 256 * rate); -+ if (ret < 0) -+ return ret; -+ -+ /* TODO: mplayer seems to have a problem with this */ -+#if 0 -+ new_rate = clk_get_rate(dac->sample_clk); -+ dac->dsp_settings.sample_rate = new_rate / 256; -+#else -+ dac->dsp_settings.sample_rate = rate; -+#endif -+ -+ return 0; -+} -+ -+static ssize_t abdac_dsp_write(struct file *file, -+ const char __user *buffer, -+ size_t count, loff_t *ppos) -+{ -+ struct at32_dac *dac = file->private_data; -+ DECLARE_WAITQUEUE(wait, current); -+ unsigned int avail; -+ ssize_t copied; -+ ssize_t ret; -+ -+ /* Avoid address space checking in the translation functions */ -+ if (!access_ok(buffer, count, VERIFY_READ)) -+ return -EFAULT; -+ -+ down(&dac->sem); -+ -+ if (!dac->dma.buf) { -+ ret = abdac_dma_prepare(dac); -+ if (ret) -+ goto out; -+ } -+ -+ add_wait_queue(&dac->write_wait, &wait); -+ ret = 0; -+ while (count > 0) { -+ do { -+ abdac_update_dma_tail(dac); -+ avail = abdac_dma_space(dac); -+ set_current_state(TASK_INTERRUPTIBLE); -+ if (avail >= DMA_WRITE_THRESHOLD) -+ break; -+ -+ if (file->f_flags & O_NONBLOCK) { -+ if (!ret) -+ ret = -EAGAIN; -+ goto out; -+ } -+ -+ pr_debug("Going to wait (avail = %u, count = %zu)\n", -+ avail, count); -+ -+ up(&dac->sem); -+ schedule(); -+ if (signal_pending(current)) { -+ if (!ret) -+ ret = -ERESTARTSYS; -+ goto out_nosem; -+ } -+ down(&dac->sem); -+ } while (1); -+ -+ copied = abdac_dma_translate_from_user(dac, buffer, count); -+ if (copied < 0) { -+ if (!ret) -+ ret = -EFAULT; -+ goto out; -+ } -+ -+ abdac_start(dac); -+ -+ count -= copied; -+ ret += copied; -+ } -+ -+out: -+ up(&dac->sem); -+out_nosem: -+ remove_wait_queue(&dac->write_wait, &wait); -+ set_current_state(TASK_RUNNING); -+ return ret; -+} -+ -+static int abdac_dsp_ioctl(struct inode *inode, struct file *file, -+ unsigned int cmd, unsigned long arg) -+{ -+ struct at32_dac *dac = file->private_data; -+ int __user *up = (int __user *)arg; -+ struct audio_buf_info abinfo; -+ int val, ret; -+ -+ switch (cmd) { -+ case OSS_GETVERSION: -+ return put_user(SOUND_VERSION, up); -+ -+ case SNDCTL_DSP_SPEED: -+ if (get_user(val, up)) -+ return -EFAULT; -+ if (val >= 0) { -+ abdac_stop(dac); -+ ret = abdac_set_sample_rate(dac, val); -+ if (ret) -+ return ret; -+ } -+ return put_user(dac->dsp_settings.sample_rate, up); -+ -+ case SNDCTL_DSP_STEREO: -+ if (get_user(val, up)) -+ return -EFAULT; -+ abdac_stop(dac); -+ if (val && dac->dsp_settings.channels == 1) -+ dac->dsp_settings.input_order++; -+ else if (!val && dac->dsp_settings.channels != 1) -+ dac->dsp_settings.input_order--; -+ dac->dsp_settings.channels = val ? 2 : 1; -+ return 0; -+ -+ case SNDCTL_DSP_CHANNELS: -+ if (get_user(val, up)) -+ return -EFAULT; -+ -+ if (val) { -+ if (val < 0 || val > 2) -+ return -EINVAL; -+ -+ abdac_stop(dac); -+ dac->dsp_settings.input_order -+ += val - dac->dsp_settings.channels; -+ dac->dsp_settings.channels = val; -+ } -+ return put_user(val, (int *)arg); -+ -+ case SNDCTL_DSP_GETFMTS: -+ return put_user(AFMT_S16_BE | AFMT_S16_BE, up); -+ -+ case SNDCTL_DSP_SETFMT: -+ if (get_user(val, up)) -+ return -EFAULT; -+ -+ if (val == AFMT_QUERY) { -+ val = dac->dsp_settings.format; -+ } else { -+ ret = abdac_set_format(dac, val); -+ if (ret) -+ return ret; -+ } -+ return put_user(val, up); -+ -+ case SNDCTL_DSP_GETOSPACE: -+ abdac_update_dma_tail(dac); -+ abinfo.fragsize = ((1 << dac->dsp_settings.input_order) -+ * (DMA_PERIOD_SIZE / 4)); -+ abinfo.bytes = (abdac_dma_space(dac) -+ << dac->dsp_settings.input_order); -+ abinfo.fragstotal = ((DMA_BUFFER_SIZE * 4) -+ >> (DMA_PERIOD_SHIFT -+ + dac->dsp_settings.input_order)); -+ abinfo.fragments = ((abinfo.bytes -+ >> dac->dsp_settings.input_order) -+ / (DMA_PERIOD_SIZE / 4)); -+ pr_debug("fragments=%d fragstotal=%d fragsize=%d bytes=%d\n", -+ abinfo.fragments, abinfo.fragstotal, abinfo.fragsize, -+ abinfo.bytes); -+ return copy_to_user(up, &abinfo, sizeof(abinfo)) ? -EFAULT : 0; -+ -+ default: -+ dev_dbg(&dac->pdev->dev, "Unimplemented ioctl cmd: 0x%x\n", cmd); -+ return -EINVAL; -+ } -+} -+ -+static int abdac_dsp_open(struct inode *inode, struct file *file) -+{ -+ struct at32_dac *dac = the_dac; -+ int ret; -+ -+ if (file->f_mode & FMODE_READ) -+ return -ENXIO; -+ -+ down(&dac->sem); -+ ret = -EBUSY; -+ if (dac->busy) -+ goto out; -+ -+ dac->dma.head = dac->dma.tail = 0; -+ -+ /* FIXME: What are the correct defaults? */ -+ dac->dsp_settings.channels = 2; -+ abdac_set_format(dac, AFMT_S16_BE); -+ ret = abdac_set_sample_rate(dac, 8000); -+ if (ret) -+ goto out; -+ -+ file->private_data = dac; -+ dac->busy = 1; -+ -+ ret = 0; -+ -+out: -+ up(&dac->sem); -+ return ret; -+} -+ -+static int abdac_dsp_release(struct inode *inode, struct file *file) -+{ -+ struct at32_dac *dac = file->private_data; -+ -+ down(&dac->sem); -+ -+ abdac_stop(dac); -+ abdac_dma_cleanup(dac); -+ dac->busy = 0; -+ -+ up(&dac->sem); -+ -+ return 0; -+} -+ -+static struct file_operations abdac_dsp_fops = { -+ .owner = THIS_MODULE, -+ .llseek = no_llseek, -+ .write = abdac_dsp_write, -+ .ioctl = abdac_dsp_ioctl, -+ .open = abdac_dsp_open, -+ .release = abdac_dsp_release, -+}; -+ -+static int __init abdac_probe(struct platform_device *pdev) -+{ -+ struct at32_dac *dac; -+ struct resource *regs; -+ struct clk *mck; -+ struct clk *sample_clk; -+ int irq; -+ int ret; -+ -+ if (the_dac) -+ return -EBUSY; -+ -+ regs = platform_get_resource(pdev, IORESOURCE_MEM, 0); -+ if (!regs) -+ return -ENXIO; -+ irq = platform_get_irq(pdev, 0); -+ if (irq < 0) -+ return irq; -+ -+ mck = clk_get(&pdev->dev, "pclk"); -+ if (IS_ERR(mck)) -+ return PTR_ERR(mck); -+ sample_clk = clk_get(&pdev->dev, "sample_clk"); -+ if (IS_ERR(sample_clk)) { -+ ret = PTR_ERR(sample_clk); -+ goto out_put_mck; -+ } -+ clk_enable(mck); -+ -+ ret = -ENOMEM; -+ dac = kzalloc(sizeof(struct at32_dac), GFP_KERNEL); -+ if (!dac) -+ goto out_disable_clk; -+ -+ spin_lock_init(&dac->lock); -+ init_MUTEX(&dac->sem); -+ init_waitqueue_head(&dac->write_wait); -+ dac->pdev = pdev; -+ dac->mck = mck; -+ dac->sample_clk = sample_clk; -+ -+ dac->regs = ioremap(regs->start, regs->end - regs->start + 1); -+ if (!dac->regs) -+ goto out_free_dac; -+ -+ ret = request_irq(irq, abdac_interrupt, 0, "dac", dac); -+ if (ret) -+ goto out_unmap_regs; -+ -+ /* FIXME */ -+ dac->req.req.dmac = find_dma_controller(0); -+ if (!dac->req.req.dmac) -+ goto out_free_irq; -+ -+ ret = dma_alloc_channel(dac->req.req.dmac); -+ if (ret < 0) -+ goto out_free_irq; -+ -+ dac->req.req.channel = ret; -+ dac->req.req.block_complete = abdac_dma_block_complete; -+ dac->req.req.error = abdac_dma_error; -+ dac->req.data_reg = regs->start + DAC_DATA; -+ dac->req.periph_id = 2; /* FIXME */ -+ dac->req.direction = DMA_DIR_MEM_TO_PERIPH; -+ dac->req.width = DMA_WIDTH_32BIT; -+ -+ /* Make sure the DAC is silent and disabled */ -+ dac_writel(dac, DATA, 0); -+ dac_writel(dac, CTRL, 0); -+ -+ ret = register_sound_dsp(&abdac_dsp_fops, -1); -+ if (ret < 0) -+ goto out_free_dma; -+ dac->dev_dsp = ret; -+ -+ /* TODO: Register mixer */ -+ -+ the_dac = dac; -+ platform_set_drvdata(pdev, dac); -+ -+ return 0; -+ -+out_free_dma: -+ dma_release_channel(dac->req.req.dmac, dac->req.req.channel); -+out_free_irq: -+ free_irq(irq, dac); -+out_unmap_regs: -+ iounmap(dac->regs); -+out_free_dac: -+ kfree(dac); -+out_disable_clk: -+ clk_disable(mck); -+ clk_put(sample_clk); -+out_put_mck: -+ clk_put(mck); -+ return ret; -+} -+ -+static int __exit abdac_remove(struct platform_device *pdev) -+{ -+ struct at32_dac *dac; -+ -+ dac = platform_get_drvdata(pdev); -+ if (dac) { -+ unregister_sound_dsp(dac->dev_dsp); -+ dma_release_channel(dac->req.req.dmac, dac->req.req.channel); -+ free_irq(platform_get_irq(pdev, 0), dac); -+ iounmap(dac->regs); -+ clk_disable(dac->mck); -+ clk_put(dac->sample_clk); -+ clk_put(dac->mck); -+ kfree(dac); -+ platform_set_drvdata(pdev, NULL); -+ the_dac = NULL; -+ } -+ -+ return 0; -+} -+ -+static struct platform_driver abdac_driver = { -+ .remove = __exit_p(abdac_remove), -+ .driver = { -+ .name = "abdac", -+ }, -+}; -+ -+static int __init abdac_init(void) -+{ -+ return platform_driver_probe(&abdac_driver, abdac_probe); -+} -+module_init(abdac_init); -+ -+static void __exit abdac_exit(void) -+{ -+ platform_driver_unregister(&abdac_driver); -+} -+module_exit(abdac_exit); -+ -+MODULE_AUTHOR("Haavard Skinnemoen <hskinnemoen@atmel.com>"); -+MODULE_DESCRIPTION("Sound Driver for the Atmel AT32 ABDAC"); -+MODULE_LICENSE("GPL"); -diff --git a/sound/oss/at32_abdac.h b/sound/oss/at32_abdac.h -new file mode 100644 -index 0000000..3c88e25 ---- /dev/null -+++ b/sound/oss/at32_abdac.h -@@ -0,0 +1,59 @@ -+/* -+ * Register definitions for the Atmel AT32 on-chip DAC. -+ * -+ * Copyright (C) 2006 Atmel Corporation -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 as -+ * published by the Free Software Foundation. -+ */ -+#ifndef __SOUND_OSS_AT32_ABDAC_H__ -+#define __SOUND_OSS_AT32_ABDAC_H__ -+ -+/* DAC register offsets */ -+#define DAC_DATA 0x0000 -+#define DAC_CTRL 0x0008 -+#define DAC_INT_MASK 0x000c -+#define DAC_INT_EN 0x0010 -+#define DAC_INT_DIS 0x0014 -+#define DAC_INT_CLR 0x0018 -+#define DAC_INT_STATUS 0x001c -+#define DAC_PDC_DATA 0x0020 -+ -+/* Bitfields in CTRL */ -+#define DAC_SWAP_OFFSET 30 -+#define DAC_SWAP_SIZE 1 -+#define DAC_EN_OFFSET 31 -+#define DAC_EN_SIZE 1 -+ -+/* Bitfields in INT_MASK/INT_EN/INT_DIS/INT_STATUS/INT_CLR */ -+#define DAC_UNDERRUN_OFFSET 28 -+#define DAC_UNDERRUN_SIZE 1 -+#define DAC_TX_READY_OFFSET 29 -+#define DAC_TX_READY_SIZE 1 -+#define DAC_TX_BUFFER_EMPTY_OFFSET 30 -+#define DAC_TX_BUFFER_EMPTY_SIZE 1 -+#define DAC_CHANNEL_TX_END_OFFSET 31 -+#define DAC_CHANNEL_TX_END_SIZE 1 -+ -+/* Bit manipulation macros */ -+#define DAC_BIT(name) \ -+ (1 << DAC_##name##_OFFSET) -+#define DAC_BF(name, value) \ -+ (((value) & ((1 << DAC_##name##_SIZE) - 1)) \ -+ << DAC_##name##_OFFSET) -+#define DAC_BFEXT(name, value) \ -+ (((value) >> DAC_##name##_OFFSET) \ -+ & ((1 << DAC_##name##_SIZE) - 1)) -+#define DAC_BFINS(name, value, old) \ -+ (((old) & ~(((1 << DAC_##name##_SIZE) - 1) \ -+ << DAC_##name##_OFFSET)) \ -+ | DAC_BF(name,value)) -+ -+/* Register access macros */ -+#define dac_readl(port, reg) \ -+ __raw_readl((port)->regs + DAC_##reg) -+#define dac_writel(port, reg, value) \ -+ __raw_writel((value), (port)->regs + DAC_##reg) -+ -+#endif /* __SOUND_OSS_AT32_ABDAC_H__ */ -diff --git a/sound/spi/Kconfig b/sound/spi/Kconfig -new file mode 100644 -index 0000000..0d08c29 ---- /dev/null -+++ b/sound/spi/Kconfig -@@ -0,0 +1,31 @@ -+#SPI drivers -+ -+menu "SPI devices" -+ depends on SND != n -+ -+config SND_AT73C213 -+ tristate "Atmel AT73C213 DAC driver" -+ depends on ATMEL_SSC -+ select SND_PCM -+ help -+ Say Y here if you want to use the Atmel AT73C213 external DAC. This -+ DAC can be found on Atmel development boards. -+ -+ This driver requires the Atmel SSC driver for sound sink, a -+ peripheral found on most AT91 and AVR32 microprocessors. -+ -+ To compile this driver as a module, choose M here: the module will be -+ called snd-at73c213. -+ -+config SND_AT73C213_TARGET_BITRATE -+ int "Target bitrate for AT73C213" -+ depends on SND_AT73C213 -+ default "48000" -+ range 8000 50000 -+ help -+ Sets the target bitrate for the bitrate calculator in the driver. -+ Limited by hardware to be between 8000 Hz and 50000 Hz. -+ -+ Set to 48000 Hz by default. -+ -+endmenu -diff --git a/sound/spi/Makefile b/sound/spi/Makefile -new file mode 100644 -index 0000000..026fb73 ---- /dev/null -+++ b/sound/spi/Makefile -@@ -0,0 +1,5 @@ -+# Makefile for SPI drivers -+ -+snd-at73c213-objs := at73c213.o -+ -+obj-$(CONFIG_SND_AT73C213) += snd-at73c213.o -diff --git a/sound/spi/at73c213.c b/sound/spi/at73c213.c -new file mode 100644 -index 0000000..f514f47 ---- /dev/null -+++ b/sound/spi/at73c213.c -@@ -0,0 +1,1121 @@ -+/* -+ * Driver for AT73C213 16-bit stereo DAC connected to Atmel SSC -+ * -+ * Copyright (C) 2006-2007 Atmel Norway -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 as published by -+ * the Free Software Foundation. -+ */ -+ -+/*#define DEBUG*/ -+ -+#include <linux/clk.h> -+#include <linux/err.h> -+#include <linux/delay.h> -+#include <linux/device.h> -+#include <linux/dma-mapping.h> -+#include <linux/init.h> -+#include <linux/interrupt.h> -+#include <linux/module.h> -+#include <linux/platform_device.h> -+#include <linux/io.h> -+ -+#include <sound/driver.h> -+#include <sound/initval.h> -+#include <sound/control.h> -+#include <sound/core.h> -+#include <sound/pcm.h> -+ -+#include <linux/atmel-ssc.h> -+ -+#include <linux/spi/spi.h> -+#include <linux/spi/at73c213.h> -+ -+#include "at73c213.h" -+ -+#define BITRATE_MIN 8000 /* Hardware limit? */ -+#define BITRATE_TARGET CONFIG_SND_AT73C213_TARGET_BITRATE -+#define BITRATE_MAX 50000 /* Hardware limit. */ -+ -+/* Initial (hardware reset) AT73C213 register values. */ -+static u8 snd_at73c213_original_image[18] = -+{ -+ 0x00, /* 00 - CTRL */ -+ 0x05, /* 01 - LLIG */ -+ 0x05, /* 02 - RLIG */ -+ 0x08, /* 03 - LPMG */ -+ 0x08, /* 04 - RPMG */ -+ 0x00, /* 05 - LLOG */ -+ 0x00, /* 06 - RLOG */ -+ 0x22, /* 07 - OLC */ -+ 0x09, /* 08 - MC */ -+ 0x00, /* 09 - CSFC */ -+ 0x00, /* 0A - MISC */ -+ 0x00, /* 0B - */ -+ 0x00, /* 0C - PRECH */ -+ 0x05, /* 0D - AUXG */ -+ 0x00, /* 0E - */ -+ 0x00, /* 0F - */ -+ 0x00, /* 10 - RST */ -+ 0x00, /* 11 - PA_CTRL */ -+}; -+ -+struct snd_at73c213 { -+ struct snd_card *card; -+ struct snd_pcm *pcm; -+ struct snd_pcm_substream *substream; -+ struct at73c213_board_info *board; -+ int irq; -+ int period; -+ unsigned long bitrate; -+ struct clk *bitclk; -+ struct ssc_device *ssc; -+ struct spi_device *spi; -+ u8 spi_wbuffer[2]; -+ u8 spi_rbuffer[2]; -+ /* Image of the SPI registers in AT73C213. */ -+ u8 reg_image[18]; -+ /* Protect registers against concurrent access. */ -+ spinlock_t lock; -+}; -+ -+#define get_chip(card) ((struct snd_at73c213 *)card->private_data) -+ -+static int -+snd_at73c213_write_reg(struct snd_at73c213 *chip, u8 reg, u8 val) -+{ -+ struct spi_message msg; -+ struct spi_transfer msg_xfer = { -+ .len = 2, -+ .cs_change = 0, -+ }; -+ int retval; -+ -+ spi_message_init(&msg); -+ -+ chip->spi_wbuffer[0] = reg; -+ chip->spi_wbuffer[1] = val; -+ -+ msg_xfer.tx_buf = chip->spi_wbuffer; -+ msg_xfer.rx_buf = chip->spi_rbuffer; -+ spi_message_add_tail(&msg_xfer, &msg); -+ -+ retval = spi_sync(chip->spi, &msg); -+ -+ if (!retval) -+ chip->reg_image[reg] = val; -+ -+ return retval; -+} -+ -+static struct snd_pcm_hardware snd_at73c213_playback_hw = { -+ .info = SNDRV_PCM_INFO_INTERLEAVED | -+ SNDRV_PCM_INFO_BLOCK_TRANSFER, -+ .formats = SNDRV_PCM_FMTBIT_S16_BE, -+ .rates = SNDRV_PCM_RATE_CONTINUOUS, -+ .rate_min = 8000, /* Replaced by chip->bitrate later. */ -+ .rate_max = 50000, /* Replaced by chip->bitrate later. */ -+ .channels_min = 2, -+ .channels_max = 2, -+ .buffer_bytes_max = 64 * 1024 - 1, -+ .period_bytes_min = 512, -+ .period_bytes_max = 64 * 1024 - 1, -+ .periods_min = 4, -+ .periods_max = 1024, -+}; -+ -+/* -+ * Calculate and set bitrate and divisions. -+ */ -+static int snd_at73c213_set_bitrate(struct snd_at73c213 *chip) -+{ -+ unsigned long ssc_rate = clk_get_rate(chip->ssc->clk); -+ unsigned long dac_rate_new, ssc_div, status; -+ unsigned long ssc_div_max, ssc_div_min; -+ int max_tries; -+ -+ /* -+ * We connect two clocks here, picking divisors so the I2S clocks -+ * out data at the same rate the DAC clocks it in ... and as close -+ * as practical to the desired target rate. -+ * -+ * The DAC master clock (MCLK) is programmable, and is either 256 -+ * or (not here) 384 times the I2S output clock (BCLK). -+ */ -+ -+ /* SSC clock / (bitrate * stereo * 16-bit). */ -+ ssc_div = ssc_rate / (BITRATE_TARGET * 2 * 16); -+ ssc_div_min = ssc_rate / (BITRATE_MAX * 2 * 16); -+ ssc_div_max = ssc_rate / (BITRATE_MIN * 2 * 16); -+ max_tries = (ssc_div_max - ssc_div_min) / 2; -+ -+ if (max_tries < 1) -+ max_tries = 1; -+ -+ /* ssc_div must be a power of 2. */ -+ ssc_div = (ssc_div + 1) & ~1UL; -+ -+ if ((ssc_rate / (ssc_div * 2 * 16)) < BITRATE_MIN) { -+ ssc_div -= 2; -+ if ((ssc_rate / (ssc_div * 2 * 16)) > BITRATE_MAX) -+ return -ENXIO; -+ } -+ -+ /* Search for a possible bitrate. */ -+ do { -+ /* SSC clock / (ssc divider * 16-bit * stereo). */ -+ if ((ssc_rate / (ssc_div * 2 * 16)) < BITRATE_MIN) -+ return -ENXIO; -+ -+ /* 256 / (2 * 16) = 8 */ -+ dac_rate_new = 8 * (ssc_rate / ssc_div); -+ -+ status = clk_round_rate(chip->board->dac_clk, dac_rate_new); -+ if (status < 0) -+ return status; -+ -+ /* Ignore difference smaller than 256 Hz. */ -+ if ((status/256) == (dac_rate_new/256)) -+ goto set_rate; -+ -+ ssc_div += 2; -+ } while (--max_tries); -+ -+ /* Not able to find a valid bitrate. */ -+ return -ENXIO; -+ -+set_rate: -+ status = clk_set_rate(chip->board->dac_clk, status); -+ if (status < 0) -+ return status; -+ -+ /* Set divider in SSC device. */ -+ ssc_writel(chip->ssc->regs, CMR, ssc_div/2); -+ -+ /* SSC clock / (ssc divider * 16-bit * stereo). */ -+ chip->bitrate = ssc_rate / (ssc_div * 16 * 2); -+ -+ dev_info(&chip->spi->dev, -+ "at73c213: supported bitrate is %lu (%lu divider)\n", -+ chip->bitrate, ssc_div); -+ -+ return 0; -+} -+ -+static int snd_at73c213_pcm_open(struct snd_pcm_substream *substream) -+{ -+ struct snd_at73c213 *chip = snd_pcm_substream_chip(substream); -+ struct snd_pcm_runtime *runtime = substream->runtime; -+ -+ snd_at73c213_playback_hw.rate_min = chip->bitrate; -+ snd_at73c213_playback_hw.rate_max = chip->bitrate; -+ runtime->hw = snd_at73c213_playback_hw; -+ chip->substream = substream; -+ -+ return 0; -+} -+ -+static int snd_at73c213_pcm_close(struct snd_pcm_substream *substream) -+{ -+ struct snd_at73c213 *chip = snd_pcm_substream_chip(substream); -+ chip->substream = NULL; -+ return 0; -+} -+ -+static int snd_at73c213_pcm_hw_params(struct snd_pcm_substream *substream, -+ struct snd_pcm_hw_params *hw_params) -+{ -+ return snd_pcm_lib_malloc_pages(substream, -+ params_buffer_bytes(hw_params)); -+} -+ -+static int snd_at73c213_pcm_hw_free(struct snd_pcm_substream *substream) -+{ -+ return snd_pcm_lib_free_pages(substream); -+} -+ -+static int snd_at73c213_pcm_prepare(struct snd_pcm_substream *substream) -+{ -+ struct snd_at73c213 *chip = snd_pcm_substream_chip(substream); -+ struct snd_pcm_runtime *runtime = substream->runtime; -+ int block_size; -+ -+ block_size = frames_to_bytes(runtime, runtime->period_size); -+ -+ chip->period = 0; -+ -+ ssc_writel(chip->ssc->regs, PDC_TPR, -+ (long)runtime->dma_addr); -+ ssc_writel(chip->ssc->regs, PDC_TCR, runtime->period_size * 2); -+ ssc_writel(chip->ssc->regs, PDC_TNPR, -+ (long)runtime->dma_addr + block_size); -+ ssc_writel(chip->ssc->regs, PDC_TNCR, runtime->period_size * 2); -+ -+ return 0; -+} -+ -+static int snd_at73c213_pcm_trigger(struct snd_pcm_substream *substream, -+ int cmd) -+{ -+ struct snd_at73c213 *chip = snd_pcm_substream_chip(substream); -+ int retval = 0; -+ -+ spin_lock(&chip->lock); -+ -+ switch (cmd) { -+ case SNDRV_PCM_TRIGGER_START: -+ ssc_writel(chip->ssc->regs, IER, SSC_BIT(IER_ENDTX)); -+ ssc_writel(chip->ssc->regs, PDC_PTCR, SSC_BIT(PDC_PTCR_TXTEN)); -+ break; -+ case SNDRV_PCM_TRIGGER_STOP: -+ ssc_writel(chip->ssc->regs, PDC_PTCR, SSC_BIT(PDC_PTCR_TXTDIS)); -+ ssc_writel(chip->ssc->regs, IDR, SSC_BIT(IDR_ENDTX)); -+ break; -+ default: -+ dev_dbg(&chip->spi->dev, "spurious command %x\n", cmd); -+ retval = -EINVAL; -+ break; -+ } -+ -+ spin_unlock(&chip->lock); -+ -+ return retval; -+} -+ -+static snd_pcm_uframes_t -+snd_at73c213_pcm_pointer(struct snd_pcm_substream *substream) -+{ -+ struct snd_at73c213 *chip = snd_pcm_substream_chip(substream); -+ struct snd_pcm_runtime *runtime = substream->runtime; -+ snd_pcm_uframes_t pos; -+ unsigned long bytes; -+ -+ bytes = ssc_readl(chip->ssc->regs, PDC_TPR) -+ - (unsigned long)runtime->dma_addr; -+ -+ pos = bytes_to_frames(runtime, bytes); -+ if (pos >= runtime->buffer_size) -+ pos -= runtime->buffer_size; -+ -+ return pos; -+} -+ -+static struct snd_pcm_ops at73c213_playback_ops = { -+ .open = snd_at73c213_pcm_open, -+ .close = snd_at73c213_pcm_close, -+ .ioctl = snd_pcm_lib_ioctl, -+ .hw_params = snd_at73c213_pcm_hw_params, -+ .hw_free = snd_at73c213_pcm_hw_free, -+ .prepare = snd_at73c213_pcm_prepare, -+ .trigger = snd_at73c213_pcm_trigger, -+ .pointer = snd_at73c213_pcm_pointer, -+}; -+ -+static void snd_at73c213_pcm_free(struct snd_pcm *pcm) -+{ -+ struct snd_at73c213 *chip = snd_pcm_chip(pcm); -+ if (chip->pcm) { -+ snd_pcm_lib_preallocate_free_for_all(chip->pcm); -+ chip->pcm = NULL; -+ } -+} -+ -+static int __devinit snd_at73c213_pcm_new(struct snd_at73c213 *chip, int device) -+{ -+ struct snd_pcm *pcm; -+ int retval; -+ -+ retval = snd_pcm_new(chip->card, chip->card->shortname, -+ device, 1, 0, &pcm); -+ if (retval < 0) -+ goto out; -+ -+ pcm->private_data = chip; -+ pcm->private_free = snd_at73c213_pcm_free; -+ pcm->info_flags = SNDRV_PCM_INFO_BLOCK_TRANSFER; -+ strcpy(pcm->name, "at73c213"); -+ chip->pcm = pcm; -+ -+ snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &at73c213_playback_ops); -+ -+ retval = snd_pcm_lib_preallocate_pages_for_all(chip->pcm, -+ SNDRV_DMA_TYPE_DEV, &chip->ssc->pdev->dev, -+ 64 * 1024, 64 * 1024); -+out: -+ return retval; -+} -+ -+static irqreturn_t snd_at73c213_interrupt(int irq, void *dev_id) -+{ -+ struct snd_at73c213 *chip = dev_id; -+ struct snd_pcm_runtime *runtime = chip->substream->runtime; -+ u32 status; -+ int offset; -+ int block_size; -+ int next_period; -+ int retval = IRQ_NONE; -+ -+ spin_lock(&chip->lock); -+ -+ block_size = frames_to_bytes(runtime, runtime->period_size); -+ status = ssc_readl(chip->ssc->regs, IMR); -+ -+ if (status & SSC_BIT(IMR_ENDTX)) { -+ chip->period++; -+ if (chip->period == runtime->periods) -+ chip->period = 0; -+ next_period = chip->period + 1; -+ if (next_period == runtime->periods) -+ next_period = 0; -+ -+ offset = block_size * next_period; -+ -+ ssc_writel(chip->ssc->regs, PDC_TNPR, -+ (long)runtime->dma_addr + offset); -+ ssc_writel(chip->ssc->regs, PDC_TNCR, runtime->period_size * 2); -+ retval = IRQ_HANDLED; -+ } -+ -+ ssc_readl(chip->ssc->regs, IMR); -+ spin_unlock(&chip->lock); -+ -+ if (status & SSC_BIT(IMR_ENDTX)) -+ snd_pcm_period_elapsed(chip->substream); -+ -+ return retval; -+} -+ -+/* -+ * Mixer functions. -+ */ -+static int snd_at73c213_mono_get(struct snd_kcontrol *kcontrol, -+ struct snd_ctl_elem_value *ucontrol) -+{ -+ struct snd_at73c213 *chip = snd_kcontrol_chip(kcontrol); -+ int reg = kcontrol->private_value & 0xff; -+ int shift = (kcontrol->private_value >> 8) & 0xff; -+ int mask = (kcontrol->private_value >> 16) & 0xff; -+ int invert = (kcontrol->private_value >> 24) & 0xff; -+ -+ spin_lock_irq(&chip->lock); -+ -+ ucontrol->value.integer.value[0] = (chip->reg_image[reg] >> shift) & mask; -+ -+ if (invert) -+ ucontrol->value.integer.value[0] = -+ (mask - ucontrol->value.integer.value[0]); -+ -+ spin_unlock_irq(&chip->lock); -+ -+ return 0; -+} -+ -+static int snd_at73c213_mono_put(struct snd_kcontrol *kcontrol, -+ struct snd_ctl_elem_value *ucontrol) -+{ -+ struct snd_at73c213 *chip = snd_kcontrol_chip(kcontrol); -+ int reg = kcontrol->private_value & 0xff; -+ int shift = (kcontrol->private_value >> 8) & 0xff; -+ int mask = (kcontrol->private_value >> 16) & 0xff; -+ int invert = (kcontrol->private_value >> 24) & 0xff; -+ int change, retval; -+ unsigned short val; -+ -+ val = (ucontrol->value.integer.value[0] & mask); -+ if (invert) -+ val = mask - val; -+ val <<= shift; -+ -+ spin_lock_irq(&chip->lock); -+ -+ val = (chip->reg_image[reg] & ~(mask << shift)) | val; -+ change = val != chip->reg_image[reg]; -+ retval = snd_at73c213_write_reg(chip, reg, val); -+ -+ spin_unlock_irq(&chip->lock); -+ -+ if (retval) -+ return retval; -+ -+ return change; -+} -+ -+static int snd_at73c213_stereo_info(struct snd_kcontrol *kcontrol, -+ struct snd_ctl_elem_info *uinfo) -+{ -+ int mask = (kcontrol->private_value >> 24) & 0xff; -+ -+ if (mask == 1) -+ uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN; -+ else -+ uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; -+ -+ uinfo->count = 2; -+ uinfo->value.integer.min = 0; -+ uinfo->value.integer.max = mask; -+ -+ return 0; -+} -+ -+static int snd_at73c213_stereo_get(struct snd_kcontrol *kcontrol, -+ struct snd_ctl_elem_value *ucontrol) -+{ -+ struct snd_at73c213 *chip = snd_kcontrol_chip(kcontrol); -+ int left_reg = kcontrol->private_value & 0xff; -+ int right_reg = (kcontrol->private_value >> 8) & 0xff; -+ int shift_left = (kcontrol->private_value >> 16) & 0x07; -+ int shift_right = (kcontrol->private_value >> 19) & 0x07; -+ int mask = (kcontrol->private_value >> 24) & 0xff; -+ int invert = (kcontrol->private_value >> 22) & 1; -+ -+ spin_lock_irq(&chip->lock); -+ -+ ucontrol->value.integer.value[0] = -+ (chip->reg_image[left_reg] >> shift_left) & mask; -+ ucontrol->value.integer.value[1] = -+ (chip->reg_image[right_reg] >> shift_right) & mask; -+ -+ if (invert) { -+ ucontrol->value.integer.value[0] = -+ (mask - ucontrol->value.integer.value[0]); -+ ucontrol->value.integer.value[1] = -+ (mask - ucontrol->value.integer.value[1]); -+ } -+ -+ spin_unlock_irq(&chip->lock); -+ -+ return 0; -+} -+ -+static int snd_at73c213_stereo_put(struct snd_kcontrol *kcontrol, -+ struct snd_ctl_elem_value *ucontrol) -+{ -+ struct snd_at73c213 *chip = snd_kcontrol_chip(kcontrol); -+ int left_reg = kcontrol->private_value & 0xff; -+ int right_reg = (kcontrol->private_value >> 8) & 0xff; -+ int shift_left = (kcontrol->private_value >> 16) & 0x07; -+ int shift_right = (kcontrol->private_value >> 19) & 0x07; -+ int mask = (kcontrol->private_value >> 24) & 0xff; -+ int invert = (kcontrol->private_value >> 22) & 1; -+ int change, retval; -+ unsigned short val1, val2; -+ -+ val1 = ucontrol->value.integer.value[0] & mask; -+ val2 = ucontrol->value.integer.value[1] & mask; -+ if (invert) { -+ val1 = mask - val1; -+ val2 = mask - val2; -+ } -+ val1 <<= shift_left; -+ val2 <<= shift_right; -+ -+ spin_lock_irq(&chip->lock); -+ -+ val1 = (chip->reg_image[left_reg] & ~(mask << shift_left)) | val1; -+ val2 = (chip->reg_image[right_reg] & ~(mask << shift_right)) | val2; -+ change = val1 != chip->reg_image[left_reg] -+ || val2 != chip->reg_image[right_reg]; -+ retval = snd_at73c213_write_reg(chip, left_reg, val1); -+ if (retval) { -+ spin_unlock_irq(&chip->lock); -+ goto out; -+ } -+ retval = snd_at73c213_write_reg(chip, right_reg, val2); -+ if (retval) { -+ spin_unlock_irq(&chip->lock); -+ goto out; -+ } -+ -+ spin_unlock_irq(&chip->lock); -+ -+ return change; -+ -+out: -+ return retval; -+} -+ -+static int snd_at73c213_mono_switch_info(struct snd_kcontrol *kcontrol, -+ struct snd_ctl_elem_info *uinfo) -+{ -+ uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN; -+ uinfo->count = 1; -+ uinfo->value.integer.min = 0; -+ uinfo->value.integer.max = 1; -+ -+ return 0; -+} -+ -+static int snd_at73c213_mono_switch_get(struct snd_kcontrol *kcontrol, -+ struct snd_ctl_elem_value *ucontrol) -+{ -+ struct snd_at73c213 *chip = snd_kcontrol_chip(kcontrol); -+ int reg = kcontrol->private_value & 0xff; -+ int shift = (kcontrol->private_value >> 8) & 0xff; -+ int invert = (kcontrol->private_value >> 24) & 0xff; -+ -+ spin_lock_irq(&chip->lock); -+ -+ ucontrol->value.integer.value[0] = (chip->reg_image[reg] >> shift) & 0x01; -+ -+ if (invert) -+ ucontrol->value.integer.value[0] = -+ (0x01 - ucontrol->value.integer.value[0]); -+ -+ spin_unlock_irq(&chip->lock); -+ -+ return 0; -+} -+ -+static int snd_at73c213_mono_switch_put(struct snd_kcontrol *kcontrol, -+ struct snd_ctl_elem_value *ucontrol) -+{ -+ struct snd_at73c213 *chip = snd_kcontrol_chip(kcontrol); -+ int reg = kcontrol->private_value & 0xff; -+ int shift = (kcontrol->private_value >> 8) & 0xff; -+ int mask = (kcontrol->private_value >> 16) & 0xff; -+ int invert = (kcontrol->private_value >> 24) & 0xff; -+ int change, retval; -+ unsigned short val; -+ -+ if (ucontrol->value.integer.value[0]) -+ val = mask; -+ else -+ val = 0; -+ -+ if (invert) -+ val = mask - val; -+ val <<= shift; -+ -+ spin_lock_irq(&chip->lock); -+ -+ val |= (chip->reg_image[reg] & ~(mask << shift)); -+ change = val != chip->reg_image[reg]; -+ -+ retval = snd_at73c213_write_reg(chip, reg, val); -+ -+ spin_unlock_irq(&chip->lock); -+ -+ if (retval) -+ return retval; -+ -+ return change; -+} -+ -+static int snd_at73c213_pa_volume_info(struct snd_kcontrol *kcontrol, -+ struct snd_ctl_elem_info *uinfo) -+{ -+ uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; -+ uinfo->count = 1; -+ uinfo->value.integer.min = 0; -+ uinfo->value.integer.max = ((kcontrol->private_value >> 16) & 0xff) - 1; -+ -+ return 0; -+} -+ -+static int snd_at73c213_line_capture_volume_info( -+ struct snd_kcontrol *kcontrol, -+ struct snd_ctl_elem_info *uinfo) -+{ -+ uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; -+ uinfo->count = 2; -+ /* When inverted will give values 0x10001 => 0. */ -+ uinfo->value.integer.min = 14; -+ uinfo->value.integer.max = 31; -+ -+ return 0; -+} -+ -+static int snd_at73c213_aux_capture_volume_info( -+ struct snd_kcontrol *kcontrol, -+ struct snd_ctl_elem_info *uinfo) -+{ -+ uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; -+ uinfo->count = 1; -+ /* When inverted will give values 0x10001 => 0. */ -+ uinfo->value.integer.min = 14; -+ uinfo->value.integer.max = 31; -+ -+ return 0; -+} -+ -+#define AT73C213_MONO_SWITCH(xname, xindex, reg, shift, mask, invert) \ -+{ \ -+ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \ -+ .name = xname, \ -+ .index = xindex, \ -+ .info = snd_at73c213_mono_switch_info, \ -+ .get = snd_at73c213_mono_switch_get, \ -+ .put = snd_at73c213_mono_switch_put, \ -+ .private_value = (reg | (shift << 8) | (mask << 16) | (invert << 24)) \ -+} -+ -+#define AT73C213_STEREO(xname, xindex, left_reg, right_reg, shift_left, shift_right, mask, invert) \ -+{ \ -+ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \ -+ .name = xname, \ -+ .index = xindex, \ -+ .info = snd_at73c213_stereo_info, \ -+ .get = snd_at73c213_stereo_get, \ -+ .put = snd_at73c213_stereo_put, \ -+ .private_value = (left_reg | (right_reg << 8) \ -+ | (shift_left << 16) | (shift_right << 19) \ -+ | (mask << 24) | (invert << 22)) \ -+} -+ -+static struct snd_kcontrol_new snd_at73c213_controls[] __devinitdata = { -+AT73C213_STEREO("Master Playback Volume", 0, DAC_LMPG, DAC_RMPG, 0, 0, 0x1f, 1), -+AT73C213_STEREO("Master Playback Switch", 0, DAC_LMPG, DAC_RMPG, 5, 5, 1, 1), -+AT73C213_STEREO("PCM Playback Volume", 0, DAC_LLOG, DAC_RLOG, 0, 0, 0x1f, 1), -+AT73C213_STEREO("PCM Playback Switch", 0, DAC_LLOG, DAC_RLOG, 5, 5, 1, 1), -+AT73C213_MONO_SWITCH("Mono PA Playback Switch", 0, DAC_CTRL, DAC_CTRL_ONPADRV, 0x01, 0), -+{ -+ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, -+ .name = "PA Playback Volume", -+ .index = 0, -+ .info = snd_at73c213_pa_volume_info, -+ .get = snd_at73c213_mono_get, -+ .put = snd_at73c213_mono_put, -+ .private_value = PA_CTRL | (PA_CTRL_APAGAIN << 8) | (0x0f << 16) | (1 << 24), -+}, -+AT73C213_MONO_SWITCH("PA High Gain Playback Switch", 0, PA_CTRL, PA_CTRL_APALP, 0x01, 1), -+AT73C213_MONO_SWITCH("PA Playback Switch", 0, PA_CTRL, PA_CTRL_APAON, 0x01, 0), -+{ -+ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, -+ .name = "Aux Capture Volume", -+ .index = 0, -+ .info = snd_at73c213_aux_capture_volume_info, -+ .get = snd_at73c213_mono_get, -+ .put = snd_at73c213_mono_put, -+ .private_value = DAC_AUXG | (0 << 8) | (0x1f << 16) | (1 << 24), -+}, -+AT73C213_MONO_SWITCH("Aux Capture Switch", 0, DAC_CTRL, DAC_CTRL_ONAUXIN, 0x01, 0), -+{ -+ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, -+ .name = "Line Capture Volume", -+ .index = 0, -+ .info = snd_at73c213_line_capture_volume_info, -+ .get = snd_at73c213_stereo_get, -+ .put = snd_at73c213_stereo_put, -+ .private_value = DAC_LLIG | (DAC_RLIG << 8) | (0 << 16) | (0 << 19) -+ | (0x1f << 24) | (1 << 22), -+}, -+AT73C213_MONO_SWITCH("Line Capture Switch", 0, DAC_CTRL, 0, 0x03, 0), -+}; -+ -+static int __devinit snd_at73c213_mixer(struct snd_at73c213 *chip) -+{ -+ struct snd_card *card; -+ int errval, idx; -+ -+ if (chip == NULL || chip->pcm == NULL) -+ return -EINVAL; -+ -+ card = chip->card; -+ -+ strcpy(card->mixername, chip->pcm->name); -+ -+ for (idx = 0; idx < ARRAY_SIZE(snd_at73c213_controls); idx++) { -+ errval = snd_ctl_add(card, -+ snd_ctl_new1(&snd_at73c213_controls[idx], -+ chip)); -+ if (errval < 0) -+ goto cleanup; -+ } -+ -+ return 0; -+ -+cleanup: -+ for (idx = 1; idx < ARRAY_SIZE(snd_at73c213_controls) + 1; idx++) { -+ struct snd_kcontrol *kctl; -+ kctl = snd_ctl_find_numid(card, idx); -+ if (kctl) -+ snd_ctl_remove(card, kctl); -+ } -+ return errval; -+} -+ -+/* -+ * Device functions -+ */ -+static int snd_at73c213_ssc_init(struct snd_at73c213 *chip) -+{ -+ /* -+ * Continuous clock output. -+ * Starts on falling TF. -+ * Delay 1 cycle (1 bit). -+ * Periode is 16 bit (16 - 1). -+ */ -+ ssc_writel(chip->ssc->regs, TCMR, -+ SSC_BF(TCMR_CKO, 1) -+ | SSC_BF(TCMR_START, 4) -+ | SSC_BF(TCMR_STTDLY, 1) -+ | SSC_BF(TCMR_PERIOD, 16 - 1)); -+ /* -+ * Data length is 16 bit (16 - 1). -+ * Transmit MSB first. -+ * Transmit 2 words each transfer. -+ * Frame sync length is 16 bit (16 - 1). -+ * Frame starts on negative pulse. -+ */ -+ ssc_writel(chip->ssc->regs, TFMR, -+ SSC_BF(TFMR_DATLEN, 16 - 1) -+ | SSC_BIT(TFMR_MSBF) -+ | SSC_BF(TFMR_DATNB, 1) -+ | SSC_BF(TFMR_FSLEN, 16 - 1) -+ | SSC_BF(TFMR_FSOS, 1)); -+ -+ return 0; -+} -+ -+static int snd_at73c213_chip_init(struct snd_at73c213 *chip) -+{ -+ int retval; -+ unsigned char dac_ctrl = 0; -+ -+ retval = snd_at73c213_set_bitrate(chip); -+ if (retval) -+ goto out; -+ -+ /* Enable DAC master clock. */ -+ clk_enable(chip->board->dac_clk); -+ -+ /* Initialize at73c213 on SPI bus. */ -+ retval = snd_at73c213_write_reg(chip, DAC_RST, 0x04); -+ if (retval) -+ goto out_clk; -+ msleep(1); -+ retval = snd_at73c213_write_reg(chip, DAC_RST, 0x03); -+ if (retval) -+ goto out_clk; -+ -+ /* Precharge everything. */ -+ retval = snd_at73c213_write_reg(chip, DAC_PRECH, 0xff); -+ if (retval) -+ goto out_clk; -+ retval = snd_at73c213_write_reg(chip, PA_CTRL, (1<<PA_CTRL_APAPRECH)); -+ if (retval) -+ goto out_clk; -+ retval = snd_at73c213_write_reg(chip, DAC_CTRL, -+ (1<<DAC_CTRL_ONLNOL) | (1<<DAC_CTRL_ONLNOR)); -+ if (retval) -+ goto out_clk; -+ -+ msleep(50); -+ -+ /* Stop precharging PA. */ -+ retval = snd_at73c213_write_reg(chip, PA_CTRL, -+ (1<<PA_CTRL_APALP) | 0x0f); -+ if (retval) -+ goto out_clk; -+ -+ msleep(450); -+ -+ /* Stop precharging DAC, turn on master power. */ -+ retval = snd_at73c213_write_reg(chip, DAC_PRECH, (1<<DAC_PRECH_ONMSTR)); -+ if (retval) -+ goto out_clk; -+ -+ msleep(1); -+ -+ /* Turn on DAC. */ -+ dac_ctrl = (1<<DAC_CTRL_ONDACL) | (1<<DAC_CTRL_ONDACR) -+ | (1<<DAC_CTRL_ONLNOL) | (1<<DAC_CTRL_ONLNOR); -+ -+ retval = snd_at73c213_write_reg(chip, DAC_CTRL, dac_ctrl); -+ if (retval) -+ goto out_clk; -+ -+ /* Mute sound. */ -+ retval = snd_at73c213_write_reg(chip, DAC_LMPG, 0x3f); -+ if (retval) -+ goto out_clk; -+ retval = snd_at73c213_write_reg(chip, DAC_RMPG, 0x3f); -+ if (retval) -+ goto out_clk; -+ retval = snd_at73c213_write_reg(chip, DAC_LLOG, 0x3f); -+ if (retval) -+ goto out_clk; -+ retval = snd_at73c213_write_reg(chip, DAC_RLOG, 0x3f); -+ if (retval) -+ goto out_clk; -+ retval = snd_at73c213_write_reg(chip, DAC_LLIG, 0x11); -+ if (retval) -+ goto out_clk; -+ retval = snd_at73c213_write_reg(chip, DAC_RLIG, 0x11); -+ if (retval) -+ goto out_clk; -+ retval = snd_at73c213_write_reg(chip, DAC_AUXG, 0x11); -+ if (retval) -+ goto out_clk; -+ -+ /* Enable I2S device, i.e. clock output. */ -+ ssc_writel(chip->ssc->regs, CR, SSC_BIT(CR_TXEN)); -+ -+ goto out; -+ -+out_clk: -+ clk_disable(chip->board->dac_clk); -+out: -+ return retval; -+} -+ -+static int snd_at73c213_dev_free(struct snd_device *device) -+{ -+ struct snd_at73c213 *chip = device->device_data; -+ -+ ssc_writel(chip->ssc->regs, CR, SSC_BIT(CR_TXDIS)); -+ if (chip->irq >= 0) { -+ free_irq(chip->irq, chip); -+ chip->irq = -1; -+ } -+ -+ return 0; -+} -+ -+static int __devinit snd_at73c213_dev_init(struct snd_card *card, -+ struct spi_device *spi) -+{ -+ static struct snd_device_ops ops = { -+ .dev_free = snd_at73c213_dev_free, -+ }; -+ struct snd_at73c213 *chip = get_chip(card); -+ int irq, retval; -+ -+ irq = chip->ssc->irq; -+ if (irq < 0) -+ return irq; -+ -+ spin_lock_init(&chip->lock); -+ chip->card = card; -+ chip->irq = -1; -+ -+ retval = request_irq(irq, snd_at73c213_interrupt, 0, "at73c213", chip); -+ if (retval) { -+ dev_dbg(&chip->spi->dev, "unable to request irq %d\n", irq); -+ goto out; -+ } -+ chip->irq = irq; -+ -+ memcpy(&chip->reg_image, &snd_at73c213_original_image, -+ sizeof(snd_at73c213_original_image)); -+ -+ retval = snd_at73c213_ssc_init(chip); -+ if (retval) -+ goto out_irq; -+ -+ retval = snd_at73c213_chip_init(chip); -+ if (retval) -+ goto out_irq; -+ -+ retval = snd_at73c213_pcm_new(chip, 0); -+ if (retval) -+ goto out_irq; -+ -+ retval = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops); -+ if (retval) -+ goto out_irq; -+ -+ retval = snd_at73c213_mixer(chip); -+ if (retval) -+ goto out_snd_dev; -+ -+ snd_card_set_dev(card, &spi->dev); -+ -+ goto out; -+ -+out_snd_dev: -+ snd_device_free(card, chip); -+out_irq: -+ free_irq(chip->irq, chip); -+ chip->irq = -1; -+out: -+ return retval; -+} -+ -+static int snd_at73c213_probe(struct spi_device *spi) -+{ -+ struct snd_card *card; -+ struct snd_at73c213 *chip; -+ struct at73c213_board_info *board; -+ int retval; -+ char id[16]; -+ -+ board = spi->dev.platform_data; -+ if (!board) { -+ dev_dbg(&spi->dev, "no platform_data\n"); -+ return -ENXIO; -+ } -+ -+ if (!board->dac_clk) { -+ dev_dbg(&spi->dev, "no DAC clk\n"); -+ return -ENXIO; -+ } -+ -+ if (IS_ERR(board->dac_clk)) { -+ dev_dbg(&spi->dev, "no DAC clk\n"); -+ return PTR_ERR(board->dac_clk); -+ } -+ -+ retval = -ENOMEM; -+ -+ /* Allocate "card" using some unused identifiers. */ -+ snprintf(id, sizeof id, "at73c213_%d", board->ssc_id); -+ card = snd_card_new(-1, id, THIS_MODULE, sizeof(struct snd_at73c213)); -+ if (!card) -+ goto out; -+ -+ chip = card->private_data; -+ chip->spi = spi; -+ chip->board = board; -+ -+ chip->ssc = ssc_request(board->ssc_id); -+ if (IS_ERR(chip->ssc)) { -+ dev_dbg(&spi->dev, "could not get ssc%d device\n", -+ board->ssc_id); -+ retval = PTR_ERR(chip->ssc); -+ goto out_card; -+ } -+ -+ retval = snd_at73c213_dev_init(card, spi); -+ if (retval) -+ goto out_ssc; -+ -+ strcpy(card->driver, "at73c213"); -+ strcpy(card->shortname, board->shortname); -+ sprintf(card->longname, "%s on irq %d", card->shortname, chip->irq); -+ -+ retval = snd_card_register(card); -+ if (retval) -+ goto out_ssc; -+ -+ dev_set_drvdata(&spi->dev, card); -+ -+ goto out; -+ -+out_ssc: -+ ssc_free(chip->ssc); -+out_card: -+ snd_card_free(card); -+out: -+ return retval; -+} -+ -+static int __devexit snd_at73c213_remove(struct spi_device *spi) -+{ -+ struct snd_card *card = dev_get_drvdata(&spi->dev); -+ struct snd_at73c213 *chip = card->private_data; -+ int retval; -+ -+ /* Stop playback. */ -+ ssc_writel(chip->ssc->regs, CR, SSC_BIT(CR_TXDIS)); -+ -+ /* Mute sound. */ -+ retval = snd_at73c213_write_reg(chip, DAC_LMPG, 0x3f); -+ if (retval) -+ goto out; -+ retval = snd_at73c213_write_reg(chip, DAC_RMPG, 0x3f); -+ if (retval) -+ goto out; -+ retval = snd_at73c213_write_reg(chip, DAC_LLOG, 0x3f); -+ if (retval) -+ goto out; -+ retval = snd_at73c213_write_reg(chip, DAC_RLOG, 0x3f); -+ if (retval) -+ goto out; -+ retval = snd_at73c213_write_reg(chip, DAC_LLIG, 0x11); -+ if (retval) -+ goto out; -+ retval = snd_at73c213_write_reg(chip, DAC_RLIG, 0x11); -+ if (retval) -+ goto out; -+ retval = snd_at73c213_write_reg(chip, DAC_AUXG, 0x11); -+ if (retval) -+ goto out; -+ -+ /* Turn off PA. */ -+ retval = snd_at73c213_write_reg(chip, PA_CTRL, (chip->reg_image[PA_CTRL]|0x0f)); -+ if (retval) -+ goto out; -+ msleep(10); -+ retval = snd_at73c213_write_reg(chip, PA_CTRL, (1<<PA_CTRL_APALP)|0x0f); -+ if (retval) -+ goto out; -+ -+ /* Turn off external DAC. */ -+ retval = snd_at73c213_write_reg(chip, DAC_CTRL, 0x0c); -+ if (retval) -+ goto out; -+ msleep(2); -+ retval = snd_at73c213_write_reg(chip, DAC_CTRL, 0x00); -+ if (retval) -+ goto out; -+ -+ /* Turn off master power. */ -+ retval = snd_at73c213_write_reg(chip, DAC_PRECH, 0x00); -+ if (retval) -+ goto out; -+ -+out: -+ /* Stop DAC master clock. */ -+ clk_disable(chip->board->dac_clk); -+ -+ ssc_free(chip->ssc); -+ snd_card_free(card); -+ dev_set_drvdata(&spi->dev, NULL); -+ -+ return 0; -+} -+ -+#ifdef CONFIG_PM -+static int snd_at73c213_suspend(struct spi_device *spi, pm_message_t msg) -+{ -+ struct snd_card *card = dev_get_drvdata(&spi->dev); -+ struct snd_at73c213 *chip = card->private_data; -+ -+ ssc_writel(chip->ssc->regs, CR, SSC_BIT(CR_TXDIS)); -+ clk_disable(chip->board->dac_clk); -+ -+ return 0; -+} -+ -+static int snd_at73c213_resume(struct spi_device *spi) -+{ -+ struct snd_card *card = dev_get_drvdata(&spi->dev); -+ struct snd_at73c213 *chip = card->private_data; -+ -+ clk_enable(chip->board->dac_clk); -+ ssc_writel(chip->ssc->regs, CR, SSC_BIT(CR_TXEN)); -+ -+ return 0; -+} -+#else -+#define snd_at73c213_suspend NULL -+#define snd_at73c213_resume NULL -+#endif -+ -+static struct spi_driver at73c213_driver = { -+ .driver = { -+ .name = "at73c213", -+ }, -+ .probe = snd_at73c213_probe, -+ .suspend = snd_at73c213_suspend, -+ .resume = snd_at73c213_resume, -+ .remove = __devexit_p(snd_at73c213_remove), -+}; -+ -+static int __init at73c213_init(void) -+{ -+ return spi_register_driver(&at73c213_driver); -+} -+module_init(at73c213_init); -+ -+static void __exit at73c213_exit(void) -+{ -+ spi_unregister_driver(&at73c213_driver); -+} -+module_exit(at73c213_exit); -+ -+MODULE_AUTHOR("Hans-Christian Egtvedt <hcegtvedt@atmel.com>"); -+MODULE_DESCRIPTION("Sound driver for AT73C213 with Atmel SSC"); -+MODULE_LICENSE("GPL"); -diff --git a/sound/spi/at73c213.h b/sound/spi/at73c213.h -new file mode 100644 -index 0000000..fd8b372 ---- /dev/null -+++ b/sound/spi/at73c213.h -@@ -0,0 +1,119 @@ -+/* -+ * Driver for the AT73C213 16-bit stereo DAC on Atmel ATSTK1000 -+ * -+ * Copyright (C) 2006 - 2007 Atmel Corporation -+ * -+ * This program is free software; you can redistribute it and/or -+ * modify it under the terms of the GNU General Public License as -+ * published by the Free Software Foundation; either version 2 of the -+ * License, or (at your option) any later version. -+ * -+ * This program is distributed in the hope that it will be useful, but -+ * WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU -+ * General Public License for more details. -+ * -+ * You should have received a copy of the GNU General Public License -+ * along with this program; if not, write to the Free Software -+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA -+ * 02111-1307, USA. -+ * -+ * The full GNU General Public License is included in this -+ * distribution in the file called COPYING. -+ */ -+ -+#ifndef _SND_AT73C213_H -+#define _SND_AT73C213_H -+ -+/* DAC control register */ -+#define DAC_CTRL 0x00 -+#define DAC_CTRL_ONPADRV 7 -+#define DAC_CTRL_ONAUXIN 6 -+#define DAC_CTRL_ONDACR 5 -+#define DAC_CTRL_ONDACL 4 -+#define DAC_CTRL_ONLNOR 3 -+#define DAC_CTRL_ONLNOL 2 -+#define DAC_CTRL_ONLNIR 1 -+#define DAC_CTRL_ONLNIL 0 -+ -+/* DAC left line in gain register */ -+#define DAC_LLIG 0x01 -+#define DAC_LLIG_LLIG 0 -+ -+/* DAC right line in gain register */ -+#define DAC_RLIG 0x02 -+#define DAC_RLIG_RLIG 0 -+ -+/* DAC Left Master Playback Gain Register */ -+#define DAC_LMPG 0x03 -+#define DAC_LMPG_LMPG 0 -+ -+/* DAC Right Master Playback Gain Register */ -+#define DAC_RMPG 0x04 -+#define DAC_RMPG_RMPG 0 -+ -+/* DAC Left Line Out Gain Register */ -+#define DAC_LLOG 0x05 -+#define DAC_LLOG_LLOG 0 -+ -+/* DAC Right Line Out Gain Register */ -+#define DAC_RLOG 0x06 -+#define DAC_RLOG_RLOG 0 -+ -+/* DAC Output Level Control Register */ -+#define DAC_OLC 0x07 -+#define DAC_OLC_RSHORT 7 -+#define DAC_OLC_ROLC 4 -+#define DAC_OLC_LSHORT 3 -+#define DAC_OLC_LOLC 0 -+ -+/* DAC Mixer Control Register */ -+#define DAC_MC 0x08 -+#define DAC_MC_INVR 5 -+#define DAC_MC_INVL 4 -+#define DAC_MC_RMSMIN2 3 -+#define DAC_MC_RMSMIN1 2 -+#define DAC_MC_LMSMIN2 1 -+#define DAC_MC_LMSMIN1 0 -+ -+/* DAC Clock and Sampling Frequency Control Register */ -+#define DAC_CSFC 0x09 -+#define DAC_CSFC_OVRSEL 4 -+ -+/* DAC Miscellaneous Register */ -+#define DAC_MISC 0x0A -+#define DAC_MISC_VCMCAPSEL 7 -+#define DAC_MISC_DINTSEL 4 -+#define DAC_MISC_DITHEN 3 -+#define DAC_MISC_DEEMPEN 2 -+#define DAC_MISC_NBITS 0 -+ -+/* DAC Precharge Control Register */ -+#define DAC_PRECH 0x0C -+#define DAC_PRECH_PRCHGPDRV 7 -+#define DAC_PRECH_PRCHGAUX1 6 -+#define DAC_PRECH_PRCHGLNOR 5 -+#define DAC_PRECH_PRCHGLNOL 4 -+#define DAC_PRECH_PRCHGLNIR 3 -+#define DAC_PRECH_PRCHGLNIL 2 -+#define DAC_PRECH_PRCHG 1 -+#define DAC_PRECH_ONMSTR 0 -+ -+/* DAC Auxiliary Input Gain Control Register */ -+#define DAC_AUXG 0x0D -+#define DAC_AUXG_AUXG 0 -+ -+/* DAC Reset Register */ -+#define DAC_RST 0x10 -+#define DAC_RST_RESMASK 2 -+#define DAC_RST_RESFILZ 1 -+#define DAC_RST_RSTZ 0 -+ -+/* Power Amplifier Control Register */ -+#define PA_CTRL 0x11 -+#define PA_CTRL_APAON 6 -+#define PA_CTRL_APAPRECH 5 -+#define PA_CTRL_APALP 4 -+#define PA_CTRL_APAGAIN 0 -+ -+#endif /* _SND_AT73C213_H */ diff --git a/target/device/Atmel/arch-avr32/kernel-patches-2.6.23/linux-2.6.23-200-fix-include-typo-for-atngw100-board.patch b/target/device/Atmel/arch-avr32/kernel-patches-2.6.23/linux-2.6.23-200-fix-include-typo-for-atngw100-board.patch deleted file mode 100644 index 99a9d149b..000000000 --- a/target/device/Atmel/arch-avr32/kernel-patches-2.6.23/linux-2.6.23-200-fix-include-typo-for-atngw100-board.patch +++ /dev/null @@ -1,11 +0,0 @@ ---- a/arch/avr32/boards/atngw100/setup.c 2007-11-02 10:47:52.000000000 +0100 -+++ b/arch/avr32/boards/atngw100/setup.c 2007-11-02 10:48:00.000000000 +0100 -@@ -20,7 +20,7 @@ - #include <asm/io.h> - #include <asm/setup.h> - --#include <asm/arch/at32ap7000.h> -+#include <asm/arch/at32ap700x.h> - #include <asm/arch/board.h> - #include <asm/arch/init.h> - #include <asm/arch/portmux.h> diff --git a/target/device/Atmel/arch-avr32/kernel-patches-2.6.24/linux-2.6.24-100-avr32-git.1.patch b/target/device/Atmel/arch-avr32/kernel-patches-2.6.24/linux-2.6.24-100-avr32-git.1.patch deleted file mode 100644 index 173000063..000000000 --- a/target/device/Atmel/arch-avr32/kernel-patches-2.6.24/linux-2.6.24-100-avr32-git.1.patch +++ /dev/null @@ -1,16922 +0,0 @@ -diff -Nrup linux-2.6.24/arch/arm/mach-at91/at91sam9261_devices.c linux-avr32/arch/arm/mach-at91/at91sam9261_devices.c ---- linux-2.6.24/arch/arm/mach-at91/at91sam9261_devices.c 2008-01-24 17:58:37.000000000 -0500 -+++ linux-avr32/arch/arm/mach-at91/at91sam9261_devices.c 2008-02-01 14:51:35.000000000 -0500 -@@ -530,6 +530,20 @@ void __init at91_add_device_lcdc(struct - at91_set_B_periph(AT91_PIN_PB27, 0); /* LCDD22 */ - at91_set_B_periph(AT91_PIN_PB28, 0); /* LCDD23 */ - -+#ifdef CONFIG_FB_INTSRAM -+ { -+ void __iomem *fb; -+ struct resource *fb_res = &lcdc_resources[2]; -+ size_t fb_len = fb_res->end - fb_res->start + 1; -+ -+ fb = ioremap_writecombine(fb_res->start, fb_len); -+ if (fb) { -+ memset(fb, 0, fb_len); -+ iounmap(fb, fb_len); -+ } -+ } -+#endif -+ - lcdc_data = *data; - platform_device_register(&at91_lcdc_device); - } -diff -Nrup linux-2.6.24/arch/arm/mach-at91/at91sam9rl_devices.c linux-avr32/arch/arm/mach-at91/at91sam9rl_devices.c ---- linux-2.6.24/arch/arm/mach-at91/at91sam9rl_devices.c 2008-01-24 17:58:37.000000000 -0500 -+++ linux-avr32/arch/arm/mach-at91/at91sam9rl_devices.c 2008-02-01 14:51:35.000000000 -0500 -@@ -375,6 +375,20 @@ void __init at91_add_device_lcdc(struct - at91_set_B_periph(AT91_PIN_PC24, 0); /* LCDD22 */ - at91_set_B_periph(AT91_PIN_PC25, 0); /* LCDD23 */ - -+#ifdef CONFIG_FB_INTSRAM -+ { -+ void __iomem *fb; -+ struct resource *fb_res = &lcdc_resources[2]; -+ size_t fb_len = fb_res->end - fb_res->start + 1; -+ -+ fb = ioremap_writecombine(fb_res->start, fb_len); -+ if (fb) { -+ memset(fb, 0, fb_len); -+ iounmap(fb, fb_len); -+ } -+ } -+#endif -+ - lcdc_data = *data; - platform_device_register(&at91_lcdc_device); - } -diff -Nrup linux-2.6.24/arch/avr32/boards/atngw100/Kconfig linux-avr32/arch/avr32/boards/atngw100/Kconfig ---- linux-2.6.24/arch/avr32/boards/atngw100/Kconfig 1969-12-31 19:00:00.000000000 -0500 -+++ linux-avr32/arch/avr32/boards/atngw100/Kconfig 2008-02-01 14:51:35.000000000 -0500 -@@ -0,0 +1,12 @@ -+# NGW100 customization -+ -+config BOARD_ATNGW100_I2C_GPIO -+ bool "Use GPIO for i2c instead of built-in TWI module" -+ help -+ The driver for the built-in TWI module has been plagued by -+ various problems, while the i2c-gpio driver is based on the -+ trusty old i2c-algo-bit bitbanging engine, making it work -+ on pretty much any setup. -+ -+ Choose 'Y' here if you're having i2c-related problems and -+ want to rule out the i2c bus driver. -diff -Nrup linux-2.6.24/arch/avr32/boards/atngw100/setup.c linux-avr32/arch/avr32/boards/atngw100/setup.c ---- linux-2.6.24/arch/avr32/boards/atngw100/setup.c 2008-01-24 17:58:37.000000000 -0500 -+++ linux-avr32/arch/avr32/boards/atngw100/setup.c 2008-02-01 14:51:35.000000000 -0500 -@@ -20,7 +20,7 @@ - #include <asm/io.h> - #include <asm/setup.h> - --#include <asm/arch/at32ap7000.h> -+#include <asm/arch/at32ap700x.h> - #include <asm/arch/board.h> - #include <asm/arch/init.h> - #include <asm/arch/portmux.h> -@@ -42,6 +42,11 @@ static struct spi_board_info spi0_board_ - }, - }; - -+static struct mci_platform_data __initdata mci0_data = { -+ .detect_pin = GPIO_PIN_PC(25), -+ .wp_pin = GPIO_PIN_PE(0), -+}; -+ - /* - * The next two functions should go away as the boot loader is - * supposed to initialize the macb address registers with a valid -@@ -124,6 +129,7 @@ static struct platform_device ngw_gpio_l - } - }; - -+#ifdef CONFIG_BOARD_ATNGW100_I2C_GPIO - static struct i2c_gpio_platform_data i2c_gpio_data = { - .sda_pin = GPIO_PIN_PA(6), - .scl_pin = GPIO_PIN_PA(7), -@@ -139,6 +145,7 @@ static struct platform_device i2c_gpio_d - .platform_data = &i2c_gpio_data, - }, - }; -+#endif - - static int __init atngw100_init(void) - { -@@ -157,6 +164,7 @@ static int __init atngw100_init(void) - set_hw_addr(at32_add_device_eth(1, ð_data[1])); - - at32_add_device_spi(0, spi0_board_info, ARRAY_SIZE(spi0_board_info)); -+ at32_add_device_mci(0, &mci0_data); - at32_add_device_usba(0, NULL); - - for (i = 0; i < ARRAY_SIZE(ngw_leds); i++) { -@@ -165,11 +173,15 @@ static int __init atngw100_init(void) - } - platform_device_register(&ngw_gpio_leds); - -+#ifdef CONFIG_BOARD_ATNGW100_I2C_GPIO - at32_select_gpio(i2c_gpio_data.sda_pin, - AT32_GPIOF_MULTIDRV | AT32_GPIOF_OUTPUT | AT32_GPIOF_HIGH); - at32_select_gpio(i2c_gpio_data.scl_pin, - AT32_GPIOF_MULTIDRV | AT32_GPIOF_OUTPUT | AT32_GPIOF_HIGH); - platform_device_register(&i2c_gpio_device); -+#else -+ at32_add_device_twi(0); -+#endif - - return 0; - } -diff -Nrup linux-2.6.24/arch/avr32/boards/atstk1000/atstk1000.h linux-avr32/arch/avr32/boards/atstk1000/atstk1000.h ---- linux-2.6.24/arch/avr32/boards/atstk1000/atstk1000.h 2008-01-24 17:58:37.000000000 -0500 -+++ linux-avr32/arch/avr32/boards/atstk1000/atstk1000.h 2008-02-01 14:51:35.000000000 -0500 -@@ -12,4 +12,6 @@ - - extern struct atmel_lcdfb_info atstk1000_lcdc_data; - -+void atstk1000_setup_j2_leds(void); -+ - #endif /* __ARCH_AVR32_BOARDS_ATSTK1000_ATSTK1000_H */ -diff -Nrup linux-2.6.24/arch/avr32/boards/atstk1000/atstk1002.c linux-avr32/arch/avr32/boards/atstk1000/atstk1002.c ---- linux-2.6.24/arch/avr32/boards/atstk1000/atstk1002.c 2008-01-24 17:58:37.000000000 -0500 -+++ linux-avr32/arch/avr32/boards/atstk1000/atstk1002.c 2008-02-01 14:51:35.000000000 -0500 -@@ -11,7 +11,6 @@ - #include <linux/etherdevice.h> - #include <linux/init.h> - #include <linux/kernel.h> --#include <linux/leds.h> - #include <linux/platform_device.h> - #include <linux/string.h> - #include <linux/types.h> -@@ -22,7 +21,7 @@ - - #include <asm/io.h> - #include <asm/setup.h> --#include <asm/arch/at32ap7000.h> -+#include <asm/arch/at32ap700x.h> - #include <asm/arch/board.h> - #include <asm/arch/init.h> - #include <asm/arch/portmux.h> -@@ -49,18 +48,16 @@ static struct eth_platform_data __initda - }, - }; - --#ifndef CONFIG_BOARD_ATSTK1002_SW1_CUSTOM --#ifndef CONFIG_BOARD_ATSTK1002_SW3_CUSTOM -+#ifdef CONFIG_BOARD_ATSTK1000_EXTDAC - static struct at73c213_board_info at73c213_data = { - .ssc_id = 0, - .shortname = "AVR32 STK1000 external DAC", - }; - #endif --#endif - --#ifndef CONFIG_BOARD_ATSTK1002_SW1_CUSTOM -+#ifndef CONFIG_BOARD_ATSTK100X_SW1_CUSTOM - static struct spi_board_info spi0_board_info[] __initdata = { --#ifndef CONFIG_BOARD_ATSTK1002_SW3_CUSTOM -+#ifdef CONFIG_BOARD_ATSTK1000_EXTDAC - { - /* AT73C213 */ - .modalias = "at73c213", -@@ -80,12 +77,25 @@ static struct spi_board_info spi0_board_ - }; - #endif - --#ifdef CONFIG_BOARD_ATSTK1002_SPI1 -+#ifdef CONFIG_BOARD_ATSTK100X_SPI1 - static struct spi_board_info spi1_board_info[] __initdata = { { - /* patch in custom entries here */ - } }; - #endif - -+static struct cf_platform_data __initdata cf0_data = { -+#ifdef CONFIG_BOARD_ATSTK1000_CF_HACKS -+ .detect_pin = CONFIG_BOARD_ATSTK1000_CF_DETECT_PIN, -+ .reset_pin = CONFIG_BOARD_ATSTK1000_CF_RESET_PIN, -+#else -+ .detect_pin = GPIO_PIN_NONE, -+ .reset_pin = GPIO_PIN_NONE, -+#endif -+ .vcc_pin = GPIO_PIN_NONE, -+ .ready_pin = GPIO_PIN_PB(27), -+ .cs = 4, -+}; -+ - /* - * The next two functions should go away as the boot loader is - * supposed to initialize the macb address registers with a valid -@@ -141,68 +151,8 @@ static void __init set_hw_addr(struct pl - clk_put(pclk); - } - --#ifdef CONFIG_BOARD_ATSTK1002_J2_LED -- --static struct gpio_led stk_j2_led[] = { --#ifdef CONFIG_BOARD_ATSTK1002_J2_LED8 --#define LEDSTRING "J2 jumpered to LED8" -- { .name = "led0:amber", .gpio = GPIO_PIN_PB( 8), }, -- { .name = "led1:amber", .gpio = GPIO_PIN_PB( 9), }, -- { .name = "led2:amber", .gpio = GPIO_PIN_PB(10), }, -- { .name = "led3:amber", .gpio = GPIO_PIN_PB(13), }, -- { .name = "led4:amber", .gpio = GPIO_PIN_PB(14), }, -- { .name = "led5:amber", .gpio = GPIO_PIN_PB(15), }, -- { .name = "led6:amber", .gpio = GPIO_PIN_PB(16), }, -- { .name = "led7:amber", .gpio = GPIO_PIN_PB(30), -- .default_trigger = "heartbeat", }, --#else /* RGB */ --#define LEDSTRING "J2 jumpered to RGB LEDs" -- { .name = "r1:red", .gpio = GPIO_PIN_PB( 8), }, -- { .name = "g1:green", .gpio = GPIO_PIN_PB(10), }, -- { .name = "b1:blue", .gpio = GPIO_PIN_PB(14), }, -- -- { .name = "r2:red", .gpio = GPIO_PIN_PB( 9), -- .default_trigger = "heartbeat", }, -- { .name = "g2:green", .gpio = GPIO_PIN_PB(13), }, -- { .name = "b2:blue", .gpio = GPIO_PIN_PB(15), -- .default_trigger = "heartbeat", }, -- /* PB16, PB30 unused */ --#endif --}; -- --static struct gpio_led_platform_data stk_j2_led_data = { -- .num_leds = ARRAY_SIZE(stk_j2_led), -- .leds = stk_j2_led, --}; -- --static struct platform_device stk_j2_led_dev = { -- .name = "leds-gpio", -- .id = 2, /* gpio block J2 */ -- .dev = { -- .platform_data = &stk_j2_led_data, -- }, --}; -- --static void setup_j2_leds(void) --{ -- unsigned i; -- -- for (i = 0; i < ARRAY_SIZE(stk_j2_led); i++) -- at32_select_gpio(stk_j2_led[i].gpio, AT32_GPIOF_OUTPUT); -- -- printk("STK1002: " LEDSTRING "\n"); -- platform_device_register(&stk_j2_led_dev); --} -- --#else --static void setup_j2_leds(void) --{ --} --#endif -- --#ifndef CONFIG_BOARD_ATSTK1002_SW1_CUSTOM --#ifndef CONFIG_BOARD_ATSTK1002_SW3_CUSTOM --static void __init at73c213_set_clk(struct at73c213_board_info *info) -+#ifdef CONFIG_BOARD_ATSTK1000_EXTDAC -+static void __init atstk1002_setup_extdac(void) - { - struct clk *gclk; - struct clk *pll; -@@ -220,7 +170,7 @@ static void __init at73c213_set_clk(stru - } - - at32_select_periph(GPIO_PIN_PA(30), GPIO_PERIPH_A, 0); -- info->dac_clk = gclk; -+ at73c213_data.dac_clk = gclk; - - err_set_clk: - clk_put(pll); -@@ -229,12 +179,16 @@ err_pll: - err_gclk: - return; - } --#endif --#endif -+#else -+static void __init atstk1002_setup_extdac(void) -+{ -+ -+} -+#endif /* CONFIG_BOARD_ATSTK1000_EXTDAC */ - - void __init setup_board(void) - { --#ifdef CONFIG_BOARD_ATSTK1002_SW2_CUSTOM -+#ifdef CONFIG_BOARD_ATSTK100X_SW2_CUSTOM - at32_map_usart(0, 1); /* USART 0/B: /dev/ttyS1, IRDA */ - #else - at32_map_usart(1, 0); /* USART 1/A: /dev/ttyS0, DB9 */ -@@ -271,7 +225,7 @@ static int __init atstk1002_init(void) - - at32_add_system_devices(); - --#ifdef CONFIG_BOARD_ATSTK1002_SW2_CUSTOM -+#ifdef CONFIG_BOARD_ATSTK100X_SW2_CUSTOM - at32_add_device_usart(1); - #else - at32_add_device_usart(0); -@@ -281,12 +235,16 @@ static int __init atstk1002_init(void) - #ifndef CONFIG_BOARD_ATSTK1002_SW6_CUSTOM - set_hw_addr(at32_add_device_eth(0, ð_data[0])); - #endif --#ifndef CONFIG_BOARD_ATSTK1002_SW1_CUSTOM -+#ifndef CONFIG_BOARD_ATSTK100X_SW1_CUSTOM - at32_add_device_spi(0, spi0_board_info, ARRAY_SIZE(spi0_board_info)); - #endif --#ifdef CONFIG_BOARD_ATSTK1002_SPI1 -+#ifdef CONFIG_BOARD_ATSTK100X_SPI1 - at32_add_device_spi(1, spi1_board_info, ARRAY_SIZE(spi1_board_info)); - #endif -+ at32_add_device_twi(0); -+#ifndef CONFIG_BOARD_ATSTK100X_SW2_CUSTOM -+ at32_add_device_mci(0, NULL); -+#endif - #ifdef CONFIG_BOARD_ATSTK1002_SW5_CUSTOM - set_hw_addr(at32_add_device_eth(1, ð_data[1])); - #else -@@ -294,17 +252,18 @@ static int __init atstk1002_init(void) - fbmem_start, fbmem_size); - #endif - at32_add_device_usba(0, NULL); --#ifndef CONFIG_BOARD_ATSTK1002_SW3_CUSTOM -+#ifdef CONFIG_BOARD_ATSTK100X_ENABLE_AC97 -+ at32_add_device_ac97c(0); -+#else -+ at32_add_device_abdac(0); -+#endif -+#ifndef CONFIG_BOARD_ATSTK100X_SW3_CUSTOM - at32_add_device_ssc(0, ATMEL_SSC_TX); - #endif -+ at32_add_device_cf(0, 2, &cf0_data); - -- setup_j2_leds(); -- --#ifndef CONFIG_BOARD_ATSTK1002_SW3_CUSTOM --#ifndef CONFIG_BOARD_ATSTK1002_SW1_CUSTOM -- at73c213_set_clk(&at73c213_data); --#endif --#endif -+ atstk1000_setup_j2_leds(); -+ atstk1002_setup_extdac(); - - return 0; - } -diff -Nrup linux-2.6.24/arch/avr32/boards/atstk1000/atstk1003.c linux-avr32/arch/avr32/boards/atstk1000/atstk1003.c ---- linux-2.6.24/arch/avr32/boards/atstk1000/atstk1003.c 1969-12-31 19:00:00.000000000 -0500 -+++ linux-avr32/arch/avr32/boards/atstk1000/atstk1003.c 2008-02-01 14:51:35.000000000 -0500 -@@ -0,0 +1,181 @@ -+/* -+ * ATSTK1003 daughterboard-specific init code -+ * -+ * Copyright (C) 2007 Atmel Corporation -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 as -+ * published by the Free Software Foundation. -+ */ -+#include <linux/clk.h> -+#include <linux/err.h> -+#include <linux/init.h> -+#include <linux/kernel.h> -+#include <linux/platform_device.h> -+#include <linux/string.h> -+#include <linux/types.h> -+ -+#include <linux/spi/at73c213.h> -+#include <linux/spi/spi.h> -+ -+#include <asm/setup.h> -+ -+#include <asm/arch/at32ap700x.h> -+#include <asm/arch/board.h> -+#include <asm/arch/init.h> -+#include <asm/arch/portmux.h> -+ -+#include "atstk1000.h" -+ -+#ifdef CONFIG_BOARD_ATSTK1000_EXTDAC -+static struct at73c213_board_info at73c213_data = { -+ .ssc_id = 0, -+ .shortname = "AVR32 STK1000 external DAC", -+}; -+#endif -+ -+#ifndef CONFIG_BOARD_ATSTK100X_SW1_CUSTOM -+static struct spi_board_info spi0_board_info[] __initdata = { -+#ifdef CONFIG_BOARD_ATSTK1000_EXTDAC -+ { -+ /* AT73C213 */ -+ .modalias = "at73c213", -+ .max_speed_hz = 200000, -+ .chip_select = 0, -+ .mode = SPI_MODE_1, -+ .platform_data = &at73c213_data, -+ }, -+#endif -+ /* -+ * We can control the LTV350QV LCD panel, but it isn't much -+ * point since we don't have an LCD controller... -+ */ -+}; -+#endif -+ -+#ifdef CONFIG_BOARD_ATSTK100X_SPI1 -+static struct spi_board_info spi1_board_info[] __initdata = { { -+ /* patch in custom entries here */ -+} }; -+#endif -+ -+static struct cf_platform_data __initdata cf0_data = { -+#ifdef CONFIG_BOARD_ATSTK1000_CF_HACKS -+ .detect_pin = CONFIG_BOARD_ATSTK1000_CF_DETECT_PIN, -+ .reset_pin = CONFIG_BOARD_ATSTK1000_CF_RESET_PIN, -+#else -+ .detect_pin = GPIO_PIN_NONE, -+ .reset_pin = GPIO_PIN_NONE, -+#endif -+ .vcc_pin = GPIO_PIN_NONE, -+ .ready_pin = GPIO_PIN_PB(27), -+ .cs = 4, -+}; -+ -+#ifdef CONFIG_BOARD_ATSTK1000_EXTDAC -+static void __init atstk1003_setup_extdac(void) -+{ -+ struct clk *gclk; -+ struct clk *pll; -+ -+ gclk = clk_get(NULL, "gclk0"); -+ if (IS_ERR(gclk)) -+ goto err_gclk; -+ pll = clk_get(NULL, "pll0"); -+ if (IS_ERR(pll)) -+ goto err_pll; -+ -+ if (clk_set_parent(gclk, pll)) { -+ pr_debug("STK1000: failed to set pll0 as parent for DAC clock\n"); -+ goto err_set_clk; -+ } -+ -+ at32_select_periph(GPIO_PIN_PA(30), GPIO_PERIPH_A, 0); -+ at73c213_data.dac_clk = gclk; -+ -+err_set_clk: -+ clk_put(pll); -+err_pll: -+ clk_put(gclk); -+err_gclk: -+ return; -+} -+#else -+static void __init atstk1003_setup_extdac(void) -+{ -+ -+} -+#endif /* CONFIG_BOARD_ATSTK1000_EXTDAC */ -+ -+void __init setup_board(void) -+{ -+#ifdef CONFIG_BOARD_ATSTK100X_SW2_CUSTOM -+ at32_map_usart(0, 1); /* USART 0/B: /dev/ttyS1, IRDA */ -+#else -+ at32_map_usart(1, 0); /* USART 1/A: /dev/ttyS0, DB9 */ -+#endif -+ /* USART 2/unused: expansion connector */ -+ at32_map_usart(3, 2); /* USART 3/C: /dev/ttyS2, DB9 */ -+ -+ at32_setup_serial_console(0); -+} -+ -+static int __init atstk1003_init(void) -+{ -+ /* -+ * ATSTK1000 uses 32-bit SDRAM interface. Reserve the -+ * SDRAM-specific pins so that nobody messes with them. -+ */ -+ at32_reserve_pin(GPIO_PIN_PE(0)); /* DATA[16] */ -+ at32_reserve_pin(GPIO_PIN_PE(1)); /* DATA[17] */ -+ at32_reserve_pin(GPIO_PIN_PE(2)); /* DATA[18] */ -+ at32_reserve_pin(GPIO_PIN_PE(3)); /* DATA[19] */ -+ at32_reserve_pin(GPIO_PIN_PE(4)); /* DATA[20] */ -+ at32_reserve_pin(GPIO_PIN_PE(5)); /* DATA[21] */ -+ at32_reserve_pin(GPIO_PIN_PE(6)); /* DATA[22] */ -+ at32_reserve_pin(GPIO_PIN_PE(7)); /* DATA[23] */ -+ at32_reserve_pin(GPIO_PIN_PE(8)); /* DATA[24] */ -+ at32_reserve_pin(GPIO_PIN_PE(9)); /* DATA[25] */ -+ at32_reserve_pin(GPIO_PIN_PE(10)); /* DATA[26] */ -+ at32_reserve_pin(GPIO_PIN_PE(11)); /* DATA[27] */ -+ at32_reserve_pin(GPIO_PIN_PE(12)); /* DATA[28] */ -+ at32_reserve_pin(GPIO_PIN_PE(13)); /* DATA[29] */ -+ at32_reserve_pin(GPIO_PIN_PE(14)); /* DATA[30] */ -+ at32_reserve_pin(GPIO_PIN_PE(15)); /* DATA[31] */ -+ at32_reserve_pin(GPIO_PIN_PE(26)); /* SDCS */ -+ -+ at32_add_system_devices(); -+ -+#ifdef CONFIG_BOARD_ATSTK100X_SW2_CUSTOM -+ at32_add_device_usart(1); -+#else -+ at32_add_device_usart(0); -+#endif -+ at32_add_device_usart(2); -+ -+#ifndef CONFIG_BOARD_ATSTK100X_SW1_CUSTOM -+ at32_add_device_spi(0, spi0_board_info, ARRAY_SIZE(spi0_board_info)); -+#endif -+#ifdef CONFIG_BOARD_ATSTK100X_SPI1 -+ at32_add_device_spi(1, spi1_board_info, ARRAY_SIZE(spi1_board_info)); -+#endif -+#ifndef CONFIG_BOARD_ATSTK100X_SW2_CUSTOM -+ at32_add_device_mci(0, NULL); -+#endif -+ at32_add_device_usba(0, NULL); -+#ifdef CONFIG_BOARD_ATSTK100X_ENABLE_AC97 -+ at32_add_device_ac97c(0); -+#else -+ at32_add_device_abdac(0); -+#endif -+#ifndef CONFIG_BOARD_ATSTK100X_SW3_CUSTOM -+ at32_add_device_ssc(0, ATMEL_SSC_TX); -+#endif -+ at32_add_device_cf(0, 2, &cf0_data); -+ -+ atstk1000_setup_j2_leds(); -+ atstk1003_setup_extdac(); -+ -+ return 0; -+} -+postcore_initcall(atstk1003_init); -diff -Nrup linux-2.6.24/arch/avr32/boards/atstk1000/atstk1004.c linux-avr32/arch/avr32/boards/atstk1000/atstk1004.c ---- linux-2.6.24/arch/avr32/boards/atstk1000/atstk1004.c 1969-12-31 19:00:00.000000000 -0500 -+++ linux-avr32/arch/avr32/boards/atstk1000/atstk1004.c 2008-02-01 14:51:35.000000000 -0500 -@@ -0,0 +1,152 @@ -+/* -+ * ATSTK1003 daughterboard-specific init code -+ * -+ * Copyright (C) 2007 Atmel Corporation -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 as -+ * published by the Free Software Foundation. -+ */ -+#include <linux/clk.h> -+#include <linux/err.h> -+#include <linux/init.h> -+#include <linux/kernel.h> -+#include <linux/platform_device.h> -+#include <linux/string.h> -+#include <linux/types.h> -+ -+#include <linux/spi/at73c213.h> -+#include <linux/spi/spi.h> -+ -+#include <video/atmel_lcdc.h> -+ -+#include <asm/setup.h> -+ -+#include <asm/arch/at32ap700x.h> -+#include <asm/arch/board.h> -+#include <asm/arch/init.h> -+#include <asm/arch/portmux.h> -+ -+#include "atstk1000.h" -+ -+#ifdef CONFIG_BOARD_ATSTK1000_EXTDAC -+static struct at73c213_board_info at73c213_data = { -+ .ssc_id = 0, -+ .shortname = "AVR32 STK1000 external DAC", -+}; -+#endif -+ -+#ifndef CONFIG_BOARD_ATSTK100X_SW1_CUSTOM -+static struct spi_board_info spi0_board_info[] __initdata = { -+#ifdef CONFIG_BOARD_ATSTK1000_EXTDAC -+ { -+ /* AT73C213 */ -+ .modalias = "at73c213", -+ .max_speed_hz = 200000, -+ .chip_select = 0, -+ .mode = SPI_MODE_1, -+ .platform_data = &at73c213_data, -+ }, -+#endif -+ { -+ /* QVGA display */ -+ .modalias = "ltv350qv", -+ .max_speed_hz = 16000000, -+ .chip_select = 1, -+ .mode = SPI_MODE_3, -+ }, -+}; -+#endif -+ -+#ifdef CONFIG_BOARD_ATSTK100X_SPI1 -+static struct spi_board_info spi1_board_info[] __initdata = { { -+ /* patch in custom entries here */ -+} }; -+#endif -+ -+#ifdef CONFIG_BOARD_ATSTK1000_EXTDAC -+static void __init atstk1004_setup_extdac(void) -+{ -+ struct clk *gclk; -+ struct clk *pll; -+ -+ gclk = clk_get(NULL, "gclk0"); -+ if (IS_ERR(gclk)) -+ goto err_gclk; -+ pll = clk_get(NULL, "pll0"); -+ if (IS_ERR(pll)) -+ goto err_pll; -+ -+ if (clk_set_parent(gclk, pll)) { -+ pr_debug("STK1000: failed to set pll0 as parent for DAC clock\n"); -+ goto err_set_clk; -+ } -+ -+ at32_select_periph(GPIO_PIN_PA(30), GPIO_PERIPH_A, 0); -+ at73c213_data.dac_clk = gclk; -+ -+err_set_clk: -+ clk_put(pll); -+err_pll: -+ clk_put(gclk); -+err_gclk: -+ return; -+} -+#else -+static void __init atstk1004_setup_extdac(void) -+{ -+ -+} -+#endif /* CONFIG_BOARD_ATSTK1000_EXTDAC */ -+ -+void __init setup_board(void) -+{ -+#ifdef CONFIG_BOARD_ATSTK100X_SW2_CUSTOM -+ at32_map_usart(0, 1); /* USART 0/B: /dev/ttyS1, IRDA */ -+#else -+ at32_map_usart(1, 0); /* USART 1/A: /dev/ttyS0, DB9 */ -+#endif -+ /* USART 2/unused: expansion connector */ -+ at32_map_usart(3, 2); /* USART 3/C: /dev/ttyS2, DB9 */ -+ -+ at32_setup_serial_console(0); -+} -+ -+static int __init atstk1004_init(void) -+{ -+ at32_add_system_devices(); -+ -+#ifdef CONFIG_BOARD_ATSTK100X_SW2_CUSTOM -+ at32_add_device_usart(1); -+#else -+ at32_add_device_usart(0); -+#endif -+ at32_add_device_usart(2); -+ -+#ifndef CONFIG_BOARD_ATSTK100X_SW1_CUSTOM -+ at32_add_device_spi(0, spi0_board_info, ARRAY_SIZE(spi0_board_info)); -+#endif -+#ifdef CONFIG_BOARD_ATSTK100X_SPI1 -+ at32_add_device_spi(1, spi1_board_info, ARRAY_SIZE(spi1_board_info)); -+#endif -+#ifndef CONFIG_BOARD_ATSTK100X_SW2_CUSTOM -+ at32_add_device_mci(0, NULL); -+#endif -+ at32_add_device_lcdc(0, &atstk1000_lcdc_data, -+ fbmem_start, fbmem_size); -+ at32_add_device_usba(0, NULL); -+#ifdef CONFIG_BOARD_ATSTK100X_ENABLE_AC97 -+ at32_add_device_ac97c(0); -+#else -+ at32_add_device_abdac(0); -+#endif -+#ifndef CONFIG_BOARD_ATSTK100X_SW3_CUSTOM -+ at32_add_device_ssc(0, ATMEL_SSC_TX); -+#endif -+ -+ atstk1000_setup_j2_leds(); -+ atstk1004_setup_extdac(); -+ -+ return 0; -+} -+postcore_initcall(atstk1004_init); -diff -Nrup linux-2.6.24/arch/avr32/boards/atstk1000/Kconfig linux-avr32/arch/avr32/boards/atstk1000/Kconfig ---- linux-2.6.24/arch/avr32/boards/atstk1000/Kconfig 2008-01-24 17:58:37.000000000 -0500 -+++ linux-avr32/arch/avr32/boards/atstk1000/Kconfig 2008-02-01 14:51:35.000000000 -0500 -@@ -1,34 +1,53 @@ - # STK1000 customization - --if BOARD_ATSTK1002 -+if BOARD_ATSTK1000 - --config BOARD_ATSTK1002_CUSTOM -- bool "Non-default STK-1002 jumper settings" -+choice -+ prompt "ATSTK1000 CPU daughterboard type" -+ default BOARD_ATSTK1002 -+ -+config BOARD_ATSTK1002 -+ bool "ATSTK1002" -+ select CPU_AT32AP7000 -+ -+config BOARD_ATSTK1003 -+ bool "ATSTK1003" -+ select CPU_AT32AP7001 -+ -+config BOARD_ATSTK1004 -+ bool "ATSTK1004" -+ select CPU_AT32AP7002 -+ -+endchoice -+ -+ -+config BOARD_ATSTK100X_CUSTOM -+ bool "Non-default STK1002/STK1003/STK1004 jumper settings" - help - You will normally leave the jumpers on the CPU card at their - default settings. If you need to use certain peripherals, - you will need to change some of those jumpers. - --if BOARD_ATSTK1002_CUSTOM -+if BOARD_ATSTK100X_CUSTOM - --config BOARD_ATSTK1002_SW1_CUSTOM -+config BOARD_ATSTK100X_SW1_CUSTOM - bool "SW1: use SSC1 (not SPI0)" - help - This also prevents using the external DAC as an audio interface, - and means you can't initialize the on-board QVGA display. - --config BOARD_ATSTK1002_SW2_CUSTOM -+config BOARD_ATSTK100X_SW2_CUSTOM - bool "SW2: use IRDA or TIMER0 (not UART-A, MMC/SD, and PS2-A)" - help - If you change this you'll want an updated boot loader putting - the console on UART-C not UART-A. - --config BOARD_ATSTK1002_SW3_CUSTOM -+config BOARD_ATSTK100X_SW3_CUSTOM - bool "SW3: use TIMER1 (not SSC0 and GCLK)" - help - This also prevents using the external DAC as an audio interface. - --config BOARD_ATSTK1002_SW4_CUSTOM -+config BOARD_ATSTK100X_SW4_CUSTOM - bool "SW4: use ISI/Camera (not GPIOs, SPI1, and PS2-B)" - help - To use the camera interface you'll need a custom card (on the -@@ -36,27 +55,29 @@ config BOARD_ATSTK1002_SW4_CUSTOM - - config BOARD_ATSTK1002_SW5_CUSTOM - bool "SW5: use MACB1 (not LCDC)" -+ depends on BOARD_ATSTK1002 - - config BOARD_ATSTK1002_SW6_CUSTOM - bool "SW6: more GPIOs (not MACB0)" -+ depends on BOARD_ATSTK1002 - - endif # custom - --config BOARD_ATSTK1002_SPI1 -+config BOARD_ATSTK100X_SPI1 - bool "Configure SPI1 controller" -- depends on !BOARD_ATSTK1002_SW4_CUSTOM -+ depends on !BOARD_ATSTK100X_SW4_CUSTOM - help - All the signals for the second SPI controller are available on - GPIO lines and accessed through the J1 jumper block. Say "y" - here to configure that SPI controller. - --config BOARD_ATSTK1002_J2_LED -+config BOARD_ATSTK1000_J2_LED - bool -- default BOARD_ATSTK1002_J2_LED8 || BOARD_ATSTK1002_J2_RGB -+ default BOARD_ATSTK1000_J2_LED8 || BOARD_ATSTK1000_J2_RGB - - choice - prompt "LEDs connected to J2:" -- depends on LEDS_GPIO && !BOARD_ATSTK1002_SW4_CUSTOM -+ depends on LEDS_GPIO && !BOARD_ATSTK100X_SW4_CUSTOM - optional - help - Select this if you have jumpered the J2 jumper block to the -@@ -64,16 +85,64 @@ choice - IDC cable. A default "heartbeat" trigger is provided, but - you can of course override this. - --config BOARD_ATSTK1002_J2_LED8 -+config BOARD_ATSTK1000_J2_LED8 - bool "LED0..LED7" - help - Select this if J2 is jumpered to LED0..LED7 amber leds. - --config BOARD_ATSTK1002_J2_RGB -+config BOARD_ATSTK1000_J2_RGB - bool "RGB leds" - help - Select this if J2 is jumpered to the RGB leds. - - endchoice - --endif # stk 1002 -+config BOARD_ATSTK1000_EXTDAC -+ bool -+ depends on !BOARD_ATSTK100X_SW1_CUSTOM && !BOARD_ATSTK100X_SW3_CUSTOM -+ default y -+ -+config BOARD_ATSTK100X_ENABLE_AC97 -+ bool "Use AC97C instead of ABDAC" -+ help -+ Select this if you want to use the built-in AC97 controller -+ instead of the built-in Audio Bitstream DAC. These share -+ the same I/O pins on the AP7000, so both can't be enabled -+ at the same time. -+ -+ Note that the STK1000 kit doesn't ship with an AC97 codec on -+ board, so say N unless you've got an expansion board with an -+ AC97 codec on it that you want to use. -+ -+config BOARD_ATSTK1000_CF_HACKS -+ bool "ATSTK1000 CompactFlash hacks" -+ depends on !BOARD_ATSTK100X_SW4_CUSTOM -+ help -+ Select this if you have re-routed the CompactFlash RESET and -+ CD signals to GPIOs on your STK1000. This is necessary for -+ reset and card detection to work properly, although some CF -+ cards may be able to cope without reset. -+ -+config BOARD_ATSTK1000_CF_RESET_PIN -+ hex "CompactFlash RESET pin" -+ default 0x30 -+ depends on BOARD_ATSTK1000_CF_HACKS -+ help -+ Select which GPIO pin to use for the CompactFlash RESET -+ signal. This is specified as a hexadecimal number and should -+ be defined as 0x20 * gpio_port + pin. -+ -+ The default is 0x30, which is pin 16 on PIOB, aka GPIO14. -+ -+config BOARD_ATSTK1000_CF_DETECT_PIN -+ hex "CompactFlash DETECT pin" -+ default 0x3e -+ depends on BOARD_ATSTK1000_CF_HACKS -+ help -+ Select which GPIO pin to use for the CompactFlash CD -+ signal. This is specified as a hexadecimal number and should -+ be defined as 0x20 * gpio_port + pin. -+ -+ The default is 0x3e, which is pin 30 on PIOB, aka GPIO15. -+ -+endif # stk 1000 -diff -Nrup linux-2.6.24/arch/avr32/boards/atstk1000/Makefile linux-avr32/arch/avr32/boards/atstk1000/Makefile ---- linux-2.6.24/arch/avr32/boards/atstk1000/Makefile 2008-01-24 17:58:37.000000000 -0500 -+++ linux-avr32/arch/avr32/boards/atstk1000/Makefile 2008-02-01 14:51:35.000000000 -0500 -@@ -1,2 +1,4 @@ - obj-y += setup.o flash.o - obj-$(CONFIG_BOARD_ATSTK1002) += atstk1002.o -+obj-$(CONFIG_BOARD_ATSTK1003) += atstk1003.o -+obj-$(CONFIG_BOARD_ATSTK1004) += atstk1004.o -diff -Nrup linux-2.6.24/arch/avr32/boards/atstk1000/setup.c linux-avr32/arch/avr32/boards/atstk1000/setup.c ---- linux-2.6.24/arch/avr32/boards/atstk1000/setup.c 2008-01-24 17:58:37.000000000 -0500 -+++ linux-avr32/arch/avr32/boards/atstk1000/setup.c 2008-02-01 14:51:35.000000000 -0500 -@@ -10,13 +10,17 @@ - #include <linux/bootmem.h> - #include <linux/fb.h> - #include <linux/init.h> -+#include <linux/platform_device.h> - #include <linux/types.h> - #include <linux/linkage.h> - - #include <video/atmel_lcdc.h> - - #include <asm/setup.h> -+ -+#include <asm/arch/at32ap700x.h> - #include <asm/arch/board.h> -+#include <asm/arch/portmux.h> - - #include "atstk1000.h" - -@@ -61,3 +65,63 @@ struct atmel_lcdfb_info __initdata atstk - .default_monspecs = &atstk1000_default_monspecs, - .guard_time = 2, - }; -+ -+#ifdef CONFIG_BOARD_ATSTK1000_J2_LED -+#include <linux/leds.h> -+ -+static struct gpio_led stk1000_j2_led[] = { -+#ifdef CONFIG_BOARD_ATSTK1000_J2_LED8 -+#define LEDSTRING "J2 jumpered to LED8" -+ { .name = "led0:amber", .gpio = GPIO_PIN_PB( 8), }, -+ { .name = "led1:amber", .gpio = GPIO_PIN_PB( 9), }, -+ { .name = "led2:amber", .gpio = GPIO_PIN_PB(10), }, -+ { .name = "led3:amber", .gpio = GPIO_PIN_PB(13), }, -+ { .name = "led4:amber", .gpio = GPIO_PIN_PB(14), }, -+ { .name = "led5:amber", .gpio = GPIO_PIN_PB(15), }, -+ { .name = "led6:amber", .gpio = GPIO_PIN_PB(16), }, -+ { .name = "led7:amber", .gpio = GPIO_PIN_PB(30), -+ .default_trigger = "heartbeat", }, -+#else /* RGB */ -+#define LEDSTRING "J2 jumpered to RGB LEDs" -+ { .name = "r1:red", .gpio = GPIO_PIN_PB( 8), }, -+ { .name = "g1:green", .gpio = GPIO_PIN_PB(10), }, -+ { .name = "b1:blue", .gpio = GPIO_PIN_PB(14), }, -+ -+ { .name = "r2:red", .gpio = GPIO_PIN_PB( 9), -+ .default_trigger = "heartbeat", }, -+ { .name = "g2:green", .gpio = GPIO_PIN_PB(13), }, -+ { .name = "b2:blue", .gpio = GPIO_PIN_PB(15), -+ .default_trigger = "heartbeat", }, -+ /* PB16, PB30 unused */ -+#endif -+}; -+ -+static struct gpio_led_platform_data stk1000_j2_led_data = { -+ .num_leds = ARRAY_SIZE(stk1000_j2_led), -+ .leds = stk1000_j2_led, -+}; -+ -+static struct platform_device stk1000_j2_led_dev = { -+ .name = "leds-gpio", -+ .id = 2, /* gpio block J2 */ -+ .dev = { -+ .platform_data = &stk1000_j2_led_data, -+ }, -+}; -+ -+void __init atstk1000_setup_j2_leds(void) -+{ -+ unsigned i; -+ -+ for (i = 0; i < ARRAY_SIZE(stk1000_j2_led); i++) -+ at32_select_gpio(stk1000_j2_led[i].gpio, AT32_GPIOF_OUTPUT); -+ -+ printk("STK1000: " LEDSTRING "\n"); -+ platform_device_register(&stk1000_j2_led_dev); -+} -+#else /* CONFIG_BOARD_ATSTK1000_J2_LED */ -+void __init atstk1000_setup_j2_leds(void) -+{ -+ -+} -+#endif /* CONFIG_BOARD_ATSTK1000_J2_LED */ -diff -Nrup linux-2.6.24/arch/avr32/configs/atngw100_defconfig linux-avr32/arch/avr32/configs/atngw100_defconfig ---- linux-2.6.24/arch/avr32/configs/atngw100_defconfig 2008-01-24 17:58:37.000000000 -0500 -+++ linux-avr32/arch/avr32/configs/atngw100_defconfig 2008-02-01 14:51:35.000000000 -0500 -@@ -1,46 +1,51 @@ - # - # Automatically generated make config: don't edit --# Linux kernel version: 2.6.22-rc5 --# Sat Jun 23 15:40:05 2007 -+# Linux kernel version: 2.6.24-rc7 -+# Wed Jan 9 23:20:41 2008 - # - CONFIG_AVR32=y - CONFIG_GENERIC_GPIO=y - CONFIG_GENERIC_HARDIRQS=y -+CONFIG_STACKTRACE_SUPPORT=y -+CONFIG_LOCKDEP_SUPPORT=y -+CONFIG_TRACE_IRQFLAGS_SUPPORT=y - CONFIG_HARDIRQS_SW_RESEND=y - CONFIG_GENERIC_IRQ_PROBE=y - CONFIG_RWSEM_GENERIC_SPINLOCK=y - CONFIG_GENERIC_TIME=y -+# CONFIG_RWSEM_XCHGADD_ALGORITHM is not set - # CONFIG_ARCH_HAS_ILOG2_U32 is not set - # CONFIG_ARCH_HAS_ILOG2_U64 is not set -+CONFIG_ARCH_SUPPORTS_OPROFILE=y - CONFIG_GENERIC_HWEIGHT=y - CONFIG_GENERIC_CALIBRATE_DELAY=y - CONFIG_GENERIC_BUG=y - CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" - - # --# Code maturity level options -+# General setup - # - CONFIG_EXPERIMENTAL=y - CONFIG_BROKEN_ON_SMP=y - CONFIG_INIT_ENV_ARG_LIMIT=32 -- --# --# General setup --# - CONFIG_LOCALVERSION="" - # CONFIG_LOCALVERSION_AUTO is not set - CONFIG_SWAP=y - CONFIG_SYSVIPC=y --# CONFIG_IPC_NS is not set - CONFIG_SYSVIPC_SYSCTL=y - CONFIG_POSIX_MQUEUE=y - CONFIG_BSD_PROCESS_ACCT=y - CONFIG_BSD_PROCESS_ACCT_V3=y - # CONFIG_TASKSTATS is not set --# CONFIG_UTS_NS is not set -+# CONFIG_USER_NS is not set -+# CONFIG_PID_NS is not set - # CONFIG_AUDIT is not set - # CONFIG_IKCONFIG is not set - CONFIG_LOG_BUF_SHIFT=14 -+# CONFIG_CGROUPS is not set -+CONFIG_FAIR_GROUP_SCHED=y -+CONFIG_FAIR_USER_SCHED=y -+# CONFIG_FAIR_CGROUP_SCHED is not set - CONFIG_SYSFS_DEPRECATED=y - # CONFIG_RELAY is not set - CONFIG_BLK_DEV_INITRD=y -@@ -61,35 +66,28 @@ CONFIG_FUTEX=y - CONFIG_ANON_INODES=y - CONFIG_EPOLL=y - CONFIG_SIGNALFD=y --CONFIG_TIMERFD=y - CONFIG_EVENTFD=y - CONFIG_SHMEM=y - CONFIG_VM_EVENT_COUNTERS=y --# CONFIG_SLUB_DEBUG is not set -+CONFIG_SLUB_DEBUG=y - # CONFIG_SLAB is not set - CONFIG_SLUB=y - # CONFIG_SLOB is not set -+CONFIG_SLABINFO=y - CONFIG_RT_MUTEXES=y - # CONFIG_TINY_SHMEM is not set - CONFIG_BASE_SMALL=1 -- --# --# Loadable module support --# - CONFIG_MODULES=y - CONFIG_MODULE_UNLOAD=y - CONFIG_MODULE_FORCE_UNLOAD=y - # CONFIG_MODVERSIONS is not set - # CONFIG_MODULE_SRCVERSION_ALL is not set - CONFIG_KMOD=y -- --# --# Block layer --# - CONFIG_BLOCK=y - # CONFIG_LBD is not set - # CONFIG_BLK_DEV_IO_TRACE is not set - # CONFIG_LSF is not set -+# CONFIG_BLK_DEV_BSG is not set - - # - # IO Schedulers -@@ -111,6 +109,7 @@ CONFIG_SUBARCH_AVR32B=y - CONFIG_MMU=y - CONFIG_PERFORMANCE_COUNTERS=y - CONFIG_PLATFORM_AT32AP=y -+CONFIG_CPU_AT32AP700X=y - CONFIG_CPU_AT32AP7000=y - # CONFIG_BOARD_ATSTK1000 is not set - CONFIG_BOARD_ATNGW100=y -@@ -119,9 +118,9 @@ CONFIG_LOADER_U_BOOT=y - # - # Atmel AVR32 AP options - # --# CONFIG_AP7000_32_BIT_SMC is not set --CONFIG_AP7000_16_BIT_SMC=y --# CONFIG_AP7000_8_BIT_SMC is not set -+# CONFIG_AP700X_32_BIT_SMC is not set -+CONFIG_AP700X_16_BIT_SMC=y -+# CONFIG_AP700X_8_BIT_SMC is not set - CONFIG_LOAD_ADDRESS=0x10000000 - CONFIG_ENTRY_ADDRESS=0x90000000 - CONFIG_PHYS_OFFSET=0x10000000 -@@ -141,9 +140,11 @@ CONFIG_FLATMEM_MANUAL=y - CONFIG_FLATMEM=y - CONFIG_FLAT_NODE_MEM_MAP=y - # CONFIG_SPARSEMEM_STATIC is not set -+# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set - CONFIG_SPLIT_PTLOCK_CPUS=4 - # CONFIG_RESOURCES_64BIT is not set - CONFIG_ZONE_DMA_FLAG=0 -+CONFIG_VIRT_TO_BUS=y - # CONFIG_OWNERSHIP_TRACE is not set - # CONFIG_HZ_100 is not set - CONFIG_HZ_250=y -@@ -153,13 +154,31 @@ CONFIG_HZ=250 - CONFIG_CMDLINE="" - - # --# Bus options -+# Power management options - # --# CONFIG_ARCH_SUPPORTS_MSI is not set - - # --# PCCARD (PCMCIA/CardBus) support -+# CPU Frequency scaling -+# -+CONFIG_CPU_FREQ=y -+CONFIG_CPU_FREQ_TABLE=y -+# CONFIG_CPU_FREQ_DEBUG is not set -+# CONFIG_CPU_FREQ_STAT is not set -+CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y -+# CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set -+# CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND is not set -+# CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set -+CONFIG_CPU_FREQ_GOV_PERFORMANCE=y -+# CONFIG_CPU_FREQ_GOV_POWERSAVE is not set -+CONFIG_CPU_FREQ_GOV_USERSPACE=y -+CONFIG_CPU_FREQ_GOV_ONDEMAND=y -+# CONFIG_CPU_FREQ_GOV_CONSERVATIVE is not set -+CONFIG_CPU_FREQ_AT32AP=y -+ -+# -+# Bus options - # -+# CONFIG_ARCH_SUPPORTS_MSI is not set - # CONFIG_PCCARD is not set - - # -@@ -213,6 +232,7 @@ CONFIG_INET_TUNNEL=y - CONFIG_INET_XFRM_MODE_TRANSPORT=y - CONFIG_INET_XFRM_MODE_TUNNEL=y - CONFIG_INET_XFRM_MODE_BEET=y -+# CONFIG_INET_LRO is not set - CONFIG_INET_DIAG=y - CONFIG_INET_TCP_DIAG=y - # CONFIG_TCP_CONG_ADVANCED is not set -@@ -240,6 +260,7 @@ CONFIG_IPV6_SIT=y - # CONFIG_NETWORK_SECMARK is not set - CONFIG_NETFILTER=y - # CONFIG_NETFILTER_DEBUG is not set -+CONFIG_BRIDGE_NETFILTER=y - - # - # Core Netfilter Configuration -@@ -252,6 +273,7 @@ CONFIG_NF_CONNTRACK_MARK=y - # CONFIG_NF_CONNTRACK_EVENTS is not set - CONFIG_NF_CT_PROTO_GRE=m - # CONFIG_NF_CT_PROTO_SCTP is not set -+# CONFIG_NF_CT_PROTO_UDPLITE is not set - CONFIG_NF_CONNTRACK_AMANDA=m - CONFIG_NF_CONNTRACK_FTP=m - CONFIG_NF_CONNTRACK_H323=m -@@ -269,9 +291,11 @@ CONFIG_NETFILTER_XT_TARGET_MARK=m - CONFIG_NETFILTER_XT_TARGET_NFQUEUE=m - CONFIG_NETFILTER_XT_TARGET_NFLOG=m - # CONFIG_NETFILTER_XT_TARGET_NOTRACK is not set -+# CONFIG_NETFILTER_XT_TARGET_TRACE is not set - CONFIG_NETFILTER_XT_TARGET_TCPMSS=m - CONFIG_NETFILTER_XT_MATCH_COMMENT=m - CONFIG_NETFILTER_XT_MATCH_CONNBYTES=m -+# CONFIG_NETFILTER_XT_MATCH_CONNLIMIT is not set - CONFIG_NETFILTER_XT_MATCH_CONNMARK=m - CONFIG_NETFILTER_XT_MATCH_CONNTRACK=m - # CONFIG_NETFILTER_XT_MATCH_DCCP is not set -@@ -284,6 +308,7 @@ CONFIG_NETFILTER_XT_MATCH_MAC=m - CONFIG_NETFILTER_XT_MATCH_MARK=m - CONFIG_NETFILTER_XT_MATCH_POLICY=m - CONFIG_NETFILTER_XT_MATCH_MULTIPORT=m -+# CONFIG_NETFILTER_XT_MATCH_PHYSDEV is not set - CONFIG_NETFILTER_XT_MATCH_PKTTYPE=m - CONFIG_NETFILTER_XT_MATCH_QUOTA=m - CONFIG_NETFILTER_XT_MATCH_REALM=m -@@ -292,6 +317,8 @@ CONFIG_NETFILTER_XT_MATCH_STATE=m - CONFIG_NETFILTER_XT_MATCH_STATISTIC=m - CONFIG_NETFILTER_XT_MATCH_STRING=m - CONFIG_NETFILTER_XT_MATCH_TCPMSS=m -+# CONFIG_NETFILTER_XT_MATCH_TIME is not set -+# CONFIG_NETFILTER_XT_MATCH_U32 is not set - CONFIG_NETFILTER_XT_MATCH_HASHLIMIT=m - - # -@@ -359,13 +386,19 @@ CONFIG_IP6_NF_TARGET_REJECT=m - CONFIG_IP6_NF_MANGLE=m - CONFIG_IP6_NF_TARGET_HL=m - CONFIG_IP6_NF_RAW=m -+ -+# -+# Bridge: Netfilter Configuration -+# -+# CONFIG_BRIDGE_NF_EBTABLES is not set - # CONFIG_IP_DCCP is not set - # CONFIG_IP_SCTP is not set - # CONFIG_TIPC is not set - # CONFIG_ATM is not set --# CONFIG_BRIDGE is not set -+CONFIG_BRIDGE=m - CONFIG_VLAN_8021Q=m - # CONFIG_DECNET is not set -+CONFIG_LLC=m - # CONFIG_LLC2 is not set - # CONFIG_IPX is not set - # CONFIG_ATALK is not set -@@ -373,10 +406,6 @@ CONFIG_VLAN_8021Q=m - # CONFIG_LAPB is not set - # CONFIG_ECONET is not set - # CONFIG_WAN_ROUTER is not set -- --# --# QoS and/or fair queueing --# - # CONFIG_NET_SCHED is not set - CONFIG_NET_CLS_ROUTE=y - -@@ -384,6 +413,7 @@ CONFIG_NET_CLS_ROUTE=y - # Network testing - # - # CONFIG_NET_PKTGEN is not set -+# CONFIG_NET_TCPPROBE is not set - # CONFIG_HAMRADIO is not set - # CONFIG_IRDA is not set - # CONFIG_BT is not set -@@ -397,6 +427,7 @@ CONFIG_NET_CLS_ROUTE=y - # CONFIG_MAC80211 is not set - # CONFIG_IEEE80211 is not set - # CONFIG_RFKILL is not set -+# CONFIG_NET_9P is not set - - # - # Device Drivers -@@ -405,16 +436,13 @@ CONFIG_NET_CLS_ROUTE=y - # - # Generic Driver Options - # -+CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" - CONFIG_STANDALONE=y - # CONFIG_PREVENT_FIRMWARE_BUILD is not set - # CONFIG_FW_LOADER is not set - # CONFIG_DEBUG_DRIVER is not set - # CONFIG_DEBUG_DEVRES is not set - # CONFIG_SYS_HYPERVISOR is not set -- --# --# Connector - unified userspace <-> kernelspace linker --# - # CONFIG_CONNECTOR is not set - CONFIG_MTD=y - # CONFIG_MTD_DEBUG is not set -@@ -434,6 +462,7 @@ CONFIG_MTD_BLOCK=y - # CONFIG_INFTL is not set - # CONFIG_RFD_FTL is not set - # CONFIG_SSFDC is not set -+# CONFIG_MTD_OOPS is not set - - # - # RAM/ROM/Flash chip drivers -@@ -493,20 +522,8 @@ CONFIG_MTD_DATAFLASH=y - # UBI - Unsorted block images - # - # CONFIG_MTD_UBI is not set -- --# --# Parallel port support --# - # CONFIG_PARPORT is not set -- --# --# Plug and Play support --# --# CONFIG_PNPACPI is not set -- --# --# Block devices --# -+CONFIG_BLK_DEV=y - # CONFIG_BLK_DEV_COW_COMMON is not set - CONFIG_BLK_DEV_LOOP=m - # CONFIG_BLK_DEV_CRYPTOLOOP is not set -@@ -517,11 +534,7 @@ CONFIG_BLK_DEV_RAM_SIZE=4096 - CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024 - # CONFIG_CDROM_PKTCDVD is not set - # CONFIG_ATA_OVER_ETH is not set -- --# --# Misc devices --# --# CONFIG_BLINK is not set -+# CONFIG_MISC_DEVICES is not set - # CONFIG_IDE is not set - - # -@@ -529,30 +542,42 @@ CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024 - # - # CONFIG_RAID_ATTRS is not set - # CONFIG_SCSI is not set -+# CONFIG_SCSI_DMA is not set - # CONFIG_SCSI_NETLINK is not set - # CONFIG_ATA is not set -- --# --# Multi-device support (RAID and LVM) --# - # CONFIG_MD is not set -- --# --# Network device support --# - CONFIG_NETDEVICES=y -+# CONFIG_NETDEVICES_MULTIQUEUE is not set - # CONFIG_DUMMY is not set - # CONFIG_BONDING is not set -+# CONFIG_MACVLAN is not set - # CONFIG_EQUALIZER is not set - CONFIG_TUN=m --# CONFIG_PHYLIB is not set -+# CONFIG_VETH is not set -+CONFIG_PHYLIB=y - - # --# Ethernet (10 or 100Mbit) -+# MII PHY device drivers - # -+# CONFIG_MARVELL_PHY is not set -+# CONFIG_DAVICOM_PHY is not set -+# CONFIG_QSEMI_PHY is not set -+# CONFIG_LXT_PHY is not set -+# CONFIG_CICADA_PHY is not set -+# CONFIG_VITESSE_PHY is not set -+# CONFIG_SMSC_PHY is not set -+# CONFIG_BROADCOM_PHY is not set -+# CONFIG_ICPLUS_PHY is not set -+# CONFIG_FIXED_PHY is not set -+# CONFIG_MDIO_BITBANG is not set - CONFIG_NET_ETHERNET=y --CONFIG_MII=y -+# CONFIG_MII is not set - CONFIG_MACB=y -+# CONFIG_IBM_NEW_EMAC_ZMII is not set -+# CONFIG_IBM_NEW_EMAC_RGMII is not set -+# CONFIG_IBM_NEW_EMAC_TAH is not set -+# CONFIG_IBM_NEW_EMAC_EMAC4 is not set -+# CONFIG_B44 is not set - # CONFIG_NETDEV_1000 is not set - # CONFIG_NETDEV_10000 is not set - -@@ -571,21 +596,14 @@ CONFIG_PPP_DEFLATE=m - CONFIG_PPP_BSDCOMP=m - CONFIG_PPP_MPPE=m - CONFIG_PPPOE=m -+# CONFIG_PPPOL2TP is not set - # CONFIG_SLIP is not set - CONFIG_SLHC=m - # CONFIG_SHAPER is not set - # CONFIG_NETCONSOLE is not set - # CONFIG_NETPOLL is not set - # CONFIG_NET_POLL_CONTROLLER is not set -- --# --# ISDN subsystem --# - # CONFIG_ISDN is not set -- --# --# Telephony Support --# - # CONFIG_PHONE is not set - - # -@@ -620,23 +638,50 @@ CONFIG_SERIAL_CORE=y - CONFIG_SERIAL_CORE_CONSOLE=y - CONFIG_UNIX98_PTYS=y - # CONFIG_LEGACY_PTYS is not set -- --# --# IPMI --# - # CONFIG_IPMI_HANDLER is not set --# CONFIG_WATCHDOG is not set - # CONFIG_HW_RANDOM is not set - # CONFIG_RTC is not set - # CONFIG_GEN_RTC is not set - # CONFIG_R3964 is not set - # CONFIG_RAW_DRIVER is not set -- --# --# TPM devices --# - # CONFIG_TCG_TPM is not set --# CONFIG_I2C is not set -+CONFIG_I2C=m -+CONFIG_I2C_BOARDINFO=y -+CONFIG_I2C_CHARDEV=m -+ -+# -+# I2C Algorithms -+# -+CONFIG_I2C_ALGOBIT=m -+# CONFIG_I2C_ALGOPCF is not set -+# CONFIG_I2C_ALGOPCA is not set -+ -+# -+# I2C Hardware Bus support -+# -+CONFIG_I2C_GPIO=m -+# CONFIG_I2C_OCORES is not set -+# CONFIG_I2C_PARPORT_LIGHT is not set -+# CONFIG_I2C_SIMTEC is not set -+# CONFIG_I2C_TAOS_EVM is not set -+# CONFIG_I2C_STUB is not set -+ -+# -+# Miscellaneous I2C Chip support -+# -+# CONFIG_SENSORS_DS1337 is not set -+# CONFIG_SENSORS_DS1374 is not set -+# CONFIG_DS1682 is not set -+# CONFIG_SENSORS_EEPROM is not set -+# CONFIG_SENSORS_PCF8574 is not set -+# CONFIG_SENSORS_PCA9539 is not set -+# CONFIG_SENSORS_PCF8591 is not set -+# CONFIG_SENSORS_MAX6875 is not set -+# CONFIG_SENSORS_TSL2550 is not set -+# CONFIG_I2C_DEBUG_CORE is not set -+# CONFIG_I2C_DEBUG_ALGO is not set -+# CONFIG_I2C_DEBUG_BUS is not set -+# CONFIG_I2C_DEBUG_CHIP is not set - - # - # SPI support -@@ -655,13 +700,25 @@ CONFIG_SPI_ATMEL=y - # SPI Protocol Masters - # - # CONFIG_SPI_AT25 is not set --# CONFIG_SPI_SPIDEV is not set -+CONFIG_SPI_SPIDEV=m -+# CONFIG_SPI_TLE62X0 is not set -+# CONFIG_W1 is not set -+# CONFIG_POWER_SUPPLY is not set -+# CONFIG_HWMON is not set -+CONFIG_WATCHDOG=y -+# CONFIG_WATCHDOG_NOWAYOUT is not set - - # --# Dallas's 1-wire bus -+# Watchdog Device Drivers - # --# CONFIG_W1 is not set --# CONFIG_HWMON is not set -+# CONFIG_SOFT_WATCHDOG is not set -+CONFIG_AT32AP700X_WDT=y -+ -+# -+# Sonics Silicon Backplane -+# -+CONFIG_SSB_POSSIBLE=y -+# CONFIG_SSB is not set - - # - # Multifunction device drivers -@@ -678,23 +735,21 @@ CONFIG_SPI_ATMEL=y - # - # Graphics support - # -+# CONFIG_VGASTATE is not set -+# CONFIG_VIDEO_OUTPUT_CONTROL is not set -+# CONFIG_FB is not set - # CONFIG_BACKLIGHT_LCD_SUPPORT is not set - - # - # Display device support - # - # CONFIG_DISPLAY_SUPPORT is not set --# CONFIG_VGASTATE is not set --# CONFIG_FB is not set - - # - # Sound - # - # CONFIG_SOUND is not set -- --# --# USB support --# -+CONFIG_USB_SUPPORT=y - # CONFIG_USB_ARCH_HAS_HCD is not set - # CONFIG_USB_ARCH_HAS_OHCI is not set - # CONFIG_USB_ARCH_HAS_EHCI is not set -@@ -706,12 +761,47 @@ CONFIG_SPI_ATMEL=y - # - # USB Gadget Support - # --# CONFIG_USB_GADGET is not set --# CONFIG_MMC is not set -+CONFIG_USB_GADGET=y -+# CONFIG_USB_GADGET_DEBUG is not set -+# CONFIG_USB_GADGET_DEBUG_FILES is not set -+CONFIG_USB_GADGET_SELECTED=y -+# CONFIG_USB_GADGET_AMD5536UDC is not set -+CONFIG_USB_GADGET_ATMEL_USBA=y -+CONFIG_USB_ATMEL_USBA=y -+# CONFIG_USB_GADGET_FSL_USB2 is not set -+# CONFIG_USB_GADGET_NET2280 is not set -+# CONFIG_USB_GADGET_PXA2XX is not set -+# CONFIG_USB_GADGET_M66592 is not set -+# CONFIG_USB_GADGET_GOKU is not set -+# CONFIG_USB_GADGET_LH7A40X is not set -+# CONFIG_USB_GADGET_OMAP is not set -+# CONFIG_USB_GADGET_S3C2410 is not set -+# CONFIG_USB_GADGET_AT91 is not set -+# CONFIG_USB_GADGET_DUMMY_HCD is not set -+CONFIG_USB_GADGET_DUALSPEED=y -+CONFIG_USB_ZERO=m -+CONFIG_USB_ETH=m -+CONFIG_USB_ETH_RNDIS=y -+CONFIG_USB_GADGETFS=m -+CONFIG_USB_FILE_STORAGE=m -+# CONFIG_USB_FILE_STORAGE_TEST is not set -+CONFIG_USB_G_SERIAL=m -+# CONFIG_USB_MIDI_GADGET is not set -+CONFIG_MMC=m -+# CONFIG_MMC_DEBUG is not set -+# CONFIG_MMC_UNSAFE_RESUME is not set -+ -+# -+# MMC/SD Card Drivers -+# -+CONFIG_MMC_BLOCK=m -+CONFIG_MMC_BLOCK_BOUNCE=y -+# CONFIG_SDIO_UART is not set - - # --# LED devices -+# MMC/SD Host Controller Drivers - # -+CONFIG_MMC_SPI=m - CONFIG_NEW_LEDS=y - CONFIG_LEDS_CLASS=y - -@@ -726,53 +816,71 @@ CONFIG_LEDS_GPIO=y - CONFIG_LEDS_TRIGGERS=y - CONFIG_LEDS_TRIGGER_TIMER=y - CONFIG_LEDS_TRIGGER_HEARTBEAT=y -- -+CONFIG_RTC_LIB=y -+CONFIG_RTC_CLASS=y -+CONFIG_RTC_HCTOSYS=y -+CONFIG_RTC_HCTOSYS_DEVICE="rtc0" -+# CONFIG_RTC_DEBUG is not set - - # --# LED drivers --# -- --# --# LED Triggers --# -- --# --# InfiniBand support -+# RTC interfaces - # -+CONFIG_RTC_INTF_SYSFS=y -+CONFIG_RTC_INTF_PROC=y -+CONFIG_RTC_INTF_DEV=y -+# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set -+# CONFIG_RTC_DRV_TEST is not set - - # --# EDAC - error detection and reporting (RAS) (EXPERIMENTAL) -+# I2C RTC drivers - # -+# CONFIG_RTC_DRV_DS1307 is not set -+# CONFIG_RTC_DRV_DS1374 is not set -+# CONFIG_RTC_DRV_DS1672 is not set -+# CONFIG_RTC_DRV_MAX6900 is not set -+# CONFIG_RTC_DRV_RS5C372 is not set -+# CONFIG_RTC_DRV_ISL1208 is not set -+# CONFIG_RTC_DRV_X1205 is not set -+# CONFIG_RTC_DRV_PCF8563 is not set -+# CONFIG_RTC_DRV_PCF8583 is not set -+# CONFIG_RTC_DRV_M41T80 is not set - - # --# Real Time Clock -+# SPI RTC drivers - # --# CONFIG_RTC_CLASS is not set -+# CONFIG_RTC_DRV_RS5C348 is not set -+# CONFIG_RTC_DRV_MAX6902 is not set - - # --# DMA Engine support -+# Platform RTC drivers - # --# CONFIG_DMA_ENGINE is not set -+# CONFIG_RTC_DRV_DS1553 is not set -+# CONFIG_RTC_DRV_STK17TA8 is not set -+# CONFIG_RTC_DRV_DS1742 is not set -+# CONFIG_RTC_DRV_M48T86 is not set -+# CONFIG_RTC_DRV_M48T59 is not set -+# CONFIG_RTC_DRV_V3020 is not set - - # --# DMA Clients -+# on-CPU RTC drivers - # -+CONFIG_RTC_DRV_AT32AP700X=y - - # --# DMA Devices -+# Userspace I/O - # -+# CONFIG_UIO is not set - - # - # File systems - # --CONFIG_EXT2_FS=y -+CONFIG_EXT2_FS=m - # CONFIG_EXT2_FS_XATTR is not set - # CONFIG_EXT2_FS_XIP is not set --CONFIG_EXT3_FS=y -+CONFIG_EXT3_FS=m - # CONFIG_EXT3_FS_XATTR is not set - # CONFIG_EXT4DEV_FS is not set --CONFIG_JBD=y --# CONFIG_JBD_DEBUG is not set -+CONFIG_JBD=m - # CONFIG_REISERFS_FS is not set - # CONFIG_JFS_FS is not set - # CONFIG_FS_POSIX_ACL is not set -@@ -781,7 +889,8 @@ CONFIG_JBD=y - # CONFIG_OCFS2_FS is not set - # CONFIG_MINIX_FS is not set - # CONFIG_ROMFS_FS is not set --# CONFIG_INOTIFY is not set -+CONFIG_INOTIFY=y -+CONFIG_INOTIFY_USER=y - # CONFIG_QUOTA is not set - # CONFIG_DNOTIFY is not set - # CONFIG_AUTOFS_FS is not set -@@ -814,8 +923,7 @@ CONFIG_SYSFS=y - CONFIG_TMPFS=y - # CONFIG_TMPFS_POSIX_ACL is not set - # CONFIG_HUGETLB_PAGE is not set --CONFIG_RAMFS=y --CONFIG_CONFIGFS_FS=y -+CONFIG_CONFIGFS_FS=m - - # - # Miscellaneous filesystems -@@ -830,10 +938,12 @@ CONFIG_CONFIGFS_FS=y - CONFIG_JFFS2_FS=y - CONFIG_JFFS2_FS_DEBUG=0 - CONFIG_JFFS2_FS_WRITEBUFFER=y -+# CONFIG_JFFS2_FS_WBUF_VERIFY is not set - # CONFIG_JFFS2_SUMMARY is not set - # CONFIG_JFFS2_FS_XATTR is not set - # CONFIG_JFFS2_COMPRESSION_OPTIONS is not set - CONFIG_JFFS2_ZLIB=y -+# CONFIG_JFFS2_LZO is not set - CONFIG_JFFS2_RTIME=y - # CONFIG_JFFS2_RUBIN is not set - # CONFIG_CRAMFS is not set -@@ -842,19 +952,21 @@ CONFIG_JFFS2_RTIME=y - # CONFIG_QNX4FS_FS is not set - # CONFIG_SYSV_FS is not set - # CONFIG_UFS_FS is not set -- --# --# Network File Systems --# -+CONFIG_NETWORK_FILESYSTEMS=y - CONFIG_NFS_FS=y - CONFIG_NFS_V3=y - # CONFIG_NFS_V3_ACL is not set - # CONFIG_NFS_V4 is not set - # CONFIG_NFS_DIRECTIO is not set --# CONFIG_NFSD is not set -+CONFIG_NFSD=m -+CONFIG_NFSD_V3=y -+# CONFIG_NFSD_V3_ACL is not set -+# CONFIG_NFSD_V4 is not set -+CONFIG_NFSD_TCP=y - CONFIG_ROOT_NFS=y - CONFIG_LOCKD=y - CONFIG_LOCKD_V4=y -+CONFIG_EXPORTFS=m - CONFIG_NFS_COMMON=y - CONFIG_SUNRPC=y - # CONFIG_SUNRPC_BIND34 is not set -@@ -871,23 +983,18 @@ CONFIG_CIFS=m - # CONFIG_NCP_FS is not set - # CONFIG_CODA_FS is not set - # CONFIG_AFS_FS is not set --# CONFIG_9P_FS is not set - - # - # Partition Types - # - # CONFIG_PARTITION_ADVANCED is not set - CONFIG_MSDOS_PARTITION=y -- --# --# Native Language Support --# --CONFIG_NLS=y -+CONFIG_NLS=m - CONFIG_NLS_DEFAULT="iso8859-1" --# CONFIG_NLS_CODEPAGE_437 is not set -+CONFIG_NLS_CODEPAGE_437=m - # CONFIG_NLS_CODEPAGE_737 is not set - # CONFIG_NLS_CODEPAGE_775 is not set --CONFIG_NLS_CODEPAGE_850=y -+CONFIG_NLS_CODEPAGE_850=m - # CONFIG_NLS_CODEPAGE_852 is not set - # CONFIG_NLS_CODEPAGE_855 is not set - # CONFIG_NLS_CODEPAGE_857 is not set -@@ -908,7 +1015,7 @@ CONFIG_NLS_CODEPAGE_850=y - # CONFIG_NLS_CODEPAGE_1250 is not set - # CONFIG_NLS_CODEPAGE_1251 is not set - # CONFIG_NLS_ASCII is not set --CONFIG_NLS_ISO8859_1=y -+CONFIG_NLS_ISO8859_1=m - # CONFIG_NLS_ISO8859_2 is not set - # CONFIG_NLS_ISO8859_3 is not set - # CONFIG_NLS_ISO8859_4 is not set -@@ -921,18 +1028,19 @@ CONFIG_NLS_ISO8859_1=y - # CONFIG_NLS_ISO8859_15 is not set - # CONFIG_NLS_KOI8_R is not set - # CONFIG_NLS_KOI8_U is not set --CONFIG_NLS_UTF8=y -- --# --# Distributed Lock Manager --# -+CONFIG_NLS_UTF8=m - # CONFIG_DLM is not set -+CONFIG_INSTRUMENTATION=y -+CONFIG_PROFILING=y -+CONFIG_OPROFILE=m -+CONFIG_KPROBES=y -+# CONFIG_MARKERS is not set - - # - # Kernel hacking - # --CONFIG_TRACE_IRQFLAGS_SUPPORT=y - # CONFIG_PRINTK_TIME is not set -+CONFIG_ENABLE_WARN_DEPRECATED=y - CONFIG_ENABLE_MUST_CHECK=y - CONFIG_MAGIC_SYSRQ=y - # CONFIG_UNUSED_SYMBOLS is not set -@@ -941,12 +1049,17 @@ CONFIG_MAGIC_SYSRQ=y - CONFIG_DEBUG_KERNEL=y - # CONFIG_DEBUG_SHIRQ is not set - CONFIG_DETECT_SOFTLOCKUP=y -+CONFIG_SCHED_DEBUG=y - # CONFIG_SCHEDSTATS is not set - # CONFIG_TIMER_STATS is not set -+# CONFIG_SLUB_DEBUG_ON is not set - # CONFIG_DEBUG_RT_MUTEXES is not set - # CONFIG_RT_MUTEX_TESTER is not set - # CONFIG_DEBUG_SPINLOCK is not set - # CONFIG_DEBUG_MUTEXES is not set -+# CONFIG_DEBUG_LOCK_ALLOC is not set -+# CONFIG_PROVE_LOCKING is not set -+# CONFIG_LOCK_STAT is not set - # CONFIG_DEBUG_SPINLOCK_SLEEP is not set - # CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set - # CONFIG_DEBUG_KOBJECT is not set -@@ -954,21 +1067,21 @@ CONFIG_DEBUG_BUGVERBOSE=y - # CONFIG_DEBUG_INFO is not set - # CONFIG_DEBUG_VM is not set - # CONFIG_DEBUG_LIST is not set -+# CONFIG_DEBUG_SG is not set - CONFIG_FRAME_POINTER=y - # CONFIG_FORCED_INLINING is not set -+# CONFIG_BOOT_PRINTK_DELAY is not set - # CONFIG_RCU_TORTURE_TEST is not set -+# CONFIG_LKDTM is not set - # CONFIG_FAULT_INJECTION is not set --# CONFIG_KPROBES is not set -+# CONFIG_SAMPLES is not set - - # - # Security options - # - # CONFIG_KEYS is not set - # CONFIG_SECURITY is not set -- --# --# Cryptographic options --# -+# CONFIG_SECURITY_FILE_CAPABILITIES is not set - CONFIG_CRYPTO=y - CONFIG_CRYPTO_ALGAPI=y - CONFIG_CRYPTO_BLKCIPHER=y -@@ -989,6 +1102,7 @@ CONFIG_CRYPTO_ECB=m - CONFIG_CRYPTO_CBC=y - CONFIG_CRYPTO_PCBC=m - # CONFIG_CRYPTO_LRW is not set -+# CONFIG_CRYPTO_XTS is not set - # CONFIG_CRYPTO_CRYPTD is not set - CONFIG_CRYPTO_DES=y - # CONFIG_CRYPTO_FCRYPT is not set -@@ -1002,15 +1116,14 @@ CONFIG_CRYPTO_DES=y - CONFIG_CRYPTO_ARC4=m - # CONFIG_CRYPTO_KHAZAD is not set - # CONFIG_CRYPTO_ANUBIS is not set -+# CONFIG_CRYPTO_SEED is not set - CONFIG_CRYPTO_DEFLATE=y - # CONFIG_CRYPTO_MICHAEL_MIC is not set - # CONFIG_CRYPTO_CRC32C is not set - # CONFIG_CRYPTO_CAMELLIA is not set - # CONFIG_CRYPTO_TEST is not set -- --# --# Hardware crypto devices --# -+# CONFIG_CRYPTO_AUTHENC is not set -+CONFIG_CRYPTO_HW=y - - # - # Library routines -@@ -1018,8 +1131,9 @@ CONFIG_CRYPTO_DEFLATE=y - CONFIG_BITREVERSE=y - CONFIG_CRC_CCITT=m - # CONFIG_CRC16 is not set --# CONFIG_CRC_ITU_T is not set -+CONFIG_CRC_ITU_T=m - CONFIG_CRC32=y -+CONFIG_CRC7=m - # CONFIG_LIBCRC32C is not set - CONFIG_ZLIB_INFLATE=y - CONFIG_ZLIB_DEFLATE=y -diff -Nrup linux-2.6.24/arch/avr32/configs/atstk1002_defconfig linux-avr32/arch/avr32/configs/atstk1002_defconfig ---- linux-2.6.24/arch/avr32/configs/atstk1002_defconfig 2008-01-24 17:58:37.000000000 -0500 -+++ linux-avr32/arch/avr32/configs/atstk1002_defconfig 2008-02-01 14:51:35.000000000 -0500 -@@ -1,48 +1,48 @@ - # - # Automatically generated make config: don't edit --# Linux kernel version: 2.6.22-rc5 --# Sat Jun 23 15:32:08 2007 -+# Linux kernel version: 2.6.24-rc7 -+# Wed Jan 9 23:07:43 2008 - # - CONFIG_AVR32=y - CONFIG_GENERIC_GPIO=y - CONFIG_GENERIC_HARDIRQS=y -+CONFIG_STACKTRACE_SUPPORT=y -+CONFIG_LOCKDEP_SUPPORT=y -+CONFIG_TRACE_IRQFLAGS_SUPPORT=y - CONFIG_HARDIRQS_SW_RESEND=y - CONFIG_GENERIC_IRQ_PROBE=y - CONFIG_RWSEM_GENERIC_SPINLOCK=y - CONFIG_GENERIC_TIME=y -+# CONFIG_RWSEM_XCHGADD_ALGORITHM is not set - # CONFIG_ARCH_HAS_ILOG2_U32 is not set - # CONFIG_ARCH_HAS_ILOG2_U64 is not set -+CONFIG_ARCH_SUPPORTS_OPROFILE=y - CONFIG_GENERIC_HWEIGHT=y - CONFIG_GENERIC_CALIBRATE_DELAY=y - CONFIG_GENERIC_BUG=y - CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" - - # --# Code maturity level options -+# General setup - # - CONFIG_EXPERIMENTAL=y - CONFIG_BROKEN_ON_SMP=y - CONFIG_INIT_ENV_ARG_LIMIT=32 -- --# --# General setup --# - CONFIG_LOCALVERSION="" - # CONFIG_LOCALVERSION_AUTO is not set - CONFIG_SWAP=y - CONFIG_SYSVIPC=y --# CONFIG_IPC_NS is not set - CONFIG_SYSVIPC_SYSCTL=y - CONFIG_POSIX_MQUEUE=y --CONFIG_BSD_PROCESS_ACCT=y --CONFIG_BSD_PROCESS_ACCT_V3=y --CONFIG_TASKSTATS=y --CONFIG_TASK_DELAY_ACCT=y --# CONFIG_TASK_XACCT is not set --# CONFIG_UTS_NS is not set --CONFIG_AUDIT=y -+# CONFIG_BSD_PROCESS_ACCT is not set -+# CONFIG_TASKSTATS is not set -+# CONFIG_USER_NS is not set -+# CONFIG_PID_NS is not set -+# CONFIG_AUDIT is not set - # CONFIG_IKCONFIG is not set - CONFIG_LOG_BUF_SHIFT=14 -+# CONFIG_CGROUPS is not set -+# CONFIG_FAIR_GROUP_SCHED is not set - CONFIG_SYSFS_DEPRECATED=y - CONFIG_RELAY=y - CONFIG_BLK_DEV_INITRD=y -@@ -63,35 +63,28 @@ CONFIG_FUTEX=y - CONFIG_ANON_INODES=y - CONFIG_EPOLL=y - CONFIG_SIGNALFD=y --CONFIG_TIMERFD=y - CONFIG_EVENTFD=y - CONFIG_SHMEM=y - CONFIG_VM_EVENT_COUNTERS=y --# CONFIG_SLUB_DEBUG is not set -+CONFIG_SLUB_DEBUG=y - # CONFIG_SLAB is not set - CONFIG_SLUB=y - # CONFIG_SLOB is not set -+CONFIG_SLABINFO=y - CONFIG_RT_MUTEXES=y - # CONFIG_TINY_SHMEM is not set - CONFIG_BASE_SMALL=1 -- --# --# Loadable module support --# - CONFIG_MODULES=y - CONFIG_MODULE_UNLOAD=y - # CONFIG_MODULE_FORCE_UNLOAD is not set - # CONFIG_MODVERSIONS is not set - # CONFIG_MODULE_SRCVERSION_ALL is not set - # CONFIG_KMOD is not set -- --# --# Block layer --# - CONFIG_BLOCK=y - # CONFIG_LBD is not set - # CONFIG_BLK_DEV_IO_TRACE is not set - # CONFIG_LSF is not set -+# CONFIG_BLK_DEV_BSG is not set - - # - # IO Schedulers -@@ -99,12 +92,12 @@ CONFIG_BLOCK=y - CONFIG_IOSCHED_NOOP=y - # CONFIG_IOSCHED_AS is not set - # CONFIG_IOSCHED_DEADLINE is not set --# CONFIG_IOSCHED_CFQ is not set -+CONFIG_IOSCHED_CFQ=y - # CONFIG_DEFAULT_AS is not set - # CONFIG_DEFAULT_DEADLINE is not set --# CONFIG_DEFAULT_CFQ is not set --CONFIG_DEFAULT_NOOP=y --CONFIG_DEFAULT_IOSCHED="noop" -+CONFIG_DEFAULT_CFQ=y -+# CONFIG_DEFAULT_NOOP is not set -+CONFIG_DEFAULT_IOSCHED="cfq" - - # - # System Type and features -@@ -113,18 +106,27 @@ CONFIG_SUBARCH_AVR32B=y - CONFIG_MMU=y - CONFIG_PERFORMANCE_COUNTERS=y - CONFIG_PLATFORM_AT32AP=y -+CONFIG_CPU_AT32AP700X=y - CONFIG_CPU_AT32AP7000=y --CONFIG_BOARD_ATSTK1002=y - CONFIG_BOARD_ATSTK1000=y - # CONFIG_BOARD_ATNGW100 is not set -+CONFIG_BOARD_ATSTK1002=y -+# CONFIG_BOARD_ATSTK1003 is not set -+# CONFIG_BOARD_ATSTK1004 is not set -+# CONFIG_BOARD_ATSTK100X_CUSTOM is not set -+# CONFIG_BOARD_ATSTK100X_SPI1 is not set -+# CONFIG_BOARD_ATSTK1000_J2_LED is not set -+# CONFIG_BOARD_ATSTK1000_J2_LED8 is not set -+# CONFIG_BOARD_ATSTK1000_J2_RGB is not set -+CONFIG_BOARD_ATSTK1000_EXTDAC=y - CONFIG_LOADER_U_BOOT=y - - # - # Atmel AVR32 AP options - # --# CONFIG_AP7000_32_BIT_SMC is not set --CONFIG_AP7000_16_BIT_SMC=y --# CONFIG_AP7000_8_BIT_SMC is not set -+# CONFIG_AP700X_32_BIT_SMC is not set -+CONFIG_AP700X_16_BIT_SMC=y -+# CONFIG_AP700X_8_BIT_SMC is not set - CONFIG_LOAD_ADDRESS=0x10000000 - CONFIG_ENTRY_ADDRESS=0x90000000 - CONFIG_PHYS_OFFSET=0x10000000 -@@ -144,9 +146,11 @@ CONFIG_FLATMEM_MANUAL=y - CONFIG_FLATMEM=y - CONFIG_FLAT_NODE_MEM_MAP=y - # CONFIG_SPARSEMEM_STATIC is not set -+# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set - CONFIG_SPLIT_PTLOCK_CPUS=4 - # CONFIG_RESOURCES_64BIT is not set - CONFIG_ZONE_DMA_FLAG=0 -+CONFIG_VIRT_TO_BUS=y - # CONFIG_OWNERSHIP_TRACE is not set - # CONFIG_HZ_100 is not set - CONFIG_HZ_250=y -@@ -156,13 +160,31 @@ CONFIG_HZ=250 - CONFIG_CMDLINE="" - - # --# Bus options -+# Power management options - # --# CONFIG_ARCH_SUPPORTS_MSI is not set - - # --# PCCARD (PCMCIA/CardBus) support -+# CPU Frequency scaling -+# -+CONFIG_CPU_FREQ=y -+CONFIG_CPU_FREQ_TABLE=y -+# CONFIG_CPU_FREQ_DEBUG is not set -+# CONFIG_CPU_FREQ_STAT is not set -+CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y -+# CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set -+# CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND is not set -+# CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set -+CONFIG_CPU_FREQ_GOV_PERFORMANCE=y -+# CONFIG_CPU_FREQ_GOV_POWERSAVE is not set -+CONFIG_CPU_FREQ_GOV_USERSPACE=y -+CONFIG_CPU_FREQ_GOV_ONDEMAND=y -+# CONFIG_CPU_FREQ_GOV_CONSERVATIVE is not set -+CONFIG_CPU_FREQ_AT32AP=y -+ -+# -+# Bus options - # -+# CONFIG_ARCH_SUPPORTS_MSI is not set - # CONFIG_PCCARD is not set - - # -@@ -182,7 +204,12 @@ CONFIG_NET=y - CONFIG_PACKET=y - CONFIG_PACKET_MMAP=y - CONFIG_UNIX=y --# CONFIG_NET_KEY is not set -+CONFIG_XFRM=y -+CONFIG_XFRM_USER=m -+# CONFIG_XFRM_SUB_POLICY is not set -+# CONFIG_XFRM_MIGRATE is not set -+CONFIG_NET_KEY=m -+# CONFIG_NET_KEY_MIGRATE is not set - CONFIG_INET=y - # CONFIG_IP_MULTICAST is not set - # CONFIG_IP_ADVANCED_ROUTER is not set -@@ -191,36 +218,52 @@ CONFIG_IP_PNP=y - CONFIG_IP_PNP_DHCP=y - # CONFIG_IP_PNP_BOOTP is not set - # CONFIG_IP_PNP_RARP is not set --# CONFIG_NET_IPIP is not set --# CONFIG_NET_IPGRE is not set -+CONFIG_NET_IPIP=m -+CONFIG_NET_IPGRE=m - # CONFIG_ARPD is not set - # CONFIG_SYN_COOKIES is not set --# CONFIG_INET_AH is not set --# CONFIG_INET_ESP is not set -+CONFIG_INET_AH=m -+CONFIG_INET_ESP=m - # CONFIG_INET_IPCOMP is not set - # CONFIG_INET_XFRM_TUNNEL is not set --# CONFIG_INET_TUNNEL is not set --# CONFIG_INET_XFRM_MODE_TRANSPORT is not set --# CONFIG_INET_XFRM_MODE_TUNNEL is not set --# CONFIG_INET_XFRM_MODE_BEET is not set -+CONFIG_INET_TUNNEL=m -+CONFIG_INET_XFRM_MODE_TRANSPORT=m -+CONFIG_INET_XFRM_MODE_TUNNEL=m -+CONFIG_INET_XFRM_MODE_BEET=m -+# CONFIG_INET_LRO is not set - CONFIG_INET_DIAG=y - CONFIG_INET_TCP_DIAG=y - # CONFIG_TCP_CONG_ADVANCED is not set - CONFIG_TCP_CONG_CUBIC=y - CONFIG_DEFAULT_TCP_CONG="cubic" - # CONFIG_TCP_MD5SIG is not set --# CONFIG_IPV6 is not set --# CONFIG_INET6_XFRM_TUNNEL is not set --# CONFIG_INET6_TUNNEL is not set -+CONFIG_IPV6=m -+# CONFIG_IPV6_PRIVACY is not set -+# CONFIG_IPV6_ROUTER_PREF is not set -+# CONFIG_IPV6_OPTIMISTIC_DAD is not set -+CONFIG_INET6_AH=m -+CONFIG_INET6_ESP=m -+CONFIG_INET6_IPCOMP=m -+# CONFIG_IPV6_MIP6 is not set -+CONFIG_INET6_XFRM_TUNNEL=m -+CONFIG_INET6_TUNNEL=m -+CONFIG_INET6_XFRM_MODE_TRANSPORT=m -+CONFIG_INET6_XFRM_MODE_TUNNEL=m -+CONFIG_INET6_XFRM_MODE_BEET=m -+# CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION is not set -+CONFIG_IPV6_SIT=m -+CONFIG_IPV6_TUNNEL=m -+# CONFIG_IPV6_MULTIPLE_TABLES is not set - # CONFIG_NETWORK_SECMARK is not set - # CONFIG_NETFILTER is not set - # CONFIG_IP_DCCP is not set - # CONFIG_IP_SCTP is not set - # CONFIG_TIPC is not set - # CONFIG_ATM is not set --# CONFIG_BRIDGE is not set -+CONFIG_BRIDGE=m - # CONFIG_VLAN_8021Q is not set - # CONFIG_DECNET is not set -+CONFIG_LLC=m - # CONFIG_LLC2 is not set - # CONFIG_IPX is not set - # CONFIG_ATALK is not set -@@ -228,16 +271,13 @@ CONFIG_DEFAULT_TCP_CONG="cubic" - # CONFIG_LAPB is not set - # CONFIG_ECONET is not set - # CONFIG_WAN_ROUTER is not set -- --# --# QoS and/or fair queueing --# - # CONFIG_NET_SCHED is not set - - # - # Network testing - # - # CONFIG_NET_PKTGEN is not set -+# CONFIG_NET_TCPPROBE is not set - # CONFIG_HAMRADIO is not set - # CONFIG_IRDA is not set - # CONFIG_BT is not set -@@ -251,6 +291,7 @@ CONFIG_DEFAULT_TCP_CONG="cubic" - # CONFIG_MAC80211 is not set - # CONFIG_IEEE80211 is not set - # CONFIG_RFKILL is not set -+# CONFIG_NET_9P is not set - - # - # Device Drivers -@@ -259,16 +300,13 @@ CONFIG_DEFAULT_TCP_CONG="cubic" - # - # Generic Driver Options - # -+CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" - CONFIG_STANDALONE=y - # CONFIG_PREVENT_FIRMWARE_BUILD is not set - # CONFIG_FW_LOADER is not set - # CONFIG_DEBUG_DRIVER is not set - # CONFIG_DEBUG_DEVRES is not set - # CONFIG_SYS_HYPERVISOR is not set -- --# --# Connector - unified userspace <-> kernelspace linker --# - # CONFIG_CONNECTOR is not set - CONFIG_MTD=y - # CONFIG_MTD_DEBUG is not set -@@ -288,6 +326,7 @@ CONFIG_MTD_BLOCK=y - # CONFIG_INFTL is not set - # CONFIG_RFD_FTL is not set - # CONFIG_SSFDC is not set -+# CONFIG_MTD_OOPS is not set - - # - # RAM/ROM/Flash chip drivers -@@ -327,6 +366,8 @@ CONFIG_MTD_PHYSMAP_BANKWIDTH=2 - # - # Self-contained MTD device drivers - # -+CONFIG_MTD_DATAFLASH=m -+CONFIG_MTD_M25P80=m - # CONFIG_MTD_SLRAM is not set - # CONFIG_MTD_PHRAM is not set - # CONFIG_MTD_MTDRAM is not set -@@ -345,20 +386,8 @@ CONFIG_MTD_PHYSMAP_BANKWIDTH=2 - # UBI - Unsorted block images - # - # CONFIG_MTD_UBI is not set -- --# --# Parallel port support --# - # CONFIG_PARPORT is not set -- --# --# Plug and Play support --# --# CONFIG_PNPACPI is not set -- --# --# Block devices --# -+CONFIG_BLK_DEV=y - # CONFIG_BLK_DEV_COW_COMMON is not set - CONFIG_BLK_DEV_LOOP=m - # CONFIG_BLK_DEV_CRYPTOLOOP is not set -@@ -369,42 +398,87 @@ CONFIG_BLK_DEV_RAM_SIZE=4096 - CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024 - # CONFIG_CDROM_PKTCDVD is not set - # CONFIG_ATA_OVER_ETH is not set -- --# --# Misc devices --# --# CONFIG_BLINK is not set -+CONFIG_MISC_DEVICES=y -+# CONFIG_EEPROM_93CX6 is not set -+CONFIG_ATMEL_SSC=m - # CONFIG_IDE is not set - - # - # SCSI device support - # - # CONFIG_RAID_ATTRS is not set --# CONFIG_SCSI is not set -+CONFIG_SCSI=m -+CONFIG_SCSI_DMA=y -+# CONFIG_SCSI_TGT is not set - # CONFIG_SCSI_NETLINK is not set --# CONFIG_ATA is not set -+# CONFIG_SCSI_PROC_FS is not set - - # --# Multi-device support (RAID and LVM) -+# SCSI support type (disk, tape, CD-ROM) - # --# CONFIG_MD is not set -+CONFIG_BLK_DEV_SD=m -+# CONFIG_CHR_DEV_ST is not set -+# CONFIG_CHR_DEV_OSST is not set -+CONFIG_BLK_DEV_SR=m -+# CONFIG_BLK_DEV_SR_VENDOR is not set -+# CONFIG_CHR_DEV_SG is not set -+# CONFIG_CHR_DEV_SCH is not set -+ -+# -+# Some SCSI devices (e.g. CD jukebox) support multiple LUNs -+# -+# CONFIG_SCSI_MULTI_LUN is not set -+# CONFIG_SCSI_CONSTANTS is not set -+# CONFIG_SCSI_LOGGING is not set -+# CONFIG_SCSI_SCAN_ASYNC is not set -+CONFIG_SCSI_WAIT_SCAN=m - - # --# Network device support -+# SCSI Transports - # -+# CONFIG_SCSI_SPI_ATTRS is not set -+# CONFIG_SCSI_FC_ATTRS is not set -+# CONFIG_SCSI_ISCSI_ATTRS is not set -+# CONFIG_SCSI_SAS_LIBSAS is not set -+# CONFIG_SCSI_SRP_ATTRS is not set -+# CONFIG_SCSI_LOWLEVEL is not set -+CONFIG_ATA=m -+# CONFIG_ATA_NONSTANDARD is not set -+CONFIG_PATA_AT32=m -+# CONFIG_PATA_PLATFORM is not set -+# CONFIG_MD is not set - CONFIG_NETDEVICES=y --CONFIG_DUMMY=y -+# CONFIG_NETDEVICES_MULTIQUEUE is not set -+# CONFIG_DUMMY is not set - # CONFIG_BONDING is not set -+# CONFIG_MACVLAN is not set - # CONFIG_EQUALIZER is not set - CONFIG_TUN=m --# CONFIG_PHYLIB is not set -+# CONFIG_VETH is not set -+CONFIG_PHYLIB=y - - # --# Ethernet (10 or 100Mbit) -+# MII PHY device drivers - # -+# CONFIG_MARVELL_PHY is not set -+# CONFIG_DAVICOM_PHY is not set -+# CONFIG_QSEMI_PHY is not set -+# CONFIG_LXT_PHY is not set -+# CONFIG_CICADA_PHY is not set -+# CONFIG_VITESSE_PHY is not set -+# CONFIG_SMSC_PHY is not set -+# CONFIG_BROADCOM_PHY is not set -+# CONFIG_ICPLUS_PHY is not set -+# CONFIG_FIXED_PHY is not set -+# CONFIG_MDIO_BITBANG is not set - CONFIG_NET_ETHERNET=y --CONFIG_MII=y -+# CONFIG_MII is not set - CONFIG_MACB=y -+# CONFIG_IBM_NEW_EMAC_ZMII is not set -+# CONFIG_IBM_NEW_EMAC_RGMII is not set -+# CONFIG_IBM_NEW_EMAC_TAH is not set -+# CONFIG_IBM_NEW_EMAC_EMAC4 is not set -+# CONFIG_B44 is not set - # CONFIG_NETDEV_1000 is not set - # CONFIG_NETDEV_10000 is not set - -@@ -423,27 +497,54 @@ CONFIG_PPP_DEFLATE=m - CONFIG_PPP_BSDCOMP=m - # CONFIG_PPP_MPPE is not set - # CONFIG_PPPOE is not set -+# CONFIG_PPPOL2TP is not set - # CONFIG_SLIP is not set - CONFIG_SLHC=m - # CONFIG_SHAPER is not set - # CONFIG_NETCONSOLE is not set - # CONFIG_NETPOLL is not set - # CONFIG_NET_POLL_CONTROLLER is not set -- --# --# ISDN subsystem --# - # CONFIG_ISDN is not set -- --# --# Telephony Support --# - # CONFIG_PHONE is not set - - # - # Input device support - # --# CONFIG_INPUT is not set -+CONFIG_INPUT=m -+# CONFIG_INPUT_FF_MEMLESS is not set -+CONFIG_INPUT_POLLDEV=m -+ -+# -+# Userland interfaces -+# -+CONFIG_INPUT_MOUSEDEV=m -+CONFIG_INPUT_MOUSEDEV_PSAUX=y -+CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 -+CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 -+# CONFIG_INPUT_JOYDEV is not set -+CONFIG_INPUT_EVDEV=m -+# CONFIG_INPUT_EVBUG is not set -+ -+# -+# Input Device Drivers -+# -+CONFIG_INPUT_KEYBOARD=y -+# CONFIG_KEYBOARD_ATKBD is not set -+# CONFIG_KEYBOARD_SUNKBD is not set -+# CONFIG_KEYBOARD_LKKBD is not set -+# CONFIG_KEYBOARD_XTKBD is not set -+# CONFIG_KEYBOARD_NEWTON is not set -+# CONFIG_KEYBOARD_STOWAWAY is not set -+CONFIG_KEYBOARD_GPIO=m -+CONFIG_INPUT_MOUSE=y -+# CONFIG_MOUSE_PS2 is not set -+# CONFIG_MOUSE_SERIAL is not set -+# CONFIG_MOUSE_VSXXXAA is not set -+CONFIG_MOUSE_GPIO=m -+# CONFIG_INPUT_JOYSTICK is not set -+# CONFIG_INPUT_TABLET is not set -+# CONFIG_INPUT_TOUCHSCREEN is not set -+# CONFIG_INPUT_MISC is not set - - # - # Hardware I/O ports -@@ -472,35 +573,87 @@ CONFIG_SERIAL_CORE=y - CONFIG_SERIAL_CORE_CONSOLE=y - CONFIG_UNIX98_PTYS=y - # CONFIG_LEGACY_PTYS is not set -- --# --# IPMI --# - # CONFIG_IPMI_HANDLER is not set --# CONFIG_WATCHDOG is not set - # CONFIG_HW_RANDOM is not set - # CONFIG_RTC is not set - # CONFIG_GEN_RTC is not set - # CONFIG_R3964 is not set - # CONFIG_RAW_DRIVER is not set -+# CONFIG_TCG_TPM is not set -+CONFIG_I2C=m -+CONFIG_I2C_BOARDINFO=y -+CONFIG_I2C_CHARDEV=m -+ -+# -+# I2C Algorithms -+# -+CONFIG_I2C_ALGOBIT=m -+# CONFIG_I2C_ALGOPCF is not set -+# CONFIG_I2C_ALGOPCA is not set -+ -+# -+# I2C Hardware Bus support -+# -+CONFIG_I2C_GPIO=m -+# CONFIG_I2C_OCORES is not set -+# CONFIG_I2C_PARPORT_LIGHT is not set -+# CONFIG_I2C_SIMTEC is not set -+# CONFIG_I2C_TAOS_EVM is not set -+# CONFIG_I2C_STUB is not set -+ -+# -+# Miscellaneous I2C Chip support -+# -+# CONFIG_SENSORS_DS1337 is not set -+# CONFIG_SENSORS_DS1374 is not set -+# CONFIG_DS1682 is not set -+# CONFIG_SENSORS_EEPROM is not set -+# CONFIG_SENSORS_PCF8574 is not set -+# CONFIG_SENSORS_PCA9539 is not set -+# CONFIG_SENSORS_PCF8591 is not set -+# CONFIG_SENSORS_MAX6875 is not set -+# CONFIG_SENSORS_TSL2550 is not set -+# CONFIG_I2C_DEBUG_CORE is not set -+# CONFIG_I2C_DEBUG_ALGO is not set -+# CONFIG_I2C_DEBUG_BUS is not set -+# CONFIG_I2C_DEBUG_CHIP is not set - - # --# TPM devices -+# SPI support - # --# CONFIG_TCG_TPM is not set --# CONFIG_I2C is not set -+CONFIG_SPI=y -+# CONFIG_SPI_DEBUG is not set -+CONFIG_SPI_MASTER=y - - # --# SPI support -+# SPI Master Controller Drivers - # --# CONFIG_SPI is not set --# CONFIG_SPI_MASTER is not set -+CONFIG_SPI_ATMEL=y -+# CONFIG_SPI_BITBANG is not set - - # --# Dallas's 1-wire bus -+# SPI Protocol Masters - # -+# CONFIG_SPI_AT25 is not set -+CONFIG_SPI_SPIDEV=m -+# CONFIG_SPI_TLE62X0 is not set - # CONFIG_W1 is not set -+# CONFIG_POWER_SUPPLY is not set - # CONFIG_HWMON is not set -+CONFIG_WATCHDOG=y -+# CONFIG_WATCHDOG_NOWAYOUT is not set -+ -+# -+# Watchdog Device Drivers -+# -+# CONFIG_SOFT_WATCHDOG is not set -+CONFIG_AT32AP700X_WDT=y -+ -+# -+# Sonics Silicon Backplane -+# -+CONFIG_SSB_POSSIBLE=y -+# CONFIG_SSB is not set - - # - # Multifunction device drivers -@@ -517,23 +670,94 @@ CONFIG_UNIX98_PTYS=y - # - # Graphics support - # --# CONFIG_BACKLIGHT_LCD_SUPPORT is not set -+# CONFIG_VGASTATE is not set -+# CONFIG_VIDEO_OUTPUT_CONTROL is not set -+CONFIG_FB=y -+# CONFIG_FIRMWARE_EDID is not set -+# CONFIG_FB_DDC is not set -+CONFIG_FB_CFB_FILLRECT=y -+CONFIG_FB_CFB_COPYAREA=y -+CONFIG_FB_CFB_IMAGEBLIT=y -+# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set -+# CONFIG_FB_SYS_FILLRECT is not set -+# CONFIG_FB_SYS_COPYAREA is not set -+# CONFIG_FB_SYS_IMAGEBLIT is not set -+# CONFIG_FB_SYS_FOPS is not set -+CONFIG_FB_DEFERRED_IO=y -+# CONFIG_FB_SVGALIB is not set -+# CONFIG_FB_MACMODES is not set -+# CONFIG_FB_BACKLIGHT is not set -+# CONFIG_FB_MODE_HELPERS is not set -+# CONFIG_FB_TILEBLITTING is not set -+ -+# -+# Frame buffer hardware drivers -+# -+# CONFIG_FB_S1D13XXX is not set -+CONFIG_FB_ATMEL=y -+# CONFIG_FB_VIRTUAL is not set -+CONFIG_BACKLIGHT_LCD_SUPPORT=y -+CONFIG_LCD_CLASS_DEVICE=y -+CONFIG_LCD_LTV350QV=y -+# CONFIG_BACKLIGHT_CLASS_DEVICE is not set - - # - # Display device support - # - # CONFIG_DISPLAY_SUPPORT is not set --# CONFIG_VGASTATE is not set --# CONFIG_FB is not set -+# CONFIG_LOGO is not set - - # - # Sound - # --# CONFIG_SOUND is not set -+CONFIG_SOUND=m -+ -+# -+# Advanced Linux Sound Architecture -+# -+CONFIG_SND=m -+CONFIG_SND_TIMER=m -+CONFIG_SND_PCM=m -+# CONFIG_SND_SEQUENCER is not set -+CONFIG_SND_OSSEMUL=y -+CONFIG_SND_MIXER_OSS=m -+CONFIG_SND_PCM_OSS=m -+CONFIG_SND_PCM_OSS_PLUGINS=y -+# CONFIG_SND_DYNAMIC_MINORS is not set -+# CONFIG_SND_SUPPORT_OLD_API is not set -+# CONFIG_SND_VERBOSE_PROCFS is not set -+# CONFIG_SND_VERBOSE_PRINTK is not set -+# CONFIG_SND_DEBUG is not set -+ -+# -+# Generic devices -+# -+# CONFIG_SND_DUMMY is not set -+# CONFIG_SND_MTPAV is not set -+# CONFIG_SND_SERIAL_U16550 is not set -+# CONFIG_SND_MPU401 is not set -+ -+# -+# SPI devices -+# -+CONFIG_SND_AT73C213=m -+CONFIG_SND_AT73C213_TARGET_BITRATE=48000 -+ -+# -+# System on Chip audio support -+# -+# CONFIG_SND_SOC is not set -+ -+# -+# SoC Audio support for SuperH -+# - - # --# USB support -+# Open Sound System - # -+# CONFIG_SOUND_PRIME is not set -+# CONFIG_HID_SUPPORT is not set -+CONFIG_USB_SUPPORT=y - # CONFIG_USB_ARCH_HAS_HCD is not set - # CONFIG_USB_ARCH_HAS_OHCI is not set - # CONFIG_USB_ARCH_HAS_EHCI is not set -@@ -545,47 +769,116 @@ CONFIG_UNIX98_PTYS=y - # - # USB Gadget Support - # --# CONFIG_USB_GADGET is not set --# CONFIG_MMC is not set -- --# --# LED devices --# --# CONFIG_NEW_LEDS is not set -+CONFIG_USB_GADGET=y -+# CONFIG_USB_GADGET_DEBUG is not set -+# CONFIG_USB_GADGET_DEBUG_FILES is not set -+# CONFIG_USB_GADGET_DEBUG_FS is not set -+CONFIG_USB_GADGET_SELECTED=y -+# CONFIG_USB_GADGET_AMD5536UDC is not set -+CONFIG_USB_GADGET_ATMEL_USBA=y -+CONFIG_USB_ATMEL_USBA=y -+# CONFIG_USB_GADGET_FSL_USB2 is not set -+# CONFIG_USB_GADGET_NET2280 is not set -+# CONFIG_USB_GADGET_PXA2XX is not set -+# CONFIG_USB_GADGET_M66592 is not set -+# CONFIG_USB_GADGET_GOKU is not set -+# CONFIG_USB_GADGET_LH7A40X is not set -+# CONFIG_USB_GADGET_OMAP is not set -+# CONFIG_USB_GADGET_S3C2410 is not set -+# CONFIG_USB_GADGET_AT91 is not set -+# CONFIG_USB_GADGET_DUMMY_HCD is not set -+CONFIG_USB_GADGET_DUALSPEED=y -+CONFIG_USB_ZERO=m -+CONFIG_USB_ETH=m -+CONFIG_USB_ETH_RNDIS=y -+CONFIG_USB_GADGETFS=m -+CONFIG_USB_FILE_STORAGE=m -+# CONFIG_USB_FILE_STORAGE_TEST is not set -+CONFIG_USB_G_SERIAL=m -+# CONFIG_USB_MIDI_GADGET is not set -+CONFIG_MMC=m -+# CONFIG_MMC_DEBUG is not set -+# CONFIG_MMC_UNSAFE_RESUME is not set -+ -+# -+# MMC/SD Card Drivers -+# -+CONFIG_MMC_BLOCK=m -+CONFIG_MMC_BLOCK_BOUNCE=y -+# CONFIG_SDIO_UART is not set -+ -+# -+# MMC/SD Host Controller Drivers -+# -+CONFIG_MMC_SPI=m -+CONFIG_NEW_LEDS=y -+CONFIG_LEDS_CLASS=m - - # - # LED drivers - # -+CONFIG_LEDS_GPIO=m - - # - # LED Triggers - # -+CONFIG_LEDS_TRIGGERS=y -+CONFIG_LEDS_TRIGGER_TIMER=m -+CONFIG_LEDS_TRIGGER_HEARTBEAT=m -+CONFIG_RTC_LIB=y -+CONFIG_RTC_CLASS=y -+CONFIG_RTC_HCTOSYS=y -+CONFIG_RTC_HCTOSYS_DEVICE="rtc0" -+# CONFIG_RTC_DEBUG is not set - - # --# InfiniBand support -+# RTC interfaces - # -+CONFIG_RTC_INTF_SYSFS=y -+CONFIG_RTC_INTF_PROC=y -+CONFIG_RTC_INTF_DEV=y -+# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set -+# CONFIG_RTC_DRV_TEST is not set - - # --# EDAC - error detection and reporting (RAS) (EXPERIMENTAL) -+# I2C RTC drivers - # -+# CONFIG_RTC_DRV_DS1307 is not set -+# CONFIG_RTC_DRV_DS1374 is not set -+# CONFIG_RTC_DRV_DS1672 is not set -+# CONFIG_RTC_DRV_MAX6900 is not set -+# CONFIG_RTC_DRV_RS5C372 is not set -+# CONFIG_RTC_DRV_ISL1208 is not set -+# CONFIG_RTC_DRV_X1205 is not set -+# CONFIG_RTC_DRV_PCF8563 is not set -+# CONFIG_RTC_DRV_PCF8583 is not set -+# CONFIG_RTC_DRV_M41T80 is not set - - # --# Real Time Clock -+# SPI RTC drivers - # --# CONFIG_RTC_CLASS is not set -+# CONFIG_RTC_DRV_RS5C348 is not set -+# CONFIG_RTC_DRV_MAX6902 is not set - - # --# DMA Engine support -+# Platform RTC drivers - # --# CONFIG_DMA_ENGINE is not set -+# CONFIG_RTC_DRV_DS1553 is not set -+# CONFIG_RTC_DRV_STK17TA8 is not set -+# CONFIG_RTC_DRV_DS1742 is not set -+# CONFIG_RTC_DRV_M48T86 is not set -+# CONFIG_RTC_DRV_M48T59 is not set -+# CONFIG_RTC_DRV_V3020 is not set - - # --# DMA Clients -+# on-CPU RTC drivers - # -+CONFIG_RTC_DRV_AT32AP700X=y - - # --# DMA Devices -+# Userspace I/O - # -+# CONFIG_UIO is not set - - # - # File systems -@@ -593,8 +886,11 @@ CONFIG_UNIX98_PTYS=y - CONFIG_EXT2_FS=m - # CONFIG_EXT2_FS_XATTR is not set - # CONFIG_EXT2_FS_XIP is not set --# CONFIG_EXT3_FS is not set -+CONFIG_EXT3_FS=m -+# CONFIG_EXT3_FS_XATTR is not set - # CONFIG_EXT4DEV_FS is not set -+CONFIG_JBD=m -+# CONFIG_JBD_DEBUG is not set - # CONFIG_REISERFS_FS is not set - # CONFIG_JFS_FS is not set - # CONFIG_FS_POSIX_ACL is not set -@@ -609,7 +905,7 @@ CONFIG_INOTIFY_USER=y - # CONFIG_DNOTIFY is not set - # CONFIG_AUTOFS_FS is not set - # CONFIG_AUTOFS4_FS is not set --# CONFIG_FUSE_FS is not set -+CONFIG_FUSE_FS=m - - # - # CD-ROM/DVD Filesystems -@@ -637,8 +933,7 @@ CONFIG_SYSFS=y - CONFIG_TMPFS=y - # CONFIG_TMPFS_POSIX_ACL is not set - # CONFIG_HUGETLB_PAGE is not set --CONFIG_RAMFS=y --CONFIG_CONFIGFS_FS=m -+# CONFIG_CONFIGFS_FS is not set - - # - # Miscellaneous filesystems -@@ -652,11 +947,12 @@ CONFIG_CONFIGFS_FS=m - # CONFIG_EFS_FS is not set - CONFIG_JFFS2_FS=y - CONFIG_JFFS2_FS_DEBUG=0 --CONFIG_JFFS2_FS_WRITEBUFFER=y -+# CONFIG_JFFS2_FS_WRITEBUFFER is not set - # CONFIG_JFFS2_SUMMARY is not set - # CONFIG_JFFS2_FS_XATTR is not set - # CONFIG_JFFS2_COMPRESSION_OPTIONS is not set - CONFIG_JFFS2_ZLIB=y -+# CONFIG_JFFS2_LZO is not set - CONFIG_JFFS2_RTIME=y - # CONFIG_JFFS2_RUBIN is not set - # CONFIG_CRAMFS is not set -@@ -665,10 +961,7 @@ CONFIG_JFFS2_RTIME=y - # CONFIG_QNX4FS_FS is not set - # CONFIG_SYSV_FS is not set - # CONFIG_UFS_FS is not set -- --# --# Network File Systems --# -+CONFIG_NETWORK_FILESYSTEMS=y - CONFIG_NFS_FS=y - CONFIG_NFS_V3=y - # CONFIG_NFS_V3_ACL is not set -@@ -688,17 +981,12 @@ CONFIG_SUNRPC=y - # CONFIG_NCP_FS is not set - # CONFIG_CODA_FS is not set - # CONFIG_AFS_FS is not set --# CONFIG_9P_FS is not set - - # - # Partition Types - # - # CONFIG_PARTITION_ADVANCED is not set - CONFIG_MSDOS_PARTITION=y -- --# --# Native Language Support --# - CONFIG_NLS=m - CONFIG_NLS_DEFAULT="iso8859-1" - CONFIG_NLS_CODEPAGE_437=m -@@ -739,17 +1027,18 @@ CONFIG_NLS_ISO8859_1=m - # CONFIG_NLS_KOI8_R is not set - # CONFIG_NLS_KOI8_U is not set - CONFIG_NLS_UTF8=m -- --# --# Distributed Lock Manager --# - # CONFIG_DLM is not set -+CONFIG_INSTRUMENTATION=y -+CONFIG_PROFILING=y -+CONFIG_OPROFILE=m -+CONFIG_KPROBES=y -+# CONFIG_MARKERS is not set - - # - # Kernel hacking - # --CONFIG_TRACE_IRQFLAGS_SUPPORT=y - # CONFIG_PRINTK_TIME is not set -+CONFIG_ENABLE_WARN_DEPRECATED=y - CONFIG_ENABLE_MUST_CHECK=y - CONFIG_MAGIC_SYSRQ=y - # CONFIG_UNUSED_SYMBOLS is not set -@@ -758,12 +1047,17 @@ CONFIG_DEBUG_FS=y - CONFIG_DEBUG_KERNEL=y - # CONFIG_DEBUG_SHIRQ is not set - CONFIG_DETECT_SOFTLOCKUP=y -+CONFIG_SCHED_DEBUG=y - # CONFIG_SCHEDSTATS is not set - # CONFIG_TIMER_STATS is not set -+# CONFIG_SLUB_DEBUG_ON is not set - # CONFIG_DEBUG_RT_MUTEXES is not set - # CONFIG_RT_MUTEX_TESTER is not set - # CONFIG_DEBUG_SPINLOCK is not set - # CONFIG_DEBUG_MUTEXES is not set -+# CONFIG_DEBUG_LOCK_ALLOC is not set -+# CONFIG_PROVE_LOCKING is not set -+# CONFIG_LOCK_STAT is not set - # CONFIG_DEBUG_SPINLOCK_SLEEP is not set - # CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set - # CONFIG_DEBUG_KOBJECT is not set -@@ -771,22 +1065,63 @@ CONFIG_DEBUG_BUGVERBOSE=y - # CONFIG_DEBUG_INFO is not set - # CONFIG_DEBUG_VM is not set - # CONFIG_DEBUG_LIST is not set -+# CONFIG_DEBUG_SG is not set - CONFIG_FRAME_POINTER=y - CONFIG_FORCED_INLINING=y -+# CONFIG_BOOT_PRINTK_DELAY is not set - # CONFIG_RCU_TORTURE_TEST is not set -+# CONFIG_LKDTM is not set - # CONFIG_FAULT_INJECTION is not set --# CONFIG_KPROBES is not set -+# CONFIG_SAMPLES is not set - - # - # Security options - # - # CONFIG_KEYS is not set - # CONFIG_SECURITY is not set -- --# --# Cryptographic options --# --# CONFIG_CRYPTO is not set -+# CONFIG_SECURITY_FILE_CAPABILITIES is not set -+CONFIG_CRYPTO=y -+CONFIG_CRYPTO_ALGAPI=m -+CONFIG_CRYPTO_BLKCIPHER=m -+CONFIG_CRYPTO_HASH=m -+CONFIG_CRYPTO_MANAGER=m -+CONFIG_CRYPTO_HMAC=m -+# CONFIG_CRYPTO_XCBC is not set -+# CONFIG_CRYPTO_NULL is not set -+# CONFIG_CRYPTO_MD4 is not set -+CONFIG_CRYPTO_MD5=m -+CONFIG_CRYPTO_SHA1=m -+# CONFIG_CRYPTO_SHA256 is not set -+# CONFIG_CRYPTO_SHA512 is not set -+# CONFIG_CRYPTO_WP512 is not set -+# CONFIG_CRYPTO_TGR192 is not set -+# CONFIG_CRYPTO_GF128MUL is not set -+# CONFIG_CRYPTO_ECB is not set -+CONFIG_CRYPTO_CBC=m -+# CONFIG_CRYPTO_PCBC is not set -+# CONFIG_CRYPTO_LRW is not set -+# CONFIG_CRYPTO_XTS is not set -+# CONFIG_CRYPTO_CRYPTD is not set -+CONFIG_CRYPTO_DES=m -+# CONFIG_CRYPTO_FCRYPT is not set -+# CONFIG_CRYPTO_BLOWFISH is not set -+# CONFIG_CRYPTO_TWOFISH is not set -+# CONFIG_CRYPTO_SERPENT is not set -+# CONFIG_CRYPTO_AES is not set -+# CONFIG_CRYPTO_CAST5 is not set -+# CONFIG_CRYPTO_CAST6 is not set -+# CONFIG_CRYPTO_TEA is not set -+# CONFIG_CRYPTO_ARC4 is not set -+# CONFIG_CRYPTO_KHAZAD is not set -+# CONFIG_CRYPTO_ANUBIS is not set -+# CONFIG_CRYPTO_SEED is not set -+CONFIG_CRYPTO_DEFLATE=m -+# CONFIG_CRYPTO_MICHAEL_MIC is not set -+# CONFIG_CRYPTO_CRC32C is not set -+# CONFIG_CRYPTO_CAMELLIA is not set -+# CONFIG_CRYPTO_TEST is not set -+# CONFIG_CRYPTO_AUTHENC is not set -+# CONFIG_CRYPTO_HW is not set - - # - # Library routines -@@ -794,10 +1129,10 @@ CONFIG_FORCED_INLINING=y - CONFIG_BITREVERSE=y - CONFIG_CRC_CCITT=m - # CONFIG_CRC16 is not set --# CONFIG_CRC_ITU_T is not set -+CONFIG_CRC_ITU_T=m - CONFIG_CRC32=y -+CONFIG_CRC7=m - # CONFIG_LIBCRC32C is not set --CONFIG_AUDIT_GENERIC=y - CONFIG_ZLIB_INFLATE=y - CONFIG_ZLIB_DEFLATE=y - CONFIG_PLIST=y -diff -Nrup linux-2.6.24/arch/avr32/configs/atstk1003_defconfig linux-avr32/arch/avr32/configs/atstk1003_defconfig ---- linux-2.6.24/arch/avr32/configs/atstk1003_defconfig 1969-12-31 19:00:00.000000000 -0500 -+++ linux-avr32/arch/avr32/configs/atstk1003_defconfig 2008-02-01 14:51:35.000000000 -0500 -@@ -0,0 +1,1015 @@ -+# -+# Automatically generated make config: don't edit -+# Linux kernel version: 2.6.24-rc7 -+# Wed Jan 9 22:54:34 2008 -+# -+CONFIG_AVR32=y -+CONFIG_GENERIC_GPIO=y -+CONFIG_GENERIC_HARDIRQS=y -+CONFIG_STACKTRACE_SUPPORT=y -+CONFIG_LOCKDEP_SUPPORT=y -+CONFIG_TRACE_IRQFLAGS_SUPPORT=y -+CONFIG_HARDIRQS_SW_RESEND=y -+CONFIG_GENERIC_IRQ_PROBE=y -+CONFIG_RWSEM_GENERIC_SPINLOCK=y -+CONFIG_GENERIC_TIME=y -+# CONFIG_RWSEM_XCHGADD_ALGORITHM is not set -+# CONFIG_ARCH_HAS_ILOG2_U32 is not set -+# CONFIG_ARCH_HAS_ILOG2_U64 is not set -+CONFIG_ARCH_SUPPORTS_OPROFILE=y -+CONFIG_GENERIC_HWEIGHT=y -+CONFIG_GENERIC_CALIBRATE_DELAY=y -+CONFIG_GENERIC_BUG=y -+CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" -+ -+# -+# General setup -+# -+CONFIG_EXPERIMENTAL=y -+CONFIG_BROKEN_ON_SMP=y -+CONFIG_INIT_ENV_ARG_LIMIT=32 -+CONFIG_LOCALVERSION="" -+# CONFIG_LOCALVERSION_AUTO is not set -+CONFIG_SWAP=y -+CONFIG_SYSVIPC=y -+CONFIG_SYSVIPC_SYSCTL=y -+CONFIG_POSIX_MQUEUE=y -+CONFIG_BSD_PROCESS_ACCT=y -+CONFIG_BSD_PROCESS_ACCT_V3=y -+CONFIG_TASKSTATS=y -+CONFIG_TASK_DELAY_ACCT=y -+# CONFIG_TASK_XACCT is not set -+# CONFIG_USER_NS is not set -+# CONFIG_PID_NS is not set -+CONFIG_AUDIT=y -+# CONFIG_IKCONFIG is not set -+CONFIG_LOG_BUF_SHIFT=14 -+# CONFIG_CGROUPS is not set -+CONFIG_FAIR_GROUP_SCHED=y -+CONFIG_FAIR_USER_SCHED=y -+# CONFIG_FAIR_CGROUP_SCHED is not set -+CONFIG_SYSFS_DEPRECATED=y -+CONFIG_RELAY=y -+CONFIG_BLK_DEV_INITRD=y -+CONFIG_INITRAMFS_SOURCE="" -+CONFIG_CC_OPTIMIZE_FOR_SIZE=y -+CONFIG_SYSCTL=y -+CONFIG_EMBEDDED=y -+# CONFIG_SYSCTL_SYSCALL is not set -+CONFIG_KALLSYMS=y -+# CONFIG_KALLSYMS_ALL is not set -+# CONFIG_KALLSYMS_EXTRA_PASS is not set -+CONFIG_HOTPLUG=y -+CONFIG_PRINTK=y -+CONFIG_BUG=y -+CONFIG_ELF_CORE=y -+# CONFIG_BASE_FULL is not set -+CONFIG_FUTEX=y -+CONFIG_ANON_INODES=y -+CONFIG_EPOLL=y -+CONFIG_SIGNALFD=y -+CONFIG_EVENTFD=y -+CONFIG_SHMEM=y -+CONFIG_VM_EVENT_COUNTERS=y -+# CONFIG_SLUB_DEBUG is not set -+# CONFIG_SLAB is not set -+CONFIG_SLUB=y -+# CONFIG_SLOB is not set -+CONFIG_SLABINFO=y -+CONFIG_RT_MUTEXES=y -+# CONFIG_TINY_SHMEM is not set -+CONFIG_BASE_SMALL=1 -+CONFIG_MODULES=y -+CONFIG_MODULE_UNLOAD=y -+# CONFIG_MODULE_FORCE_UNLOAD is not set -+# CONFIG_MODVERSIONS is not set -+# CONFIG_MODULE_SRCVERSION_ALL is not set -+# CONFIG_KMOD is not set -+CONFIG_BLOCK=y -+# CONFIG_LBD is not set -+# CONFIG_BLK_DEV_IO_TRACE is not set -+# CONFIG_LSF is not set -+# CONFIG_BLK_DEV_BSG is not set -+ -+# -+# IO Schedulers -+# -+CONFIG_IOSCHED_NOOP=y -+# CONFIG_IOSCHED_AS is not set -+# CONFIG_IOSCHED_DEADLINE is not set -+CONFIG_IOSCHED_CFQ=y -+# CONFIG_DEFAULT_AS is not set -+# CONFIG_DEFAULT_DEADLINE is not set -+CONFIG_DEFAULT_CFQ=y -+# CONFIG_DEFAULT_NOOP is not set -+CONFIG_DEFAULT_IOSCHED="cfq" -+ -+# -+# System Type and features -+# -+CONFIG_SUBARCH_AVR32B=y -+CONFIG_MMU=y -+CONFIG_PERFORMANCE_COUNTERS=y -+CONFIG_PLATFORM_AT32AP=y -+CONFIG_CPU_AT32AP700X=y -+CONFIG_CPU_AT32AP7001=y -+CONFIG_BOARD_ATSTK1000=y -+# CONFIG_BOARD_ATNGW100 is not set -+# CONFIG_BOARD_ATSTK1002 is not set -+CONFIG_BOARD_ATSTK1003=y -+# CONFIG_BOARD_ATSTK1004 is not set -+# CONFIG_BOARD_ATSTK100X_CUSTOM is not set -+# CONFIG_BOARD_ATSTK100X_SPI1 is not set -+# CONFIG_BOARD_ATSTK1000_J2_LED is not set -+# CONFIG_BOARD_ATSTK1000_J2_LED8 is not set -+# CONFIG_BOARD_ATSTK1000_J2_RGB is not set -+CONFIG_BOARD_ATSTK1000_EXTDAC=y -+CONFIG_LOADER_U_BOOT=y -+ -+# -+# Atmel AVR32 AP options -+# -+# CONFIG_AP700X_32_BIT_SMC is not set -+CONFIG_AP700X_16_BIT_SMC=y -+# CONFIG_AP700X_8_BIT_SMC is not set -+CONFIG_LOAD_ADDRESS=0x10000000 -+CONFIG_ENTRY_ADDRESS=0x90000000 -+CONFIG_PHYS_OFFSET=0x10000000 -+CONFIG_PREEMPT_NONE=y -+# CONFIG_PREEMPT_VOLUNTARY is not set -+# CONFIG_PREEMPT is not set -+# CONFIG_HAVE_ARCH_BOOTMEM_NODE is not set -+# CONFIG_ARCH_HAVE_MEMORY_PRESENT is not set -+# CONFIG_NEED_NODE_MEMMAP_SIZE is not set -+CONFIG_ARCH_FLATMEM_ENABLE=y -+# CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set -+# CONFIG_ARCH_SPARSEMEM_ENABLE is not set -+CONFIG_SELECT_MEMORY_MODEL=y -+CONFIG_FLATMEM_MANUAL=y -+# CONFIG_DISCONTIGMEM_MANUAL is not set -+# CONFIG_SPARSEMEM_MANUAL is not set -+CONFIG_FLATMEM=y -+CONFIG_FLAT_NODE_MEM_MAP=y -+# CONFIG_SPARSEMEM_STATIC is not set -+# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set -+CONFIG_SPLIT_PTLOCK_CPUS=4 -+# CONFIG_RESOURCES_64BIT is not set -+CONFIG_ZONE_DMA_FLAG=0 -+CONFIG_VIRT_TO_BUS=y -+# CONFIG_OWNERSHIP_TRACE is not set -+# CONFIG_HZ_100 is not set -+CONFIG_HZ_250=y -+# CONFIG_HZ_300 is not set -+# CONFIG_HZ_1000 is not set -+CONFIG_HZ=250 -+CONFIG_CMDLINE="" -+ -+# -+# Power management options -+# -+ -+# -+# CPU Frequency scaling -+# -+CONFIG_CPU_FREQ=y -+CONFIG_CPU_FREQ_TABLE=y -+# CONFIG_CPU_FREQ_DEBUG is not set -+# CONFIG_CPU_FREQ_STAT is not set -+CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y -+# CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set -+# CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND is not set -+# CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set -+CONFIG_CPU_FREQ_GOV_PERFORMANCE=y -+# CONFIG_CPU_FREQ_GOV_POWERSAVE is not set -+CONFIG_CPU_FREQ_GOV_USERSPACE=y -+CONFIG_CPU_FREQ_GOV_ONDEMAND=y -+# CONFIG_CPU_FREQ_GOV_CONSERVATIVE is not set -+CONFIG_CPU_FREQ_AT32AP=y -+ -+# -+# Bus options -+# -+# CONFIG_ARCH_SUPPORTS_MSI is not set -+# CONFIG_PCCARD is not set -+ -+# -+# Executable file formats -+# -+CONFIG_BINFMT_ELF=y -+# CONFIG_BINFMT_MISC is not set -+ -+# -+# Networking -+# -+CONFIG_NET=y -+ -+# -+# Networking options -+# -+CONFIG_PACKET=y -+CONFIG_PACKET_MMAP=y -+CONFIG_UNIX=y -+# CONFIG_NET_KEY is not set -+CONFIG_INET=y -+# CONFIG_IP_MULTICAST is not set -+# CONFIG_IP_ADVANCED_ROUTER is not set -+CONFIG_IP_FIB_HASH=y -+# CONFIG_IP_PNP is not set -+# CONFIG_NET_IPIP is not set -+# CONFIG_NET_IPGRE is not set -+# CONFIG_ARPD is not set -+# CONFIG_SYN_COOKIES is not set -+# CONFIG_INET_AH is not set -+# CONFIG_INET_ESP is not set -+# CONFIG_INET_IPCOMP is not set -+# CONFIG_INET_XFRM_TUNNEL is not set -+# CONFIG_INET_TUNNEL is not set -+# CONFIG_INET_XFRM_MODE_TRANSPORT is not set -+# CONFIG_INET_XFRM_MODE_TUNNEL is not set -+# CONFIG_INET_XFRM_MODE_BEET is not set -+# CONFIG_INET_LRO is not set -+# CONFIG_INET_DIAG is not set -+# CONFIG_TCP_CONG_ADVANCED is not set -+CONFIG_TCP_CONG_CUBIC=y -+CONFIG_DEFAULT_TCP_CONG="cubic" -+# CONFIG_TCP_MD5SIG is not set -+# CONFIG_IPV6 is not set -+# CONFIG_INET6_XFRM_TUNNEL is not set -+# CONFIG_INET6_TUNNEL is not set -+# CONFIG_NETWORK_SECMARK is not set -+# CONFIG_NETFILTER is not set -+# CONFIG_IP_DCCP is not set -+# CONFIG_IP_SCTP is not set -+# CONFIG_TIPC is not set -+# CONFIG_ATM is not set -+# CONFIG_BRIDGE is not set -+# CONFIG_VLAN_8021Q is not set -+# CONFIG_DECNET is not set -+# CONFIG_LLC2 is not set -+# CONFIG_IPX is not set -+# CONFIG_ATALK is not set -+# CONFIG_X25 is not set -+# CONFIG_LAPB is not set -+# CONFIG_ECONET is not set -+# CONFIG_WAN_ROUTER is not set -+# CONFIG_NET_SCHED is not set -+ -+# -+# Network testing -+# -+# CONFIG_NET_PKTGEN is not set -+# CONFIG_NET_TCPPROBE is not set -+# CONFIG_HAMRADIO is not set -+# CONFIG_IRDA is not set -+# CONFIG_BT is not set -+# CONFIG_AF_RXRPC is not set -+ -+# -+# Wireless -+# -+# CONFIG_CFG80211 is not set -+# CONFIG_WIRELESS_EXT is not set -+# CONFIG_MAC80211 is not set -+# CONFIG_IEEE80211 is not set -+# CONFIG_RFKILL is not set -+# CONFIG_NET_9P is not set -+ -+# -+# Device Drivers -+# -+ -+# -+# Generic Driver Options -+# -+CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" -+CONFIG_STANDALONE=y -+# CONFIG_PREVENT_FIRMWARE_BUILD is not set -+# CONFIG_FW_LOADER is not set -+# CONFIG_DEBUG_DRIVER is not set -+# CONFIG_DEBUG_DEVRES is not set -+# CONFIG_SYS_HYPERVISOR is not set -+# CONFIG_CONNECTOR is not set -+CONFIG_MTD=y -+# CONFIG_MTD_DEBUG is not set -+# CONFIG_MTD_CONCAT is not set -+CONFIG_MTD_PARTITIONS=y -+# CONFIG_MTD_REDBOOT_PARTS is not set -+CONFIG_MTD_CMDLINE_PARTS=y -+ -+# -+# User Modules And Translation Layers -+# -+CONFIG_MTD_CHAR=y -+CONFIG_MTD_BLKDEVS=y -+CONFIG_MTD_BLOCK=y -+# CONFIG_FTL is not set -+# CONFIG_NFTL is not set -+# CONFIG_INFTL is not set -+# CONFIG_RFD_FTL is not set -+# CONFIG_SSFDC is not set -+# CONFIG_MTD_OOPS is not set -+ -+# -+# RAM/ROM/Flash chip drivers -+# -+CONFIG_MTD_CFI=y -+# CONFIG_MTD_JEDECPROBE is not set -+CONFIG_MTD_GEN_PROBE=y -+# CONFIG_MTD_CFI_ADV_OPTIONS is not set -+CONFIG_MTD_MAP_BANK_WIDTH_1=y -+CONFIG_MTD_MAP_BANK_WIDTH_2=y -+CONFIG_MTD_MAP_BANK_WIDTH_4=y -+# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set -+# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set -+# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set -+CONFIG_MTD_CFI_I1=y -+CONFIG_MTD_CFI_I2=y -+# CONFIG_MTD_CFI_I4 is not set -+# CONFIG_MTD_CFI_I8 is not set -+# CONFIG_MTD_CFI_INTELEXT is not set -+CONFIG_MTD_CFI_AMDSTD=y -+# CONFIG_MTD_CFI_STAA is not set -+CONFIG_MTD_CFI_UTIL=y -+# CONFIG_MTD_RAM is not set -+# CONFIG_MTD_ROM is not set -+# CONFIG_MTD_ABSENT is not set -+ -+# -+# Mapping drivers for chip access -+# -+# CONFIG_MTD_COMPLEX_MAPPINGS is not set -+CONFIG_MTD_PHYSMAP=y -+CONFIG_MTD_PHYSMAP_START=0x8000000 -+CONFIG_MTD_PHYSMAP_LEN=0x0 -+CONFIG_MTD_PHYSMAP_BANKWIDTH=2 -+# CONFIG_MTD_PLATRAM is not set -+ -+# -+# Self-contained MTD device drivers -+# -+CONFIG_MTD_DATAFLASH=m -+CONFIG_MTD_M25P80=m -+# CONFIG_MTD_SLRAM is not set -+# CONFIG_MTD_PHRAM is not set -+# CONFIG_MTD_MTDRAM is not set -+# CONFIG_MTD_BLOCK2MTD is not set -+ -+# -+# Disk-On-Chip Device Drivers -+# -+# CONFIG_MTD_DOC2000 is not set -+# CONFIG_MTD_DOC2001 is not set -+# CONFIG_MTD_DOC2001PLUS is not set -+# CONFIG_MTD_NAND is not set -+# CONFIG_MTD_ONENAND is not set -+ -+# -+# UBI - Unsorted block images -+# -+# CONFIG_MTD_UBI is not set -+# CONFIG_PARPORT is not set -+CONFIG_BLK_DEV=y -+# CONFIG_BLK_DEV_COW_COMMON is not set -+CONFIG_BLK_DEV_LOOP=m -+# CONFIG_BLK_DEV_CRYPTOLOOP is not set -+CONFIG_BLK_DEV_NBD=m -+CONFIG_BLK_DEV_RAM=m -+CONFIG_BLK_DEV_RAM_COUNT=16 -+CONFIG_BLK_DEV_RAM_SIZE=4096 -+CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024 -+# CONFIG_CDROM_PKTCDVD is not set -+# CONFIG_ATA_OVER_ETH is not set -+CONFIG_MISC_DEVICES=y -+# CONFIG_EEPROM_93CX6 is not set -+CONFIG_ATMEL_SSC=m -+# CONFIG_IDE is not set -+ -+# -+# SCSI device support -+# -+# CONFIG_RAID_ATTRS is not set -+CONFIG_SCSI=m -+CONFIG_SCSI_DMA=y -+# CONFIG_SCSI_TGT is not set -+# CONFIG_SCSI_NETLINK is not set -+# CONFIG_SCSI_PROC_FS is not set -+ -+# -+# SCSI support type (disk, tape, CD-ROM) -+# -+CONFIG_BLK_DEV_SD=m -+# CONFIG_CHR_DEV_ST is not set -+# CONFIG_CHR_DEV_OSST is not set -+CONFIG_BLK_DEV_SR=m -+# CONFIG_BLK_DEV_SR_VENDOR is not set -+# CONFIG_CHR_DEV_SG is not set -+# CONFIG_CHR_DEV_SCH is not set -+ -+# -+# Some SCSI devices (e.g. CD jukebox) support multiple LUNs -+# -+# CONFIG_SCSI_MULTI_LUN is not set -+# CONFIG_SCSI_CONSTANTS is not set -+# CONFIG_SCSI_LOGGING is not set -+# CONFIG_SCSI_SCAN_ASYNC is not set -+CONFIG_SCSI_WAIT_SCAN=m -+ -+# -+# SCSI Transports -+# -+# CONFIG_SCSI_SPI_ATTRS is not set -+# CONFIG_SCSI_FC_ATTRS is not set -+# CONFIG_SCSI_ISCSI_ATTRS is not set -+# CONFIG_SCSI_SAS_LIBSAS is not set -+# CONFIG_SCSI_SRP_ATTRS is not set -+CONFIG_SCSI_LOWLEVEL=y -+# CONFIG_ISCSI_TCP is not set -+# CONFIG_SCSI_DEBUG is not set -+CONFIG_ATA=m -+# CONFIG_ATA_NONSTANDARD is not set -+CONFIG_PATA_AT32=m -+# CONFIG_PATA_PLATFORM is not set -+# CONFIG_MD is not set -+CONFIG_NETDEVICES=y -+# CONFIG_NETDEVICES_MULTIQUEUE is not set -+# CONFIG_DUMMY is not set -+# CONFIG_BONDING is not set -+# CONFIG_MACVLAN is not set -+# CONFIG_EQUALIZER is not set -+# CONFIG_TUN is not set -+# CONFIG_VETH is not set -+# CONFIG_NET_ETHERNET is not set -+# CONFIG_NETDEV_1000 is not set -+# CONFIG_NETDEV_10000 is not set -+ -+# -+# Wireless LAN -+# -+# CONFIG_WLAN_PRE80211 is not set -+# CONFIG_WLAN_80211 is not set -+# CONFIG_WAN is not set -+CONFIG_PPP=m -+# CONFIG_PPP_MULTILINK is not set -+# CONFIG_PPP_FILTER is not set -+CONFIG_PPP_ASYNC=m -+# CONFIG_PPP_SYNC_TTY is not set -+CONFIG_PPP_DEFLATE=m -+CONFIG_PPP_BSDCOMP=m -+# CONFIG_PPP_MPPE is not set -+# CONFIG_PPPOE is not set -+# CONFIG_PPPOL2TP is not set -+# CONFIG_SLIP is not set -+CONFIG_SLHC=m -+# CONFIG_SHAPER is not set -+# CONFIG_NETCONSOLE is not set -+# CONFIG_NETPOLL is not set -+# CONFIG_NET_POLL_CONTROLLER is not set -+# CONFIG_ISDN is not set -+# CONFIG_PHONE is not set -+ -+# -+# Input device support -+# -+CONFIG_INPUT=m -+# CONFIG_INPUT_FF_MEMLESS is not set -+CONFIG_INPUT_POLLDEV=m -+ -+# -+# Userland interfaces -+# -+CONFIG_INPUT_MOUSEDEV=m -+CONFIG_INPUT_MOUSEDEV_PSAUX=y -+CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 -+CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 -+# CONFIG_INPUT_JOYDEV is not set -+# CONFIG_INPUT_EVDEV is not set -+# CONFIG_INPUT_EVBUG is not set -+ -+# -+# Input Device Drivers -+# -+CONFIG_INPUT_KEYBOARD=y -+# CONFIG_KEYBOARD_ATKBD is not set -+# CONFIG_KEYBOARD_SUNKBD is not set -+# CONFIG_KEYBOARD_LKKBD is not set -+# CONFIG_KEYBOARD_XTKBD is not set -+# CONFIG_KEYBOARD_NEWTON is not set -+# CONFIG_KEYBOARD_STOWAWAY is not set -+CONFIG_KEYBOARD_GPIO=m -+CONFIG_INPUT_MOUSE=y -+# CONFIG_MOUSE_PS2 is not set -+# CONFIG_MOUSE_SERIAL is not set -+# CONFIG_MOUSE_VSXXXAA is not set -+CONFIG_MOUSE_GPIO=m -+# CONFIG_INPUT_JOYSTICK is not set -+# CONFIG_INPUT_TABLET is not set -+# CONFIG_INPUT_TOUCHSCREEN is not set -+# CONFIG_INPUT_MISC is not set -+ -+# -+# Hardware I/O ports -+# -+# CONFIG_SERIO is not set -+# CONFIG_GAMEPORT is not set -+ -+# -+# Character devices -+# -+# CONFIG_VT is not set -+# CONFIG_SERIAL_NONSTANDARD is not set -+ -+# -+# Serial drivers -+# -+# CONFIG_SERIAL_8250 is not set -+ -+# -+# Non-8250 serial port support -+# -+CONFIG_SERIAL_ATMEL=y -+CONFIG_SERIAL_ATMEL_CONSOLE=y -+# CONFIG_SERIAL_ATMEL_TTYAT is not set -+CONFIG_SERIAL_CORE=y -+CONFIG_SERIAL_CORE_CONSOLE=y -+CONFIG_UNIX98_PTYS=y -+# CONFIG_LEGACY_PTYS is not set -+# CONFIG_IPMI_HANDLER is not set -+# CONFIG_HW_RANDOM is not set -+# CONFIG_RTC is not set -+# CONFIG_GEN_RTC is not set -+# CONFIG_R3964 is not set -+# CONFIG_RAW_DRIVER is not set -+# CONFIG_TCG_TPM is not set -+CONFIG_I2C=m -+CONFIG_I2C_BOARDINFO=y -+CONFIG_I2C_CHARDEV=m -+ -+# -+# I2C Algorithms -+# -+CONFIG_I2C_ALGOBIT=m -+# CONFIG_I2C_ALGOPCF is not set -+# CONFIG_I2C_ALGOPCA is not set -+ -+# -+# I2C Hardware Bus support -+# -+CONFIG_I2C_GPIO=m -+# CONFIG_I2C_OCORES is not set -+# CONFIG_I2C_PARPORT_LIGHT is not set -+# CONFIG_I2C_SIMTEC is not set -+# CONFIG_I2C_TAOS_EVM is not set -+# CONFIG_I2C_STUB is not set -+ -+# -+# Miscellaneous I2C Chip support -+# -+# CONFIG_SENSORS_DS1337 is not set -+# CONFIG_SENSORS_DS1374 is not set -+# CONFIG_DS1682 is not set -+# CONFIG_SENSORS_EEPROM is not set -+# CONFIG_SENSORS_PCF8574 is not set -+# CONFIG_SENSORS_PCA9539 is not set -+# CONFIG_SENSORS_PCF8591 is not set -+# CONFIG_SENSORS_MAX6875 is not set -+# CONFIG_SENSORS_TSL2550 is not set -+# CONFIG_I2C_DEBUG_CORE is not set -+# CONFIG_I2C_DEBUG_ALGO is not set -+# CONFIG_I2C_DEBUG_BUS is not set -+# CONFIG_I2C_DEBUG_CHIP is not set -+ -+# -+# SPI support -+# -+CONFIG_SPI=y -+# CONFIG_SPI_DEBUG is not set -+CONFIG_SPI_MASTER=y -+ -+# -+# SPI Master Controller Drivers -+# -+CONFIG_SPI_ATMEL=y -+# CONFIG_SPI_BITBANG is not set -+ -+# -+# SPI Protocol Masters -+# -+# CONFIG_SPI_AT25 is not set -+CONFIG_SPI_SPIDEV=m -+# CONFIG_SPI_TLE62X0 is not set -+# CONFIG_W1 is not set -+# CONFIG_POWER_SUPPLY is not set -+# CONFIG_HWMON is not set -+CONFIG_WATCHDOG=y -+# CONFIG_WATCHDOG_NOWAYOUT is not set -+ -+# -+# Watchdog Device Drivers -+# -+# CONFIG_SOFT_WATCHDOG is not set -+CONFIG_AT32AP700X_WDT=y -+ -+# -+# Sonics Silicon Backplane -+# -+CONFIG_SSB_POSSIBLE=y -+# CONFIG_SSB is not set -+ -+# -+# Multifunction device drivers -+# -+# CONFIG_MFD_SM501 is not set -+ -+# -+# Multimedia devices -+# -+# CONFIG_VIDEO_DEV is not set -+# CONFIG_DVB_CORE is not set -+# CONFIG_DAB is not set -+ -+# -+# Graphics support -+# -+# CONFIG_VGASTATE is not set -+# CONFIG_VIDEO_OUTPUT_CONTROL is not set -+# CONFIG_FB is not set -+# CONFIG_BACKLIGHT_LCD_SUPPORT is not set -+ -+# -+# Display device support -+# -+# CONFIG_DISPLAY_SUPPORT is not set -+ -+# -+# Sound -+# -+CONFIG_SOUND=m -+ -+# -+# Advanced Linux Sound Architecture -+# -+CONFIG_SND=m -+CONFIG_SND_TIMER=m -+CONFIG_SND_PCM=m -+# CONFIG_SND_SEQUENCER is not set -+CONFIG_SND_OSSEMUL=y -+CONFIG_SND_MIXER_OSS=m -+CONFIG_SND_PCM_OSS=m -+CONFIG_SND_PCM_OSS_PLUGINS=y -+# CONFIG_SND_DYNAMIC_MINORS is not set -+CONFIG_SND_SUPPORT_OLD_API=y -+CONFIG_SND_VERBOSE_PROCFS=y -+# CONFIG_SND_VERBOSE_PRINTK is not set -+# CONFIG_SND_DEBUG is not set -+ -+# -+# Generic devices -+# -+# CONFIG_SND_DUMMY is not set -+# CONFIG_SND_MTPAV is not set -+# CONFIG_SND_SERIAL_U16550 is not set -+# CONFIG_SND_MPU401 is not set -+ -+# -+# SPI devices -+# -+CONFIG_SND_AT73C213=m -+CONFIG_SND_AT73C213_TARGET_BITRATE=48000 -+ -+# -+# System on Chip audio support -+# -+# CONFIG_SND_SOC is not set -+ -+# -+# SoC Audio support for SuperH -+# -+ -+# -+# Open Sound System -+# -+# CONFIG_SOUND_PRIME is not set -+# CONFIG_HID_SUPPORT is not set -+CONFIG_USB_SUPPORT=y -+# CONFIG_USB_ARCH_HAS_HCD is not set -+# CONFIG_USB_ARCH_HAS_OHCI is not set -+# CONFIG_USB_ARCH_HAS_EHCI is not set -+ -+# -+# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' -+# -+ -+# -+# USB Gadget Support -+# -+CONFIG_USB_GADGET=y -+# CONFIG_USB_GADGET_DEBUG is not set -+# CONFIG_USB_GADGET_DEBUG_FILES is not set -+CONFIG_USB_GADGET_DEBUG_FS=y -+CONFIG_USB_GADGET_SELECTED=y -+# CONFIG_USB_GADGET_AMD5536UDC is not set -+CONFIG_USB_GADGET_ATMEL_USBA=y -+CONFIG_USB_ATMEL_USBA=y -+# CONFIG_USB_GADGET_FSL_USB2 is not set -+# CONFIG_USB_GADGET_NET2280 is not set -+# CONFIG_USB_GADGET_PXA2XX is not set -+# CONFIG_USB_GADGET_M66592 is not set -+# CONFIG_USB_GADGET_GOKU is not set -+# CONFIG_USB_GADGET_LH7A40X is not set -+# CONFIG_USB_GADGET_OMAP is not set -+# CONFIG_USB_GADGET_S3C2410 is not set -+# CONFIG_USB_GADGET_AT91 is not set -+# CONFIG_USB_GADGET_DUMMY_HCD is not set -+CONFIG_USB_GADGET_DUALSPEED=y -+CONFIG_USB_ZERO=m -+CONFIG_USB_ETH=m -+CONFIG_USB_ETH_RNDIS=y -+CONFIG_USB_GADGETFS=m -+CONFIG_USB_FILE_STORAGE=m -+# CONFIG_USB_FILE_STORAGE_TEST is not set -+CONFIG_USB_G_SERIAL=m -+# CONFIG_USB_MIDI_GADGET is not set -+CONFIG_MMC=m -+# CONFIG_MMC_DEBUG is not set -+# CONFIG_MMC_UNSAFE_RESUME is not set -+ -+# -+# MMC/SD Card Drivers -+# -+CONFIG_MMC_BLOCK=m -+# CONFIG_MMC_BLOCK_BOUNCE is not set -+# CONFIG_SDIO_UART is not set -+ -+# -+# MMC/SD Host Controller Drivers -+# -+CONFIG_MMC_SPI=m -+CONFIG_NEW_LEDS=y -+CONFIG_LEDS_CLASS=y -+ -+# -+# LED drivers -+# -+CONFIG_LEDS_GPIO=y -+ -+# -+# LED Triggers -+# -+CONFIG_LEDS_TRIGGERS=y -+CONFIG_LEDS_TRIGGER_TIMER=y -+CONFIG_LEDS_TRIGGER_HEARTBEAT=y -+CONFIG_RTC_LIB=y -+CONFIG_RTC_CLASS=y -+CONFIG_RTC_HCTOSYS=y -+CONFIG_RTC_HCTOSYS_DEVICE="rtc0" -+# CONFIG_RTC_DEBUG is not set -+ -+# -+# RTC interfaces -+# -+CONFIG_RTC_INTF_SYSFS=y -+CONFIG_RTC_INTF_PROC=y -+CONFIG_RTC_INTF_DEV=y -+# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set -+# CONFIG_RTC_DRV_TEST is not set -+ -+# -+# I2C RTC drivers -+# -+# CONFIG_RTC_DRV_DS1307 is not set -+# CONFIG_RTC_DRV_DS1374 is not set -+# CONFIG_RTC_DRV_DS1672 is not set -+# CONFIG_RTC_DRV_MAX6900 is not set -+# CONFIG_RTC_DRV_RS5C372 is not set -+# CONFIG_RTC_DRV_ISL1208 is not set -+# CONFIG_RTC_DRV_X1205 is not set -+# CONFIG_RTC_DRV_PCF8563 is not set -+# CONFIG_RTC_DRV_PCF8583 is not set -+# CONFIG_RTC_DRV_M41T80 is not set -+ -+# -+# SPI RTC drivers -+# -+# CONFIG_RTC_DRV_RS5C348 is not set -+# CONFIG_RTC_DRV_MAX6902 is not set -+ -+# -+# Platform RTC drivers -+# -+# CONFIG_RTC_DRV_DS1553 is not set -+# CONFIG_RTC_DRV_STK17TA8 is not set -+# CONFIG_RTC_DRV_DS1742 is not set -+# CONFIG_RTC_DRV_M48T86 is not set -+# CONFIG_RTC_DRV_M48T59 is not set -+# CONFIG_RTC_DRV_V3020 is not set -+ -+# -+# on-CPU RTC drivers -+# -+CONFIG_RTC_DRV_AT32AP700X=y -+ -+# -+# Userspace I/O -+# -+CONFIG_UIO=m -+ -+# -+# File systems -+# -+CONFIG_EXT2_FS=m -+# CONFIG_EXT2_FS_XATTR is not set -+# CONFIG_EXT2_FS_XIP is not set -+CONFIG_EXT3_FS=m -+# CONFIG_EXT3_FS_XATTR is not set -+# CONFIG_EXT4DEV_FS is not set -+CONFIG_JBD=m -+# CONFIG_JBD_DEBUG is not set -+# CONFIG_REISERFS_FS is not set -+# CONFIG_JFS_FS is not set -+# CONFIG_FS_POSIX_ACL is not set -+# CONFIG_XFS_FS is not set -+# CONFIG_GFS2_FS is not set -+# CONFIG_OCFS2_FS is not set -+# CONFIG_MINIX_FS is not set -+# CONFIG_ROMFS_FS is not set -+CONFIG_INOTIFY=y -+CONFIG_INOTIFY_USER=y -+# CONFIG_QUOTA is not set -+# CONFIG_DNOTIFY is not set -+# CONFIG_AUTOFS_FS is not set -+# CONFIG_AUTOFS4_FS is not set -+CONFIG_FUSE_FS=m -+ -+# -+# CD-ROM/DVD Filesystems -+# -+# CONFIG_ISO9660_FS is not set -+# CONFIG_UDF_FS is not set -+ -+# -+# DOS/FAT/NT Filesystems -+# -+CONFIG_FAT_FS=m -+CONFIG_MSDOS_FS=m -+CONFIG_VFAT_FS=m -+CONFIG_FAT_DEFAULT_CODEPAGE=437 -+CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" -+# CONFIG_NTFS_FS is not set -+ -+# -+# Pseudo filesystems -+# -+CONFIG_PROC_FS=y -+CONFIG_PROC_KCORE=y -+CONFIG_PROC_SYSCTL=y -+CONFIG_SYSFS=y -+CONFIG_TMPFS=y -+# CONFIG_TMPFS_POSIX_ACL is not set -+# CONFIG_HUGETLB_PAGE is not set -+CONFIG_CONFIGFS_FS=m -+ -+# -+# Miscellaneous filesystems -+# -+# CONFIG_ADFS_FS is not set -+# CONFIG_AFFS_FS is not set -+# CONFIG_HFS_FS is not set -+# CONFIG_HFSPLUS_FS is not set -+# CONFIG_BEFS_FS is not set -+# CONFIG_BFS_FS is not set -+# CONFIG_EFS_FS is not set -+CONFIG_JFFS2_FS=y -+CONFIG_JFFS2_FS_DEBUG=0 -+CONFIG_JFFS2_FS_WRITEBUFFER=y -+# CONFIG_JFFS2_FS_WBUF_VERIFY is not set -+# CONFIG_JFFS2_SUMMARY is not set -+# CONFIG_JFFS2_FS_XATTR is not set -+# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set -+CONFIG_JFFS2_ZLIB=y -+# CONFIG_JFFS2_LZO is not set -+CONFIG_JFFS2_RTIME=y -+# CONFIG_JFFS2_RUBIN is not set -+# CONFIG_CRAMFS is not set -+# CONFIG_VXFS_FS is not set -+# CONFIG_HPFS_FS is not set -+# CONFIG_QNX4FS_FS is not set -+# CONFIG_SYSV_FS is not set -+# CONFIG_UFS_FS is not set -+# CONFIG_NETWORK_FILESYSTEMS is not set -+ -+# -+# Partition Types -+# -+# CONFIG_PARTITION_ADVANCED is not set -+CONFIG_MSDOS_PARTITION=y -+CONFIG_NLS=m -+CONFIG_NLS_DEFAULT="iso8859-1" -+CONFIG_NLS_CODEPAGE_437=m -+# CONFIG_NLS_CODEPAGE_737 is not set -+# CONFIG_NLS_CODEPAGE_775 is not set -+# CONFIG_NLS_CODEPAGE_850 is not set -+# CONFIG_NLS_CODEPAGE_852 is not set -+# CONFIG_NLS_CODEPAGE_855 is not set -+# CONFIG_NLS_CODEPAGE_857 is not set -+# CONFIG_NLS_CODEPAGE_860 is not set -+# CONFIG_NLS_CODEPAGE_861 is not set -+# CONFIG_NLS_CODEPAGE_862 is not set -+# CONFIG_NLS_CODEPAGE_863 is not set -+# CONFIG_NLS_CODEPAGE_864 is not set -+# CONFIG_NLS_CODEPAGE_865 is not set -+# CONFIG_NLS_CODEPAGE_866 is not set -+# CONFIG_NLS_CODEPAGE_869 is not set -+# CONFIG_NLS_CODEPAGE_936 is not set -+# CONFIG_NLS_CODEPAGE_950 is not set -+# CONFIG_NLS_CODEPAGE_932 is not set -+# CONFIG_NLS_CODEPAGE_949 is not set -+# CONFIG_NLS_CODEPAGE_874 is not set -+# CONFIG_NLS_ISO8859_8 is not set -+# CONFIG_NLS_CODEPAGE_1250 is not set -+# CONFIG_NLS_CODEPAGE_1251 is not set -+# CONFIG_NLS_ASCII is not set -+CONFIG_NLS_ISO8859_1=m -+# CONFIG_NLS_ISO8859_2 is not set -+# CONFIG_NLS_ISO8859_3 is not set -+# CONFIG_NLS_ISO8859_4 is not set -+# CONFIG_NLS_ISO8859_5 is not set -+# CONFIG_NLS_ISO8859_6 is not set -+# CONFIG_NLS_ISO8859_7 is not set -+# CONFIG_NLS_ISO8859_9 is not set -+# CONFIG_NLS_ISO8859_13 is not set -+# CONFIG_NLS_ISO8859_14 is not set -+# CONFIG_NLS_ISO8859_15 is not set -+# CONFIG_NLS_KOI8_R is not set -+# CONFIG_NLS_KOI8_U is not set -+CONFIG_NLS_UTF8=m -+# CONFIG_DLM is not set -+CONFIG_INSTRUMENTATION=y -+CONFIG_PROFILING=y -+CONFIG_OPROFILE=m -+CONFIG_KPROBES=y -+# CONFIG_MARKERS is not set -+ -+# -+# Kernel hacking -+# -+# CONFIG_PRINTK_TIME is not set -+CONFIG_ENABLE_WARN_DEPRECATED=y -+CONFIG_ENABLE_MUST_CHECK=y -+CONFIG_MAGIC_SYSRQ=y -+# CONFIG_UNUSED_SYMBOLS is not set -+CONFIG_DEBUG_FS=y -+# CONFIG_HEADERS_CHECK is not set -+CONFIG_DEBUG_KERNEL=y -+# CONFIG_DEBUG_SHIRQ is not set -+CONFIG_DETECT_SOFTLOCKUP=y -+CONFIG_SCHED_DEBUG=y -+# CONFIG_SCHEDSTATS is not set -+# CONFIG_TIMER_STATS is not set -+# CONFIG_DEBUG_RT_MUTEXES is not set -+# CONFIG_RT_MUTEX_TESTER is not set -+# CONFIG_DEBUG_SPINLOCK is not set -+# CONFIG_DEBUG_MUTEXES is not set -+# CONFIG_DEBUG_LOCK_ALLOC is not set -+# CONFIG_PROVE_LOCKING is not set -+# CONFIG_LOCK_STAT is not set -+# CONFIG_DEBUG_SPINLOCK_SLEEP is not set -+# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set -+# CONFIG_DEBUG_KOBJECT is not set -+CONFIG_DEBUG_BUGVERBOSE=y -+# CONFIG_DEBUG_INFO is not set -+# CONFIG_DEBUG_VM is not set -+# CONFIG_DEBUG_LIST is not set -+# CONFIG_DEBUG_SG is not set -+CONFIG_FRAME_POINTER=y -+CONFIG_FORCED_INLINING=y -+# CONFIG_BOOT_PRINTK_DELAY is not set -+# CONFIG_RCU_TORTURE_TEST is not set -+# CONFIG_LKDTM is not set -+# CONFIG_FAULT_INJECTION is not set -+# CONFIG_SAMPLES is not set -+ -+# -+# Security options -+# -+# CONFIG_KEYS is not set -+# CONFIG_SECURITY is not set -+# CONFIG_SECURITY_FILE_CAPABILITIES is not set -+# CONFIG_CRYPTO is not set -+ -+# -+# Library routines -+# -+CONFIG_BITREVERSE=y -+CONFIG_CRC_CCITT=m -+# CONFIG_CRC16 is not set -+CONFIG_CRC_ITU_T=m -+CONFIG_CRC32=y -+CONFIG_CRC7=m -+# CONFIG_LIBCRC32C is not set -+CONFIG_AUDIT_GENERIC=y -+CONFIG_ZLIB_INFLATE=y -+CONFIG_ZLIB_DEFLATE=y -+CONFIG_PLIST=y -+CONFIG_HAS_IOMEM=y -+CONFIG_HAS_IOPORT=y -+CONFIG_HAS_DMA=y -diff -Nrup linux-2.6.24/arch/avr32/configs/atstk1004_defconfig linux-avr32/arch/avr32/configs/atstk1004_defconfig ---- linux-2.6.24/arch/avr32/configs/atstk1004_defconfig 1969-12-31 19:00:00.000000000 -0500 -+++ linux-avr32/arch/avr32/configs/atstk1004_defconfig 2008-02-01 14:51:35.000000000 -0500 -@@ -0,0 +1,621 @@ -+# -+# Automatically generated make config: don't edit -+# Linux kernel version: 2.6.24-rc7 -+# Wed Jan 9 23:04:20 2008 -+# -+CONFIG_AVR32=y -+CONFIG_GENERIC_GPIO=y -+CONFIG_GENERIC_HARDIRQS=y -+CONFIG_STACKTRACE_SUPPORT=y -+CONFIG_LOCKDEP_SUPPORT=y -+CONFIG_TRACE_IRQFLAGS_SUPPORT=y -+CONFIG_HARDIRQS_SW_RESEND=y -+CONFIG_GENERIC_IRQ_PROBE=y -+CONFIG_RWSEM_GENERIC_SPINLOCK=y -+CONFIG_GENERIC_TIME=y -+# CONFIG_RWSEM_XCHGADD_ALGORITHM is not set -+# CONFIG_ARCH_HAS_ILOG2_U32 is not set -+# CONFIG_ARCH_HAS_ILOG2_U64 is not set -+CONFIG_ARCH_SUPPORTS_OPROFILE=y -+CONFIG_GENERIC_HWEIGHT=y -+CONFIG_GENERIC_CALIBRATE_DELAY=y -+CONFIG_GENERIC_BUG=y -+CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" -+ -+# -+# General setup -+# -+CONFIG_EXPERIMENTAL=y -+CONFIG_BROKEN_ON_SMP=y -+CONFIG_INIT_ENV_ARG_LIMIT=32 -+CONFIG_LOCALVERSION="" -+# CONFIG_LOCALVERSION_AUTO is not set -+# CONFIG_SYSVIPC is not set -+# CONFIG_POSIX_MQUEUE is not set -+# CONFIG_BSD_PROCESS_ACCT is not set -+# CONFIG_TASKSTATS is not set -+# CONFIG_USER_NS is not set -+# CONFIG_PID_NS is not set -+# CONFIG_AUDIT is not set -+# CONFIG_IKCONFIG is not set -+CONFIG_LOG_BUF_SHIFT=14 -+# CONFIG_CGROUPS is not set -+# CONFIG_FAIR_GROUP_SCHED is not set -+CONFIG_SYSFS_DEPRECATED=y -+# CONFIG_RELAY is not set -+# CONFIG_BLK_DEV_INITRD is not set -+CONFIG_CC_OPTIMIZE_FOR_SIZE=y -+CONFIG_SYSCTL=y -+CONFIG_EMBEDDED=y -+# CONFIG_SYSCTL_SYSCALL is not set -+CONFIG_KALLSYMS=y -+# CONFIG_KALLSYMS_EXTRA_PASS is not set -+CONFIG_HOTPLUG=y -+CONFIG_PRINTK=y -+CONFIG_BUG=y -+CONFIG_ELF_CORE=y -+# CONFIG_BASE_FULL is not set -+# CONFIG_FUTEX is not set -+# CONFIG_EPOLL is not set -+# CONFIG_SIGNALFD is not set -+# CONFIG_EVENTFD is not set -+CONFIG_SHMEM=y -+CONFIG_VM_EVENT_COUNTERS=y -+# CONFIG_SLAB is not set -+# CONFIG_SLUB is not set -+CONFIG_SLOB=y -+# CONFIG_TINY_SHMEM is not set -+CONFIG_BASE_SMALL=1 -+# CONFIG_MODULES is not set -+# CONFIG_BLOCK is not set -+ -+# -+# System Type and features -+# -+CONFIG_SUBARCH_AVR32B=y -+CONFIG_MMU=y -+CONFIG_PERFORMANCE_COUNTERS=y -+CONFIG_PLATFORM_AT32AP=y -+CONFIG_CPU_AT32AP700X=y -+CONFIG_CPU_AT32AP7002=y -+CONFIG_BOARD_ATSTK1000=y -+# CONFIG_BOARD_ATNGW100 is not set -+# CONFIG_BOARD_ATSTK1002 is not set -+# CONFIG_BOARD_ATSTK1003 is not set -+CONFIG_BOARD_ATSTK1004=y -+# CONFIG_BOARD_ATSTK100X_CUSTOM is not set -+# CONFIG_BOARD_ATSTK100X_SPI1 is not set -+# CONFIG_BOARD_ATSTK1000_J2_LED is not set -+CONFIG_BOARD_ATSTK1000_EXTDAC=y -+CONFIG_LOADER_U_BOOT=y -+ -+# -+# Atmel AVR32 AP options -+# -+# CONFIG_AP700X_32_BIT_SMC is not set -+CONFIG_AP700X_16_BIT_SMC=y -+# CONFIG_AP700X_8_BIT_SMC is not set -+CONFIG_LOAD_ADDRESS=0x10000000 -+CONFIG_ENTRY_ADDRESS=0x90000000 -+CONFIG_PHYS_OFFSET=0x10000000 -+CONFIG_PREEMPT_NONE=y -+# CONFIG_PREEMPT_VOLUNTARY is not set -+# CONFIG_PREEMPT is not set -+# CONFIG_HAVE_ARCH_BOOTMEM_NODE is not set -+# CONFIG_ARCH_HAVE_MEMORY_PRESENT is not set -+# CONFIG_NEED_NODE_MEMMAP_SIZE is not set -+CONFIG_ARCH_FLATMEM_ENABLE=y -+# CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set -+# CONFIG_ARCH_SPARSEMEM_ENABLE is not set -+CONFIG_SELECT_MEMORY_MODEL=y -+CONFIG_FLATMEM_MANUAL=y -+# CONFIG_DISCONTIGMEM_MANUAL is not set -+# CONFIG_SPARSEMEM_MANUAL is not set -+CONFIG_FLATMEM=y -+CONFIG_FLAT_NODE_MEM_MAP=y -+# CONFIG_SPARSEMEM_STATIC is not set -+# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set -+CONFIG_SPLIT_PTLOCK_CPUS=4 -+# CONFIG_RESOURCES_64BIT is not set -+CONFIG_ZONE_DMA_FLAG=0 -+CONFIG_VIRT_TO_BUS=y -+# CONFIG_OWNERSHIP_TRACE is not set -+# CONFIG_HZ_100 is not set -+CONFIG_HZ_250=y -+# CONFIG_HZ_300 is not set -+# CONFIG_HZ_1000 is not set -+CONFIG_HZ=250 -+CONFIG_CMDLINE="" -+ -+# -+# Power management options -+# -+ -+# -+# CPU Frequency scaling -+# -+CONFIG_CPU_FREQ=y -+CONFIG_CPU_FREQ_TABLE=y -+# CONFIG_CPU_FREQ_DEBUG is not set -+# CONFIG_CPU_FREQ_STAT is not set -+CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y -+# CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set -+# CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND is not set -+# CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set -+CONFIG_CPU_FREQ_GOV_PERFORMANCE=y -+# CONFIG_CPU_FREQ_GOV_POWERSAVE is not set -+CONFIG_CPU_FREQ_GOV_USERSPACE=y -+CONFIG_CPU_FREQ_GOV_ONDEMAND=y -+# CONFIG_CPU_FREQ_GOV_CONSERVATIVE is not set -+CONFIG_CPU_FREQ_AT32AP=y -+ -+# -+# Bus options -+# -+# CONFIG_ARCH_SUPPORTS_MSI is not set -+# CONFIG_PCCARD is not set -+ -+# -+# Executable file formats -+# -+CONFIG_BINFMT_ELF=y -+# CONFIG_BINFMT_MISC is not set -+ -+# -+# Networking -+# -+CONFIG_NET=y -+ -+# -+# Networking options -+# -+CONFIG_PACKET=y -+CONFIG_PACKET_MMAP=y -+CONFIG_UNIX=y -+# CONFIG_NET_KEY is not set -+CONFIG_INET=y -+# CONFIG_IP_MULTICAST is not set -+# CONFIG_IP_ADVANCED_ROUTER is not set -+CONFIG_IP_FIB_HASH=y -+# CONFIG_IP_PNP is not set -+# CONFIG_NET_IPIP is not set -+# CONFIG_NET_IPGRE is not set -+# CONFIG_ARPD is not set -+# CONFIG_SYN_COOKIES is not set -+# CONFIG_INET_AH is not set -+# CONFIG_INET_ESP is not set -+# CONFIG_INET_IPCOMP is not set -+# CONFIG_INET_XFRM_TUNNEL is not set -+# CONFIG_INET_TUNNEL is not set -+# CONFIG_INET_XFRM_MODE_TRANSPORT is not set -+# CONFIG_INET_XFRM_MODE_TUNNEL is not set -+# CONFIG_INET_XFRM_MODE_BEET is not set -+# CONFIG_INET_LRO is not set -+# CONFIG_INET_DIAG is not set -+# CONFIG_TCP_CONG_ADVANCED is not set -+CONFIG_TCP_CONG_CUBIC=y -+CONFIG_DEFAULT_TCP_CONG="cubic" -+# CONFIG_TCP_MD5SIG is not set -+# CONFIG_IPV6 is not set -+# CONFIG_INET6_XFRM_TUNNEL is not set -+# CONFIG_INET6_TUNNEL is not set -+# CONFIG_NETWORK_SECMARK is not set -+# CONFIG_NETFILTER is not set -+# CONFIG_IP_DCCP is not set -+# CONFIG_IP_SCTP is not set -+# CONFIG_TIPC is not set -+# CONFIG_ATM is not set -+# CONFIG_BRIDGE is not set -+# CONFIG_VLAN_8021Q is not set -+# CONFIG_DECNET is not set -+# CONFIG_LLC2 is not set -+# CONFIG_IPX is not set -+# CONFIG_ATALK is not set -+# CONFIG_X25 is not set -+# CONFIG_LAPB is not set -+# CONFIG_ECONET is not set -+# CONFIG_WAN_ROUTER is not set -+# CONFIG_NET_SCHED is not set -+ -+# -+# Network testing -+# -+# CONFIG_NET_PKTGEN is not set -+# CONFIG_HAMRADIO is not set -+# CONFIG_IRDA is not set -+# CONFIG_BT is not set -+# CONFIG_AF_RXRPC is not set -+ -+# -+# Wireless -+# -+# CONFIG_CFG80211 is not set -+# CONFIG_WIRELESS_EXT is not set -+# CONFIG_MAC80211 is not set -+# CONFIG_IEEE80211 is not set -+# CONFIG_RFKILL is not set -+# CONFIG_NET_9P is not set -+ -+# -+# Device Drivers -+# -+ -+# -+# Generic Driver Options -+# -+CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" -+CONFIG_STANDALONE=y -+# CONFIG_PREVENT_FIRMWARE_BUILD is not set -+# CONFIG_FW_LOADER is not set -+# CONFIG_SYS_HYPERVISOR is not set -+# CONFIG_CONNECTOR is not set -+CONFIG_MTD=y -+# CONFIG_MTD_DEBUG is not set -+# CONFIG_MTD_CONCAT is not set -+CONFIG_MTD_PARTITIONS=y -+# CONFIG_MTD_REDBOOT_PARTS is not set -+CONFIG_MTD_CMDLINE_PARTS=y -+ -+# -+# User Modules And Translation Layers -+# -+CONFIG_MTD_CHAR=y -+# CONFIG_MTD_OOPS is not set -+ -+# -+# RAM/ROM/Flash chip drivers -+# -+CONFIG_MTD_CFI=y -+# CONFIG_MTD_JEDECPROBE is not set -+CONFIG_MTD_GEN_PROBE=y -+# CONFIG_MTD_CFI_ADV_OPTIONS is not set -+CONFIG_MTD_MAP_BANK_WIDTH_1=y -+CONFIG_MTD_MAP_BANK_WIDTH_2=y -+CONFIG_MTD_MAP_BANK_WIDTH_4=y -+# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set -+# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set -+# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set -+CONFIG_MTD_CFI_I1=y -+CONFIG_MTD_CFI_I2=y -+# CONFIG_MTD_CFI_I4 is not set -+# CONFIG_MTD_CFI_I8 is not set -+# CONFIG_MTD_CFI_INTELEXT is not set -+CONFIG_MTD_CFI_AMDSTD=y -+# CONFIG_MTD_CFI_STAA is not set -+CONFIG_MTD_CFI_UTIL=y -+# CONFIG_MTD_RAM is not set -+# CONFIG_MTD_ROM is not set -+# CONFIG_MTD_ABSENT is not set -+ -+# -+# Mapping drivers for chip access -+# -+# CONFIG_MTD_COMPLEX_MAPPINGS is not set -+CONFIG_MTD_PHYSMAP=y -+CONFIG_MTD_PHYSMAP_START=0x8000000 -+CONFIG_MTD_PHYSMAP_LEN=0x0 -+CONFIG_MTD_PHYSMAP_BANKWIDTH=2 -+# CONFIG_MTD_PLATRAM is not set -+ -+# -+# Self-contained MTD device drivers -+# -+# CONFIG_MTD_DATAFLASH is not set -+# CONFIG_MTD_M25P80 is not set -+# CONFIG_MTD_SLRAM is not set -+# CONFIG_MTD_PHRAM is not set -+# CONFIG_MTD_MTDRAM is not set -+ -+# -+# Disk-On-Chip Device Drivers -+# -+# CONFIG_MTD_DOC2000 is not set -+# CONFIG_MTD_DOC2001 is not set -+# CONFIG_MTD_DOC2001PLUS is not set -+# CONFIG_MTD_NAND is not set -+# CONFIG_MTD_ONENAND is not set -+ -+# -+# UBI - Unsorted block images -+# -+# CONFIG_MTD_UBI is not set -+# CONFIG_PARPORT is not set -+# CONFIG_MISC_DEVICES is not set -+ -+# -+# SCSI device support -+# -+# CONFIG_SCSI_DMA is not set -+# CONFIG_SCSI_NETLINK is not set -+# CONFIG_NETDEVICES is not set -+# CONFIG_ISDN is not set -+# CONFIG_PHONE is not set -+ -+# -+# Input device support -+# -+# CONFIG_INPUT is not set -+ -+# -+# Hardware I/O ports -+# -+# CONFIG_SERIO is not set -+# CONFIG_GAMEPORT is not set -+ -+# -+# Character devices -+# -+# CONFIG_VT is not set -+# CONFIG_SERIAL_NONSTANDARD is not set -+ -+# -+# Serial drivers -+# -+# CONFIG_SERIAL_8250 is not set -+ -+# -+# Non-8250 serial port support -+# -+CONFIG_SERIAL_ATMEL=y -+CONFIG_SERIAL_ATMEL_CONSOLE=y -+# CONFIG_SERIAL_ATMEL_TTYAT is not set -+CONFIG_SERIAL_CORE=y -+CONFIG_SERIAL_CORE_CONSOLE=y -+CONFIG_UNIX98_PTYS=y -+# CONFIG_LEGACY_PTYS is not set -+# CONFIG_IPMI_HANDLER is not set -+# CONFIG_HW_RANDOM is not set -+# CONFIG_RTC is not set -+# CONFIG_GEN_RTC is not set -+# CONFIG_R3964 is not set -+# CONFIG_TCG_TPM is not set -+# CONFIG_I2C is not set -+ -+# -+# SPI support -+# -+CONFIG_SPI=y -+CONFIG_SPI_MASTER=y -+ -+# -+# SPI Master Controller Drivers -+# -+CONFIG_SPI_ATMEL=y -+# CONFIG_SPI_BITBANG is not set -+ -+# -+# SPI Protocol Masters -+# -+# CONFIG_SPI_AT25 is not set -+# CONFIG_SPI_SPIDEV is not set -+# CONFIG_SPI_TLE62X0 is not set -+# CONFIG_W1 is not set -+# CONFIG_POWER_SUPPLY is not set -+# CONFIG_HWMON is not set -+CONFIG_WATCHDOG=y -+# CONFIG_WATCHDOG_NOWAYOUT is not set -+ -+# -+# Watchdog Device Drivers -+# -+# CONFIG_SOFT_WATCHDOG is not set -+CONFIG_AT32AP700X_WDT=y -+ -+# -+# Sonics Silicon Backplane -+# -+CONFIG_SSB_POSSIBLE=y -+# CONFIG_SSB is not set -+ -+# -+# Multifunction device drivers -+# -+# CONFIG_MFD_SM501 is not set -+ -+# -+# Multimedia devices -+# -+# CONFIG_VIDEO_DEV is not set -+# CONFIG_DVB_CORE is not set -+# CONFIG_DAB is not set -+ -+# -+# Graphics support -+# -+# CONFIG_VGASTATE is not set -+# CONFIG_VIDEO_OUTPUT_CONTROL is not set -+CONFIG_FB=y -+# CONFIG_FIRMWARE_EDID is not set -+# CONFIG_FB_DDC is not set -+CONFIG_FB_CFB_FILLRECT=y -+CONFIG_FB_CFB_COPYAREA=y -+CONFIG_FB_CFB_IMAGEBLIT=y -+# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set -+# CONFIG_FB_SYS_FILLRECT is not set -+# CONFIG_FB_SYS_COPYAREA is not set -+# CONFIG_FB_SYS_IMAGEBLIT is not set -+# CONFIG_FB_SYS_FOPS is not set -+CONFIG_FB_DEFERRED_IO=y -+# CONFIG_FB_SVGALIB is not set -+# CONFIG_FB_MACMODES is not set -+# CONFIG_FB_BACKLIGHT is not set -+# CONFIG_FB_MODE_HELPERS is not set -+# CONFIG_FB_TILEBLITTING is not set -+ -+# -+# Frame buffer hardware drivers -+# -+# CONFIG_FB_S1D13XXX is not set -+CONFIG_FB_ATMEL=y -+# CONFIG_FB_VIRTUAL is not set -+CONFIG_BACKLIGHT_LCD_SUPPORT=y -+CONFIG_LCD_CLASS_DEVICE=y -+CONFIG_LCD_LTV350QV=y -+# CONFIG_BACKLIGHT_CLASS_DEVICE is not set -+ -+# -+# Display device support -+# -+# CONFIG_DISPLAY_SUPPORT is not set -+# CONFIG_LOGO is not set -+ -+# -+# Sound -+# -+# CONFIG_SOUND is not set -+CONFIG_USB_SUPPORT=y -+# CONFIG_USB_ARCH_HAS_HCD is not set -+# CONFIG_USB_ARCH_HAS_OHCI is not set -+# CONFIG_USB_ARCH_HAS_EHCI is not set -+ -+# -+# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' -+# -+ -+# -+# USB Gadget Support -+# -+CONFIG_USB_GADGET=y -+# CONFIG_USB_GADGET_DEBUG_FILES is not set -+CONFIG_USB_GADGET_SELECTED=y -+# CONFIG_USB_GADGET_AMD5536UDC is not set -+CONFIG_USB_GADGET_ATMEL_USBA=y -+CONFIG_USB_ATMEL_USBA=y -+# CONFIG_USB_GADGET_FSL_USB2 is not set -+# CONFIG_USB_GADGET_NET2280 is not set -+# CONFIG_USB_GADGET_PXA2XX is not set -+# CONFIG_USB_GADGET_M66592 is not set -+# CONFIG_USB_GADGET_GOKU is not set -+# CONFIG_USB_GADGET_LH7A40X is not set -+# CONFIG_USB_GADGET_OMAP is not set -+# CONFIG_USB_GADGET_S3C2410 is not set -+# CONFIG_USB_GADGET_AT91 is not set -+# CONFIG_USB_GADGET_DUMMY_HCD is not set -+CONFIG_USB_GADGET_DUALSPEED=y -+# CONFIG_USB_ZERO is not set -+CONFIG_USB_ETH=y -+# CONFIG_USB_ETH_RNDIS is not set -+# CONFIG_USB_GADGETFS is not set -+# CONFIG_USB_FILE_STORAGE is not set -+# CONFIG_USB_G_SERIAL is not set -+# CONFIG_USB_MIDI_GADGET is not set -+# CONFIG_MMC is not set -+# CONFIG_NEW_LEDS is not set -+CONFIG_RTC_LIB=y -+CONFIG_RTC_CLASS=y -+CONFIG_RTC_HCTOSYS=y -+CONFIG_RTC_HCTOSYS_DEVICE="rtc0" -+# CONFIG_RTC_DEBUG is not set -+ -+# -+# RTC interfaces -+# -+CONFIG_RTC_INTF_SYSFS=y -+# CONFIG_RTC_INTF_PROC is not set -+CONFIG_RTC_INTF_DEV=y -+# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set -+# CONFIG_RTC_DRV_TEST is not set -+ -+# -+# SPI RTC drivers -+# -+# CONFIG_RTC_DRV_RS5C348 is not set -+# CONFIG_RTC_DRV_MAX6902 is not set -+ -+# -+# Platform RTC drivers -+# -+# CONFIG_RTC_DRV_DS1553 is not set -+# CONFIG_RTC_DRV_STK17TA8 is not set -+# CONFIG_RTC_DRV_DS1742 is not set -+# CONFIG_RTC_DRV_M48T86 is not set -+# CONFIG_RTC_DRV_M48T59 is not set -+# CONFIG_RTC_DRV_V3020 is not set -+ -+# -+# on-CPU RTC drivers -+# -+CONFIG_RTC_DRV_AT32AP700X=y -+ -+# -+# Userspace I/O -+# -+# CONFIG_UIO is not set -+ -+# -+# File systems -+# -+# CONFIG_INOTIFY is not set -+# CONFIG_QUOTA is not set -+# CONFIG_DNOTIFY is not set -+# CONFIG_AUTOFS_FS is not set -+# CONFIG_AUTOFS4_FS is not set -+# CONFIG_FUSE_FS is not set -+ -+# -+# Pseudo filesystems -+# -+CONFIG_PROC_FS=y -+CONFIG_PROC_KCORE=y -+CONFIG_PROC_SYSCTL=y -+CONFIG_SYSFS=y -+CONFIG_TMPFS=y -+# CONFIG_TMPFS_POSIX_ACL is not set -+# CONFIG_HUGETLB_PAGE is not set -+# CONFIG_CONFIGFS_FS is not set -+ -+# -+# Miscellaneous filesystems -+# -+CONFIG_JFFS2_FS=y -+CONFIG_JFFS2_FS_DEBUG=0 -+# CONFIG_JFFS2_FS_WRITEBUFFER is not set -+# CONFIG_JFFS2_SUMMARY is not set -+# CONFIG_JFFS2_FS_XATTR is not set -+# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set -+CONFIG_JFFS2_ZLIB=y -+# CONFIG_JFFS2_LZO is not set -+CONFIG_JFFS2_RTIME=y -+# CONFIG_JFFS2_RUBIN is not set -+# CONFIG_NETWORK_FILESYSTEMS is not set -+# CONFIG_NLS is not set -+# CONFIG_DLM is not set -+# CONFIG_INSTRUMENTATION is not set -+ -+# -+# Kernel hacking -+# -+# CONFIG_PRINTK_TIME is not set -+CONFIG_ENABLE_WARN_DEPRECATED=y -+CONFIG_ENABLE_MUST_CHECK=y -+CONFIG_MAGIC_SYSRQ=y -+# CONFIG_UNUSED_SYMBOLS is not set -+# CONFIG_DEBUG_FS is not set -+# CONFIG_HEADERS_CHECK is not set -+# CONFIG_DEBUG_KERNEL is not set -+# CONFIG_DEBUG_BUGVERBOSE is not set -+# CONFIG_SAMPLES is not set -+ -+# -+# Security options -+# -+# CONFIG_KEYS is not set -+# CONFIG_SECURITY is not set -+# CONFIG_SECURITY_FILE_CAPABILITIES is not set -+# CONFIG_CRYPTO is not set -+ -+# -+# Library routines -+# -+CONFIG_BITREVERSE=y -+# CONFIG_CRC_CCITT is not set -+# CONFIG_CRC16 is not set -+# CONFIG_CRC_ITU_T is not set -+CONFIG_CRC32=y -+# CONFIG_CRC7 is not set -+# CONFIG_LIBCRC32C is not set -+CONFIG_ZLIB_INFLATE=y -+CONFIG_ZLIB_DEFLATE=y -+CONFIG_HAS_IOMEM=y -+CONFIG_HAS_IOPORT=y -+CONFIG_HAS_DMA=y -diff -Nrup linux-2.6.24/arch/avr32/drivers/dw-dmac.c linux-avr32/arch/avr32/drivers/dw-dmac.c ---- linux-2.6.24/arch/avr32/drivers/dw-dmac.c 1969-12-31 19:00:00.000000000 -0500 -+++ linux-avr32/arch/avr32/drivers/dw-dmac.c 2008-02-01 14:51:35.000000000 -0500 -@@ -0,0 +1,761 @@ -+/* -+ * Driver for the Synopsys DesignWare DMA Controller -+ * -+ * Copyright (C) 2005-2006 Atmel Corporation -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 as -+ * published by the Free Software Foundation. -+ */ -+#include <linux/clk.h> -+#include <linux/device.h> -+#include <linux/dma-mapping.h> -+#include <linux/dmapool.h> -+#include <linux/init.h> -+#include <linux/interrupt.h> -+#include <linux/module.h> -+#include <linux/platform_device.h> -+ -+#include <asm/dma-controller.h> -+#include <asm/io.h> -+ -+#include "dw-dmac.h" -+ -+#define DMAC_NR_CHANNELS 3 -+#define DMAC_MAX_BLOCKSIZE 4095 -+ -+enum { -+ CH_STATE_FREE = 0, -+ CH_STATE_ALLOCATED, -+ CH_STATE_BUSY, -+}; -+ -+struct dw_dma_lli { -+ dma_addr_t sar; -+ dma_addr_t dar; -+ dma_addr_t llp; -+ u32 ctllo; -+ u32 ctlhi; -+ u32 sstat; -+ u32 dstat; -+}; -+ -+struct dw_dma_block { -+ struct dw_dma_lli *lli_vaddr; -+ dma_addr_t lli_dma_addr; -+}; -+ -+struct dw_dma_channel { -+ unsigned int state; -+ int is_cyclic; -+ struct dma_request_sg *req_sg; -+ struct dma_request_cyclic *req_cyclic; -+ unsigned int nr_blocks; -+ int direction; -+ struct dw_dma_block *block; -+}; -+ -+struct dw_dma_controller { -+ spinlock_t lock; -+ void * __iomem regs; -+ struct dma_pool *lli_pool; -+ struct clk *hclk; -+ struct dma_controller dma; -+ struct dw_dma_channel channel[DMAC_NR_CHANNELS]; -+}; -+#define to_dw_dmac(dmac) container_of(dmac, struct dw_dma_controller, dma) -+ -+#define dmac_writel_hi(dmac, reg, value) \ -+ __raw_writel((value), (dmac)->regs + DW_DMAC_##reg + 4) -+#define dmac_readl_hi(dmac, reg) \ -+ __raw_readl((dmac)->regs + DW_DMAC_##reg + 4) -+#define dmac_writel_lo(dmac, reg, value) \ -+ __raw_writel((value), (dmac)->regs + DW_DMAC_##reg) -+#define dmac_readl_lo(dmac, reg) \ -+ __raw_readl((dmac)->regs + DW_DMAC_##reg) -+#define dmac_chan_writel_hi(dmac, chan, reg, value) \ -+ __raw_writel((value), ((dmac)->regs + 0x58 * (chan) \ -+ + DW_DMAC_CHAN_##reg + 4)) -+#define dmac_chan_readl_hi(dmac, chan, reg) \ -+ __raw_readl((dmac)->regs + 0x58 * (chan) + DW_DMAC_CHAN_##reg + 4) -+#define dmac_chan_writel_lo(dmac, chan, reg, value) \ -+ __raw_writel((value), (dmac)->regs + 0x58 * (chan) + DW_DMAC_CHAN_##reg) -+#define dmac_chan_readl_lo(dmac, chan, reg) \ -+ __raw_readl((dmac)->regs + 0x58 * (chan) + DW_DMAC_CHAN_##reg) -+#define set_channel_bit(dmac, reg, chan) \ -+ dmac_writel_lo(dmac, reg, (1 << (chan)) | (1 << ((chan) + 8))) -+#define clear_channel_bit(dmac, reg, chan) \ -+ dmac_writel_lo(dmac, reg, (0 << (chan)) | (1 << ((chan) + 8))) -+ -+static int dmac_alloc_channel(struct dma_controller *_dmac) -+{ -+ struct dw_dma_controller *dmac = to_dw_dmac(_dmac); -+ struct dw_dma_channel *chan; -+ unsigned long flags; -+ int i; -+ -+ spin_lock_irqsave(&dmac->lock, flags); -+ for (i = 0; i < DMAC_NR_CHANNELS; i++) -+ if (dmac->channel[i].state == CH_STATE_FREE) -+ break; -+ -+ if (i < DMAC_NR_CHANNELS) { -+ chan = &dmac->channel[i]; -+ chan->state = CH_STATE_ALLOCATED; -+ } else { -+ i = -EBUSY; -+ } -+ -+ spin_unlock_irqrestore(&dmac->lock, flags); -+ -+ return i; -+} -+ -+static void dmac_release_channel(struct dma_controller *_dmac, int channel) -+{ -+ struct dw_dma_controller *dmac = to_dw_dmac(_dmac); -+ -+ BUG_ON(channel >= DMAC_NR_CHANNELS -+ || dmac->channel[channel].state != CH_STATE_ALLOCATED); -+ -+ dmac->channel[channel].state = CH_STATE_FREE; -+} -+ -+static struct dw_dma_block *allocate_blocks(struct dw_dma_controller *dmac, -+ unsigned int nr_blocks) -+{ -+ struct dw_dma_block *block; -+ void *p; -+ unsigned int i; -+ -+ block = kmalloc(nr_blocks * sizeof(*block), -+ GFP_KERNEL); -+ if (unlikely(!block)) -+ return NULL; -+ -+ for (i = 0; i < nr_blocks; i++) { -+ p = dma_pool_alloc(dmac->lli_pool, GFP_KERNEL, -+ &block[i].lli_dma_addr); -+ block[i].lli_vaddr = p; -+ if (unlikely(!p)) -+ goto fail; -+ } -+ -+ return block; -+ -+fail: -+ for (i = 0; i < nr_blocks; i++) { -+ if (!block[i].lli_vaddr) -+ break; -+ dma_pool_free(dmac->lli_pool, block[i].lli_vaddr, -+ block[i].lli_dma_addr); -+ } -+ kfree(block); -+ return NULL; -+} -+ -+static void cleanup_channel(struct dw_dma_controller *dmac, -+ struct dw_dma_channel *chan) -+{ -+ unsigned int i; -+ -+ if (chan->nr_blocks > 1) { -+ for (i = 0; i < chan->nr_blocks; i++) -+ dma_pool_free(dmac->lli_pool, chan->block[i].lli_vaddr, -+ chan->block[i].lli_dma_addr); -+ kfree(chan->block); -+ } -+ -+ chan->state = CH_STATE_ALLOCATED; -+} -+ -+static int dmac_prepare_request_sg(struct dma_controller *_dmac, -+ struct dma_request_sg *req) -+{ -+ struct dw_dma_controller *dmac = to_dw_dmac(_dmac); -+ struct dw_dma_channel *chan; -+ unsigned long ctlhi, ctllo, cfghi, cfglo; -+ unsigned long block_size; -+ unsigned int nr_blocks; -+ int ret, i, direction; -+ unsigned long flags; -+ -+ spin_lock_irqsave(&dmac->lock, flags); -+ -+ ret = -EINVAL; -+ if (req->req.channel >= DMAC_NR_CHANNELS -+ || dmac->channel[req->req.channel].state != CH_STATE_ALLOCATED -+ || req->block_size > DMAC_MAX_BLOCKSIZE) { -+ spin_unlock_irqrestore(&dmac->lock, flags); -+ return -EINVAL; -+ } -+ -+ chan = &dmac->channel[req->req.channel]; -+ chan->state = CH_STATE_BUSY; -+ chan->req_sg = req; -+ chan->is_cyclic = 0; -+ -+ /* -+ * We have marked the channel as busy, so no need to keep the -+ * lock as long as we only touch the channel-specific -+ * registers -+ */ -+ spin_unlock_irqrestore(&dmac->lock, flags); -+ -+ /* -+ * There may be limitations in the driver and/or the DMA -+ * controller that prevents us from sending a whole -+ * scatterlist item in one go. Taking this into account, -+ * calculate the number of block transfers we need to set up. -+ * -+ * FIXME: Let the peripheral driver know about the maximum -+ * block size we support. We really don't want to use a -+ * different block size than what was suggested by the -+ * peripheral. -+ * -+ * Each block will get its own Linked List Item (LLI) below. -+ */ -+ block_size = req->block_size; -+ nr_blocks = req->nr_blocks; -+ pr_debug("block_size %lu, nr_blocks %u nr_sg = %u\n", -+ block_size, nr_blocks, req->nr_sg); -+ -+ BUG_ON(nr_blocks == 0); -+ chan->nr_blocks = nr_blocks; -+ -+ ret = -EINVAL; -+ cfglo = cfghi = 0; -+ switch (req->direction) { -+ case DMA_DIR_MEM_TO_PERIPH: -+ direction = DMA_TO_DEVICE; -+ cfghi = req->periph_id << (43 - 32); -+ break; -+ -+ case DMA_DIR_PERIPH_TO_MEM: -+ direction = DMA_FROM_DEVICE; -+ cfghi = req->periph_id << (39 - 32); -+ break; -+ default: -+ goto out_unclaim_channel; -+ } -+ -+ chan->direction = direction; -+ -+ dmac_chan_writel_hi(dmac, req->req.channel, CFG, cfghi); -+ dmac_chan_writel_lo(dmac, req->req.channel, CFG, cfglo); -+ -+ ctlhi = block_size >> req->width; -+ ctllo = ((req->direction << 20) -+ // | (1 << 14) | (1 << 11) // source/dest burst trans len -+ | (req->width << 4) | (req->width << 1) -+ | (1 << 0)); // interrupt enable -+ -+ if (nr_blocks == 1) { -+ /* Only one block: No need to use block chaining */ -+ if (direction == DMA_TO_DEVICE) { -+ dmac_chan_writel_lo(dmac, req->req.channel, SAR, -+ req->sg->dma_address); -+ dmac_chan_writel_lo(dmac, req->req.channel, DAR, -+ req->data_reg); -+ ctllo |= 2 << 7; // no dst increment -+ } else { -+ dmac_chan_writel_lo(dmac, req->req.channel, SAR, -+ req->data_reg); -+ dmac_chan_writel_lo(dmac, req->req.channel, DAR, -+ req->sg->dma_address); -+ ctllo |= 2 << 9; // no src increment -+ } -+ dmac_chan_writel_lo(dmac, req->req.channel, CTL, ctllo); -+ dmac_chan_writel_hi(dmac, req->req.channel, CTL, ctlhi); -+ pr_debug("ctl hi:lo 0x%lx:%lx\n", ctlhi, ctllo); -+ } else { -+ struct dw_dma_lli *lli, *lli_prev = NULL; -+ int j = 0, offset = 0; -+ -+ ret = -ENOMEM; -+ chan->block = allocate_blocks(dmac, nr_blocks); -+ if (!chan->block) -+ goto out_unclaim_channel; -+ -+ if (direction == DMA_TO_DEVICE) -+ ctllo |= 1 << 28 | 1 << 27 | 2 << 7; -+ else -+ ctllo |= 1 << 28 | 1 << 27 | 2 << 9; -+ -+ /* -+ * Map scatterlist items to blocks. One scatterlist -+ * item may need more than one block for the reasons -+ * mentioned above. -+ */ -+ for (i = 0; i < nr_blocks; i++) { -+ lli = chan->block[i].lli_vaddr; -+ if (lli_prev) { -+ lli_prev->llp = chan->block[i].lli_dma_addr; -+ pr_debug("lli[%d] (0x%p/0x%x): 0x%x 0x%x 0x%x 0x%x 0x%x\n", -+ i - 1, chan->block[i - 1].lli_vaddr, -+ chan->block[i - 1].lli_dma_addr, -+ lli_prev->sar, lli_prev->dar, lli_prev->llp, -+ lli_prev->ctllo, lli_prev->ctlhi); -+ } -+ lli->llp = 0; -+ lli->ctllo = ctllo; -+ lli->ctlhi = ctlhi; -+ if (direction == DMA_TO_DEVICE) { -+ lli->sar = req->sg[j].dma_address + offset; -+ lli->dar = req->data_reg; -+ } else { -+ lli->sar = req->data_reg; -+ lli->dar = req->sg[j].dma_address + offset; -+ } -+ lli_prev = lli; -+ -+ offset += block_size; -+ if (offset > req->sg[j].length) { -+ j++; -+ offset = 0; -+ } -+ } -+ -+ pr_debug("lli[%d] (0x%p/0x%x): 0x%x 0x%x 0x%x 0x%x 0x%x\n", -+ i - 1, chan->block[i - 1].lli_vaddr, -+ chan->block[i - 1].lli_dma_addr, lli_prev->sar, -+ lli_prev->dar, lli_prev->llp, -+ lli_prev->ctllo, lli_prev->ctlhi); -+ -+ /* -+ * SAR, DAR and CTL are initialized from the LLI. We -+ * only have to enable the LLI bits in CTL. -+ */ -+ dmac_chan_writel_hi(dmac, req->req.channel, CTL, 0); -+ dmac_chan_writel_lo(dmac, req->req.channel, LLP, -+ chan->block[0].lli_dma_addr); -+ dmac_chan_writel_lo(dmac, req->req.channel, CTL, 1 << 28 | 1 << 27); -+ } -+ -+ set_channel_bit(dmac, MASK_XFER, req->req.channel); -+ set_channel_bit(dmac, MASK_ERROR, req->req.channel); -+ if (req->req.block_complete) -+ set_channel_bit(dmac, MASK_BLOCK, req->req.channel); -+ else -+ clear_channel_bit(dmac, MASK_BLOCK, req->req.channel); -+ -+ return 0; -+ -+out_unclaim_channel: -+ chan->state = CH_STATE_ALLOCATED; -+ return ret; -+} -+ -+static int dmac_prepare_request_cyclic(struct dma_controller *_dmac, -+ struct dma_request_cyclic *req) -+{ -+ struct dw_dma_controller *dmac = to_dw_dmac(_dmac); -+ struct dw_dma_channel *chan; -+ unsigned long ctlhi, ctllo, cfghi, cfglo; -+ unsigned long block_size; -+ int ret, i, direction; -+ unsigned long flags; -+ -+ spin_lock_irqsave(&dmac->lock, flags); -+ -+ block_size = (req->buffer_size/req->periods) >> req->width; -+ -+ ret = -EINVAL; -+ if (req->req.channel >= DMAC_NR_CHANNELS -+ || dmac->channel[req->req.channel].state != CH_STATE_ALLOCATED -+ || (req->periods == 0) -+ || block_size > DMAC_MAX_BLOCKSIZE) { -+ spin_unlock_irqrestore(&dmac->lock, flags); -+ return -EINVAL; -+ } -+ -+ chan = &dmac->channel[req->req.channel]; -+ chan->state = CH_STATE_BUSY; -+ chan->is_cyclic = 1; -+ chan->req_cyclic = req; -+ -+ /* -+ * We have marked the channel as busy, so no need to keep the -+ * lock as long as we only touch the channel-specific -+ * registers -+ */ -+ spin_unlock_irqrestore(&dmac->lock, flags); -+ -+ /* -+ Setup -+ */ -+ BUG_ON(req->buffer_size % req->periods); -+ /* printk(KERN_INFO "block_size = %lu, periods = %u\n", block_size, req->periods); */ -+ -+ chan->nr_blocks = req->periods; -+ -+ ret = -EINVAL; -+ cfglo = cfghi = 0; -+ switch (req->direction) { -+ case DMA_DIR_MEM_TO_PERIPH: -+ direction = DMA_TO_DEVICE; -+ cfghi = req->periph_id << (43 - 32); -+ break; -+ -+ case DMA_DIR_PERIPH_TO_MEM: -+ direction = DMA_FROM_DEVICE; -+ cfghi = req->periph_id << (39 - 32); -+ break; -+ default: -+ goto out_unclaim_channel; -+ } -+ -+ chan->direction = direction; -+ -+ dmac_chan_writel_hi(dmac, req->req.channel, CFG, cfghi); -+ dmac_chan_writel_lo(dmac, req->req.channel, CFG, cfglo); -+ -+ ctlhi = block_size; -+ ctllo = ((req->direction << 20) -+ | (req->width << 4) | (req->width << 1) -+ | (1 << 0)); // interrupt enable -+ -+ { -+ struct dw_dma_lli *lli = NULL, *lli_prev = NULL; -+ -+ ret = -ENOMEM; -+ chan->block = allocate_blocks(dmac, req->periods); -+ if (!chan->block) -+ goto out_unclaim_channel; -+ -+ if (direction == DMA_TO_DEVICE) -+ ctllo |= 1 << 28 | 1 << 27 | 2 << 7; -+ else -+ ctllo |= 1 << 28 | 1 << 27 | 2 << 9; -+ -+ /* -+ * Set up a linked list items where each period gets -+ * an item. The linked list item for the last period -+ * points back to the star of the buffer making a -+ * cyclic buffer. -+ */ -+ for (i = 0; i < req->periods; i++) { -+ lli = chan->block[i].lli_vaddr; -+ if (lli_prev) { -+ lli_prev->llp = chan->block[i].lli_dma_addr; -+ /* printk(KERN_INFO "lli[%d] (0x%p/0x%x): 0x%x 0x%x 0x%x 0x%x 0x%x\n", -+ i - 1, chan->block[i - 1].lli_vaddr, -+ chan->block[i - 1].lli_dma_addr, -+ lli_prev->sar, lli_prev->dar, lli_prev->llp, -+ lli_prev->ctllo, lli_prev->ctlhi);*/ -+ } -+ lli->llp = 0; -+ lli->ctllo = ctllo; -+ lli->ctlhi = ctlhi; -+ if (direction == DMA_TO_DEVICE) { -+ lli->sar = req->buffer_start + i*(block_size << req->width); -+ lli->dar = req->data_reg; -+ } else { -+ lli->sar = req->data_reg; -+ lli->dar = req->buffer_start + i*(block_size << req->width); -+ } -+ lli_prev = lli; -+ } -+ lli->llp = chan->block[0].lli_dma_addr; -+ -+ /*printk(KERN_INFO "lli[%d] (0x%p/0x%x): 0x%x 0x%x 0x%x 0x%x 0x%x\n", -+ i - 1, chan->block[i - 1].lli_vaddr, -+ chan->block[i - 1].lli_dma_addr, lli_prev->sar, -+ lli_prev->dar, lli_prev->llp, -+ lli_prev->ctllo, lli_prev->ctlhi); */ -+ -+ /* -+ * SAR, DAR and CTL are initialized from the LLI. We -+ * only have to enable the LLI bits in CTL. -+ */ -+ dmac_chan_writel_lo(dmac, req->req.channel, LLP, -+ chan->block[0].lli_dma_addr); -+ dmac_chan_writel_lo(dmac, req->req.channel, CTL, 1 << 28 | 1 << 27); -+ } -+ -+ clear_channel_bit(dmac, MASK_XFER, req->req.channel); -+ set_channel_bit(dmac, MASK_ERROR, req->req.channel); -+ if (req->req.block_complete) -+ set_channel_bit(dmac, MASK_BLOCK, req->req.channel); -+ else -+ clear_channel_bit(dmac, MASK_BLOCK, req->req.channel); -+ -+ return 0; -+ -+out_unclaim_channel: -+ chan->state = CH_STATE_ALLOCATED; -+ return ret; -+} -+ -+static int dmac_start_request(struct dma_controller *_dmac, -+ unsigned int channel) -+{ -+ struct dw_dma_controller *dmac = to_dw_dmac(_dmac); -+ -+ BUG_ON(channel >= DMAC_NR_CHANNELS); -+ -+ set_channel_bit(dmac, CH_EN, channel); -+ -+ return 0; -+} -+ -+static dma_addr_t dmac_get_current_pos(struct dma_controller *_dmac, -+ unsigned int channel) -+{ -+ struct dw_dma_controller *dmac = to_dw_dmac(_dmac); -+ struct dw_dma_channel *chan; -+ dma_addr_t current_pos; -+ -+ BUG_ON(channel >= DMAC_NR_CHANNELS); -+ -+ chan = &dmac->channel[channel]; -+ -+ switch (chan->direction) { -+ case DMA_TO_DEVICE: -+ current_pos = dmac_chan_readl_lo(dmac, channel, SAR); -+ break; -+ case DMA_FROM_DEVICE: -+ current_pos = dmac_chan_readl_lo(dmac, channel, DAR); -+ break; -+ default: -+ return 0; -+ } -+ -+ -+ if (!current_pos) { -+ if (chan->is_cyclic) { -+ current_pos = chan->req_cyclic->buffer_start; -+ } else { -+ current_pos = chan->req_sg->sg->dma_address; -+ } -+ } -+ -+ return current_pos; -+} -+ -+ -+static int dmac_stop_request(struct dma_controller *_dmac, -+ unsigned int channel) -+{ -+ struct dw_dma_controller *dmac = to_dw_dmac(_dmac); -+ struct dw_dma_channel *chan; -+ -+ BUG_ON(channel >= DMAC_NR_CHANNELS); -+ -+ chan = &dmac->channel[channel]; -+ pr_debug("stop: st%u s%08x d%08x l%08x ctl0x%08x:0x%08x\n", -+ chan->state, dmac_chan_readl_lo(dmac, channel, SAR), -+ dmac_chan_readl_lo(dmac, channel, DAR), -+ dmac_chan_readl_lo(dmac, channel, LLP), -+ dmac_chan_readl_hi(dmac, channel, CTL), -+ dmac_chan_readl_lo(dmac, channel, CTL)); -+ -+ if (chan->state == CH_STATE_BUSY) { -+ clear_channel_bit(dmac, CH_EN, channel); -+ cleanup_channel(dmac, &dmac->channel[channel]); -+ } -+ -+ return 0; -+} -+ -+ -+static void dmac_block_complete(struct dw_dma_controller *dmac) -+{ -+ struct dw_dma_channel *chan; -+ unsigned long status, chanid; -+ -+ status = dmac_readl_lo(dmac, STATUS_BLOCK); -+ -+ while (status) { -+ struct dma_request *req; -+ chanid = __ffs(status); -+ chan = &dmac->channel[chanid]; -+ -+ if (chan->is_cyclic) { -+ BUG_ON(!chan->req_cyclic -+ || !chan->req_cyclic->req.block_complete); -+ req = &chan->req_cyclic->req; -+ } else { -+ BUG_ON(!chan->req_sg || !chan->req_sg->req.block_complete); -+ req = &chan->req_sg->req; -+ } -+ dmac_writel_lo(dmac, CLEAR_BLOCK, 1 << chanid); -+ req->block_complete(req); -+ status = dmac_readl_lo(dmac, STATUS_BLOCK); -+ } -+} -+ -+static void dmac_xfer_complete(struct dw_dma_controller *dmac) -+{ -+ struct dw_dma_channel *chan; -+ struct dma_request *req; -+ unsigned long status, chanid; -+ -+ status = dmac_readl_lo(dmac, STATUS_XFER); -+ -+ while (status) { -+ chanid = __ffs(status); -+ chan = &dmac->channel[chanid]; -+ -+ dmac_writel_lo(dmac, CLEAR_XFER, 1 << chanid); -+ -+ req = &chan->req_sg->req; -+ BUG_ON(!req); -+ cleanup_channel(dmac, chan); -+ if (req->xfer_complete) -+ req->xfer_complete(req); -+ -+ status = dmac_readl_lo(dmac, STATUS_XFER); -+ } -+} -+ -+static void dmac_error(struct dw_dma_controller *dmac) -+{ -+ struct dw_dma_channel *chan; -+ unsigned long status, chanid; -+ -+ status = dmac_readl_lo(dmac, STATUS_ERROR); -+ -+ while (status) { -+ struct dma_request *req; -+ -+ chanid = __ffs(status); -+ chan = &dmac->channel[chanid]; -+ -+ dmac_writel_lo(dmac, CLEAR_ERROR, 1 << chanid); -+ clear_channel_bit(dmac, CH_EN, chanid); -+ -+ if (chan->is_cyclic) { -+ BUG_ON(!chan->req_cyclic); -+ req = &chan->req_cyclic->req; -+ } else { -+ BUG_ON(!chan->req_sg); -+ req = &chan->req_sg->req; -+ } -+ -+ cleanup_channel(dmac, chan); -+ if (req->error) -+ req->error(req); -+ -+ status = dmac_readl_lo(dmac, STATUS_XFER); -+ } -+} -+ -+static irqreturn_t dmac_interrupt(int irq, void *dev_id) -+{ -+ struct dw_dma_controller *dmac = dev_id; -+ unsigned long status; -+ int ret = IRQ_NONE; -+ -+ spin_lock(&dmac->lock); -+ -+ status = dmac_readl_lo(dmac, STATUS_INT); -+ -+ while (status) { -+ ret = IRQ_HANDLED; -+ if (status & 0x10) -+ dmac_error(dmac); -+ if (status & 0x02) -+ dmac_block_complete(dmac); -+ if (status & 0x01) -+ dmac_xfer_complete(dmac); -+ -+ status = dmac_readl_lo(dmac, STATUS_INT); -+ } -+ -+ spin_unlock(&dmac->lock); -+ return ret; -+} -+ -+static int __devinit dmac_probe(struct platform_device *pdev) -+{ -+ struct dw_dma_controller *dmac; -+ struct resource *regs; -+ int ret; -+ -+ regs = platform_get_resource(pdev, IORESOURCE_MEM, 0); -+ if (!regs) -+ return -ENXIO; -+ -+ dmac = kmalloc(sizeof(*dmac), GFP_KERNEL); -+ if (!dmac) -+ return -ENOMEM; -+ memset(dmac, 0, sizeof(*dmac)); -+ -+ dmac->hclk = clk_get(&pdev->dev, "hclk"); -+ if (IS_ERR(dmac->hclk)) { -+ ret = PTR_ERR(dmac->hclk); -+ goto out_free_dmac; -+ } -+ clk_enable(dmac->hclk); -+ -+ ret = -ENOMEM; -+ dmac->lli_pool = dma_pool_create("dmac", &pdev->dev, -+ sizeof(struct dw_dma_lli), 4, 0); -+ if (!dmac->lli_pool) -+ goto out_disable_clk; -+ -+ spin_lock_init(&dmac->lock); -+ dmac->dma.dev = &pdev->dev; -+ dmac->dma.alloc_channel = dmac_alloc_channel; -+ dmac->dma.release_channel = dmac_release_channel; -+ dmac->dma.prepare_request_sg = dmac_prepare_request_sg; -+ dmac->dma.prepare_request_cyclic = dmac_prepare_request_cyclic; -+ dmac->dma.start_request = dmac_start_request; -+ dmac->dma.stop_request = dmac_stop_request; -+ dmac->dma.get_current_pos = dmac_get_current_pos; -+ -+ dmac->regs = ioremap(regs->start, regs->end - regs->start + 1); -+ if (!dmac->regs) -+ goto out_free_pool; -+ -+ ret = request_irq(platform_get_irq(pdev, 0), dmac_interrupt, -+ IRQF_SAMPLE_RANDOM, pdev->name, dmac); -+ if (ret) -+ goto out_unmap_regs; -+ -+ /* Enable the DMA controller */ -+ dmac_writel_lo(dmac, CFG, 1); -+ -+ register_dma_controller(&dmac->dma); -+ -+ printk(KERN_INFO -+ "dmac%d: DesignWare DMA controller at 0x%p irq %d\n", -+ dmac->dma.id, dmac->regs, platform_get_irq(pdev, 0)); -+ -+ return 0; -+ -+out_unmap_regs: -+ iounmap(dmac->regs); -+out_free_pool: -+ dma_pool_destroy(dmac->lli_pool); -+out_disable_clk: -+ clk_disable(dmac->hclk); -+ clk_put(dmac->hclk); -+out_free_dmac: -+ kfree(dmac); -+ return ret; -+} -+ -+static struct platform_driver dmac_driver = { -+ .probe = dmac_probe, -+ .driver = { -+ .name = "dmaca", -+ }, -+}; -+ -+static int __init dmac_init(void) -+{ -+ return platform_driver_register(&dmac_driver); -+} -+subsys_initcall(dmac_init); -+ -+static void __exit dmac_exit(void) -+{ -+ platform_driver_unregister(&dmac_driver); -+} -+module_exit(dmac_exit); -+ -+MODULE_DESCRIPTION("Synopsys DesignWare DMA Controller driver"); -+MODULE_AUTHOR("Haavard Skinnemoen <hskinnemoen@atmel.com>"); -+MODULE_LICENSE("GPL"); -diff -Nrup linux-2.6.24/arch/avr32/drivers/dw-dmac.h linux-avr32/arch/avr32/drivers/dw-dmac.h ---- linux-2.6.24/arch/avr32/drivers/dw-dmac.h 1969-12-31 19:00:00.000000000 -0500 -+++ linux-avr32/arch/avr32/drivers/dw-dmac.h 2008-02-01 14:51:35.000000000 -0500 -@@ -0,0 +1,42 @@ -+/* -+ * Driver for the Synopsys DesignWare DMA Controller -+ * -+ * Copyright (C) 2005-2006 Atmel Corporation -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 as -+ * published by the Free Software Foundation. -+ */ -+#ifndef __AVR32_DW_DMAC_H__ -+#define __AVR32_DW_DMAC_H__ -+ -+#define DW_DMAC_CFG 0x398 -+#define DW_DMAC_CH_EN 0x3a0 -+ -+#define DW_DMAC_STATUS_XFER 0x2e8 -+#define DW_DMAC_STATUS_BLOCK 0x2f0 -+#define DW_DMAC_STATUS_ERROR 0x308 -+ -+#define DW_DMAC_MASK_XFER 0x310 -+#define DW_DMAC_MASK_BLOCK 0x318 -+#define DW_DMAC_MASK_ERROR 0x330 -+ -+#define DW_DMAC_CLEAR_XFER 0x338 -+#define DW_DMAC_CLEAR_BLOCK 0x340 -+#define DW_DMAC_CLEAR_ERROR 0x358 -+ -+#define DW_DMAC_STATUS_INT 0x360 -+ -+#define DW_DMAC_CHAN_SAR 0x000 -+#define DW_DMAC_CHAN_DAR 0x008 -+#define DW_DMAC_CHAN_LLP 0x010 -+#define DW_DMAC_CHAN_CTL 0x018 -+#define DW_DMAC_CHAN_SSTAT 0x020 -+#define DW_DMAC_CHAN_DSTAT 0x028 -+#define DW_DMAC_CHAN_SSTATAR 0x030 -+#define DW_DMAC_CHAN_DSTATAR 0x038 -+#define DW_DMAC_CHAN_CFG 0x040 -+#define DW_DMAC_CHAN_SGR 0x048 -+#define DW_DMAC_CHAN_DSR 0x050 -+ -+#endif /* __AVR32_DW_DMAC_H__ */ -diff -Nrup linux-2.6.24/arch/avr32/drivers/Makefile linux-avr32/arch/avr32/drivers/Makefile ---- linux-2.6.24/arch/avr32/drivers/Makefile 1969-12-31 19:00:00.000000000 -0500 -+++ linux-avr32/arch/avr32/drivers/Makefile 2008-02-01 14:51:35.000000000 -0500 -@@ -0,0 +1 @@ -+obj-$(CONFIG_DW_DMAC) += dw-dmac.o -diff -Nrup linux-2.6.24/arch/avr32/Kconfig linux-avr32/arch/avr32/Kconfig ---- linux-2.6.24/arch/avr32/Kconfig 2008-01-24 17:58:37.000000000 -0500 -+++ linux-avr32/arch/avr32/Kconfig 2008-02-01 14:51:35.000000000 -0500 -@@ -54,6 +54,9 @@ config ARCH_HAS_ILOG2_U32 - config ARCH_HAS_ILOG2_U64 - def_bool n - -+config ARCH_SUPPORTS_OPROFILE -+ def_bool y -+ - config GENERIC_HWEIGHT - def_bool y - -@@ -81,19 +84,23 @@ config PLATFORM_AT32AP - select MMU - select PERFORMANCE_COUNTERS - --choice -- prompt "AVR32 CPU type" -- default CPU_AT32AP7000 -+# -+# CPU types -+# - --config CPU_AT32AP7000 -- bool "AT32AP7000" -+# AP7000 derivatives -+config CPU_AT32AP700X -+ bool - select PLATFORM_AT32AP --endchoice -- --# --# CPU Daughterboards for ATSTK1000 --config BOARD_ATSTK1002 -+config CPU_AT32AP7000 -+ bool -+ select CPU_AT32AP700X -+config CPU_AT32AP7001 - bool -+ select CPU_AT32AP700X -+config CPU_AT32AP7002 -+ bool -+ select CPU_AT32AP700X - - choice - prompt "AVR32 board type" -@@ -101,15 +108,18 @@ choice - - config BOARD_ATSTK1000 - bool "ATSTK1000 evaluation board" -- select BOARD_ATSTK1002 if CPU_AT32AP7000 - - config BOARD_ATNGW100 - bool "ATNGW100 Network Gateway" -+ select CPU_AT32AP7000 - endchoice - - if BOARD_ATSTK1000 - source "arch/avr32/boards/atstk1000/Kconfig" - endif -+if BOARD_ATNGW100 -+source "arch/avr32/boards/atngw100/Kconfig" -+endif - - choice - prompt "Boot loader type" -@@ -123,15 +133,15 @@ source "arch/avr32/mach-at32ap/Kconfig" - - config LOAD_ADDRESS - hex -- default 0x10000000 if LOADER_U_BOOT=y && CPU_AT32AP7000=y -+ default 0x10000000 if LOADER_U_BOOT=y && CPU_AT32AP700X=y - - config ENTRY_ADDRESS - hex -- default 0x90000000 if LOADER_U_BOOT=y && CPU_AT32AP7000=y -+ default 0x90000000 if LOADER_U_BOOT=y && CPU_AT32AP700X=y - - config PHYS_OFFSET - hex -- default 0x10000000 if CPU_AT32AP7000=y -+ default 0x10000000 if CPU_AT32AP700X=y - - source "kernel/Kconfig.preempt" - -@@ -163,6 +173,20 @@ config OWNERSHIP_TRACE - enabling Nexus-compliant debuggers to keep track of the PID of the - currently executing task. - -+config NMI_DEBUGGING -+ bool "NMI Debugging" -+ default n -+ help -+ Say Y here and pass the nmi_debug command-line parameter to -+ the kernel to turn on NMI debugging. Depending on the value -+ of the nmi_debug option, various pieces of information will -+ be dumped to the console when a Non-Maskable Interrupt -+ happens. -+ -+config DW_DMAC -+ tristate "Synopsys DesignWare DMA Controller support" -+ default y if CPU_AT32AP7000 -+ - # FPU emulation goes here - - source "kernel/Kconfig.hz" -@@ -219,6 +243,8 @@ source "drivers/Kconfig" - - source "fs/Kconfig" - -+source "kernel/Kconfig.instrumentation" -+ - source "arch/avr32/Kconfig.debug" - - source "security/Kconfig" -diff -Nrup linux-2.6.24/arch/avr32/Kconfig.debug linux-avr32/arch/avr32/Kconfig.debug ---- linux-2.6.24/arch/avr32/Kconfig.debug 2008-01-24 17:58:37.000000000 -0500 -+++ linux-avr32/arch/avr32/Kconfig.debug 2008-02-01 14:51:35.000000000 -0500 -@@ -6,14 +6,4 @@ config TRACE_IRQFLAGS_SUPPORT - - source "lib/Kconfig.debug" - --config KPROBES -- bool "Kprobes" -- depends on DEBUG_KERNEL -- help -- Kprobes allows you to trap at almost any kernel address and -- execute a callback function. register_kprobe() establishes -- a probepoint and specifies the callback. Kprobes is useful -- for kernel debugging, non-intrusive instrumentation and testing. -- If in doubt, say "N". -- - endmenu -diff -Nrup linux-2.6.24/arch/avr32/kernel/cpu.c linux-avr32/arch/avr32/kernel/cpu.c ---- linux-2.6.24/arch/avr32/kernel/cpu.c 2008-01-24 17:58:37.000000000 -0500 -+++ linux-avr32/arch/avr32/kernel/cpu.c 2008-02-01 14:51:35.000000000 -0500 -@@ -13,6 +13,7 @@ - #include <linux/percpu.h> - #include <linux/param.h> - #include <linux/errno.h> -+#include <linux/clk.h> - - #include <asm/setup.h> - #include <asm/sysreg.h> -@@ -187,9 +188,20 @@ static int __init topology_init(void) - - subsys_initcall(topology_init); - -+struct chip_id_map { -+ u16 mid; -+ u16 pn; -+ const char *name; -+}; -+ -+static const struct chip_id_map chip_names[] = { -+ { .mid = 0x1f, .pn = 0x1e82, .name = "AT32AP700x" }, -+}; -+#define NR_CHIP_NAMES ARRAY_SIZE(chip_names) -+ - static const char *cpu_names[] = { - "Morgan", -- "AP7000", -+ "AP7", - }; - #define NR_CPU_NAMES ARRAY_SIZE(cpu_names) - -@@ -206,12 +218,32 @@ static const char *mmu_types[] = { - "MPU" - }; - -+static const char *cpu_feature_flags[] = { -+ "rmw", "dsp", "simd", "ocd", "perfctr", "java", "fpu", -+}; -+ -+static const char *get_chip_name(struct avr32_cpuinfo *cpu) -+{ -+ unsigned int i; -+ unsigned int mid = avr32_get_manufacturer_id(cpu); -+ unsigned int pn = avr32_get_product_number(cpu); -+ -+ for (i = 0; i < NR_CHIP_NAMES; i++) { -+ if (chip_names[i].mid == mid && chip_names[i].pn == pn) -+ return chip_names[i].name; -+ } -+ -+ return "(unknown)"; -+} -+ - void __init setup_processor(void) - { - unsigned long config0, config1; - unsigned long features; - unsigned cpu_id, cpu_rev, arch_id, arch_rev, mmu_type; -+ unsigned device_id; - unsigned tmp; -+ unsigned i; - - config0 = sysreg_read(CONFIG0); - config1 = sysreg_read(CONFIG1); -@@ -221,11 +253,14 @@ void __init setup_processor(void) - arch_rev = SYSREG_BFEXT(AR, config0); - mmu_type = SYSREG_BFEXT(MMUT, config0); - -+ device_id = ocd_read(DID); -+ - boot_cpu_data.arch_type = arch_id; - boot_cpu_data.cpu_type = cpu_id; - boot_cpu_data.arch_revision = arch_rev; - boot_cpu_data.cpu_revision = cpu_rev; - boot_cpu_data.tlb_config = mmu_type; -+ boot_cpu_data.device_id = device_id; - - tmp = SYSREG_BFEXT(ILSZ, config1); - if (tmp) { -@@ -247,41 +282,34 @@ void __init setup_processor(void) - return; - } - -- printk ("CPU: %s [%02x] revision %d (%s revision %d)\n", -+ printk ("CPU: %s chip revision %c\n", get_chip_name(&boot_cpu_data), -+ avr32_get_chip_revision(&boot_cpu_data) + 'A'); -+ printk ("CPU: %s [%02x] core revision %d (%s arch revision %d)\n", - cpu_names[cpu_id], cpu_id, cpu_rev, - arch_names[arch_id], arch_rev); - printk ("CPU: MMU configuration: %s\n", mmu_types[mmu_type]); - - printk ("CPU: features:"); - features = 0; -- if (config0 & SYSREG_BIT(CONFIG0_R)) { -+ if (config0 & SYSREG_BIT(CONFIG0_R)) - features |= AVR32_FEATURE_RMW; -- printk(" rmw"); -- } -- if (config0 & SYSREG_BIT(CONFIG0_D)) { -+ if (config0 & SYSREG_BIT(CONFIG0_D)) - features |= AVR32_FEATURE_DSP; -- printk(" dsp"); -- } -- if (config0 & SYSREG_BIT(CONFIG0_S)) { -+ if (config0 & SYSREG_BIT(CONFIG0_S)) - features |= AVR32_FEATURE_SIMD; -- printk(" simd"); -- } -- if (config0 & SYSREG_BIT(CONFIG0_O)) { -+ if (config0 & SYSREG_BIT(CONFIG0_O)) - features |= AVR32_FEATURE_OCD; -- printk(" ocd"); -- } -- if (config0 & SYSREG_BIT(CONFIG0_P)) { -+ if (config0 & SYSREG_BIT(CONFIG0_P)) - features |= AVR32_FEATURE_PCTR; -- printk(" perfctr"); -- } -- if (config0 & SYSREG_BIT(CONFIG0_J)) { -+ if (config0 & SYSREG_BIT(CONFIG0_J)) - features |= AVR32_FEATURE_JAVA; -- printk(" java"); -- } -- if (config0 & SYSREG_BIT(CONFIG0_F)) { -+ if (config0 & SYSREG_BIT(CONFIG0_F)) - features |= AVR32_FEATURE_FPU; -- printk(" fpu"); -- } -+ -+ for (i = 0; i < ARRAY_SIZE(cpu_feature_flags); i++) -+ if (features & (1 << i)) -+ printk(" %s", cpu_feature_flags[i]); -+ - printk("\n"); - boot_cpu_data.features = features; - } -@@ -291,6 +319,8 @@ static int c_show(struct seq_file *m, vo - { - unsigned int icache_size, dcache_size; - unsigned int cpu = smp_processor_id(); -+ unsigned int freq; -+ unsigned int i; - - icache_size = boot_cpu_data.icache.ways * - boot_cpu_data.icache.sets * -@@ -301,15 +331,21 @@ static int c_show(struct seq_file *m, vo - - seq_printf(m, "processor\t: %d\n", cpu); - -+ seq_printf(m, "chip type\t: %s revision %c\n", -+ get_chip_name(&boot_cpu_data), -+ avr32_get_chip_revision(&boot_cpu_data) + 'A'); - if (boot_cpu_data.arch_type < NR_ARCH_NAMES) -- seq_printf(m, "cpu family\t: %s revision %d\n", -+ seq_printf(m, "cpu arch\t: %s revision %d\n", - arch_names[boot_cpu_data.arch_type], - boot_cpu_data.arch_revision); - if (boot_cpu_data.cpu_type < NR_CPU_NAMES) -- seq_printf(m, "cpu type\t: %s revision %d\n", -+ seq_printf(m, "cpu core\t: %s revision %d\n", - cpu_names[boot_cpu_data.cpu_type], - boot_cpu_data.cpu_revision); - -+ freq = (clk_get_rate(boot_cpu_data.clk) + 500) / 1000; -+ seq_printf(m, "cpu MHz\t\t: %u.%03u\n", freq / 1000, freq % 1000); -+ - seq_printf(m, "i-cache\t\t: %dK (%u ways x %u sets x %u)\n", - icache_size >> 10, - boot_cpu_data.icache.ways, -@@ -320,7 +356,13 @@ static int c_show(struct seq_file *m, vo - boot_cpu_data.dcache.ways, - boot_cpu_data.dcache.sets, - boot_cpu_data.dcache.linesz); -- seq_printf(m, "bogomips\t: %lu.%02lu\n", -+ -+ seq_printf(m, "features\t:"); -+ for (i = 0; i < ARRAY_SIZE(cpu_feature_flags); i++) -+ if (boot_cpu_data.features & (1 << i)) -+ seq_printf(m, " %s", cpu_feature_flags[i]); -+ -+ seq_printf(m, "\nbogomips\t: %lu.%02lu\n", - boot_cpu_data.loops_per_jiffy / (500000/HZ), - (boot_cpu_data.loops_per_jiffy / (5000/HZ)) % 100); - -@@ -343,7 +385,7 @@ static void c_stop(struct seq_file *m, v - - } - --struct seq_operations cpuinfo_op = { -+const struct seq_operations cpuinfo_op = { - .start = c_start, - .next = c_next, - .stop = c_stop, -diff -Nrup linux-2.6.24/arch/avr32/kernel/dma-controller.c linux-avr32/arch/avr32/kernel/dma-controller.c ---- linux-2.6.24/arch/avr32/kernel/dma-controller.c 1969-12-31 19:00:00.000000000 -0500 -+++ linux-avr32/arch/avr32/kernel/dma-controller.c 2008-02-01 14:51:35.000000000 -0500 -@@ -0,0 +1,34 @@ -+/* -+ * Preliminary DMA controller framework for AVR32 -+ * -+ * Copyright (C) 2005-2006 Atmel Corporation -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 as -+ * published by the Free Software Foundation. -+ */ -+#include <asm/dma-controller.h> -+ -+static LIST_HEAD(controllers); -+ -+int register_dma_controller(struct dma_controller *dmac) -+{ -+ static int next_id; -+ -+ dmac->id = next_id++; -+ list_add_tail(&dmac->list, &controllers); -+ -+ return 0; -+} -+EXPORT_SYMBOL(register_dma_controller); -+ -+struct dma_controller *find_dma_controller(int id) -+{ -+ struct dma_controller *dmac; -+ -+ list_for_each_entry(dmac, &controllers, list) -+ if (dmac->id == id) -+ return dmac; -+ return NULL; -+} -+EXPORT_SYMBOL(find_dma_controller); -diff -Nrup linux-2.6.24/arch/avr32/kernel/irq.c linux-avr32/arch/avr32/kernel/irq.c ---- linux-2.6.24/arch/avr32/kernel/irq.c 2008-01-24 17:58:37.000000000 -0500 -+++ linux-avr32/arch/avr32/kernel/irq.c 2008-02-01 14:51:35.000000000 -0500 -@@ -25,6 +25,17 @@ void ack_bad_irq(unsigned int irq) - printk("unexpected IRQ %u\n", irq); - } - -+/* May be overridden by platform code */ -+int __weak nmi_enable(void) -+{ -+ return -ENOSYS; -+} -+ -+void __weak nmi_disable(void) -+{ -+ -+} -+ - #ifdef CONFIG_PROC_FS - int show_interrupts(struct seq_file *p, void *v) - { -diff -Nrup linux-2.6.24/arch/avr32/kernel/kprobes.c linux-avr32/arch/avr32/kernel/kprobes.c ---- linux-2.6.24/arch/avr32/kernel/kprobes.c 2008-01-24 17:58:37.000000000 -0500 -+++ linux-avr32/arch/avr32/kernel/kprobes.c 2008-02-01 14:51:35.000000000 -0500 -@@ -48,6 +48,7 @@ int __kprobes arch_prepare_kprobe(struct - void __kprobes arch_arm_kprobe(struct kprobe *p) - { - pr_debug("arming kprobe at %p\n", p->addr); -+ ocd_enable(NULL); - *p->addr = BREAKPOINT_INSTRUCTION; - flush_icache_range((unsigned long)p->addr, - (unsigned long)p->addr + sizeof(kprobe_opcode_t)); -@@ -56,6 +57,7 @@ void __kprobes arch_arm_kprobe(struct kp - void __kprobes arch_disarm_kprobe(struct kprobe *p) - { - pr_debug("disarming kprobe at %p\n", p->addr); -+ ocd_disable(NULL); - *p->addr = p->opcode; - flush_icache_range((unsigned long)p->addr, - (unsigned long)p->addr + sizeof(kprobe_opcode_t)); -@@ -260,9 +262,6 @@ int __kprobes longjmp_break_handler(stru - - int __init arch_init_kprobes(void) - { -- printk("KPROBES: Enabling monitor mode (MM|DBE)...\n"); -- ocd_write(DC, (1 << OCD_DC_MM_BIT) | (1 << OCD_DC_DBE_BIT)); -- - /* TODO: Register kretprobe trampoline */ - return 0; - } -diff -Nrup linux-2.6.24/arch/avr32/kernel/Makefile linux-avr32/arch/avr32/kernel/Makefile ---- linux-2.6.24/arch/avr32/kernel/Makefile 2008-01-24 17:58:37.000000000 -0500 -+++ linux-avr32/arch/avr32/kernel/Makefile 2008-02-01 14:51:35.000000000 -0500 -@@ -6,9 +6,11 @@ extra-y := head.o vmlinux.lds - - obj-$(CONFIG_SUBARCH_AVR32B) += entry-avr32b.o - obj-y += syscall_table.o syscall-stubs.o irq.o --obj-y += setup.o traps.o semaphore.o ptrace.o -+obj-y += setup.o traps.o semaphore.o ocd.o ptrace.o - obj-y += signal.o sys_avr32.o process.o time.o - obj-y += init_task.o switch_to.o cpu.o -+obj-y += dma-controller.o - obj-$(CONFIG_MODULES) += module.o avr32_ksyms.o - obj-$(CONFIG_KPROBES) += kprobes.o - obj-$(CONFIG_STACKTRACE) += stacktrace.o -+obj-$(CONFIG_NMI_DEBUGGING) += nmi_debug.o -diff -Nrup linux-2.6.24/arch/avr32/kernel/nmi_debug.c linux-avr32/arch/avr32/kernel/nmi_debug.c ---- linux-2.6.24/arch/avr32/kernel/nmi_debug.c 1969-12-31 19:00:00.000000000 -0500 -+++ linux-avr32/arch/avr32/kernel/nmi_debug.c 2008-02-01 14:51:35.000000000 -0500 -@@ -0,0 +1,82 @@ -+/* -+ * Copyright (C) 2007 Atmel Corporation -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 as -+ * published by the Free Software Foundation. -+ */ -+#include <linux/delay.h> -+#include <linux/kdebug.h> -+#include <linux/notifier.h> -+#include <linux/sched.h> -+ -+#include <asm/irq.h> -+ -+enum nmi_action { -+ NMI_SHOW_STATE = 1 << 0, -+ NMI_SHOW_REGS = 1 << 1, -+ NMI_DIE = 1 << 2, -+ NMI_DEBOUNCE = 1 << 3, -+}; -+ -+static unsigned long nmi_actions; -+ -+static int nmi_debug_notify(struct notifier_block *self, -+ unsigned long val, void *data) -+{ -+ struct die_args *args = data; -+ -+ if (likely(val != DIE_NMI)) -+ return NOTIFY_DONE; -+ -+ if (nmi_actions & NMI_SHOW_STATE) -+ show_state(); -+ if (nmi_actions & NMI_SHOW_REGS) -+ show_regs(args->regs); -+ if (nmi_actions & NMI_DEBOUNCE) -+ mdelay(10); -+ if (nmi_actions & NMI_DIE) -+ return NOTIFY_BAD; -+ -+ return NOTIFY_OK; -+} -+ -+static struct notifier_block nmi_debug_nb = { -+ .notifier_call = nmi_debug_notify, -+}; -+ -+static int __init nmi_debug_setup(char *str) -+{ -+ char *p, *sep; -+ -+ register_die_notifier(&nmi_debug_nb); -+ if (nmi_enable()) { -+ printk(KERN_WARNING "Unable to enable NMI.\n"); -+ return 0; -+ } -+ -+ if (*str != '=') -+ return 0; -+ -+ for (p = str + 1; *p; p = sep + 1) { -+ sep = strchr(p, ','); -+ if (sep) -+ *sep = 0; -+ if (strcmp(p, "state") == 0) -+ nmi_actions |= NMI_SHOW_STATE; -+ else if (strcmp(p, "regs") == 0) -+ nmi_actions |= NMI_SHOW_REGS; -+ else if (strcmp(p, "debounce") == 0) -+ nmi_actions |= NMI_DEBOUNCE; -+ else if (strcmp(p, "die") == 0) -+ nmi_actions |= NMI_DIE; -+ else -+ printk(KERN_WARNING "NMI: Unrecognized action `%s'\n", -+ p); -+ if (!sep) -+ break; -+ } -+ -+ return 0; -+} -+__setup("nmi_debug", nmi_debug_setup); -diff -Nrup linux-2.6.24/arch/avr32/kernel/ocd.c linux-avr32/arch/avr32/kernel/ocd.c ---- linux-2.6.24/arch/avr32/kernel/ocd.c 1969-12-31 19:00:00.000000000 -0500 -+++ linux-avr32/arch/avr32/kernel/ocd.c 2008-02-01 14:51:35.000000000 -0500 -@@ -0,0 +1,163 @@ -+/* -+ * Copyright (C) 2007 Atmel Corporation -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 as -+ * published by the Free Software Foundation. -+ */ -+#include <linux/init.h> -+#include <linux/sched.h> -+#include <linux/spinlock.h> -+ -+#include <asm/ocd.h> -+ -+static long ocd_count; -+static spinlock_t ocd_lock; -+ -+/** -+ * ocd_enable - enable on-chip debugging -+ * @child: task to be debugged -+ * -+ * If @child is non-NULL, ocd_enable() first checks if debugging has -+ * already been enabled for @child, and if it has, does nothing. -+ * -+ * If @child is NULL (e.g. when debugging the kernel), or debugging -+ * has not already been enabled for it, ocd_enable() increments the -+ * reference count and enables the debugging hardware. -+ */ -+void ocd_enable(struct task_struct *child) -+{ -+ u32 dc; -+ -+ if (child) -+ pr_debug("ocd_enable: child=%s [%u]\n", -+ child->comm, child->pid); -+ else -+ pr_debug("ocd_enable (no child)\n"); -+ -+ if (!child || !test_and_set_tsk_thread_flag(child, TIF_DEBUG)) { -+ spin_lock(&ocd_lock); -+ ocd_count++; -+ dc = ocd_read(DC); -+ dc |= (1 << OCD_DC_MM_BIT) | (1 << OCD_DC_DBE_BIT); -+ ocd_write(DC, dc); -+ spin_unlock(&ocd_lock); -+ } -+} -+ -+/** -+ * ocd_disable - disable on-chip debugging -+ * @child: task that was being debugged, but isn't anymore -+ * -+ * If @child is non-NULL, ocd_disable() checks if debugging is enabled -+ * for @child, and if it isn't, does nothing. -+ * -+ * If @child is NULL (e.g. when debugging the kernel), or debugging is -+ * enabled, ocd_disable() decrements the reference count, and if it -+ * reaches zero, disables the debugging hardware. -+ */ -+void ocd_disable(struct task_struct *child) -+{ -+ u32 dc; -+ -+ if (!child) -+ pr_debug("ocd_disable (no child)\n"); -+ else if (test_tsk_thread_flag(child, TIF_DEBUG)) -+ pr_debug("ocd_disable: child=%s [%u]\n", -+ child->comm, child->pid); -+ -+ if (!child || test_and_clear_tsk_thread_flag(child, TIF_DEBUG)) { -+ spin_lock(&ocd_lock); -+ ocd_count--; -+ -+ WARN_ON(ocd_count < 0); -+ -+ if (ocd_count <= 0) { -+ dc = ocd_read(DC); -+ dc &= ~((1 << OCD_DC_MM_BIT) | (1 << OCD_DC_DBE_BIT)); -+ ocd_write(DC, dc); -+ } -+ spin_unlock(&ocd_lock); -+ } -+} -+ -+#ifdef CONFIG_DEBUG_FS -+#include <linux/debugfs.h> -+#include <linux/module.h> -+ -+static struct dentry *ocd_debugfs_root; -+static struct dentry *ocd_debugfs_DC; -+static struct dentry *ocd_debugfs_DS; -+static struct dentry *ocd_debugfs_count; -+ -+static u64 ocd_DC_get(void *data) -+{ -+ return ocd_read(DC); -+} -+static void ocd_DC_set(void *data, u64 val) -+{ -+ ocd_write(DC, val); -+} -+DEFINE_SIMPLE_ATTRIBUTE(fops_DC, ocd_DC_get, ocd_DC_set, "0x%08llx\n"); -+ -+static u64 ocd_DS_get(void *data) -+{ -+ return ocd_read(DS); -+} -+DEFINE_SIMPLE_ATTRIBUTE(fops_DS, ocd_DS_get, NULL, "0x%08llx\n"); -+ -+static u64 ocd_count_get(void *data) -+{ -+ return ocd_count; -+} -+DEFINE_SIMPLE_ATTRIBUTE(fops_count, ocd_count_get, NULL, "%lld\n"); -+ -+static void ocd_debugfs_init(void) -+{ -+ struct dentry *root; -+ -+ root = debugfs_create_dir("ocd", NULL); -+ if (IS_ERR(root) || !root) -+ goto err_root; -+ ocd_debugfs_root = root; -+ -+ ocd_debugfs_DC = debugfs_create_file("DC", S_IRUSR | S_IWUSR, -+ root, NULL, &fops_DC); -+ if (!ocd_debugfs_DC) -+ goto err_DC; -+ -+ ocd_debugfs_DS = debugfs_create_file("DS", S_IRUSR, root, -+ NULL, &fops_DS); -+ if (!ocd_debugfs_DS) -+ goto err_DS; -+ -+ ocd_debugfs_count = debugfs_create_file("count", S_IRUSR, root, -+ NULL, &fops_count); -+ if (!ocd_debugfs_count) -+ goto err_count; -+ -+ return; -+ -+err_count: -+ debugfs_remove(ocd_debugfs_DS); -+err_DS: -+ debugfs_remove(ocd_debugfs_DC); -+err_DC: -+ debugfs_remove(ocd_debugfs_root); -+err_root: -+ printk(KERN_WARNING "OCD: Failed to create debugfs entries\n"); -+} -+#else -+static inline void ocd_debugfs_init(void) -+{ -+ -+} -+#endif -+ -+static int __init ocd_init(void) -+{ -+ spin_lock_init(&ocd_lock); -+ ocd_debugfs_init(); -+ return 0; -+} -+arch_initcall(ocd_init); -diff -Nrup linux-2.6.24/arch/avr32/kernel/process.c linux-avr32/arch/avr32/kernel/process.c ---- linux-2.6.24/arch/avr32/kernel/process.c 2008-01-24 17:58:37.000000000 -0500 -+++ linux-avr32/arch/avr32/kernel/process.c 2008-02-01 14:51:35.000000000 -0500 -@@ -103,7 +103,7 @@ EXPORT_SYMBOL(kernel_thread); - */ - void exit_thread(void) - { -- /* nothing to do */ -+ ocd_disable(current); - } - - void flush_thread(void) -@@ -345,6 +345,9 @@ int copy_thread(int nr, unsigned long cl - p->thread.cpu_context.ksp = (unsigned long)childregs; - p->thread.cpu_context.pc = (unsigned long)ret_from_fork; - -+ if ((clone_flags & CLONE_PTRACE) && test_thread_flag(TIF_DEBUG)) -+ ocd_enable(p); -+ - return 0; - } - -diff -Nrup linux-2.6.24/arch/avr32/kernel/ptrace.c linux-avr32/arch/avr32/kernel/ptrace.c ---- linux-2.6.24/arch/avr32/kernel/ptrace.c 2008-01-24 17:58:37.000000000 -0500 -+++ linux-avr32/arch/avr32/kernel/ptrace.c 2008-02-01 14:51:35.000000000 -0500 -@@ -58,6 +58,7 @@ void ptrace_disable(struct task_struct * - { - clear_tsk_thread_flag(child, TIF_SINGLE_STEP); - clear_tsk_thread_flag(child, TIF_BREAKPOINT); -+ ocd_disable(child); - } - - /* -@@ -144,10 +145,6 @@ long arch_ptrace(struct task_struct *chi - { - int ret; - -- pr_debug("ptrace: Enabling monitor mode...\n"); -- ocd_write(DC, ocd_read(DC) | (1 << OCD_DC_MM_BIT) -- | (1 << OCD_DC_DBE_BIT)); -- - switch (request) { - /* Read the word at location addr in the child process */ - case PTRACE_PEEKTEXT: -diff -Nrup linux-2.6.24/arch/avr32/kernel/setup.c linux-avr32/arch/avr32/kernel/setup.c ---- linux-2.6.24/arch/avr32/kernel/setup.c 2008-01-24 17:58:37.000000000 -0500 -+++ linux-avr32/arch/avr32/kernel/setup.c 2008-02-01 14:51:35.000000000 -0500 -@@ -273,6 +273,8 @@ static int __init early_parse_fbmem(char - printk(KERN_WARNING - "Failed to allocate framebuffer memory\n"); - fbmem_size = 0; -+ } else { -+ memset(__va(fbmem_start), 0, fbmem_size); - } - } - -diff -Nrup linux-2.6.24/arch/avr32/kernel/signal.c linux-avr32/arch/avr32/kernel/signal.c ---- linux-2.6.24/arch/avr32/kernel/signal.c 2008-01-24 17:58:37.000000000 -0500 -+++ linux-avr32/arch/avr32/kernel/signal.c 2008-02-01 14:51:35.000000000 -0500 -@@ -270,19 +270,12 @@ int do_signal(struct pt_regs *regs, sigs - if (!user_mode(regs)) - return 0; - -- if (try_to_freeze()) { -- signr = 0; -- if (!signal_pending(current)) -- goto no_signal; -- } -- - if (test_thread_flag(TIF_RESTORE_SIGMASK)) - oldset = ¤t->saved_sigmask; - else if (!oldset) - oldset = ¤t->blocked; - - signr = get_signal_to_deliver(&info, &ka, regs, NULL); --no_signal: - if (syscall) { - switch (regs->r12) { - case -ERESTART_RESTARTBLOCK: -diff -Nrup linux-2.6.24/arch/avr32/kernel/traps.c linux-avr32/arch/avr32/kernel/traps.c ---- linux-2.6.24/arch/avr32/kernel/traps.c 2008-01-24 17:58:37.000000000 -0500 -+++ linux-avr32/arch/avr32/kernel/traps.c 2008-02-01 14:51:35.000000000 -0500 -@@ -9,6 +9,7 @@ - #include <linux/bug.h> - #include <linux/init.h> - #include <linux/kallsyms.h> -+#include <linux/kdebug.h> - #include <linux/module.h> - #include <linux/notifier.h> - #include <linux/sched.h> -@@ -107,9 +108,23 @@ void _exception(long signr, struct pt_re - - asmlinkage void do_nmi(unsigned long ecr, struct pt_regs *regs) - { -- printk(KERN_ALERT "Got Non-Maskable Interrupt, dumping regs\n"); -- show_regs_log_lvl(regs, KERN_ALERT); -- show_stack_log_lvl(current, regs->sp, regs, KERN_ALERT); -+ int ret; -+ -+ nmi_enter(); -+ -+ ret = notify_die(DIE_NMI, "NMI", regs, 0, ecr, SIGINT); -+ switch (ret) { -+ case NOTIFY_OK: -+ case NOTIFY_STOP: -+ return; -+ case NOTIFY_BAD: -+ die("Fatal Non-Maskable Interrupt", regs, SIGINT); -+ default: -+ break; -+ } -+ -+ printk(KERN_ALERT "Got NMI, but nobody cared. Disabling...\n"); -+ nmi_disable(); - } - - asmlinkage void do_critical_exception(unsigned long ecr, struct pt_regs *regs) -diff -Nrup linux-2.6.24/arch/avr32/mach-at32ap/at32ap7000.c linux-avr32/arch/avr32/mach-at32ap/at32ap7000.c ---- linux-2.6.24/arch/avr32/mach-at32ap/at32ap7000.c 2008-01-24 17:58:37.000000000 -0500 -+++ linux-avr32/arch/avr32/mach-at32ap/at32ap7000.c 1969-12-31 19:00:00.000000000 -0500 -@@ -1,1730 +0,0 @@ --/* -- * Copyright (C) 2005-2006 Atmel Corporation -- * -- * This program is free software; you can redistribute it and/or modify -- * it under the terms of the GNU General Public License version 2 as -- * published by the Free Software Foundation. -- */ --#include <linux/clk.h> --#include <linux/fb.h> --#include <linux/init.h> --#include <linux/platform_device.h> --#include <linux/dma-mapping.h> --#include <linux/spi/spi.h> -- --#include <asm/io.h> -- --#include <asm/arch/at32ap7000.h> --#include <asm/arch/board.h> --#include <asm/arch/portmux.h> -- --#include <video/atmel_lcdc.h> -- --#include "clock.h" --#include "hmatrix.h" --#include "pio.h" --#include "pm.h" -- -- --#define PBMEM(base) \ -- { \ -- .start = base, \ -- .end = base + 0x3ff, \ -- .flags = IORESOURCE_MEM, \ -- } --#define IRQ(num) \ -- { \ -- .start = num, \ -- .end = num, \ -- .flags = IORESOURCE_IRQ, \ -- } --#define NAMED_IRQ(num, _name) \ -- { \ -- .start = num, \ -- .end = num, \ -- .name = _name, \ -- .flags = IORESOURCE_IRQ, \ -- } -- --/* REVISIT these assume *every* device supports DMA, but several -- * don't ... tc, smc, pio, rtc, watchdog, pwm, ps2, and more. -- */ --#define DEFINE_DEV(_name, _id) \ --static u64 _name##_id##_dma_mask = DMA_32BIT_MASK; \ --static struct platform_device _name##_id##_device = { \ -- .name = #_name, \ -- .id = _id, \ -- .dev = { \ -- .dma_mask = &_name##_id##_dma_mask, \ -- .coherent_dma_mask = DMA_32BIT_MASK, \ -- }, \ -- .resource = _name##_id##_resource, \ -- .num_resources = ARRAY_SIZE(_name##_id##_resource), \ --} --#define DEFINE_DEV_DATA(_name, _id) \ --static u64 _name##_id##_dma_mask = DMA_32BIT_MASK; \ --static struct platform_device _name##_id##_device = { \ -- .name = #_name, \ -- .id = _id, \ -- .dev = { \ -- .dma_mask = &_name##_id##_dma_mask, \ -- .platform_data = &_name##_id##_data, \ -- .coherent_dma_mask = DMA_32BIT_MASK, \ -- }, \ -- .resource = _name##_id##_resource, \ -- .num_resources = ARRAY_SIZE(_name##_id##_resource), \ --} -- --#define select_peripheral(pin, periph, flags) \ -- at32_select_periph(GPIO_PIN_##pin, GPIO_##periph, flags) -- --#define DEV_CLK(_name, devname, bus, _index) \ --static struct clk devname##_##_name = { \ -- .name = #_name, \ -- .dev = &devname##_device.dev, \ -- .parent = &bus##_clk, \ -- .mode = bus##_clk_mode, \ -- .get_rate = bus##_clk_get_rate, \ -- .index = _index, \ --} -- --static DEFINE_SPINLOCK(pm_lock); -- --unsigned long at32ap7000_osc_rates[3] = { -- [0] = 32768, -- /* FIXME: these are ATSTK1002-specific */ -- [1] = 20000000, -- [2] = 12000000, --}; -- --static unsigned long osc_get_rate(struct clk *clk) --{ -- return at32ap7000_osc_rates[clk->index]; --} -- --static unsigned long pll_get_rate(struct clk *clk, unsigned long control) --{ -- unsigned long div, mul, rate; -- -- if (!(control & PM_BIT(PLLEN))) -- return 0; -- -- div = PM_BFEXT(PLLDIV, control) + 1; -- mul = PM_BFEXT(PLLMUL, control) + 1; -- -- rate = clk->parent->get_rate(clk->parent); -- rate = (rate + div / 2) / div; -- rate *= mul; -- -- return rate; --} -- --static unsigned long pll0_get_rate(struct clk *clk) --{ -- u32 control; -- -- control = pm_readl(PLL0); -- -- return pll_get_rate(clk, control); --} -- --static unsigned long pll1_get_rate(struct clk *clk) --{ -- u32 control; -- -- control = pm_readl(PLL1); -- -- return pll_get_rate(clk, control); --} -- --/* -- * The AT32AP7000 has five primary clock sources: One 32kHz -- * oscillator, two crystal oscillators and two PLLs. -- */ --static struct clk osc32k = { -- .name = "osc32k", -- .get_rate = osc_get_rate, -- .users = 1, -- .index = 0, --}; --static struct clk osc0 = { -- .name = "osc0", -- .get_rate = osc_get_rate, -- .users = 1, -- .index = 1, --}; --static struct clk osc1 = { -- .name = "osc1", -- .get_rate = osc_get_rate, -- .index = 2, --}; --static struct clk pll0 = { -- .name = "pll0", -- .get_rate = pll0_get_rate, -- .parent = &osc0, --}; --static struct clk pll1 = { -- .name = "pll1", -- .get_rate = pll1_get_rate, -- .parent = &osc0, --}; -- --/* -- * The main clock can be either osc0 or pll0. The boot loader may -- * have chosen one for us, so we don't really know which one until we -- * have a look at the SM. -- */ --static struct clk *main_clock; -- --/* -- * Synchronous clocks are generated from the main clock. The clocks -- * must satisfy the constraint -- * fCPU >= fHSB >= fPB -- * i.e. each clock must not be faster than its parent. -- */ --static unsigned long bus_clk_get_rate(struct clk *clk, unsigned int shift) --{ -- return main_clock->get_rate(main_clock) >> shift; --}; -- --static void cpu_clk_mode(struct clk *clk, int enabled) --{ -- unsigned long flags; -- u32 mask; -- -- spin_lock_irqsave(&pm_lock, flags); -- mask = pm_readl(CPU_MASK); -- if (enabled) -- mask |= 1 << clk->index; -- else -- mask &= ~(1 << clk->index); -- pm_writel(CPU_MASK, mask); -- spin_unlock_irqrestore(&pm_lock, flags); --} -- --static unsigned long cpu_clk_get_rate(struct clk *clk) --{ -- unsigned long cksel, shift = 0; -- -- cksel = pm_readl(CKSEL); -- if (cksel & PM_BIT(CPUDIV)) -- shift = PM_BFEXT(CPUSEL, cksel) + 1; -- -- return bus_clk_get_rate(clk, shift); --} -- --static long cpu_clk_set_rate(struct clk *clk, unsigned long rate, int apply) --{ -- u32 control; -- unsigned long parent_rate, child_div, actual_rate, div; -- -- parent_rate = clk->parent->get_rate(clk->parent); -- control = pm_readl(CKSEL); -- -- if (control & PM_BIT(HSBDIV)) -- child_div = 1 << (PM_BFEXT(HSBSEL, control) + 1); -- else -- child_div = 1; -- -- if (rate > 3 * (parent_rate / 4) || child_div == 1) { -- actual_rate = parent_rate; -- control &= ~PM_BIT(CPUDIV); -- } else { -- unsigned int cpusel; -- div = (parent_rate + rate / 2) / rate; -- if (div > child_div) -- div = child_div; -- cpusel = (div > 1) ? (fls(div) - 2) : 0; -- control = PM_BIT(CPUDIV) | PM_BFINS(CPUSEL, cpusel, control); -- actual_rate = parent_rate / (1 << (cpusel + 1)); -- } -- -- pr_debug("clk %s: new rate %lu (actual rate %lu)\n", -- clk->name, rate, actual_rate); -- -- if (apply) -- pm_writel(CKSEL, control); -- -- return actual_rate; --} -- --static void hsb_clk_mode(struct clk *clk, int enabled) --{ -- unsigned long flags; -- u32 mask; -- -- spin_lock_irqsave(&pm_lock, flags); -- mask = pm_readl(HSB_MASK); -- if (enabled) -- mask |= 1 << clk->index; -- else -- mask &= ~(1 << clk->index); -- pm_writel(HSB_MASK, mask); -- spin_unlock_irqrestore(&pm_lock, flags); --} -- --static unsigned long hsb_clk_get_rate(struct clk *clk) --{ -- unsigned long cksel, shift = 0; -- -- cksel = pm_readl(CKSEL); -- if (cksel & PM_BIT(HSBDIV)) -- shift = PM_BFEXT(HSBSEL, cksel) + 1; -- -- return bus_clk_get_rate(clk, shift); --} -- --static void pba_clk_mode(struct clk *clk, int enabled) --{ -- unsigned long flags; -- u32 mask; -- -- spin_lock_irqsave(&pm_lock, flags); -- mask = pm_readl(PBA_MASK); -- if (enabled) -- mask |= 1 << clk->index; -- else -- mask &= ~(1 << clk->index); -- pm_writel(PBA_MASK, mask); -- spin_unlock_irqrestore(&pm_lock, flags); --} -- --static unsigned long pba_clk_get_rate(struct clk *clk) --{ -- unsigned long cksel, shift = 0; -- -- cksel = pm_readl(CKSEL); -- if (cksel & PM_BIT(PBADIV)) -- shift = PM_BFEXT(PBASEL, cksel) + 1; -- -- return bus_clk_get_rate(clk, shift); --} -- --static void pbb_clk_mode(struct clk *clk, int enabled) --{ -- unsigned long flags; -- u32 mask; -- -- spin_lock_irqsave(&pm_lock, flags); -- mask = pm_readl(PBB_MASK); -- if (enabled) -- mask |= 1 << clk->index; -- else -- mask &= ~(1 << clk->index); -- pm_writel(PBB_MASK, mask); -- spin_unlock_irqrestore(&pm_lock, flags); --} -- --static unsigned long pbb_clk_get_rate(struct clk *clk) --{ -- unsigned long cksel, shift = 0; -- -- cksel = pm_readl(CKSEL); -- if (cksel & PM_BIT(PBBDIV)) -- shift = PM_BFEXT(PBBSEL, cksel) + 1; -- -- return bus_clk_get_rate(clk, shift); --} -- --static struct clk cpu_clk = { -- .name = "cpu", -- .get_rate = cpu_clk_get_rate, -- .set_rate = cpu_clk_set_rate, -- .users = 1, --}; --static struct clk hsb_clk = { -- .name = "hsb", -- .parent = &cpu_clk, -- .get_rate = hsb_clk_get_rate, --}; --static struct clk pba_clk = { -- .name = "pba", -- .parent = &hsb_clk, -- .mode = hsb_clk_mode, -- .get_rate = pba_clk_get_rate, -- .index = 1, --}; --static struct clk pbb_clk = { -- .name = "pbb", -- .parent = &hsb_clk, -- .mode = hsb_clk_mode, -- .get_rate = pbb_clk_get_rate, -- .users = 1, -- .index = 2, --}; -- --/* -------------------------------------------------------------------- -- * Generic Clock operations -- * -------------------------------------------------------------------- */ -- --static void genclk_mode(struct clk *clk, int enabled) --{ -- u32 control; -- -- control = pm_readl(GCCTRL(clk->index)); -- if (enabled) -- control |= PM_BIT(CEN); -- else -- control &= ~PM_BIT(CEN); -- pm_writel(GCCTRL(clk->index), control); --} -- --static unsigned long genclk_get_rate(struct clk *clk) --{ -- u32 control; -- unsigned long div = 1; -- -- control = pm_readl(GCCTRL(clk->index)); -- if (control & PM_BIT(DIVEN)) -- div = 2 * (PM_BFEXT(DIV, control) + 1); -- -- return clk->parent->get_rate(clk->parent) / div; --} -- --static long genclk_set_rate(struct clk *clk, unsigned long rate, int apply) --{ -- u32 control; -- unsigned long parent_rate, actual_rate, div; -- -- parent_rate = clk->parent->get_rate(clk->parent); -- control = pm_readl(GCCTRL(clk->index)); -- -- if (rate > 3 * parent_rate / 4) { -- actual_rate = parent_rate; -- control &= ~PM_BIT(DIVEN); -- } else { -- div = (parent_rate + rate) / (2 * rate) - 1; -- control = PM_BFINS(DIV, div, control) | PM_BIT(DIVEN); -- actual_rate = parent_rate / (2 * (div + 1)); -- } -- -- dev_dbg(clk->dev, "clk %s: new rate %lu (actual rate %lu)\n", -- clk->name, rate, actual_rate); -- -- if (apply) -- pm_writel(GCCTRL(clk->index), control); -- -- return actual_rate; --} -- --int genclk_set_parent(struct clk *clk, struct clk *parent) --{ -- u32 control; -- -- dev_dbg(clk->dev, "clk %s: new parent %s (was %s)\n", -- clk->name, parent->name, clk->parent->name); -- -- control = pm_readl(GCCTRL(clk->index)); -- -- if (parent == &osc1 || parent == &pll1) -- control |= PM_BIT(OSCSEL); -- else if (parent == &osc0 || parent == &pll0) -- control &= ~PM_BIT(OSCSEL); -- else -- return -EINVAL; -- -- if (parent == &pll0 || parent == &pll1) -- control |= PM_BIT(PLLSEL); -- else -- control &= ~PM_BIT(PLLSEL); -- -- pm_writel(GCCTRL(clk->index), control); -- clk->parent = parent; -- -- return 0; --} -- --static void __init genclk_init_parent(struct clk *clk) --{ -- u32 control; -- struct clk *parent; -- -- BUG_ON(clk->index > 7); -- -- control = pm_readl(GCCTRL(clk->index)); -- if (control & PM_BIT(OSCSEL)) -- parent = (control & PM_BIT(PLLSEL)) ? &pll1 : &osc1; -- else -- parent = (control & PM_BIT(PLLSEL)) ? &pll0 : &osc0; -- -- clk->parent = parent; --} -- --/* -------------------------------------------------------------------- -- * System peripherals -- * -------------------------------------------------------------------- */ --static struct resource at32_pm0_resource[] = { -- { -- .start = 0xfff00000, -- .end = 0xfff0007f, -- .flags = IORESOURCE_MEM, -- }, -- IRQ(20), --}; -- --static struct resource at32ap700x_rtc0_resource[] = { -- { -- .start = 0xfff00080, -- .end = 0xfff000af, -- .flags = IORESOURCE_MEM, -- }, -- IRQ(21), --}; -- --static struct resource at32_wdt0_resource[] = { -- { -- .start = 0xfff000b0, -- .end = 0xfff000cf, -- .flags = IORESOURCE_MEM, -- }, --}; -- --static struct resource at32_eic0_resource[] = { -- { -- .start = 0xfff00100, -- .end = 0xfff0013f, -- .flags = IORESOURCE_MEM, -- }, -- IRQ(19), --}; -- --DEFINE_DEV(at32_pm, 0); --DEFINE_DEV(at32ap700x_rtc, 0); --DEFINE_DEV(at32_wdt, 0); --DEFINE_DEV(at32_eic, 0); -- --/* -- * Peripheral clock for PM, RTC, WDT and EIC. PM will ensure that this -- * is always running. -- */ --static struct clk at32_pm_pclk = { -- .name = "pclk", -- .dev = &at32_pm0_device.dev, -- .parent = &pbb_clk, -- .mode = pbb_clk_mode, -- .get_rate = pbb_clk_get_rate, -- .users = 1, -- .index = 0, --}; -- --static struct resource intc0_resource[] = { -- PBMEM(0xfff00400), --}; --struct platform_device at32_intc0_device = { -- .name = "intc", -- .id = 0, -- .resource = intc0_resource, -- .num_resources = ARRAY_SIZE(intc0_resource), --}; --DEV_CLK(pclk, at32_intc0, pbb, 1); -- --static struct clk ebi_clk = { -- .name = "ebi", -- .parent = &hsb_clk, -- .mode = hsb_clk_mode, -- .get_rate = hsb_clk_get_rate, -- .users = 1, --}; --static struct clk hramc_clk = { -- .name = "hramc", -- .parent = &hsb_clk, -- .mode = hsb_clk_mode, -- .get_rate = hsb_clk_get_rate, -- .users = 1, -- .index = 3, --}; -- --static struct resource smc0_resource[] = { -- PBMEM(0xfff03400), --}; --DEFINE_DEV(smc, 0); --DEV_CLK(pclk, smc0, pbb, 13); --DEV_CLK(mck, smc0, hsb, 0); -- --static struct platform_device pdc_device = { -- .name = "pdc", -- .id = 0, --}; --DEV_CLK(hclk, pdc, hsb, 4); --DEV_CLK(pclk, pdc, pba, 16); -- --static struct clk pico_clk = { -- .name = "pico", -- .parent = &cpu_clk, -- .mode = cpu_clk_mode, -- .get_rate = cpu_clk_get_rate, -- .users = 1, --}; -- --static struct resource dmaca0_resource[] = { -- { -- .start = 0xff200000, -- .end = 0xff20ffff, -- .flags = IORESOURCE_MEM, -- }, -- IRQ(2), --}; --DEFINE_DEV(dmaca, 0); --DEV_CLK(hclk, dmaca0, hsb, 10); -- --/* -------------------------------------------------------------------- -- * HMATRIX -- * -------------------------------------------------------------------- */ -- --static struct clk hmatrix_clk = { -- .name = "hmatrix_clk", -- .parent = &pbb_clk, -- .mode = pbb_clk_mode, -- .get_rate = pbb_clk_get_rate, -- .index = 2, -- .users = 1, --}; --#define HMATRIX_BASE ((void __iomem *)0xfff00800) -- --#define hmatrix_readl(reg) \ -- __raw_readl((HMATRIX_BASE) + HMATRIX_##reg) --#define hmatrix_writel(reg,value) \ -- __raw_writel((value), (HMATRIX_BASE) + HMATRIX_##reg) -- --/* -- * Set bits in the HMATRIX Special Function Register (SFR) used by the -- * External Bus Interface (EBI). This can be used to enable special -- * features like CompactFlash support, NAND Flash support, etc. on -- * certain chipselects. -- */ --static inline void set_ebi_sfr_bits(u32 mask) --{ -- u32 sfr; -- -- clk_enable(&hmatrix_clk); -- sfr = hmatrix_readl(SFR4); -- sfr |= mask; -- hmatrix_writel(SFR4, sfr); -- clk_disable(&hmatrix_clk); --} -- --/* -------------------------------------------------------------------- -- * System Timer/Counter (TC) -- * -------------------------------------------------------------------- */ --static struct resource at32_systc0_resource[] = { -- PBMEM(0xfff00c00), -- IRQ(22), --}; --struct platform_device at32_systc0_device = { -- .name = "systc", -- .id = 0, -- .resource = at32_systc0_resource, -- .num_resources = ARRAY_SIZE(at32_systc0_resource), --}; --DEV_CLK(pclk, at32_systc0, pbb, 3); -- --/* -------------------------------------------------------------------- -- * PIO -- * -------------------------------------------------------------------- */ -- --static struct resource pio0_resource[] = { -- PBMEM(0xffe02800), -- IRQ(13), --}; --DEFINE_DEV(pio, 0); --DEV_CLK(mck, pio0, pba, 10); -- --static struct resource pio1_resource[] = { -- PBMEM(0xffe02c00), -- IRQ(14), --}; --DEFINE_DEV(pio, 1); --DEV_CLK(mck, pio1, pba, 11); -- --static struct resource pio2_resource[] = { -- PBMEM(0xffe03000), -- IRQ(15), --}; --DEFINE_DEV(pio, 2); --DEV_CLK(mck, pio2, pba, 12); -- --static struct resource pio3_resource[] = { -- PBMEM(0xffe03400), -- IRQ(16), --}; --DEFINE_DEV(pio, 3); --DEV_CLK(mck, pio3, pba, 13); -- --static struct resource pio4_resource[] = { -- PBMEM(0xffe03800), -- IRQ(17), --}; --DEFINE_DEV(pio, 4); --DEV_CLK(mck, pio4, pba, 14); -- --void __init at32_add_system_devices(void) --{ -- platform_device_register(&at32_pm0_device); -- platform_device_register(&at32_intc0_device); -- platform_device_register(&at32ap700x_rtc0_device); -- platform_device_register(&at32_wdt0_device); -- platform_device_register(&at32_eic0_device); -- platform_device_register(&smc0_device); -- platform_device_register(&pdc_device); -- platform_device_register(&dmaca0_device); -- -- platform_device_register(&at32_systc0_device); -- -- platform_device_register(&pio0_device); -- platform_device_register(&pio1_device); -- platform_device_register(&pio2_device); -- platform_device_register(&pio3_device); -- platform_device_register(&pio4_device); --} -- --/* -------------------------------------------------------------------- -- * USART -- * -------------------------------------------------------------------- */ -- --static struct atmel_uart_data atmel_usart0_data = { -- .use_dma_tx = 1, -- .use_dma_rx = 1, --}; --static struct resource atmel_usart0_resource[] = { -- PBMEM(0xffe00c00), -- IRQ(6), --}; --DEFINE_DEV_DATA(atmel_usart, 0); --DEV_CLK(usart, atmel_usart0, pba, 3); -- --static struct atmel_uart_data atmel_usart1_data = { -- .use_dma_tx = 1, -- .use_dma_rx = 1, --}; --static struct resource atmel_usart1_resource[] = { -- PBMEM(0xffe01000), -- IRQ(7), --}; --DEFINE_DEV_DATA(atmel_usart, 1); --DEV_CLK(usart, atmel_usart1, pba, 4); -- --static struct atmel_uart_data atmel_usart2_data = { -- .use_dma_tx = 1, -- .use_dma_rx = 1, --}; --static struct resource atmel_usart2_resource[] = { -- PBMEM(0xffe01400), -- IRQ(8), --}; --DEFINE_DEV_DATA(atmel_usart, 2); --DEV_CLK(usart, atmel_usart2, pba, 5); -- --static struct atmel_uart_data atmel_usart3_data = { -- .use_dma_tx = 1, -- .use_dma_rx = 1, --}; --static struct resource atmel_usart3_resource[] = { -- PBMEM(0xffe01800), -- IRQ(9), --}; --DEFINE_DEV_DATA(atmel_usart, 3); --DEV_CLK(usart, atmel_usart3, pba, 6); -- --static inline void configure_usart0_pins(void) --{ -- select_peripheral(PA(8), PERIPH_B, 0); /* RXD */ -- select_peripheral(PA(9), PERIPH_B, 0); /* TXD */ --} -- --static inline void configure_usart1_pins(void) --{ -- select_peripheral(PA(17), PERIPH_A, 0); /* RXD */ -- select_peripheral(PA(18), PERIPH_A, 0); /* TXD */ --} -- --static inline void configure_usart2_pins(void) --{ -- select_peripheral(PB(26), PERIPH_B, 0); /* RXD */ -- select_peripheral(PB(27), PERIPH_B, 0); /* TXD */ --} -- --static inline void configure_usart3_pins(void) --{ -- select_peripheral(PB(18), PERIPH_B, 0); /* RXD */ -- select_peripheral(PB(17), PERIPH_B, 0); /* TXD */ --} -- --static struct platform_device *__initdata at32_usarts[4]; -- --void __init at32_map_usart(unsigned int hw_id, unsigned int line) --{ -- struct platform_device *pdev; -- -- switch (hw_id) { -- case 0: -- pdev = &atmel_usart0_device; -- configure_usart0_pins(); -- break; -- case 1: -- pdev = &atmel_usart1_device; -- configure_usart1_pins(); -- break; -- case 2: -- pdev = &atmel_usart2_device; -- configure_usart2_pins(); -- break; -- case 3: -- pdev = &atmel_usart3_device; -- configure_usart3_pins(); -- break; -- default: -- return; -- } -- -- if (PXSEG(pdev->resource[0].start) == P4SEG) { -- /* Addresses in the P4 segment are permanently mapped 1:1 */ -- struct atmel_uart_data *data = pdev->dev.platform_data; -- data->regs = (void __iomem *)pdev->resource[0].start; -- } -- -- pdev->id = line; -- at32_usarts[line] = pdev; --} -- --struct platform_device *__init at32_add_device_usart(unsigned int id) --{ -- platform_device_register(at32_usarts[id]); -- return at32_usarts[id]; --} -- --struct platform_device *atmel_default_console_device; -- --void __init at32_setup_serial_console(unsigned int usart_id) --{ -- atmel_default_console_device = at32_usarts[usart_id]; --} -- --/* -------------------------------------------------------------------- -- * Ethernet -- * -------------------------------------------------------------------- */ -- --static struct eth_platform_data macb0_data; --static struct resource macb0_resource[] = { -- PBMEM(0xfff01800), -- IRQ(25), --}; --DEFINE_DEV_DATA(macb, 0); --DEV_CLK(hclk, macb0, hsb, 8); --DEV_CLK(pclk, macb0, pbb, 6); -- --static struct eth_platform_data macb1_data; --static struct resource macb1_resource[] = { -- PBMEM(0xfff01c00), -- IRQ(26), --}; --DEFINE_DEV_DATA(macb, 1); --DEV_CLK(hclk, macb1, hsb, 9); --DEV_CLK(pclk, macb1, pbb, 7); -- --struct platform_device *__init --at32_add_device_eth(unsigned int id, struct eth_platform_data *data) --{ -- struct platform_device *pdev; -- -- switch (id) { -- case 0: -- pdev = &macb0_device; -- -- select_peripheral(PC(3), PERIPH_A, 0); /* TXD0 */ -- select_peripheral(PC(4), PERIPH_A, 0); /* TXD1 */ -- select_peripheral(PC(7), PERIPH_A, 0); /* TXEN */ -- select_peripheral(PC(8), PERIPH_A, 0); /* TXCK */ -- select_peripheral(PC(9), PERIPH_A, 0); /* RXD0 */ -- select_peripheral(PC(10), PERIPH_A, 0); /* RXD1 */ -- select_peripheral(PC(13), PERIPH_A, 0); /* RXER */ -- select_peripheral(PC(15), PERIPH_A, 0); /* RXDV */ -- select_peripheral(PC(16), PERIPH_A, 0); /* MDC */ -- select_peripheral(PC(17), PERIPH_A, 0); /* MDIO */ -- -- if (!data->is_rmii) { -- select_peripheral(PC(0), PERIPH_A, 0); /* COL */ -- select_peripheral(PC(1), PERIPH_A, 0); /* CRS */ -- select_peripheral(PC(2), PERIPH_A, 0); /* TXER */ -- select_peripheral(PC(5), PERIPH_A, 0); /* TXD2 */ -- select_peripheral(PC(6), PERIPH_A, 0); /* TXD3 */ -- select_peripheral(PC(11), PERIPH_A, 0); /* RXD2 */ -- select_peripheral(PC(12), PERIPH_A, 0); /* RXD3 */ -- select_peripheral(PC(14), PERIPH_A, 0); /* RXCK */ -- select_peripheral(PC(18), PERIPH_A, 0); /* SPD */ -- } -- break; -- -- case 1: -- pdev = &macb1_device; -- -- select_peripheral(PD(13), PERIPH_B, 0); /* TXD0 */ -- select_peripheral(PD(14), PERIPH_B, 0); /* TXD1 */ -- select_peripheral(PD(11), PERIPH_B, 0); /* TXEN */ -- select_peripheral(PD(12), PERIPH_B, 0); /* TXCK */ -- select_peripheral(PD(10), PERIPH_B, 0); /* RXD0 */ -- select_peripheral(PD(6), PERIPH_B, 0); /* RXD1 */ -- select_peripheral(PD(5), PERIPH_B, 0); /* RXER */ -- select_peripheral(PD(4), PERIPH_B, 0); /* RXDV */ -- select_peripheral(PD(3), PERIPH_B, 0); /* MDC */ -- select_peripheral(PD(2), PERIPH_B, 0); /* MDIO */ -- -- if (!data->is_rmii) { -- select_peripheral(PC(19), PERIPH_B, 0); /* COL */ -- select_peripheral(PC(23), PERIPH_B, 0); /* CRS */ -- select_peripheral(PC(26), PERIPH_B, 0); /* TXER */ -- select_peripheral(PC(27), PERIPH_B, 0); /* TXD2 */ -- select_peripheral(PC(28), PERIPH_B, 0); /* TXD3 */ -- select_peripheral(PC(29), PERIPH_B, 0); /* RXD2 */ -- select_peripheral(PC(30), PERIPH_B, 0); /* RXD3 */ -- select_peripheral(PC(24), PERIPH_B, 0); /* RXCK */ -- select_peripheral(PD(15), PERIPH_B, 0); /* SPD */ -- } -- break; -- -- default: -- return NULL; -- } -- -- memcpy(pdev->dev.platform_data, data, sizeof(struct eth_platform_data)); -- platform_device_register(pdev); -- -- return pdev; --} -- --/* -------------------------------------------------------------------- -- * SPI -- * -------------------------------------------------------------------- */ --static struct resource atmel_spi0_resource[] = { -- PBMEM(0xffe00000), -- IRQ(3), --}; --DEFINE_DEV(atmel_spi, 0); --DEV_CLK(spi_clk, atmel_spi0, pba, 0); -- --static struct resource atmel_spi1_resource[] = { -- PBMEM(0xffe00400), -- IRQ(4), --}; --DEFINE_DEV(atmel_spi, 1); --DEV_CLK(spi_clk, atmel_spi1, pba, 1); -- --static void __init --at32_spi_setup_slaves(unsigned int bus_num, struct spi_board_info *b, -- unsigned int n, const u8 *pins) --{ -- unsigned int pin, mode; -- -- for (; n; n--, b++) { -- b->bus_num = bus_num; -- if (b->chip_select >= 4) -- continue; -- pin = (unsigned)b->controller_data; -- if (!pin) { -- pin = pins[b->chip_select]; -- b->controller_data = (void *)pin; -- } -- mode = AT32_GPIOF_OUTPUT; -- if (!(b->mode & SPI_CS_HIGH)) -- mode |= AT32_GPIOF_HIGH; -- at32_select_gpio(pin, mode); -- } --} -- --struct platform_device *__init --at32_add_device_spi(unsigned int id, struct spi_board_info *b, unsigned int n) --{ -- /* -- * Manage the chipselects as GPIOs, normally using the same pins -- * the SPI controller expects; but boards can use other pins. -- */ -- static u8 __initdata spi0_pins[] = -- { GPIO_PIN_PA(3), GPIO_PIN_PA(4), -- GPIO_PIN_PA(5), GPIO_PIN_PA(20), }; -- static u8 __initdata spi1_pins[] = -- { GPIO_PIN_PB(2), GPIO_PIN_PB(3), -- GPIO_PIN_PB(4), GPIO_PIN_PA(27), }; -- struct platform_device *pdev; -- -- switch (id) { -- case 0: -- pdev = &atmel_spi0_device; -- select_peripheral(PA(0), PERIPH_A, 0); /* MISO */ -- select_peripheral(PA(1), PERIPH_A, 0); /* MOSI */ -- select_peripheral(PA(2), PERIPH_A, 0); /* SCK */ -- at32_spi_setup_slaves(0, b, n, spi0_pins); -- break; -- -- case 1: -- pdev = &atmel_spi1_device; -- select_peripheral(PB(0), PERIPH_B, 0); /* MISO */ -- select_peripheral(PB(1), PERIPH_B, 0); /* MOSI */ -- select_peripheral(PB(5), PERIPH_B, 0); /* SCK */ -- at32_spi_setup_slaves(1, b, n, spi1_pins); -- break; -- -- default: -- return NULL; -- } -- -- spi_register_board_info(b, n); -- platform_device_register(pdev); -- return pdev; --} -- --/* -------------------------------------------------------------------- -- * TWI -- * -------------------------------------------------------------------- */ --static struct resource atmel_twi0_resource[] __initdata = { -- PBMEM(0xffe00800), -- IRQ(5), --}; --static struct clk atmel_twi0_pclk = { -- .name = "twi_pclk", -- .parent = &pba_clk, -- .mode = pba_clk_mode, -- .get_rate = pba_clk_get_rate, -- .index = 2, --}; -- --struct platform_device *__init at32_add_device_twi(unsigned int id) --{ -- struct platform_device *pdev; -- -- if (id != 0) -- return NULL; -- -- pdev = platform_device_alloc("atmel_twi", id); -- if (!pdev) -- return NULL; -- -- if (platform_device_add_resources(pdev, atmel_twi0_resource, -- ARRAY_SIZE(atmel_twi0_resource))) -- goto err_add_resources; -- -- select_peripheral(PA(6), PERIPH_A, 0); /* SDA */ -- select_peripheral(PA(7), PERIPH_A, 0); /* SDL */ -- -- atmel_twi0_pclk.dev = &pdev->dev; -- -- platform_device_add(pdev); -- return pdev; -- --err_add_resources: -- platform_device_put(pdev); -- return NULL; --} -- --/* -------------------------------------------------------------------- -- * MMC -- * -------------------------------------------------------------------- */ --static struct resource atmel_mci0_resource[] __initdata = { -- PBMEM(0xfff02400), -- IRQ(28), --}; --static struct clk atmel_mci0_pclk = { -- .name = "mci_clk", -- .parent = &pbb_clk, -- .mode = pbb_clk_mode, -- .get_rate = pbb_clk_get_rate, -- .index = 9, --}; -- --struct platform_device *__init at32_add_device_mci(unsigned int id) --{ -- struct platform_device *pdev; -- -- if (id != 0) -- return NULL; -- -- pdev = platform_device_alloc("atmel_mci", id); -- if (!pdev) -- return NULL; -- -- if (platform_device_add_resources(pdev, atmel_mci0_resource, -- ARRAY_SIZE(atmel_mci0_resource))) -- goto err_add_resources; -- -- select_peripheral(PA(10), PERIPH_A, 0); /* CLK */ -- select_peripheral(PA(11), PERIPH_A, 0); /* CMD */ -- select_peripheral(PA(12), PERIPH_A, 0); /* DATA0 */ -- select_peripheral(PA(13), PERIPH_A, 0); /* DATA1 */ -- select_peripheral(PA(14), PERIPH_A, 0); /* DATA2 */ -- select_peripheral(PA(15), PERIPH_A, 0); /* DATA3 */ -- -- atmel_mci0_pclk.dev = &pdev->dev; -- -- platform_device_add(pdev); -- return pdev; -- --err_add_resources: -- platform_device_put(pdev); -- return NULL; --} -- --/* -------------------------------------------------------------------- -- * LCDC -- * -------------------------------------------------------------------- */ --static struct atmel_lcdfb_info atmel_lcdfb0_data; --static struct resource atmel_lcdfb0_resource[] = { -- { -- .start = 0xff000000, -- .end = 0xff000fff, -- .flags = IORESOURCE_MEM, -- }, -- IRQ(1), -- { -- /* Placeholder for pre-allocated fb memory */ -- .start = 0x00000000, -- .end = 0x00000000, -- .flags = 0, -- }, --}; --DEFINE_DEV_DATA(atmel_lcdfb, 0); --DEV_CLK(hck1, atmel_lcdfb0, hsb, 7); --static struct clk atmel_lcdfb0_pixclk = { -- .name = "lcdc_clk", -- .dev = &atmel_lcdfb0_device.dev, -- .mode = genclk_mode, -- .get_rate = genclk_get_rate, -- .set_rate = genclk_set_rate, -- .set_parent = genclk_set_parent, -- .index = 7, --}; -- --struct platform_device *__init --at32_add_device_lcdc(unsigned int id, struct atmel_lcdfb_info *data, -- unsigned long fbmem_start, unsigned long fbmem_len) --{ -- struct platform_device *pdev; -- struct atmel_lcdfb_info *info; -- struct fb_monspecs *monspecs; -- struct fb_videomode *modedb; -- unsigned int modedb_size; -- -- /* -- * Do a deep copy of the fb data, monspecs and modedb. Make -- * sure all allocations are done before setting up the -- * portmux. -- */ -- monspecs = kmemdup(data->default_monspecs, -- sizeof(struct fb_monspecs), GFP_KERNEL); -- if (!monspecs) -- return NULL; -- -- modedb_size = sizeof(struct fb_videomode) * monspecs->modedb_len; -- modedb = kmemdup(monspecs->modedb, modedb_size, GFP_KERNEL); -- if (!modedb) -- goto err_dup_modedb; -- monspecs->modedb = modedb; -- -- switch (id) { -- case 0: -- pdev = &atmel_lcdfb0_device; -- select_peripheral(PC(19), PERIPH_A, 0); /* CC */ -- select_peripheral(PC(20), PERIPH_A, 0); /* HSYNC */ -- select_peripheral(PC(21), PERIPH_A, 0); /* PCLK */ -- select_peripheral(PC(22), PERIPH_A, 0); /* VSYNC */ -- select_peripheral(PC(23), PERIPH_A, 0); /* DVAL */ -- select_peripheral(PC(24), PERIPH_A, 0); /* MODE */ -- select_peripheral(PC(25), PERIPH_A, 0); /* PWR */ -- select_peripheral(PC(26), PERIPH_A, 0); /* DATA0 */ -- select_peripheral(PC(27), PERIPH_A, 0); /* DATA1 */ -- select_peripheral(PC(28), PERIPH_A, 0); /* DATA2 */ -- select_peripheral(PC(29), PERIPH_A, 0); /* DATA3 */ -- select_peripheral(PC(30), PERIPH_A, 0); /* DATA4 */ -- select_peripheral(PC(31), PERIPH_A, 0); /* DATA5 */ -- select_peripheral(PD(0), PERIPH_A, 0); /* DATA6 */ -- select_peripheral(PD(1), PERIPH_A, 0); /* DATA7 */ -- select_peripheral(PD(2), PERIPH_A, 0); /* DATA8 */ -- select_peripheral(PD(3), PERIPH_A, 0); /* DATA9 */ -- select_peripheral(PD(4), PERIPH_A, 0); /* DATA10 */ -- select_peripheral(PD(5), PERIPH_A, 0); /* DATA11 */ -- select_peripheral(PD(6), PERIPH_A, 0); /* DATA12 */ -- select_peripheral(PD(7), PERIPH_A, 0); /* DATA13 */ -- select_peripheral(PD(8), PERIPH_A, 0); /* DATA14 */ -- select_peripheral(PD(9), PERIPH_A, 0); /* DATA15 */ -- select_peripheral(PD(10), PERIPH_A, 0); /* DATA16 */ -- select_peripheral(PD(11), PERIPH_A, 0); /* DATA17 */ -- select_peripheral(PD(12), PERIPH_A, 0); /* DATA18 */ -- select_peripheral(PD(13), PERIPH_A, 0); /* DATA19 */ -- select_peripheral(PD(14), PERIPH_A, 0); /* DATA20 */ -- select_peripheral(PD(15), PERIPH_A, 0); /* DATA21 */ -- select_peripheral(PD(16), PERIPH_A, 0); /* DATA22 */ -- select_peripheral(PD(17), PERIPH_A, 0); /* DATA23 */ -- -- clk_set_parent(&atmel_lcdfb0_pixclk, &pll0); -- clk_set_rate(&atmel_lcdfb0_pixclk, clk_get_rate(&pll0)); -- break; -- -- default: -- goto err_invalid_id; -- } -- -- if (fbmem_len) { -- pdev->resource[2].start = fbmem_start; -- pdev->resource[2].end = fbmem_start + fbmem_len - 1; -- pdev->resource[2].flags = IORESOURCE_MEM; -- } -- -- info = pdev->dev.platform_data; -- memcpy(info, data, sizeof(struct atmel_lcdfb_info)); -- info->default_monspecs = monspecs; -- -- platform_device_register(pdev); -- return pdev; -- --err_invalid_id: -- kfree(modedb); --err_dup_modedb: -- kfree(monspecs); -- return NULL; --} -- --/* -------------------------------------------------------------------- -- * SSC -- * -------------------------------------------------------------------- */ --static struct resource ssc0_resource[] = { -- PBMEM(0xffe01c00), -- IRQ(10), --}; --DEFINE_DEV(ssc, 0); --DEV_CLK(pclk, ssc0, pba, 7); -- --static struct resource ssc1_resource[] = { -- PBMEM(0xffe02000), -- IRQ(11), --}; --DEFINE_DEV(ssc, 1); --DEV_CLK(pclk, ssc1, pba, 8); -- --static struct resource ssc2_resource[] = { -- PBMEM(0xffe02400), -- IRQ(12), --}; --DEFINE_DEV(ssc, 2); --DEV_CLK(pclk, ssc2, pba, 9); -- --struct platform_device *__init --at32_add_device_ssc(unsigned int id, unsigned int flags) --{ -- struct platform_device *pdev; -- -- switch (id) { -- case 0: -- pdev = &ssc0_device; -- if (flags & ATMEL_SSC_RF) -- select_peripheral(PA(21), PERIPH_A, 0); /* RF */ -- if (flags & ATMEL_SSC_RK) -- select_peripheral(PA(22), PERIPH_A, 0); /* RK */ -- if (flags & ATMEL_SSC_TK) -- select_peripheral(PA(23), PERIPH_A, 0); /* TK */ -- if (flags & ATMEL_SSC_TF) -- select_peripheral(PA(24), PERIPH_A, 0); /* TF */ -- if (flags & ATMEL_SSC_TD) -- select_peripheral(PA(25), PERIPH_A, 0); /* TD */ -- if (flags & ATMEL_SSC_RD) -- select_peripheral(PA(26), PERIPH_A, 0); /* RD */ -- break; -- case 1: -- pdev = &ssc1_device; -- if (flags & ATMEL_SSC_RF) -- select_peripheral(PA(0), PERIPH_B, 0); /* RF */ -- if (flags & ATMEL_SSC_RK) -- select_peripheral(PA(1), PERIPH_B, 0); /* RK */ -- if (flags & ATMEL_SSC_TK) -- select_peripheral(PA(2), PERIPH_B, 0); /* TK */ -- if (flags & ATMEL_SSC_TF) -- select_peripheral(PA(3), PERIPH_B, 0); /* TF */ -- if (flags & ATMEL_SSC_TD) -- select_peripheral(PA(4), PERIPH_B, 0); /* TD */ -- if (flags & ATMEL_SSC_RD) -- select_peripheral(PA(5), PERIPH_B, 0); /* RD */ -- break; -- case 2: -- pdev = &ssc2_device; -- if (flags & ATMEL_SSC_TD) -- select_peripheral(PB(13), PERIPH_A, 0); /* TD */ -- if (flags & ATMEL_SSC_RD) -- select_peripheral(PB(14), PERIPH_A, 0); /* RD */ -- if (flags & ATMEL_SSC_TK) -- select_peripheral(PB(15), PERIPH_A, 0); /* TK */ -- if (flags & ATMEL_SSC_TF) -- select_peripheral(PB(16), PERIPH_A, 0); /* TF */ -- if (flags & ATMEL_SSC_RF) -- select_peripheral(PB(17), PERIPH_A, 0); /* RF */ -- if (flags & ATMEL_SSC_RK) -- select_peripheral(PB(18), PERIPH_A, 0); /* RK */ -- break; -- default: -- return NULL; -- } -- -- platform_device_register(pdev); -- return pdev; --} -- --/* -------------------------------------------------------------------- -- * USB Device Controller -- * -------------------------------------------------------------------- */ --static struct resource usba0_resource[] __initdata = { -- { -- .start = 0xff300000, -- .end = 0xff3fffff, -- .flags = IORESOURCE_MEM, -- }, { -- .start = 0xfff03000, -- .end = 0xfff033ff, -- .flags = IORESOURCE_MEM, -- }, -- IRQ(31), --}; --static struct clk usba0_pclk = { -- .name = "pclk", -- .parent = &pbb_clk, -- .mode = pbb_clk_mode, -- .get_rate = pbb_clk_get_rate, -- .index = 12, --}; --static struct clk usba0_hclk = { -- .name = "hclk", -- .parent = &hsb_clk, -- .mode = hsb_clk_mode, -- .get_rate = hsb_clk_get_rate, -- .index = 6, --}; -- --struct platform_device *__init --at32_add_device_usba(unsigned int id, struct usba_platform_data *data) --{ -- struct platform_device *pdev; -- -- if (id != 0) -- return NULL; -- -- pdev = platform_device_alloc("atmel_usba_udc", 0); -- if (!pdev) -- return NULL; -- -- if (platform_device_add_resources(pdev, usba0_resource, -- ARRAY_SIZE(usba0_resource))) -- goto out_free_pdev; -- -- if (data) { -- if (platform_device_add_data(pdev, data, sizeof(*data))) -- goto out_free_pdev; -- -- if (data->vbus_pin != GPIO_PIN_NONE) -- at32_select_gpio(data->vbus_pin, 0); -- } -- -- usba0_pclk.dev = &pdev->dev; -- usba0_hclk.dev = &pdev->dev; -- -- platform_device_add(pdev); -- -- return pdev; -- --out_free_pdev: -- platform_device_put(pdev); -- return NULL; --} -- --/* -------------------------------------------------------------------- -- * IDE / CompactFlash -- * -------------------------------------------------------------------- */ --static struct resource at32_smc_cs4_resource[] __initdata = { -- { -- .start = 0x04000000, -- .end = 0x07ffffff, -- .flags = IORESOURCE_MEM, -- }, -- IRQ(~0UL), /* Magic IRQ will be overridden */ --}; --static struct resource at32_smc_cs5_resource[] __initdata = { -- { -- .start = 0x20000000, -- .end = 0x23ffffff, -- .flags = IORESOURCE_MEM, -- }, -- IRQ(~0UL), /* Magic IRQ will be overridden */ --}; -- --static int __init at32_init_ide_or_cf(struct platform_device *pdev, -- unsigned int cs, unsigned int extint) --{ -- static unsigned int extint_pin_map[4] __initdata = { -- GPIO_PIN_PB(25), -- GPIO_PIN_PB(26), -- GPIO_PIN_PB(27), -- GPIO_PIN_PB(28), -- }; -- static bool common_pins_initialized __initdata = false; -- unsigned int extint_pin; -- int ret; -- -- if (extint >= ARRAY_SIZE(extint_pin_map)) -- return -EINVAL; -- extint_pin = extint_pin_map[extint]; -- -- switch (cs) { -- case 4: -- ret = platform_device_add_resources(pdev, -- at32_smc_cs4_resource, -- ARRAY_SIZE(at32_smc_cs4_resource)); -- if (ret) -- return ret; -- -- select_peripheral(PE(21), PERIPH_A, 0); /* NCS4 -> OE_N */ -- set_ebi_sfr_bits(HMATRIX_BIT(CS4A)); -- break; -- case 5: -- ret = platform_device_add_resources(pdev, -- at32_smc_cs5_resource, -- ARRAY_SIZE(at32_smc_cs5_resource)); -- if (ret) -- return ret; -- -- select_peripheral(PE(22), PERIPH_A, 0); /* NCS5 -> OE_N */ -- set_ebi_sfr_bits(HMATRIX_BIT(CS5A)); -- break; -- default: -- return -EINVAL; -- } -- -- if (!common_pins_initialized) { -- select_peripheral(PE(19), PERIPH_A, 0); /* CFCE1 -> CS0_N */ -- select_peripheral(PE(20), PERIPH_A, 0); /* CFCE2 -> CS1_N */ -- select_peripheral(PE(23), PERIPH_A, 0); /* CFRNW -> DIR */ -- select_peripheral(PE(24), PERIPH_A, 0); /* NWAIT <- IORDY */ -- common_pins_initialized = true; -- } -- -- at32_select_periph(extint_pin, GPIO_PERIPH_A, AT32_GPIOF_DEGLITCH); -- -- pdev->resource[1].start = EIM_IRQ_BASE + extint; -- pdev->resource[1].end = pdev->resource[1].start; -- -- return 0; --} -- --struct platform_device *__init --at32_add_device_ide(unsigned int id, unsigned int extint, -- struct ide_platform_data *data) --{ -- struct platform_device *pdev; -- -- pdev = platform_device_alloc("at32_ide", id); -- if (!pdev) -- goto fail; -- -- if (platform_device_add_data(pdev, data, -- sizeof(struct ide_platform_data))) -- goto fail; -- -- if (at32_init_ide_or_cf(pdev, data->cs, extint)) -- goto fail; -- -- platform_device_add(pdev); -- return pdev; -- --fail: -- platform_device_put(pdev); -- return NULL; --} -- --struct platform_device *__init --at32_add_device_cf(unsigned int id, unsigned int extint, -- struct cf_platform_data *data) --{ -- struct platform_device *pdev; -- -- pdev = platform_device_alloc("at32_cf", id); -- if (!pdev) -- goto fail; -- -- if (platform_device_add_data(pdev, data, -- sizeof(struct cf_platform_data))) -- goto fail; -- -- if (at32_init_ide_or_cf(pdev, data->cs, extint)) -- goto fail; -- -- if (data->detect_pin != GPIO_PIN_NONE) -- at32_select_gpio(data->detect_pin, AT32_GPIOF_DEGLITCH); -- if (data->reset_pin != GPIO_PIN_NONE) -- at32_select_gpio(data->reset_pin, 0); -- if (data->vcc_pin != GPIO_PIN_NONE) -- at32_select_gpio(data->vcc_pin, 0); -- /* READY is used as extint, so we can't select it as gpio */ -- -- platform_device_add(pdev); -- return pdev; -- --fail: -- platform_device_put(pdev); -- return NULL; --} -- --/* -------------------------------------------------------------------- -- * AC97C -- * -------------------------------------------------------------------- */ --static struct resource atmel_ac97c0_resource[] __initdata = { -- PBMEM(0xfff02800), -- IRQ(29), --}; --static struct clk atmel_ac97c0_pclk = { -- .name = "pclk", -- .parent = &pbb_clk, -- .mode = pbb_clk_mode, -- .get_rate = pbb_clk_get_rate, -- .index = 10, --}; -- --struct platform_device *__init at32_add_device_ac97c(unsigned int id) --{ -- struct platform_device *pdev; -- -- if (id != 0) -- return NULL; -- -- pdev = platform_device_alloc("atmel_ac97c", id); -- if (!pdev) -- return NULL; -- -- if (platform_device_add_resources(pdev, atmel_ac97c0_resource, -- ARRAY_SIZE(atmel_ac97c0_resource))) -- goto err_add_resources; -- -- select_peripheral(PB(20), PERIPH_B, 0); /* SYNC */ -- select_peripheral(PB(21), PERIPH_B, 0); /* SDO */ -- select_peripheral(PB(22), PERIPH_B, 0); /* SDI */ -- select_peripheral(PB(23), PERIPH_B, 0); /* SCLK */ -- -- atmel_ac97c0_pclk.dev = &pdev->dev; -- -- platform_device_add(pdev); -- return pdev; -- --err_add_resources: -- platform_device_put(pdev); -- return NULL; --} -- --/* -------------------------------------------------------------------- -- * ABDAC -- * -------------------------------------------------------------------- */ --static struct resource abdac0_resource[] __initdata = { -- PBMEM(0xfff02000), -- IRQ(27), --}; --static struct clk abdac0_pclk = { -- .name = "pclk", -- .parent = &pbb_clk, -- .mode = pbb_clk_mode, -- .get_rate = pbb_clk_get_rate, -- .index = 8, --}; --static struct clk abdac0_sample_clk = { -- .name = "sample_clk", -- .mode = genclk_mode, -- .get_rate = genclk_get_rate, -- .set_rate = genclk_set_rate, -- .set_parent = genclk_set_parent, -- .index = 6, --}; -- --struct platform_device *__init at32_add_device_abdac(unsigned int id) --{ -- struct platform_device *pdev; -- -- if (id != 0) -- return NULL; -- -- pdev = platform_device_alloc("abdac", id); -- if (!pdev) -- return NULL; -- -- if (platform_device_add_resources(pdev, abdac0_resource, -- ARRAY_SIZE(abdac0_resource))) -- goto err_add_resources; -- -- select_peripheral(PB(20), PERIPH_A, 0); /* DATA1 */ -- select_peripheral(PB(21), PERIPH_A, 0); /* DATA0 */ -- select_peripheral(PB(22), PERIPH_A, 0); /* DATAN1 */ -- select_peripheral(PB(23), PERIPH_A, 0); /* DATAN0 */ -- -- abdac0_pclk.dev = &pdev->dev; -- abdac0_sample_clk.dev = &pdev->dev; -- -- platform_device_add(pdev); -- return pdev; -- --err_add_resources: -- platform_device_put(pdev); -- return NULL; --} -- --/* -------------------------------------------------------------------- -- * GCLK -- * -------------------------------------------------------------------- */ --static struct clk gclk0 = { -- .name = "gclk0", -- .mode = genclk_mode, -- .get_rate = genclk_get_rate, -- .set_rate = genclk_set_rate, -- .set_parent = genclk_set_parent, -- .index = 0, --}; --static struct clk gclk1 = { -- .name = "gclk1", -- .mode = genclk_mode, -- .get_rate = genclk_get_rate, -- .set_rate = genclk_set_rate, -- .set_parent = genclk_set_parent, -- .index = 1, --}; --static struct clk gclk2 = { -- .name = "gclk2", -- .mode = genclk_mode, -- .get_rate = genclk_get_rate, -- .set_rate = genclk_set_rate, -- .set_parent = genclk_set_parent, -- .index = 2, --}; --static struct clk gclk3 = { -- .name = "gclk3", -- .mode = genclk_mode, -- .get_rate = genclk_get_rate, -- .set_rate = genclk_set_rate, -- .set_parent = genclk_set_parent, -- .index = 3, --}; --static struct clk gclk4 = { -- .name = "gclk4", -- .mode = genclk_mode, -- .get_rate = genclk_get_rate, -- .set_rate = genclk_set_rate, -- .set_parent = genclk_set_parent, -- .index = 4, --}; -- --struct clk *at32_clock_list[] = { -- &osc32k, -- &osc0, -- &osc1, -- &pll0, -- &pll1, -- &cpu_clk, -- &hsb_clk, -- &pba_clk, -- &pbb_clk, -- &at32_pm_pclk, -- &at32_intc0_pclk, -- &hmatrix_clk, -- &ebi_clk, -- &hramc_clk, -- &smc0_pclk, -- &smc0_mck, -- &pdc_hclk, -- &pdc_pclk, -- &dmaca0_hclk, -- &pico_clk, -- &pio0_mck, -- &pio1_mck, -- &pio2_mck, -- &pio3_mck, -- &pio4_mck, -- &at32_systc0_pclk, -- &atmel_usart0_usart, -- &atmel_usart1_usart, -- &atmel_usart2_usart, -- &atmel_usart3_usart, -- &macb0_hclk, -- &macb0_pclk, -- &macb1_hclk, -- &macb1_pclk, -- &atmel_spi0_spi_clk, -- &atmel_spi1_spi_clk, -- &atmel_twi0_pclk, -- &atmel_mci0_pclk, -- &atmel_lcdfb0_hck1, -- &atmel_lcdfb0_pixclk, -- &ssc0_pclk, -- &ssc1_pclk, -- &ssc2_pclk, -- &usba0_hclk, -- &usba0_pclk, -- &atmel_ac97c0_pclk, -- &abdac0_pclk, -- &abdac0_sample_clk, -- &gclk0, -- &gclk1, -- &gclk2, -- &gclk3, -- &gclk4, --}; --unsigned int at32_nr_clocks = ARRAY_SIZE(at32_clock_list); -- --void __init at32_portmux_init(void) --{ -- at32_init_pio(&pio0_device); -- at32_init_pio(&pio1_device); -- at32_init_pio(&pio2_device); -- at32_init_pio(&pio3_device); -- at32_init_pio(&pio4_device); --} -- --void __init at32_clock_init(void) --{ -- u32 cpu_mask = 0, hsb_mask = 0, pba_mask = 0, pbb_mask = 0; -- int i; -- -- if (pm_readl(MCCTRL) & PM_BIT(PLLSEL)) { -- main_clock = &pll0; -- cpu_clk.parent = &pll0; -- } else { -- main_clock = &osc0; -- cpu_clk.parent = &osc0; -- } -- -- if (pm_readl(PLL0) & PM_BIT(PLLOSC)) -- pll0.parent = &osc1; -- if (pm_readl(PLL1) & PM_BIT(PLLOSC)) -- pll1.parent = &osc1; -- -- genclk_init_parent(&gclk0); -- genclk_init_parent(&gclk1); -- genclk_init_parent(&gclk2); -- genclk_init_parent(&gclk3); -- genclk_init_parent(&gclk4); -- genclk_init_parent(&atmel_lcdfb0_pixclk); -- genclk_init_parent(&abdac0_sample_clk); -- -- /* -- * Turn on all clocks that have at least one user already, and -- * turn off everything else. We only do this for module -- * clocks, and even though it isn't particularly pretty to -- * check the address of the mode function, it should do the -- * trick... -- */ -- for (i = 0; i < ARRAY_SIZE(at32_clock_list); i++) { -- struct clk *clk = at32_clock_list[i]; -- -- if (clk->users == 0) -- continue; -- -- if (clk->mode == &cpu_clk_mode) -- cpu_mask |= 1 << clk->index; -- else if (clk->mode == &hsb_clk_mode) -- hsb_mask |= 1 << clk->index; -- else if (clk->mode == &pba_clk_mode) -- pba_mask |= 1 << clk->index; -- else if (clk->mode == &pbb_clk_mode) -- pbb_mask |= 1 << clk->index; -- } -- -- pm_writel(CPU_MASK, cpu_mask); -- pm_writel(HSB_MASK, hsb_mask); -- pm_writel(PBA_MASK, pba_mask); -- pm_writel(PBB_MASK, pbb_mask); --} -diff -Nrup linux-2.6.24/arch/avr32/mach-at32ap/at32ap700x.c linux-avr32/arch/avr32/mach-at32ap/at32ap700x.c ---- linux-2.6.24/arch/avr32/mach-at32ap/at32ap700x.c 1969-12-31 19:00:00.000000000 -0500 -+++ linux-avr32/arch/avr32/mach-at32ap/at32ap700x.c 2008-02-01 14:51:35.000000000 -0500 -@@ -0,0 +1,1809 @@ -+/* -+ * Copyright (C) 2005-2006 Atmel Corporation -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 as -+ * published by the Free Software Foundation. -+ */ -+#include <linux/clk.h> -+#include <linux/fb.h> -+#include <linux/init.h> -+#include <linux/platform_device.h> -+#include <linux/dma-mapping.h> -+#include <linux/spi/spi.h> -+ -+#include <asm/io.h> -+#include <asm/irq.h> -+ -+#include <asm/arch/at32ap700x.h> -+#include <asm/arch/board.h> -+#include <asm/arch/portmux.h> -+ -+#include <video/atmel_lcdc.h> -+ -+#include "clock.h" -+#include "hmatrix.h" -+#include "pio.h" -+#include "pm.h" -+ -+ -+#define PBMEM(base) \ -+ { \ -+ .start = base, \ -+ .end = base + 0x3ff, \ -+ .flags = IORESOURCE_MEM, \ -+ } -+#define IRQ(num) \ -+ { \ -+ .start = num, \ -+ .end = num, \ -+ .flags = IORESOURCE_IRQ, \ -+ } -+#define NAMED_IRQ(num, _name) \ -+ { \ -+ .start = num, \ -+ .end = num, \ -+ .name = _name, \ -+ .flags = IORESOURCE_IRQ, \ -+ } -+ -+/* REVISIT these assume *every* device supports DMA, but several -+ * don't ... tc, smc, pio, rtc, watchdog, pwm, ps2, and more. -+ */ -+#define DEFINE_DEV(_name, _id) \ -+static u64 _name##_id##_dma_mask = DMA_32BIT_MASK; \ -+static struct platform_device _name##_id##_device = { \ -+ .name = #_name, \ -+ .id = _id, \ -+ .dev = { \ -+ .dma_mask = &_name##_id##_dma_mask, \ -+ .coherent_dma_mask = DMA_32BIT_MASK, \ -+ }, \ -+ .resource = _name##_id##_resource, \ -+ .num_resources = ARRAY_SIZE(_name##_id##_resource), \ -+} -+#define DEFINE_DEV_DATA(_name, _id) \ -+static u64 _name##_id##_dma_mask = DMA_32BIT_MASK; \ -+static struct platform_device _name##_id##_device = { \ -+ .name = #_name, \ -+ .id = _id, \ -+ .dev = { \ -+ .dma_mask = &_name##_id##_dma_mask, \ -+ .platform_data = &_name##_id##_data, \ -+ .coherent_dma_mask = DMA_32BIT_MASK, \ -+ }, \ -+ .resource = _name##_id##_resource, \ -+ .num_resources = ARRAY_SIZE(_name##_id##_resource), \ -+} -+ -+#define select_peripheral(pin, periph, flags) \ -+ at32_select_periph(GPIO_PIN_##pin, GPIO_##periph, flags) -+ -+#define DEV_CLK(_name, devname, bus, _index) \ -+static struct clk devname##_##_name = { \ -+ .name = #_name, \ -+ .dev = &devname##_device.dev, \ -+ .parent = &bus##_clk, \ -+ .mode = bus##_clk_mode, \ -+ .get_rate = bus##_clk_get_rate, \ -+ .index = _index, \ -+} -+ -+static DEFINE_SPINLOCK(pm_lock); -+ -+unsigned long at32ap7000_osc_rates[3] = { -+ [0] = 32768, -+ /* FIXME: these are ATSTK1002-specific */ -+ [1] = 20000000, -+ [2] = 12000000, -+}; -+ -+static unsigned long osc_get_rate(struct clk *clk) -+{ -+ return at32ap7000_osc_rates[clk->index]; -+} -+ -+static unsigned long pll_get_rate(struct clk *clk, unsigned long control) -+{ -+ unsigned long div, mul, rate; -+ -+ if (!(control & PM_BIT(PLLEN))) -+ return 0; -+ -+ div = PM_BFEXT(PLLDIV, control) + 1; -+ mul = PM_BFEXT(PLLMUL, control) + 1; -+ -+ rate = clk->parent->get_rate(clk->parent); -+ rate = (rate + div / 2) / div; -+ rate *= mul; -+ -+ return rate; -+} -+ -+static unsigned long pll0_get_rate(struct clk *clk) -+{ -+ u32 control; -+ -+ control = pm_readl(PLL0); -+ -+ return pll_get_rate(clk, control); -+} -+ -+static unsigned long pll1_get_rate(struct clk *clk) -+{ -+ u32 control; -+ -+ control = pm_readl(PLL1); -+ -+ return pll_get_rate(clk, control); -+} -+ -+/* -+ * The AT32AP7000 has five primary clock sources: One 32kHz -+ * oscillator, two crystal oscillators and two PLLs. -+ */ -+static struct clk osc32k = { -+ .name = "osc32k", -+ .get_rate = osc_get_rate, -+ .users = 1, -+ .index = 0, -+}; -+static struct clk osc0 = { -+ .name = "osc0", -+ .get_rate = osc_get_rate, -+ .users = 1, -+ .index = 1, -+}; -+static struct clk osc1 = { -+ .name = "osc1", -+ .get_rate = osc_get_rate, -+ .index = 2, -+}; -+static struct clk pll0 = { -+ .name = "pll0", -+ .get_rate = pll0_get_rate, -+ .parent = &osc0, -+}; -+static struct clk pll1 = { -+ .name = "pll1", -+ .get_rate = pll1_get_rate, -+ .parent = &osc0, -+}; -+ -+/* -+ * The main clock can be either osc0 or pll0. The boot loader may -+ * have chosen one for us, so we don't really know which one until we -+ * have a look at the SM. -+ */ -+static struct clk *main_clock; -+ -+/* -+ * Synchronous clocks are generated from the main clock. The clocks -+ * must satisfy the constraint -+ * fCPU >= fHSB >= fPB -+ * i.e. each clock must not be faster than its parent. -+ */ -+static unsigned long bus_clk_get_rate(struct clk *clk, unsigned int shift) -+{ -+ return main_clock->get_rate(main_clock) >> shift; -+}; -+ -+static void cpu_clk_mode(struct clk *clk, int enabled) -+{ -+ unsigned long flags; -+ u32 mask; -+ -+ spin_lock_irqsave(&pm_lock, flags); -+ mask = pm_readl(CPU_MASK); -+ if (enabled) -+ mask |= 1 << clk->index; -+ else -+ mask &= ~(1 << clk->index); -+ pm_writel(CPU_MASK, mask); -+ spin_unlock_irqrestore(&pm_lock, flags); -+} -+ -+static unsigned long cpu_clk_get_rate(struct clk *clk) -+{ -+ unsigned long cksel, shift = 0; -+ -+ cksel = pm_readl(CKSEL); -+ if (cksel & PM_BIT(CPUDIV)) -+ shift = PM_BFEXT(CPUSEL, cksel) + 1; -+ -+ return bus_clk_get_rate(clk, shift); -+} -+ -+static long cpu_clk_set_rate(struct clk *clk, unsigned long rate, int apply) -+{ -+ u32 control; -+ unsigned long parent_rate, child_div, actual_rate, div; -+ -+ parent_rate = clk->parent->get_rate(clk->parent); -+ control = pm_readl(CKSEL); -+ -+ if (control & PM_BIT(HSBDIV)) -+ child_div = 1 << (PM_BFEXT(HSBSEL, control) + 1); -+ else -+ child_div = 1; -+ -+ if (rate > 3 * (parent_rate / 4) || child_div == 1) { -+ actual_rate = parent_rate; -+ control &= ~PM_BIT(CPUDIV); -+ } else { -+ unsigned int cpusel; -+ div = (parent_rate + rate / 2) / rate; -+ if (div > child_div) -+ div = child_div; -+ cpusel = (div > 1) ? (fls(div) - 2) : 0; -+ control = PM_BIT(CPUDIV) | PM_BFINS(CPUSEL, cpusel, control); -+ actual_rate = parent_rate / (1 << (cpusel + 1)); -+ } -+ -+ pr_debug("clk %s: new rate %lu (actual rate %lu)\n", -+ clk->name, rate, actual_rate); -+ -+ if (apply) -+ pm_writel(CKSEL, control); -+ -+ return actual_rate; -+} -+ -+static void hsb_clk_mode(struct clk *clk, int enabled) -+{ -+ unsigned long flags; -+ u32 mask; -+ -+ spin_lock_irqsave(&pm_lock, flags); -+ mask = pm_readl(HSB_MASK); -+ if (enabled) -+ mask |= 1 << clk->index; -+ else -+ mask &= ~(1 << clk->index); -+ pm_writel(HSB_MASK, mask); -+ spin_unlock_irqrestore(&pm_lock, flags); -+} -+ -+static unsigned long hsb_clk_get_rate(struct clk *clk) -+{ -+ unsigned long cksel, shift = 0; -+ -+ cksel = pm_readl(CKSEL); -+ if (cksel & PM_BIT(HSBDIV)) -+ shift = PM_BFEXT(HSBSEL, cksel) + 1; -+ -+ return bus_clk_get_rate(clk, shift); -+} -+ -+static void pba_clk_mode(struct clk *clk, int enabled) -+{ -+ unsigned long flags; -+ u32 mask; -+ -+ spin_lock_irqsave(&pm_lock, flags); -+ mask = pm_readl(PBA_MASK); -+ if (enabled) -+ mask |= 1 << clk->index; -+ else -+ mask &= ~(1 << clk->index); -+ pm_writel(PBA_MASK, mask); -+ spin_unlock_irqrestore(&pm_lock, flags); -+} -+ -+static unsigned long pba_clk_get_rate(struct clk *clk) -+{ -+ unsigned long cksel, shift = 0; -+ -+ cksel = pm_readl(CKSEL); -+ if (cksel & PM_BIT(PBADIV)) -+ shift = PM_BFEXT(PBASEL, cksel) + 1; -+ -+ return bus_clk_get_rate(clk, shift); -+} -+ -+static void pbb_clk_mode(struct clk *clk, int enabled) -+{ -+ unsigned long flags; -+ u32 mask; -+ -+ spin_lock_irqsave(&pm_lock, flags); -+ mask = pm_readl(PBB_MASK); -+ if (enabled) -+ mask |= 1 << clk->index; -+ else -+ mask &= ~(1 << clk->index); -+ pm_writel(PBB_MASK, mask); -+ spin_unlock_irqrestore(&pm_lock, flags); -+} -+ -+static unsigned long pbb_clk_get_rate(struct clk *clk) -+{ -+ unsigned long cksel, shift = 0; -+ -+ cksel = pm_readl(CKSEL); -+ if (cksel & PM_BIT(PBBDIV)) -+ shift = PM_BFEXT(PBBSEL, cksel) + 1; -+ -+ return bus_clk_get_rate(clk, shift); -+} -+ -+static struct clk cpu_clk = { -+ .name = "cpu", -+ .get_rate = cpu_clk_get_rate, -+ .set_rate = cpu_clk_set_rate, -+ .users = 1, -+}; -+static struct clk hsb_clk = { -+ .name = "hsb", -+ .parent = &cpu_clk, -+ .get_rate = hsb_clk_get_rate, -+}; -+static struct clk pba_clk = { -+ .name = "pba", -+ .parent = &hsb_clk, -+ .mode = hsb_clk_mode, -+ .get_rate = pba_clk_get_rate, -+ .index = 1, -+}; -+static struct clk pbb_clk = { -+ .name = "pbb", -+ .parent = &hsb_clk, -+ .mode = hsb_clk_mode, -+ .get_rate = pbb_clk_get_rate, -+ .users = 1, -+ .index = 2, -+}; -+ -+/* -------------------------------------------------------------------- -+ * Generic Clock operations -+ * -------------------------------------------------------------------- */ -+ -+static void genclk_mode(struct clk *clk, int enabled) -+{ -+ u32 control; -+ -+ control = pm_readl(GCCTRL(clk->index)); -+ if (enabled) -+ control |= PM_BIT(CEN); -+ else -+ control &= ~PM_BIT(CEN); -+ pm_writel(GCCTRL(clk->index), control); -+} -+ -+static unsigned long genclk_get_rate(struct clk *clk) -+{ -+ u32 control; -+ unsigned long div = 1; -+ -+ control = pm_readl(GCCTRL(clk->index)); -+ if (control & PM_BIT(DIVEN)) -+ div = 2 * (PM_BFEXT(DIV, control) + 1); -+ -+ return clk->parent->get_rate(clk->parent) / div; -+} -+ -+static long genclk_set_rate(struct clk *clk, unsigned long rate, int apply) -+{ -+ u32 control; -+ unsigned long parent_rate, actual_rate, div; -+ -+ parent_rate = clk->parent->get_rate(clk->parent); -+ control = pm_readl(GCCTRL(clk->index)); -+ -+ if (rate > 3 * parent_rate / 4) { -+ actual_rate = parent_rate; -+ control &= ~PM_BIT(DIVEN); -+ } else { -+ div = (parent_rate + rate) / (2 * rate) - 1; -+ control = PM_BFINS(DIV, div, control) | PM_BIT(DIVEN); -+ actual_rate = parent_rate / (2 * (div + 1)); -+ } -+ -+ dev_dbg(clk->dev, "clk %s: new rate %lu (actual rate %lu)\n", -+ clk->name, rate, actual_rate); -+ -+ if (apply) -+ pm_writel(GCCTRL(clk->index), control); -+ -+ return actual_rate; -+} -+ -+int genclk_set_parent(struct clk *clk, struct clk *parent) -+{ -+ u32 control; -+ -+ dev_dbg(clk->dev, "clk %s: new parent %s (was %s)\n", -+ clk->name, parent->name, clk->parent->name); -+ -+ control = pm_readl(GCCTRL(clk->index)); -+ -+ if (parent == &osc1 || parent == &pll1) -+ control |= PM_BIT(OSCSEL); -+ else if (parent == &osc0 || parent == &pll0) -+ control &= ~PM_BIT(OSCSEL); -+ else -+ return -EINVAL; -+ -+ if (parent == &pll0 || parent == &pll1) -+ control |= PM_BIT(PLLSEL); -+ else -+ control &= ~PM_BIT(PLLSEL); -+ -+ pm_writel(GCCTRL(clk->index), control); -+ clk->parent = parent; -+ -+ return 0; -+} -+ -+static void __init genclk_init_parent(struct clk *clk) -+{ -+ u32 control; -+ struct clk *parent; -+ -+ BUG_ON(clk->index > 7); -+ -+ control = pm_readl(GCCTRL(clk->index)); -+ if (control & PM_BIT(OSCSEL)) -+ parent = (control & PM_BIT(PLLSEL)) ? &pll1 : &osc1; -+ else -+ parent = (control & PM_BIT(PLLSEL)) ? &pll0 : &osc0; -+ -+ clk->parent = parent; -+} -+ -+/* -------------------------------------------------------------------- -+ * System peripherals -+ * -------------------------------------------------------------------- */ -+static struct resource at32_pm0_resource[] = { -+ { -+ .start = 0xfff00000, -+ .end = 0xfff0007f, -+ .flags = IORESOURCE_MEM, -+ }, -+ IRQ(20), -+}; -+ -+static struct resource at32ap700x_rtc0_resource[] = { -+ { -+ .start = 0xfff00080, -+ .end = 0xfff000af, -+ .flags = IORESOURCE_MEM, -+ }, -+ IRQ(21), -+}; -+ -+static struct resource at32_wdt0_resource[] = { -+ { -+ .start = 0xfff000b0, -+ .end = 0xfff000cf, -+ .flags = IORESOURCE_MEM, -+ }, -+}; -+ -+static struct resource at32_eic0_resource[] = { -+ { -+ .start = 0xfff00100, -+ .end = 0xfff0013f, -+ .flags = IORESOURCE_MEM, -+ }, -+ IRQ(19), -+}; -+ -+DEFINE_DEV(at32_pm, 0); -+DEFINE_DEV(at32ap700x_rtc, 0); -+DEFINE_DEV(at32_wdt, 0); -+DEFINE_DEV(at32_eic, 0); -+ -+/* -+ * Peripheral clock for PM, RTC, WDT and EIC. PM will ensure that this -+ * is always running. -+ */ -+static struct clk at32_pm_pclk = { -+ .name = "pclk", -+ .dev = &at32_pm0_device.dev, -+ .parent = &pbb_clk, -+ .mode = pbb_clk_mode, -+ .get_rate = pbb_clk_get_rate, -+ .users = 1, -+ .index = 0, -+}; -+ -+static struct resource intc0_resource[] = { -+ PBMEM(0xfff00400), -+}; -+struct platform_device at32_intc0_device = { -+ .name = "intc", -+ .id = 0, -+ .resource = intc0_resource, -+ .num_resources = ARRAY_SIZE(intc0_resource), -+}; -+DEV_CLK(pclk, at32_intc0, pbb, 1); -+ -+static struct clk ebi_clk = { -+ .name = "ebi", -+ .parent = &hsb_clk, -+ .mode = hsb_clk_mode, -+ .get_rate = hsb_clk_get_rate, -+ .users = 1, -+}; -+static struct clk hramc_clk = { -+ .name = "hramc", -+ .parent = &hsb_clk, -+ .mode = hsb_clk_mode, -+ .get_rate = hsb_clk_get_rate, -+ .users = 1, -+ .index = 3, -+}; -+ -+static struct resource smc0_resource[] = { -+ PBMEM(0xfff03400), -+}; -+DEFINE_DEV(smc, 0); -+DEV_CLK(pclk, smc0, pbb, 13); -+DEV_CLK(mck, smc0, hsb, 0); -+ -+static struct platform_device pdc_device = { -+ .name = "pdc", -+ .id = 0, -+}; -+DEV_CLK(hclk, pdc, hsb, 4); -+DEV_CLK(pclk, pdc, pba, 16); -+ -+static struct clk pico_clk = { -+ .name = "pico", -+ .parent = &cpu_clk, -+ .mode = cpu_clk_mode, -+ .get_rate = cpu_clk_get_rate, -+ .users = 1, -+}; -+ -+static struct resource dmaca0_resource[] = { -+ { -+ .start = 0xff200000, -+ .end = 0xff20ffff, -+ .flags = IORESOURCE_MEM, -+ }, -+ IRQ(2), -+}; -+DEFINE_DEV(dmaca, 0); -+DEV_CLK(hclk, dmaca0, hsb, 10); -+ -+/* -------------------------------------------------------------------- -+ * HMATRIX -+ * -------------------------------------------------------------------- */ -+ -+static struct clk hmatrix_clk = { -+ .name = "hmatrix_clk", -+ .parent = &pbb_clk, -+ .mode = pbb_clk_mode, -+ .get_rate = pbb_clk_get_rate, -+ .index = 2, -+ .users = 1, -+}; -+#define HMATRIX_BASE ((void __iomem *)0xfff00800) -+ -+#define hmatrix_readl(reg) \ -+ __raw_readl((HMATRIX_BASE) + HMATRIX_##reg) -+#define hmatrix_writel(reg,value) \ -+ __raw_writel((value), (HMATRIX_BASE) + HMATRIX_##reg) -+ -+/* -+ * Set bits in the HMATRIX Special Function Register (SFR) used by the -+ * External Bus Interface (EBI). This can be used to enable special -+ * features like CompactFlash support, NAND Flash support, etc. on -+ * certain chipselects. -+ */ -+static inline void set_ebi_sfr_bits(u32 mask) -+{ -+ u32 sfr; -+ -+ clk_enable(&hmatrix_clk); -+ sfr = hmatrix_readl(SFR4); -+ sfr |= mask; -+ hmatrix_writel(SFR4, sfr); -+ clk_disable(&hmatrix_clk); -+} -+ -+/* -------------------------------------------------------------------- -+ * System Timer/Counter (TC) -+ * -------------------------------------------------------------------- */ -+static struct resource at32_systc0_resource[] = { -+ PBMEM(0xfff00c00), -+ IRQ(22), -+}; -+struct platform_device at32_systc0_device = { -+ .name = "systc", -+ .id = 0, -+ .resource = at32_systc0_resource, -+ .num_resources = ARRAY_SIZE(at32_systc0_resource), -+}; -+DEV_CLK(pclk, at32_systc0, pbb, 3); -+ -+/* -------------------------------------------------------------------- -+ * PIO -+ * -------------------------------------------------------------------- */ -+ -+static struct resource pio0_resource[] = { -+ PBMEM(0xffe02800), -+ IRQ(13), -+}; -+DEFINE_DEV(pio, 0); -+DEV_CLK(mck, pio0, pba, 10); -+ -+static struct resource pio1_resource[] = { -+ PBMEM(0xffe02c00), -+ IRQ(14), -+}; -+DEFINE_DEV(pio, 1); -+DEV_CLK(mck, pio1, pba, 11); -+ -+static struct resource pio2_resource[] = { -+ PBMEM(0xffe03000), -+ IRQ(15), -+}; -+DEFINE_DEV(pio, 2); -+DEV_CLK(mck, pio2, pba, 12); -+ -+static struct resource pio3_resource[] = { -+ PBMEM(0xffe03400), -+ IRQ(16), -+}; -+DEFINE_DEV(pio, 3); -+DEV_CLK(mck, pio3, pba, 13); -+ -+static struct resource pio4_resource[] = { -+ PBMEM(0xffe03800), -+ IRQ(17), -+}; -+DEFINE_DEV(pio, 4); -+DEV_CLK(mck, pio4, pba, 14); -+ -+void __init at32_add_system_devices(void) -+{ -+ platform_device_register(&at32_pm0_device); -+ platform_device_register(&at32_intc0_device); -+ platform_device_register(&at32ap700x_rtc0_device); -+ platform_device_register(&at32_wdt0_device); -+ platform_device_register(&at32_eic0_device); -+ platform_device_register(&smc0_device); -+ platform_device_register(&pdc_device); -+ platform_device_register(&dmaca0_device); -+ -+ platform_device_register(&at32_systc0_device); -+ -+ platform_device_register(&pio0_device); -+ platform_device_register(&pio1_device); -+ platform_device_register(&pio2_device); -+ platform_device_register(&pio3_device); -+ platform_device_register(&pio4_device); -+} -+ -+/* -------------------------------------------------------------------- -+ * USART -+ * -------------------------------------------------------------------- */ -+ -+static struct atmel_uart_data atmel_usart0_data = { -+ .use_dma_tx = 1, -+ .use_dma_rx = 1, -+}; -+static struct resource atmel_usart0_resource[] = { -+ PBMEM(0xffe00c00), -+ IRQ(6), -+}; -+DEFINE_DEV_DATA(atmel_usart, 0); -+DEV_CLK(usart, atmel_usart0, pba, 3); -+ -+static struct atmel_uart_data atmel_usart1_data = { -+ .use_dma_tx = 1, -+ .use_dma_rx = 1, -+}; -+static struct resource atmel_usart1_resource[] = { -+ PBMEM(0xffe01000), -+ IRQ(7), -+}; -+DEFINE_DEV_DATA(atmel_usart, 1); -+DEV_CLK(usart, atmel_usart1, pba, 4); -+ -+static struct atmel_uart_data atmel_usart2_data = { -+ .use_dma_tx = 1, -+ .use_dma_rx = 1, -+}; -+static struct resource atmel_usart2_resource[] = { -+ PBMEM(0xffe01400), -+ IRQ(8), -+}; -+DEFINE_DEV_DATA(atmel_usart, 2); -+DEV_CLK(usart, atmel_usart2, pba, 5); -+ -+static struct atmel_uart_data atmel_usart3_data = { -+ .use_dma_tx = 1, -+ .use_dma_rx = 1, -+}; -+static struct resource atmel_usart3_resource[] = { -+ PBMEM(0xffe01800), -+ IRQ(9), -+}; -+DEFINE_DEV_DATA(atmel_usart, 3); -+DEV_CLK(usart, atmel_usart3, pba, 6); -+ -+static inline void configure_usart0_pins(void) -+{ -+ select_peripheral(PA(8), PERIPH_B, 0); /* RXD */ -+ select_peripheral(PA(9), PERIPH_B, 0); /* TXD */ -+} -+ -+static inline void configure_usart1_pins(void) -+{ -+ select_peripheral(PA(17), PERIPH_A, 0); /* RXD */ -+ select_peripheral(PA(18), PERIPH_A, 0); /* TXD */ -+} -+ -+static inline void configure_usart2_pins(void) -+{ -+ select_peripheral(PB(26), PERIPH_B, 0); /* RXD */ -+ select_peripheral(PB(27), PERIPH_B, 0); /* TXD */ -+} -+ -+static inline void configure_usart3_pins(void) -+{ -+ select_peripheral(PB(18), PERIPH_B, 0); /* RXD */ -+ select_peripheral(PB(17), PERIPH_B, 0); /* TXD */ -+} -+ -+static struct platform_device *__initdata at32_usarts[4]; -+ -+void __init at32_map_usart(unsigned int hw_id, unsigned int line) -+{ -+ struct platform_device *pdev; -+ -+ switch (hw_id) { -+ case 0: -+ pdev = &atmel_usart0_device; -+ configure_usart0_pins(); -+ break; -+ case 1: -+ pdev = &atmel_usart1_device; -+ configure_usart1_pins(); -+ break; -+ case 2: -+ pdev = &atmel_usart2_device; -+ configure_usart2_pins(); -+ break; -+ case 3: -+ pdev = &atmel_usart3_device; -+ configure_usart3_pins(); -+ break; -+ default: -+ return; -+ } -+ -+ if (PXSEG(pdev->resource[0].start) == P4SEG) { -+ /* Addresses in the P4 segment are permanently mapped 1:1 */ -+ struct atmel_uart_data *data = pdev->dev.platform_data; -+ data->regs = (void __iomem *)pdev->resource[0].start; -+ } -+ -+ pdev->id = line; -+ at32_usarts[line] = pdev; -+} -+ -+struct platform_device *__init at32_add_device_usart(unsigned int id) -+{ -+ platform_device_register(at32_usarts[id]); -+ return at32_usarts[id]; -+} -+ -+struct platform_device *atmel_default_console_device; -+ -+void __init at32_setup_serial_console(unsigned int usart_id) -+{ -+ atmel_default_console_device = at32_usarts[usart_id]; -+} -+ -+/* -------------------------------------------------------------------- -+ * Ethernet -+ * -------------------------------------------------------------------- */ -+ -+#ifdef CONFIG_CPU_AT32AP7000 -+static struct eth_platform_data macb0_data; -+static struct resource macb0_resource[] = { -+ PBMEM(0xfff01800), -+ IRQ(25), -+}; -+DEFINE_DEV_DATA(macb, 0); -+DEV_CLK(hclk, macb0, hsb, 8); -+DEV_CLK(pclk, macb0, pbb, 6); -+ -+static struct eth_platform_data macb1_data; -+static struct resource macb1_resource[] = { -+ PBMEM(0xfff01c00), -+ IRQ(26), -+}; -+DEFINE_DEV_DATA(macb, 1); -+DEV_CLK(hclk, macb1, hsb, 9); -+DEV_CLK(pclk, macb1, pbb, 7); -+ -+struct platform_device *__init -+at32_add_device_eth(unsigned int id, struct eth_platform_data *data) -+{ -+ struct platform_device *pdev; -+ -+ switch (id) { -+ case 0: -+ pdev = &macb0_device; -+ -+ select_peripheral(PC(3), PERIPH_A, 0); /* TXD0 */ -+ select_peripheral(PC(4), PERIPH_A, 0); /* TXD1 */ -+ select_peripheral(PC(7), PERIPH_A, 0); /* TXEN */ -+ select_peripheral(PC(8), PERIPH_A, 0); /* TXCK */ -+ select_peripheral(PC(9), PERIPH_A, 0); /* RXD0 */ -+ select_peripheral(PC(10), PERIPH_A, 0); /* RXD1 */ -+ select_peripheral(PC(13), PERIPH_A, 0); /* RXER */ -+ select_peripheral(PC(15), PERIPH_A, 0); /* RXDV */ -+ select_peripheral(PC(16), PERIPH_A, 0); /* MDC */ -+ select_peripheral(PC(17), PERIPH_A, 0); /* MDIO */ -+ -+ if (!data->is_rmii) { -+ select_peripheral(PC(0), PERIPH_A, 0); /* COL */ -+ select_peripheral(PC(1), PERIPH_A, 0); /* CRS */ -+ select_peripheral(PC(2), PERIPH_A, 0); /* TXER */ -+ select_peripheral(PC(5), PERIPH_A, 0); /* TXD2 */ -+ select_peripheral(PC(6), PERIPH_A, 0); /* TXD3 */ -+ select_peripheral(PC(11), PERIPH_A, 0); /* RXD2 */ -+ select_peripheral(PC(12), PERIPH_A, 0); /* RXD3 */ -+ select_peripheral(PC(14), PERIPH_A, 0); /* RXCK */ -+ select_peripheral(PC(18), PERIPH_A, 0); /* SPD */ -+ } -+ break; -+ -+ case 1: -+ pdev = &macb1_device; -+ -+ select_peripheral(PD(13), PERIPH_B, 0); /* TXD0 */ -+ select_peripheral(PD(14), PERIPH_B, 0); /* TXD1 */ -+ select_peripheral(PD(11), PERIPH_B, 0); /* TXEN */ -+ select_peripheral(PD(12), PERIPH_B, 0); /* TXCK */ -+ select_peripheral(PD(10), PERIPH_B, 0); /* RXD0 */ -+ select_peripheral(PD(6), PERIPH_B, 0); /* RXD1 */ -+ select_peripheral(PD(5), PERIPH_B, 0); /* RXER */ -+ select_peripheral(PD(4), PERIPH_B, 0); /* RXDV */ -+ select_peripheral(PD(3), PERIPH_B, 0); /* MDC */ -+ select_peripheral(PD(2), PERIPH_B, 0); /* MDIO */ -+ -+ if (!data->is_rmii) { -+ select_peripheral(PC(19), PERIPH_B, 0); /* COL */ -+ select_peripheral(PC(23), PERIPH_B, 0); /* CRS */ -+ select_peripheral(PC(26), PERIPH_B, 0); /* TXER */ -+ select_peripheral(PC(27), PERIPH_B, 0); /* TXD2 */ -+ select_peripheral(PC(28), PERIPH_B, 0); /* TXD3 */ -+ select_peripheral(PC(29), PERIPH_B, 0); /* RXD2 */ -+ select_peripheral(PC(30), PERIPH_B, 0); /* RXD3 */ -+ select_peripheral(PC(24), PERIPH_B, 0); /* RXCK */ -+ select_peripheral(PD(15), PERIPH_B, 0); /* SPD */ -+ } -+ break; -+ -+ default: -+ return NULL; -+ } -+ -+ memcpy(pdev->dev.platform_data, data, sizeof(struct eth_platform_data)); -+ platform_device_register(pdev); -+ -+ return pdev; -+} -+#endif -+ -+/* -------------------------------------------------------------------- -+ * SPI -+ * -------------------------------------------------------------------- */ -+static struct resource atmel_spi0_resource[] = { -+ PBMEM(0xffe00000), -+ IRQ(3), -+}; -+DEFINE_DEV(atmel_spi, 0); -+DEV_CLK(spi_clk, atmel_spi0, pba, 0); -+ -+static struct resource atmel_spi1_resource[] = { -+ PBMEM(0xffe00400), -+ IRQ(4), -+}; -+DEFINE_DEV(atmel_spi, 1); -+DEV_CLK(spi_clk, atmel_spi1, pba, 1); -+ -+static void __init -+at32_spi_setup_slaves(unsigned int bus_num, struct spi_board_info *b, -+ unsigned int n, const u8 *pins) -+{ -+ unsigned int pin, mode; -+ -+ for (; n; n--, b++) { -+ b->bus_num = bus_num; -+ if (b->chip_select >= 4) -+ continue; -+ pin = (unsigned)b->controller_data; -+ if (!pin) { -+ pin = pins[b->chip_select]; -+ b->controller_data = (void *)pin; -+ } -+ mode = AT32_GPIOF_OUTPUT; -+ if (!(b->mode & SPI_CS_HIGH)) -+ mode |= AT32_GPIOF_HIGH; -+ at32_select_gpio(pin, mode); -+ } -+} -+ -+struct platform_device *__init -+at32_add_device_spi(unsigned int id, struct spi_board_info *b, unsigned int n) -+{ -+ /* -+ * Manage the chipselects as GPIOs, normally using the same pins -+ * the SPI controller expects; but boards can use other pins. -+ */ -+ static u8 __initdata spi0_pins[] = -+ { GPIO_PIN_PA(3), GPIO_PIN_PA(4), -+ GPIO_PIN_PA(5), GPIO_PIN_PA(20), }; -+ static u8 __initdata spi1_pins[] = -+ { GPIO_PIN_PB(2), GPIO_PIN_PB(3), -+ GPIO_PIN_PB(4), GPIO_PIN_PA(27), }; -+ struct platform_device *pdev; -+ -+ switch (id) { -+ case 0: -+ pdev = &atmel_spi0_device; -+ select_peripheral(PA(0), PERIPH_A, 0); /* MISO */ -+ select_peripheral(PA(1), PERIPH_A, 0); /* MOSI */ -+ select_peripheral(PA(2), PERIPH_A, 0); /* SCK */ -+ at32_spi_setup_slaves(0, b, n, spi0_pins); -+ break; -+ -+ case 1: -+ pdev = &atmel_spi1_device; -+ select_peripheral(PB(0), PERIPH_B, 0); /* MISO */ -+ select_peripheral(PB(1), PERIPH_B, 0); /* MOSI */ -+ select_peripheral(PB(5), PERIPH_B, 0); /* SCK */ -+ at32_spi_setup_slaves(1, b, n, spi1_pins); -+ break; -+ -+ default: -+ return NULL; -+ } -+ -+ spi_register_board_info(b, n); -+ platform_device_register(pdev); -+ return pdev; -+} -+ -+/* -------------------------------------------------------------------- -+ * TWI -+ * -------------------------------------------------------------------- */ -+static struct resource atmel_twi0_resource[] __initdata = { -+ PBMEM(0xffe00800), -+ IRQ(5), -+}; -+static struct clk atmel_twi0_pclk = { -+ .name = "twi_pclk", -+ .parent = &pba_clk, -+ .mode = pba_clk_mode, -+ .get_rate = pba_clk_get_rate, -+ .index = 2, -+}; -+ -+struct platform_device *__init at32_add_device_twi(unsigned int id) -+{ -+ struct platform_device *pdev; -+ -+ if (id != 0) -+ return NULL; -+ -+ pdev = platform_device_alloc("atmel_twi", id); -+ if (!pdev) -+ return NULL; -+ -+ if (platform_device_add_resources(pdev, atmel_twi0_resource, -+ ARRAY_SIZE(atmel_twi0_resource))) -+ goto err_add_resources; -+ -+ select_peripheral(PA(6), PERIPH_A, 0); /* SDA */ -+ select_peripheral(PA(7), PERIPH_A, 0); /* SDL */ -+ -+ atmel_twi0_pclk.dev = &pdev->dev; -+ -+ platform_device_add(pdev); -+ return pdev; -+ -+err_add_resources: -+ platform_device_put(pdev); -+ return NULL; -+} -+ -+/* -------------------------------------------------------------------- -+ * MMC -+ * -------------------------------------------------------------------- */ -+static struct resource atmel_mci0_resource[] __initdata = { -+ PBMEM(0xfff02400), -+ IRQ(28), -+}; -+static struct clk atmel_mci0_pclk = { -+ .name = "mci_clk", -+ .parent = &pbb_clk, -+ .mode = pbb_clk_mode, -+ .get_rate = pbb_clk_get_rate, -+ .index = 9, -+}; -+ -+struct platform_device *__init -+at32_add_device_mci(unsigned int id, struct mci_platform_data *data) -+{ -+ struct platform_device *pdev; -+ -+ if (id != 0) -+ return NULL; -+ -+ pdev = platform_device_alloc("atmel_mci", id); -+ if (!pdev) -+ goto fail; -+ -+ if (platform_device_add_resources(pdev, atmel_mci0_resource, -+ ARRAY_SIZE(atmel_mci0_resource))) -+ goto fail; -+ -+ if (data && platform_device_add_data(pdev, data, -+ sizeof(struct mci_platform_data))) -+ goto fail; -+ -+ select_peripheral(PA(10), PERIPH_A, 0); /* CLK */ -+ select_peripheral(PA(11), PERIPH_A, 0); /* CMD */ -+ select_peripheral(PA(12), PERIPH_A, 0); /* DATA0 */ -+ select_peripheral(PA(13), PERIPH_A, 0); /* DATA1 */ -+ select_peripheral(PA(14), PERIPH_A, 0); /* DATA2 */ -+ select_peripheral(PA(15), PERIPH_A, 0); /* DATA3 */ -+ -+ if (data) { -+ if (data->detect_pin != GPIO_PIN_NONE) -+ at32_select_gpio(data->detect_pin, 0); -+ if (data->wp_pin != GPIO_PIN_NONE) -+ at32_select_gpio(data->wp_pin, 0); -+ } -+ -+ atmel_mci0_pclk.dev = &pdev->dev; -+ -+ platform_device_add(pdev); -+ return pdev; -+ -+fail: -+ platform_device_put(pdev); -+ return NULL; -+} -+ -+/* -------------------------------------------------------------------- -+ * LCDC -+ * -------------------------------------------------------------------- */ -+#if defined(CONFIG_CPU_AT32AP7000) || defined(CONFIG_CPU_AT32AP7002) -+static struct atmel_lcdfb_info atmel_lcdfb0_data; -+static struct resource atmel_lcdfb0_resource[] = { -+ { -+ .start = 0xff000000, -+ .end = 0xff000fff, -+ .flags = IORESOURCE_MEM, -+ }, -+ IRQ(1), -+ { -+ /* Placeholder for pre-allocated fb memory */ -+ .start = 0x00000000, -+ .end = 0x00000000, -+ .flags = 0, -+ }, -+}; -+DEFINE_DEV_DATA(atmel_lcdfb, 0); -+DEV_CLK(hck1, atmel_lcdfb0, hsb, 7); -+static struct clk atmel_lcdfb0_pixclk = { -+ .name = "lcdc_clk", -+ .dev = &atmel_lcdfb0_device.dev, -+ .mode = genclk_mode, -+ .get_rate = genclk_get_rate, -+ .set_rate = genclk_set_rate, -+ .set_parent = genclk_set_parent, -+ .index = 7, -+}; -+ -+struct platform_device *__init -+at32_add_device_lcdc(unsigned int id, struct atmel_lcdfb_info *data, -+ unsigned long fbmem_start, unsigned long fbmem_len) -+{ -+ struct platform_device *pdev; -+ struct atmel_lcdfb_info *info; -+ struct fb_monspecs *monspecs; -+ struct fb_videomode *modedb; -+ unsigned int modedb_size; -+ -+ /* -+ * Do a deep copy of the fb data, monspecs and modedb. Make -+ * sure all allocations are done before setting up the -+ * portmux. -+ */ -+ monspecs = kmemdup(data->default_monspecs, -+ sizeof(struct fb_monspecs), GFP_KERNEL); -+ if (!monspecs) -+ return NULL; -+ -+ modedb_size = sizeof(struct fb_videomode) * monspecs->modedb_len; -+ modedb = kmemdup(monspecs->modedb, modedb_size, GFP_KERNEL); -+ if (!modedb) -+ goto err_dup_modedb; -+ monspecs->modedb = modedb; -+ -+ switch (id) { -+ case 0: -+ pdev = &atmel_lcdfb0_device; -+ select_peripheral(PC(19), PERIPH_A, 0); /* CC */ -+ select_peripheral(PC(20), PERIPH_A, 0); /* HSYNC */ -+ select_peripheral(PC(21), PERIPH_A, 0); /* PCLK */ -+ select_peripheral(PC(22), PERIPH_A, 0); /* VSYNC */ -+ select_peripheral(PC(23), PERIPH_A, 0); /* DVAL */ -+ select_peripheral(PC(24), PERIPH_A, 0); /* MODE */ -+ select_peripheral(PC(25), PERIPH_A, 0); /* PWR */ -+ select_peripheral(PC(26), PERIPH_A, 0); /* DATA0 */ -+ select_peripheral(PC(27), PERIPH_A, 0); /* DATA1 */ -+ select_peripheral(PC(28), PERIPH_A, 0); /* DATA2 */ -+ select_peripheral(PC(29), PERIPH_A, 0); /* DATA3 */ -+ select_peripheral(PC(30), PERIPH_A, 0); /* DATA4 */ -+ select_peripheral(PC(31), PERIPH_A, 0); /* DATA5 */ -+ select_peripheral(PD(0), PERIPH_A, 0); /* DATA6 */ -+ select_peripheral(PD(1), PERIPH_A, 0); /* DATA7 */ -+ select_peripheral(PD(2), PERIPH_A, 0); /* DATA8 */ -+ select_peripheral(PD(3), PERIPH_A, 0); /* DATA9 */ -+ select_peripheral(PD(4), PERIPH_A, 0); /* DATA10 */ -+ select_peripheral(PD(5), PERIPH_A, 0); /* DATA11 */ -+ select_peripheral(PD(6), PERIPH_A, 0); /* DATA12 */ -+ select_peripheral(PD(7), PERIPH_A, 0); /* DATA13 */ -+ select_peripheral(PD(8), PERIPH_A, 0); /* DATA14 */ -+ select_peripheral(PD(9), PERIPH_A, 0); /* DATA15 */ -+ select_peripheral(PD(10), PERIPH_A, 0); /* DATA16 */ -+ select_peripheral(PD(11), PERIPH_A, 0); /* DATA17 */ -+ select_peripheral(PD(12), PERIPH_A, 0); /* DATA18 */ -+ select_peripheral(PD(13), PERIPH_A, 0); /* DATA19 */ -+ select_peripheral(PD(14), PERIPH_A, 0); /* DATA20 */ -+ select_peripheral(PD(15), PERIPH_A, 0); /* DATA21 */ -+ select_peripheral(PD(16), PERIPH_A, 0); /* DATA22 */ -+ select_peripheral(PD(17), PERIPH_A, 0); /* DATA23 */ -+ -+ clk_set_parent(&atmel_lcdfb0_pixclk, &pll0); -+ clk_set_rate(&atmel_lcdfb0_pixclk, clk_get_rate(&pll0)); -+ break; -+ -+ default: -+ goto err_invalid_id; -+ } -+ -+ if (fbmem_len) { -+ pdev->resource[2].start = fbmem_start; -+ pdev->resource[2].end = fbmem_start + fbmem_len - 1; -+ pdev->resource[2].flags = IORESOURCE_MEM; -+ } -+ -+ info = pdev->dev.platform_data; -+ memcpy(info, data, sizeof(struct atmel_lcdfb_info)); -+ info->default_monspecs = monspecs; -+ -+ platform_device_register(pdev); -+ return pdev; -+ -+err_invalid_id: -+ kfree(modedb); -+err_dup_modedb: -+ kfree(monspecs); -+ return NULL; -+} -+#endif -+ -+/* -------------------------------------------------------------------- -+ * PWM -+ * -------------------------------------------------------------------- */ -+static struct resource atmel_pwm0_resource[] __initdata = { -+ PBMEM(0xfff01400), -+ IRQ(24), -+}; -+static struct clk atmel_pwm0_mck = { -+ .name = "mck", -+ .parent = &pbb_clk, -+ .mode = pbb_clk_mode, -+ .get_rate = pbb_clk_get_rate, -+ .index = 5, -+}; -+ -+struct platform_device *__init at32_add_device_pwm(u32 mask) -+{ -+ struct platform_device *pdev; -+ -+ if (!mask) -+ return NULL; -+ -+ pdev = platform_device_alloc("atmel_pwm", 0); -+ if (!pdev) -+ return NULL; -+ -+ if (platform_device_add_resources(pdev, atmel_pwm0_resource, -+ ARRAY_SIZE(atmel_pwm0_resource))) -+ goto out_free_pdev; -+ -+ if (platform_device_add_data(pdev, &mask, sizeof(mask))) -+ goto out_free_pdev; -+ -+ if (mask & (1 << 0)) -+ select_peripheral(PA(28), PERIPH_A, 0); -+ if (mask & (1 << 1)) -+ select_peripheral(PA(29), PERIPH_A, 0); -+ if (mask & (1 << 2)) -+ select_peripheral(PA(21), PERIPH_B, 0); -+ if (mask & (1 << 3)) -+ select_peripheral(PA(22), PERIPH_B, 0); -+ -+ atmel_pwm0_mck.dev = &pdev->dev; -+ -+ platform_device_add(pdev); -+ -+ return pdev; -+ -+out_free_pdev: -+ platform_device_put(pdev); -+ return NULL; -+} -+ -+/* -------------------------------------------------------------------- -+ * SSC -+ * -------------------------------------------------------------------- */ -+static struct resource ssc0_resource[] = { -+ PBMEM(0xffe01c00), -+ IRQ(10), -+}; -+DEFINE_DEV(ssc, 0); -+DEV_CLK(pclk, ssc0, pba, 7); -+ -+static struct resource ssc1_resource[] = { -+ PBMEM(0xffe02000), -+ IRQ(11), -+}; -+DEFINE_DEV(ssc, 1); -+DEV_CLK(pclk, ssc1, pba, 8); -+ -+static struct resource ssc2_resource[] = { -+ PBMEM(0xffe02400), -+ IRQ(12), -+}; -+DEFINE_DEV(ssc, 2); -+DEV_CLK(pclk, ssc2, pba, 9); -+ -+struct platform_device *__init -+at32_add_device_ssc(unsigned int id, unsigned int flags) -+{ -+ struct platform_device *pdev; -+ -+ switch (id) { -+ case 0: -+ pdev = &ssc0_device; -+ if (flags & ATMEL_SSC_RF) -+ select_peripheral(PA(21), PERIPH_A, 0); /* RF */ -+ if (flags & ATMEL_SSC_RK) -+ select_peripheral(PA(22), PERIPH_A, 0); /* RK */ -+ if (flags & ATMEL_SSC_TK) -+ select_peripheral(PA(23), PERIPH_A, 0); /* TK */ -+ if (flags & ATMEL_SSC_TF) -+ select_peripheral(PA(24), PERIPH_A, 0); /* TF */ -+ if (flags & ATMEL_SSC_TD) -+ select_peripheral(PA(25), PERIPH_A, 0); /* TD */ -+ if (flags & ATMEL_SSC_RD) -+ select_peripheral(PA(26), PERIPH_A, 0); /* RD */ -+ break; -+ case 1: -+ pdev = &ssc1_device; -+ if (flags & ATMEL_SSC_RF) -+ select_peripheral(PA(0), PERIPH_B, 0); /* RF */ -+ if (flags & ATMEL_SSC_RK) -+ select_peripheral(PA(1), PERIPH_B, 0); /* RK */ -+ if (flags & ATMEL_SSC_TK) -+ select_peripheral(PA(2), PERIPH_B, 0); /* TK */ -+ if (flags & ATMEL_SSC_TF) -+ select_peripheral(PA(3), PERIPH_B, 0); /* TF */ -+ if (flags & ATMEL_SSC_TD) -+ select_peripheral(PA(4), PERIPH_B, 0); /* TD */ -+ if (flags & ATMEL_SSC_RD) -+ select_peripheral(PA(5), PERIPH_B, 0); /* RD */ -+ break; -+ case 2: -+ pdev = &ssc2_device; -+ if (flags & ATMEL_SSC_TD) -+ select_peripheral(PB(13), PERIPH_A, 0); /* TD */ -+ if (flags & ATMEL_SSC_RD) -+ select_peripheral(PB(14), PERIPH_A, 0); /* RD */ -+ if (flags & ATMEL_SSC_TK) -+ select_peripheral(PB(15), PERIPH_A, 0); /* TK */ -+ if (flags & ATMEL_SSC_TF) -+ select_peripheral(PB(16), PERIPH_A, 0); /* TF */ -+ if (flags & ATMEL_SSC_RF) -+ select_peripheral(PB(17), PERIPH_A, 0); /* RF */ -+ if (flags & ATMEL_SSC_RK) -+ select_peripheral(PB(18), PERIPH_A, 0); /* RK */ -+ break; -+ default: -+ return NULL; -+ } -+ -+ platform_device_register(pdev); -+ return pdev; -+} -+ -+/* -------------------------------------------------------------------- -+ * USB Device Controller -+ * -------------------------------------------------------------------- */ -+static struct resource usba0_resource[] __initdata = { -+ { -+ .start = 0xff300000, -+ .end = 0xff3fffff, -+ .flags = IORESOURCE_MEM, -+ }, { -+ .start = 0xfff03000, -+ .end = 0xfff033ff, -+ .flags = IORESOURCE_MEM, -+ }, -+ IRQ(31), -+}; -+static struct clk usba0_pclk = { -+ .name = "pclk", -+ .parent = &pbb_clk, -+ .mode = pbb_clk_mode, -+ .get_rate = pbb_clk_get_rate, -+ .index = 12, -+}; -+static struct clk usba0_hclk = { -+ .name = "hclk", -+ .parent = &hsb_clk, -+ .mode = hsb_clk_mode, -+ .get_rate = hsb_clk_get_rate, -+ .index = 6, -+}; -+ -+struct platform_device *__init -+at32_add_device_usba(unsigned int id, struct usba_platform_data *data) -+{ -+ struct platform_device *pdev; -+ -+ if (id != 0) -+ return NULL; -+ -+ pdev = platform_device_alloc("atmel_usba_udc", 0); -+ if (!pdev) -+ return NULL; -+ -+ if (platform_device_add_resources(pdev, usba0_resource, -+ ARRAY_SIZE(usba0_resource))) -+ goto out_free_pdev; -+ -+ if (data) { -+ if (platform_device_add_data(pdev, data, sizeof(*data))) -+ goto out_free_pdev; -+ -+ if (data->vbus_pin != GPIO_PIN_NONE) -+ at32_select_gpio(data->vbus_pin, 0); -+ } -+ -+ usba0_pclk.dev = &pdev->dev; -+ usba0_hclk.dev = &pdev->dev; -+ -+ platform_device_add(pdev); -+ -+ return pdev; -+ -+out_free_pdev: -+ platform_device_put(pdev); -+ return NULL; -+} -+ -+/* -------------------------------------------------------------------- -+ * IDE / CompactFlash -+ * -------------------------------------------------------------------- */ -+#if defined(CONFIG_CPU_AT32AP7000) || defined(CONFIG_CPU_AT32AP7001) -+static struct resource at32_smc_cs4_resource[] __initdata = { -+ { -+ .start = 0x04000000, -+ .end = 0x07ffffff, -+ .flags = IORESOURCE_MEM, -+ }, -+ IRQ(~0UL), /* Magic IRQ will be overridden */ -+}; -+static struct resource at32_smc_cs5_resource[] __initdata = { -+ { -+ .start = 0x20000000, -+ .end = 0x23ffffff, -+ .flags = IORESOURCE_MEM, -+ }, -+ IRQ(~0UL), /* Magic IRQ will be overridden */ -+}; -+ -+static int __init at32_init_ide_or_cf(struct platform_device *pdev, -+ unsigned int cs, unsigned int extint) -+{ -+ static unsigned int extint_pin_map[4] __initdata = { -+ GPIO_PIN_PB(25), -+ GPIO_PIN_PB(26), -+ GPIO_PIN_PB(27), -+ GPIO_PIN_PB(28), -+ }; -+ static bool common_pins_initialized __initdata = false; -+ unsigned int extint_pin; -+ int ret; -+ -+ if (extint >= ARRAY_SIZE(extint_pin_map)) -+ return -EINVAL; -+ extint_pin = extint_pin_map[extint]; -+ -+ switch (cs) { -+ case 4: -+ ret = platform_device_add_resources(pdev, -+ at32_smc_cs4_resource, -+ ARRAY_SIZE(at32_smc_cs4_resource)); -+ if (ret) -+ return ret; -+ -+ select_peripheral(PE(21), PERIPH_A, 0); /* NCS4 -> OE_N */ -+ set_ebi_sfr_bits(HMATRIX_BIT(CS4A)); -+ break; -+ case 5: -+ ret = platform_device_add_resources(pdev, -+ at32_smc_cs5_resource, -+ ARRAY_SIZE(at32_smc_cs5_resource)); -+ if (ret) -+ return ret; -+ -+ select_peripheral(PE(22), PERIPH_A, 0); /* NCS5 -> OE_N */ -+ set_ebi_sfr_bits(HMATRIX_BIT(CS5A)); -+ break; -+ default: -+ return -EINVAL; -+ } -+ -+ if (!common_pins_initialized) { -+ select_peripheral(PE(19), PERIPH_A, 0); /* CFCE1 -> CS0_N */ -+ select_peripheral(PE(20), PERIPH_A, 0); /* CFCE2 -> CS1_N */ -+ select_peripheral(PE(23), PERIPH_A, 0); /* CFRNW -> DIR */ -+ select_peripheral(PE(24), PERIPH_A, 0); /* NWAIT <- IORDY */ -+ common_pins_initialized = true; -+ } -+ -+ at32_select_periph(extint_pin, GPIO_PERIPH_A, AT32_GPIOF_DEGLITCH); -+ -+ pdev->resource[1].start = EIM_IRQ_BASE + extint; -+ pdev->resource[1].end = pdev->resource[1].start; -+ -+ return 0; -+} -+ -+struct platform_device *__init -+at32_add_device_ide(unsigned int id, unsigned int extint, -+ struct ide_platform_data *data) -+{ -+ struct platform_device *pdev; -+ -+ pdev = platform_device_alloc("at32_ide", id); -+ if (!pdev) -+ goto fail; -+ -+ if (platform_device_add_data(pdev, data, -+ sizeof(struct ide_platform_data))) -+ goto fail; -+ -+ if (at32_init_ide_or_cf(pdev, data->cs, extint)) -+ goto fail; -+ -+ platform_device_add(pdev); -+ return pdev; -+ -+fail: -+ platform_device_put(pdev); -+ return NULL; -+} -+ -+struct platform_device *__init -+at32_add_device_cf(unsigned int id, unsigned int extint, -+ struct cf_platform_data *data) -+{ -+ struct platform_device *pdev; -+ -+ pdev = platform_device_alloc("at32_cf", id); -+ if (!pdev) -+ goto fail; -+ -+ if (platform_device_add_data(pdev, data, -+ sizeof(struct cf_platform_data))) -+ goto fail; -+ -+ if (at32_init_ide_or_cf(pdev, data->cs, extint)) -+ goto fail; -+ -+ if (data->detect_pin != GPIO_PIN_NONE) -+ at32_select_gpio(data->detect_pin, AT32_GPIOF_DEGLITCH); -+ if (data->reset_pin != GPIO_PIN_NONE) -+ at32_select_gpio(data->reset_pin, 0); -+ if (data->vcc_pin != GPIO_PIN_NONE) -+ at32_select_gpio(data->vcc_pin, 0); -+ /* READY is used as extint, so we can't select it as gpio */ -+ -+ platform_device_add(pdev); -+ return pdev; -+ -+fail: -+ platform_device_put(pdev); -+ return NULL; -+} -+#endif -+ -+/* -------------------------------------------------------------------- -+ * AC97C -+ * -------------------------------------------------------------------- */ -+static struct resource atmel_ac97c0_resource[] __initdata = { -+ PBMEM(0xfff02800), -+ IRQ(29), -+}; -+static struct clk atmel_ac97c0_pclk = { -+ .name = "pclk", -+ .parent = &pbb_clk, -+ .mode = pbb_clk_mode, -+ .get_rate = pbb_clk_get_rate, -+ .index = 10, -+}; -+ -+struct platform_device *__init at32_add_device_ac97c(unsigned int id) -+{ -+ struct platform_device *pdev; -+ -+ if (id != 0) -+ return NULL; -+ -+ pdev = platform_device_alloc("atmel_ac97c", id); -+ if (!pdev) -+ return NULL; -+ -+ if (platform_device_add_resources(pdev, atmel_ac97c0_resource, -+ ARRAY_SIZE(atmel_ac97c0_resource))) -+ goto err_add_resources; -+ -+ select_peripheral(PB(20), PERIPH_B, 0); /* SYNC */ -+ select_peripheral(PB(21), PERIPH_B, 0); /* SDO */ -+ select_peripheral(PB(22), PERIPH_B, 0); /* SDI */ -+ select_peripheral(PB(23), PERIPH_B, 0); /* SCLK */ -+ -+ atmel_ac97c0_pclk.dev = &pdev->dev; -+ -+ platform_device_add(pdev); -+ return pdev; -+ -+err_add_resources: -+ platform_device_put(pdev); -+ return NULL; -+} -+ -+/* -------------------------------------------------------------------- -+ * ABDAC -+ * -------------------------------------------------------------------- */ -+static struct resource abdac0_resource[] __initdata = { -+ PBMEM(0xfff02000), -+ IRQ(27), -+}; -+static struct clk abdac0_pclk = { -+ .name = "pclk", -+ .parent = &pbb_clk, -+ .mode = pbb_clk_mode, -+ .get_rate = pbb_clk_get_rate, -+ .index = 8, -+}; -+static struct clk abdac0_sample_clk = { -+ .name = "sample_clk", -+ .mode = genclk_mode, -+ .get_rate = genclk_get_rate, -+ .set_rate = genclk_set_rate, -+ .set_parent = genclk_set_parent, -+ .index = 6, -+}; -+ -+struct platform_device *__init at32_add_device_abdac(unsigned int id) -+{ -+ struct platform_device *pdev; -+ -+ if (id != 0) -+ return NULL; -+ -+ pdev = platform_device_alloc("abdac", id); -+ if (!pdev) -+ return NULL; -+ -+ if (platform_device_add_resources(pdev, abdac0_resource, -+ ARRAY_SIZE(abdac0_resource))) -+ goto err_add_resources; -+ -+ select_peripheral(PB(20), PERIPH_A, 0); /* DATA1 */ -+ select_peripheral(PB(21), PERIPH_A, 0); /* DATA0 */ -+ select_peripheral(PB(22), PERIPH_A, 0); /* DATAN1 */ -+ select_peripheral(PB(23), PERIPH_A, 0); /* DATAN0 */ -+ -+ abdac0_pclk.dev = &pdev->dev; -+ abdac0_sample_clk.dev = &pdev->dev; -+ -+ platform_device_add(pdev); -+ return pdev; -+ -+err_add_resources: -+ platform_device_put(pdev); -+ return NULL; -+} -+ -+/* -------------------------------------------------------------------- -+ * GCLK -+ * -------------------------------------------------------------------- */ -+static struct clk gclk0 = { -+ .name = "gclk0", -+ .mode = genclk_mode, -+ .get_rate = genclk_get_rate, -+ .set_rate = genclk_set_rate, -+ .set_parent = genclk_set_parent, -+ .index = 0, -+}; -+static struct clk gclk1 = { -+ .name = "gclk1", -+ .mode = genclk_mode, -+ .get_rate = genclk_get_rate, -+ .set_rate = genclk_set_rate, -+ .set_parent = genclk_set_parent, -+ .index = 1, -+}; -+static struct clk gclk2 = { -+ .name = "gclk2", -+ .mode = genclk_mode, -+ .get_rate = genclk_get_rate, -+ .set_rate = genclk_set_rate, -+ .set_parent = genclk_set_parent, -+ .index = 2, -+}; -+static struct clk gclk3 = { -+ .name = "gclk3", -+ .mode = genclk_mode, -+ .get_rate = genclk_get_rate, -+ .set_rate = genclk_set_rate, -+ .set_parent = genclk_set_parent, -+ .index = 3, -+}; -+static struct clk gclk4 = { -+ .name = "gclk4", -+ .mode = genclk_mode, -+ .get_rate = genclk_get_rate, -+ .set_rate = genclk_set_rate, -+ .set_parent = genclk_set_parent, -+ .index = 4, -+}; -+ -+struct clk *at32_clock_list[] = { -+ &osc32k, -+ &osc0, -+ &osc1, -+ &pll0, -+ &pll1, -+ &cpu_clk, -+ &hsb_clk, -+ &pba_clk, -+ &pbb_clk, -+ &at32_pm_pclk, -+ &at32_intc0_pclk, -+ &hmatrix_clk, -+ &ebi_clk, -+ &hramc_clk, -+ &smc0_pclk, -+ &smc0_mck, -+ &pdc_hclk, -+ &pdc_pclk, -+ &dmaca0_hclk, -+ &pico_clk, -+ &pio0_mck, -+ &pio1_mck, -+ &pio2_mck, -+ &pio3_mck, -+ &pio4_mck, -+ &at32_systc0_pclk, -+ &atmel_usart0_usart, -+ &atmel_usart1_usart, -+ &atmel_usart2_usart, -+ &atmel_usart3_usart, -+ &atmel_pwm0_mck, -+#if defined(CONFIG_CPU_AT32AP7000) -+ &macb0_hclk, -+ &macb0_pclk, -+ &macb1_hclk, -+ &macb1_pclk, -+#endif -+ &atmel_spi0_spi_clk, -+ &atmel_spi1_spi_clk, -+ &atmel_twi0_pclk, -+ &atmel_mci0_pclk, -+#if defined(CONFIG_CPU_AT32AP7000) || defined(CONFIG_CPU_AT32AP7002) -+ &atmel_lcdfb0_hck1, -+ &atmel_lcdfb0_pixclk, -+#endif -+ &ssc0_pclk, -+ &ssc1_pclk, -+ &ssc2_pclk, -+ &usba0_hclk, -+ &usba0_pclk, -+ &atmel_ac97c0_pclk, -+ &abdac0_pclk, -+ &abdac0_sample_clk, -+ &gclk0, -+ &gclk1, -+ &gclk2, -+ &gclk3, -+ &gclk4, -+}; -+unsigned int at32_nr_clocks = ARRAY_SIZE(at32_clock_list); -+ -+void __init at32_portmux_init(void) -+{ -+ at32_init_pio(&pio0_device); -+ at32_init_pio(&pio1_device); -+ at32_init_pio(&pio2_device); -+ at32_init_pio(&pio3_device); -+ at32_init_pio(&pio4_device); -+} -+ -+void __init at32_clock_init(void) -+{ -+ u32 cpu_mask = 0, hsb_mask = 0, pba_mask = 0, pbb_mask = 0; -+ int i; -+ -+ if (pm_readl(MCCTRL) & PM_BIT(PLLSEL)) { -+ main_clock = &pll0; -+ cpu_clk.parent = &pll0; -+ } else { -+ main_clock = &osc0; -+ cpu_clk.parent = &osc0; -+ } -+ -+ if (pm_readl(PLL0) & PM_BIT(PLLOSC)) -+ pll0.parent = &osc1; -+ if (pm_readl(PLL1) & PM_BIT(PLLOSC)) -+ pll1.parent = &osc1; -+ -+ genclk_init_parent(&gclk0); -+ genclk_init_parent(&gclk1); -+ genclk_init_parent(&gclk2); -+ genclk_init_parent(&gclk3); -+ genclk_init_parent(&gclk4); -+#if defined(CONFIG_CPU_AT32AP7000) || defined(CONFIG_CPU_AT32AP7002) -+ genclk_init_parent(&atmel_lcdfb0_pixclk); -+#endif -+ genclk_init_parent(&abdac0_sample_clk); -+ -+ /* -+ * Turn on all clocks that have at least one user already, and -+ * turn off everything else. We only do this for module -+ * clocks, and even though it isn't particularly pretty to -+ * check the address of the mode function, it should do the -+ * trick... -+ */ -+ for (i = 0; i < ARRAY_SIZE(at32_clock_list); i++) { -+ struct clk *clk = at32_clock_list[i]; -+ -+ if (clk->users == 0) -+ continue; -+ -+ if (clk->mode == &cpu_clk_mode) -+ cpu_mask |= 1 << clk->index; -+ else if (clk->mode == &hsb_clk_mode) -+ hsb_mask |= 1 << clk->index; -+ else if (clk->mode == &pba_clk_mode) -+ pba_mask |= 1 << clk->index; -+ else if (clk->mode == &pbb_clk_mode) -+ pbb_mask |= 1 << clk->index; -+ } -+ -+ pm_writel(CPU_MASK, cpu_mask); -+ pm_writel(HSB_MASK, hsb_mask); -+ pm_writel(PBA_MASK, pba_mask); -+ pm_writel(PBB_MASK, pbb_mask); -+} -diff -Nrup linux-2.6.24/arch/avr32/mach-at32ap/extint.c linux-avr32/arch/avr32/mach-at32ap/extint.c ---- linux-2.6.24/arch/avr32/mach-at32ap/extint.c 2008-01-24 17:58:37.000000000 -0500 -+++ linux-avr32/arch/avr32/mach-at32ap/extint.c 2008-02-01 14:51:35.000000000 -0500 -@@ -26,16 +26,10 @@ - #define EIC_MODE 0x0014 - #define EIC_EDGE 0x0018 - #define EIC_LEVEL 0x001c --#define EIC_TEST 0x0020 - #define EIC_NMIC 0x0024 - --/* Bitfields in TEST */ --#define EIC_TESTEN_OFFSET 31 --#define EIC_TESTEN_SIZE 1 -- - /* Bitfields in NMIC */ --#define EIC_EN_OFFSET 0 --#define EIC_EN_SIZE 1 -+#define EIC_NMIC_ENABLE (1 << 0) - - /* Bit manipulation macros */ - #define EIC_BIT(name) \ -@@ -63,6 +57,9 @@ struct eic { - unsigned int first_irq; - }; - -+static struct eic *nmi_eic; -+static bool nmi_enabled; -+ - static void eic_ack_irq(unsigned int irq) - { - struct eic *eic = get_irq_chip_data(irq); -@@ -133,8 +130,11 @@ static int eic_set_irq_type(unsigned int - eic_writel(eic, EDGE, edge); - eic_writel(eic, LEVEL, level); - -- if (flow_type & (IRQ_TYPE_LEVEL_LOW | IRQ_TYPE_LEVEL_HIGH)) -+ if (flow_type & (IRQ_TYPE_LEVEL_LOW | IRQ_TYPE_LEVEL_HIGH)) { - flow_type |= IRQ_LEVEL; -+ __set_irq_handler_unlocked(irq, handle_level_irq); -+ } else -+ __set_irq_handler_unlocked(irq, handle_edge_irq); - desc->status &= ~(IRQ_TYPE_SENSE_MASK | IRQ_LEVEL); - desc->status |= flow_type; - } -@@ -154,9 +154,8 @@ static struct irq_chip eic_chip = { - static void demux_eic_irq(unsigned int irq, struct irq_desc *desc) - { - struct eic *eic = desc->handler_data; -- struct irq_desc *ext_desc; - unsigned long status, pending; -- unsigned int i, ext_irq; -+ unsigned int i; - - status = eic_readl(eic, ISR); - pending = status & eic_readl(eic, IMR); -@@ -165,15 +164,28 @@ static void demux_eic_irq(unsigned int i - i = fls(pending) - 1; - pending &= ~(1 << i); - -- ext_irq = i + eic->first_irq; -- ext_desc = irq_desc + ext_irq; -- if (ext_desc->status & IRQ_LEVEL) -- handle_level_irq(ext_irq, ext_desc); -- else -- handle_edge_irq(ext_irq, ext_desc); -+ generic_handle_irq(i + eic->first_irq); - } - } - -+int nmi_enable(void) -+{ -+ nmi_enabled = true; -+ -+ if (nmi_eic) -+ eic_writel(nmi_eic, NMIC, EIC_NMIC_ENABLE); -+ -+ return 0; -+} -+ -+void nmi_disable(void) -+{ -+ if (nmi_eic) -+ eic_writel(nmi_eic, NMIC, 0); -+ -+ nmi_enabled = false; -+} -+ - static int __init eic_probe(struct platform_device *pdev) - { - struct eic *eic; -@@ -214,14 +226,13 @@ static int __init eic_probe(struct platf - pattern = eic_readl(eic, MODE); - nr_irqs = fls(pattern); - -- /* Trigger on falling edge unless overridden by driver */ -- eic_writel(eic, MODE, 0UL); -+ /* Trigger on low level unless overridden by driver */ - eic_writel(eic, EDGE, 0UL); -+ eic_writel(eic, LEVEL, 0UL); - - eic->chip = &eic_chip; - - for (i = 0; i < nr_irqs; i++) { -- /* NOTE the handler we set here is ignored by the demux */ - set_irq_chip_and_handler(eic->first_irq + i, &eic_chip, - handle_level_irq); - set_irq_chip_data(eic->first_irq + i, eic); -@@ -230,6 +241,16 @@ static int __init eic_probe(struct platf - set_irq_chained_handler(int_irq, demux_eic_irq); - set_irq_data(int_irq, eic); - -+ if (pdev->id == 0) { -+ nmi_eic = eic; -+ if (nmi_enabled) -+ /* -+ * Someone tried to enable NMI before we were -+ * ready. Do it now. -+ */ -+ nmi_enable(); -+ } -+ - dev_info(&pdev->dev, - "External Interrupt Controller at 0x%p, IRQ %u\n", - eic->regs, int_irq); -diff -Nrup linux-2.6.24/arch/avr32/mach-at32ap/gpio-dev.c linux-avr32/arch/avr32/mach-at32ap/gpio-dev.c ---- linux-2.6.24/arch/avr32/mach-at32ap/gpio-dev.c 1969-12-31 19:00:00.000000000 -0500 -+++ linux-avr32/arch/avr32/mach-at32ap/gpio-dev.c 2008-02-01 14:51:35.000000000 -0500 -@@ -0,0 +1,573 @@ -+/* -+ * GPIO /dev and configfs interface -+ * -+ * Copyright (C) 2006-2007 Atmel Corporation -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 as -+ * published by the Free Software Foundation. -+ */ -+#include <linux/kernel.h> -+#include <linux/configfs.h> -+#include <linux/cdev.h> -+#include <linux/device.h> -+#include <linux/fs.h> -+#include <linux/interrupt.h> -+#include <linux/module.h> -+#include <linux/poll.h> -+#include <linux/uaccess.h> -+#include <linux/wait.h> -+ -+#include <asm/gpio.h> -+#include <asm/arch/portmux.h> -+ -+#define GPIO_DEV_MAX 8 -+ -+static struct class *gpio_dev_class; -+static dev_t gpio_devt; -+ -+struct gpio_item { -+ spinlock_t lock; -+ -+ int enabled; -+ int initialized; -+ int port; -+ u32 pin_mask; -+ u32 oe_mask; -+ -+ /* Pin state last time we read it (for blocking reads) */ -+ u32 pin_state; -+ int changed; -+ -+ wait_queue_head_t change_wq; -+ struct fasync_struct *async_queue; -+ -+ int id; -+ struct class_device *gpio_dev; -+ struct cdev char_dev; -+ struct config_item item; -+}; -+ -+struct gpio_attribute { -+ struct configfs_attribute attr; -+ ssize_t (*show)(struct gpio_item *, char *); -+ ssize_t (*store)(struct gpio_item *, const char *, size_t); -+}; -+ -+static irqreturn_t gpio_dev_interrupt(int irq, void *dev_id) -+{ -+ struct gpio_item *gpio = dev_id; -+ u32 old_state, new_state; -+ -+ old_state = gpio->pin_state; -+ new_state = at32_gpio_get_value_multiple(gpio->port, gpio->pin_mask); -+ gpio->pin_state = new_state; -+ -+ if (new_state != old_state) { -+ gpio->changed = 1; -+ wake_up_interruptible(&gpio->change_wq); -+ -+ if (gpio->async_queue) -+ kill_fasync(&gpio->async_queue, SIGIO, POLL_IN); -+ } -+ -+ return IRQ_HANDLED; -+} -+ -+static int gpio_dev_open(struct inode *inode, struct file *file) -+{ -+ struct gpio_item *gpio = container_of(inode->i_cdev, -+ struct gpio_item, -+ char_dev); -+ unsigned int irq; -+ unsigned int i; -+ int ret; -+ -+ nonseekable_open(inode, file); -+ config_item_get(&gpio->item); -+ file->private_data = gpio; -+ -+ gpio->pin_state = at32_gpio_get_value_multiple(gpio->port, -+ gpio->pin_mask); -+ gpio->changed = 1; -+ -+ for (i = 0; i < 32; i++) { -+ if (gpio->pin_mask & (1 << i)) { -+ irq = gpio_to_irq(32 * gpio->port + i); -+ ret = request_irq(irq, gpio_dev_interrupt, 0, -+ "gpio-dev", gpio); -+ if (ret) -+ goto err_irq; -+ } -+ } -+ -+ return 0; -+ -+err_irq: -+ while (i--) { -+ if (gpio->pin_mask & (1 << i)) { -+ irq = gpio_to_irq(32 * gpio->port + i); -+ free_irq(irq, gpio); -+ } -+ } -+ -+ config_item_put(&gpio->item); -+ -+ return ret; -+} -+ -+static int gpio_dev_fasync(int fd, struct file *file, int mode) -+{ -+ struct gpio_item *gpio = file->private_data; -+ -+ return fasync_helper(fd, file, mode, &gpio->async_queue); -+} -+ -+static int gpio_dev_release(struct inode *inode, struct file *file) -+{ -+ struct gpio_item *gpio = file->private_data; -+ unsigned int irq; -+ unsigned int i; -+ -+ gpio_dev_fasync(-1, file, 0); -+ -+ for (i = 0; i < 32; i++) { -+ if (gpio->pin_mask & (1 << i)) { -+ irq = gpio_to_irq(32 * gpio->port + i); -+ free_irq(irq, gpio); -+ } -+ } -+ -+ config_item_put(&gpio->item); -+ -+ return 0; -+} -+ -+static unsigned int gpio_dev_poll(struct file *file, poll_table *wait) -+{ -+ struct gpio_item *gpio = file->private_data; -+ unsigned int mask = 0; -+ -+ poll_wait(file, &gpio->change_wq, wait); -+ if (gpio->changed) -+ mask |= POLLIN | POLLRDNORM; -+ -+ return mask; -+} -+ -+static ssize_t gpio_dev_read(struct file *file, char __user *buf, -+ size_t count, loff_t *offset) -+{ -+ struct gpio_item *gpio = file->private_data; -+ u32 value; -+ -+ spin_lock_irq(&gpio->lock); -+ while (!gpio->changed) { -+ spin_unlock_irq(&gpio->lock); -+ -+ if (file->f_flags & O_NONBLOCK) -+ return -EAGAIN; -+ -+ if (wait_event_interruptible(gpio->change_wq, gpio->changed)) -+ return -ERESTARTSYS; -+ -+ spin_lock_irq(&gpio->lock); -+ } -+ -+ gpio->changed = 0; -+ value = at32_gpio_get_value_multiple(gpio->port, gpio->pin_mask); -+ -+ spin_unlock_irq(&gpio->lock); -+ -+ count = min(count, (size_t)4); -+ if (copy_to_user(buf, &value, count)) -+ return -EFAULT; -+ -+ return count; -+} -+ -+static ssize_t gpio_dev_write(struct file *file, const char __user *buf, -+ size_t count, loff_t *offset) -+{ -+ struct gpio_item *gpio = file->private_data; -+ u32 value = 0; -+ u32 mask = ~0UL; -+ -+ count = min(count, (size_t)4); -+ if (copy_from_user(&value, buf, count)) -+ return -EFAULT; -+ -+ /* Assuming big endian */ -+ mask <<= (4 - count) * 8; -+ mask &= gpio->pin_mask; -+ -+ at32_gpio_set_value_multiple(gpio->port, value, mask); -+ -+ return count; -+} -+ -+static struct file_operations gpio_dev_fops = { -+ .owner = THIS_MODULE, -+ .llseek = no_llseek, -+ .open = gpio_dev_open, -+ .release = gpio_dev_release, -+ .fasync = gpio_dev_fasync, -+ .poll = gpio_dev_poll, -+ .read = gpio_dev_read, -+ .write = gpio_dev_write, -+}; -+ -+static struct gpio_item *to_gpio_item(struct config_item *item) -+{ -+ return item ? container_of(item, struct gpio_item, item) : NULL; -+} -+ -+static ssize_t gpio_show_gpio_id(struct gpio_item *gpio, char *page) -+{ -+ return sprintf(page, "%d\n", gpio->port); -+} -+ -+static ssize_t gpio_store_gpio_id(struct gpio_item *gpio, -+ const char *page, size_t count) -+{ -+ unsigned long id; -+ char *p = (char *)page; -+ ssize_t ret = -EINVAL; -+ -+ id = simple_strtoul(p, &p, 0); -+ if (!p || (*p && (*p != '\n'))) -+ return -EINVAL; -+ -+ /* Switching PIO is not allowed when live... */ -+ spin_lock(&gpio->lock); -+ if (!gpio->enabled) { -+ ret = -ENXIO; -+ if (at32_gpio_port_is_valid(id)) { -+ gpio->port = id; -+ ret = count; -+ } -+ } -+ spin_unlock(&gpio->lock); -+ -+ return ret; -+} -+ -+static ssize_t gpio_show_pin_mask(struct gpio_item *gpio, char *page) -+{ -+ return sprintf(page, "0x%08x\n", gpio->pin_mask); -+} -+ -+static ssize_t gpio_store_pin_mask(struct gpio_item *gpio, -+ const char *page, size_t count) -+{ -+ u32 new_mask; -+ char *p = (char *)page; -+ ssize_t ret = -EINVAL; -+ -+ new_mask = simple_strtoul(p, &p, 0); -+ if (!p || (*p && (*p != '\n'))) -+ return -EINVAL; -+ -+ /* Can't update the pin mask while live. */ -+ spin_lock(&gpio->lock); -+ if (!gpio->enabled) { -+ gpio->oe_mask &= new_mask; -+ gpio->pin_mask = new_mask; -+ ret = count; -+ } -+ spin_unlock(&gpio->lock); -+ -+ return ret; -+} -+ -+static ssize_t gpio_show_oe_mask(struct gpio_item *gpio, char *page) -+{ -+ return sprintf(page, "0x%08x\n", gpio->oe_mask); -+} -+ -+static ssize_t gpio_store_oe_mask(struct gpio_item *gpio, -+ const char *page, size_t count) -+{ -+ u32 mask; -+ char *p = (char *)page; -+ ssize_t ret = -EINVAL; -+ -+ mask = simple_strtoul(p, &p, 0); -+ if (!p || (*p && (*p != '\n'))) -+ return -EINVAL; -+ -+ spin_lock(&gpio->lock); -+ if (!gpio->enabled) { -+ gpio->oe_mask = mask & gpio->pin_mask; -+ ret = count; -+ } -+ spin_unlock(&gpio->lock); -+ -+ return ret; -+} -+ -+static ssize_t gpio_show_enabled(struct gpio_item *gpio, char *page) -+{ -+ return sprintf(page, "%d\n", gpio->enabled); -+} -+ -+static ssize_t gpio_store_enabled(struct gpio_item *gpio, -+ const char *page, size_t count) -+{ -+ char *p = (char *)page; -+ int enabled; -+ int ret; -+ -+ enabled = simple_strtoul(p, &p, 0); -+ if (!p || (*p && (*p != '\n'))) -+ return -EINVAL; -+ -+ /* make it a boolean value */ -+ enabled = !!enabled; -+ -+ if (gpio->enabled == enabled) -+ /* No change; do nothing. */ -+ return count; -+ -+ BUG_ON(gpio->id >= GPIO_DEV_MAX); -+ -+ if (!enabled) { -+ class_device_unregister(gpio->gpio_dev); -+ cdev_del(&gpio->char_dev); -+ at32_deselect_pins(gpio->port, gpio->pin_mask); -+ gpio->initialized = 0; -+ } else { -+ if (gpio->port < 0 || !gpio->pin_mask) -+ return -ENODEV; -+ } -+ -+ /* Disallow any updates to gpio_id or pin_mask */ -+ spin_lock(&gpio->lock); -+ gpio->enabled = enabled; -+ spin_unlock(&gpio->lock); -+ -+ if (!enabled) -+ return count; -+ -+ /* Now, try to allocate the pins */ -+ ret = at32_select_gpio_pins(gpio->port, gpio->pin_mask, gpio->oe_mask); -+ if (ret) -+ goto err_alloc_pins; -+ -+ gpio->initialized = 1; -+ -+ cdev_init(&gpio->char_dev, &gpio_dev_fops); -+ gpio->char_dev.owner = THIS_MODULE; -+ ret = cdev_add(&gpio->char_dev, MKDEV(MAJOR(gpio_devt), gpio->id), 1); -+ if (ret < 0) -+ goto err_cdev_add; -+ gpio->gpio_dev = class_device_create(gpio_dev_class, NULL, -+ MKDEV(MAJOR(gpio_devt), gpio->id), -+ NULL, -+ "gpio%d", gpio->id); -+ if (IS_ERR(gpio->gpio_dev)) { -+ printk(KERN_ERR "failed to create gpio%d\n", gpio->id); -+ ret = PTR_ERR(gpio->gpio_dev); -+ goto err_class_dev; -+ } -+ -+ printk(KERN_INFO "created gpio%d (port%d/0x%08x) as (%d:%d)\n", -+ gpio->id, gpio->port, gpio->pin_mask, -+ MAJOR(gpio->gpio_dev->devt), MINOR(gpio->gpio_dev->devt)); -+ -+ return 0; -+ -+err_class_dev: -+ cdev_del(&gpio->char_dev); -+err_cdev_add: -+ at32_deselect_pins(gpio->port, gpio->pin_mask); -+ gpio->initialized = 0; -+err_alloc_pins: -+ spin_lock(&gpio->lock); -+ gpio->enabled = 0; -+ spin_unlock(&gpio->lock); -+ -+ return ret; -+} -+ -+static struct gpio_attribute gpio_item_attr_gpio_id = { -+ .attr = { -+ .ca_owner = THIS_MODULE, -+ .ca_name = "gpio_id", -+ .ca_mode = S_IRUGO | S_IWUSR, -+ }, -+ .show = gpio_show_gpio_id, -+ .store = gpio_store_gpio_id, -+}; -+static struct gpio_attribute gpio_item_attr_pin_mask = { -+ .attr = { -+ .ca_owner = THIS_MODULE, -+ .ca_name = "pin_mask", -+ .ca_mode = S_IRUGO | S_IWUSR, -+ }, -+ .show = gpio_show_pin_mask, -+ .store = gpio_store_pin_mask, -+}; -+static struct gpio_attribute gpio_item_attr_oe_mask = { -+ .attr = { -+ .ca_owner = THIS_MODULE, -+ .ca_name = "oe_mask", -+ .ca_mode = S_IRUGO | S_IWUSR, -+ }, -+ .show = gpio_show_oe_mask, -+ .store = gpio_store_oe_mask, -+}; -+static struct gpio_attribute gpio_item_attr_enabled = { -+ .attr = { -+ .ca_owner = THIS_MODULE, -+ .ca_name = "enabled", -+ .ca_mode = S_IRUGO | S_IWUSR, -+ }, -+ .show = gpio_show_enabled, -+ .store = gpio_store_enabled, -+}; -+ -+static struct configfs_attribute *gpio_item_attrs[] = { -+ &gpio_item_attr_gpio_id.attr, -+ &gpio_item_attr_pin_mask.attr, -+ &gpio_item_attr_oe_mask.attr, -+ &gpio_item_attr_enabled.attr, -+ NULL, -+}; -+ -+static ssize_t gpio_show_attr(struct config_item *item, -+ struct configfs_attribute *attr, -+ char *page) -+{ -+ struct gpio_item *gpio_item = to_gpio_item(item); -+ struct gpio_attribute *gpio_attr -+ = container_of(attr, struct gpio_attribute, attr); -+ ssize_t ret = 0; -+ -+ if (gpio_attr->show) -+ ret = gpio_attr->show(gpio_item, page); -+ return ret; -+} -+ -+static ssize_t gpio_store_attr(struct config_item *item, -+ struct configfs_attribute *attr, -+ const char *page, size_t count) -+{ -+ struct gpio_item *gpio_item = to_gpio_item(item); -+ struct gpio_attribute *gpio_attr -+ = container_of(attr, struct gpio_attribute, attr); -+ ssize_t ret = -EINVAL; -+ -+ if (gpio_attr->store) -+ ret = gpio_attr->store(gpio_item, page, count); -+ return ret; -+} -+ -+static void gpio_release(struct config_item *item) -+{ -+ kfree(to_gpio_item(item)); -+} -+ -+static struct configfs_item_operations gpio_item_ops = { -+ .release = gpio_release, -+ .show_attribute = gpio_show_attr, -+ .store_attribute = gpio_store_attr, -+}; -+ -+static struct config_item_type gpio_item_type = { -+ .ct_item_ops = &gpio_item_ops, -+ .ct_attrs = gpio_item_attrs, -+ .ct_owner = THIS_MODULE, -+}; -+ -+static struct config_item *gpio_make_item(struct config_group *group, -+ const char *name) -+{ -+ static int next_id; -+ struct gpio_item *gpio; -+ -+ if (next_id >= GPIO_DEV_MAX) -+ return NULL; -+ -+ gpio = kzalloc(sizeof(struct gpio_item), GFP_KERNEL); -+ if (!gpio) -+ return NULL; -+ -+ gpio->id = next_id++; -+ config_item_init_type_name(&gpio->item, name, &gpio_item_type); -+ spin_lock_init(&gpio->lock); -+ init_waitqueue_head(&gpio->change_wq); -+ -+ return &gpio->item; -+} -+ -+static void gpio_drop_item(struct config_group *group, -+ struct config_item *item) -+{ -+ struct gpio_item *gpio = to_gpio_item(item); -+ -+ spin_lock(&gpio->lock); -+ if (gpio->enabled) { -+ class_device_unregister(gpio->gpio_dev); -+ cdev_del(&gpio->char_dev); -+ } -+ -+ if (gpio->initialized) { -+ at32_deselect_pins(gpio->port, gpio->pin_mask); -+ gpio->initialized = 0; -+ gpio->enabled = 0; -+ } -+ spin_unlock(&gpio->lock); -+} -+ -+static struct configfs_group_operations gpio_group_ops = { -+ .make_item = gpio_make_item, -+ .drop_item = gpio_drop_item, -+}; -+ -+static struct config_item_type gpio_group_type = { -+ .ct_group_ops = &gpio_group_ops, -+ .ct_owner = THIS_MODULE, -+}; -+ -+static struct configfs_subsystem gpio_subsys = { -+ .su_group = { -+ .cg_item = { -+ .ci_namebuf = "gpio", -+ .ci_type = &gpio_group_type, -+ }, -+ }, -+}; -+ -+static int __init gpio_dev_init(void) -+{ -+ int err; -+ -+ gpio_dev_class = class_create(THIS_MODULE, "gpio-dev"); -+ if (IS_ERR(gpio_dev_class)) { -+ err = PTR_ERR(gpio_dev_class); -+ goto err_class_create; -+ } -+ -+ err = alloc_chrdev_region(&gpio_devt, 0, GPIO_DEV_MAX, "gpio"); -+ if (err < 0) -+ goto err_alloc_chrdev; -+ -+ /* Configfs initialization */ -+ config_group_init(&gpio_subsys.su_group); -+ mutex_init(&gpio_subsys.su_mutex); -+ err = configfs_register_subsystem(&gpio_subsys); -+ if (err) -+ goto err_register_subsys; -+ -+ return 0; -+ -+err_register_subsys: -+ unregister_chrdev_region(gpio_devt, GPIO_DEV_MAX); -+err_alloc_chrdev: -+ class_destroy(gpio_dev_class); -+err_class_create: -+ printk(KERN_WARNING "Failed to initialize gpio /dev interface\n"); -+ return err; -+} -+late_initcall(gpio_dev_init); -diff -Nrup linux-2.6.24/arch/avr32/mach-at32ap/Kconfig linux-avr32/arch/avr32/mach-at32ap/Kconfig ---- linux-2.6.24/arch/avr32/mach-at32ap/Kconfig 2008-01-24 17:58:37.000000000 -0500 -+++ linux-avr32/arch/avr32/mach-at32ap/Kconfig 2008-02-01 14:51:35.000000000 -0500 -@@ -3,9 +3,9 @@ if PLATFORM_AT32AP - menu "Atmel AVR32 AP options" - - choice -- prompt "AT32AP7000 static memory bus width" -- depends on CPU_AT32AP7000 -- default AP7000_16_BIT_SMC -+ prompt "AT32AP700x static memory bus width" -+ depends on CPU_AT32AP700X -+ default AP700X_16_BIT_SMC - help - Define the width of the AP7000 external static memory interface. - This is used to determine how to mangle the address and/or data -@@ -15,17 +15,24 @@ choice - width for all chip selects, excluding the flash (which is using - raw access and is thus not affected by any of this.) - --config AP7000_32_BIT_SMC -+config AP700X_32_BIT_SMC - bool "32 bit" - --config AP7000_16_BIT_SMC -+config AP700X_16_BIT_SMC - bool "16 bit" - --config AP7000_8_BIT_SMC -+config AP700X_8_BIT_SMC - bool "8 bit" - - endchoice - -+config GPIO_DEV -+ bool "GPIO /dev interface" -+ select CONFIGFS_FS -+ default n -+ help -+ Say `Y' to enable a /dev interface to the GPIO pins. -+ - endmenu - - endif # PLATFORM_AT32AP -diff -Nrup linux-2.6.24/arch/avr32/mach-at32ap/Makefile linux-avr32/arch/avr32/mach-at32ap/Makefile ---- linux-2.6.24/arch/avr32/mach-at32ap/Makefile 2008-01-24 17:58:37.000000000 -0500 -+++ linux-avr32/arch/avr32/mach-at32ap/Makefile 2008-02-01 14:51:35.000000000 -0500 -@@ -1,4 +1,5 @@ - obj-y += at32ap.o clock.o intc.o extint.o pio.o hsmc.o --obj-$(CONFIG_CPU_AT32AP7000) += at32ap7000.o --obj-$(CONFIG_CPU_AT32AP7000) += time-tc.o -+obj-$(CONFIG_CPU_AT32AP700X) += at32ap700x.o -+obj-$(CONFIG_CPU_AT32AP700X) += time-tc.o - obj-$(CONFIG_CPU_FREQ_AT32AP) += cpufreq.o -+obj-$(CONFIG_GPIO_DEV) += gpio-dev.o -diff -Nrup linux-2.6.24/arch/avr32/mach-at32ap/pio.c linux-avr32/arch/avr32/mach-at32ap/pio.c ---- linux-2.6.24/arch/avr32/mach-at32ap/pio.c 2008-01-24 17:58:37.000000000 -0500 -+++ linux-avr32/arch/avr32/mach-at32ap/pio.c 2008-02-01 14:51:35.000000000 -0500 -@@ -162,6 +162,82 @@ fail: - dump_stack(); - } - -+#ifdef CONFIG_GPIO_DEV -+ -+/* Gang allocators and accessors; used by the GPIO /dev driver */ -+int at32_gpio_port_is_valid(unsigned int port) -+{ -+ return port < MAX_NR_PIO_DEVICES && pio_dev[port].regs != NULL; -+} -+ -+int at32_select_gpio_pins(unsigned int port, u32 pins, u32 oe_mask) -+{ -+ struct pio_device *pio; -+ u32 old, new; -+ -+ pio = &pio_dev[port]; -+ BUG_ON(port > ARRAY_SIZE(pio_dev) || !pio->regs || (oe_mask & ~pins)); -+ -+ /* Try to allocate the pins */ -+ do { -+ old = pio->pinmux_mask; -+ if (old & pins) -+ return -EBUSY; -+ -+ new = old | pins; -+ } while (cmpxchg(&pio->pinmux_mask, old, new) != old); -+ -+ /* That went well, now configure the port */ -+ pio_writel(pio, OER, oe_mask); -+ pio_writel(pio, PER, pins); -+ -+ return 0; -+} -+ -+void at32_deselect_pins(unsigned int port, u32 pins) -+{ -+ struct pio_device *pio; -+ u32 old, new; -+ -+ pio = &pio_dev[port]; -+ BUG_ON(port > ARRAY_SIZE(pio_dev) || !pio->regs); -+ -+ /* Return to a "safe" mux configuration */ -+ pio_writel(pio, PUER, pins); -+ pio_writel(pio, ODR, pins); -+ -+ /* Deallocate the pins */ -+ do { -+ old = pio->pinmux_mask; -+ new = old & ~pins; -+ } while (cmpxchg(&pio->pinmux_mask, old, new) != old); -+} -+ -+u32 at32_gpio_get_value_multiple(unsigned int port, u32 pins) -+{ -+ struct pio_device *pio; -+ -+ pio = &pio_dev[port]; -+ BUG_ON(port > ARRAY_SIZE(pio_dev) || !pio->regs); -+ -+ return pio_readl(pio, PDSR) & pins; -+} -+ -+void at32_gpio_set_value_multiple(unsigned int port, u32 value, u32 mask) -+{ -+ struct pio_device *pio; -+ -+ pio = &pio_dev[port]; -+ BUG_ON(port > ARRAY_SIZE(pio_dev) || !pio->regs); -+ -+ /* No atomic updates for now... */ -+ pio_writel(pio, CODR, ~value & mask); -+ pio_writel(pio, SODR, value & mask); -+} -+ -+#endif /* CONFIG_GPIO_DEV */ -+ -+ - /*--------------------------------------------------------------------------*/ - - /* GPIO API */ -diff -Nrup linux-2.6.24/arch/avr32/Makefile linux-avr32/arch/avr32/Makefile ---- linux-2.6.24/arch/avr32/Makefile 2008-01-24 17:58:37.000000000 -0500 -+++ linux-avr32/arch/avr32/Makefile 2008-02-01 14:51:35.000000000 -0500 -@@ -16,7 +16,7 @@ KBUILD_AFLAGS += -mrelax -mno-pic - CFLAGS_MODULE += -mno-relax - LDFLAGS_vmlinux += --relax - --cpuflags-$(CONFIG_CPU_AT32AP7000) += -mcpu=ap7000 -+cpuflags-$(CONFIG_PLATFORM_AT32AP) += -march=ap - - KBUILD_CFLAGS += $(cpuflags-y) - KBUILD_AFLAGS += $(cpuflags-y) -@@ -31,6 +31,8 @@ core-$(CONFIG_BOARD_ATNGW100) += arch/a - core-$(CONFIG_LOADER_U_BOOT) += arch/avr32/boot/u-boot/ - core-y += arch/avr32/kernel/ - core-y += arch/avr32/mm/ -+drivers-$(CONFIG_OPROFILE) += arch/avr32/oprofile/ -+drivers-y += arch/avr32/drivers/ - libs-y += arch/avr32/lib/ - - archincdir-$(CONFIG_PLATFORM_AT32AP) := arch-at32ap -diff -Nrup linux-2.6.24/arch/avr32/mm/dma-coherent.c linux-avr32/arch/avr32/mm/dma-coherent.c ---- linux-2.6.24/arch/avr32/mm/dma-coherent.c 2008-01-24 17:58:37.000000000 -0500 -+++ linux-avr32/arch/avr32/mm/dma-coherent.c 2008-02-01 14:51:35.000000000 -0500 -@@ -41,6 +41,13 @@ static struct page *__dma_alloc(struct d - struct page *page, *free, *end; - int order; - -+ /* Following is a work-around (a.k.a. hack) to prevent pages -+ * with __GFP_COMP being passed to split_page() which cannot -+ * handle them. The real problem is that this flag probably -+ * should be 0 on AVR32 as it is not supported on this -+ * platform--see CONFIG_HUGETLB_PAGE. */ -+ gfp &= ~(__GFP_COMP); -+ - size = PAGE_ALIGN(size); - order = get_order(size); - -diff -Nrup linux-2.6.24/arch/avr32/mm/tlb.c linux-avr32/arch/avr32/mm/tlb.c ---- linux-2.6.24/arch/avr32/mm/tlb.c 2008-01-24 17:58:37.000000000 -0500 -+++ linux-avr32/arch/avr32/mm/tlb.c 2008-02-01 14:51:35.000000000 -0500 -@@ -348,7 +348,7 @@ static int tlb_show(struct seq_file *tlb - return 0; - } - --static struct seq_operations tlb_ops = { -+static const struct seq_operations tlb_ops = { - .start = tlb_start, - .next = tlb_next, - .stop = tlb_stop, -diff -Nrup linux-2.6.24/arch/avr32/oprofile/Makefile linux-avr32/arch/avr32/oprofile/Makefile ---- linux-2.6.24/arch/avr32/oprofile/Makefile 1969-12-31 19:00:00.000000000 -0500 -+++ linux-avr32/arch/avr32/oprofile/Makefile 2008-02-01 14:51:35.000000000 -0500 -@@ -0,0 +1,8 @@ -+obj-$(CONFIG_OPROFILE) += oprofile.o -+ -+oprofile-y := $(addprefix ../../../drivers/oprofile/, \ -+ oprof.o cpu_buffer.o buffer_sync.o \ -+ event_buffer.o oprofile_files.o \ -+ oprofilefs.o oprofile_stats.o \ -+ timer_int.o) -+oprofile-y += op_model_avr32.o -diff -Nrup linux-2.6.24/arch/avr32/oprofile/op_model_avr32.c linux-avr32/arch/avr32/oprofile/op_model_avr32.c ---- linux-2.6.24/arch/avr32/oprofile/op_model_avr32.c 1969-12-31 19:00:00.000000000 -0500 -+++ linux-avr32/arch/avr32/oprofile/op_model_avr32.c 2008-02-01 14:51:35.000000000 -0500 -@@ -0,0 +1,235 @@ -+/* -+ * AVR32 Performance Counter Driver -+ * -+ * Copyright (C) 2005-2007 Atmel Corporation -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 as -+ * published by the Free Software Foundation. -+ * -+ * Author: Ronny Pedersen -+ */ -+#include <linux/errno.h> -+#include <linux/interrupt.h> -+#include <linux/irq.h> -+#include <linux/oprofile.h> -+#include <linux/sched.h> -+#include <linux/types.h> -+ -+#include <asm/intc.h> -+#include <asm/sysreg.h> -+#include <asm/system.h> -+ -+#define AVR32_PERFCTR_IRQ_GROUP 0 -+#define AVR32_PERFCTR_IRQ_LINE 1 -+ -+enum { PCCNT, PCNT0, PCNT1, NR_counter }; -+ -+struct avr32_perf_counter { -+ unsigned long enabled; -+ unsigned long event; -+ unsigned long count; -+ unsigned long unit_mask; -+ unsigned long kernel; -+ unsigned long user; -+ -+ u32 ie_mask; -+ u32 flag_mask; -+}; -+ -+static struct avr32_perf_counter counter[NR_counter] = { -+ { -+ .ie_mask = SYSREG_BIT(IEC), -+ .flag_mask = SYSREG_BIT(FC), -+ }, { -+ .ie_mask = SYSREG_BIT(IE0), -+ .flag_mask = SYSREG_BIT(F0), -+ }, { -+ .ie_mask = SYSREG_BIT(IE1), -+ .flag_mask = SYSREG_BIT(F1), -+ }, -+}; -+ -+static void avr32_perf_counter_reset(void) -+{ -+ /* Reset all counter and disable/clear all interrupts */ -+ sysreg_write(PCCR, (SYSREG_BIT(PCCR_R) -+ | SYSREG_BIT(PCCR_C) -+ | SYSREG_BIT(FC) -+ | SYSREG_BIT(F0) -+ | SYSREG_BIT(F1))); -+} -+ -+static irqreturn_t avr32_perf_counter_interrupt(int irq, void *dev_id) -+{ -+ struct avr32_perf_counter *ctr = dev_id; -+ struct pt_regs *regs; -+ u32 pccr; -+ -+ if (likely(!(intc_get_pending(AVR32_PERFCTR_IRQ_GROUP) -+ & (1 << AVR32_PERFCTR_IRQ_LINE)))) -+ return IRQ_NONE; -+ -+ regs = get_irq_regs(); -+ pccr = sysreg_read(PCCR); -+ -+ /* Clear the interrupt flags we're about to handle */ -+ sysreg_write(PCCR, pccr); -+ -+ /* PCCNT */ -+ if (ctr->enabled && (pccr & ctr->flag_mask)) { -+ sysreg_write(PCCNT, -ctr->count); -+ oprofile_add_sample(regs, PCCNT); -+ } -+ ctr++; -+ /* PCNT0 */ -+ if (ctr->enabled && (pccr & ctr->flag_mask)) { -+ sysreg_write(PCNT0, -ctr->count); -+ oprofile_add_sample(regs, PCNT0); -+ } -+ ctr++; -+ /* PCNT1 */ -+ if (ctr->enabled && (pccr & ctr->flag_mask)) { -+ sysreg_write(PCNT1, -ctr->count); -+ oprofile_add_sample(regs, PCNT1); -+ } -+ -+ return IRQ_HANDLED; -+} -+ -+static int avr32_perf_counter_create_files(struct super_block *sb, -+ struct dentry *root) -+{ -+ struct dentry *dir; -+ unsigned int i; -+ char filename[4]; -+ -+ for (i = 0; i < NR_counter; i++) { -+ snprintf(filename, sizeof(filename), "%u", i); -+ dir = oprofilefs_mkdir(sb, root, filename); -+ -+ oprofilefs_create_ulong(sb, dir, "enabled", -+ &counter[i].enabled); -+ oprofilefs_create_ulong(sb, dir, "event", -+ &counter[i].event); -+ oprofilefs_create_ulong(sb, dir, "count", -+ &counter[i].count); -+ -+ /* Dummy entries */ -+ oprofilefs_create_ulong(sb, dir, "kernel", -+ &counter[i].kernel); -+ oprofilefs_create_ulong(sb, dir, "user", -+ &counter[i].user); -+ oprofilefs_create_ulong(sb, dir, "unit_mask", -+ &counter[i].unit_mask); -+ } -+ -+ return 0; -+} -+ -+static int avr32_perf_counter_setup(void) -+{ -+ struct avr32_perf_counter *ctr; -+ u32 pccr; -+ int ret; -+ int i; -+ -+ pr_debug("avr32_perf_counter_setup\n"); -+ -+ if (sysreg_read(PCCR) & SYSREG_BIT(PCCR_E)) { -+ printk(KERN_ERR -+ "oprofile: setup: perf counter already enabled\n"); -+ return -EBUSY; -+ } -+ -+ ret = request_irq(AVR32_PERFCTR_IRQ_GROUP, -+ avr32_perf_counter_interrupt, IRQF_SHARED, -+ "oprofile", counter); -+ if (ret) -+ return ret; -+ -+ avr32_perf_counter_reset(); -+ -+ pccr = 0; -+ for (i = PCCNT; i < NR_counter; i++) { -+ ctr = &counter[i]; -+ if (!ctr->enabled) -+ continue; -+ -+ pr_debug("enabling counter %d...\n", i); -+ -+ pccr |= ctr->ie_mask; -+ -+ switch (i) { -+ case PCCNT: -+ /* PCCNT always counts cycles, so no events */ -+ sysreg_write(PCCNT, -ctr->count); -+ break; -+ case PCNT0: -+ pccr |= SYSREG_BF(CONF0, ctr->event); -+ sysreg_write(PCNT0, -ctr->count); -+ break; -+ case PCNT1: -+ pccr |= SYSREG_BF(CONF1, ctr->event); -+ sysreg_write(PCNT1, -ctr->count); -+ break; -+ } -+ } -+ -+ pr_debug("oprofile: writing 0x%x to PCCR...\n", pccr); -+ -+ sysreg_write(PCCR, pccr); -+ -+ return 0; -+} -+ -+static void avr32_perf_counter_shutdown(void) -+{ -+ pr_debug("avr32_perf_counter_shutdown\n"); -+ -+ avr32_perf_counter_reset(); -+ free_irq(AVR32_PERFCTR_IRQ_GROUP, counter); -+} -+ -+static int avr32_perf_counter_start(void) -+{ -+ pr_debug("avr32_perf_counter_start\n"); -+ -+ sysreg_write(PCCR, sysreg_read(PCCR) | SYSREG_BIT(PCCR_E)); -+ -+ return 0; -+} -+ -+static void avr32_perf_counter_stop(void) -+{ -+ pr_debug("avr32_perf_counter_stop\n"); -+ -+ sysreg_write(PCCR, sysreg_read(PCCR) & ~SYSREG_BIT(PCCR_E)); -+} -+ -+static struct oprofile_operations avr32_perf_counter_ops __initdata = { -+ .create_files = avr32_perf_counter_create_files, -+ .setup = avr32_perf_counter_setup, -+ .shutdown = avr32_perf_counter_shutdown, -+ .start = avr32_perf_counter_start, -+ .stop = avr32_perf_counter_stop, -+ .cpu_type = "avr32", -+}; -+ -+int __init oprofile_arch_init(struct oprofile_operations *ops) -+{ -+ if (!(current_cpu_data.features & AVR32_FEATURE_PCTR)) -+ return -ENODEV; -+ -+ memcpy(ops, &avr32_perf_counter_ops, -+ sizeof(struct oprofile_operations)); -+ -+ printk(KERN_INFO "oprofile: using AVR32 performance monitoring.\n"); -+ -+ return 0; -+} -+ -+void oprofile_arch_exit(void) -+{ -+ -+} -diff -Nrup linux-2.6.24/Documentation/kernel-parameters.txt linux-avr32/Documentation/kernel-parameters.txt ---- linux-2.6.24/Documentation/kernel-parameters.txt 2008-01-24 17:58:37.000000000 -0500 -+++ linux-avr32/Documentation/kernel-parameters.txt 2008-02-01 14:51:34.000000000 -0500 -@@ -34,6 +34,7 @@ parameter is applicable: - ALSA ALSA sound support is enabled. - APIC APIC support is enabled. - APM Advanced Power Management support is enabled. -+ AVR32 AVR32 architecture is enabled. - AX25 Appropriate AX.25 support is enabled. - BLACKFIN Blackfin architecture is enabled. - DRM Direct Rendering Management support is enabled. -@@ -1123,6 +1124,10 @@ and is between 256 and 4096 characters. - of returning the full 64-bit number. - The default is to return 64-bit inode numbers. - -+ nmi_debug= [KNL,AVR32] Specify one or more actions to take -+ when a NMI is triggered. -+ Format: [state][,regs][,debounce][,die] -+ - nmi_watchdog= [KNL,BUGS=X86-32] Debugging features for SMP kernels - - no387 [BUGS=X86-32] Tells the kernel to use the 387 maths -diff -Nrup linux-2.6.24/drivers/i2c/busses/i2c-atmeltwi.c linux-avr32/drivers/i2c/busses/i2c-atmeltwi.c ---- linux-2.6.24/drivers/i2c/busses/i2c-atmeltwi.c 1969-12-31 19:00:00.000000000 -0500 -+++ linux-avr32/drivers/i2c/busses/i2c-atmeltwi.c 2008-02-01 14:51:37.000000000 -0500 -@@ -0,0 +1,436 @@ -+/* -+ * i2c Support for Atmel's Two-Wire Interface (TWI) -+ * -+ * Based on the work of Copyright (C) 2004 Rick Bronson -+ * Converted to 2.6 by Andrew Victor <andrew at sanpeople.com> -+ * Ported to AVR32 and heavily modified by Espen Krangnes -+ * <ekrangnes at atmel.com> -+ * -+ * Copyright (C) 2006 Atmel Corporation -+ * -+ * Borrowed heavily from the original work by: -+ * Copyright (C) 2000 Philip Edelbrock <phil at stimpy.netroedge.com> -+ * -+ * Partialy rewriten by Karel Hojdar <cmkaho at seznam.cz> -+ * bugs removed, interrupt routine markedly rewritten -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License as published by -+ * the Free Software Foundation; either version 2 of the License, or -+ * (at your option) any later version. -+ */ -+#undef VERBOSE_DEBUG -+ -+#include <linux/module.h> -+#include <linux/slab.h> -+#include <linux/i2c.h> -+#include <linux/init.h> -+#include <linux/clk.h> -+#include <linux/err.h> -+#include <linux/interrupt.h> -+#include <linux/platform_device.h> -+#include <linux/completion.h> -+#include <linux/io.h> -+ -+#include "i2c-atmeltwi.h" -+ -+static unsigned int baudrate = 100 * 1000; -+module_param(baudrate, uint, S_IRUGO); -+MODULE_PARM_DESC(baudrate, "The TWI baudrate"); -+ -+ -+struct atmel_twi { -+ void __iomem *regs; -+ struct i2c_adapter adapter; -+ struct clk *pclk; -+ struct completion comp; -+ u32 mask; -+ u8 *buf; -+ u16 len; -+ u16 acks_left; -+ int status; -+ unsigned int irq; -+ -+}; -+#define to_atmel_twi(adap) container_of(adap, struct atmel_twi, adapter) -+ -+/* -+ * (Re)Initialize the TWI hardware registers. -+ */ -+static int twi_hwinit(struct atmel_twi *twi) -+{ -+ unsigned long cdiv, ckdiv = 0; -+ -+ /* REVISIT: wait till SCL is high before resetting; otherwise, -+ * some versions will wedge forever. -+ */ -+ -+ twi_writel(twi, IDR, ~0UL); -+ twi_writel(twi, CR, TWI_BIT(SWRST)); /*Reset peripheral*/ -+ twi_readl(twi, SR); -+ -+ cdiv = (clk_get_rate(twi->pclk) / (2 * baudrate)) - 4; -+ -+ while (cdiv > 255) { -+ ckdiv++; -+ cdiv = cdiv >> 1; -+ } -+ -+ /* REVISIT: there are various errata to consider re CDIV and CHDIV -+ * here, at least on at91 parts. -+ */ -+ -+ if (ckdiv > 7) -+ return -EINVAL; -+ else -+ twi_writel(twi, CWGR, TWI_BF(CKDIV, ckdiv) -+ | TWI_BF(CHDIV, cdiv) -+ | TWI_BF(CLDIV, cdiv)); -+ return 0; -+} -+ -+/* -+ * Waits for the i2c status register to set the specified bitmask -+ * Returns 0 if timed out ... ~100ms is much longer than the SMBus -+ * limit, but I2C has no limit at all. -+ */ -+static int twi_complete(struct atmel_twi *twi, u32 mask) -+{ -+ int timeout = msecs_to_jiffies(100); -+ -+ mask |= TWI_BIT(TXCOMP); -+ twi->mask = mask | TWI_BIT(NACK) | TWI_BIT(OVRE); -+ init_completion(&twi->comp); -+ -+ twi_writel(twi, IER, mask); -+ -+ if (!wait_for_completion_timeout(&twi->comp, timeout)) { -+ /* RESET TWI interface */ -+ twi_writel(twi, CR, TWI_BIT(SWRST)); -+ -+ /* Reinitialize TWI */ -+ twi_hwinit(twi); -+ -+ return -ETIMEDOUT; -+ } -+ return 0; -+} -+ -+/* -+ * Generic i2c master transfer entrypoint. -+ */ -+static int twi_xfer(struct i2c_adapter *adap, struct i2c_msg *pmsg, int num) -+{ -+ struct atmel_twi *twi = to_atmel_twi(adap); -+ int i; -+ -+ dev_dbg(&adap->dev, "twi_xfer: processing %d messages:\n", num); -+ -+ twi->status = 0; -+ for (i = 0; i < num; i++, pmsg++) { -+ twi->len = pmsg->len; -+ twi->buf = pmsg->buf; -+ twi->acks_left = pmsg->len; -+ twi_writel(twi, MMR, TWI_BF(DADR, pmsg->addr) | -+ (pmsg->flags & I2C_M_RD ? TWI_BIT(MREAD) : 0)); -+ twi_writel(twi, IADR, TWI_BF(IADR, pmsg->addr)); -+ -+ dev_dbg(&adap->dev, -+ "#%d: %s %d byte%s %s dev 0x%02x\n", -+ i, -+ pmsg->flags & I2C_M_RD ? "reading" : "writing", -+ pmsg->len, -+ pmsg->len > 1 ? "s" : "", -+ pmsg->flags & I2C_M_RD ? "from" : "to", pmsg->addr); -+ -+ /* enable */ -+ twi_writel(twi, CR, TWI_BIT(MSEN)); -+ -+ if (pmsg->flags & I2C_M_RD) { -+ /* cleanup after previous RX overruns */ -+ while (twi_readl(twi, SR) & TWI_BIT(RXRDY)) -+ twi_readl(twi, RHR); -+ -+ if (twi->len == 1) -+ twi_writel(twi, CR, -+ TWI_BIT(START) | TWI_BIT(STOP)); -+ else -+ twi_writel(twi, CR, TWI_BIT(START)); -+ -+ if (twi_complete(twi, TWI_BIT(RXRDY)) == -ETIMEDOUT) { -+ dev_dbg(&adap->dev, "RX[%d] timeout. " -+ "Stopped with %d bytes left\n", -+ i, twi->acks_left); -+ return -ETIMEDOUT; -+ } -+ } else { -+ twi_writel(twi, THR, twi->buf[0]); -+ twi->acks_left--; -+ /* REVISIT: some chips don't start automagically: -+ * twi_writel(twi, CR, TWI_BIT(START)); -+ */ -+ if (twi_complete(twi, TWI_BIT(TXRDY)) == -ETIMEDOUT) { -+ dev_dbg(&adap->dev, "TX[%d] timeout. " -+ "Stopped with %d bytes left\n", -+ i, twi->acks_left); -+ return -ETIMEDOUT; -+ } -+ /* REVISIT: an erratum workaround may be needed here; -+ * see sam9261 "STOP not generated" (START either). -+ */ -+ } -+ -+ /* Disable TWI interface */ -+ twi_writel(twi, CR, TWI_BIT(MSDIS)); -+ -+ if (twi->status) -+ return twi->status; -+ -+ /* WARNING: This driver lies about properly supporting -+ * repeated start, or it would *ALWAYS* return here. It -+ * has issued a STOP. Continuing is a false claim -- that -+ * a second (or third, etc.) message is part of the same -+ * "combined" (no STOPs between parts) message. -+ */ -+ -+ } /* end cur msg */ -+ -+ return i; -+} -+ -+ -+static irqreturn_t twi_interrupt(int irq, void *dev_id) -+{ -+ struct atmel_twi *twi = dev_id; -+ int status = twi_readl(twi, SR); -+ -+ /* Save state for later debug prints */ -+ int old_status = status; -+ -+ if (twi->mask & status) { -+ -+ status &= twi->mask; -+ -+ if (status & TWI_BIT(RXRDY)) { -+ if ((status & TWI_BIT(OVRE)) && twi->acks_left) { -+ /* Note weakness in fault reporting model: -+ * we can't say "the first N of these data -+ * bytes are valid". -+ */ -+ dev_err(&twi->adapter.dev, -+ "OVERRUN RX! %04x, lost %d\n", -+ old_status, twi->acks_left); -+ twi->acks_left = 0; -+ twi_writel(twi, CR, TWI_BIT(STOP)); -+ twi->status = -EOVERFLOW; -+ } else if (twi->acks_left > 0) { -+ twi->buf[twi->len - twi->acks_left] = -+ twi_readl(twi, RHR); -+ twi->acks_left--; -+ } -+ if (status & TWI_BIT(TXCOMP)) -+ goto done; -+ if (twi->acks_left == 1) -+ twi_writel(twi, CR, TWI_BIT(STOP)); -+ -+ } else if (status & (TWI_BIT(NACK) | TWI_BIT(TXCOMP))) { -+ goto done; -+ -+ } else if (status & TWI_BIT(TXRDY)) { -+ if (twi->acks_left > 0) { -+ twi->acks_left--; -+ twi_writel(twi, THR, -+ twi->buf[twi->len - twi->acks_left]); -+ } else -+ twi_writel(twi, CR, TWI_BIT(STOP)); -+ } -+ -+ if (twi->acks_left == 0) -+ twi_writel(twi, IDR, ~TWI_BIT(TXCOMP)); -+ } -+ -+ /* enabling this message helps trigger overruns/underruns ... */ -+ dev_vdbg(&twi->adapter.dev, -+ "ISR: SR 0x%04X, mask 0x%04X, acks %i\n", -+ old_status, -+ twi->acks_left ? twi->mask : TWI_BIT(TXCOMP), -+ twi->acks_left); -+ -+ return IRQ_HANDLED; -+ -+done: -+ /* Note weak fault reporting model: we can't report how many -+ * bytes we sent before the NAK, or let upper layers choose -+ * whether to continue. The I2C stack doesn't allow that... -+ */ -+ if (status & TWI_BIT(NACK)) { -+ dev_dbg(&twi->adapter.dev, "NACK received! %d to go\n", -+ twi->acks_left); -+ twi->status = -EPIPE; -+ -+ /* TX underrun morphs automagically into a premature STOP; -+ * we'll probably observe UVRE even when it's not documented. -+ */ -+ } else if (twi->acks_left && (twi->mask & TWI_BIT(TXRDY))) { -+ dev_err(&twi->adapter.dev, "UNDERRUN TX! %04x, %d to go\n", -+ old_status, twi->acks_left); -+ twi->status = -ENOSR; -+ } -+ -+ twi_writel(twi, IDR, ~0UL); -+ complete(&twi->comp); -+ -+ dev_dbg(&twi->adapter.dev, "ISR: SR 0x%04X, acks %i --> %d\n", -+ old_status, twi->acks_left, twi->status); -+ -+ return IRQ_HANDLED; -+} -+ -+ -+/* -+ * Return list of supported functionality. -+ * -+ * NOTE: see warning above about repeated starts; this driver is falsely -+ * claiming to support "combined" transfers. The mid-message STOPs mean -+ * some slaves will never work with this driver. (Use i2c-gpio...) -+ */ -+static u32 twi_func(struct i2c_adapter *adapter) -+{ -+ return (I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL) -+ & ~I2C_FUNC_SMBUS_QUICK; -+} -+ -+static struct i2c_algorithm twi_algorithm = { -+ .master_xfer = twi_xfer, -+ .functionality = twi_func, -+}; -+ -+/* -+ * Main initialization routine. -+ */ -+static int __init twi_probe(struct platform_device *pdev) -+{ -+ struct atmel_twi *twi; -+ struct resource *regs; -+ struct clk *pclk; -+ struct i2c_adapter *adapter; -+ int rc, irq; -+ -+ regs = platform_get_resource(pdev, IORESOURCE_MEM, 0); -+ if (!regs) -+ return -ENXIO; -+ -+ pclk = clk_get(&pdev->dev, "twi_pclk"); -+ if (IS_ERR(pclk)) -+ return PTR_ERR(pclk); -+ clk_enable(pclk); -+ -+ rc = -ENOMEM; -+ twi = kzalloc(sizeof(struct atmel_twi), GFP_KERNEL); -+ if (!twi) { -+ dev_dbg(&pdev->dev, "can't allocate interface!\n"); -+ goto err_alloc_twi; -+ } -+ -+ twi->pclk = pclk; -+ twi->regs = ioremap(regs->start, regs->end - regs->start + 1); -+ if (!twi->regs) -+ goto err_ioremap; -+ -+ irq = platform_get_irq(pdev, 0); -+ rc = request_irq(irq, twi_interrupt, 0, "twi", twi); -+ if (rc) { -+ dev_dbg(&pdev->dev, "can't bind irq!\n"); -+ goto err_irq; -+ } -+ twi->irq = irq; -+ -+ rc = twi_hwinit(twi); -+ if (rc) { -+ dev_err(&pdev->dev, "Unable to set baudrate\n"); -+ goto err_hw_init; -+ } -+ -+ adapter = &twi->adapter; -+ sprintf(adapter->name, "TWI"); -+ adapter->algo = &twi_algorithm; -+ adapter->class = I2C_CLASS_ALL; -+ adapter->nr = pdev->id; -+ adapter->dev.parent = &pdev->dev; -+ -+ platform_set_drvdata(pdev, twi); -+ -+ rc = i2c_add_numbered_adapter(adapter); -+ if (rc) { -+ dev_dbg(&pdev->dev, "Adapter %s registration failed\n", -+ adapter->name); -+ goto err_register; -+ } -+ -+ dev_info(&pdev->dev, -+ "Atmel TWI/I2C adapter (baudrate %dk) at 0x%08lx.\n", -+ baudrate/1000, (unsigned long)regs->start); -+ -+ return 0; -+ -+ -+err_register: -+ platform_set_drvdata(pdev, NULL); -+ -+err_hw_init: -+ free_irq(irq, twi); -+ -+err_irq: -+ iounmap(twi->regs); -+ -+err_ioremap: -+ kfree(twi); -+ -+err_alloc_twi: -+ clk_disable(pclk); -+ clk_put(pclk); -+ -+ return rc; -+} -+ -+static int __exit twi_remove(struct platform_device *pdev) -+{ -+ struct atmel_twi *twi = platform_get_drvdata(pdev); -+ int res; -+ -+ platform_set_drvdata(pdev, NULL); -+ res = i2c_del_adapter(&twi->adapter); -+ twi_writel(twi, CR, TWI_BIT(MSDIS)); -+ iounmap(twi->regs); -+ clk_disable(twi->pclk); -+ clk_put(twi->pclk); -+ free_irq(twi->irq, twi); -+ kfree(twi); -+ -+ return res; -+} -+ -+static struct platform_driver twi_driver = { -+ .remove = __exit_p(twi_remove), -+ .driver = { -+ .name = "atmel_twi", -+ .owner = THIS_MODULE, -+ }, -+}; -+ -+static int __init atmel_twi_init(void) -+{ -+ return platform_driver_probe(&twi_driver, twi_probe); -+} -+ -+static void __exit atmel_twi_exit(void) -+{ -+ platform_driver_unregister(&twi_driver); -+} -+ -+module_init(atmel_twi_init); -+module_exit(atmel_twi_exit); -+ -+MODULE_AUTHOR("Espen Krangnes"); -+MODULE_DESCRIPTION("I2C driver for Atmel TWI"); -+MODULE_LICENSE("GPL"); -diff -Nrup linux-2.6.24/drivers/i2c/busses/i2c-atmeltwi.h linux-avr32/drivers/i2c/busses/i2c-atmeltwi.h ---- linux-2.6.24/drivers/i2c/busses/i2c-atmeltwi.h 1969-12-31 19:00:00.000000000 -0500 -+++ linux-avr32/drivers/i2c/busses/i2c-atmeltwi.h 2008-02-01 14:51:37.000000000 -0500 -@@ -0,0 +1,117 @@ -+/* -+ * Register definitions for the Atmel Two-Wire Interface -+ */ -+ -+#ifndef __ATMELTWI_H__ -+#define __ATMELTWI_H__ -+ -+/* TWI register offsets */ -+#define TWI_CR 0x0000 -+#define TWI_MMR 0x0004 -+#define TWI_SMR 0x0008 -+#define TWI_IADR 0x000c -+#define TWI_CWGR 0x0010 -+#define TWI_SR 0x0020 -+#define TWI_IER 0x0024 -+#define TWI_IDR 0x0028 -+#define TWI_IMR 0x002c -+#define TWI_RHR 0x0030 -+#define TWI_THR 0x0034 -+ -+/* Bitfields in CR */ -+#define TWI_START_OFFSET 0 -+#define TWI_START_SIZE 1 -+#define TWI_STOP_OFFSET 1 -+#define TWI_STOP_SIZE 1 -+#define TWI_MSEN_OFFSET 2 -+#define TWI_MSEN_SIZE 1 -+#define TWI_MSDIS_OFFSET 3 -+#define TWI_MSDIS_SIZE 1 -+#define TWI_SVEN_OFFSET 4 -+#define TWI_SVEN_SIZE 1 -+#define TWI_SVDIS_OFFSET 5 -+#define TWI_SVDIS_SIZE 1 -+#define TWI_SWRST_OFFSET 7 -+#define TWI_SWRST_SIZE 1 -+ -+/* Bitfields in MMR */ -+#define TWI_IADRSZ_OFFSET 8 -+#define TWI_IADRSZ_SIZE 2 -+#define TWI_MREAD_OFFSET 12 -+#define TWI_MREAD_SIZE 1 -+#define TWI_DADR_OFFSET 16 -+#define TWI_DADR_SIZE 7 -+ -+/* Bitfields in SMR */ -+#define TWI_SADR_OFFSET 16 -+#define TWI_SADR_SIZE 7 -+ -+/* Bitfields in IADR */ -+#define TWI_IADR_OFFSET 0 -+#define TWI_IADR_SIZE 24 -+ -+/* Bitfields in CWGR */ -+#define TWI_CLDIV_OFFSET 0 -+#define TWI_CLDIV_SIZE 8 -+#define TWI_CHDIV_OFFSET 8 -+#define TWI_CHDIV_SIZE 8 -+#define TWI_CKDIV_OFFSET 16 -+#define TWI_CKDIV_SIZE 3 -+ -+/* Bitfields in SR */ -+#define TWI_TXCOMP_OFFSET 0 -+#define TWI_TXCOMP_SIZE 1 -+#define TWI_RXRDY_OFFSET 1 -+#define TWI_RXRDY_SIZE 1 -+#define TWI_TXRDY_OFFSET 2 -+#define TWI_TXRDY_SIZE 1 -+#define TWI_SVDIR_OFFSET 3 -+#define TWI_SVDIR_SIZE 1 -+#define TWI_SVACC_OFFSET 4 -+#define TWI_SVACC_SIZE 1 -+#define TWI_GCACC_OFFSET 5 -+#define TWI_GCACC_SIZE 1 -+#define TWI_OVRE_OFFSET 6 -+#define TWI_OVRE_SIZE 1 -+#define TWI_UNRE_OFFSET 7 -+#define TWI_UNRE_SIZE 1 -+#define TWI_NACK_OFFSET 8 -+#define TWI_NACK_SIZE 1 -+#define TWI_ARBLST_OFFSET 9 -+#define TWI_ARBLST_SIZE 1 -+ -+/* Bitfields in RHR */ -+#define TWI_RXDATA_OFFSET 0 -+#define TWI_RXDATA_SIZE 8 -+ -+/* Bitfields in THR */ -+#define TWI_TXDATA_OFFSET 0 -+#define TWI_TXDATA_SIZE 8 -+ -+/* Constants for IADRSZ */ -+#define TWI_IADRSZ_NO_ADDR 0 -+#define TWI_IADRSZ_ONE_BYTE 1 -+#define TWI_IADRSZ_TWO_BYTES 2 -+#define TWI_IADRSZ_THREE_BYTES 3 -+ -+/* Bit manipulation macros */ -+#define TWI_BIT(name) \ -+ (1 << TWI_##name##_OFFSET) -+#define TWI_BF(name, value) \ -+ (((value) & ((1 << TWI_##name##_SIZE) - 1)) \ -+ << TWI_##name##_OFFSET) -+#define TWI_BFEXT(name, value) \ -+ (((value) >> TWI_##name##_OFFSET) \ -+ & ((1 << TWI_##name##_SIZE) - 1)) -+#define TWI_BFINS(name, value, old) \ -+ (((old) & ~(((1 << TWI_##name##_SIZE) - 1) \ -+ << TWI_##name##_OFFSET)) \ -+ | TWI_BF(name, (value))) -+ -+/* Register access macros */ -+#define twi_readl(port, reg) \ -+ __raw_readl((port)->regs + TWI_##reg) -+#define twi_writel(port, reg, value) \ -+ __raw_writel((value), (port)->regs + TWI_##reg) -+ -+#endif /* __ATMELTWI_H__ */ -diff -Nrup linux-2.6.24/drivers/i2c/busses/Kconfig linux-avr32/drivers/i2c/busses/Kconfig ---- linux-2.6.24/drivers/i2c/busses/Kconfig 2008-01-24 17:58:37.000000000 -0500 -+++ linux-avr32/drivers/i2c/busses/Kconfig 2008-02-01 14:51:37.000000000 -0500 -@@ -88,6 +88,14 @@ config I2C_AT91 - to support combined I2C messages. Use the i2c-gpio driver - unless your system can cope with those limitations. - -+config I2C_ATMELTWI -+ tristate "Atmel Two-Wire Interface (TWI)" -+ depends on I2C && (ARCH_AT91 || PLATFORM_AT32AP) -+ help -+ Atmel on-chip TWI controller. Say Y if you have an AT32 or -+ AT91-based device and want to use its built-in TWI -+ functionality. -+ - config I2C_AU1550 - tristate "Au1550/Au1200 SMBus interface" - depends on SOC_AU1550 || SOC_AU1200 -diff -Nrup linux-2.6.24/drivers/i2c/busses/Makefile linux-avr32/drivers/i2c/busses/Makefile ---- linux-2.6.24/drivers/i2c/busses/Makefile 2008-01-24 17:58:37.000000000 -0500 -+++ linux-avr32/drivers/i2c/busses/Makefile 2008-02-01 14:51:37.000000000 -0500 -@@ -53,6 +53,7 @@ obj-$(CONFIG_I2C_VIAPRO) += i2c-viapro.o - obj-$(CONFIG_I2C_VOODOO3) += i2c-voodoo3.o - obj-$(CONFIG_SCx200_ACB) += scx200_acb.o - obj-$(CONFIG_SCx200_I2C) += scx200_i2c.o -+obj-$(CONFIG_I2C_ATMELTWI) += i2c-atmeltwi.o - - ifeq ($(CONFIG_I2C_DEBUG_BUS),y) - EXTRA_CFLAGS += -DDEBUG -diff -Nrup linux-2.6.24/drivers/leds/Kconfig linux-avr32/drivers/leds/Kconfig ---- linux-2.6.24/drivers/leds/Kconfig 2008-01-24 17:58:37.000000000 -0500 -+++ linux-avr32/drivers/leds/Kconfig 2008-02-01 14:51:38.000000000 -0500 -@@ -18,6 +18,13 @@ config LEDS_CLASS - - comment "LED drivers" - -+config LEDS_ATMEL_PWM -+ tristate "LED Support using Atmel PWM outputs" -+ depends on LEDS_CLASS && ATMEL_PWM -+ help -+ This option enables support for LEDs driven using outputs -+ of the dedicated PWM controller found on newer Atmel SOCs. -+ - config LEDS_CORGI - tristate "LED Support for the Sharp SL-C7x0 series" - depends on LEDS_CLASS && PXA_SHARP_C7xx -diff -Nrup linux-2.6.24/drivers/leds/leds-atmel-pwm.c linux-avr32/drivers/leds/leds-atmel-pwm.c ---- linux-2.6.24/drivers/leds/leds-atmel-pwm.c 1969-12-31 19:00:00.000000000 -0500 -+++ linux-avr32/drivers/leds/leds-atmel-pwm.c 2008-02-01 14:51:38.000000000 -0500 -@@ -0,0 +1,157 @@ -+#include <linux/kernel.h> -+#include <linux/platform_device.h> -+#include <linux/leds.h> -+#include <linux/io.h> -+#include <linux/atmel_pwm.h> -+ -+ -+struct pwmled { -+ struct led_classdev cdev; -+ struct pwm_channel pwmc; -+ struct gpio_led *desc; -+ u32 mult; -+ u8 active_low; -+}; -+ -+ -+/* -+ * For simplicity, we use "brightness" as if it were a linear function -+ * of PWM duty cycle. However, a logarithmic function of duty cycle is -+ * probably a better match for perceived brightness: two is half as bright -+ * as four, four is half as bright as eight, etc -+ */ -+static void pwmled_brightness(struct led_classdev *cdev, enum led_brightness b) -+{ -+ struct pwmled *led; -+ -+ /* update the duty cycle for the *next* period */ -+ led = container_of(cdev, struct pwmled, cdev); -+ pwm_channel_writel(&led->pwmc, PWM_CUPD, led->mult * (unsigned) b); -+} -+ -+/* -+ * NOTE: we reuse the platform_data structure of GPIO leds, -+ * but repurpose its "gpio" number as a PWM channel number. -+ */ -+static int __init pwmled_probe(struct platform_device *pdev) -+{ -+ const struct gpio_led_platform_data *pdata; -+ struct pwmled *leds; -+ unsigned i; -+ int status; -+ -+ pdata = pdev->dev.platform_data; -+ if (!pdata || pdata->num_leds < 1) -+ return -ENODEV; -+ -+ leds = kcalloc(pdata->num_leds, sizeof(*leds), GFP_KERNEL); -+ if (!leds) -+ return -ENOMEM; -+ -+ for (i = 0; i < pdata->num_leds; i++) { -+ struct pwmled *led = leds + i; -+ const struct gpio_led *dat = pdata->leds + i; -+ u32 tmp; -+ -+ led->cdev.name = dat->name; -+ led->cdev.brightness = LED_OFF; -+ led->cdev.brightness_set = pwmled_brightness; -+ led->cdev.default_trigger = dat->default_trigger; -+ -+ led->active_low = dat->active_low; -+ -+ status = pwm_channel_alloc(dat->gpio, &led->pwmc); -+ if (status < 0) -+ goto err; -+ -+ /* -+ * Prescale clock by 2^x, so PWM counts in low MHz. -+ * Start each cycle with the LED active, so increasing -+ * the duty cycle gives us more time on (== brighter). -+ */ -+ tmp = 5; -+ if (!led->active_low) -+ tmp |= PWM_CPR_CPOL; -+ pwm_channel_writel(&led->pwmc, PWM_CMR, tmp); -+ -+ /* -+ * Pick a period so PWM cycles at 100+ Hz; and a multiplier -+ * for scaling duty cycle: brightness * mult. -+ */ -+ tmp = (led->pwmc.mck / (1 << 5)) / 100; -+ tmp /= 255; -+ led->mult = tmp; -+ pwm_channel_writel(&led->pwmc, PWM_CDTY, -+ led->cdev.brightness * 255); -+ pwm_channel_writel(&led->pwmc, PWM_CPRD, -+ LED_FULL * tmp); -+ -+ pwm_channel_enable(&led->pwmc); -+ -+ /* Hand it over to the LED framework */ -+ status = led_classdev_register(&pdev->dev, &led->cdev); -+ if (status < 0) { -+ pwm_channel_free(&led->pwmc); -+ goto err; -+ } -+ } -+ -+ platform_set_drvdata(pdev, leds); -+ return 0; -+ -+err: -+ if (i > 0) { -+ for (i = i - 1; i >= 0; i--) { -+ led_classdev_unregister(&leds[i].cdev); -+ pwm_channel_free(&leds[i].pwmc); -+ } -+ } -+ kfree(leds); -+ -+ return status; -+} -+ -+static int __exit pwmled_remove(struct platform_device *pdev) -+{ -+ const struct gpio_led_platform_data *pdata; -+ struct pwmled *leds; -+ unsigned i; -+ -+ pdata = pdev->dev.platform_data; -+ leds = platform_get_drvdata(pdev); -+ -+ for (i = 0; i < pdata->num_leds; i++) { -+ struct pwmled *led = leds + i; -+ -+ led_classdev_unregister(&led->cdev); -+ pwm_channel_free(&led->pwmc); -+ } -+ -+ kfree(leds); -+ platform_set_drvdata(pdev, NULL); -+ return 0; -+} -+ -+static struct platform_driver pwmled_driver = { -+ .driver = { -+ .name = "leds-atmel-pwm", -+ .owner = THIS_MODULE, -+ }, -+ /* REVISIT add suspend() and resume() methods */ -+ .remove = __exit_p(pwmled_remove), -+}; -+ -+static int __init modinit(void) -+{ -+ return platform_driver_probe(&pwmled_driver, pwmled_probe); -+} -+module_init(modinit); -+ -+static void __exit modexit(void) -+{ -+ platform_driver_unregister(&pwmled_driver); -+} -+module_exit(modexit); -+ -+MODULE_DESCRIPTION("Driver for LEDs with PWM-controlled brightness"); -+MODULE_LICENSE("GPL"); -diff -Nrup linux-2.6.24/drivers/leds/Makefile linux-avr32/drivers/leds/Makefile ---- linux-2.6.24/drivers/leds/Makefile 2008-01-24 17:58:37.000000000 -0500 -+++ linux-avr32/drivers/leds/Makefile 2008-02-01 14:51:38.000000000 -0500 -@@ -5,6 +5,7 @@ obj-$(CONFIG_LEDS_CLASS) += led-class.o - obj-$(CONFIG_LEDS_TRIGGERS) += led-triggers.o - - # LED Platform Drivers -+obj-$(CONFIG_LEDS_ATMEL_PWM) += leds-atmel-pwm.o - obj-$(CONFIG_LEDS_CORGI) += leds-corgi.o - obj-$(CONFIG_LEDS_LOCOMO) += leds-locomo.o - obj-$(CONFIG_LEDS_SPITZ) += leds-spitz.o -diff -Nrup linux-2.6.24/drivers/misc/atmel_pwm.c linux-avr32/drivers/misc/atmel_pwm.c ---- linux-2.6.24/drivers/misc/atmel_pwm.c 1969-12-31 19:00:00.000000000 -0500 -+++ linux-avr32/drivers/misc/atmel_pwm.c 2008-02-01 14:51:39.000000000 -0500 -@@ -0,0 +1,409 @@ -+#include <linux/module.h> -+#include <linux/clk.h> -+#include <linux/err.h> -+#include <linux/io.h> -+#include <linux/interrupt.h> -+#include <linux/platform_device.h> -+#include <linux/atmel_pwm.h> -+ -+ -+/* -+ * This is a simple driver for the PWM controller found in various newer -+ * Atmel SOCs, including the AVR32 series and the AT91sam9263. -+ * -+ * Chips with current Linux ports have only 4 PWM channels, out of max 32. -+ * AT32UC3A and AT32UC3B chips have 7 channels (but currently no Linux). -+ * Docs are inconsistent about the width of the channel counter registers; -+ * it's at least 16 bits, but several places say 20 bits. -+ */ -+#define PWM_NCHAN 4 /* max 32 */ -+ -+struct pwm { -+ spinlock_t lock; -+ struct platform_device *pdev; -+ u32 mask; -+ int irq; -+ void __iomem *base; -+ struct clk *clk; -+ struct pwm_channel *channel[PWM_NCHAN]; -+ void (*handler[PWM_NCHAN])(struct pwm_channel *); -+}; -+ -+ -+/* global PWM controller registers */ -+#define PWM_MR 0x00 -+#define PWM_ENA 0x04 -+#define PWM_DIS 0x08 -+#define PWM_SR 0x0c -+#define PWM_IER 0x10 -+#define PWM_IDR 0x14 -+#define PWM_IMR 0x18 -+#define PWM_ISR 0x1c -+ -+static inline void pwm_writel(const struct pwm *p, unsigned offset, u32 val) -+{ -+ __raw_writel(val, p->base + offset); -+} -+ -+static inline u32 pwm_readl(const struct pwm *p, unsigned offset) -+{ -+ return __raw_readl(p->base + offset); -+} -+ -+static inline void __iomem *pwmc_regs(const struct pwm *p, int index) -+{ -+ return p->base + 0x200 + index * 0x20; -+} -+ -+static struct pwm *pwm; -+ -+static void pwm_dumpregs(struct pwm_channel *ch, char *tag) -+{ -+ struct device *dev = &pwm->pdev->dev; -+ -+ dev_dbg(dev, "%s: mr %08x, sr %08x, imr %08x\n", -+ tag, -+ pwm_readl(pwm, PWM_MR), -+ pwm_readl(pwm, PWM_SR), -+ pwm_readl(pwm, PWM_IMR)); -+ dev_dbg(dev, -+ "pwm ch%d - mr %08x, dty %u, prd %u, cnt %u\n", -+ ch->index, -+ pwm_channel_readl(ch, PWM_CMR), -+ pwm_channel_readl(ch, PWM_CDTY), -+ pwm_channel_readl(ch, PWM_CPRD), -+ pwm_channel_readl(ch, PWM_CCNT)); -+} -+ -+ -+/** -+ * pwm_channel_alloc - allocate an unused PWM channel -+ * @index: identifies the channel -+ * @ch: structure to be initialized -+ * -+ * Drivers allocate PWM channels according to the board's wiring, and -+ * matching board-specific setup code. Returns zero or negative errno. -+ */ -+int pwm_channel_alloc(int index, struct pwm_channel *ch) -+{ -+ unsigned long flags; -+ int status = 0; -+ -+ /* insist on PWM init, with this signal pinned out */ -+ if (!pwm || !(pwm->mask & 1 << index)) -+ return -ENODEV; -+ -+ if (index < 0 || index >= PWM_NCHAN || !ch) -+ return -EINVAL; -+ memset(ch, 0, sizeof *ch); -+ -+ spin_lock_irqsave(&pwm->lock, flags); -+ if (pwm->channel[index]) -+ status = -EBUSY; -+ else { -+ clk_enable(pwm->clk); -+ -+ ch->regs = pwmc_regs(pwm, index); -+ ch->index = index; -+ -+ /* REVISIT: ap7000 seems to go 2x as fast as we expect!! */ -+ ch->mck = clk_get_rate(pwm->clk); -+ -+ pwm->channel[index] = ch; -+ pwm->handler[index] = NULL; -+ -+ /* channel and irq are always disabled when we return */ -+ pwm_writel(pwm, PWM_DIS, 1 << index); -+ pwm_writel(pwm, PWM_IDR, 1 << index); -+ } -+ spin_unlock_irqrestore(&pwm->lock, flags); -+ return status; -+} -+EXPORT_SYMBOL(pwm_channel_alloc); -+ -+static int pwmcheck(struct pwm_channel *ch) -+{ -+ int index; -+ -+ if (!pwm) -+ return -ENODEV; -+ if (!ch) -+ return -EINVAL; -+ index = ch->index; -+ if (index < 0 || index >= PWM_NCHAN || pwm->channel[index] != ch) -+ return -EINVAL; -+ -+ return index; -+} -+ -+/** -+ * pwm_channel_free - release a previously allocated channel -+ * @ch: the channel being released -+ * -+ * The channel is completely shut down (counter and IRQ disabled), -+ * and made available for re-use. Returns zero, or negative errno. -+ */ -+int pwm_channel_free(struct pwm_channel *ch) -+{ -+ unsigned long flags; -+ int t; -+ -+ spin_lock_irqsave(&pwm->lock, flags); -+ t = pwmcheck(ch); -+ if (t >= 0) { -+ pwm->channel[t] = NULL; -+ pwm->handler[t] = NULL; -+ -+ /* channel and irq are always disabled when we return */ -+ pwm_writel(pwm, PWM_DIS, 1 << t); -+ pwm_writel(pwm, PWM_IDR, 1 << t); -+ -+ clk_disable(pwm->clk); -+ t = 0; -+ } -+ spin_unlock_irqrestore(&pwm->lock, flags); -+ return t; -+} -+EXPORT_SYMBOL(pwm_channel_free); -+ -+int __pwm_channel_onoff(struct pwm_channel *ch, int enabled) -+{ -+ unsigned long flags; -+ int t; -+ -+ /* OMITTED FUNCTIONALITY: starting several channels in synch */ -+ -+ spin_lock_irqsave(&pwm->lock, flags); -+ t = pwmcheck(ch); -+ if (t >= 0) { -+ pwm_writel(pwm, enabled ? PWM_ENA : PWM_DIS, 1 << t); -+ t = 0; -+ pwm_dumpregs(ch, enabled ? "enable" : "disable"); -+ } -+ spin_unlock_irqrestore(&pwm->lock, flags); -+ -+ return t; -+} -+EXPORT_SYMBOL(__pwm_channel_onoff); -+ -+/** -+ * pwm_clk_alloc - allocate and configure CLKA or CLKB -+ * @prescale: from 0..10, the power of two used to divide MCK -+ * @div: from 1..255, the linear divisor to use -+ * -+ * Returns PWM_CPR_CLKA, PWM_CPR_CLKB, or negative errno. The allocated -+ * clock will run with a period of (2^prescale * div) / MCK, or twice as -+ * long if center aligned PWM output is used. The clock must later be -+ * deconfigured using pwm_clk_free(). -+ */ -+int pwm_clk_alloc(unsigned prescale, unsigned div) -+{ -+ unsigned long flags; -+ u32 mr; -+ u32 val = (prescale << 8) | div; -+ int ret = -EBUSY; -+ -+ if (prescale >= 10 || div == 0 || div > 255) -+ return -EINVAL; -+ -+ spin_lock_irqsave(&pwm->lock, flags); -+ mr = pwm_readl(pwm, PWM_MR); -+ if ((mr & 0xffff) == 0) { -+ mr |= val; -+ ret = PWM_CPR_CLKA; -+ } -+ if ((mr & (0xffff << 16)) == 0) { -+ mr |= val << 16; -+ ret = PWM_CPR_CLKB; -+ } -+ if (ret > 0) -+ pwm_writel(pwm, PWM_MR, mr); -+ spin_unlock_irqrestore(&pwm->lock, flags); -+ return ret; -+} -+EXPORT_SYMBOL(pwm_clk_alloc); -+ -+/** -+ * pwm_clk_free - deconfigure and release CLKA or CLKB -+ * -+ * Reverses the effect of pwm_clk_alloc(). -+ */ -+void pwm_clk_free(unsigned clk) -+{ -+ unsigned long flags; -+ u32 mr; -+ -+ spin_lock_irqsave(&pwm->lock, flags); -+ mr = pwm_readl(pwm, PWM_MR); -+ if (clk == PWM_CPR_CLKA) -+ pwm_writel(pwm, PWM_MR, mr & ~(0xffff << 0)); -+ if (clk == PWM_CPR_CLKB) -+ pwm_writel(pwm, PWM_MR, mr & ~(0xffff << 16)); -+ spin_unlock_irqrestore(&pwm->lock, flags); -+} -+EXPORT_SYMBOL(pwm_clk_free); -+ -+/** -+ * pwm_channel_handler - manage channel's IRQ handler -+ * @ch: the channel -+ * @handler: the handler to use, possibly NULL -+ * -+ * If the handler is non-null, the handler will be called after every -+ * period of this PWM channel. If the handler is null, this channel -+ * won't generate an IRQ. -+ */ -+int pwm_channel_handler(struct pwm_channel *ch, -+ void (*handler)(struct pwm_channel *ch)) -+{ -+ unsigned long flags; -+ int t; -+ -+ spin_lock_irqsave(&pwm->lock, flags); -+ t = pwmcheck(ch); -+ if (t >= 0) { -+ pwm->handler[t] = handler; -+ pwm_writel(pwm, handler ? PWM_IER : PWM_IDR, 1 << t); -+ t = 0; -+ } -+ spin_unlock_irqrestore(&pwm->lock, flags); -+ -+ return t; -+} -+EXPORT_SYMBOL(pwm_channel_handler); -+ -+static irqreturn_t pwm_irq(int id, void *_pwm) -+{ -+ struct pwm *p = _pwm; -+ irqreturn_t handled = IRQ_NONE; -+ u32 irqstat; -+ int index; -+ -+ spin_lock(&p->lock); -+ -+ /* ack irqs, then handle them */ -+ irqstat = pwm_readl(pwm, PWM_ISR); -+ -+ while (irqstat) { -+ struct pwm_channel *ch; -+ void (*handler)(struct pwm_channel *ch); -+ -+ index = ffs(irqstat) - 1; -+ irqstat &= ~(1 << index); -+ ch = pwm->channel[index]; -+ handler = pwm->handler[index]; -+ if (handler && ch) { -+ spin_unlock(&p->lock); -+ handler(ch); -+ spin_lock(&p->lock); -+ handled = IRQ_HANDLED; -+ } -+ } -+ -+ spin_unlock(&p->lock); -+ return handled; -+} -+ -+static int __init pwm_probe(struct platform_device *pdev) -+{ -+ struct resource *r = platform_get_resource(pdev, IORESOURCE_MEM, 0); -+ int irq = platform_get_irq(pdev, 0); -+ u32 *mp = pdev->dev.platform_data; -+ struct pwm *p; -+ int status = -EIO; -+ -+ if (pwm) -+ return -EBUSY; -+ if (!r || irq < 0 || !mp || !*mp) -+ return -ENODEV; -+ if (*mp & ~((1<<PWM_NCHAN)-1)) { -+ dev_warn(&pdev->dev, "mask 0x%x ... more than %d channels\n", -+ *mp, PWM_NCHAN); -+ return -EINVAL; -+ } -+ -+ p = kzalloc(sizeof(*p), GFP_KERNEL); -+ if (!p) -+ return -ENOMEM; -+ -+ spin_lock_init(&p->lock); -+ p->pdev = pdev; -+ p->mask = *mp; -+ p->irq = irq; -+ p->base = ioremap(r->start, r->end - r->start + 1); -+ if (!p->base) -+ goto fail; -+ p->clk = clk_get(&pdev->dev, "mck"); -+ if (IS_ERR(p->clk)) { -+ status = PTR_ERR(p->clk); -+ p->clk = NULL; -+ goto fail; -+ } -+ -+ status = request_irq(irq, pwm_irq, 0, pdev->name, p); -+ if (status < 0) -+ goto fail; -+ -+ pwm = p; -+ platform_set_drvdata(pdev, p); -+ -+ return 0; -+ -+fail: -+ if (p->clk) -+ clk_put(p->clk); -+ if (p->base) -+ iounmap(p->base); -+ -+ kfree(p); -+ return status; -+} -+ -+static int __exit pwm_remove(struct platform_device *pdev) -+{ -+ struct pwm *p = platform_get_drvdata(pdev); -+ -+ if (p != pwm) -+ return -EINVAL; -+ -+ clk_enable(pwm->clk); -+ pwm_writel(pwm, PWM_DIS, (1 << PWM_NCHAN) - 1); -+ pwm_writel(pwm, PWM_IDR, (1 << PWM_NCHAN) - 1); -+ clk_disable(pwm->clk); -+ -+ pwm = NULL; -+ -+ free_irq(p->irq, p); -+ clk_put(p->clk); -+ iounmap(p->base); -+ kfree(p); -+ -+ return 0; -+} -+ -+static struct platform_driver atmel_pwm_driver = { -+ .driver = { -+ .name = "atmel_pwm", -+ .owner = THIS_MODULE, -+ }, -+ .remove = __exit_p(pwm_remove), -+ -+ /* NOTE: PWM can keep running in AVR32 "idle" and "frozen" states; -+ * and all AT91sam9263 states, albeit at reduced clock rate if -+ * MCK becomes the slow clock (i.e. what Linux labels STR). -+ */ -+}; -+ -+static int __init pwm_init(void) -+{ -+ return platform_driver_probe(&atmel_pwm_driver, pwm_probe); -+} -+module_init(pwm_init); -+ -+static void __exit pwm_exit(void) -+{ -+ platform_driver_unregister(&atmel_pwm_driver); -+} -+module_exit(pwm_exit); -+ -+MODULE_DESCRIPTION("Driver for AT32/AT91 PWM module"); -+MODULE_LICENSE("GPL"); -diff -Nrup linux-2.6.24/drivers/misc/Kconfig linux-avr32/drivers/misc/Kconfig ---- linux-2.6.24/drivers/misc/Kconfig 2008-01-24 17:58:37.000000000 -0500 -+++ linux-avr32/drivers/misc/Kconfig 2008-02-01 14:51:39.000000000 -0500 -@@ -13,6 +13,15 @@ menuconfig MISC_DEVICES - - if MISC_DEVICES - -+config ATMEL_PWM -+ tristate "Atmel AT32/AT91 PWM support" -+ depends on (AVR32 || AT91) && EXPERIMENTAL -+ help -+ This option enables device driver support for the PWM channels -+ on certain Atmel prcoessors. Pulse Width Modulation is used for -+ purposes including software controlled power-efficent backlights -+ on LCD displays, motor control, and waveform generation. -+ - config IBM_ASM - tristate "Device driver for IBM RSA service processor" - depends on X86 && PCI && INPUT && EXPERIMENTAL -diff -Nrup linux-2.6.24/drivers/misc/Makefile linux-avr32/drivers/misc/Makefile ---- linux-2.6.24/drivers/misc/Makefile 2008-01-24 17:58:37.000000000 -0500 -+++ linux-avr32/drivers/misc/Makefile 2008-02-01 14:51:39.000000000 -0500 -@@ -7,6 +7,7 @@ obj-$(CONFIG_IBM_ASM) += ibmasm/ - obj-$(CONFIG_HDPU_FEATURES) += hdpuftrs/ - obj-$(CONFIG_MSI_LAPTOP) += msi-laptop.o - obj-$(CONFIG_ASUS_LAPTOP) += asus-laptop.o -+obj-$(CONFIG_ATMEL_PWM) += atmel_pwm.o - obj-$(CONFIG_ATMEL_SSC) += atmel-ssc.o - obj-$(CONFIG_LKDTM) += lkdtm.o - obj-$(CONFIG_TIFM_CORE) += tifm_core.o -diff -Nrup linux-2.6.24/drivers/mmc/host/atmel-mci.c linux-avr32/drivers/mmc/host/atmel-mci.c ---- linux-2.6.24/drivers/mmc/host/atmel-mci.c 1969-12-31 19:00:00.000000000 -0500 -+++ linux-avr32/drivers/mmc/host/atmel-mci.c 2008-02-01 14:51:39.000000000 -0500 -@@ -0,0 +1,1176 @@ -+/* -+ * Atmel MultiMedia Card Interface driver -+ * -+ * Copyright (C) 2004-2006 Atmel Corporation -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 as -+ * published by the Free Software Foundation. -+ */ -+#include <linux/blkdev.h> -+#include <linux/clk.h> -+#include <linux/device.h> -+#include <linux/dma-mapping.h> -+#include <linux/init.h> -+#include <linux/interrupt.h> -+#include <linux/ioport.h> -+#include <linux/module.h> -+#include <linux/platform_device.h> -+ -+#include <linux/mmc/host.h> -+ -+#include <asm/dma-controller.h> -+#include <asm/io.h> -+#include <asm/arch/board.h> -+#include <asm/arch/gpio.h> -+ -+#include "atmel-mci.h" -+ -+#define DRIVER_NAME "atmel_mci" -+ -+#define MCI_DATA_ERROR_FLAGS (MCI_BIT(DCRCE) | MCI_BIT(DTOE) | \ -+ MCI_BIT(OVRE) | MCI_BIT(UNRE)) -+ -+enum { -+ EVENT_CMD_COMPLETE = 0, -+ EVENT_DATA_COMPLETE, -+ EVENT_DATA_ERROR, -+ EVENT_STOP_SENT, -+ EVENT_STOP_COMPLETE, -+ EVENT_DMA_COMPLETE, -+ EVENT_DMA_ERROR, -+ EVENT_CARD_DETECT, -+}; -+ -+struct atmel_mci_dma { -+ struct dma_request_sg req; -+ unsigned short rx_periph_id; -+ unsigned short tx_periph_id; -+}; -+ -+struct atmel_mci { -+ struct mmc_host *mmc; -+ void __iomem *regs; -+ struct atmel_mci_dma dma; -+ -+ struct mmc_request *mrq; -+ struct mmc_command *cmd; -+ struct mmc_data *data; -+ -+ u32 cmd_status; -+ u32 data_status; -+ u32 stop_status; -+ u32 stop_cmdr; -+ -+ struct tasklet_struct tasklet; -+ unsigned long pending_events; -+ unsigned long completed_events; -+ -+ int present; -+ int detect_pin; -+ int wp_pin; -+ -+ unsigned long bus_hz; -+ unsigned long mapbase; -+ struct clk *mck; -+ struct platform_device *pdev; -+ -+#ifdef CONFIG_DEBUG_FS -+ struct dentry *debugfs_root; -+ struct dentry *debugfs_regs; -+ struct dentry *debugfs_req; -+ struct dentry *debugfs_pending_events; -+ struct dentry *debugfs_completed_events; -+#endif -+}; -+ -+/* Those printks take an awful lot of time... */ -+#ifndef DEBUG -+static unsigned int fmax = 15000000U; -+#else -+static unsigned int fmax = 1000000U; -+#endif -+module_param(fmax, uint, 0444); -+MODULE_PARM_DESC(fmax, "Max frequency in Hz of the MMC bus clock"); -+ -+/* Test bit macros for completed events */ -+#define mci_cmd_is_complete(host) \ -+ test_bit(EVENT_CMD_COMPLETE, &host->completed_events) -+#define mci_data_is_complete(host) \ -+ test_bit(EVENT_DATA_COMPLETE, &host->completed_events) -+#define mci_data_error_is_complete(host) \ -+ test_bit(EVENT_DATA_ERROR, &host->completed_events) -+#define mci_stop_sent_is_complete(host) \ -+ test_bit(EVENT_STOP_SENT, &host->completed_events) -+#define mci_stop_is_complete(host) \ -+ test_bit(EVENT_STOP_COMPLETE, &host->completed_events) -+#define mci_dma_is_complete(host) \ -+ test_bit(EVENT_DMA_COMPLETE, &host->completed_events) -+#define mci_dma_error_is_complete(host) \ -+ test_bit(EVENT_DMA_ERROR, &host->completed_events) -+#define mci_card_detect_is_complete(host) \ -+ test_bit(EVENT_CARD_DETECT, &host->completed_events) -+ -+/* Test and clear bit macros for pending events */ -+#define mci_clear_cmd_is_pending(host) \ -+ test_and_clear_bit(EVENT_CMD_COMPLETE, &host->pending_events) -+#define mci_clear_data_is_pending(host) \ -+ test_and_clear_bit(EVENT_DATA_COMPLETE, &host->pending_events) -+#define mci_clear_data_error_is_pending(host) \ -+ test_and_clear_bit(EVENT_DATA_ERROR, &host->pending_events) -+#define mci_clear_stop_sent_is_pending(host) \ -+ test_and_clear_bit(EVENT_STOP_SENT, &host->pending_events) -+#define mci_clear_stop_is_pending(host) \ -+ test_and_clear_bit(EVENT_STOP_COMPLETE, &host->pending_events) -+#define mci_clear_dma_error_is_pending(host) \ -+ test_and_clear_bit(EVENT_DMA_ERROR, &host->pending_events) -+#define mci_clear_card_detect_is_pending(host) \ -+ test_and_clear_bit(EVENT_CARD_DETECT, &host->pending_events) -+ -+/* Test and set bit macros for completed events */ -+#define mci_set_cmd_is_completed(host) \ -+ test_and_set_bit(EVENT_CMD_COMPLETE, &host->completed_events) -+#define mci_set_data_is_completed(host) \ -+ test_and_set_bit(EVENT_DATA_COMPLETE, &host->completed_events) -+#define mci_set_data_error_is_completed(host) \ -+ test_and_set_bit(EVENT_DATA_ERROR, &host->completed_events) -+#define mci_set_stop_sent_is_completed(host) \ -+ test_and_set_bit(EVENT_STOP_SENT, &host->completed_events) -+#define mci_set_stop_is_completed(host) \ -+ test_and_set_bit(EVENT_STOP_COMPLETE, &host->completed_events) -+#define mci_set_dma_error_is_completed(host) \ -+ test_and_set_bit(EVENT_DMA_ERROR, &host->completed_events) -+#define mci_set_card_detect_is_completed(host) \ -+ test_and_set_bit(EVENT_CARD_DETECT, &host->completed_events) -+ -+/* Set bit macros for completed events */ -+#define mci_set_cmd_complete(host) \ -+ set_bit(EVENT_CMD_COMPLETE, &host->completed_events) -+#define mci_set_data_complete(host) \ -+ set_bit(EVENT_DATA_COMPLETE, &host->completed_events) -+#define mci_set_data_error_complete(host) \ -+ set_bit(EVENT_DATA_ERROR, &host->completed_events) -+#define mci_set_stop_sent_complete(host) \ -+ set_bit(EVENT_STOP_SENT, &host->completed_events) -+#define mci_set_stop_complete(host) \ -+ set_bit(EVENT_STOP_COMPLETE, &host->completed_events) -+#define mci_set_dma_complete(host) \ -+ set_bit(EVENT_DMA_COMPLETE, &host->completed_events) -+#define mci_set_dma_error_complete(host) \ -+ set_bit(EVENT_DMA_ERROR, &host->completed_events) -+#define mci_set_card_detect_complete(host) \ -+ set_bit(EVENT_CARD_DETECT, &host->completed_events) -+ -+/* Set bit macros for pending events */ -+#define mci_set_cmd_pending(host) \ -+ set_bit(EVENT_CMD_COMPLETE, &host->pending_events) -+#define mci_set_data_pending(host) \ -+ set_bit(EVENT_DATA_COMPLETE, &host->pending_events) -+#define mci_set_data_error_pending(host) \ -+ set_bit(EVENT_DATA_ERROR, &host->pending_events) -+#define mci_set_stop_sent_pending(host) \ -+ set_bit(EVENT_STOP_SENT, &host->pending_events) -+#define mci_set_stop_pending(host) \ -+ set_bit(EVENT_STOP_COMPLETE, &host->pending_events) -+#define mci_set_dma_error_pending(host) \ -+ set_bit(EVENT_DMA_ERROR, &host->pending_events) -+#define mci_set_card_detect_pending(host) \ -+ set_bit(EVENT_CARD_DETECT, &host->pending_events) -+ -+/* Clear bit macros for pending events */ -+#define mci_clear_cmd_pending(host) \ -+ clear_bit(EVENT_CMD_COMPLETE, &host->pending_events) -+#define mci_clear_data_pending(host) \ -+ clear_bit(EVENT_DATA_COMPLETE, &host->pending_events) -+#define mci_clear_data_error_pending(host) \ -+ clear_bit(EVENT_DATA_ERROR, &host->pending_events) -+#define mci_clear_stop_sent_pending(host) \ -+ clear_bit(EVENT_STOP_SENT, &host->pending_events) -+#define mci_clear_stop_pending(host) \ -+ clear_bit(EVENT_STOP_COMPLETE, &host->pending_events) -+#define mci_clear_dma_error_pending(host) \ -+ clear_bit(EVENT_DMA_ERROR, &host->pending_events) -+#define mci_clear_card_detect_pending(host) \ -+ clear_bit(EVENT_CARD_DETECT, &host->pending_events) -+ -+ -+#ifdef CONFIG_DEBUG_FS -+#include <linux/debugfs.h> -+ -+#define DBG_REQ_BUF_SIZE (4096 - sizeof(unsigned int)) -+ -+struct req_dbg_data { -+ unsigned int nbytes; -+ char str[DBG_REQ_BUF_SIZE]; -+}; -+ -+static int req_dbg_open(struct inode *inode, struct file *file) -+{ -+ struct atmel_mci *host; -+ struct mmc_request *mrq; -+ struct mmc_command *cmd, *stop; -+ struct mmc_data *data; -+ struct req_dbg_data *priv; -+ char *str; -+ unsigned long n = 0; -+ -+ priv = kzalloc(DBG_REQ_BUF_SIZE, GFP_KERNEL); -+ if (!priv) -+ return -ENOMEM; -+ str = priv->str; -+ -+ mutex_lock(&inode->i_mutex); -+ host = inode->i_private; -+ -+ spin_lock_irq(&host->mmc->lock); -+ mrq = host->mrq; -+ if (mrq) { -+ cmd = mrq->cmd; -+ data = mrq->data; -+ stop = mrq->stop; -+ n = snprintf(str, DBG_REQ_BUF_SIZE, -+ "CMD%u(0x%x) %x %x %x %x %x (err %u)\n", -+ cmd->opcode, cmd->arg, cmd->flags, -+ cmd->resp[0], cmd->resp[1], cmd->resp[2], -+ cmd->resp[3], cmd->error); -+ if (n < DBG_REQ_BUF_SIZE && data) -+ n += snprintf(str + n, DBG_REQ_BUF_SIZE - n, -+ "DATA %u * %u (%u) %x (err %u)\n", -+ data->blocks, data->blksz, -+ data->bytes_xfered, data->flags, -+ data->error); -+ if (n < DBG_REQ_BUF_SIZE && stop) -+ n += snprintf(str + n, DBG_REQ_BUF_SIZE - n, -+ "CMD%u(0x%x) %x %x %x %x %x (err %u)\n", -+ stop->opcode, stop->arg, stop->flags, -+ stop->resp[0], stop->resp[1], -+ stop->resp[2], stop->resp[3], -+ stop->error); -+ } -+ spin_unlock_irq(&host->mmc->lock); -+ mutex_unlock(&inode->i_mutex); -+ -+ priv->nbytes = min(n, DBG_REQ_BUF_SIZE); -+ file->private_data = priv; -+ -+ return 0; -+} -+ -+static ssize_t req_dbg_read(struct file *file, char __user *buf, -+ size_t nbytes, loff_t *ppos) -+{ -+ struct req_dbg_data *priv = file->private_data; -+ -+ return simple_read_from_buffer(buf, nbytes, ppos, -+ priv->str, priv->nbytes); -+} -+ -+static int req_dbg_release(struct inode *inode, struct file *file) -+{ -+ kfree(file->private_data); -+ return 0; -+} -+ -+static const struct file_operations req_dbg_fops = { -+ .owner = THIS_MODULE, -+ .open = req_dbg_open, -+ .llseek = no_llseek, -+ .read = req_dbg_read, -+ .release = req_dbg_release, -+}; -+ -+static int regs_dbg_open(struct inode *inode, struct file *file) -+{ -+ struct atmel_mci *host; -+ unsigned int i; -+ u32 *data; -+ int ret = -ENOMEM; -+ -+ mutex_lock(&inode->i_mutex); -+ host = inode->i_private; -+ data = kmalloc(inode->i_size, GFP_KERNEL); -+ if (!data) -+ goto out; -+ -+ spin_lock_irq(&host->mmc->lock); -+ for (i = 0; i < inode->i_size / 4; i++) -+ data[i] = __raw_readl(host->regs + i * 4); -+ spin_unlock_irq(&host->mmc->lock); -+ -+ file->private_data = data; -+ ret = 0; -+ -+out: -+ mutex_unlock(&inode->i_mutex); -+ -+ return ret; -+} -+ -+static ssize_t regs_dbg_read(struct file *file, char __user *buf, -+ size_t nbytes, loff_t *ppos) -+{ -+ struct inode *inode = file->f_dentry->d_inode; -+ int ret; -+ -+ mutex_lock(&inode->i_mutex); -+ ret = simple_read_from_buffer(buf, nbytes, ppos, -+ file->private_data, -+ file->f_dentry->d_inode->i_size); -+ mutex_unlock(&inode->i_mutex); -+ -+ return ret; -+} -+ -+static int regs_dbg_release(struct inode *inode, struct file *file) -+{ -+ kfree(file->private_data); -+ return 0; -+} -+ -+static const struct file_operations regs_dbg_fops = { -+ .owner = THIS_MODULE, -+ .open = regs_dbg_open, -+ .llseek = generic_file_llseek, -+ .read = regs_dbg_read, -+ .release = regs_dbg_release, -+}; -+ -+static void atmci_init_debugfs(struct atmel_mci *host) -+{ -+ struct mmc_host *mmc; -+ struct dentry *root, *regs; -+ struct resource *res; -+ -+ mmc = host->mmc; -+ root = debugfs_create_dir(mmc_hostname(mmc), NULL); -+ if (IS_ERR(root) || !root) -+ goto err_root; -+ host->debugfs_root = root; -+ -+ regs = debugfs_create_file("regs", 0400, root, host, ®s_dbg_fops); -+ if (!regs) -+ goto err_regs; -+ -+ res = platform_get_resource(host->pdev, IORESOURCE_MEM, 0); -+ regs->d_inode->i_size = res->end - res->start + 1; -+ host->debugfs_regs = regs; -+ -+ host->debugfs_req = debugfs_create_file("req", 0400, root, -+ host, &req_dbg_fops); -+ if (!host->debugfs_req) -+ goto err_req; -+ -+ host->debugfs_pending_events -+ = debugfs_create_u32("pending_events", 0400, root, -+ (u32 *)&host->pending_events); -+ if (!host->debugfs_pending_events) -+ goto err_pending_events; -+ -+ host->debugfs_completed_events -+ = debugfs_create_u32("completed_events", 0400, root, -+ (u32 *)&host->completed_events); -+ if (!host->debugfs_completed_events) -+ goto err_completed_events; -+ -+ return; -+ -+err_completed_events: -+ debugfs_remove(host->debugfs_pending_events); -+err_pending_events: -+ debugfs_remove(host->debugfs_req); -+err_req: -+ debugfs_remove(host->debugfs_regs); -+err_regs: -+ debugfs_remove(host->debugfs_root); -+err_root: -+ host->debugfs_root = NULL; -+ dev_err(&host->pdev->dev, -+ "failed to initialize debugfs for %s\n", -+ mmc_hostname(mmc)); -+} -+ -+static void atmci_cleanup_debugfs(struct atmel_mci *host) -+{ -+ if (host->debugfs_root) { -+ debugfs_remove(host->debugfs_completed_events); -+ debugfs_remove(host->debugfs_pending_events); -+ debugfs_remove(host->debugfs_req); -+ debugfs_remove(host->debugfs_regs); -+ debugfs_remove(host->debugfs_root); -+ host->debugfs_root = NULL; -+ } -+} -+#else -+static inline void atmci_init_debugfs(struct atmel_mci *host) -+{ -+ -+} -+ -+static inline void atmci_cleanup_debugfs(struct atmel_mci *host) -+{ -+ -+} -+#endif /* CONFIG_DEBUG_FS */ -+ -+static inline unsigned int ns_to_clocks(struct atmel_mci *host, -+ unsigned int ns) -+{ -+ return (ns * (host->bus_hz / 1000000) + 999) / 1000; -+} -+ -+static void atmci_set_timeout(struct atmel_mci *host, -+ struct mmc_data *data) -+{ -+ static unsigned dtomul_to_shift[] = { -+ 0, 4, 7, 8, 10, 12, 16, 20 -+ }; -+ unsigned timeout; -+ unsigned dtocyc, dtomul; -+ -+ timeout = ns_to_clocks(host, data->timeout_ns) + data->timeout_clks; -+ -+ for (dtomul = 0; dtomul < 8; dtomul++) { -+ unsigned shift = dtomul_to_shift[dtomul]; -+ dtocyc = (timeout + (1 << shift) - 1) >> shift; -+ if (dtocyc < 15) -+ break; -+ } -+ -+ if (dtomul >= 8) { -+ dtomul = 7; -+ dtocyc = 15; -+ } -+ -+ dev_dbg(&host->mmc->class_dev, "setting timeout to %u cycles\n", -+ dtocyc << dtomul_to_shift[dtomul]); -+ mci_writel(host, DTOR, (MCI_BF(DTOMUL, dtomul) -+ | MCI_BF(DTOCYC, dtocyc))); -+} -+ -+/* -+ * Return mask with command flags to be enabled for this command. -+ */ -+static u32 atmci_prepare_command(struct mmc_host *mmc, -+ struct mmc_command *cmd) -+{ -+ u32 cmdr; -+ -+ cmd->error = 0; -+ -+ cmdr = MCI_BF(CMDNB, cmd->opcode); -+ -+ if (cmd->flags & MMC_RSP_PRESENT) { -+ if (cmd->flags & MMC_RSP_136) -+ cmdr |= MCI_BF(RSPTYP, MCI_RSPTYP_136_BIT); -+ else -+ cmdr |= MCI_BF(RSPTYP, MCI_RSPTYP_48_BIT); -+ } -+ -+ /* -+ * This should really be MAXLAT_5 for CMD2 and ACMD41, but -+ * it's too difficult to determine whether this is an ACMD or -+ * not. Better make it 64. -+ */ -+ cmdr |= MCI_BIT(MAXLAT); -+ -+ if (mmc->ios.bus_mode == MMC_BUSMODE_OPENDRAIN) -+ cmdr |= MCI_BIT(OPDCMD); -+ -+ dev_dbg(&mmc->class_dev, -+ "cmd: op %02x arg %08x flags %08x, cmdflags %08lx\n", -+ cmd->opcode, cmd->arg, cmd->flags, (unsigned long)cmdr); -+ -+ return cmdr; -+} -+ -+static void atmci_start_command(struct atmel_mci *host, -+ struct mmc_command *cmd, -+ u32 cmd_flags) -+{ -+ WARN_ON(host->cmd); -+ host->cmd = cmd; -+ -+ mci_writel(host, ARGR, cmd->arg); -+ mci_writel(host, CMDR, cmd_flags); -+ -+ if (cmd->data) -+ dma_start_request(host->dma.req.req.dmac, -+ host->dma.req.req.channel); -+} -+ -+/* -+ * Returns a mask of flags to be set in the command register when the -+ * command to start the transfer is to be sent. -+ */ -+static u32 atmci_prepare_data(struct mmc_host *mmc, struct mmc_data *data) -+{ -+ struct atmel_mci *host = mmc_priv(mmc); -+ u32 cmd_flags; -+ -+ WARN_ON(host->data); -+ host->data = data; -+ -+ atmci_set_timeout(host, data); -+ mci_writel(host, BLKR, (MCI_BF(BCNT, data->blocks) -+ | MCI_BF(BLKLEN, data->blksz))); -+ host->dma.req.block_size = data->blksz; -+ host->dma.req.nr_blocks = data->blocks; -+ -+ cmd_flags = MCI_BF(TRCMD, MCI_TRCMD_START_TRANS); -+ if (data->flags & MMC_DATA_STREAM) -+ cmd_flags |= MCI_BF(TRTYP, MCI_TRTYP_STREAM); -+ else if (data->blocks > 1) -+ cmd_flags |= MCI_BF(TRTYP, MCI_TRTYP_MULTI_BLOCK); -+ else -+ cmd_flags |= MCI_BF(TRTYP, MCI_TRTYP_BLOCK); -+ -+ if (data->flags & MMC_DATA_READ) { -+ cmd_flags |= MCI_BIT(TRDIR); -+ host->dma.req.nr_sg -+ = dma_map_sg(&host->pdev->dev, data->sg, -+ data->sg_len, DMA_FROM_DEVICE); -+ host->dma.req.periph_id = host->dma.rx_periph_id; -+ host->dma.req.direction = DMA_DIR_PERIPH_TO_MEM; -+ host->dma.req.data_reg = host->mapbase + MCI_RDR; -+ } else { -+ host->dma.req.nr_sg -+ = dma_map_sg(&host->pdev->dev, data->sg, -+ data->sg_len, DMA_TO_DEVICE); -+ host->dma.req.periph_id = host->dma.tx_periph_id; -+ host->dma.req.direction = DMA_DIR_MEM_TO_PERIPH; -+ host->dma.req.data_reg = host->mapbase + MCI_TDR; -+ } -+ host->dma.req.sg = data->sg; -+ -+ dma_prepare_request_sg(host->dma.req.req.dmac, &host->dma.req); -+ -+ return cmd_flags; -+} -+ -+static void atmci_request(struct mmc_host *mmc, struct mmc_request *mrq) -+{ -+ struct atmel_mci *host = mmc_priv(mmc); -+ struct mmc_data *data = mrq->data; -+ u32 iflags; -+ u32 cmdflags = 0; -+ -+ iflags = mci_readl(host, IMR); -+ if (iflags) -+ dev_warn(&mmc->class_dev, "WARNING: IMR=0x%08x\n", -+ mci_readl(host, IMR)); -+ -+ WARN_ON(host->mrq != NULL); -+ host->mrq = mrq; -+ host->pending_events = 0; -+ host->completed_events = 0; -+ -+ iflags = MCI_BIT(CMDRDY); -+ cmdflags = atmci_prepare_command(mmc, mrq->cmd); -+ -+ if (mrq->stop) { -+ WARN_ON(!data); -+ -+ host->stop_cmdr = atmci_prepare_command(mmc, mrq->stop); -+ host->stop_cmdr |= MCI_BF(TRCMD, MCI_TRCMD_STOP_TRANS); -+ if (!(data->flags & MMC_DATA_WRITE)) -+ host->stop_cmdr |= MCI_BIT(TRDIR); -+ if (data->flags & MMC_DATA_STREAM) -+ host->stop_cmdr |= MCI_BF(TRTYP, MCI_TRTYP_STREAM); -+ else -+ host->stop_cmdr |= MCI_BF(TRTYP, MCI_TRTYP_MULTI_BLOCK); -+ } -+ if (data) { -+ cmdflags |= atmci_prepare_data(mmc, data); -+ iflags |= MCI_DATA_ERROR_FLAGS; -+ } -+ -+ atmci_start_command(host, mrq->cmd, cmdflags); -+ mci_writel(host, IER, iflags); -+} -+ -+static void atmci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios) -+{ -+ struct atmel_mci *host = mmc_priv(mmc); -+ u32 mr; -+ -+ if (ios->clock) { -+ u32 clkdiv; -+ -+ /* Set clock rate */ -+ clkdiv = host->bus_hz / (2 * ios->clock) - 1; -+ if (clkdiv > 255) { -+ dev_warn(&mmc->class_dev, -+ "clock %u too slow; using %lu\n", -+ ios->clock, host->bus_hz / (2 * 256)); -+ clkdiv = 255; -+ } -+ -+ mr = mci_readl(host, MR); -+ mr = MCI_BFINS(CLKDIV, clkdiv, mr) -+ | MCI_BIT(WRPROOF) | MCI_BIT(RDPROOF); -+ mci_writel(host, MR, mr); -+ -+ /* Enable the MCI controller */ -+ mci_writel(host, CR, MCI_BIT(MCIEN)); -+ } else { -+ /* Disable the MCI controller */ -+ mci_writel(host, CR, MCI_BIT(MCIDIS)); -+ } -+ -+ switch (ios->bus_width) { -+ case MMC_BUS_WIDTH_1: -+ mci_writel(host, SDCR, 0); -+ break; -+ case MMC_BUS_WIDTH_4: -+ mci_writel(host, SDCR, MCI_BIT(SDCBUS)); -+ break; -+ } -+ -+ switch (ios->power_mode) { -+ case MMC_POWER_ON: -+ /* Send init sequence (74 clock cycles) */ -+ mci_writel(host, IDR, ~0UL); -+ mci_writel(host, CMDR, MCI_BF(SPCMD, MCI_SPCMD_INIT_CMD)); -+ while (!(mci_readl(host, SR) & MCI_BIT(CMDRDY))) -+ cpu_relax(); -+ break; -+ default: -+ /* -+ * TODO: None of the currently available AVR32-based -+ * boards allow MMC power to be turned off. Implement -+ * power control when this can be tested properly. -+ */ -+ break; -+ } -+} -+ -+static int atmci_get_ro(struct mmc_host *mmc) -+{ -+ int read_only = 0; -+ struct atmel_mci *host = mmc_priv(mmc); -+ -+ if (host->wp_pin >= 0) { -+ read_only = gpio_get_value(host->wp_pin); -+ dev_dbg(&mmc->class_dev, "card is %s\n", -+ read_only ? "read-only" : "read-write"); -+ } else { -+ dev_dbg(&mmc->class_dev, -+ "no pin for checking read-only switch." -+ " Assuming write-enable.\n"); -+ } -+ -+ return read_only; -+} -+ -+static struct mmc_host_ops atmci_ops = { -+ .request = atmci_request, -+ .set_ios = atmci_set_ios, -+ .get_ro = atmci_get_ro, -+}; -+ -+static void atmci_request_end(struct mmc_host *mmc, struct mmc_request *mrq) -+{ -+ struct atmel_mci *host = mmc_priv(mmc); -+ -+ WARN_ON(host->cmd || host->data); -+ host->mrq = NULL; -+ -+ mmc_request_done(mmc, mrq); -+} -+ -+static void send_stop_cmd(struct mmc_host *mmc, struct mmc_data *data, -+ u32 flags) -+{ -+ struct atmel_mci *host = mmc_priv(mmc); -+ -+ atmci_start_command(host, data->stop, host->stop_cmdr | flags); -+ mci_writel(host, IER, MCI_BIT(CMDRDY)); -+} -+ -+static void atmci_data_complete(struct atmel_mci *host, struct mmc_data *data) -+{ -+ host->data = NULL; -+ dma_unmap_sg(&host->pdev->dev, data->sg, host->dma.req.nr_sg, -+ ((data->flags & MMC_DATA_WRITE) -+ ? DMA_TO_DEVICE : DMA_FROM_DEVICE)); -+ -+ /* -+ * Data might complete before command for very short transfers -+ * (like READ_SCR) -+ */ -+ if (mci_cmd_is_complete(host) -+ && (!data->stop || mci_stop_is_complete(host))) -+ atmci_request_end(host->mmc, data->mrq); -+} -+ -+static void atmci_command_complete(struct atmel_mci *host, -+ struct mmc_command *cmd, u32 status) -+{ -+ if (status & MCI_BIT(RTOE)) -+ cmd->error = -ETIMEDOUT; -+ else if ((cmd->flags & MMC_RSP_CRC) -+ && (status & MCI_BIT(RCRCE))) -+ cmd->error = -EILSEQ; -+ else if (status & (MCI_BIT(RINDE) | MCI_BIT(RDIRE) | MCI_BIT(RENDE))) -+ cmd->error = -EIO; -+ -+ if (cmd->error) { -+ dev_dbg(&host->mmc->class_dev, -+ "command error: op=0x%x status=0x%08x\n", -+ cmd->opcode, status); -+ -+ if (cmd->data) { -+ dma_stop_request(host->dma.req.req.dmac, -+ host->dma.req.req.channel); -+ mci_writel(host, IDR, MCI_BIT(NOTBUSY) -+ | MCI_DATA_ERROR_FLAGS); -+ host->data = NULL; -+ } -+ } -+} -+ -+static void atmci_tasklet_func(unsigned long priv) -+{ -+ struct mmc_host *mmc = (struct mmc_host *)priv; -+ struct atmel_mci *host = mmc_priv(mmc); -+ struct mmc_request *mrq = host->mrq; -+ struct mmc_data *data = host->data; -+ -+ dev_vdbg(&mmc->class_dev, -+ "tasklet: pending/completed/mask %lx/%lx/%x\n", -+ host->pending_events, host->completed_events, -+ mci_readl(host, IMR)); -+ -+ if (mci_clear_cmd_is_pending(host)) { -+ mci_set_cmd_complete(host); -+ atmci_command_complete(host, mrq->cmd, host->cmd_status); -+ if (!host->data || mci_data_is_complete(host) -+ || mci_data_error_is_complete(host)) -+ atmci_request_end(mmc, mrq); -+ } -+ if (mci_clear_stop_is_pending(host)) { -+ mci_set_stop_complete(host); -+ atmci_command_complete(host, mrq->stop, host->stop_status); -+ if (mci_data_is_complete(host) -+ || mci_data_error_is_complete(host)) -+ atmci_request_end(mmc, mrq); -+ } -+ if (mci_clear_dma_error_is_pending(host)) { -+ mci_set_dma_error_complete(host); -+ mci_clear_data_pending(host); -+ -+ /* DMA controller got bus error => invalid address */ -+ data->error = -EIO; -+ -+ dev_dbg(&mmc->class_dev, "dma error after %u bytes xfered\n", -+ host->data->bytes_xfered); -+ -+ if (data->stop -+ && !mci_set_stop_sent_is_completed(host)) -+ /* TODO: Check if card is still present */ -+ send_stop_cmd(host->mmc, data, 0); -+ -+ atmci_data_complete(host, data); -+ } -+ if (mci_clear_data_error_is_pending(host)) { -+ u32 status = host->data_status; -+ -+ mci_set_data_error_complete(host); -+ mci_clear_data_pending(host); -+ -+ dma_stop_request(host->dma.req.req.dmac, -+ host->dma.req.req.channel); -+ -+ if (status & MCI_BIT(DCRCE)) { -+ dev_dbg(&mmc->class_dev, "data CRC error\n"); -+ data->error = -EILSEQ; -+ } else if (status & MCI_BIT(DTOE)) { -+ dev_dbg(&mmc->class_dev, "data timeout error\n"); -+ data->error = -ETIMEDOUT; -+ } else { -+ dev_dbg(&mmc->class_dev, "data FIFO error\n"); -+ data->error = -EIO; -+ } -+ dev_dbg(&mmc->class_dev, "bytes xfered: %u\n", -+ data->bytes_xfered); -+ -+ if (data->stop -+ && !mci_set_stop_sent_is_completed(host)) -+ /* TODO: Check if card is still present */ -+ send_stop_cmd(host->mmc, data, 0); -+ -+ atmci_data_complete(host, data); -+ } -+ if (mci_clear_data_is_pending(host)) { -+ mci_set_data_complete(host); -+ data->bytes_xfered = data->blocks * data->blksz; -+ atmci_data_complete(host, data); -+ } -+ if (mci_clear_card_detect_is_pending(host)) { -+ /* Reset controller if card is gone */ -+ if (!host->present) { -+ mci_writel(host, CR, MCI_BIT(SWRST)); -+ mci_writel(host, IDR, ~0UL); -+ mci_writel(host, CR, MCI_BIT(MCIEN)); -+ } -+ -+ /* Clean up queue if present */ -+ if (mrq) { -+ if (!mci_cmd_is_complete(host)) -+ mrq->cmd->error = -ETIMEDOUT; -+ if (mrq->data && !mci_data_is_complete(host) -+ && !mci_data_error_is_complete(host)) { -+ dma_stop_request(host->dma.req.req.dmac, -+ host->dma.req.req.channel); -+ host->data->error = -ETIMEDOUT; -+ atmci_data_complete(host, data); -+ } -+ if (mrq->stop && !mci_stop_is_complete(host)) -+ mrq->stop->error = -ETIMEDOUT; -+ -+ host->cmd = NULL; -+ atmci_request_end(mmc, mrq); -+ } -+ mmc_detect_change(host->mmc, msecs_to_jiffies(100)); -+ } -+} -+ -+static void atmci_cmd_interrupt(struct mmc_host *mmc, u32 status) -+{ -+ struct atmel_mci *host = mmc_priv(mmc); -+ struct mmc_command *cmd = host->cmd; -+ -+ /* -+ * Read the response now so that we're free to send a new -+ * command immediately. -+ */ -+ cmd->resp[0] = mci_readl(host, RSPR); -+ cmd->resp[1] = mci_readl(host, RSPR); -+ cmd->resp[2] = mci_readl(host, RSPR); -+ cmd->resp[3] = mci_readl(host, RSPR); -+ -+ mci_writel(host, IDR, MCI_BIT(CMDRDY)); -+ host->cmd = NULL; -+ -+ if (mci_stop_sent_is_complete(host)) { -+ host->stop_status = status; -+ mci_set_stop_pending(host); -+ } else { -+ if (host->mrq->stop && mci_dma_is_complete(host) -+ && !mci_set_stop_sent_is_completed(host)) -+ send_stop_cmd(host->mmc, host->data, 0); -+ host->cmd_status = status; -+ mci_set_cmd_pending(host); -+ } -+ -+ tasklet_schedule(&host->tasklet); -+} -+ -+static void atmci_xfer_complete(struct dma_request *_req) -+{ -+ struct dma_request_sg *req = to_dma_request_sg(_req); -+ struct atmel_mci_dma *dma; -+ struct atmel_mci *host; -+ struct mmc_data *data; -+ -+ dma = container_of(req, struct atmel_mci_dma, req); -+ host = container_of(dma, struct atmel_mci, dma); -+ data = host->data; -+ -+ /* -+ * This callback may be called before we see the CMDRDY -+ * interrupt under heavy irq load (possibly caused by other -+ * drivers) or when interrupts are disabled for a long time. -+ */ -+ mci_set_dma_complete(host); -+ if (data->stop && mci_cmd_is_complete(host) -+ && !mci_set_stop_sent_is_completed(host)) -+ send_stop_cmd(host->mmc, data, 0); -+ -+ /* -+ * Regardless of what the documentation says, we have to wait -+ * for NOTBUSY even after block read operations. -+ * -+ * When the DMA transfer is complete, the controller may still -+ * be reading the CRC from the card, i.e. the data transfer is -+ * still in progress and we haven't seen all the potential -+ * error bits yet. -+ */ -+ mci_writel(host, IER, MCI_BIT(NOTBUSY)); -+} -+ -+static void atmci_dma_error(struct dma_request *_req) -+{ -+ struct dma_request_sg *req = to_dma_request_sg(_req); -+ struct atmel_mci_dma *dma; -+ struct atmel_mci *host; -+ -+ dma = container_of(req, struct atmel_mci_dma, req); -+ host = container_of(dma, struct atmel_mci, dma); -+ -+ mci_writel(host, IDR, (MCI_BIT(NOTBUSY) -+ | MCI_DATA_ERROR_FLAGS)); -+ -+ mci_set_dma_error_pending(host); -+ tasklet_schedule(&host->tasklet); -+} -+ -+static irqreturn_t atmci_interrupt(int irq, void *dev_id) -+{ -+ struct mmc_host *mmc = dev_id; -+ struct atmel_mci *host = mmc_priv(mmc); -+ u32 status, mask, pending; -+ -+ spin_lock(&mmc->lock); -+ -+ status = mci_readl(host, SR); -+ mask = mci_readl(host, IMR); -+ pending = status & mask; -+ -+ do { -+ if (pending & MCI_DATA_ERROR_FLAGS) { -+ mci_writel(host, IDR, (MCI_BIT(NOTBUSY) -+ | MCI_DATA_ERROR_FLAGS)); -+ host->data_status = status; -+ mci_set_data_error_pending(host); -+ tasklet_schedule(&host->tasklet); -+ break; -+ } -+ if (pending & MCI_BIT(CMDRDY)) -+ atmci_cmd_interrupt(mmc, status); -+ if (pending & MCI_BIT(NOTBUSY)) { -+ mci_writel(host, IDR, (MCI_BIT(NOTBUSY) -+ | MCI_DATA_ERROR_FLAGS)); -+ mci_set_data_pending(host); -+ tasklet_schedule(&host->tasklet); -+ } -+ -+ status = mci_readl(host, SR); -+ mask = mci_readl(host, IMR); -+ pending = status & mask; -+ } while (pending); -+ -+ spin_unlock(&mmc->lock); -+ -+ return IRQ_HANDLED; -+} -+ -+static irqreturn_t atmci_detect_change(int irq, void *dev_id) -+{ -+ struct mmc_host *mmc = dev_id; -+ struct atmel_mci *host = mmc_priv(mmc); -+ -+ int present = !gpio_get_value(irq_to_gpio(irq)); -+ -+ if (present != host->present) { -+ dev_dbg(&mmc->class_dev, "card %s\n", -+ present ? "inserted" : "removed"); -+ host->present = present; -+ mci_set_card_detect_pending(host); -+ tasklet_schedule(&host->tasklet); -+ } -+ return IRQ_HANDLED; -+} -+ -+static int __devinit atmci_probe(struct platform_device *pdev) -+{ -+ struct mci_platform_data *board; -+ struct atmel_mci *host; -+ struct mmc_host *mmc; -+ struct resource *regs; -+ int irq; -+ int ret; -+ -+ regs = platform_get_resource(pdev, IORESOURCE_MEM, 0); -+ if (!regs) -+ return -ENXIO; -+ irq = platform_get_irq(pdev, 0); -+ if (irq < 0) -+ return irq; -+ -+ board = pdev->dev.platform_data; -+ -+ mmc = mmc_alloc_host(sizeof(struct atmel_mci), &pdev->dev); -+ if (!mmc) -+ return -ENOMEM; -+ -+ host = mmc_priv(mmc); -+ host->pdev = pdev; -+ host->mmc = mmc; -+ if (board) { -+ host->detect_pin = board->detect_pin; -+ host->wp_pin = board->wp_pin; -+ } else { -+ host->detect_pin = -1; -+ host->detect_pin = -1; -+ } -+ -+ host->mck = clk_get(&pdev->dev, "mci_clk"); -+ if (IS_ERR(host->mck)) { -+ ret = PTR_ERR(host->mck); -+ goto out_free_host; -+ } -+ clk_enable(host->mck); -+ -+ ret = -ENOMEM; -+ host->regs = ioremap(regs->start, regs->end - regs->start + 1); -+ if (!host->regs) -+ goto out_disable_clk; -+ -+ host->bus_hz = clk_get_rate(host->mck); -+ host->mapbase = regs->start; -+ -+ mmc->ops = &atmci_ops; -+ mmc->f_min = (host->bus_hz + 511) / 512; -+ mmc->f_max = min((unsigned int)(host->bus_hz / 2), fmax); -+ mmc->ocr_avail = MMC_VDD_32_33 | MMC_VDD_33_34; -+ mmc->caps |= MMC_CAP_4_BIT_DATA; -+ -+ tasklet_init(&host->tasklet, atmci_tasklet_func, (unsigned long)mmc); -+ -+ ret = request_irq(irq, atmci_interrupt, 0, "mmci", mmc); -+ if (ret) -+ goto out_unmap; -+ -+ /* Assume card is present if we don't have a detect pin */ -+ host->present = 1; -+ if (host->detect_pin >= 0) { -+ if (gpio_request(host->detect_pin, "mmc_detect")) { -+ dev_dbg(&mmc->class_dev, "no detect pin available\n"); -+ host->detect_pin = -1; -+ } else { -+ host->present = !gpio_get_value(host->detect_pin); -+ } -+ } -+ if (host->wp_pin >= 0) { -+ if (gpio_request(host->wp_pin, "mmc_wp")) { -+ dev_dbg(&mmc->class_dev, "no WP pin available\n"); -+ host->wp_pin = -1; -+ } -+ } -+ -+ /* TODO: Get this information from platform data */ -+ ret = -ENOMEM; -+ host->dma.req.req.dmac = find_dma_controller(0); -+ if (!host->dma.req.req.dmac) { -+ dev_dbg(&mmc->class_dev, "no DMA controller available\n"); -+ goto out_free_irq; -+ } -+ ret = dma_alloc_channel(host->dma.req.req.dmac); -+ if (ret < 0) { -+ dev_dbg(&mmc->class_dev, "unable to allocate DMA channel\n"); -+ goto out_free_irq; -+ } -+ host->dma.req.req.channel = ret; -+ host->dma.req.width = DMA_WIDTH_32BIT; -+ host->dma.req.req.xfer_complete = atmci_xfer_complete; -+ host->dma.req.req.block_complete = NULL; // atmci_block_complete; -+ host->dma.req.req.error = atmci_dma_error; -+ host->dma.rx_periph_id = 0; -+ host->dma.tx_periph_id = 1; -+ -+ mci_writel(host, CR, MCI_BIT(SWRST)); -+ mci_writel(host, IDR, ~0UL); -+ -+ platform_set_drvdata(pdev, host); -+ -+ mmc_add_host(mmc); -+ -+ if (host->detect_pin >= 0) { -+ ret = request_irq(gpio_to_irq(host->detect_pin), -+ atmci_detect_change, -+ IRQF_TRIGGER_FALLING | IRQF_TRIGGER_RISING, -+ DRIVER_NAME, mmc); -+ if (ret) { -+ dev_dbg(&mmc->class_dev, -+ "could not request IRQ %d for detect pin\n", -+ gpio_to_irq(host->detect_pin)); -+ gpio_free(host->detect_pin); -+ host->detect_pin = -1; -+ } -+ } -+ -+ dev_info(&mmc->class_dev, "Atmel MCI controller at 0x%08lx irq %d\n", -+ host->mapbase, irq); -+ -+ atmci_init_debugfs(host); -+ -+ return 0; -+ -+out_free_irq: -+ if (host->detect_pin >= 0) -+ gpio_free(host->detect_pin); -+ if (host->wp_pin >= 0) -+ gpio_free(host->wp_pin); -+ free_irq(irq, mmc); -+out_unmap: -+ iounmap(host->regs); -+out_disable_clk: -+ clk_disable(host->mck); -+ clk_put(host->mck); -+out_free_host: -+ mmc_free_host(mmc); -+ return ret; -+} -+ -+static int __devexit atmci_remove(struct platform_device *pdev) -+{ -+ struct atmel_mci *host = platform_get_drvdata(pdev); -+ -+ platform_set_drvdata(pdev, NULL); -+ -+ if (host) { -+ atmci_cleanup_debugfs(host); -+ -+ if (host->detect_pin >= 0) { -+ free_irq(gpio_to_irq(host->detect_pin), host->mmc); -+ cancel_delayed_work(&host->mmc->detect); -+ gpio_free(host->detect_pin); -+ } -+ -+ mmc_remove_host(host->mmc); -+ -+ mci_writel(host, IDR, ~0UL); -+ mci_writel(host, CR, MCI_BIT(MCIDIS)); -+ mci_readl(host, SR); -+ -+ dma_release_channel(host->dma.req.req.dmac, -+ host->dma.req.req.channel); -+ -+ if (host->wp_pin >= 0) -+ gpio_free(host->wp_pin); -+ -+ free_irq(platform_get_irq(pdev, 0), host->mmc); -+ iounmap(host->regs); -+ -+ clk_disable(host->mck); -+ clk_put(host->mck); -+ -+ mmc_free_host(host->mmc); -+ } -+ return 0; -+} -+ -+static struct platform_driver atmci_driver = { -+ .probe = atmci_probe, -+ .remove = __devexit_p(atmci_remove), -+ .driver = { -+ .name = DRIVER_NAME, -+ }, -+}; -+ -+static int __init atmci_init(void) -+{ -+ return platform_driver_register(&atmci_driver); -+} -+ -+static void __exit atmci_exit(void) -+{ -+ platform_driver_unregister(&atmci_driver); -+} -+ -+module_init(atmci_init); -+module_exit(atmci_exit); -+ -+MODULE_DESCRIPTION("Atmel Multimedia Card Interface driver"); -+MODULE_LICENSE("GPL"); -diff -Nrup linux-2.6.24/drivers/mmc/host/atmel-mci.h linux-avr32/drivers/mmc/host/atmel-mci.h ---- linux-2.6.24/drivers/mmc/host/atmel-mci.h 1969-12-31 19:00:00.000000000 -0500 -+++ linux-avr32/drivers/mmc/host/atmel-mci.h 2008-02-01 14:51:39.000000000 -0500 -@@ -0,0 +1,192 @@ -+/* -+ * Atmel MultiMedia Card Interface driver -+ * -+ * Copyright (C) 2004-2006 Atmel Corporation -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 as -+ * published by the Free Software Foundation. -+ */ -+#ifndef __DRIVERS_MMC_ATMEL_MCI_H__ -+#define __DRIVERS_MMC_ATMEL_MCI_H__ -+ -+/* MCI register offsets */ -+#define MCI_CR 0x0000 -+#define MCI_MR 0x0004 -+#define MCI_DTOR 0x0008 -+#define MCI_SDCR 0x000c -+#define MCI_ARGR 0x0010 -+#define MCI_CMDR 0x0014 -+#define MCI_BLKR 0x0018 -+#define MCI_RSPR 0x0020 -+#define MCI_RSPR1 0x0024 -+#define MCI_RSPR2 0x0028 -+#define MCI_RSPR3 0x002c -+#define MCI_RDR 0x0030 -+#define MCI_TDR 0x0034 -+#define MCI_SR 0x0040 -+#define MCI_IER 0x0044 -+#define MCI_IDR 0x0048 -+#define MCI_IMR 0x004c -+ -+/* Bitfields in CR */ -+#define MCI_MCIEN_OFFSET 0 -+#define MCI_MCIEN_SIZE 1 -+#define MCI_MCIDIS_OFFSET 1 -+#define MCI_MCIDIS_SIZE 1 -+#define MCI_PWSEN_OFFSET 2 -+#define MCI_PWSEN_SIZE 1 -+#define MCI_PWSDIS_OFFSET 3 -+#define MCI_PWSDIS_SIZE 1 -+#define MCI_SWRST_OFFSET 7 -+#define MCI_SWRST_SIZE 1 -+ -+/* Bitfields in MR */ -+#define MCI_CLKDIV_OFFSET 0 -+#define MCI_CLKDIV_SIZE 8 -+#define MCI_PWSDIV_OFFSET 8 -+#define MCI_PWSDIV_SIZE 3 -+#define MCI_RDPROOF_OFFSET 11 -+#define MCI_RDPROOF_SIZE 1 -+#define MCI_WRPROOF_OFFSET 12 -+#define MCI_WRPROOF_SIZE 1 -+#define MCI_DMAPADV_OFFSET 14 -+#define MCI_DMAPADV_SIZE 1 -+#define MCI_BLKLEN_OFFSET 16 -+#define MCI_BLKLEN_SIZE 16 -+ -+/* Bitfields in DTOR */ -+#define MCI_DTOCYC_OFFSET 0 -+#define MCI_DTOCYC_SIZE 4 -+#define MCI_DTOMUL_OFFSET 4 -+#define MCI_DTOMUL_SIZE 3 -+ -+/* Bitfields in SDCR */ -+#define MCI_SDCSEL_OFFSET 0 -+#define MCI_SDCSEL_SIZE 4 -+#define MCI_SDCBUS_OFFSET 7 -+#define MCI_SDCBUS_SIZE 1 -+ -+/* Bitfields in ARGR */ -+#define MCI_ARG_OFFSET 0 -+#define MCI_ARG_SIZE 32 -+ -+/* Bitfields in CMDR */ -+#define MCI_CMDNB_OFFSET 0 -+#define MCI_CMDNB_SIZE 6 -+#define MCI_RSPTYP_OFFSET 6 -+#define MCI_RSPTYP_SIZE 2 -+#define MCI_SPCMD_OFFSET 8 -+#define MCI_SPCMD_SIZE 3 -+#define MCI_OPDCMD_OFFSET 11 -+#define MCI_OPDCMD_SIZE 1 -+#define MCI_MAXLAT_OFFSET 12 -+#define MCI_MAXLAT_SIZE 1 -+#define MCI_TRCMD_OFFSET 16 -+#define MCI_TRCMD_SIZE 2 -+#define MCI_TRDIR_OFFSET 18 -+#define MCI_TRDIR_SIZE 1 -+#define MCI_TRTYP_OFFSET 19 -+#define MCI_TRTYP_SIZE 2 -+ -+/* Bitfields in BLKR */ -+#define MCI_BCNT_OFFSET 0 -+#define MCI_BCNT_SIZE 16 -+ -+/* Bitfields in RSPRn */ -+#define MCI_RSP_OFFSET 0 -+#define MCI_RSP_SIZE 32 -+ -+/* Bitfields in SR/IER/IDR/IMR */ -+#define MCI_CMDRDY_OFFSET 0 -+#define MCI_CMDRDY_SIZE 1 -+#define MCI_RXRDY_OFFSET 1 -+#define MCI_RXRDY_SIZE 1 -+#define MCI_TXRDY_OFFSET 2 -+#define MCI_TXRDY_SIZE 1 -+#define MCI_BLKE_OFFSET 3 -+#define MCI_BLKE_SIZE 1 -+#define MCI_DTIP_OFFSET 4 -+#define MCI_DTIP_SIZE 1 -+#define MCI_NOTBUSY_OFFSET 5 -+#define MCI_NOTBUSY_SIZE 1 -+#define MCI_ENDRX_OFFSET 6 -+#define MCI_ENDRX_SIZE 1 -+#define MCI_ENDTX_OFFSET 7 -+#define MCI_ENDTX_SIZE 1 -+#define MCI_RXBUFF_OFFSET 14 -+#define MCI_RXBUFF_SIZE 1 -+#define MCI_TXBUFE_OFFSET 15 -+#define MCI_TXBUFE_SIZE 1 -+#define MCI_RINDE_OFFSET 16 -+#define MCI_RINDE_SIZE 1 -+#define MCI_RDIRE_OFFSET 17 -+#define MCI_RDIRE_SIZE 1 -+#define MCI_RCRCE_OFFSET 18 -+#define MCI_RCRCE_SIZE 1 -+#define MCI_RENDE_OFFSET 19 -+#define MCI_RENDE_SIZE 1 -+#define MCI_RTOE_OFFSET 20 -+#define MCI_RTOE_SIZE 1 -+#define MCI_DCRCE_OFFSET 21 -+#define MCI_DCRCE_SIZE 1 -+#define MCI_DTOE_OFFSET 22 -+#define MCI_DTOE_SIZE 1 -+#define MCI_OVRE_OFFSET 30 -+#define MCI_OVRE_SIZE 1 -+#define MCI_UNRE_OFFSET 31 -+#define MCI_UNRE_SIZE 1 -+ -+/* Constants for DTOMUL */ -+#define MCI_DTOMUL_1_CYCLE 0 -+#define MCI_DTOMUL_16_CYCLES 1 -+#define MCI_DTOMUL_128_CYCLES 2 -+#define MCI_DTOMUL_256_CYCLES 3 -+#define MCI_DTOMUL_1024_CYCLES 4 -+#define MCI_DTOMUL_4096_CYCLES 5 -+#define MCI_DTOMUL_65536_CYCLES 6 -+#define MCI_DTOMUL_1048576_CYCLES 7 -+ -+/* Constants for RSPTYP */ -+#define MCI_RSPTYP_NO_RESP 0 -+#define MCI_RSPTYP_48_BIT 1 -+#define MCI_RSPTYP_136_BIT 2 -+ -+/* Constants for SPCMD */ -+#define MCI_SPCMD_NO_SPEC_CMD 0 -+#define MCI_SPCMD_INIT_CMD 1 -+#define MCI_SPCMD_SYNC_CMD 2 -+#define MCI_SPCMD_INT_CMD 4 -+#define MCI_SPCMD_INT_RESP 5 -+ -+/* Constants for TRCMD */ -+#define MCI_TRCMD_NO_TRANS 0 -+#define MCI_TRCMD_START_TRANS 1 -+#define MCI_TRCMD_STOP_TRANS 2 -+ -+/* Constants for TRTYP */ -+#define MCI_TRTYP_BLOCK 0 -+#define MCI_TRTYP_MULTI_BLOCK 1 -+#define MCI_TRTYP_STREAM 2 -+ -+/* Bit manipulation macros */ -+#define MCI_BIT(name) \ -+ (1 << MCI_##name##_OFFSET) -+#define MCI_BF(name,value) \ -+ (((value) & ((1 << MCI_##name##_SIZE) - 1)) \ -+ << MCI_##name##_OFFSET) -+#define MCI_BFEXT(name,value) \ -+ (((value) >> MCI_##name##_OFFSET) \ -+ & ((1 << MCI_##name##_SIZE) - 1)) -+#define MCI_BFINS(name,value,old) \ -+ (((old) & ~(((1 << MCI_##name##_SIZE) - 1) \ -+ << MCI_##name##_OFFSET)) \ -+ | MCI_BF(name,value)) -+ -+/* Register access macros */ -+#define mci_readl(port,reg) \ -+ __raw_readl((port)->regs + MCI_##reg) -+#define mci_writel(port,reg,value) \ -+ __raw_writel((value), (port)->regs + MCI_##reg) -+ -+#endif /* __DRIVERS_MMC_ATMEL_MCI_H__ */ -diff -Nrup linux-2.6.24/drivers/mmc/host/Kconfig linux-avr32/drivers/mmc/host/Kconfig ---- linux-2.6.24/drivers/mmc/host/Kconfig 2008-01-24 17:58:37.000000000 -0500 -+++ linux-avr32/drivers/mmc/host/Kconfig 2008-02-01 14:51:39.000000000 -0500 -@@ -91,6 +91,16 @@ config MMC_AT91 - - If unsure, say N. - -+config MMC_ATMELMCI -+ tristate "Atmel Multimedia Card Interface support" -+ depends on AVR32 && MMC -+ help -+ This selects the Atmel Multimedia Card Interface. If you have -+ a AT91 (ARM) or AT32 (AVR32) platform with a Multimedia Card -+ slot, say Y or M here. -+ -+ If unsure, say N. -+ - config MMC_IMX - tristate "Motorola i.MX Multimedia Card Interface support" - depends on ARCH_IMX -diff -Nrup linux-2.6.24/drivers/mmc/host/Makefile linux-avr32/drivers/mmc/host/Makefile ---- linux-2.6.24/drivers/mmc/host/Makefile 2008-01-24 17:58:37.000000000 -0500 -+++ linux-avr32/drivers/mmc/host/Makefile 2008-02-01 14:51:39.000000000 -0500 -@@ -15,6 +15,7 @@ obj-$(CONFIG_MMC_WBSD) += wbsd.o - obj-$(CONFIG_MMC_AU1X) += au1xmmc.o - obj-$(CONFIG_MMC_OMAP) += omap.o - obj-$(CONFIG_MMC_AT91) += at91_mci.o -+obj-$(CONFIG_MMC_ATMELMCI) += atmel-mci.o - obj-$(CONFIG_MMC_TIFM_SD) += tifm_sd.o - obj-$(CONFIG_MMC_SPI) += mmc_spi.o - -diff -Nrup linux-2.6.24/drivers/mtd/chips/cfi_cmdset_0001.c linux-avr32/drivers/mtd/chips/cfi_cmdset_0001.c ---- linux-2.6.24/drivers/mtd/chips/cfi_cmdset_0001.c 2008-01-24 17:58:37.000000000 -0500 -+++ linux-avr32/drivers/mtd/chips/cfi_cmdset_0001.c 2008-02-01 14:51:39.000000000 -0500 -@@ -50,6 +50,7 @@ - #define I82802AC 0x00ac - #define MANUFACTURER_ST 0x0020 - #define M50LPW080 0x002F -+#define AT49BV640D 0x02de - - static int cfi_intelext_read (struct mtd_info *, loff_t, size_t, size_t *, u_char *); - static int cfi_intelext_write_words(struct mtd_info *, loff_t, size_t, size_t *, const u_char *); -@@ -157,6 +158,47 @@ static void cfi_tell_features(struct cfi - } - #endif - -+/* Atmel chips don't use the same PRI format as Intel chips */ -+static void fixup_convert_atmel_pri(struct mtd_info *mtd, void *param) -+{ -+ struct map_info *map = mtd->priv; -+ struct cfi_private *cfi = map->fldrv_priv; -+ struct cfi_pri_intelext *extp = cfi->cmdset_priv; -+ struct cfi_pri_atmel atmel_pri; -+ uint32_t features = 0; -+ -+ /* Reverse byteswapping */ -+ extp->FeatureSupport = cpu_to_le32(extp->FeatureSupport); -+ extp->BlkStatusRegMask = cpu_to_le16(extp->BlkStatusRegMask); -+ extp->ProtRegAddr = cpu_to_le16(extp->ProtRegAddr); -+ -+ memcpy(&atmel_pri, extp, sizeof(atmel_pri)); -+ memset((char *)extp + 5, 0, sizeof(*extp) - 5); -+ -+ printk(KERN_ERR "atmel Features: %02x\n", atmel_pri.Features); -+ -+ if (atmel_pri.Features & 0x01) /* chip erase supported */ -+ features |= (1<<0); -+ if (atmel_pri.Features & 0x02) /* erase suspend supported */ -+ features |= (1<<1); -+ if (atmel_pri.Features & 0x04) /* program suspend supported */ -+ features |= (1<<2); -+ if (atmel_pri.Features & 0x08) /* simultaneous operations supported */ -+ features |= (1<<9); -+ if (atmel_pri.Features & 0x20) /* page mode read supported */ -+ features |= (1<<7); -+ if (atmel_pri.Features & 0x40) /* queued erase supported */ -+ features |= (1<<4); -+ if (atmel_pri.Features & 0x80) /* Protection bits supported */ -+ features |= (1<<6); -+ -+ extp->FeatureSupport = features; -+ -+ /* burst write mode not supported */ -+ cfi->cfiq->BufWriteTimeoutTyp = 0; -+ cfi->cfiq->BufWriteTimeoutMax = 0; -+} -+ - #ifdef CMDSET0001_DISABLE_ERASE_SUSPEND_ON_WRITE - /* Some Intel Strata Flash prior to FPO revision C has bugs in this area */ - static void fixup_intel_strataflash(struct mtd_info *mtd, void* param) -@@ -234,6 +276,7 @@ static void fixup_use_powerup_lock(struc - } - - static struct cfi_fixup cfi_fixup_table[] = { -+ { CFI_MFR_ATMEL, CFI_ID_ANY, fixup_convert_atmel_pri, NULL }, - #ifdef CMDSET0001_DISABLE_ERASE_SUSPEND_ON_WRITE - { CFI_MFR_ANY, CFI_ID_ANY, fixup_intel_strataflash, NULL }, - #endif -diff -Nrup linux-2.6.24/drivers/mtd/chips/cfi_cmdset_0002.c linux-avr32/drivers/mtd/chips/cfi_cmdset_0002.c ---- linux-2.6.24/drivers/mtd/chips/cfi_cmdset_0002.c 2008-01-24 17:58:37.000000000 -0500 -+++ linux-avr32/drivers/mtd/chips/cfi_cmdset_0002.c 2008-02-01 14:51:39.000000000 -0500 -@@ -185,6 +185,10 @@ static void fixup_convert_atmel_pri(stru - extp->TopBottom = 2; - else - extp->TopBottom = 3; -+ -+ /* burst write mode not supported */ -+ cfi->cfiq->BufWriteTimeoutTyp = 0; -+ cfi->cfiq->BufWriteTimeoutMax = 0; - } - - static void fixup_use_secsi(struct mtd_info *mtd, void *param) -@@ -217,6 +221,7 @@ static void fixup_use_atmel_lock(struct - } - - static struct cfi_fixup cfi_fixup_table[] = { -+ { CFI_MFR_ATMEL, CFI_ID_ANY, fixup_convert_atmel_pri, NULL }, - #ifdef AMD_BOOTLOC_BUG - { CFI_MFR_AMD, CFI_ID_ANY, fixup_amd_bootblock, NULL }, - #endif -@@ -229,7 +234,6 @@ static struct cfi_fixup cfi_fixup_table[ - #if !FORCE_WORD_WRITE - { CFI_MFR_ANY, CFI_ID_ANY, fixup_use_write_buffers, NULL, }, - #endif -- { CFI_MFR_ATMEL, CFI_ID_ANY, fixup_convert_atmel_pri, NULL }, - { 0, 0, NULL, NULL } - }; - static struct cfi_fixup jedec_fixup_table[] = { -diff -Nrup linux-2.6.24/drivers/pcmcia/at32_cf.c linux-avr32/drivers/pcmcia/at32_cf.c ---- linux-2.6.24/drivers/pcmcia/at32_cf.c 1969-12-31 19:00:00.000000000 -0500 -+++ linux-avr32/drivers/pcmcia/at32_cf.c 2008-02-01 14:51:42.000000000 -0500 -@@ -0,0 +1,533 @@ -+/* -+ * Driver for AVR32 Static Memory Controller: CompactFlash support -+ * -+ * Copyright (C) 2006 Atmel Norway -+ * -+ * This program is free software; you can redistribute it and/or -+ * modify it under the terms of the GNU General Public License as -+ * published by the Free Software Foundation; either version 2 of the -+ * License, or (at your option) any later version. -+ * -+ * This program is distributed in the hope that it will be useful, but -+ * WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU -+ * General Public License for more details. -+ * -+ * You should have received a copy of the GNU General Public License -+ * along with this program; if not, write to the Free Software -+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA -+ * 02111-1307, USA. -+ * -+ * The full GNU General Public License is included in this -+ * distribution in the file called COPYING. -+ */ -+#include <linux/module.h> -+#include <linux/kernel.h> -+#include <linux/platform_device.h> -+#include <linux/init.h> -+#include <linux/device.h> -+#include <linux/delay.h> -+#include <linux/interrupt.h> -+#include <linux/err.h> -+#include <linux/clk.h> -+#include <linux/dma-mapping.h> -+ -+#include <pcmcia/ss.h> -+ -+#include <asm/gpio.h> -+#include <asm/io.h> -+#include <asm/arch/board.h> -+ -+#include <asm/arch/smc.h> -+ -+struct at32_cf_socket { -+ struct pcmcia_socket socket; -+ int detect_pin; -+ int reset_pin; -+ int vcc_pin; -+ int ready_pin; -+ struct resource res_attr; -+ struct resource res_mem; -+ struct resource res_io; -+ struct smc_config smc; -+ unsigned int irq; -+ unsigned int cf_cs; -+ socket_state_t state; -+ unsigned present:1; -+}; -+#define to_at32_cf(sock) container_of(sock, struct at32_cf_socket, socket) -+ -+/* -+ * We have the following memory layout relative to the base address: -+ * -+ * Alt IDE Mode: 00e0 0000 -> 00ff ffff -+ * True IDE Mode: 00c0 0000 -> 00df ffff -+ * I/O memory: 0080 0000 -> 00bf ffff -+ * Common memory: 0040 0000 -> 007f ffff -+ * Attribute memory: 0000 0000 -> 003f ffff -+ */ -+#define CF_ATTR_OFFSET 0x00000000 -+#define CF_MEM_OFFSET 0x00400000 -+#define CF_IO_OFFSET 0x00800000 -+#define CF_RES_SIZE 4096 -+ -+#ifdef DEBUG -+ -+static int pc_debug; -+module_param(pc_debug, int, 0644); -+ -+static void at32_cf_debug(struct at32_cf_socket *cf, const char *func, -+ int level, const char *fmt, ...) -+{ -+ va_list args; -+ -+ if (pc_debug > level) { -+ printk(KERN_DEBUG "at32_cf/%u: %s: ", cf->cf_cs, func); -+ va_start(args, fmt); -+ vprintk(fmt, args); -+ va_end(args); -+ } -+} -+ -+#define debug(cf, lvl, fmt, arg...) \ -+ at32_cf_debug(cf, __func__, lvl, fmt, ##arg) -+ -+#else -+#define debug(cf, lvl, fmt, arg...) do { } while (0) -+#endif -+ -+static inline int at32_cf_present(struct at32_cf_socket *cf) -+{ -+ int present = 1; -+ -+ /* If we don't have a detect pin, assume the card is present */ -+ if (cf->detect_pin >= 0) -+ present = !gpio_get_value(cf->detect_pin); -+ -+ return present; -+} -+ -+static irqreturn_t at32_cf_irq(int irq, void *dev_id) -+{ -+ struct at32_cf_socket *cf = dev_id; -+ unsigned int present; -+ -+ present = at32_cf_present(cf); -+ if (present != cf->present) { -+ cf->present = present; -+ debug(cf, 3, "card %s\n", present ? "present" : "gone"); -+ pcmcia_parse_events(&cf->socket, SS_DETECT); -+ } -+ -+ return IRQ_HANDLED; -+} -+ -+static int at32_cf_get_status(struct pcmcia_socket *sock, u_int *value) -+{ -+ struct at32_cf_socket *cf; -+ u_int status = 0; -+ -+ cf = container_of(sock, struct at32_cf_socket, socket); -+ -+ if (at32_cf_present(cf)) { -+ /* NOTE: gpio on AP7xxx is 3.3V */ -+ status = SS_DETECT | SS_3VCARD; -+ if (cf->ready_pin < 0 || gpio_get_value(cf->ready_pin)) -+ status |= SS_READY; -+ if (cf->vcc_pin < 0 || gpio_get_value(cf->vcc_pin)) -+ status |= SS_POWERON; -+ } -+ -+ *value = status; -+ return 0; -+} -+ -+static int at32_cf_set_socket(struct pcmcia_socket *sock, socket_state_t *state) -+{ -+ struct at32_cf_socket *cf = container_of(sock, struct at32_cf_socket, socket); -+ -+ debug(cf, 2, "mask: %s%s%s%s%s%sflags: %s%s%s%s%s%sVcc %d Vpp %d irq %d\n", -+ (state->csc_mask==0)?"<NONE> ":"", -+ (state->csc_mask&SS_DETECT)?"DETECT ":"", -+ (state->csc_mask&SS_READY)?"READY ":"", -+ (state->csc_mask&SS_BATDEAD)?"BATDEAD ":"", -+ (state->csc_mask&SS_BATWARN)?"BATWARN ":"", -+ (state->csc_mask&SS_STSCHG)?"STSCHG ":"", -+ (state->flags==0)?"<NONE> ":"", -+ (state->flags&SS_PWR_AUTO)?"PWR_AUTO ":"", -+ (state->flags&SS_IOCARD)?"IOCARD ":"", -+ (state->flags&SS_RESET)?"RESET ":"", -+ (state->flags&SS_SPKR_ENA)?"SPKR_ENA ":"", -+ (state->flags&SS_OUTPUT_ENA)?"OUTPUT_ENA ":"", -+ state->Vcc, state->Vpp, state->io_irq); -+ -+ /* -+ * TODO: Allow boards to override this in case they have level -+ * converters. -+ */ -+ switch (state->Vcc) { -+ case 0: -+ if (cf->vcc_pin >= 0) -+ gpio_set_value(cf->vcc_pin, 0); -+ break; -+ case 33: -+ if (cf->vcc_pin >= 0) -+ gpio_set_value(cf->vcc_pin, 1); -+ break; -+ default: -+ return -EINVAL; -+ } -+ -+ if (cf->reset_pin >= 0) -+ gpio_set_value(cf->reset_pin, state->flags & SS_RESET); -+ -+ cf->state = *state; -+ -+ return 0; -+} -+ -+static int at32_cf_socket_init(struct pcmcia_socket *sock) -+{ -+ debug(to_at32_cf(sock), 2, "called\n"); -+ -+ return 0; -+} -+ -+static int at32_cf_suspend(struct pcmcia_socket *sock) -+{ -+ debug(to_at32_cf(sock), 2, "called\n"); -+ -+ at32_cf_set_socket(sock, &dead_socket); -+ -+ return 0; -+} -+ -+static int at32_cf_set_io_map(struct pcmcia_socket *sock, -+ struct pccard_io_map *map) -+{ -+ struct at32_cf_socket *cf = container_of(sock, struct at32_cf_socket, socket); -+ int retval; -+ -+ debug(cf, 2, "map %u speed %u start 0x%08x stop 0x%08x\n", -+ map->map, map->speed, map->start, map->stop); -+ debug(cf, 2, "flags: %s%s%s%s%s%s%s%s\n", -+ (map->flags == 0) ? "<NONE>":"", -+ (map->flags & MAP_ACTIVE) ? "ACTIVE " : "", -+ (map->flags & MAP_16BIT) ? "16BIT " : "", -+ (map->flags & MAP_AUTOSZ) ? "AUTOSZ " : "", -+ (map->flags & MAP_0WS) ? "0WS " : "", -+ (map->flags & MAP_WRPROT) ? "WRPROT " : "", -+ (map->flags & MAP_USE_WAIT) ? "USE_WAIT " : "", -+ (map->flags & MAP_PREFETCH) ? "PREFETCH " : ""); -+ -+ map->flags &= MAP_ACTIVE | MAP_16BIT | MAP_USE_WAIT; -+ -+ if (map->flags & MAP_16BIT) -+ cf->smc.bus_width = 2; -+ else -+ cf->smc.bus_width = 1; -+ -+ if (map->flags & MAP_USE_WAIT) -+ cf->smc.nwait_mode = 3; -+ else -+ cf->smc.nwait_mode = 0; -+ -+ retval = smc_set_configuration(cf->cf_cs, &cf->smc); -+ if (retval) { -+ printk(KERN_ERR "at32_cf: could not set up SMC for I/O\n"); -+ return retval; -+ } -+ -+ map->start = cf->socket.io_offset; -+ map->stop = map->start + CF_RES_SIZE - 1; -+ -+ return 0; -+} -+ -+static int -+at32_cf_set_mem_map(struct pcmcia_socket *sock, struct pccard_mem_map *map) -+{ -+ struct at32_cf_socket *cf; -+ struct resource *res; -+ int retval; -+ -+ cf = container_of(sock, struct at32_cf_socket, socket); -+ -+ debug(cf, 2, "map %u speed %u card_start %08x\n", -+ map->map, map->speed, map->card_start); -+ debug(cf, 2, "flags: %s%s%s%s%s%s%s%s\n", -+ (map->flags==0)?"<NONE>":"", -+ (map->flags&MAP_ACTIVE)?"ACTIVE ":"", -+ (map->flags&MAP_16BIT)?"16BIT ":"", -+ (map->flags&MAP_AUTOSZ)?"AUTOSZ ":"", -+ (map->flags&MAP_0WS)?"0WS ":"", -+ (map->flags&MAP_WRPROT)?"WRPROT ":"", -+ (map->flags&MAP_ATTRIB)?"ATTRIB ":"", -+ (map->flags&MAP_USE_WAIT)?"USE_WAIT ":""); -+ -+ if (map->card_start) -+ return -EINVAL; -+ -+ map->flags &= MAP_ACTIVE | MAP_ATTRIB | MAP_16BIT | MAP_USE_WAIT; -+ -+ if (map->flags & MAP_ATTRIB) { -+ res = &cf->res_attr; -+ -+ /* Linksys WCF12 seems to use WAIT when reading CIS */ -+ map->flags |= MAP_USE_WAIT; -+ } else { -+ res = &cf->res_mem; -+ } -+ -+ if (map->flags & MAP_USE_WAIT) -+ cf->smc.nwait_mode = 3; -+ else -+ cf->smc.nwait_mode = 0; -+ -+ retval = smc_set_configuration(cf->cf_cs, &cf->smc); -+ if (retval) { -+ printk(KERN_ERR "at32_cf: could not set up SMC for mem\n"); -+ return retval; -+ } -+ -+ map->static_start = res->start; -+ -+ return 0; -+} -+ -+static struct pccard_operations at32_cf_ops = { -+ .init = at32_cf_socket_init, -+ .suspend = at32_cf_suspend, -+ .get_status = at32_cf_get_status, -+ .set_socket = at32_cf_set_socket, -+ .set_io_map = at32_cf_set_io_map, -+ .set_mem_map = at32_cf_set_mem_map, -+}; -+ -+static int __init request_pin(struct platform_device *pdev, -+ unsigned int pin, const char *name) -+{ -+ if (gpio_request(pin, name)) { -+ dev_warn(&pdev->dev, "failed to request %s pin\n", name); -+ return -1; -+ } -+ -+ return pin; -+} -+ -+static struct smc_timing at32_cf_timing __initdata = { -+ .ncs_read_setup = 30, -+ .nrd_setup = 100, -+ .ncs_write_setup = 30, -+ .nwe_setup = 100, -+ -+ .ncs_read_pulse = 360, -+ .nrd_pulse = 290, -+ .ncs_write_pulse = 360, -+ .nwe_pulse = 290, -+ -+ .read_cycle = 420, -+ .write_cycle = 420, -+}; -+ -+static int __init at32_cf_probe(struct platform_device *pdev) -+{ -+ struct at32_cf_socket *cf; -+ struct cf_platform_data *board = pdev->dev.platform_data; -+ struct resource *res_skt; -+ int irq; -+ int ret; -+ -+ dev_dbg(&pdev->dev, "probe"); -+ -+ if (!board) -+ return -ENXIO; -+ -+ res_skt = platform_get_resource(pdev, IORESOURCE_MEM, 0); -+ if (!res_skt) -+ return -ENXIO; -+ -+ irq = platform_get_irq(pdev, 0); -+ if (irq < 0) -+ return irq; -+ -+ cf = kzalloc(sizeof(struct at32_cf_socket), GFP_KERNEL); -+ if (!cf) -+ return -ENOMEM; -+ -+ cf->detect_pin = -1; -+ cf->reset_pin = -1; -+ cf->vcc_pin = -1; -+ cf->ready_pin = -1; -+ cf->cf_cs = board->cs; -+ -+ if (board->detect_pin != GPIO_PIN_NONE) -+ cf->detect_pin = request_pin(pdev, board->detect_pin, -+ "cf_detect"); -+ if (board->reset_pin != GPIO_PIN_NONE) -+ cf->reset_pin = request_pin(pdev, board->reset_pin, -+ "cf_reset"); -+ if (board->vcc_pin != GPIO_PIN_NONE) -+ cf->vcc_pin = request_pin(pdev, board->vcc_pin, -+ "cf_vcc"); -+ if (board->ready_pin != GPIO_PIN_NONE) -+ /* READY is also used for irq through EIM */ -+ cf->ready_pin = board->ready_pin; -+ -+ debug(cf, 2, "pins: detect=%d reset=%d vcc=%d\n", -+ cf->detect_pin, cf->reset_pin, cf->vcc_pin); -+ -+ cf->socket.pci_irq = irq; -+ cf->socket.ops = &at32_cf_ops; -+ cf->socket.resource_ops = &pccard_static_ops; -+ cf->socket.dev.parent = &pdev->dev; -+ cf->socket.owner = THIS_MODULE; -+ cf->socket.features = -+ SS_CAP_MEM_ALIGN | SS_CAP_STATIC_MAP | SS_CAP_PCCARD; -+ cf->socket.map_size = CF_RES_SIZE; -+ -+ cf->res_attr.start = res_skt->start + CF_ATTR_OFFSET; -+ cf->res_attr.end = cf->res_attr.start + CF_RES_SIZE - 1; -+ cf->res_attr.name = "attribute"; -+ cf->res_attr.flags = IORESOURCE_MEM; -+ ret = request_resource(res_skt, &cf->res_attr); -+ if (ret) -+ goto err_request_res_attr; -+ -+ cf->res_mem.start = res_skt->start + CF_MEM_OFFSET; -+ cf->res_mem.end = cf->res_mem.start + CF_RES_SIZE - 1; -+ cf->res_mem.name = "memory"; -+ cf->res_mem.flags = IORESOURCE_MEM; -+ ret = request_resource(res_skt, &cf->res_mem); -+ if (ret) -+ goto err_request_res_mem; -+ -+ cf->res_io.start = res_skt->start + CF_IO_OFFSET; -+ cf->res_io.end = cf->res_io.start + CF_RES_SIZE - 1; -+ cf->res_io.name = "io"; -+ cf->res_io.flags = IORESOURCE_MEM; -+ ret = request_resource(res_skt, &cf->res_io); -+ if (ret) -+ goto err_request_res_io; -+ -+ cf->socket.io_offset = cf->res_io.start; -+ -+ if (cf->detect_pin >= 0) { -+ ret = request_irq(gpio_to_irq(cf->detect_pin), at32_cf_irq, -+ IRQF_SHARED, "cf_detect", cf); -+ if (ret) { -+ debug(cf, 1, -+ "failed to request cf_detect interrupt\n"); -+ goto err_detect_irq; -+ } -+ } -+ -+ cf->present = at32_cf_present(cf); -+ -+ /* Setup SMC timings */ -+ smc_set_timing(&cf->smc, &at32_cf_timing); -+ -+ cf->smc.bus_width = 2; -+ cf->smc.nrd_controlled = 1; -+ cf->smc.nwe_controlled = 1; -+ cf->smc.nwait_mode = 0; -+ cf->smc.byte_write = 0; -+ cf->smc.tdf_cycles = 8; -+ cf->smc.tdf_mode = 0; -+ -+ ret = smc_set_configuration(cf->cf_cs, &cf->smc); -+ if (ret) { -+ debug(cf, 1, "failed to configure SMC\n", ret); -+ goto err_smc; -+ } -+ -+ ret = pcmcia_register_socket(&cf->socket); -+ if (ret) { -+ debug(cf, 1, "failed to register socket: %d\n", ret); -+ goto err_register_socket; -+ } -+ -+ if (cf->reset_pin >= 0) -+ gpio_direction_output(cf->reset_pin, 0); -+ -+ platform_set_drvdata(pdev, cf); -+ -+ dev_info(&pdev->dev, "Atmel SMC CF interface at 0x%08lx\n", -+ (unsigned long)res_skt->start); -+ -+ return 0; -+ -+err_register_socket: -+err_smc: -+ if (cf->detect_pin >= 0) -+ free_irq(gpio_to_irq(cf->detect_pin), cf); -+err_detect_irq: -+ release_resource(&cf->res_io); -+err_request_res_io: -+ release_resource(&cf->res_mem); -+err_request_res_mem: -+ release_resource(&cf->res_attr); -+err_request_res_attr: -+ if (cf->vcc_pin >= 0) -+ gpio_free(cf->vcc_pin); -+ if (cf->reset_pin >= 0) -+ gpio_free(cf->reset_pin); -+ if (cf->detect_pin >= 0) -+ gpio_free(cf->detect_pin); -+ kfree(cf); -+ -+ return ret; -+} -+ -+static int __exit at32_cf_remove(struct platform_device *pdev) -+{ -+ struct at32_cf_socket *cf = platform_get_drvdata(pdev); -+ -+ pcmcia_unregister_socket(&cf->socket); -+ if (cf->detect_pin >= 0) { -+ free_irq(gpio_to_irq(cf->detect_pin), cf); -+ gpio_free(cf->detect_pin); -+ } -+ if (cf->vcc_pin >= 0) -+ gpio_free(cf->vcc_pin); -+ if (cf->reset_pin >= 0) -+ gpio_free(cf->reset_pin); -+ -+ release_resource(&cf->res_io); -+ release_resource(&cf->res_mem); -+ release_resource(&cf->res_attr); -+ kfree(cf); -+ platform_set_drvdata(pdev, NULL); -+ -+ return 0; -+} -+ -+static struct platform_driver at32_cf_driver = { -+ .remove = __exit_p(at32_cf_remove), -+ .driver = { -+ .name = "at32_cf", -+ .owner = THIS_MODULE, -+ }, -+}; -+ -+static int __init at32_cf_init(void) -+{ -+ int ret; -+ -+ ret = platform_driver_probe(&at32_cf_driver, at32_cf_probe); -+ if (ret) -+ printk(KERN_ERR "at32_cf: probe failed: %d\n", ret); -+ return ret; -+} -+ -+static void __exit at32_cf_exit(void) -+{ -+ platform_driver_unregister(&at32_cf_driver); -+} -+ -+module_init(at32_cf_init); -+module_exit(at32_cf_exit); -+ -+MODULE_LICENSE("GPL"); -+MODULE_DESCRIPTION("Driver for SMC PCMCIA interface"); -+MODULE_AUTHOR("Hans-Christian Egtvedt <hcegtvedt@atmel.com>"); -diff -Nrup linux-2.6.24/drivers/pcmcia/Kconfig linux-avr32/drivers/pcmcia/Kconfig ---- linux-2.6.24/drivers/pcmcia/Kconfig 2008-01-24 17:58:37.000000000 -0500 -+++ linux-avr32/drivers/pcmcia/Kconfig 2008-02-01 14:51:42.000000000 -0500 -@@ -276,6 +276,13 @@ config ELECTRA_CF - Say Y here to support the CompactFlash controller on the - PA Semi Electra eval board. - -+config AT32_CF -+ tristate "AT32AP CompactFlash Controller" -+ depends on PCMCIA && AVR32 && PLATFORM_AT32AP -+ help -+ Say Y here to support the CompactFlash controller on AT32 chips. -+ Or choose M to compile the driver as a module named "at32_cf". -+ - config PCCARD_NONSTATIC - tristate - -diff -Nrup linux-2.6.24/drivers/pcmcia/Makefile linux-avr32/drivers/pcmcia/Makefile ---- linux-2.6.24/drivers/pcmcia/Makefile 2008-01-24 17:58:37.000000000 -0500 -+++ linux-avr32/drivers/pcmcia/Makefile 2008-02-01 14:51:42.000000000 -0500 -@@ -38,6 +38,7 @@ obj-$(CONFIG_PCMCIA_VRC4173) += vrc417 - obj-$(CONFIG_OMAP_CF) += omap_cf.o - obj-$(CONFIG_AT91_CF) += at91_cf.o - obj-$(CONFIG_ELECTRA_CF) += electra_cf.o -+obj-$(CONFIG_AT32_CF) += at32_cf.o - - sa11xx_core-y += soc_common.o sa11xx_base.o - pxa2xx_core-y += soc_common.o pxa2xx_base.o -diff -Nrup linux-2.6.24/drivers/spi/atmel_spi.c linux-avr32/drivers/spi/atmel_spi.c ---- linux-2.6.24/drivers/spi/atmel_spi.c 2008-01-24 17:58:37.000000000 -0500 -+++ linux-avr32/drivers/spi/atmel_spi.c 2008-02-01 14:51:43.000000000 -0500 -@@ -51,7 +51,9 @@ struct atmel_spi { - u8 stopping; - struct list_head queue; - struct spi_transfer *current_transfer; -- unsigned long remaining_bytes; -+ unsigned long current_remaining_bytes; -+ struct spi_transfer *next_transfer; -+ unsigned long next_remaining_bytes; - - void *buffer; - dma_addr_t buffer_dma; -@@ -121,6 +123,48 @@ static void cs_deactivate(struct atmel_s - gpio_set_value(gpio, !active); - } - -+static inline int atmel_spi_xfer_is_last(struct spi_message *msg, -+ struct spi_transfer *xfer) -+{ -+ return msg->transfers.prev == &xfer->transfer_list; -+} -+ -+static inline int atmel_spi_xfer_can_be_chained(struct spi_transfer *xfer) -+{ -+ return xfer->delay_usecs == 0 && !xfer->cs_change; -+} -+ -+static void atmel_spi_next_xfer_data(struct spi_master *master, -+ struct spi_transfer *xfer, -+ dma_addr_t *tx_dma, -+ dma_addr_t *rx_dma, -+ u32 *plen) -+{ -+ struct atmel_spi *as = spi_master_get_devdata(master); -+ u32 len = *plen; -+ -+ /* use scratch buffer only when rx or tx data is unspecified */ -+ if (xfer->rx_buf) -+ *rx_dma = xfer->rx_dma + xfer->len - len; -+ else { -+ *rx_dma = as->buffer_dma; -+ if (len > BUFFER_SIZE) -+ len = BUFFER_SIZE; -+ } -+ if (xfer->tx_buf) -+ *tx_dma = xfer->tx_dma + xfer->len - len; -+ else { -+ *tx_dma = as->buffer_dma; -+ if (len > BUFFER_SIZE) -+ len = BUFFER_SIZE; -+ memset(as->buffer, 0, len); -+ dma_sync_single_for_device(&as->pdev->dev, -+ as->buffer_dma, len, DMA_TO_DEVICE); -+ } -+ -+ *plen = len; -+} -+ - /* - * Submit next transfer for DMA. - * lock is held, spi irq is blocked -@@ -130,53 +174,78 @@ static void atmel_spi_next_xfer(struct s - { - struct atmel_spi *as = spi_master_get_devdata(master); - struct spi_transfer *xfer; -- u32 len; -+ u32 len, remaining, total; - dma_addr_t tx_dma, rx_dma; - -- xfer = as->current_transfer; -- if (!xfer || as->remaining_bytes == 0) { -- if (xfer) -- xfer = list_entry(xfer->transfer_list.next, -- struct spi_transfer, transfer_list); -- else -- xfer = list_entry(msg->transfers.next, -- struct spi_transfer, transfer_list); -- as->remaining_bytes = xfer->len; -- as->current_transfer = xfer; -+ if (!as->current_transfer) -+ xfer = list_entry(msg->transfers.next, -+ struct spi_transfer, transfer_list); -+ else if (!as->next_transfer) -+ xfer = list_entry(as->current_transfer->transfer_list.next, -+ struct spi_transfer, transfer_list); -+ else -+ xfer = NULL; -+ -+ if (xfer) { -+ len = xfer->len; -+ atmel_spi_next_xfer_data(master, xfer, &tx_dma, &rx_dma, &len); -+ remaining = xfer->len - len; -+ -+ spi_writel(as, RPR, rx_dma); -+ spi_writel(as, TPR, tx_dma); -+ -+ if (msg->spi->bits_per_word > 8) -+ len >>= 1; -+ spi_writel(as, RCR, len); -+ spi_writel(as, TCR, len); -+ -+ dev_dbg(&msg->spi->dev, -+ " start xfer %p: len %u tx %p/%08x rx %p/%08x\n", -+ xfer, xfer->len, xfer->tx_buf, xfer->tx_dma, -+ xfer->rx_buf, xfer->rx_dma); -+ } else { -+ xfer = as->next_transfer; -+ remaining = as->next_remaining_bytes; - } - -- len = as->remaining_bytes; -+ as->current_transfer = xfer; -+ as->current_remaining_bytes = remaining; - -- tx_dma = xfer->tx_dma + xfer->len - len; -- rx_dma = xfer->rx_dma + xfer->len - len; -+ if (remaining > 0) -+ len = remaining; -+ else if (!atmel_spi_xfer_is_last(msg, xfer) -+ && atmel_spi_xfer_can_be_chained(xfer)) { -+ xfer = list_entry(xfer->transfer_list.next, -+ struct spi_transfer, transfer_list); -+ len = xfer->len; -+ } else -+ xfer = NULL; - -- /* use scratch buffer only when rx or tx data is unspecified */ -- if (!xfer->rx_buf) { -- rx_dma = as->buffer_dma; -- if (len > BUFFER_SIZE) -- len = BUFFER_SIZE; -- } -- if (!xfer->tx_buf) { -- tx_dma = as->buffer_dma; -- if (len > BUFFER_SIZE) -- len = BUFFER_SIZE; -- memset(as->buffer, 0, len); -- dma_sync_single_for_device(&as->pdev->dev, -- as->buffer_dma, len, DMA_TO_DEVICE); -- } -+ as->next_transfer = xfer; - -- spi_writel(as, RPR, rx_dma); -- spi_writel(as, TPR, tx_dma); -+ if (xfer) { -+ total = len; -+ atmel_spi_next_xfer_data(master, xfer, &tx_dma, &rx_dma, &len); -+ as->next_remaining_bytes = total - len; -+ -+ spi_writel(as, RNPR, rx_dma); -+ spi_writel(as, TNPR, tx_dma); -+ -+ if (msg->spi->bits_per_word > 8) -+ len >>= 1; -+ spi_writel(as, RNCR, len); -+ spi_writel(as, TNCR, len); -+ -+ dev_dbg(&msg->spi->dev, -+ " next xfer %p: len %u tx %p/%08x rx %p/%08x\n", -+ xfer, xfer->len, xfer->tx_buf, xfer->tx_dma, -+ xfer->rx_buf, xfer->rx_dma); -+ } else { -+ spi_writel(as, RNCR, 0); -+ spi_writel(as, TNCR, 0); -+ } - -- as->remaining_bytes -= len; -- if (msg->spi->bits_per_word > 8) -- len >>= 1; -- -- /* REVISIT: when xfer->delay_usecs == 0, the PDC "next transfer" -- * mechanism might help avoid the IRQ latency between transfers -- * (and improve the nCS0 errata handling on at91rm9200 chips) -- * -- * We're also waiting for ENDRX before we start the next -+ /* REVISIT: We're waiting for ENDRX before we start the next - * transfer because we need to handle some difficult timing - * issues otherwise. If we wait for ENDTX in one transfer and - * then starts waiting for ENDRX in the next, it's difficult -@@ -186,17 +255,7 @@ static void atmel_spi_next_xfer(struct s - * - * It should be doable, though. Just not now... - */ -- spi_writel(as, TNCR, 0); -- spi_writel(as, RNCR, 0); - spi_writel(as, IER, SPI_BIT(ENDRX) | SPI_BIT(OVRES)); -- -- dev_dbg(&msg->spi->dev, -- " start xfer %p: len %u tx %p/%08x rx %p/%08x imr %03x\n", -- xfer, xfer->len, xfer->tx_buf, xfer->tx_dma, -- xfer->rx_buf, xfer->rx_dma, spi_readl(as, IMR)); -- -- spi_writel(as, RCR, len); -- spi_writel(as, TCR, len); - spi_writel(as, PTCR, SPI_BIT(TXTEN) | SPI_BIT(RXTEN)); - } - -@@ -294,6 +353,7 @@ atmel_spi_msg_done(struct spi_master *ma - spin_lock(&as->lock); - - as->current_transfer = NULL; -+ as->next_transfer = NULL; - - /* continue if needed */ - if (list_empty(&as->queue) || as->stopping) -@@ -377,7 +437,7 @@ atmel_spi_interrupt(int irq, void *dev_i - - spi_writel(as, IDR, pending); - -- if (as->remaining_bytes == 0) { -+ if (as->current_remaining_bytes == 0) { - msg->actual_length += xfer->len; - - if (!msg->is_dma_mapped) -@@ -387,7 +447,7 @@ atmel_spi_interrupt(int irq, void *dev_i - if (xfer->delay_usecs) - udelay(xfer->delay_usecs); - -- if (msg->transfers.prev == &xfer->transfer_list) { -+ if (atmel_spi_xfer_is_last(msg, xfer)) { - /* report completed message */ - atmel_spi_msg_done(master, as, msg, 0, - xfer->cs_change); -@@ -490,9 +550,14 @@ static int atmel_spi_setup(struct spi_de - if (!(spi->mode & SPI_CPHA)) - csr |= SPI_BIT(NCPHA); - -- /* TODO: DLYBS and DLYBCT */ -- csr |= SPI_BF(DLYBS, 10); -- csr |= SPI_BF(DLYBCT, 10); -+ /* DLYBS is mostly irrelevant since we manage chipselect using GPIOs. -+ * -+ * DLYBCT would add delays between words, slowing down transfers. -+ * It could potentially be useful to cope with DMA bottlenecks, but -+ * in those cases it's probably best to just use a lower bitrate. -+ */ -+ csr |= SPI_BF(DLYBS, 0); -+ csr |= SPI_BF(DLYBCT, 0); - - /* chipselect must have been muxed as GPIO (e.g. in board setup) */ - npcs_pin = (unsigned int)spi->controller_data; -diff -Nrup linux-2.6.24/drivers/video/atmel_lcdfb.c linux-avr32/drivers/video/atmel_lcdfb.c ---- linux-2.6.24/drivers/video/atmel_lcdfb.c 2008-01-24 17:58:37.000000000 -0500 -+++ linux-avr32/drivers/video/atmel_lcdfb.c 2008-02-01 14:51:44.000000000 -0500 -@@ -37,7 +37,9 @@ - #endif - - #if defined(CONFIG_ARCH_AT91) --#define ATMEL_LCDFB_FBINFO_DEFAULT FBINFO_DEFAULT -+#define ATMEL_LCDFB_FBINFO_DEFAULT (FBINFO_DEFAULT \ -+ | FBINFO_PARTIAL_PAN_OK \ -+ | FBINFO_HWACCEL_YPAN) - - static inline void atmel_lcdfb_update_dma2d(struct atmel_lcdfb_info *sinfo, - struct fb_var_screeninfo *var) -@@ -74,7 +76,7 @@ static struct fb_fix_screeninfo atmel_lc - .type = FB_TYPE_PACKED_PIXELS, - .visual = FB_VISUAL_TRUECOLOR, - .xpanstep = 0, -- .ypanstep = 0, -+ .ypanstep = 1, - .ywrapstep = 0, - .accel = FB_ACCEL_NONE, - }; -@@ -148,6 +150,8 @@ static int atmel_lcdfb_alloc_video_memor - return -ENOMEM; - } - -+ memset(info->screen_base, 0, info->fix.smem_len); -+ - return 0; - } - -@@ -203,6 +207,26 @@ static int atmel_lcdfb_check_var(struct - var->transp.offset = var->transp.length = 0; - var->xoffset = var->yoffset = 0; - -+ /* Saturate vertical and horizontal timings at maximum values */ -+ var->vsync_len = min_t(u32, var->vsync_len, -+ (ATMEL_LCDC_VPW >> ATMEL_LCDC_VPW_OFFSET) + 1); -+ var->upper_margin = min_t(u32, var->upper_margin, -+ ATMEL_LCDC_VBP >> ATMEL_LCDC_VBP_OFFSET); -+ var->lower_margin = min_t(u32, var->lower_margin, -+ ATMEL_LCDC_VFP); -+ var->right_margin = min_t(u32, var->right_margin, -+ (ATMEL_LCDC_HFP >> ATMEL_LCDC_HFP_OFFSET) + 1); -+ var->hsync_len = min_t(u32, var->hsync_len, -+ (ATMEL_LCDC_HPW >> ATMEL_LCDC_HPW_OFFSET) + 1); -+ var->left_margin = min_t(u32, var->left_margin, -+ ATMEL_LCDC_HBP + 1); -+ -+ /* Some parameters can't be zero */ -+ var->vsync_len = max_t(u32, var->vsync_len, 1); -+ var->right_margin = max_t(u32, var->right_margin, 1); -+ var->hsync_len = max_t(u32, var->hsync_len, 1); -+ var->left_margin = max_t(u32, var->left_margin, 1); -+ - switch (var->bits_per_pixel) { - case 1: - case 2: -@@ -516,7 +540,6 @@ static int __init atmel_lcdfb_init_fbinf - struct fb_info *info = sinfo->info; - int ret = 0; - -- memset_io(info->screen_base, 0, info->fix.smem_len); - info->var.activate |= FB_ACTIVATE_FORCE | FB_ACTIVATE_NOW; - - dev_info(info->device, -@@ -645,6 +668,11 @@ static int __init atmel_lcdfb_probe(stru - info->screen_base = ioremap(info->fix.smem_start, info->fix.smem_len); - if (!info->screen_base) - goto release_intmem; -+ -+ /* -+ * Don't clear the framebuffer -- someone may have set -+ * up a splash image. -+ */ - } else { - /* alocate memory buffer */ - ret = atmel_lcdfb_alloc_video_memory(sinfo); -diff -Nrup linux-2.6.24/drivers/video/console/Kconfig linux-avr32/drivers/video/console/Kconfig ---- linux-2.6.24/drivers/video/console/Kconfig 2008-01-24 17:58:37.000000000 -0500 -+++ linux-avr32/drivers/video/console/Kconfig 2008-02-01 14:51:44.000000000 -0500 -@@ -6,7 +6,7 @@ menu "Console display driver support" - - config VGA_CONSOLE - bool "VGA text console" if EMBEDDED || !X86 -- depends on !ARCH_ACORN && !ARCH_EBSA110 && !4xx && !8xx && !SPARC && !M68K && !PARISC && !FRV && !ARCH_VERSATILE && !SUPERH && !BLACKFIN -+ depends on !ARCH_ACORN && !ARCH_EBSA110 && !4xx && !8xx && !SPARC && !M68K && !PARISC && !FRV && !ARCH_VERSATILE && !SUPERH && !BLACKFIN && !AVR32 - default y - help - Saying Y here will allow you to use Linux in text mode through a -diff -Nrup linux-2.6.24/drivers/watchdog/Kconfig linux-avr32/drivers/watchdog/Kconfig ---- linux-2.6.24/drivers/watchdog/Kconfig 2008-01-24 17:58:37.000000000 -0500 -+++ linux-avr32/drivers/watchdog/Kconfig 2008-02-01 14:51:44.000000000 -0500 -@@ -223,7 +223,7 @@ config DAVINCI_WATCHDOG - - config AT32AP700X_WDT - tristate "AT32AP700x watchdog" -- depends on CPU_AT32AP7000 -+ depends on CPU_AT32AP700X - help - Watchdog timer embedded into AT32AP700x devices. This will reboot - your system when the timeout is reached. -diff -Nrup linux-2.6.24/include/asm-avr32/arch-at32ap/at32ap7000.h linux-avr32/include/asm-avr32/arch-at32ap/at32ap7000.h ---- linux-2.6.24/include/asm-avr32/arch-at32ap/at32ap7000.h 2008-01-24 17:58:37.000000000 -0500 -+++ linux-avr32/include/asm-avr32/arch-at32ap/at32ap7000.h 1969-12-31 19:00:00.000000000 -0500 -@@ -1,35 +0,0 @@ --/* -- * Pin definitions for AT32AP7000. -- * -- * Copyright (C) 2006 Atmel Corporation -- * -- * This program is free software; you can redistribute it and/or modify -- * it under the terms of the GNU General Public License version 2 as -- * published by the Free Software Foundation. -- */ --#ifndef __ASM_ARCH_AT32AP7000_H__ --#define __ASM_ARCH_AT32AP7000_H__ -- --#define GPIO_PERIPH_A 0 --#define GPIO_PERIPH_B 1 -- --#define NR_GPIO_CONTROLLERS 4 -- --/* -- * Pin numbers identifying specific GPIO pins on the chip. They can -- * also be converted to IRQ numbers by passing them through -- * gpio_to_irq(). -- */ --#define GPIO_PIOA_BASE (0) --#define GPIO_PIOB_BASE (GPIO_PIOA_BASE + 32) --#define GPIO_PIOC_BASE (GPIO_PIOB_BASE + 32) --#define GPIO_PIOD_BASE (GPIO_PIOC_BASE + 32) --#define GPIO_PIOE_BASE (GPIO_PIOD_BASE + 32) -- --#define GPIO_PIN_PA(N) (GPIO_PIOA_BASE + (N)) --#define GPIO_PIN_PB(N) (GPIO_PIOB_BASE + (N)) --#define GPIO_PIN_PC(N) (GPIO_PIOC_BASE + (N)) --#define GPIO_PIN_PD(N) (GPIO_PIOD_BASE + (N)) --#define GPIO_PIN_PE(N) (GPIO_PIOE_BASE + (N)) -- --#endif /* __ASM_ARCH_AT32AP7000_H__ */ -diff -Nrup linux-2.6.24/include/asm-avr32/arch-at32ap/at32ap700x.h linux-avr32/include/asm-avr32/arch-at32ap/at32ap700x.h ---- linux-2.6.24/include/asm-avr32/arch-at32ap/at32ap700x.h 1969-12-31 19:00:00.000000000 -0500 -+++ linux-avr32/include/asm-avr32/arch-at32ap/at32ap700x.h 2008-02-01 14:51:45.000000000 -0500 -@@ -0,0 +1,35 @@ -+/* -+ * Pin definitions for AT32AP7000. -+ * -+ * Copyright (C) 2006 Atmel Corporation -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 as -+ * published by the Free Software Foundation. -+ */ -+#ifndef __ASM_ARCH_AT32AP700X_H__ -+#define __ASM_ARCH_AT32AP700X_H__ -+ -+#define GPIO_PERIPH_A 0 -+#define GPIO_PERIPH_B 1 -+ -+#define NR_GPIO_CONTROLLERS 4 -+ -+/* -+ * Pin numbers identifying specific GPIO pins on the chip. They can -+ * also be converted to IRQ numbers by passing them through -+ * gpio_to_irq(). -+ */ -+#define GPIO_PIOA_BASE (0) -+#define GPIO_PIOB_BASE (GPIO_PIOA_BASE + 32) -+#define GPIO_PIOC_BASE (GPIO_PIOB_BASE + 32) -+#define GPIO_PIOD_BASE (GPIO_PIOC_BASE + 32) -+#define GPIO_PIOE_BASE (GPIO_PIOD_BASE + 32) -+ -+#define GPIO_PIN_PA(N) (GPIO_PIOA_BASE + (N)) -+#define GPIO_PIN_PB(N) (GPIO_PIOB_BASE + (N)) -+#define GPIO_PIN_PC(N) (GPIO_PIOC_BASE + (N)) -+#define GPIO_PIN_PD(N) (GPIO_PIOD_BASE + (N)) -+#define GPIO_PIN_PE(N) (GPIO_PIOE_BASE + (N)) -+ -+#endif /* __ASM_ARCH_AT32AP700X_H__ */ -diff -Nrup linux-2.6.24/include/asm-avr32/arch-at32ap/board.h linux-avr32/include/asm-avr32/arch-at32ap/board.h ---- linux-2.6.24/include/asm-avr32/arch-at32ap/board.h 2008-01-24 17:58:37.000000000 -0500 -+++ linux-avr32/include/asm-avr32/arch-at32ap/board.h 2008-02-01 14:51:45.000000000 -0500 -@@ -51,6 +51,9 @@ struct platform_device * - at32_add_device_ide(unsigned int id, unsigned int extint, - struct ide_platform_data *data); - -+/* mask says which PWM channels to mux */ -+struct platform_device *at32_add_device_pwm(u32 mask); -+ - /* depending on what's hooked up, not all SSC pins will be used */ - #define ATMEL_SSC_TK 0x01 - #define ATMEL_SSC_TF 0x02 -@@ -66,7 +69,13 @@ struct platform_device * - at32_add_device_ssc(unsigned int id, unsigned int flags); - - struct platform_device *at32_add_device_twi(unsigned int id); --struct platform_device *at32_add_device_mci(unsigned int id); -+ -+struct mci_platform_data { -+ int detect_pin; -+ int wp_pin; -+}; -+struct platform_device * -+at32_add_device_mci(unsigned int id, struct mci_platform_data *data); - struct platform_device *at32_add_device_ac97c(unsigned int id); - struct platform_device *at32_add_device_abdac(unsigned int id); - -diff -Nrup linux-2.6.24/include/asm-avr32/arch-at32ap/cpu.h linux-avr32/include/asm-avr32/arch-at32ap/cpu.h ---- linux-2.6.24/include/asm-avr32/arch-at32ap/cpu.h 2008-01-24 17:58:37.000000000 -0500 -+++ linux-avr32/include/asm-avr32/arch-at32ap/cpu.h 2008-02-01 14:51:45.000000000 -0500 -@@ -14,7 +14,7 @@ - * Only AT32AP7000 is defined for now. We can identify the specific - * chip at runtime, but I'm not sure if it's really worth it. - */ --#ifdef CONFIG_CPU_AT32AP7000 -+#ifdef CONFIG_CPU_AT32AP700X - # define cpu_is_at32ap7000() (1) - #else - # define cpu_is_at32ap7000() (0) -diff -Nrup linux-2.6.24/include/asm-avr32/arch-at32ap/io.h linux-avr32/include/asm-avr32/arch-at32ap/io.h ---- linux-2.6.24/include/asm-avr32/arch-at32ap/io.h 2008-01-24 17:58:37.000000000 -0500 -+++ linux-avr32/include/asm-avr32/arch-at32ap/io.h 2008-02-01 14:51:45.000000000 -0500 -@@ -4,7 +4,7 @@ - /* For "bizarre" halfword swapping */ - #include <linux/byteorder/swabb.h> - --#if defined(CONFIG_AP7000_32_BIT_SMC) -+#if defined(CONFIG_AP700X_32_BIT_SMC) - # define __swizzle_addr_b(addr) (addr ^ 3UL) - # define __swizzle_addr_w(addr) (addr ^ 2UL) - # define __swizzle_addr_l(addr) (addr) -@@ -14,7 +14,7 @@ - # define __mem_ioswabb(a, x) (x) - # define __mem_ioswabw(a, x) swab16(x) - # define __mem_ioswabl(a, x) swab32(x) --#elif defined(CONFIG_AP7000_16_BIT_SMC) -+#elif defined(CONFIG_AP700X_16_BIT_SMC) - # define __swizzle_addr_b(addr) (addr ^ 1UL) - # define __swizzle_addr_w(addr) (addr) - # define __swizzle_addr_l(addr) (addr) -diff -Nrup linux-2.6.24/include/asm-avr32/arch-at32ap/portmux.h linux-avr32/include/asm-avr32/arch-at32ap/portmux.h ---- linux-2.6.24/include/asm-avr32/arch-at32ap/portmux.h 2008-01-24 17:58:37.000000000 -0500 -+++ linux-avr32/include/asm-avr32/arch-at32ap/portmux.h 2008-02-01 14:51:45.000000000 -0500 -@@ -26,4 +26,16 @@ void at32_select_periph(unsigned int pin - void at32_select_gpio(unsigned int pin, unsigned long flags); - void at32_reserve_pin(unsigned int pin); - -+#ifdef CONFIG_GPIO_DEV -+ -+/* Gang allocators and accessors; used by the GPIO /dev driver */ -+int at32_gpio_port_is_valid(unsigned int port); -+int at32_select_gpio_pins(unsigned int port, u32 pins, u32 oe_mask); -+void at32_deselect_pins(unsigned int port, u32 pins); -+ -+u32 at32_gpio_get_value_multiple(unsigned int port, u32 pins); -+void at32_gpio_set_value_multiple(unsigned int port, u32 value, u32 mask); -+ -+#endif /* CONFIG_GPIO_DEV */ -+ - #endif /* __ASM_ARCH_PORTMUX_H__ */ -diff -Nrup linux-2.6.24/include/asm-avr32/dma-controller.h linux-avr32/include/asm-avr32/dma-controller.h ---- linux-2.6.24/include/asm-avr32/dma-controller.h 1969-12-31 19:00:00.000000000 -0500 -+++ linux-avr32/include/asm-avr32/dma-controller.h 2008-02-01 14:51:45.000000000 -0500 -@@ -0,0 +1,166 @@ -+/* -+ * Copyright (C) 2005-2006 Atmel Corporation -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 as -+ * published by the Free Software Foundation. -+ */ -+#ifndef __ASM_AVR32_DMA_CONTROLLER_H -+#define __ASM_AVR32_DMA_CONTROLLER_H -+ -+#include <linux/device.h> -+ -+#define DMA_DIR_MEM_TO_MEM 0x0000 -+#define DMA_DIR_MEM_TO_PERIPH 0x0001 -+#define DMA_DIR_PERIPH_TO_MEM 0x0002 -+#define DMA_DIR_PERIPH_TO_PERIPH 0x0003 -+ -+#define DMA_WIDTH_8BIT 0 -+#define DMA_WIDTH_16BIT 1 -+#define DMA_WIDTH_32BIT 2 -+ -+struct dma_request { -+ struct dma_controller *dmac; -+ struct list_head list; -+ -+ unsigned short channel; -+ -+ void (*xfer_complete)(struct dma_request *req); -+ void (*block_complete)(struct dma_request *req); -+ void (*error)(struct dma_request *req); -+}; -+ -+struct dma_request_sg { -+ struct dma_request req; -+ -+ int nr_sg; -+ struct scatterlist *sg; -+ unsigned long block_size; -+ unsigned int nr_blocks; -+ -+ dma_addr_t data_reg; -+ unsigned short periph_id; -+ -+ unsigned char direction; -+ unsigned char width; -+}; -+#define to_dma_request_sg(_req) \ -+ container_of(_req, struct dma_request_sg, req) -+ -+struct dma_request_cyclic { -+ struct dma_request req; -+ -+ int periods; -+ unsigned long buffer_size; -+ -+ dma_addr_t buffer_start; -+ dma_addr_t data_reg; -+ -+ unsigned short periph_id; -+ unsigned char direction; -+ unsigned char width; -+ -+ void *dev_id; -+}; -+#define to_dma_request_cyclic(_req) \ -+ container_of(_req, struct dma_request_cyclic, req) -+ -+struct dma_request_memcpy { -+ struct dma_request req; -+ -+ dma_addr_t src_addr; -+ unsigned int src_width; -+ unsigned int src_stride; -+ -+ dma_addr_t dst_addr; -+ unsigned int dst_width; -+ unsigned int dst_stride; -+ -+ size_t length; -+ -+ unsigned short src_reverse:1; -+ unsigned short dst_reverse:1; -+}; -+#define to_dma_request_memcpy(_req) \ -+ container_of(_req, struct dma_request_memcpy, req) -+ -+struct dma_controller { -+ struct list_head list; -+ int id; -+ struct device *dev; -+ -+ int (*alloc_channel)(struct dma_controller *dmac); -+ void (*release_channel)(struct dma_controller *dmac, -+ int channel); -+ int (*prepare_request_sg)(struct dma_controller *dmac, -+ struct dma_request_sg *req); -+ int (*prepare_request_cyclic)(struct dma_controller *dmac, -+ struct dma_request_cyclic *req); -+ int (*prepare_request_memcpy)(struct dma_controller *dmac, -+ struct dma_request_memcpy *req); -+ int (*start_request)(struct dma_controller *dmac, -+ unsigned int channel); -+ int (*stop_request)(struct dma_controller *dmac, -+ unsigned int channel); -+ dma_addr_t (*get_current_pos)(struct dma_controller *dmac, -+ unsigned int channel); -+}; -+ -+static inline int -+dma_alloc_channel(struct dma_controller *dmac) -+{ -+ return dmac->alloc_channel(dmac); -+} -+ -+static inline void -+dma_release_channel(struct dma_controller *dmac, int chan) -+{ -+ dmac->release_channel(dmac, chan); -+} -+ -+static inline int -+dma_prepare_request_sg(struct dma_controller *dmac, -+ struct dma_request_sg *req) -+{ -+ return dmac->prepare_request_sg(dmac, req); -+} -+ -+static inline int -+dma_prepare_request_cyclic(struct dma_controller *dmac, -+ struct dma_request_cyclic *req) -+{ -+ return dmac->prepare_request_cyclic(dmac, req); -+} -+ -+static inline int -+dma_prepare_request_memcpy(struct dma_controller *dmac, -+ struct dma_request_memcpy *req) -+{ -+ return dmac->prepare_request_memcpy(dmac, req); -+} -+ -+static inline int -+dma_start_request(struct dma_controller *dmac, -+ unsigned int channel) -+{ -+ return dmac->start_request(dmac, channel); -+} -+ -+static inline int -+dma_stop_request(struct dma_controller *dmac, -+ unsigned int channel) -+{ -+ return dmac->stop_request(dmac, channel); -+} -+ -+static inline dma_addr_t -+dma_get_current_pos(struct dma_controller *dmac, -+ unsigned int channel) -+{ -+ return dmac->get_current_pos(dmac, channel); -+} -+ -+extern int register_dma_controller(struct dma_controller *dmac); -+extern struct dma_controller *find_dma_controller(int id); -+ -+#endif /* __ASM_AVR32_DMA_CONTROLLER_H */ -diff -Nrup linux-2.6.24/include/asm-avr32/irq.h linux-avr32/include/asm-avr32/irq.h ---- linux-2.6.24/include/asm-avr32/irq.h 2008-01-24 17:58:37.000000000 -0500 -+++ linux-avr32/include/asm-avr32/irq.h 2008-02-01 14:51:45.000000000 -0500 -@@ -11,4 +11,9 @@ - - #define irq_canonicalize(i) (i) - -+#ifndef __ASSEMBLER__ -+int nmi_enable(void); -+void nmi_disable(void); -+#endif -+ - #endif /* __ASM_AVR32_IOCTLS_H */ -diff -Nrup linux-2.6.24/include/asm-avr32/kdebug.h linux-avr32/include/asm-avr32/kdebug.h ---- linux-2.6.24/include/asm-avr32/kdebug.h 2008-01-24 17:58:37.000000000 -0500 -+++ linux-avr32/include/asm-avr32/kdebug.h 2008-02-01 14:51:45.000000000 -0500 -@@ -5,6 +5,7 @@ - enum die_val { - DIE_BREAKPOINT, - DIE_SSTEP, -+ DIE_NMI, - }; - - #endif /* __ASM_AVR32_KDEBUG_H */ -diff -Nrup linux-2.6.24/include/asm-avr32/ocd.h linux-avr32/include/asm-avr32/ocd.h ---- linux-2.6.24/include/asm-avr32/ocd.h 2008-01-24 17:58:37.000000000 -0500 -+++ linux-avr32/include/asm-avr32/ocd.h 2008-02-01 14:51:45.000000000 -0500 -@@ -533,6 +533,11 @@ static inline void __ocd_write(unsigned - #define ocd_read(reg) __ocd_read(OCD_##reg) - #define ocd_write(reg, value) __ocd_write(OCD_##reg, value) - -+struct task_struct; -+ -+void ocd_enable(struct task_struct *child); -+void ocd_disable(struct task_struct *child); -+ - #endif /* !__ASSEMBLER__ */ - - #endif /* __ASM_AVR32_OCD_H */ -diff -Nrup linux-2.6.24/include/asm-avr32/processor.h linux-avr32/include/asm-avr32/processor.h ---- linux-2.6.24/include/asm-avr32/processor.h 2008-01-24 17:58:37.000000000 -0500 -+++ linux-avr32/include/asm-avr32/processor.h 2008-02-01 14:51:45.000000000 -0500 -@@ -57,11 +57,25 @@ struct avr32_cpuinfo { - unsigned short cpu_revision; - enum tlb_config tlb_config; - unsigned long features; -+ u32 device_id; - - struct cache_info icache; - struct cache_info dcache; - }; - -+static inline unsigned int avr32_get_manufacturer_id(struct avr32_cpuinfo *cpu) -+{ -+ return (cpu->device_id >> 1) & 0x7f; -+} -+static inline unsigned int avr32_get_product_number(struct avr32_cpuinfo *cpu) -+{ -+ return (cpu->device_id >> 12) & 0xffff; -+} -+static inline unsigned int avr32_get_chip_revision(struct avr32_cpuinfo *cpu) -+{ -+ return (cpu->device_id >> 28) & 0x0f; -+} -+ - extern struct avr32_cpuinfo boot_cpu_data; - - #ifdef CONFIG_SMP -diff -Nrup linux-2.6.24/include/asm-avr32/ptrace.h linux-avr32/include/asm-avr32/ptrace.h ---- linux-2.6.24/include/asm-avr32/ptrace.h 2008-01-24 17:58:37.000000000 -0500 -+++ linux-avr32/include/asm-avr32/ptrace.h 2008-02-01 14:51:45.000000000 -0500 -@@ -121,7 +121,15 @@ struct pt_regs { - }; - - #ifdef __KERNEL__ --# define user_mode(regs) (((regs)->sr & MODE_MASK) == MODE_USER) -+ -+#include <asm/ocd.h> -+ -+#define arch_ptrace_attach(child) ocd_enable(child) -+ -+#define user_mode(regs) (((regs)->sr & MODE_MASK) == MODE_USER) -+#define instruction_pointer(regs) ((regs)->pc) -+#define profile_pc(regs) instruction_pointer(regs) -+ - extern void show_regs (struct pt_regs *); - - static __inline__ int valid_user_regs(struct pt_regs *regs) -@@ -141,9 +149,6 @@ static __inline__ int valid_user_regs(st - return 0; - } - --#define instruction_pointer(regs) ((regs)->pc) -- --#define profile_pc(regs) instruction_pointer(regs) - - #endif /* __KERNEL__ */ - -diff -Nrup linux-2.6.24/include/asm-avr32/thread_info.h linux-avr32/include/asm-avr32/thread_info.h ---- linux-2.6.24/include/asm-avr32/thread_info.h 2008-01-24 17:58:37.000000000 -0500 -+++ linux-avr32/include/asm-avr32/thread_info.h 2008-02-01 14:51:45.000000000 -0500 -@@ -88,6 +88,7 @@ static inline struct thread_info *curren - #define TIF_MEMDIE 6 - #define TIF_RESTORE_SIGMASK 7 /* restore signal mask in do_signal */ - #define TIF_CPU_GOING_TO_SLEEP 8 /* CPU is entering sleep 0 mode */ -+#define TIF_DEBUG 30 /* debugging enabled */ - #define TIF_USERSPACE 31 /* true if FS sets userspace */ - - #define _TIF_SYSCALL_TRACE (1 << TIF_SYSCALL_TRACE) -diff -Nrup linux-2.6.24/include/linux/atmel_pwm.h linux-avr32/include/linux/atmel_pwm.h ---- linux-2.6.24/include/linux/atmel_pwm.h 1969-12-31 19:00:00.000000000 -0500 -+++ linux-avr32/include/linux/atmel_pwm.h 2008-02-01 14:51:47.000000000 -0500 -@@ -0,0 +1,70 @@ -+#ifndef __LINUX_ATMEL_PWM_H -+#define __LINUX_ATMEL_PWM_H -+ -+/** -+ * struct pwm_channel - driver handle to a PWM channel -+ * @regs: base of this channel's registers -+ * @index: number of this channel (0..31) -+ * @mck: base clock rate, which can be prescaled and maybe subdivided -+ * -+ * Drivers initialize a pwm_channel structure using pwm_channel_alloc(). -+ * Then they configure its clock rate (derived from MCK), alignment, -+ * polarity, and duty cycle by writing directly to the channel registers, -+ * before enabling the channel by calling pwm_channel_enable(). -+ * -+ * After emitting a PWM signal for the desired length of time, drivers -+ * may then pwm_channel_disable() or pwm_channel_free(). Both of these -+ * disable the channel, but when it's freed the IRQ is deconfigured and -+ * the channel must later be re-allocated and reconfigured. -+ * -+ * Note that if the period or duty cycle need to be changed while the -+ * PWM channel is operating, drivers must use the PWM_CUPD double buffer -+ * mechanism, either polling until they change or getting implicitly -+ * notified through a once-per-period interrupt handler. -+ */ -+struct pwm_channel { -+ void __iomem *regs; -+ unsigned index; -+ unsigned long mck; -+}; -+ -+extern int pwm_channel_alloc(int index, struct pwm_channel *ch); -+extern int pwm_channel_free(struct pwm_channel *ch); -+ -+extern int pwm_clk_alloc(unsigned prescale, unsigned div); -+extern void pwm_clk_free(unsigned clk); -+ -+extern int __pwm_channel_onoff(struct pwm_channel *ch, int enabled); -+ -+#define pwm_channel_enable(ch) __pwm_channel_onoff((ch), 1) -+#define pwm_channel_disable(ch) __pwm_channel_onoff((ch), 0) -+ -+/* periodic interrupts, mostly for CUPD changes to period or cycle */ -+extern int pwm_channel_handler(struct pwm_channel *ch, -+ void (*handler)(struct pwm_channel *ch)); -+ -+/* per-channel registers (banked at pwm_channel->regs) */ -+#define PWM_CMR 0x00 /* mode register */ -+#define PWM_CPR_CPD (1 << 10) /* set: CUPD modifies period */ -+#define PWM_CPR_CPOL (1 << 9) /* set: idle high */ -+#define PWM_CPR_CALG (1 << 8) /* set: center align */ -+#define PWM_CPR_CPRE (0xf << 0) /* mask: rate is mck/(2^pre) */ -+#define PWM_CPR_CLKA (0xb << 0) /* rate CLKA */ -+#define PWM_CPR_CLKB (0xc << 0) /* rate CLKB */ -+#define PWM_CDTY 0x04 /* duty cycle (max of CPRD) */ -+#define PWM_CPRD 0x08 /* period (count up from zero) */ -+#define PWM_CCNT 0x0c /* counter (20 bits?) */ -+#define PWM_CUPD 0x10 /* update CPRD (or CDTY) next period */ -+ -+static inline void -+pwm_channel_writel(struct pwm_channel *pwmc, unsigned offset, u32 val) -+{ -+ __raw_writel(val, pwmc->regs + offset); -+} -+ -+static inline u32 pwm_channel_readl(struct pwm_channel *pwmc, unsigned offset) -+{ -+ return __raw_readl(pwmc->regs + offset); -+} -+ -+#endif /* __LINUX_ATMEL_PWM_H */ -diff -Nrup linux-2.6.24/include/video/atmel_lcdc.h linux-avr32/include/video/atmel_lcdc.h ---- linux-2.6.24/include/video/atmel_lcdc.h 2008-01-24 17:58:37.000000000 -0500 -+++ linux-avr32/include/video/atmel_lcdc.h 2008-02-01 14:51:47.000000000 -0500 -@@ -115,20 +115,20 @@ struct atmel_lcdfb_info { - #define ATMEL_LCDC_MEMOR_LITTLE (1 << 31) - - #define ATMEL_LCDC_TIM1 0x0808 --#define ATMEL_LCDC_VFP (0xff << 0) -+#define ATMEL_LCDC_VFP (0xffU << 0) - #define ATMEL_LCDC_VBP_OFFSET 8 --#define ATMEL_LCDC_VBP (0xff << ATMEL_LCDC_VBP_OFFSET) -+#define ATMEL_LCDC_VBP (0xffU << ATMEL_LCDC_VBP_OFFSET) - #define ATMEL_LCDC_VPW_OFFSET 16 --#define ATMEL_LCDC_VPW (0x3f << ATMEL_LCDC_VPW_OFFSET) -+#define ATMEL_LCDC_VPW (0x3fU << ATMEL_LCDC_VPW_OFFSET) - #define ATMEL_LCDC_VHDLY_OFFSET 24 --#define ATMEL_LCDC_VHDLY (0xf << ATMEL_LCDC_VHDLY_OFFSET) -+#define ATMEL_LCDC_VHDLY (0xfU << ATMEL_LCDC_VHDLY_OFFSET) - - #define ATMEL_LCDC_TIM2 0x080c --#define ATMEL_LCDC_HBP (0xff << 0) -+#define ATMEL_LCDC_HBP (0xffU << 0) - #define ATMEL_LCDC_HPW_OFFSET 8 --#define ATMEL_LCDC_HPW (0x3f << ATMEL_LCDC_HPW_OFFSET) -+#define ATMEL_LCDC_HPW (0x3fU << ATMEL_LCDC_HPW_OFFSET) - #define ATMEL_LCDC_HFP_OFFSET 21 --#define ATMEL_LCDC_HFP (0x7ff << ATMEL_LCDC_HFP_OFFSET) -+#define ATMEL_LCDC_HFP (0x7ffU << ATMEL_LCDC_HFP_OFFSET) - - #define ATMEL_LCDC_LCDFRMCFG 0x0810 - #define ATMEL_LCDC_LINEVAL (0x7ff << 0) -diff -Nrup linux-2.6.24/kernel/ptrace.c linux-avr32/kernel/ptrace.c ---- linux-2.6.24/kernel/ptrace.c 2008-01-24 17:58:37.000000000 -0500 -+++ linux-avr32/kernel/ptrace.c 2008-02-01 14:51:47.000000000 -0500 -@@ -470,6 +470,8 @@ asmlinkage long sys_ptrace(long request, - lock_kernel(); - if (request == PTRACE_TRACEME) { - ret = ptrace_traceme(); -+ if (!ret) -+ arch_ptrace_attach(current); - goto out; - } - -diff -Nrup linux-2.6.24/sound/avr32/ac97c.c linux-avr32/sound/avr32/ac97c.c ---- linux-2.6.24/sound/avr32/ac97c.c 1969-12-31 19:00:00.000000000 -0500 -+++ linux-avr32/sound/avr32/ac97c.c 2008-02-01 14:51:48.000000000 -0500 -@@ -0,0 +1,914 @@ -+/* -+ * Driver for the Atmel AC97 controller -+ * -+ * Copyright (C) 2005-2007 Atmel Corporation -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 as published by -+ * the Free Software Foundation. -+ */ -+#include <linux/clk.h> -+#include <linux/delay.h> -+#include <linux/dma-mapping.h> -+#include <linux/init.h> -+#include <linux/interrupt.h> -+#include <linux/module.h> -+#include <linux/platform_device.h> -+#include <linux/mutex.h> -+#include <linux/io.h> -+ -+#include <sound/driver.h> -+#include <sound/core.h> -+#include <sound/initval.h> -+#include <sound/pcm.h> -+#include <sound/pcm_params.h> -+#include <sound/ac97_codec.h> -+#include <sound/memalloc.h> -+ -+#include <asm/dma-controller.h> -+ -+#include "ac97c.h" -+ -+/* Serialize access to opened */ -+static DEFINE_MUTEX(opened_mutex); -+ -+struct atmel_ac97_dma_info { -+ struct dma_request_cyclic req_tx; -+ struct dma_request_cyclic req_rx; -+ unsigned short rx_periph_id; -+ unsigned short tx_periph_id; -+}; -+ -+struct atmel_ac97 { -+ /* Serialize access to opened */ -+ spinlock_t lock; -+ void __iomem *regs; -+ struct snd_pcm_substream *playback_substream; -+ struct snd_pcm_substream *capture_substream; -+ struct snd_card *card; -+ struct snd_pcm *pcm; -+ struct snd_ac97 *ac97; -+ struct snd_ac97_bus *ac97_bus; -+ int opened; -+ int period; -+ u64 cur_format; -+ unsigned int cur_rate; -+ struct clk *mck; -+ struct platform_device *pdev; -+ struct atmel_ac97_dma_info dma; -+}; -+ -+#define get_chip(card) ((struct atmel_ac97 *)(card)->private_data) -+ -+#define ac97c_writel(chip, reg, val) \ -+ __raw_writel((val), (chip)->regs + AC97C_##reg) -+#define ac97c_readl(chip, reg) \ -+ __raw_readl((chip)->regs + AC97C_##reg) -+ -+/* -+ * PCM part -+ */ -+static struct snd_pcm_hardware snd_atmel_ac97_playback_hw = { -+ .info = (SNDRV_PCM_INFO_INTERLEAVED -+ | SNDRV_PCM_INFO_MMAP -+ | SNDRV_PCM_INFO_MMAP_VALID -+ | SNDRV_PCM_INFO_BLOCK_TRANSFER -+ | SNDRV_PCM_INFO_JOINT_DUPLEX), -+ .formats = (SNDRV_PCM_FMTBIT_S16_BE -+ | SNDRV_PCM_FMTBIT_S16_LE), -+ .rates = (SNDRV_PCM_RATE_CONTINUOUS), -+ .rate_min = 4000, -+ .rate_max = 48000, -+ .channels_min = 1, -+ .channels_max = 6, -+ .buffer_bytes_max = 64*1024, -+ .period_bytes_min = 512, -+ .period_bytes_max = 4095, -+ .periods_min = 8, -+ .periods_max = 1024, -+}; -+ -+static struct snd_pcm_hardware snd_atmel_ac97_capture_hw = { -+ .info = (SNDRV_PCM_INFO_INTERLEAVED -+ | SNDRV_PCM_INFO_MMAP -+ | SNDRV_PCM_INFO_MMAP_VALID -+ | SNDRV_PCM_INFO_BLOCK_TRANSFER -+ | SNDRV_PCM_INFO_JOINT_DUPLEX), -+ .formats = (SNDRV_PCM_FMTBIT_S16_BE -+ | SNDRV_PCM_FMTBIT_S16_LE), -+ .rates = (SNDRV_PCM_RATE_CONTINUOUS), -+ .rate_min = 4000, -+ .rate_max = 48000, -+ .channels_min = 1, -+ .channels_max = 2, -+ .buffer_bytes_max = 64*1024, -+ .period_bytes_min = 512, -+ .period_bytes_max = 4095, -+ .periods_min = 8, -+ .periods_max = 1024, -+}; -+ -+/* -+ * PCM functions -+ */ -+static int -+snd_atmel_ac97_playback_open(struct snd_pcm_substream *substream) -+{ -+ struct atmel_ac97 *chip = snd_pcm_substream_chip(substream); -+ struct snd_pcm_runtime *runtime = substream->runtime; -+ -+ mutex_lock(&opened_mutex); -+ chip->opened++; -+ runtime->hw = snd_atmel_ac97_playback_hw; -+ if (chip->cur_rate) { -+ runtime->hw.rate_min = chip->cur_rate; -+ runtime->hw.rate_max = chip->cur_rate; -+ } -+ if (chip->cur_format) -+ runtime->hw.formats = (1ULL << chip->cur_format); -+ mutex_unlock(&opened_mutex); -+ chip->playback_substream = substream; -+ chip->period = 0; -+ return 0; -+} -+ -+static int -+snd_atmel_ac97_capture_open(struct snd_pcm_substream *substream) -+{ -+ struct atmel_ac97 *chip = snd_pcm_substream_chip(substream); -+ struct snd_pcm_runtime *runtime = substream->runtime; -+ -+ mutex_lock(&opened_mutex); -+ chip->opened++; -+ runtime->hw = snd_atmel_ac97_capture_hw; -+ if (chip->cur_rate) { -+ runtime->hw.rate_min = chip->cur_rate; -+ runtime->hw.rate_max = chip->cur_rate; -+ } -+ if (chip->cur_format) -+ runtime->hw.formats = (1ULL << chip->cur_format); -+ mutex_unlock(&opened_mutex); -+ chip->capture_substream = substream; -+ chip->period = 0; -+ return 0; -+} -+ -+static int snd_atmel_ac97_playback_close(struct snd_pcm_substream *substream) -+{ -+ struct atmel_ac97 *chip = snd_pcm_substream_chip(substream); -+ mutex_lock(&opened_mutex); -+ chip->opened--; -+ if (!chip->opened) { -+ chip->cur_rate = 0; -+ chip->cur_format = 0; -+ } -+ mutex_unlock(&opened_mutex); -+ return 0; -+} -+ -+static int snd_atmel_ac97_capture_close(struct snd_pcm_substream *substream) -+{ -+ struct atmel_ac97 *chip = snd_pcm_substream_chip(substream); -+ mutex_lock(&opened_mutex); -+ chip->opened--; -+ if (!chip->opened) { -+ chip->cur_rate = 0; -+ chip->cur_format = 0; -+ } -+ mutex_unlock(&opened_mutex); -+ return 0; -+} -+ -+static int -+snd_atmel_ac97_playback_hw_params(struct snd_pcm_substream *substream, -+ struct snd_pcm_hw_params *hw_params) -+{ -+ struct atmel_ac97 *chip = snd_pcm_substream_chip(substream); -+ int err; -+ -+ err = snd_pcm_lib_malloc_pages(substream, -+ params_buffer_bytes(hw_params)); -+ if (err < 0) -+ return err; -+ -+ /* Set restrictions to params */ -+ mutex_lock(&opened_mutex); -+ chip->cur_rate = params_rate(hw_params); -+ chip->cur_format = params_format(hw_params); -+ mutex_unlock(&opened_mutex); -+ -+ return 0; -+} -+ -+static int -+snd_atmel_ac97_capture_hw_params(struct snd_pcm_substream *substream, -+ struct snd_pcm_hw_params *hw_params) -+{ -+ struct atmel_ac97 *chip = snd_pcm_substream_chip(substream); -+ int err; -+ -+ err = snd_pcm_lib_malloc_pages(substream, -+ params_buffer_bytes(hw_params)); -+ if (err < 0) -+ return err; -+ -+ /* Set restrictions to params */ -+ mutex_lock(&opened_mutex); -+ chip->cur_rate = params_rate(hw_params); -+ chip->cur_format = params_format(hw_params); -+ mutex_unlock(&opened_mutex); -+ -+ return 0; -+} -+ -+static int snd_atmel_ac97_playback_hw_free(struct snd_pcm_substream *substream) -+{ -+ return snd_pcm_lib_free_pages(substream); -+} -+ -+static int snd_atmel_ac97_capture_hw_free(struct snd_pcm_substream *substream) -+{ -+ -+ return snd_pcm_lib_free_pages(substream); -+} -+ -+static int snd_atmel_ac97_playback_prepare(struct snd_pcm_substream *substream) -+{ -+ struct atmel_ac97 *chip = snd_pcm_substream_chip(substream); -+ struct platform_device *pdev = chip->pdev; -+ struct snd_pcm_runtime *runtime = substream->runtime; -+ int block_size = frames_to_bytes(runtime, runtime->period_size); -+ unsigned long word = 0; -+ unsigned long buffer_size = 0; -+ -+ dma_sync_single_for_device(&pdev->dev, runtime->dma_addr, -+ block_size * 2, DMA_TO_DEVICE); -+ -+ /* Assign slots to channels */ -+ switch (substream->runtime->channels) { -+ case 1: -+ word |= AC97C_CH_ASSIGN(PCM_LEFT, A); -+ break; -+ case 2: -+ /* Assign Left and Right slot to Channel A */ -+ word |= AC97C_CH_ASSIGN(PCM_LEFT, A) -+ | AC97C_CH_ASSIGN(PCM_RIGHT, A); -+ break; -+ default: -+ /* TODO: support more than two channels */ -+ return -EINVAL; -+ break; -+ } -+ ac97c_writel(chip, OCA, word); -+ -+ /* Configure sample format and size */ -+ word = AC97C_CMR_PDCEN | AC97C_CMR_SIZE_16; -+ -+ switch (runtime->format) { -+ case SNDRV_PCM_FORMAT_S16_LE: -+ word |= AC97C_CMR_CEM_LITTLE; -+ break; -+ case SNDRV_PCM_FORMAT_S16_BE: /* fall through */ -+ default: -+ word &= ~AC97C_CMR_CEM_LITTLE; -+ break; -+ } -+ -+ ac97c_writel(chip, CAMR, word); -+ -+ /* Set variable rate if needed */ -+ if (runtime->rate != 48000) { -+ word = ac97c_readl(chip, MR); -+ word |= AC97C_MR_VRA; -+ ac97c_writel(chip, MR, word); -+ } else { -+ /* Clear Variable Rate Bit */ -+ word = ac97c_readl(chip, MR); -+ word &= ~AC97C_MR_VRA; -+ ac97c_writel(chip, MR, word); -+ } -+ -+ /* Set rate */ -+ snd_ac97_set_rate(chip->ac97, AC97_PCM_FRONT_DAC_RATE, runtime->rate); -+ -+ buffer_size = frames_to_bytes(runtime, runtime->period_size) * -+ runtime->periods; -+ -+ chip->dma.req_tx.buffer_size = buffer_size; -+ chip->dma.req_tx.periods = runtime->periods; -+ -+ BUG_ON(chip->dma.req_tx.buffer_size != -+ (chip->dma.req_tx.periods * -+ frames_to_bytes(runtime, runtime->period_size))); -+ -+ chip->dma.req_tx.buffer_start = runtime->dma_addr; -+ chip->dma.req_tx.data_reg = (dma_addr_t)(chip->regs + AC97C_CATHR + 2); -+ chip->dma.req_tx.periph_id = chip->dma.tx_periph_id; -+ chip->dma.req_tx.direction = DMA_DIR_MEM_TO_PERIPH; -+ chip->dma.req_tx.width = DMA_WIDTH_16BIT; -+ chip->dma.req_tx.dev_id = chip; -+ -+ return 0; -+} -+ -+static int snd_atmel_ac97_capture_prepare(struct snd_pcm_substream *substream) -+{ -+ struct atmel_ac97 *chip = snd_pcm_substream_chip(substream); -+ struct platform_device *pdev = chip->pdev; -+ struct snd_pcm_runtime *runtime = substream->runtime; -+ int block_size = frames_to_bytes(runtime, runtime->period_size); -+ unsigned long word = 0; -+ unsigned long buffer_size = 0; -+ -+ dma_sync_single_for_device(&pdev->dev, runtime->dma_addr, -+ block_size * 2, DMA_FROM_DEVICE); -+ -+ /* Assign slots to channels */ -+ switch (substream->runtime->channels) { -+ case 1: -+ word |= AC97C_CH_ASSIGN(PCM_LEFT, A); -+ break; -+ case 2: -+ /* Assign Left and Right slot to Channel A */ -+ word |= AC97C_CH_ASSIGN(PCM_LEFT, A) -+ | AC97C_CH_ASSIGN(PCM_RIGHT, A); -+ break; -+ default: -+ /* TODO: support more than two channels */ -+ return -EINVAL; -+ break; -+ } -+ ac97c_writel(chip, ICA, word); -+ -+ /* Configure sample format and size */ -+ word = AC97C_CMR_PDCEN | AC97C_CMR_SIZE_16; -+ -+ switch (runtime->format) { -+ case SNDRV_PCM_FORMAT_S16_LE: -+ word |= AC97C_CMR_CEM_LITTLE; -+ break; -+ case SNDRV_PCM_FORMAT_S16_BE: -+ default: -+ word &= ~(AC97C_CMR_CEM_LITTLE); -+ break; -+ } -+ -+ ac97c_writel(chip, CAMR, word); -+ -+ /* Set variable rate if needed */ -+ if (runtime->rate != 48000) { -+ word = ac97c_readl(chip, MR); -+ word |= AC97C_MR_VRA; -+ ac97c_writel(chip, MR, word); -+ } else { -+ /* Clear Variable Rate Bit */ -+ word = ac97c_readl(chip, MR); -+ word &= ~(AC97C_MR_VRA); -+ ac97c_writel(chip, MR, word); -+ } -+ -+ /* Set rate */ -+ snd_ac97_set_rate(chip->ac97, AC97_PCM_LR_ADC_RATE, runtime->rate); -+ -+ buffer_size = frames_to_bytes(runtime, runtime->period_size) * -+ runtime->periods; -+ -+ chip->dma.req_rx.buffer_size = buffer_size; -+ chip->dma.req_rx.periods = runtime->periods; -+ -+ BUG_ON(chip->dma.req_rx.buffer_size != -+ (chip->dma.req_rx.periods * -+ frames_to_bytes(runtime, runtime->period_size))); -+ -+ chip->dma.req_rx.buffer_start = runtime->dma_addr; -+ chip->dma.req_rx.data_reg = (dma_addr_t)(chip->regs + AC97C_CARHR + 2); -+ chip->dma.req_rx.periph_id = chip->dma.rx_periph_id; -+ chip->dma.req_rx.direction = DMA_DIR_PERIPH_TO_MEM; -+ chip->dma.req_rx.width = DMA_WIDTH_16BIT; -+ chip->dma.req_rx.dev_id = chip; -+ -+ return 0; -+} -+ -+ static int -+snd_atmel_ac97_playback_trigger(struct snd_pcm_substream *substream, int cmd) -+{ -+ struct atmel_ac97 *chip = snd_pcm_substream_chip(substream); -+ unsigned long camr; -+ int flags, err = 0; -+ -+ spin_lock_irqsave(&chip->lock, flags); -+ camr = ac97c_readl(chip, CAMR); -+ -+ switch (cmd) { -+ case SNDRV_PCM_TRIGGER_START: -+ err = dma_prepare_request_cyclic(chip->dma.req_tx.req.dmac, -+ &chip->dma.req_tx); -+ dma_start_request(chip->dma.req_tx.req.dmac, -+ chip->dma.req_tx.req.channel); -+ camr |= AC97C_CMR_CENA; -+ break; -+ case SNDRV_PCM_TRIGGER_STOP: -+ err = dma_stop_request(chip->dma.req_tx.req.dmac, -+ chip->dma.req_tx.req.channel); -+ if (chip->opened <= 1) -+ camr &= ~AC97C_CMR_CENA; -+ break; -+ default: -+ err = -EINVAL; -+ break; -+ } -+ -+ ac97c_writel(chip, CAMR, camr); -+ -+ spin_unlock_irqrestore(&chip->lock, flags); -+ return err; -+} -+ -+ static int -+snd_atmel_ac97_capture_trigger(struct snd_pcm_substream *substream, int cmd) -+{ -+ struct atmel_ac97 *chip = snd_pcm_substream_chip(substream); -+ unsigned long camr; -+ int flags, err = 0; -+ -+ spin_lock_irqsave(&chip->lock, flags); -+ camr = ac97c_readl(chip, CAMR); -+ -+ switch (cmd) { -+ case SNDRV_PCM_TRIGGER_START: -+ err = dma_prepare_request_cyclic(chip->dma.req_rx.req.dmac, -+ &chip->dma.req_rx); -+ dma_start_request(chip->dma.req_rx.req.dmac, -+ chip->dma.req_rx.req.channel); -+ camr |= AC97C_CMR_CENA; -+ break; -+ case SNDRV_PCM_TRIGGER_STOP: -+ err = dma_stop_request(chip->dma.req_rx.req.dmac, -+ chip->dma.req_rx.req.channel); -+ mutex_lock(&opened_mutex); -+ if (chip->opened <= 1) -+ camr &= ~AC97C_CMR_CENA; -+ mutex_unlock(&opened_mutex); -+ break; -+ default: -+ err = -EINVAL; -+ break; -+ } -+ -+ ac97c_writel(chip, CAMR, camr); -+ -+ spin_unlock_irqrestore(&chip->lock, flags); -+ return err; -+} -+ -+ static snd_pcm_uframes_t -+snd_atmel_ac97_playback_pointer(struct snd_pcm_substream *substream) -+{ -+ struct atmel_ac97 *chip = snd_pcm_substream_chip(substream); -+ struct snd_pcm_runtime *runtime = substream->runtime; -+ snd_pcm_uframes_t pos; -+ unsigned long bytes; -+ -+ bytes = (dma_get_current_pos -+ (chip->dma.req_tx.req.dmac, -+ chip->dma.req_tx.req.channel) - runtime->dma_addr); -+ pos = bytes_to_frames(runtime, bytes); -+ if (pos >= runtime->buffer_size) -+ pos -= runtime->buffer_size; -+ -+ return pos; -+} -+ -+ static snd_pcm_uframes_t -+snd_atmel_ac97_capture_pointer(struct snd_pcm_substream *substream) -+{ -+ struct atmel_ac97 *chip = snd_pcm_substream_chip(substream); -+ struct snd_pcm_runtime *runtime = substream->runtime; -+ snd_pcm_uframes_t pos; -+ unsigned long bytes; -+ -+ bytes = (dma_get_current_pos -+ (chip->dma.req_rx.req.dmac, -+ chip->dma.req_rx.req.channel) -+ - runtime->dma_addr); -+ pos = bytes_to_frames(runtime, bytes); -+ if (pos >= runtime->buffer_size) -+ pos -= runtime->buffer_size; -+ -+ -+ return pos; -+} -+ -+static struct snd_pcm_ops atmel_ac97_playback_ops = { -+ .open = snd_atmel_ac97_playback_open, -+ .close = snd_atmel_ac97_playback_close, -+ .ioctl = snd_pcm_lib_ioctl, -+ .hw_params = snd_atmel_ac97_playback_hw_params, -+ .hw_free = snd_atmel_ac97_playback_hw_free, -+ .prepare = snd_atmel_ac97_playback_prepare, -+ .trigger = snd_atmel_ac97_playback_trigger, -+ .pointer = snd_atmel_ac97_playback_pointer, -+}; -+ -+static struct snd_pcm_ops atmel_ac97_capture_ops = { -+ .open = snd_atmel_ac97_capture_open, -+ .close = snd_atmel_ac97_capture_close, -+ .ioctl = snd_pcm_lib_ioctl, -+ .hw_params = snd_atmel_ac97_capture_hw_params, -+ .hw_free = snd_atmel_ac97_capture_hw_free, -+ .prepare = snd_atmel_ac97_capture_prepare, -+ .trigger = snd_atmel_ac97_capture_trigger, -+ .pointer = snd_atmel_ac97_capture_pointer, -+}; -+ -+static struct ac97_pcm atmel_ac97_pcm_defs[] __devinitdata = { -+ /* Playback */ -+ { -+ .exclusive = 1, -+ .r = { { -+ .slots = ((1 << AC97_SLOT_PCM_LEFT) -+ | (1 << AC97_SLOT_PCM_RIGHT) -+ | (1 << AC97_SLOT_PCM_CENTER) -+ | (1 << AC97_SLOT_PCM_SLEFT) -+ | (1 << AC97_SLOT_PCM_SRIGHT) -+ | (1 << AC97_SLOT_LFE)), -+ } } -+ }, -+ /* PCM in */ -+ { -+ .stream = 1, -+ .exclusive = 1, -+ .r = { { -+ .slots = ((1 << AC97_SLOT_PCM_LEFT) -+ | (1 << AC97_SLOT_PCM_RIGHT)), -+ } } -+ }, -+ /* Mic in */ -+ { -+ .stream = 1, -+ .exclusive = 1, -+ .r = { { -+ .slots = (1<<AC97_SLOT_MIC), -+ } } -+ }, -+}; -+ -+static int __devinit snd_atmel_ac97_pcm_new(struct atmel_ac97 *chip) -+{ -+ struct snd_pcm *pcm; -+ int err; -+ -+ err = snd_ac97_pcm_assign(chip->ac97_bus, -+ ARRAY_SIZE(atmel_ac97_pcm_defs), -+ atmel_ac97_pcm_defs); -+ if (err) -+ return err; -+ -+ err = snd_pcm_new(chip->card, "Atmel-AC97", 0, 1, 1, &pcm); -+ if (err) -+ return err; -+ -+ snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, -+ &atmel_ac97_playback_ops); -+ -+ snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, -+ &atmel_ac97_capture_ops); -+ -+ snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV, -+ &chip->pdev->dev, -+ 128 * 1024, 128 * 1024); -+ -+ pcm->private_data = chip; -+ pcm->info_flags = 0; -+ strcpy(pcm->name, "Atmel-AC97"); -+ chip->pcm = pcm; -+ -+ return 0; -+} -+ -+/* -+ * Mixer part. -+ */ -+static int snd_atmel_ac97_mixer_new(struct atmel_ac97 *chip) -+{ -+ int err; -+ struct snd_ac97_template template; -+ -+ memset(&template, 0, sizeof(template)); -+ template.private_data = chip; -+ err = snd_ac97_mixer(chip->ac97_bus, &template, &chip->ac97); -+ -+ return err; -+} -+ -+static void atmel_ac97_error(struct dma_request *_req) -+{ -+ struct dma_request_cyclic *req = to_dma_request_cyclic(_req); -+ struct atmel_ac97 *chip = req->dev_id; -+ -+ dev_dbg(&chip->pdev->dev, "DMA Controller error, channel %d\n", -+ req->req.channel); -+} -+ -+static void atmel_ac97_block_complete(struct dma_request *_req) -+{ -+ struct dma_request_cyclic *req = to_dma_request_cyclic(_req); -+ struct atmel_ac97 *chip = req->dev_id; -+ if (req->periph_id == chip->dma.tx_periph_id) -+ snd_pcm_period_elapsed(chip->playback_substream); -+ else -+ snd_pcm_period_elapsed(chip->capture_substream); -+} -+ -+/* -+ * Codec part. -+ */ -+static void snd_atmel_ac97_write(struct snd_ac97 *ac97, unsigned short reg, -+ unsigned short val) -+{ -+ struct atmel_ac97 *chip = get_chip(ac97); -+ unsigned long word; -+ int timeout = 40; -+ -+ word = (reg & 0x7f) << 16 | val; -+ -+ do { -+ if (ac97c_readl(chip, COSR) & AC97C_CSR_TXRDY) { -+ ac97c_writel(chip, COTHR, word); -+ return; -+ } -+ udelay(1); -+ } while (--timeout); -+ -+ dev_dbg(&chip->pdev->dev, "codec write timeout\n"); -+} -+ -+static unsigned short snd_atmel_ac97_read(struct snd_ac97 *ac97, -+ unsigned short reg) -+{ -+ struct atmel_ac97 *chip = get_chip(ac97); -+ unsigned long word; -+ int timeout = 40; -+ int write = 10; -+ -+ word = (0x80 | (reg & 0x7f)) << 16; -+ -+ if ((ac97c_readl(chip, COSR) & AC97C_CSR_RXRDY) != 0) -+ ac97c_readl(chip, CORHR); -+ -+retry_write: -+ timeout = 40; -+ -+ do { -+ if ((ac97c_readl(chip, COSR) & AC97C_CSR_TXRDY) != 0) { -+ ac97c_writel(chip, COTHR, word); -+ goto read_reg; -+ } -+ mdelay(10); -+ } while (--timeout); -+ -+ if (!--write) -+ goto timed_out; -+ goto retry_write; -+ -+read_reg: -+ do { -+ if ((ac97c_readl(chip, COSR) & AC97C_CSR_RXRDY) != 0) { -+ unsigned short val = ac97c_readl(chip, CORHR); -+ return val; -+ } -+ mdelay(10); -+ } while (--timeout); -+ -+ if (!--write) -+ goto timed_out; -+ goto retry_write; -+ -+timed_out: -+ dev_dbg(&chip->pdev->dev, "codec read timeout\n"); -+ return 0xffff; -+} -+ -+static void snd_atmel_ac97_reset(struct atmel_ac97 *chip) -+{ -+ ac97c_writel(chip, MR, AC97C_MR_WRST); -+ mdelay(1); -+ ac97c_writel(chip, MR, AC97C_MR_ENA); -+} -+ -+static void snd_atmel_ac97_destroy(struct snd_card *card) -+{ -+ struct atmel_ac97 *chip = get_chip(card); -+ -+ if (chip->regs) -+ iounmap(chip->regs); -+ -+ if (chip->mck) { -+ clk_disable(chip->mck); -+ clk_put(chip->mck); -+ } -+ -+ if (chip->dma.req_tx.req.dmac) { -+ dma_release_channel(chip->dma.req_tx.req.dmac, -+ chip->dma.req_tx.req.channel); -+ } -+ if (chip->dma.req_rx.req.dmac) { -+ dma_release_channel(chip->dma.req_rx.req.dmac, -+ chip->dma.req_rx.req.channel); -+ } -+} -+ -+static int __devinit snd_atmel_ac97_create(struct snd_card *card, -+ struct platform_device *pdev) -+{ -+ static struct snd_ac97_bus_ops ops = { -+ .write = snd_atmel_ac97_write, -+ .read = snd_atmel_ac97_read, -+ }; -+ struct atmel_ac97 *chip = get_chip(card); -+ struct resource *regs; -+ struct clk *mck; -+ int err; -+ -+ regs = platform_get_resource(pdev, IORESOURCE_MEM, 0); -+ if (!regs) -+ return -ENXIO; -+ -+ mck = clk_get(&pdev->dev, "pclk"); -+ if (IS_ERR(mck)) -+ return PTR_ERR(mck); -+ clk_enable(mck); -+ chip->mck = mck; -+ -+ card->private_free = snd_atmel_ac97_destroy; -+ -+ spin_lock_init(&chip->lock); -+ chip->card = card; -+ chip->pdev = pdev; -+ -+ chip->regs = ioremap(regs->start, regs->end - regs->start + 1); -+ if (!chip->regs) -+ return -ENOMEM; -+ -+ snd_card_set_dev(card, &pdev->dev); -+ -+ err = snd_ac97_bus(card, 0, &ops, chip, &chip->ac97_bus); -+ -+ return err; -+} -+ -+static int __devinit snd_atmel_ac97_probe(struct platform_device *pdev) -+{ -+ static int dev; -+ struct snd_card *card; -+ struct atmel_ac97 *chip; -+ int err; -+ int ch; -+ -+ mutex_init(&opened_mutex); -+ -+ err = -ENOMEM; -+ card = snd_card_new(SNDRV_DEFAULT_IDX1, SNDRV_DEFAULT_STR1, -+ THIS_MODULE, sizeof(struct atmel_ac97)); -+ if (!card) -+ goto out; -+ chip = get_chip(card); -+ -+ err = snd_atmel_ac97_create(card, pdev); -+ if (err) -+ goto out_free_card; -+ -+ snd_atmel_ac97_reset(chip); -+ -+ err = snd_atmel_ac97_mixer_new(chip); -+ if (err) -+ goto out_free_card; -+ -+ err = snd_atmel_ac97_pcm_new(chip); -+ if (err) -+ goto out_free_card; -+ -+ /* TODO: Get this information from the platform device */ -+ chip->dma.req_tx.req.dmac = find_dma_controller(0); -+ if (!chip->dma.req_tx.req.dmac) { -+ dev_dbg(&chip->pdev->dev, "DMA controller for TX missing\n"); -+ err = -ENODEV; -+ goto out_free_card; -+ } -+ chip->dma.req_rx.req.dmac = find_dma_controller(0); -+ if (!chip->dma.req_rx.req.dmac) { -+ dev_dbg(&chip->pdev->dev, "DMA controller for RX missing\n"); -+ err = -ENODEV; -+ goto out_free_card; -+ } -+ -+ chip->dma.rx_periph_id = 3; -+ chip->dma.tx_periph_id = 4; -+ -+ ch = dma_alloc_channel(chip->dma.req_tx.req.dmac); -+ if (ch < 0) { -+ dev_dbg(&chip->pdev->dev, -+ "could not allocate TX DMA channel\n"); -+ err = ch; -+ goto out_free_card; -+ } -+ chip->dma.req_tx.req.channel = ch; -+ chip->dma.req_tx.width = DMA_WIDTH_16BIT; -+ chip->dma.req_tx.req.block_complete = atmel_ac97_block_complete; -+ chip->dma.req_tx.req.error = atmel_ac97_error; -+ -+ ch = dma_alloc_channel(chip->dma.req_rx.req.dmac); -+ if (ch < 0) { -+ dev_dbg(&chip->pdev->dev, -+ "could not allocate RX DMA channel\n"); -+ err = ch; -+ goto out_free_card; -+ } -+ chip->dma.req_rx.req.channel = ch; -+ chip->dma.req_rx.width = DMA_WIDTH_16BIT; -+ chip->dma.req_rx.req.block_complete = atmel_ac97_block_complete; -+ chip->dma.req_rx.req.error = atmel_ac97_error; -+ -+ strcpy(card->driver, "atmel_ac97c"); -+ strcpy(card->shortname, "atmel_ac97c"); -+ sprintf(card->longname, "Atmel AVR32 AC97 controller"); -+ -+ err = snd_card_register(card); -+ if (err) -+ goto out_free_card; -+ -+ platform_set_drvdata(pdev, card); -+ dev++; -+ -+ dev_info(&pdev->dev, "Atmel AVR32 AC97 controller at 0x%p\n", -+ chip->regs); -+ -+ return 0; -+ -+out_free_card: -+ snd_card_free(card); -+out: -+ return err; -+} -+ -+#ifdef CONFIG_PM -+ static int -+snd_atmel_ac97_suspend(struct platform_device *pdev, pm_message_t msg) -+{ -+ struct snd_card *card = platform_get_drvdata(pdev); -+ struct atmel_ac97 *chip = card->private_data; -+ -+ clk_disable(chip->mck); -+ -+ return 0; -+} -+ -+static int snd_atmel_ac97_resume(struct platform_device *pdev) -+{ -+ struct snd_card *card = dev_get_drvdata(pdev); -+ struct atmel_ac97 *chip = card->private_data; -+ -+ clk_enable(chip->mck); -+ -+ return 0; -+} -+#else -+#define snd_atmel_ac97_suspend NULL -+#define snd_atmel_ac97_resume NULL -+#endif -+ -+static int __devexit snd_atmel_ac97_remove(struct platform_device *pdev) -+{ -+ struct snd_card *card = platform_get_drvdata(pdev); -+ -+ snd_card_free(card); -+ platform_set_drvdata(pdev, NULL); -+ return 0; -+} -+ -+static struct platform_driver atmel_ac97_driver = { -+ .remove = __devexit_p(snd_atmel_ac97_remove), -+ .driver = { -+ .name = "atmel_ac97c", -+ }, -+ .suspend = snd_atmel_ac97_suspend, -+ .resume = snd_atmel_ac97_resume, -+}; -+ -+static int __init atmel_ac97_init(void) -+{ -+ return platform_driver_probe(&atmel_ac97_driver, -+ snd_atmel_ac97_probe); -+} -+module_init(atmel_ac97_init); -+ -+static void __exit atmel_ac97_exit(void) -+{ -+ platform_driver_unregister(&atmel_ac97_driver); -+} -+module_exit(atmel_ac97_exit); -+ -+MODULE_LICENSE("GPL"); -+MODULE_DESCRIPTION("Driver for Atmel AC97 Controller"); -+MODULE_AUTHOR("Haavard Skinnemoen <hskinnemoen@atmel.com>"); -diff -Nrup linux-2.6.24/sound/avr32/ac97c.h linux-avr32/sound/avr32/ac97c.h ---- linux-2.6.24/sound/avr32/ac97c.h 1969-12-31 19:00:00.000000000 -0500 -+++ linux-avr32/sound/avr32/ac97c.h 2008-02-01 14:51:48.000000000 -0500 -@@ -0,0 +1,71 @@ -+/* -+ * Register definitions for the Atmel AC97 Controller. -+ * -+ * Copyright (C) 2005-2006 Atmel Corporation -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 as -+ * published by the Free Software Foundation. -+ */ -+#ifndef __SOUND_AVR32_AC97C_H -+#define __SOUND_AVR32_AC97C_H -+ -+#define AC97C_MR 0x08 -+#define AC97C_ICA 0x10 -+#define AC97C_OCA 0x14 -+#define AC97C_CARHR 0x20 -+#define AC97C_CATHR 0x24 -+#define AC97C_CASR 0x28 -+#define AC97C_CAMR 0x2c -+#define AC97C_CBRHR 0x30 -+#define AC97C_CBTHR 0x34 -+#define AC97C_CBSR 0x38 -+#define AC97C_CBMR 0x3c -+#define AC97C_CORHR 0x40 -+#define AC97C_COTHR 0x44 -+#define AC97C_COSR 0x48 -+#define AC97C_COMR 0x4c -+#define AC97C_SR 0x50 -+#define AC97C_IER 0x54 -+#define AC97C_IDR 0x58 -+#define AC97C_IMR 0x5c -+#define AC97C_VERSION 0xfc -+ -+#define AC97C_CATPR PDC_TPR -+#define AC97C_CATCR PDC_TCR -+#define AC97C_CATNPR PDC_TNPR -+#define AC97C_CATNCR PDC_TNCR -+#define AC97C_CARPR PDC_RPR -+#define AC97C_CARCR PDC_RCR -+#define AC97C_CARNPR PDC_RNPR -+#define AC97C_CARNCR PDC_RNCR -+#define AC97C_PTCR PDC_PTCR -+ -+#define AC97C_MR_ENA (1 << 0) -+#define AC97C_MR_WRST (1 << 1) -+#define AC97C_MR_VRA (1 << 2) -+ -+#define AC97C_CSR_TXRDY (1 << 0) -+#define AC97C_CSR_UNRUN (1 << 2) -+#define AC97C_CSR_RXRDY (1 << 4) -+#define AC97C_CSR_ENDTX (1 << 10) -+#define AC97C_CSR_ENDRX (1 << 14) -+ -+#define AC97C_CMR_SIZE_20 (0 << 16) -+#define AC97C_CMR_SIZE_18 (1 << 16) -+#define AC97C_CMR_SIZE_16 (2 << 16) -+#define AC97C_CMR_SIZE_10 (3 << 16) -+#define AC97C_CMR_CEM_LITTLE (1 << 18) -+#define AC97C_CMR_CEM_BIG (0 << 18) -+#define AC97C_CMR_CENA (1 << 21) -+#define AC97C_CMR_PDCEN (1 << 22) -+ -+#define AC97C_SR_CAEVT (1 << 3) -+ -+#define AC97C_CH_ASSIGN(slot, channel) \ -+ (AC97C_CHANNEL_##channel << (3 * (AC97_SLOT_##slot - 3))) -+#define AC97C_CHANNEL_NONE 0x0 -+#define AC97C_CHANNEL_A 0x1 -+#define AC97C_CHANNEL_B 0x2 -+ -+#endif /* __SOUND_AVR32_AC97C_H */ -diff -Nrup linux-2.6.24/sound/avr32/Kconfig linux-avr32/sound/avr32/Kconfig ---- linux-2.6.24/sound/avr32/Kconfig 1969-12-31 19:00:00.000000000 -0500 -+++ linux-avr32/sound/avr32/Kconfig 2008-02-01 14:51:48.000000000 -0500 -@@ -0,0 +1,11 @@ -+menu "AVR32 devices" -+ depends on SND != n && AVR32 -+ -+config SND_ATMEL_AC97 -+ tristate "Atmel AC97 Controller Driver" -+ select SND_PCM -+ select SND_AC97_CODEC -+ help -+ ALSA sound driver for the Atmel AC97 controller. -+ -+endmenu -diff -Nrup linux-2.6.24/sound/avr32/Makefile linux-avr32/sound/avr32/Makefile ---- linux-2.6.24/sound/avr32/Makefile 1969-12-31 19:00:00.000000000 -0500 -+++ linux-avr32/sound/avr32/Makefile 2008-02-01 14:51:48.000000000 -0500 -@@ -0,0 +1,3 @@ -+snd-atmel-ac97-objs := ac97c.o -+ -+obj-$(CONFIG_SND_ATMEL_AC97) += snd-atmel-ac97.o -diff -Nrup linux-2.6.24/sound/Kconfig linux-avr32/sound/Kconfig ---- linux-2.6.24/sound/Kconfig 2008-01-24 17:58:37.000000000 -0500 -+++ linux-avr32/sound/Kconfig 2008-02-01 14:51:48.000000000 -0500 -@@ -63,6 +63,8 @@ source "sound/aoa/Kconfig" - - source "sound/arm/Kconfig" - -+source "sound/avr32/Kconfig" -+ - if SPI - source "sound/spi/Kconfig" - endif -diff -Nrup linux-2.6.24/sound/Makefile linux-avr32/sound/Makefile ---- linux-2.6.24/sound/Makefile 2008-01-24 17:58:37.000000000 -0500 -+++ linux-avr32/sound/Makefile 2008-02-01 14:51:48.000000000 -0500 -@@ -6,7 +6,7 @@ obj-$(CONFIG_SOUND_PRIME) += sound_firmw - obj-$(CONFIG_SOUND_PRIME) += oss/ - obj-$(CONFIG_DMASOUND) += oss/ - obj-$(CONFIG_SND) += core/ i2c/ drivers/ isa/ pci/ ppc/ arm/ sh/ synth/ usb/ \ -- sparc/ spi/ parisc/ pcmcia/ mips/ soc/ -+ sparc/ spi/ parisc/ pcmcia/ mips/ soc/ avr32/ - obj-$(CONFIG_SND_AOA) += aoa/ - - # This one must be compilable even if sound is configured out -diff -Nrup linux-2.6.24/sound/oss/at32_abdac.c linux-avr32/sound/oss/at32_abdac.c ---- linux-2.6.24/sound/oss/at32_abdac.c 1969-12-31 19:00:00.000000000 -0500 -+++ linux-avr32/sound/oss/at32_abdac.c 2008-02-01 14:51:49.000000000 -0500 -@@ -0,0 +1,722 @@ -+/* -+ * OSS Sound Driver for the Atmel AT32 on-chip DAC. -+ * -+ * Copyright (C) 2006 Atmel Corporation -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 as -+ * published by the Free Software Foundation. -+ */ -+#include <linux/clk.h> -+#include <linux/dma-mapping.h> -+#include <linux/fs.h> -+#include <linux/init.h> -+#include <linux/interrupt.h> -+#include <linux/kernel.h> -+#include <linux/module.h> -+#include <linux/platform_device.h> -+#include <linux/sound.h> -+#include <linux/soundcard.h> -+ -+#include <asm/byteorder.h> -+#include <asm/dma-controller.h> -+#include <asm/io.h> -+#include <asm/uaccess.h> -+ -+/* We want to use the "bizarre" swap-bytes-in-each-halfword macro */ -+#include <linux/byteorder/swabb.h> -+ -+#include "at32_abdac.h" -+ -+#define DMA_BUFFER_SIZE 32768 -+#define DMA_PERIOD_SHIFT 10 -+#define DMA_PERIOD_SIZE (1 << DMA_PERIOD_SHIFT) -+#define DMA_WRITE_THRESHOLD DMA_PERIOD_SIZE -+ -+struct sound_settings { -+ unsigned int format; -+ unsigned int channels; -+ unsigned int sample_rate; -+ /* log2(bytes per sample) */ -+ unsigned int input_order; -+}; -+ -+struct at32_dac { -+ spinlock_t lock; -+ void __iomem *regs; -+ -+ /* head and tail refer to number of words */ -+ struct { -+ u32 *buf; -+ int head; -+ int tail; -+ } dma; -+ -+ struct semaphore sem; -+ wait_queue_head_t write_wait; -+ -+ /* -+ * Read at most ucount bytes from ubuf, translate to 2-channel -+ * signed 16-bit big endian format and write to the DMA buffer -+ * as long as there is room left. Return the number of bytes -+ * successfully copied from ubuf, or -EFAULT if the first -+ * sample from ubuf couldn't be read. This function is not -+ * called unless there is room for at least one sample (4 -+ * bytes) in the DMA buffer. -+ */ -+ ssize_t (*trans)(struct at32_dac *dac, const char __user *ubuf, -+ size_t ucount); -+ -+ struct sound_settings dsp_settings; -+ struct dma_request_cyclic req; -+ -+ struct clk *mck; -+ struct clk *sample_clk; -+ struct platform_device *pdev; -+ int busy; -+ int playing; -+ int dev_dsp; -+}; -+static struct at32_dac *the_dac; -+ -+static inline unsigned int abdac_get_head(struct at32_dac *dac) -+{ -+ return dac->dma.head & ((DMA_BUFFER_SIZE / 4) - 1); -+} -+ -+static inline unsigned int abdac_get_tail(struct at32_dac *dac) -+{ -+ return dac->dma.tail & ((DMA_BUFFER_SIZE / 4) - 1); -+} -+ -+static inline unsigned int abdac_dma_space(struct at32_dac *dac) -+{ -+ unsigned int space; -+ -+ space = ((dac->dma.tail - dac->dma.head - 1) -+ & ((DMA_BUFFER_SIZE / 4) - 1)); -+ return space; -+} -+ -+static void abdac_update_dma_tail(struct at32_dac *dac) -+{ -+ dma_addr_t dma_addr; -+ unsigned int new_tail; -+ -+ if (dac->playing) { -+ dma_addr = dma_get_current_pos(dac->req.req.dmac, -+ dac->req.req.channel); -+ new_tail = (dma_addr - dac->req.buffer_start) / 4; -+ if (new_tail >= dac->dma.head -+ && (dac->dma.tail < dac->dma.head -+ || dac->dma.tail > new_tail)) -+ dev_notice(&dac->pdev->dev, "DMA underrun detected!\n"); -+ dac->dma.tail = new_tail; -+ dev_dbg(&dac->pdev->dev, "update tail: 0x%x - 0x%x = %u\n", -+ dma_addr, dac->req.buffer_start, dac->dma.tail); -+ } -+} -+ -+static int abdac_start(struct at32_dac *dac) -+{ -+ int ret; -+ -+ if (dac->playing) -+ return 0; -+ -+ memset(dac->dma.buf, 0, DMA_BUFFER_SIZE); -+ -+ clk_enable(dac->sample_clk); -+ -+ ret = dma_prepare_request_cyclic(dac->req.req.dmac, &dac->req); -+ if (ret) -+ goto out_stop_clock; -+ -+ dev_dbg(&dac->pdev->dev, "starting DMA...\n"); -+ ret = dma_start_request(dac->req.req.dmac, dac->req.req.channel); -+ if (ret) -+ goto out_stop_request; -+ -+ dac_writel(dac, CTRL, DAC_BIT(EN)); -+ dac->playing = 1; -+ -+ return 0; -+ -+out_stop_request: -+ dma_stop_request(dac->req.req.dmac, -+ dac->req.req.channel); -+out_stop_clock: -+ clk_disable(dac->sample_clk); -+ return ret; -+} -+ -+static int abdac_stop(struct at32_dac *dac) -+{ -+ if (dac->playing) { -+ dma_stop_request(dac->req.req.dmac, dac->req.req.channel); -+ dac_writel(dac, DATA, 0); -+ dac_writel(dac, CTRL, 0); -+ dac->playing = 0; -+ clk_disable(dac->sample_clk); -+ } -+ -+ return 0; -+} -+ -+static int abdac_dma_prepare(struct at32_dac *dac) -+{ -+ dac->dma.buf = dma_alloc_coherent(&dac->pdev->dev, DMA_BUFFER_SIZE, -+ &dac->req.buffer_start, GFP_KERNEL); -+ if (!dac->dma.buf) -+ return -ENOMEM; -+ -+ dac->dma.head = dac->dma.tail = 0; -+ dac->req.periods = DMA_BUFFER_SIZE / DMA_PERIOD_SIZE; -+ dac->req.buffer_size = DMA_BUFFER_SIZE; -+ -+ return 0; -+} -+ -+static void abdac_dma_cleanup(struct at32_dac *dac) -+{ -+ if (dac->dma.buf) -+ dma_free_coherent(&dac->pdev->dev, DMA_BUFFER_SIZE, -+ dac->dma.buf, dac->req.buffer_start); -+ dac->dma.buf = NULL; -+} -+ -+static void abdac_dma_block_complete(struct dma_request *req) -+{ -+ struct dma_request_cyclic *creq = to_dma_request_cyclic(req); -+ struct at32_dac *dac = container_of(creq, struct at32_dac, req); -+ -+ wake_up(&dac->write_wait); -+} -+ -+static void abdac_dma_error(struct dma_request *req) -+{ -+ struct dma_request_cyclic *creq = to_dma_request_cyclic(req); -+ struct at32_dac *dac = container_of(creq, struct at32_dac, req); -+ -+ dev_err(&dac->pdev->dev, "DMA error\n"); -+} -+ -+static irqreturn_t abdac_interrupt(int irq, void *dev_id) -+{ -+ struct at32_dac *dac = dev_id; -+ u32 status; -+ -+ status = dac_readl(dac, INT_STATUS); -+ if (status & DAC_BIT(UNDERRUN)) { -+ dev_err(&dac->pdev->dev, "Underrun detected!\n"); -+ dac_writel(dac, INT_CLR, DAC_BIT(UNDERRUN)); -+ } else { -+ dev_err(&dac->pdev->dev, "Spurious interrupt (status=0x%x)\n", -+ status); -+ dac_writel(dac, INT_CLR, status); -+ } -+ -+ return IRQ_HANDLED; -+} -+ -+static ssize_t trans_s16be(struct at32_dac *dac, const char __user *ubuf, -+ size_t ucount) -+{ -+ ssize_t ret; -+ -+ if (dac->dsp_settings.channels == 2) { -+ const u32 __user *up = (const u32 __user *)ubuf; -+ u32 sample; -+ -+ for (ret = 0; ret < (ssize_t)(ucount - 3); ret += 4) { -+ if (!abdac_dma_space(dac)) -+ break; -+ -+ if (unlikely(__get_user(sample, up++))) { -+ if (ret == 0) -+ ret = -EFAULT; -+ break; -+ } -+ dac->dma.buf[abdac_get_head(dac)] = sample; -+ dac->dma.head++; -+ } -+ } else { -+ const u16 __user *up = (const u16 __user *)ubuf; -+ u16 sample; -+ -+ for (ret = 0; ret < (ssize_t)(ucount - 1); ret += 2) { -+ if (!abdac_dma_space(dac)) -+ break; -+ -+ if (unlikely(__get_user(sample, up++))) { -+ if (ret == 0) -+ ret = -EFAULT; -+ break; -+ } -+ dac->dma.buf[abdac_get_head(dac)] -+ = (sample << 16) | sample; -+ dac->dma.head++; -+ } -+ } -+ -+ return ret; -+} -+ -+static ssize_t trans_s16le(struct at32_dac *dac, const char __user *ubuf, -+ size_t ucount) -+{ -+ ssize_t ret; -+ -+ if (dac->dsp_settings.channels == 2) { -+ const u32 __user *up = (const u32 __user *)ubuf; -+ u32 sample; -+ -+ for (ret = 0; ret < (ssize_t)(ucount - 3); ret += 4) { -+ if (!abdac_dma_space(dac)) -+ break; -+ -+ if (unlikely(__get_user(sample, up++))) { -+ if (ret == 0) -+ ret = -EFAULT; -+ break; -+ } -+ /* Swap bytes in each halfword */ -+ dac->dma.buf[abdac_get_head(dac)] = swahb32(sample); -+ dac->dma.head++; -+ } -+ } else { -+ const u16 __user *up = (const u16 __user *)ubuf; -+ u16 sample; -+ -+ for (ret = 0; ret < (ssize_t)(ucount - 1); ret += 2) { -+ if (!abdac_dma_space(dac)) -+ break; -+ -+ if (unlikely(__get_user(sample, up++))) { -+ if (ret == 0) -+ ret = -EFAULT; -+ break; -+ } -+ sample = swab16(sample); -+ dac->dma.buf[abdac_get_head(dac)] -+ = (sample << 16) | sample; -+ dac->dma.head++; -+ } -+ } -+ -+ return ret; -+} -+ -+static ssize_t abdac_dma_translate_from_user(struct at32_dac *dac, -+ const char __user *buffer, -+ size_t count) -+{ -+ /* At least one buffer must be available at this point */ -+ dev_dbg(&dac->pdev->dev, "copying %zu bytes from user...\n", count); -+ -+ return dac->trans(dac, buffer, count); -+} -+ -+static int abdac_set_format(struct at32_dac *dac, int format) -+{ -+ unsigned int order; -+ -+ switch (format) { -+ case AFMT_S16_BE: -+ order = 1; -+ dac->trans = trans_s16be; -+ break; -+ case AFMT_S16_LE: -+ order = 1; -+ dac->trans = trans_s16le; -+ break; -+ default: -+ dev_dbg(&dac->pdev->dev, "unsupported format: %d\n", format); -+ return -EINVAL; -+ } -+ -+ if (dac->dsp_settings.channels == 2) -+ order++; -+ -+ dac->dsp_settings.input_order = order; -+ dac->dsp_settings.format = format; -+ return 0; -+} -+ -+static int abdac_set_sample_rate(struct at32_dac *dac, unsigned long rate) -+{ -+ unsigned long new_rate; -+ int ret; -+ -+ ret = clk_set_rate(dac->sample_clk, 256 * rate); -+ if (ret < 0) -+ return ret; -+ -+ /* TODO: mplayer seems to have a problem with this */ -+#if 0 -+ new_rate = clk_get_rate(dac->sample_clk); -+ dac->dsp_settings.sample_rate = new_rate / 256; -+#else -+ dac->dsp_settings.sample_rate = rate; -+#endif -+ -+ return 0; -+} -+ -+static ssize_t abdac_dsp_write(struct file *file, -+ const char __user *buffer, -+ size_t count, loff_t *ppos) -+{ -+ struct at32_dac *dac = file->private_data; -+ DECLARE_WAITQUEUE(wait, current); -+ unsigned int avail; -+ ssize_t copied; -+ ssize_t ret; -+ -+ /* Avoid address space checking in the translation functions */ -+ if (!access_ok(buffer, count, VERIFY_READ)) -+ return -EFAULT; -+ -+ down(&dac->sem); -+ -+ if (!dac->dma.buf) { -+ ret = abdac_dma_prepare(dac); -+ if (ret) -+ goto out; -+ } -+ -+ add_wait_queue(&dac->write_wait, &wait); -+ ret = 0; -+ while (count > 0) { -+ do { -+ abdac_update_dma_tail(dac); -+ avail = abdac_dma_space(dac); -+ set_current_state(TASK_INTERRUPTIBLE); -+ if (avail >= DMA_WRITE_THRESHOLD) -+ break; -+ -+ if (file->f_flags & O_NONBLOCK) { -+ if (!ret) -+ ret = -EAGAIN; -+ goto out; -+ } -+ -+ pr_debug("Going to wait (avail = %u, count = %zu)\n", -+ avail, count); -+ -+ up(&dac->sem); -+ schedule(); -+ if (signal_pending(current)) { -+ if (!ret) -+ ret = -ERESTARTSYS; -+ goto out_nosem; -+ } -+ down(&dac->sem); -+ } while (1); -+ -+ copied = abdac_dma_translate_from_user(dac, buffer, count); -+ if (copied < 0) { -+ if (!ret) -+ ret = -EFAULT; -+ goto out; -+ } -+ -+ abdac_start(dac); -+ -+ count -= copied; -+ ret += copied; -+ } -+ -+out: -+ up(&dac->sem); -+out_nosem: -+ remove_wait_queue(&dac->write_wait, &wait); -+ set_current_state(TASK_RUNNING); -+ return ret; -+} -+ -+static int abdac_dsp_ioctl(struct inode *inode, struct file *file, -+ unsigned int cmd, unsigned long arg) -+{ -+ struct at32_dac *dac = file->private_data; -+ int __user *up = (int __user *)arg; -+ struct audio_buf_info abinfo; -+ int val, ret; -+ -+ switch (cmd) { -+ case OSS_GETVERSION: -+ return put_user(SOUND_VERSION, up); -+ -+ case SNDCTL_DSP_SPEED: -+ if (get_user(val, up)) -+ return -EFAULT; -+ if (val >= 0) { -+ abdac_stop(dac); -+ ret = abdac_set_sample_rate(dac, val); -+ if (ret) -+ return ret; -+ } -+ return put_user(dac->dsp_settings.sample_rate, up); -+ -+ case SNDCTL_DSP_STEREO: -+ if (get_user(val, up)) -+ return -EFAULT; -+ abdac_stop(dac); -+ if (val && dac->dsp_settings.channels == 1) -+ dac->dsp_settings.input_order++; -+ else if (!val && dac->dsp_settings.channels != 1) -+ dac->dsp_settings.input_order--; -+ dac->dsp_settings.channels = val ? 2 : 1; -+ return 0; -+ -+ case SNDCTL_DSP_CHANNELS: -+ if (get_user(val, up)) -+ return -EFAULT; -+ -+ if (val) { -+ if (val < 0 || val > 2) -+ return -EINVAL; -+ -+ abdac_stop(dac); -+ dac->dsp_settings.input_order -+ += val - dac->dsp_settings.channels; -+ dac->dsp_settings.channels = val; -+ } -+ return put_user(val, (int *)arg); -+ -+ case SNDCTL_DSP_GETFMTS: -+ return put_user(AFMT_S16_BE | AFMT_S16_BE, up); -+ -+ case SNDCTL_DSP_SETFMT: -+ if (get_user(val, up)) -+ return -EFAULT; -+ -+ if (val == AFMT_QUERY) { -+ val = dac->dsp_settings.format; -+ } else { -+ ret = abdac_set_format(dac, val); -+ if (ret) -+ return ret; -+ } -+ return put_user(val, up); -+ -+ case SNDCTL_DSP_GETOSPACE: -+ abdac_update_dma_tail(dac); -+ abinfo.fragsize = ((1 << dac->dsp_settings.input_order) -+ * (DMA_PERIOD_SIZE / 4)); -+ abinfo.bytes = (abdac_dma_space(dac) -+ << dac->dsp_settings.input_order); -+ abinfo.fragstotal = ((DMA_BUFFER_SIZE * 4) -+ >> (DMA_PERIOD_SHIFT -+ + dac->dsp_settings.input_order)); -+ abinfo.fragments = ((abinfo.bytes -+ >> dac->dsp_settings.input_order) -+ / (DMA_PERIOD_SIZE / 4)); -+ pr_debug("fragments=%d fragstotal=%d fragsize=%d bytes=%d\n", -+ abinfo.fragments, abinfo.fragstotal, abinfo.fragsize, -+ abinfo.bytes); -+ return copy_to_user(up, &abinfo, sizeof(abinfo)) ? -EFAULT : 0; -+ -+ default: -+ dev_dbg(&dac->pdev->dev, "Unimplemented ioctl cmd: 0x%x\n", cmd); -+ return -EINVAL; -+ } -+} -+ -+static int abdac_dsp_open(struct inode *inode, struct file *file) -+{ -+ struct at32_dac *dac = the_dac; -+ int ret; -+ -+ if (file->f_mode & FMODE_READ) -+ return -ENXIO; -+ -+ down(&dac->sem); -+ ret = -EBUSY; -+ if (dac->busy) -+ goto out; -+ -+ dac->dma.head = dac->dma.tail = 0; -+ -+ /* FIXME: What are the correct defaults? */ -+ dac->dsp_settings.channels = 2; -+ abdac_set_format(dac, AFMT_S16_BE); -+ ret = abdac_set_sample_rate(dac, 8000); -+ if (ret) -+ goto out; -+ -+ file->private_data = dac; -+ dac->busy = 1; -+ -+ ret = 0; -+ -+out: -+ up(&dac->sem); -+ return ret; -+} -+ -+static int abdac_dsp_release(struct inode *inode, struct file *file) -+{ -+ struct at32_dac *dac = file->private_data; -+ -+ down(&dac->sem); -+ -+ abdac_stop(dac); -+ abdac_dma_cleanup(dac); -+ dac->busy = 0; -+ -+ up(&dac->sem); -+ -+ return 0; -+} -+ -+static struct file_operations abdac_dsp_fops = { -+ .owner = THIS_MODULE, -+ .llseek = no_llseek, -+ .write = abdac_dsp_write, -+ .ioctl = abdac_dsp_ioctl, -+ .open = abdac_dsp_open, -+ .release = abdac_dsp_release, -+}; -+ -+static int __init abdac_probe(struct platform_device *pdev) -+{ -+ struct at32_dac *dac; -+ struct resource *regs; -+ struct clk *mck; -+ struct clk *sample_clk; -+ int irq; -+ int ret; -+ -+ if (the_dac) -+ return -EBUSY; -+ -+ regs = platform_get_resource(pdev, IORESOURCE_MEM, 0); -+ if (!regs) -+ return -ENXIO; -+ irq = platform_get_irq(pdev, 0); -+ if (irq < 0) -+ return irq; -+ -+ mck = clk_get(&pdev->dev, "pclk"); -+ if (IS_ERR(mck)) -+ return PTR_ERR(mck); -+ sample_clk = clk_get(&pdev->dev, "sample_clk"); -+ if (IS_ERR(sample_clk)) { -+ ret = PTR_ERR(sample_clk); -+ goto out_put_mck; -+ } -+ clk_enable(mck); -+ -+ ret = -ENOMEM; -+ dac = kzalloc(sizeof(struct at32_dac), GFP_KERNEL); -+ if (!dac) -+ goto out_disable_clk; -+ -+ spin_lock_init(&dac->lock); -+ init_MUTEX(&dac->sem); -+ init_waitqueue_head(&dac->write_wait); -+ dac->pdev = pdev; -+ dac->mck = mck; -+ dac->sample_clk = sample_clk; -+ -+ dac->regs = ioremap(regs->start, regs->end - regs->start + 1); -+ if (!dac->regs) -+ goto out_free_dac; -+ -+ ret = request_irq(irq, abdac_interrupt, 0, "dac", dac); -+ if (ret) -+ goto out_unmap_regs; -+ -+ /* FIXME */ -+ dac->req.req.dmac = find_dma_controller(0); -+ if (!dac->req.req.dmac) -+ goto out_free_irq; -+ -+ ret = dma_alloc_channel(dac->req.req.dmac); -+ if (ret < 0) -+ goto out_free_irq; -+ -+ dac->req.req.channel = ret; -+ dac->req.req.block_complete = abdac_dma_block_complete; -+ dac->req.req.error = abdac_dma_error; -+ dac->req.data_reg = regs->start + DAC_DATA; -+ dac->req.periph_id = 2; /* FIXME */ -+ dac->req.direction = DMA_DIR_MEM_TO_PERIPH; -+ dac->req.width = DMA_WIDTH_32BIT; -+ -+ /* Make sure the DAC is silent and disabled */ -+ dac_writel(dac, DATA, 0); -+ dac_writel(dac, CTRL, 0); -+ -+ ret = register_sound_dsp(&abdac_dsp_fops, -1); -+ if (ret < 0) -+ goto out_free_dma; -+ dac->dev_dsp = ret; -+ -+ /* TODO: Register mixer */ -+ -+ the_dac = dac; -+ platform_set_drvdata(pdev, dac); -+ -+ return 0; -+ -+out_free_dma: -+ dma_release_channel(dac->req.req.dmac, dac->req.req.channel); -+out_free_irq: -+ free_irq(irq, dac); -+out_unmap_regs: -+ iounmap(dac->regs); -+out_free_dac: -+ kfree(dac); -+out_disable_clk: -+ clk_disable(mck); -+ clk_put(sample_clk); -+out_put_mck: -+ clk_put(mck); -+ return ret; -+} -+ -+static int __exit abdac_remove(struct platform_device *pdev) -+{ -+ struct at32_dac *dac; -+ -+ dac = platform_get_drvdata(pdev); -+ if (dac) { -+ unregister_sound_dsp(dac->dev_dsp); -+ dma_release_channel(dac->req.req.dmac, dac->req.req.channel); -+ free_irq(platform_get_irq(pdev, 0), dac); -+ iounmap(dac->regs); -+ clk_disable(dac->mck); -+ clk_put(dac->sample_clk); -+ clk_put(dac->mck); -+ kfree(dac); -+ platform_set_drvdata(pdev, NULL); -+ the_dac = NULL; -+ } -+ -+ return 0; -+} -+ -+static struct platform_driver abdac_driver = { -+ .remove = __exit_p(abdac_remove), -+ .driver = { -+ .name = "abdac", -+ }, -+}; -+ -+static int __init abdac_init(void) -+{ -+ return platform_driver_probe(&abdac_driver, abdac_probe); -+} -+module_init(abdac_init); -+ -+static void __exit abdac_exit(void) -+{ -+ platform_driver_unregister(&abdac_driver); -+} -+module_exit(abdac_exit); -+ -+MODULE_AUTHOR("Haavard Skinnemoen <hskinnemoen@atmel.com>"); -+MODULE_DESCRIPTION("Sound Driver for the Atmel AT32 ABDAC"); -+MODULE_LICENSE("GPL"); -diff -Nrup linux-2.6.24/sound/oss/at32_abdac.h linux-avr32/sound/oss/at32_abdac.h ---- linux-2.6.24/sound/oss/at32_abdac.h 1969-12-31 19:00:00.000000000 -0500 -+++ linux-avr32/sound/oss/at32_abdac.h 2008-02-01 14:51:49.000000000 -0500 -@@ -0,0 +1,59 @@ -+/* -+ * Register definitions for the Atmel AT32 on-chip DAC. -+ * -+ * Copyright (C) 2006 Atmel Corporation -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 as -+ * published by the Free Software Foundation. -+ */ -+#ifndef __SOUND_OSS_AT32_ABDAC_H__ -+#define __SOUND_OSS_AT32_ABDAC_H__ -+ -+/* DAC register offsets */ -+#define DAC_DATA 0x0000 -+#define DAC_CTRL 0x0008 -+#define DAC_INT_MASK 0x000c -+#define DAC_INT_EN 0x0010 -+#define DAC_INT_DIS 0x0014 -+#define DAC_INT_CLR 0x0018 -+#define DAC_INT_STATUS 0x001c -+#define DAC_PDC_DATA 0x0020 -+ -+/* Bitfields in CTRL */ -+#define DAC_SWAP_OFFSET 30 -+#define DAC_SWAP_SIZE 1 -+#define DAC_EN_OFFSET 31 -+#define DAC_EN_SIZE 1 -+ -+/* Bitfields in INT_MASK/INT_EN/INT_DIS/INT_STATUS/INT_CLR */ -+#define DAC_UNDERRUN_OFFSET 28 -+#define DAC_UNDERRUN_SIZE 1 -+#define DAC_TX_READY_OFFSET 29 -+#define DAC_TX_READY_SIZE 1 -+#define DAC_TX_BUFFER_EMPTY_OFFSET 30 -+#define DAC_TX_BUFFER_EMPTY_SIZE 1 -+#define DAC_CHANNEL_TX_END_OFFSET 31 -+#define DAC_CHANNEL_TX_END_SIZE 1 -+ -+/* Bit manipulation macros */ -+#define DAC_BIT(name) \ -+ (1 << DAC_##name##_OFFSET) -+#define DAC_BF(name, value) \ -+ (((value) & ((1 << DAC_##name##_SIZE) - 1)) \ -+ << DAC_##name##_OFFSET) -+#define DAC_BFEXT(name, value) \ -+ (((value) >> DAC_##name##_OFFSET) \ -+ & ((1 << DAC_##name##_SIZE) - 1)) -+#define DAC_BFINS(name, value, old) \ -+ (((old) & ~(((1 << DAC_##name##_SIZE) - 1) \ -+ << DAC_##name##_OFFSET)) \ -+ | DAC_BF(name,value)) -+ -+/* Register access macros */ -+#define dac_readl(port, reg) \ -+ __raw_readl((port)->regs + DAC_##reg) -+#define dac_writel(port, reg, value) \ -+ __raw_writel((value), (port)->regs + DAC_##reg) -+ -+#endif /* __SOUND_OSS_AT32_ABDAC_H__ */ -diff -Nrup linux-2.6.24/sound/oss/Kconfig linux-avr32/sound/oss/Kconfig ---- linux-2.6.24/sound/oss/Kconfig 2008-01-24 17:58:37.000000000 -0500 -+++ linux-avr32/sound/oss/Kconfig 2008-02-01 14:51:49.000000000 -0500 -@@ -654,3 +654,7 @@ config SOUND_SH_DAC_AUDIO_CHANNEL - int "DAC channel" - default "1" - depends on SOUND_SH_DAC_AUDIO -+ -+config SOUND_AT32_ABDAC -+ tristate "Atmel AT32 Audio Bitstream DAC (ABDAC) support" -+ depends on SOUND_PRIME && AVR32 -diff -Nrup linux-2.6.24/sound/oss/Makefile linux-avr32/sound/oss/Makefile ---- linux-2.6.24/sound/oss/Makefile 2008-01-24 17:58:37.000000000 -0500 -+++ linux-avr32/sound/oss/Makefile 2008-02-01 14:51:49.000000000 -0500 -@@ -10,6 +10,7 @@ obj-$(CONFIG_SOUND_CS4232) += cs4232.o a - - # Please leave it as is, cause the link order is significant ! - -+obj-$(CONFIG_SOUND_AT32_ABDAC) += at32_abdac.o - obj-$(CONFIG_SOUND_SH_DAC_AUDIO) += sh_dac_audio.o - obj-$(CONFIG_SOUND_HAL2) += hal2.o - obj-$(CONFIG_SOUND_AEDSP16) += aedsp16.o diff --git a/target/device/Atmel/arch-avr32/kernel-patches-2.6.24/linux-2.6.24-500-v4l-avr32-isi.patch.cond b/target/device/Atmel/arch-avr32/kernel-patches-2.6.24/linux-2.6.24-500-v4l-avr32-isi.patch.cond deleted file mode 100644 index f79ab82a2..000000000 --- a/target/device/Atmel/arch-avr32/kernel-patches-2.6.24/linux-2.6.24-500-v4l-avr32-isi.patch.cond +++ /dev/null @@ -1,2954 +0,0 @@ -diff --git a/include/linux/videodev2.h b/include/linux/videodev2.h -index 441b877..3a85a5e 100644 ---- a/include/linux/videodev2.h -+++ b/include/linux/videodev2.h -@@ -298,6 +298,9 @@ struct v4l2_pix_format - #define V4L2_PIX_FMT_PWC2 v4l2_fourcc('P','W','C','2') /* pwc newer webcam */ - #define V4L2_PIX_FMT_ET61X251 v4l2_fourcc('E','6','2','5') /* ET61X251 compression */ - -+/* Byte-swapped YUYV */ -+#define V4L2_PIX_FMT_VYUY v4l2_fourcc('V','Y','U','Y') /* 16 YUV 4:2:2 */ -+#define V4L2_PIX_FMT_YVYU v4l2_fourcc('Y','V','Y','U') /* 16 YUV 4:2:2 */ - /* - * F O R M A T E N U M E R A T I O N - */ -diff --git a/drivers/media/video/Makefile b/drivers/media/video/Makefile -index 44ccaed..78e38d0 100644 ---- a/drivers/media/video/Makefile -+++ b/drivers/media/video/Makefile -@@ -77,6 +77,7 @@ obj-$(CONFIG_VIDEO_HEXIUM_ORION) += hexium_orion.o - obj-$(CONFIG_VIDEO_HEXIUM_GEMINI) += hexium_gemini.o - obj-$(CONFIG_VIDEO_DPC) += dpc7146.o - obj-$(CONFIG_TUNER_3036) += tuner-3036.o -+obj-$(CONFIG_VIDEO_AVR32_ISI) += atmel-isi.o - - obj-$(CONFIG_VIDEO_TUNER) += tuner.o - obj-$(CONFIG_VIDEO_BUF) += video-buf.o -diff --git a/drivers/media/video/atmel-isi.c b/drivers/media/video/atmel-isi.c -new file mode 100644 -index 0000000..a53a3c0 ---- /dev/null -+++ b/drivers/media/video/atmel-isi.c -@@ -0,0 +1,1868 @@ -+/* -+ * Copyright (c) 2007 Atmel Corporation -+ * -+ * Based on the bttv driver for Bt848 with respective copyright holders -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 as -+ * published by the Free Software Foundation. -+ */ -+#define DEBUG -+#include <linux/clk.h> -+#include <linux/completion.h> -+#include <linux/dma-mapping.h> -+#include <linux/fs.h> -+#include <linux/init.h> -+#include <linux/interrupt.h> -+#include <linux/ioctl.h> -+#include <linux/kernel.h> -+#include <linux/mm.h> -+#include <linux/module.h> -+#include <linux/moduleparam.h> -+#include <linux/platform_device.h> -+#include <linux/slab.h> -+#include <linux/version.h> -+#include <linux/videodev2.h> -+#include <linux/wait.h> -+ -+#include <linux/kfifo.h> -+ -+#include <asm/io.h> -+ -+#include <media/v4l2-common.h> -+ -+#include "atmel-isi.h" -+ -+#define ATMEL_ISI_VERSION KERNEL_VERSION(0, 1, 0) -+#define ISI_CODEC 0 -+ -+/* Default ISI capture buffer size */ -+#define ISI_CAPTURE_BUFFER_SIZE 800*600*2 -+/* Default ISI video frame size */ -+#define ISI_VIDEO_BUFFER_SIZE 320*240*2 -+/* Default number of ISI video buffers */ -+#define ISI_VIDEO_BUFFERS 4 -+/* Maximum number of video buffers */ -+#define ISI_VIDEO_BUFFERS_MAX 8 -+ -+/* Interrupt mask for a single capture */ -+#define ISI_CAPTURE_MASK (ISI_BIT(SOF) | ISI_BIT(FO_C_EMP)) -+ -+/* ISI capture buffer size */ -+static int capture_buffer_size = ISI_CAPTURE_BUFFER_SIZE; -+/* Number of buffers used for streaming video */ -+static int video_buffers = 4; -+static int video_buffer_size = ISI_VIDEO_BUFFER_SIZE; -+ -+/* Preview path horizontal size */ -+static int prev_hsize = 320; -+/* Preview path vertical size */ -+static int prev_vsize = 240; -+/* Scaling factor of the preview path */ -+static int prev_decimation_factor = 1; -+ -+/* Input image horizontal size */ -+static int image_hsize = 320; -+ -+/* Input image vertical size */ -+static int image_vsize = 240; -+ -+/* Frame rate scaler -+ * 1 = capture every second frame -+ * 2 = capture every third frame -+ * ... -+ * */ -+static int frame_rate_scaler = 2; -+ -+/* Set this value if we want to pretend a specific V4L2 output format -+ * This format is for the capturing interface -+ */ -+static int capture_v4l2_fmt = V4L2_PIX_FMT_YUYV; -+/* Set this value if we want to pretend a specific V4L2 output format -+ * This format is for the streaming interface -+ */ -+static int streaming_v4l2_fmt = V4L2_PIX_FMT_YUYV; -+ -+MODULE_PARM_DESC(video_buffers,"Number of frame buffers used for streaming"); -+module_param(video_buffers, int, 0664); -+MODULE_PARM_DESC(capture_buffer_size,"Capture buffer size"); -+module_param(capture_buffer_size, int, 0664); -+MODULE_PARM_DESC(image_hsize,"Horizontal size of input image"); -+module_param(image_hsize, int, 0664); -+MODULE_PARM_DESC(image_vsize,"Vertical size of input image"); -+module_param(image_vsize, int, 0664); -+MODULE_PARM_DESC(frame_rate_scaler, "Frame rate scaler"); -+module_param(frame_rate_scaler, int, 0664); -+MODULE_PARM_DESC(prev_hsize, "Horizontal image size of preview path output"); -+module_param(prev_hsize, int, 0664); -+MODULE_PARM_DESC(prev_vsize, "Vertical image size of preview path output"); -+module_param(prev_vsize, int, 0664); -+MODULE_PARM_DESC(prev_decimation_factor, "Preview path decimaion factor"); -+module_param(prev_decimation_factor, int, 0664); -+/* Single frame capturing states */ -+enum { -+ STATE_IDLE = 0, -+ STATE_CAPTURE_READY, -+ STATE_CAPTURE_WAIT_SOF, -+ STATE_CAPTURE_IN_PROGRESS, -+ STATE_CAPTURE_DONE, -+ STATE_CAPTURE_ERROR, -+}; -+ -+/* Frame buffer states -+ * FRAME_UNUSED Frame(buffer) is not used by the ISI module -> an application -+ * can usually read out data in this state -+ * FRAME_QUEUED An application has queued the buffer in the incoming queue -+ * FRAME_DONE The ISI module has filled the buffer with data and placed is on -+ * the outgoing queue -+ * FRAME_ERROR Not used at the moment -+ * */ -+enum frame_status { -+ FRAME_UNUSED, -+ FRAME_QUEUED, -+ FRAME_DONE, -+ FRAME_ERROR, -+}; -+/* Frame buffer descriptor -+ * Used by the ISI module as a linked list for the DMA controller. -+ */ -+struct fbd { -+ /* Physical address of the frame buffer */ -+ dma_addr_t fb_address; -+ /* Physical address of the next fbd */ -+ dma_addr_t next_fbd_address; -+}; -+ -+/* Frame buffer data -+ */ -+struct frame_buffer { -+ /* Frame buffer descriptor -+ * Used by the ISI DMA controller to provide linked list DMA operation -+ */ -+ struct fbd fb_desc; -+ /* Pointer to the start of the frame buffer */ -+ void *frame_buffer; -+ /* Timestamp of the captured frame */ -+ struct timeval timestamp; -+ /* Frame number of the frame */ -+ unsigned long sequence; -+ /* Buffer number*/ -+ int index; -+ /* Bytes used in the buffer for data, needed as buffers are always -+ * aligned to pages and thus may be bigger than the amount of data*/ -+ int bytes_used; -+ /* Mmap count -+ * Counter to measure how often this buffer is mmapped -+ */ -+ int mmap_count; -+ /* Buffer status */ -+ enum frame_status status; -+}; -+ -+struct atmel_isi { -+ /* ISI module spin lock. Protects against concurrent access of variables -+ * that are shared with the ISR */ -+ spinlock_t lock; -+ void __iomem *regs; -+ /* Pointer to the start of the fbd list */ -+ dma_addr_t fbd_list_start; -+ /* Frame buffers */ -+ struct frame_buffer video_buffer[ISI_VIDEO_BUFFERS_MAX]; -+ /* Frame buffer currently used by the ISI module */ -+ struct frame_buffer *current_buffer; -+ /* Size of a frame buffer */ -+ size_t capture_buffer_size; -+ /* Streaming status -+ * If set ISI is in streaming mode */ -+ int streaming; -+ /* Queue for incoming buffers -+ * The buffer number (index) is stored in the fifo as reference -+ */ -+ struct kfifo *grabq; -+ /* Spinlock for the incoming queue */ -+ spinlock_t grabq_lock; -+ /* Queue for outgoing buffers -+ * Buffer number is stored in the fifo as reference -+ */ -+ struct kfifo *doneq; -+ /* Spinlock for the incoming queue */ -+ spinlock_t doneq_lock; -+ -+ /* State of the ISI module in capturing mode */ -+ int state; -+ /* Pointer to ISI buffer */ -+ void *capture_buf; -+ /* Physical address of the capture buffer */ -+ dma_addr_t capture_phys; -+ /* Size of the ISI buffer */ -+ size_t capture_buf_size; -+ /* Capture/streaming wait queue */ -+ wait_queue_head_t capture_wq; -+ -+ struct atmel_isi_camera *camera; -+ struct atmel_isi_format format; -+ struct atmel_isi_format streaming_format; -+ -+ struct mutex mutex; -+ /* User counter for the streaming interface */ -+ int stream_users; -+ /* User counter of the capture interface */ -+ int capture_users; -+ /* Video device for capturing (Codec path) */ -+ struct video_device cdev; -+ /* Video device for streaming (Preview path) */ -+ struct video_device vdev; -+ struct completion reset_complete; -+ struct clk *pclk; -+ struct clk *hclk; -+ struct platform_device *pdev; -+ unsigned int irq; -+}; -+ -+#define to_atmel_isi(vdev) container_of(vdev, struct atmel_isi, vdev) -+ -+struct atmel_isi_fh { -+ struct atmel_isi *isi; -+ unsigned int read_off; -+}; -+ -+/*----------------------------------------------------------------------------- -+ * Interface to the actual camera. -+ */ -+static LIST_HEAD(camera_list); -+static DEFINE_MUTEX(camera_list_mutex); -+ -+static void avr32_isi_release_camera(struct atmel_isi *isi, -+ struct atmel_isi_camera *cam) -+{ -+ mutex_lock(&camera_list_mutex); -+ cam->isi = NULL; -+ isi->camera = NULL; -+ module_put(cam->owner); -+ mutex_unlock(&camera_list_mutex); -+} -+ -+int atmel_isi_register_camera(struct atmel_isi_camera *cam) -+{ -+ pr_debug("atmel_isi: register camera %s\n", cam->name); -+ -+ mutex_lock(&camera_list_mutex); -+ list_add_tail(&cam->list, &camera_list); -+ mutex_unlock(&camera_list_mutex); -+ -+ return 0; -+} -+EXPORT_SYMBOL_GPL(atmel_isi_register_camera); -+ -+void atmel_isi_unregister_camera(struct atmel_isi_camera *cam) -+{ -+ pr_debug("atmel_isi: unregister camera %s\n", cam->name); -+ -+ mutex_lock(&camera_list_mutex); -+ if (cam->isi) -+ cam->isi->camera = NULL; -+ list_del(&cam->list); -+ mutex_unlock(&camera_list_mutex); -+} -+EXPORT_SYMBOL_GPL(atmel_isi_unregister_camera); -+ -+static struct atmel_isi_camera * avr32_isi_grab_camera(struct atmel_isi *isi) -+{ -+ struct atmel_isi_camera *entry, *cam = NULL; -+ -+ mutex_lock(&camera_list_mutex); -+ list_for_each_entry(entry, &camera_list, list) { -+ /* Just grab the first camera available */ -+ if (!entry->isi) { -+ if (!try_module_get(entry->owner)) -+ continue; -+ -+ cam = entry; -+ cam->isi = isi; -+ pr_debug("%s: got camera: %s\n", -+ isi->vdev.name, cam->name); -+ break; -+ } -+ } -+ mutex_unlock(&camera_list_mutex); -+ -+ return cam; -+} -+ -+static int avr32_isi_set_camera_input(struct atmel_isi *isi) -+{ -+ struct atmel_isi_camera *cam = isi->camera; -+ int ret; -+ u32 cr1; -+ u32 cr2; -+ -+ isi->format.pix.width = image_hsize; -+ isi->format.pix.height = image_vsize; -+ isi->format.pix.bytesperline = 0; -+ -+ ret = cam->set_format(cam, &isi->format); -+ if (ret) -+ return ret; -+ -+ -+ switch (isi->format.input_format) { -+ case ATMEL_ISI_PIXFMT_GREY: -+ cr2 = ISI_BIT(GRAYSCALE); -+ break; -+ case ATMEL_ISI_PIXFMT_CbYCrY: -+ cr2 = ISI_BF(YCC_SWAP, 0); -+ break; -+ case ATMEL_ISI_PIXFMT_CrYCbY: -+ cr2 = ISI_BF(YCC_SWAP, 1); -+ break; -+ case ATMEL_ISI_PIXFMT_YCbYCr: -+ cr2 = ISI_BF(YCC_SWAP, 2); -+ break; -+ case ATMEL_ISI_PIXFMT_YCrYCb: -+ cr2 = ISI_BF(YCC_SWAP, 3); -+ break; -+ case ATMEL_ISI_PIXFMT_RGB24: -+ cr2 = ISI_BIT(COL_SPACE) | ISI_BF(RGB_CFG, 0); -+ break; -+ case ATMEL_ISI_PIXFMT_BGR24: -+ cr2 = ISI_BIT(COL_SPACE) | ISI_BF(RGB_CFG, 1); -+ break; -+ case ATMEL_ISI_PIXFMT_RGB16: -+ cr2 = (ISI_BIT(COL_SPACE) | ISI_BIT(RGB_MODE) -+ | ISI_BF(RGB_CFG, 0)); -+ break; -+ case ATMEL_ISI_PIXFMT_BGR16: -+ cr2 = (ISI_BIT(COL_SPACE) | ISI_BIT(RGB_MODE) -+ | ISI_BF(RGB_CFG, 1)); -+ break; -+ case ATMEL_ISI_PIXFMT_GRB16: -+ cr2 = (ISI_BIT(COL_SPACE) | ISI_BIT(RGB_MODE) -+ | ISI_BF(RGB_CFG, 2)); -+ break; -+ case ATMEL_ISI_PIXFMT_GBR16: -+ cr2 = (ISI_BIT(COL_SPACE) | ISI_BIT(RGB_MODE) -+ | ISI_BF(RGB_CFG, 3)); -+ break; -+ case ATMEL_ISI_PIXFMT_RGB24_REV: -+ cr2 = (ISI_BIT(COL_SPACE) | ISI_BIT(RGB_SWAP) -+ | ISI_BF(RGB_CFG, 0)); -+ break; -+ case ATMEL_ISI_PIXFMT_BGR24_REV: -+ cr2 = (ISI_BIT(COL_SPACE) | ISI_BIT(RGB_SWAP) -+ | ISI_BF(RGB_CFG, 1)); -+ break; -+ case ATMEL_ISI_PIXFMT_RGB16_REV: -+ cr2 = (ISI_BIT(COL_SPACE) | ISI_BIT(RGB_SWAP) -+ | ISI_BIT(RGB_MODE) | ISI_BF(RGB_CFG, 0)); -+ break; -+ case ATMEL_ISI_PIXFMT_BGR16_REV: -+ cr2 = (ISI_BIT(COL_SPACE) | ISI_BIT(RGB_SWAP) -+ | ISI_BIT(RGB_MODE) | ISI_BF(RGB_CFG, 1)); -+ break; -+ case ATMEL_ISI_PIXFMT_GRB16_REV: -+ cr2 = (ISI_BIT(COL_SPACE) | ISI_BIT(RGB_SWAP) -+ | ISI_BIT(RGB_MODE) | ISI_BF(RGB_CFG, 2)); -+ break; -+ case ATMEL_ISI_PIXFMT_GBR16_REV: -+ cr2 = (ISI_BIT(COL_SPACE) | ISI_BIT(RGB_SWAP) -+ | ISI_BIT(RGB_MODE) | ISI_BF(RGB_CFG, 3)); -+ break; -+ default: -+ return -EINVAL; -+ } -+ -+ -+ cr1 = ISI_BF(EMB_SYNC, cam->has_emb_sync) -+ | ISI_BF(HSYNC_POL, cam->hsync_act_low) -+ | ISI_BF(VSYNC_POL, cam->vsync_act_low) -+ | ISI_BF(PIXCLK_POL, cam->pclk_act_falling) -+ | ISI_BIT(DIS); -+ -+ isi_writel(isi, CR1, cr1); -+ isi_writel(isi, CR2, cr2); -+ -+ return 0; -+} -+ -+static int avr32_isi_capture_set_format(struct atmel_isi *isi, -+ struct atmel_isi_format *fmt) -+{ -+ u32 cr2; -+ -+ fmt->pix.width = min(2048U, fmt->pix.width); -+ fmt->pix.height = min(2048U, fmt->pix.height); -+ fmt->pix.bytesperline = 0; -+ -+ /* Set format if we have specified one */ -+ if(capture_v4l2_fmt){ -+ fmt->pix.pixelformat = capture_v4l2_fmt; -+ } -+ else { -+ /* Codec path output format */ -+ fmt->pix.pixelformat = V4L2_PIX_FMT_YVYU; -+ } -+ -+ /* The ISI module outputs either YUV 4:2:2 (codec path) -+ * or RGB 5:5:5 (preview path) (ISI grayscale mode is not supported -+ * by V4L2). Therefore two pixels will be in a 32bit word */ -+ fmt->pix.bytesperline = ALIGN(fmt->pix.width * 2, 4); -+ fmt->pix.sizeimage = fmt->pix.bytesperline * fmt->pix.height; -+ -+ cr2 = isi_readl(isi, CR2); -+ cr2 = ISI_BFINS(IM_VSIZE, fmt->pix.height - 1, cr2); -+ cr2 = ISI_BFINS(IM_HSIZE, fmt->pix.width - 1, cr2); -+ isi_writel(isi, CR2, cr2); -+ -+ pr_debug("set capture format: width=%d height=%d\n", -+ fmt->pix.width, fmt->pix.height); -+ -+ return 0; -+} -+ -+static int avr32_isi_streaming_set_format(struct atmel_isi *isi, -+ struct atmel_isi_format *fmt) -+{ -+ memcpy(&isi->streaming_format, &isi->format, -+ sizeof(struct atmel_isi_format)); -+#ifndef ISI_CODEC -+ fmt->pix.width = min(640U, prev_hsize); -+ fmt->pix.height = min(480U, prev_vsize); -+ fmt->pix.bytesperline = 0; -+ -+ /* Set format if we have specified one */ -+ if(streaming_v4l2_fmt){ -+ fmt->pix.pixelformat = streaming_v4l2_fmt; -+ } -+ else { -+ /* Preview path output format -+ * Would be logically V4L2_PIX_FMT_BGR555X -+ * but this format does not exist in the specification -+ * So for now we pretend V4L2_PIX_FMT_RGB555X -+ */ -+ fmt->pix.pixelformat = V4L2_PIX_FMT_RGB555X; -+ } -+ -+ /* The ISI module outputs either YUV 4:2:2 (codec path) -+ * or RGB 5:5:5 (preview path) (ISI grayscale mode is not -+ * supported yet. Therefore two pixels will be in a 32bit word -+ */ -+ fmt->pix.bytesperline = ALIGN(fmt->pix.width * 2, 4); -+ fmt->pix.sizeimage = fmt->pix.bytesperline * fmt->pix.height; -+ -+ /* These values depend on the sensor output image size */ -+ isi_writel(isi, PDECF, prev_decimation_factor);/* 1/16 * 16 = 1*/ -+ isi_writel(isi,PSIZE , ISI_BF(PREV_HSIZE,prev_hsize - 1) -+ | ISI_BF(PREV_VSIZE, prev_vsize - 1)); -+ -+ pr_debug("set_format: cr1=0x%08x cr2=0x%08x\n", -+ isi_readl(isi, CR1), isi_readl(isi, CR2)); -+#else -+ avr32_isi_capture_set_format(isi, &isi->streaming_format); -+#endif -+ return 0; -+} -+ -+static int avr32_isi_start_capture(struct atmel_isi *isi) -+{ -+ u32 cr1; -+ int ret; -+ -+ spin_lock_irq(&isi->lock); -+ isi->state = STATE_IDLE; -+ isi_readl(isi, SR); /* clear any pending SOF interrupt */ -+ isi_writel(isi, IER, ISI_BIT(SOF)); -+ isi_writel(isi, CR1, isi_readl(isi, CR1) & ~ISI_BIT(DIS)); -+ spin_unlock_irq(&isi->lock); -+ -+ pr_debug("isi: waiting for SOF\n"); -+ ret = wait_event_interruptible(isi->capture_wq, -+ isi->state != STATE_IDLE); -+ if (ret) -+ return ret; -+ if (isi->state != STATE_CAPTURE_READY) -+ return -EIO; -+ -+ /* -+ * Do a codec request. Next SOF indicates start of capture, -+ * the one after that indicates end of capture. -+ */ -+ pr_debug("isi: starting capture\n"); -+ isi_writel(isi, CDBA, isi->capture_phys); -+ -+ spin_lock_irq(&isi->lock); -+ isi->state = STATE_CAPTURE_WAIT_SOF; -+ cr1 = isi_readl(isi, CR1); -+ cr1 |= ISI_BIT(CODEC_ON); -+ isi_writel(isi, CR1, cr1); -+ isi_writel(isi, IER, ISI_CAPTURE_MASK); -+ spin_unlock_irq(&isi->lock); -+ -+ return 0; -+} -+ -+static void avr32_isi_capture_done(struct atmel_isi *isi, -+ int state) -+{ -+ u32 cr1; -+ -+ cr1 = isi_readl(isi, CR1); -+ cr1 &= ~ISI_BIT(CODEC_ON); -+ isi_writel(isi, CR1, cr1); -+ -+ isi->state = state; -+ wake_up_interruptible(&isi->capture_wq); -+ isi_writel(isi, IDR, ISI_CAPTURE_MASK); -+} -+ -+static irqreturn_t avr32_isi_handle_streaming(struct atmel_isi *isi, -+ int sequence){ -+ -+ int reqnr; -+ -+ if(kfifo_get(isi->grabq, (unsigned char *) &reqnr, -+ sizeof(int)) != sizeof(int)){ -+ -+ /* as no new buffer is available we keep the -+ * current one -+ */ -+ pr_debug("isi: dropping frame\n"); -+#ifdef ISI_CODEC -+ isi_writel(isi, CDBA, -+ isi->current_buffer->fb_desc.fb_address); -+ -+ isi_writel(isi, CR1, ISI_BIT(CODEC_ON) | -+ isi_readl(isi, CR1)); -+#else -+ /* TEST this has to be tested if it messes up the ISI -+ * streaming process */ -+ isi_writel(isi, PPFBD, (unsigned long) -+ &isi->video_buffer[isi->current_buffer->index]); -+#endif -+ } -+ else{ -+ isi->current_buffer->status = FRAME_DONE; -+ isi->current_buffer->sequence = sequence; -+ -+ do_gettimeofday(&isi->current_buffer->timestamp); -+ -+ /*isi->current_buffer->bytes_used = -+ ISI_VIDEO_MAX_FRAME_SIZE; */ -+ -+ kfifo_put(isi->doneq, (unsigned char *) -+ &(isi->current_buffer->index), sizeof(int)); -+ -+ isi->current_buffer = &(isi->video_buffer[reqnr]); -+#ifdef ISI_CODEC -+ isi_writel(isi, CDBA, -+ isi->current_buffer->fb_desc.fb_address); -+ isi_writel(isi, CR1, ISI_BIT(CODEC_ON) | -+ isi_readl(isi, CR1)); -+#else -+ /*TODO check if fbd corresponds to frame buffer */ -+#endif -+ wake_up_interruptible(&isi->capture_wq); -+ } -+ return IRQ_HANDLED; -+} -+ -+/* FIXME move code from ISR here -+static irqreturn_t avr32_isi_handle_capturing(struct atmel_isi *isi){ -+ -+}*/ -+/* isi interrupt service routine */ -+static irqreturn_t isi_interrupt(int irq, void *dev_id) -+{ -+ struct atmel_isi *isi = dev_id; -+ u32 status, mask, pending; -+ irqreturn_t ret = IRQ_NONE; -+ static int sequence = 0; -+ -+ spin_lock(&isi->lock); -+ -+ status = isi_readl(isi, SR); -+ mask = isi_readl(isi, IMR); -+ pending = status & mask; -+ -+ pr_debug("isi: interrupt status %x pending %x\n", -+ status, pending); -+ if(isi->streaming){ -+ if(likely(pending & (ISI_BIT(FO_C_EMP) | ISI_BIT(FO_P_EMP)))){ -+ -+ sequence++; -+ ret = avr32_isi_handle_streaming(isi, sequence); -+ } -+ } -+ else{ -+ while (pending) { -+ if (pending & (ISI_BIT(FO_C_OVF) | ISI_BIT(FR_OVR))) { -+ avr32_isi_capture_done(isi, STATE_CAPTURE_ERROR); -+ pr_debug("%s: FIFO overrun (status=0x%x)\n", -+ isi->vdev.name, status); -+ } else if (pending & ISI_BIT(SOF)) { -+ switch (isi->state) { -+ case STATE_IDLE: -+ isi->state = STATE_CAPTURE_READY; -+ wake_up_interruptible(&isi->capture_wq); -+ break; -+ case STATE_CAPTURE_READY: -+ break; -+ case STATE_CAPTURE_WAIT_SOF: -+ isi->state = STATE_CAPTURE_IN_PROGRESS; -+ break; -+ /* -+ case STATE_CAPTURE_IN_PROGRESS: -+ avr32_isi_capture_done(isi, STATE_CAPTURE_DONE); -+ break; -+ */ -+ } -+ } -+ if (pending & ISI_BIT(FO_C_EMP)){ -+ if( isi->state == STATE_CAPTURE_IN_PROGRESS) -+ avr32_isi_capture_done(isi, STATE_CAPTURE_DONE); -+ } -+ -+ if (pending & ISI_BIT(SOFTRST)) { -+ complete(&isi->reset_complete); -+ isi_writel(isi, IDR, ISI_BIT(SOFTRST)); -+ } -+ -+ status = isi_readl(isi, SR); -+ mask = isi_readl(isi, IMR); -+ pending = status & mask; -+ ret = IRQ_HANDLED; -+ } -+ } -+ spin_unlock(&isi->lock); -+ -+ return ret; -+} -+ -+/* ------------------------------------------------------------------------ -+ * IOCTL videoc handling -+ * ----------------------------------------------------------------------*/ -+ -+/* --------Capture ioctls ------------------------------------------------*/ -+/* Device capabilities callback function. -+ */ -+static int avr32_isi_capture_querycap(struct file *file, void *priv, -+ struct v4l2_capability *cap) -+{ -+ strcpy(cap->driver, "atmel-isi"); -+ strcpy(cap->card, "Atmel Image Sensor Interface"); -+ cap->version = ATMEL_ISI_VERSION; -+ /* V4L2_CAP_VIDEO_CAPTURE -> This is a capture device -+ * V4L2_CAP_READWRITE -> read/write interface used -+ */ -+ cap->capabilities = (V4L2_CAP_VIDEO_CAPTURE -+ | V4L2_CAP_READWRITE -+ ); -+ return 0; -+} -+ -+/* Input enumeration callback function. -+ * Enumerates available input devices. -+ * This can be called many times from the V4L2-layer by -+ * incrementing the index to get all avaliable input devices. -+ */ -+static int avr32_isi_capture_enum_input(struct file *file, void *priv, -+ struct v4l2_input *input) -+{ -+ struct atmel_isi_fh *fh = priv; -+ struct atmel_isi *isi = fh->isi; -+ -+ /* Just one input (ISI) is available */ -+ if (input->index != 0) -+ return -EINVAL; -+ -+ /* Set input name as camera name */ -+ strlcpy(input->name, isi->camera->name, sizeof(input->name)); -+ input->type = V4L2_INPUT_TYPE_CAMERA; -+ -+ /* Set to this value just because this should be set to a -+ * defined value -+ */ -+ input->std = V4L2_STD_PAL; -+ -+ return 0; -+} -+/* Selects an input device. -+ * One input device (ISI) currently supported. -+ */ -+static int avr32_isi_capture_s_input(struct file *file, void *priv, -+ unsigned int index) -+{ -+ if (index != 0) -+ return -EINVAL; -+ return 0; -+} -+ -+/* Gets current input device. -+ */ -+static int avr32_isi_capture_g_input(struct file *file, void *priv, -+ unsigned int *index) -+{ -+ *index = 0; -+ return 0; -+} -+ -+/* Format callback function -+ * Returns a v4l2_fmtdesc structure with according values to a -+ * index. -+ * This function is called from user space until it returns -+ * -EINVAL. -+ */ -+static int avr32_isi_capture_enum_fmt_cap(struct file *file, void *priv, -+ struct v4l2_fmtdesc *fmt) -+{ -+ if (fmt->index != 0) -+ return -EINVAL; -+ -+ /* if we want to pretend another ISI output -+ * this is usefull if we input an other input format from a camera -+ * than specified in the ISI -> makes it possible to swap bytes -+ * in the ISI output format but messes up the preview path output -+ */ -+ if(capture_v4l2_fmt){ -+ fmt->pixelformat = capture_v4l2_fmt; -+ } -+ else { -+ /* This is the format the ISI tries to output */ -+ strcpy(fmt->description, "YCbYCr (YUYV) 4:2:2"); -+ fmt->pixelformat = V4L2_PIX_FMT_YUYV; -+ } -+ -+ return 0; -+} -+ -+static int avr32_isi_capture_try_fmt_cap(struct file *file, void *priv, -+ struct v4l2_format *vfmt) -+{ -+ struct atmel_isi_fh *fh = priv; -+ struct atmel_isi *isi = fh->isi; -+ -+ /* Just return the current format for now */ -+ memcpy(&vfmt->fmt.pix, &isi->format.pix, -+ sizeof(struct v4l2_pix_format)); -+ -+ return 0; -+} -+ -+/* Gets current hardware configuration -+ * For capture devices the pixel format settings are -+ * important. -+ */ -+static int avr32_isi_capture_g_fmt_cap(struct file *file, void *priv, -+ struct v4l2_format *vfmt) -+{ -+ struct atmel_isi_fh *fh = priv; -+ struct atmel_isi *isi = fh->isi; -+ -+ /* Return current pixel format */ -+ memcpy(&vfmt->fmt.pix, &isi->format.pix, -+ sizeof(struct v4l2_pix_format)); -+ -+ return 0; -+} -+ -+static int avr32_isi_capture_s_fmt_cap(struct file *file, void *priv, -+ struct v4l2_format *vfmt) -+{ -+ struct atmel_isi_fh *fh = priv; -+ struct atmel_isi *isi = fh->isi; -+ int ret = 0; -+ -+ /* We have a fixed format so just copy the current format -+ * back -+ */ -+ memcpy(&vfmt->fmt.pix, &isi->format.pix, -+ sizeof(struct v4l2_pix_format)); -+ -+ return ret; -+} -+ -+/* ------------ Preview path ioctls ------------------------------*/ -+/* Device capabilities callback function. -+ */ -+static int avr32_isi_querycap(struct file *file, void *priv, -+ struct v4l2_capability *cap) -+{ -+ strcpy(cap->driver, "atmel-isi"); -+ strcpy(cap->card, "Atmel Image Sensor Interface"); -+ cap->version = ATMEL_ISI_VERSION; -+ /* V4L2_CAP_VIDEO_CAPTURE -> This is a capture device -+ * V4L2_CAP_READWRITE -> read/write interface used -+ * V4L2_CAP_STREAMING -> ioctl + mmap interface used -+ */ -+ cap->capabilities = (V4L2_CAP_VIDEO_CAPTURE -+ | V4L2_CAP_READWRITE -+ | V4L2_CAP_STREAMING -+ ); -+ return 0; -+} -+ -+/* Input enumeration callback function. -+ * Enumerates available input devices. -+ * This can be called many times from the V4L2-layer by -+ * incrementing the index to get all avaliable input devices. -+ */ -+static int avr32_isi_enum_input(struct file *file, void *priv, -+ struct v4l2_input *input) -+{ -+ struct atmel_isi_fh *fh = priv; -+ struct atmel_isi *isi = fh->isi; -+ -+ /* Just one input (ISI) is available */ -+ if (input->index != 0) -+ return -EINVAL; -+ -+ /* Set input name as camera name */ -+ strlcpy(input->name, isi->camera->name, sizeof(input->name)); -+ input->type = V4L2_INPUT_TYPE_CAMERA; -+ -+ /* Set to this value just because this should be set to a -+ * defined value -+ */ -+ input->std = V4L2_STD_PAL; -+ -+ return 0; -+} -+ -+/* Selects an input device. -+ * One input device (ISI) currently supported. -+ */ -+static int avr32_isi_s_input(struct file *file, void *priv, -+ unsigned int index) -+{ -+ if (index != 0) -+ return -EINVAL; -+ -+ return 0; -+} -+ -+/* Gets current input device. -+ */ -+static int avr32_isi_g_input(struct file *file, void *priv, -+ unsigned int *index) -+{ -+ *index = 0; -+ return 0; -+} -+ -+/* Format callback function -+ * Returns a v4l2_fmtdesc structure with according values to a -+ * index. -+ * This function is called from user space until it returns -+ * -EINVAL. -+ */ -+static int avr32_isi_enum_fmt_cap(struct file *file, void *priv, -+ struct v4l2_fmtdesc *fmt) -+{ -+ struct atmel_isi_fh *fh = priv; -+ struct atmel_isi *isi = fh->isi; -+ -+ if (fmt->index != 0) -+ return -EINVAL; -+ -+ /* TODO: Return all possible formats -+ * This depends on ISI and camera. -+ * A enum_fmt function or a data structure should be -+ * added to the camera driver. -+ * For now just one format supported -+ */ -+ if(streaming_v4l2_fmt){ -+ strcpy(fmt->description, "Pretended format"); -+ } -+ else{ -+ strcpy(fmt->description, "Normal format"); -+ } -+ fmt->pixelformat = isi->streaming_format.pix.pixelformat;//V4L2_PIX_FMT_UYVY; -+ -+ return 0; -+} -+ -+static int avr32_isi_try_fmt_cap(struct file *file, void *priv, -+ struct v4l2_format *vfmt) -+{ -+ struct atmel_isi_fh *fh = priv; -+ struct atmel_isi *isi = fh->isi; -+ -+ /* FIXME For now we just return the current format*/ -+ memcpy(&vfmt->fmt.pix, &isi->streaming_format.pix, -+ sizeof(struct v4l2_pix_format)); -+ return 0; -+} -+ -+/* Gets current hardware configuration -+ * For capture devices the pixel format settings are -+ * important. -+ */ -+static int avr32_isi_g_fmt_cap(struct file *file, void *priv, -+ struct v4l2_format *vfmt) -+{ -+ struct atmel_isi_fh *fh = priv; -+ struct atmel_isi *isi = fh->isi; -+ -+ /*Copy current pixel format structure to user space*/ -+ memcpy(&vfmt->fmt.pix, &isi->streaming_format.pix, -+ sizeof(struct v4l2_pix_format)); -+ -+ return 0; -+} -+ -+static int avr32_isi_s_fmt_cap(struct file *file, void *priv, -+ struct v4l2_format *vfmt) -+{ -+ struct atmel_isi_fh *fh = priv; -+ struct atmel_isi *isi = fh->isi; -+ int ret = 0; -+ -+ /* Just return the current format as we do not support -+ * format switching */ -+ memcpy(&vfmt->fmt.pix, &isi->streaming_format.pix, -+ sizeof(struct v4l2_pix_format)); -+ -+ return ret; -+} -+ -+/* Checks if control is supported in driver -+ * No controls currently supported yet -+ */ -+static int avr32_isi_queryctrl(struct file *file, void *priv, -+ struct v4l2_queryctrl *qc) -+{ -+ switch(qc->id){ -+ case V4L2_CID_BRIGHTNESS: -+ strcpy(qc->name, "Brightness"); -+ qc->minimum = 0; -+ qc->maximum = 100; -+ qc->step = 1; -+ qc->default_value = 50; -+ qc->flags = 0; -+ break; -+ default: -+ return -EINVAL; -+ } -+ return 0; -+} -+ -+static int avr32_isi_g_ctrl(struct file *file, void *priv, -+ struct v4l2_control *ctrl) -+{ -+ switch(ctrl->id){ -+ case V4L2_CID_BRIGHTNESS: -+ ctrl->value = 0; -+ break; -+ default: -+ return -EINVAL; -+ } -+ return 0; -+} -+ -+static int avr32_isi_s_ctrl(struct file *file, void *priv, -+ struct v4l2_control *ctrl) -+{ -+ switch(ctrl->id){ -+ case V4L2_CID_BRIGHTNESS: -+ break; -+ default: -+ return -EINVAL; -+ } -+ return 0; -+} -+ -+static int avr32_isi_reqbufs(struct file *file, void *private_data, -+ struct v4l2_requestbuffers *req) -+{ -+ /* Only memory mapped buffers supported*/ -+ if(req->memory != V4L2_MEMORY_MMAP){ -+ pr_debug("atmel_isi: buffer format not supported\n"); -+ return -EINVAL; -+ } -+ pr_debug("atmel_isi: Requested %d buffers. Using %d buffers\n", -+ req->count, video_buffers); -+ /* buffer number is fixed for now as it is difficult to get -+ * that memory at runtime */ -+ req->count = video_buffers; -+ memset(&req->reserved, 0, sizeof(req->reserved)); -+ return 0; -+} -+ -+static int avr32_isi_querybuf(struct file *file, void *private_data, -+ struct v4l2_buffer *buf) -+{ -+ struct atmel_isi_fh *fh = private_data; -+ struct atmel_isi *isi = fh->isi; -+ struct frame_buffer *buffer; -+ -+ if(unlikely(buf->type != V4L2_BUF_TYPE_VIDEO_CAPTURE)) -+ return -EINVAL; -+ if(unlikely(buf->index >= video_buffers)) -+ return -EINVAL; -+ -+ buffer = &(isi->video_buffer[buf->index]); -+ -+ buf->type = V4L2_BUF_TYPE_VIDEO_CAPTURE; -+ buf->length = video_buffer_size; -+ buf->memory = V4L2_MEMORY_MMAP; -+ -+ /* set index as mmap reference to the buffer */ -+ buf->m.offset = buf->index << PAGE_SHIFT; -+ -+ switch(buffer->status){ -+ case FRAME_UNUSED: -+ case FRAME_ERROR: -+ case FRAME_QUEUED: -+ buf->flags |= V4L2_BUF_FLAG_QUEUED; -+ buf->bytesused = buffer->bytes_used; -+ break; -+ case FRAME_DONE: -+ buf->flags |= V4L2_BUF_FLAG_DONE; -+ buf->bytesused = buffer->bytes_used; -+ buf->sequence = buffer->sequence; -+ buf->timestamp = buffer->timestamp; -+ break; -+ } -+ -+ buf->field = V4L2_FIELD_NONE; /* no interlacing stuff */ -+ -+ if(buffer->mmap_count) -+ buf->flags |= V4L2_BUF_FLAG_MAPPED; -+ else -+ buf->flags &= ~V4L2_BUF_FLAG_MAPPED; -+ -+ pr_debug("atmel_isi: querybuf index:%d offset:%d\n", -+ buf->index, buf->m.offset); -+ -+ return 0; -+} -+ -+static int avr32_isi_qbuf(struct file *file, void *private_data, -+ struct v4l2_buffer *buf) -+{ -+ struct atmel_isi_fh *fh = private_data; -+ struct atmel_isi *isi = fh->isi; -+ struct frame_buffer *buffer; -+ -+ if(unlikely(buf->type != V4L2_BUF_TYPE_VIDEO_CAPTURE)) -+ return -EINVAL; -+ if(unlikely(buf->index >= video_buffers || buf->index < 0)) -+ return -EINVAL; -+ if(unlikely(buf->memory != V4L2_MEMORY_MMAP)) -+ return -EINVAL; -+ -+ buffer = &(isi->video_buffer[buf->index]); -+ if(unlikely(buffer->status != FRAME_UNUSED)) -+ return -EINVAL; -+ -+ mutex_lock(&isi->mutex); -+ buf->flags |= V4L2_BUF_FLAG_QUEUED; -+ buf->flags &= ~V4L2_BUF_FLAG_DONE; -+ buffer->status = FRAME_QUEUED; -+ kfifo_put(isi->grabq, (unsigned char*) &buf->index, sizeof(int)); -+ mutex_unlock(&isi->mutex); -+ -+ return 0; -+} -+ -+static int avr32_isi_dqbuf(struct file *file, void *private_data, -+ struct v4l2_buffer *buf) -+{ -+ struct atmel_isi_fh *fh = private_data; -+ struct atmel_isi *isi = fh->isi; -+ struct frame_buffer *buffer; -+ int reqnr = 0; -+ -+ if(unlikely(buf->type != V4L2_BUF_TYPE_VIDEO_CAPTURE)) -+ return -EINVAL; -+ /* Mencoder does not set this flag -+ * -+ if(unlikely(buf->memory != V4L2_MEMORY_MMAP)){ -+ pr_debug("isi: dequeue failed buffer not of mmapped type\n"); -+ return -EINVAL; -+ }*/ -+ if((kfifo_len(isi->doneq) == 0) && (file->f_flags & O_NONBLOCK)){ -+ pr_debug("Done-queue is empty\n"); -+ return -EAGAIN; -+ } -+ /* -+ if(wait_event_interruptible(isi->capture_wq, -+ kfifo_len(isi->doneq) != 0) < 0){ -+ pr_debug("Done-queue interrupted\n"); -+ return -EINTR; -+ } -+ */ -+ if(!kfifo_get(isi->doneq, (unsigned char*) &reqnr, sizeof(int))){ -+ return -EBUSY; -+ } -+ buffer = &(isi->video_buffer[reqnr]); -+ -+ if(unlikely(buffer->status != FRAME_DONE)){ -+ pr_debug("isi: error, dequeued buffer not ready\n"); -+ return -EINVAL; -+ } -+ buf->index = reqnr; -+ buf->bytesused = buffer->bytes_used; -+ buf->timestamp = buffer->timestamp; -+ buf->sequence = buffer->sequence; -+ buf->m.offset = reqnr << PAGE_SHIFT; -+ buffer->status = FRAME_UNUSED; -+ buf->flags = V4L2_BUF_FLAG_MAPPED | V4L2_BUF_FLAG_DONE; -+ -+ buf->length = isi->capture_buffer_size; -+ buf->field = V4L2_FIELD_NONE; -+ buf->memory = V4L2_MEMORY_MMAP; -+ return 0; -+} -+ -+static int avr32_isi_streamon(struct file *file, void *private_data, -+ enum v4l2_buf_type type) -+{ -+ struct atmel_isi_fh *fh = private_data; -+ struct atmel_isi *isi = fh->isi; -+ int reqnr; -+ struct frame_buffer *buffer; -+ u32 cr1; -+ -+ if(unlikely(type != V4L2_BUF_TYPE_VIDEO_CAPTURE)) -+ return -EINVAL; -+ -+ if(!kfifo_get(isi->grabq, (unsigned char*) &reqnr, sizeof(int))){ -+ mutex_unlock(&isi->mutex); -+ pr_debug("atmel_isi: No buffer in IN-Queue, start of streaming\ -+ aborted (one buffer is required in IN-Queue)\n"); -+ return -EINVAL; -+ } -+ buffer = &(isi->video_buffer[reqnr]); -+ -+ -+ spin_lock_irq(isi->lock); -+ isi->streaming = 1; -+ isi->current_buffer = buffer; -+ cr1 = isi_readl(isi, CR1); -+#ifdef ISI_CODEC -+ isi_writel(isi, CDBA, buffer->fb_desc.fb_address); -+ /* Enable codec path */ -+ cr1 |= ISI_BIT(CODEC_ON) | ISI_BIT(DIS); -+#else -+ isi_writel(isi, PPFBD, isi->fbd_list_start); -+#endif -+ /* Enable interrupts */ -+ isi_readl(isi, SR); -+ /* FIXME enable codec/preview path according to setup */ -+ isi_writel(isi, IER, ISI_BIT(FO_C_EMP) | ISI_BIT(FO_P_EMP)); -+ -+ cr1 |= ISI_BF(FRATE, frame_rate_scaler); -+ -+ /* Enable ISI module*/ -+ cr1 &= ~ISI_BIT(DIS); -+ isi_writel(isi, CR1, cr1); -+ spin_unlock_irq(isi->lock); -+ -+ isi->camera->start_capture(isi->camera); -+ -+ return 0; -+} -+ -+static int avr32_isi_streamoff(struct file *file, void *private_data, -+ enum v4l2_buf_type type) -+{ -+ struct atmel_isi_fh *fh = private_data; -+ struct atmel_isi *isi = fh->isi; -+ -+ if(unlikely(type != V4L2_BUF_TYPE_VIDEO_CAPTURE)) -+ return -EINVAL; -+ -+ spin_lock_irq(isi->lock); -+ isi->streaming = 0; -+#ifdef ISI_CODEC -+ /* Disble codec path */ -+ isi_writel(isi, CR1, isi_readl(isi, CR1) & (~ISI_BIT(CODEC_ON))); -+#endif -+ /* Disable interrupts */ -+ isi_writel(isi, IDR, ISI_BIT(FO_C_EMP) | ISI_BIT(FO_P_EMP)); -+ -+ /* Disable ISI module*/ -+ isi_writel(isi, CR1, isi_readl(isi, CR1) | ISI_BIT(DIS)); -+ spin_unlock_irq(isi->lock); -+ -+ isi->camera->stop_capture(isi->camera); -+ pr_debug("atmel_isi: Stream off\n"); -+ -+ return 0; -+} -+ -+/*----------------------------------------------------------------------------*/ -+static int avr32_isi_capture_close (struct inode *inode, struct file *file) -+{ -+ struct atmel_isi_fh *fh = file->private_data; -+ struct atmel_isi *isi = fh->isi; -+ u32 cr1; -+ -+ mutex_lock(&isi->mutex); -+ -+ isi->capture_users--; -+ kfree(fh); -+ -+ /* Stop camera and ISI if driver has no users */ -+ if(!isi->stream_users) { -+ isi->camera->stop_capture(isi->camera); -+ -+ spin_lock_irq(&isi->lock); -+ cr1 = isi_readl(isi, CR1); -+ cr1 |= ISI_BIT(DIS); -+ isi_writel(isi, CR1, cr1); -+ spin_unlock_irq(&isi->lock); -+ } -+ mutex_unlock(&isi->mutex); -+ -+ return 0; -+} -+ -+static int avr32_isi_capture_open (struct inode *inode, struct file *file) -+{ -+ struct video_device *vdev = video_devdata(file); -+ struct atmel_isi *isi = to_atmel_isi(vdev); -+ struct atmel_isi_fh *fh; -+ int ret = -EBUSY; -+ unsigned long timeout; -+ -+ mutex_lock(&isi->mutex); -+ -+ -+ if (isi->capture_users) { -+ pr_debug("%s: open(): device busy\n", vdev->name); -+ goto out; -+ } -+ -+ if (!isi->camera) { -+ -+ ret = -ENODEV; -+ isi->camera = avr32_isi_grab_camera(isi); -+ if (!isi->camera) -+ goto out; -+ -+ ret = avr32_isi_set_camera_input(isi); -+ if(ret) -+ goto out; -+ } -+ -+ avr32_isi_capture_set_format(isi, &isi->format); -+ -+ /* -+ * Reset the controller and wait for completion. The -+ * reset will only succeed if we have a pixel clock -+ * from the camera. -+ */ -+ if(isi->stream_users == 0){ -+ -+ init_completion(&isi->reset_complete); -+ isi_writel(isi, IER, ISI_BIT(SOFTRST)); -+ isi_writel(isi, CR1, ISI_BIT(RST)); -+ -+ timeout = wait_for_completion_timeout(&isi->reset_complete, -+ msecs_to_jiffies(100)); -+ -+ isi_writel(isi, IDR, ~0UL); -+ if (timeout == 0) { -+ ret = -ETIMEDOUT; -+ goto out; -+ } -+ } -+ -+ ret = -ENOMEM; -+ fh = kzalloc(sizeof(struct atmel_isi_fh), GFP_KERNEL); -+ if (!fh) { -+ pr_debug("%s: open(): out of memory\n", vdev->name); -+ goto out; -+ } -+ -+ fh->isi = isi; -+ file->private_data = fh; -+ isi->capture_users++; -+ -+ ret = 0; -+ -+out: -+ mutex_unlock(&isi->mutex); -+ return ret; -+} -+ -+static ssize_t avr32_isi_capture_read(struct file *file, char __user *data, -+ size_t count, loff_t *ppos) -+{ -+ struct atmel_isi_fh *fh = file->private_data; -+ struct atmel_isi *isi = fh->isi; -+ int state; -+ int ret; -+ -+ state = STATE_IDLE; -+ -+ pr_debug("isi: read %zu bytes read_off=%u state=%u sizeimage=%u\n", -+ count, fh->read_off, state, isi->format.pix.sizeimage); -+ isi->camera->start_capture(isi->camera); -+ -+ -+ avr32_isi_start_capture(isi); -+ -+ ret = wait_event_interruptible( isi->capture_wq, -+ (isi->state == STATE_CAPTURE_DONE) -+ || (isi->state == STATE_CAPTURE_ERROR)); -+ if (ret) -+ return ret; -+ if (isi->state == STATE_CAPTURE_ERROR) { -+ isi->state = STATE_IDLE; -+ return -EIO; -+ } -+ -+ fh->read_off = 0; -+ -+ count = min(count, (size_t)isi->format.pix.sizeimage - fh->read_off); -+ ret = copy_to_user(data, isi->capture_buf + fh->read_off, count); -+ if (ret) -+ return -EFAULT; -+ -+ fh->read_off += count; -+ if (fh->read_off >= isi->format.pix.sizeimage) -+ isi->state = STATE_IDLE; -+ -+ return count; -+} -+ -+static void avr32_isi_capture_release (struct video_device *vdev) -+{ -+ pr_debug("%s: release\n", vdev->name); -+} -+ -+/* ----------------- Streaming interface -------------------------------------*/ -+static void avr32_isi_vm_open(struct vm_area_struct *vma){ -+ struct frame_buffer *buffer = -+ (struct frame_buffer *) vma->vm_private_data; -+ buffer->mmap_count++; -+ pr_debug("atmel_isi: vm_open count=%d\n",buffer->mmap_count); -+} -+ -+static void avr32_isi_vm_close(struct vm_area_struct *vma){ -+ struct frame_buffer *buffer = -+ (struct frame_buffer *) vma->vm_private_data; -+ pr_debug("atmel_isi: vm_close count=%d\n",buffer->mmap_count); -+ buffer->mmap_count--; -+ if(buffer->mmap_count < 0) -+ printk("atmel_isi: mmap_count went negative\n"); -+} -+ -+/* FIXME remove this function -+struct page *avr32_isi_vm_nopage( struct vm_area_struct *vma, -+ unsigned long address, int *type ) -+{ -+ return NOPAGE_SIGBUS; -+} -+*/ -+ -+static struct vm_operations_struct avr32_isi_vm_ops = { -+ .open = avr32_isi_vm_open, -+ .close = avr32_isi_vm_close, -+ //.nopage = avr32_isi_vm_nopage, -+}; -+ -+static int avr32_isi_mmap(struct file *file, struct vm_area_struct *vma) -+{ -+ unsigned long pfn; -+ int ret; -+ struct atmel_isi_fh *fh = file->private_data; -+ struct atmel_isi * isi = fh->isi; -+ struct frame_buffer *buffer = &(isi->video_buffer[vma->vm_pgoff]); -+ unsigned long size = vma->vm_end - vma->vm_start; -+ -+ pr_debug("atmel_isi: mmap called pgoff=%ld size=%ld \n", -+ vma->vm_pgoff, size); -+ -+ if(size > video_buffer_size){ -+ pr_debug("atmel_isi: mmap requested buffer is to large\n"); -+ return -EINVAL; -+ } -+ if(vma->vm_pgoff > video_buffers){ -+ pr_debug("atmel_isi: invalid mmap page offset\n"); -+ return -EINVAL; -+ } -+ pfn = isi->video_buffer[vma->vm_pgoff].fb_desc.fb_address >> PAGE_SHIFT; -+ -+ ret = remap_pfn_range(vma, vma->vm_start, pfn, -+ vma->vm_end - vma->vm_start, vma->vm_page_prot); -+ if(ret){ -+ return ret; -+ } -+ -+ vma->vm_ops = &avr32_isi_vm_ops; -+ vma->vm_flags = VM_DONTEXPAND; /* fixed size */ -+ vma->vm_flags |= VM_RESERVED;/* do not swap out */ -+ vma->vm_flags |= VM_DONTCOPY; -+ vma->vm_flags |= VM_SHARED; -+ vma->vm_private_data = (void *) buffer; -+ avr32_isi_vm_open(vma); -+ -+ pr_debug("atmel_isi: vma start=0x%08lx, size=%ld phys=%ld \n", -+ (unsigned long) vma->vm_start, -+ (unsigned long) vma->vm_end - (unsigned long) vma->vm_start, -+ pfn << PAGE_SHIFT); -+ return 0; -+} -+ -+static unsigned int avr32_isi_poll(struct file *file, poll_table *wait) -+{ -+ struct atmel_isi_fh *fh = file->private_data; -+ struct atmel_isi *isi = fh->isi; -+ unsigned int ret = 0; -+ -+ mutex_lock(&isi->mutex); -+ poll_wait(file, &isi->capture_wq, wait); -+ if(kfifo_len(isi->doneq)) -+ ret = POLLIN | POLLRDNORM; -+ mutex_unlock(&isi->mutex); -+ -+ return ret; -+} -+ -+static int avr32_isi_stream_close (struct inode *inode, struct file *file) -+{ -+ struct atmel_isi_fh *fh = file->private_data; -+ struct atmel_isi *isi = fh->isi; -+ u32 cr1; -+ -+ mutex_lock(&isi->mutex); -+ -+ isi->stream_users--; -+ kfree(fh); -+ -+ /* Stop camera and ISI if driver has no users */ -+ if(!isi->capture_users) { -+ isi->camera->stop_capture(isi->camera); -+ -+ spin_lock_irq(&isi->lock); -+ cr1 = isi_readl(isi, CR1); -+ cr1 |= ISI_BIT(DIS); -+ isi_writel(isi, CR1, cr1); -+ spin_unlock_irq(&isi->lock); -+ } -+ -+ mutex_unlock(&isi->mutex); -+ -+ return 0; -+} -+ -+static int avr32_isi_stream_open (struct inode *inode, struct file *file) -+{ -+ struct video_device *vdev = video_devdata(file); -+ struct atmel_isi *isi = to_atmel_isi(vdev); -+ struct atmel_isi_fh *fh; -+ int ret = -EBUSY; -+ unsigned long timeout; -+ -+ mutex_lock(&isi->mutex); -+ -+ -+ if (isi->stream_users) { -+ pr_debug("%s: open(): device busy\n", vdev->name); -+ goto out; -+ } -+ -+ if (!isi->camera) { -+ ret = -ENODEV; -+ isi->camera = avr32_isi_grab_camera(isi); -+ if (!isi->camera) -+ goto out; -+ ret = -EINVAL; -+ ret = avr32_isi_set_camera_input(isi); -+ if(ret) -+ goto out; -+ } -+ avr32_isi_streaming_set_format(isi, &isi->format); -+ kfifo_reset(isi->grabq); -+ kfifo_reset(isi->doneq); -+ -+ /* -+ * Reset the controller and wait for completion. The -+ * reset will only succeed if we have a pixel clock -+ * from the camera. -+ */ -+ if(isi->stream_users == 0){ -+ -+ init_completion(&isi->reset_complete); -+ isi_writel(isi, IER, ISI_BIT(SOFTRST)); -+ isi_writel(isi, CR1, ISI_BIT(RST)); -+ -+ timeout = wait_for_completion_timeout(&isi->reset_complete, -+ msecs_to_jiffies(100)); -+ -+ if (timeout == 0) { -+ ret = -ETIMEDOUT; -+ goto out; -+ } -+ isi_writel(isi, IDR, ~0UL); -+ } -+ -+ ret = -ENOMEM; -+ fh = kzalloc(sizeof(struct atmel_isi_fh), GFP_KERNEL); -+ if (!fh) { -+ pr_debug("%s: open(): out of memory\n", vdev->name); -+ goto out; -+ } -+ -+ fh->isi = isi; -+ file->private_data = fh; -+ isi->stream_users++; -+ -+ ret = 0; -+ -+out: -+ mutex_unlock(&isi->mutex); -+ return ret; -+} -+ -+static void avr32_isi_stream_release (struct video_device *vdev) -+{ -+ struct atmel_isi *isi = to_atmel_isi(vdev); -+ pr_debug("%s: release\n", vdev->name); -+ kfree(isi); -+} -+ -+/* -----------------------------------------------------------------------*/ -+ -+/* Streaming v4l2 device file operations */ -+static struct file_operations avr32_isi_streaming_fops = { -+ .owner = THIS_MODULE, -+ .ioctl = video_ioctl2, -+ .open = avr32_isi_stream_open, -+ .release = avr32_isi_stream_close, -+ .mmap = avr32_isi_mmap, -+ .poll = avr32_isi_poll, -+}; -+ -+/* Capture v4l2 device file operations */ -+static struct file_operations avr32_isi_capture_fops = { -+ .owner = THIS_MODULE, -+ .open = avr32_isi_capture_open, -+ .release = avr32_isi_capture_close, -+ .read = avr32_isi_capture_read, -+ .ioctl = video_ioctl2, -+}; -+ -+static int __exit avr32_isi_remove(struct platform_device *pdev) -+{ -+ struct atmel_isi *isi = platform_get_drvdata(pdev); -+ int i; -+ -+ if (isi->camera) -+ isi->camera->stop_capture(isi->camera); -+ -+ if (isi->camera) -+ avr32_isi_release_camera(isi, isi->camera); -+ video_unregister_device(&isi->cdev); -+ video_unregister_device(&isi->vdev); -+ -+ platform_set_drvdata(pdev, NULL); -+ -+ /* release capture buffer */ -+ dma_free_coherent(&pdev->dev, capture_buffer_size, -+ isi->capture_buf, isi->capture_phys); -+ -+ /* release frame buffers */ -+ for(i = 0; i < video_buffers; i++){ -+ dma_free_coherent(&pdev->dev, -+ video_buffer_size, -+ isi->video_buffer[i].frame_buffer, -+ isi->video_buffer[i].fb_desc.fb_address); -+ } -+ -+ kfifo_free(isi->doneq); -+ kfifo_free(isi->grabq); -+ -+ free_irq(isi->irq, isi); -+ iounmap(isi->regs); -+ clk_disable(isi->hclk); -+ clk_disable(isi->pclk); -+ clk_put(isi->hclk); -+ clk_put(isi->pclk); -+ -+ /* -+ * Don't free isi here -- it will be taken care of by the -+ * release() callback. -+ */ -+ -+ return 0; -+} -+ -+ -+static int __init avr32_isi_probe(struct platform_device *pdev) -+{ -+ unsigned int irq; -+ struct atmel_isi *isi; -+ struct clk *pclk, *hclk; -+ struct resource *regs; -+ int ret; -+ int i; -+ int video_bytes_used = video_buffer_size; -+ -+ regs = platform_get_resource(pdev, IORESOURCE_MEM, 0); -+ if(!regs) -+ return -ENXIO; -+ -+ pclk = clk_get(&pdev->dev, "pclk"); -+ if (IS_ERR(pclk)) -+ return PTR_ERR(pclk); -+ hclk = clk_get(&pdev->dev, "hclk"); -+ if (IS_ERR(hclk)) { -+ ret = PTR_ERR(hclk); -+ goto err_hclk; -+ } -+ clk_enable(pclk); -+ clk_enable(hclk); -+ -+ isi = kzalloc(sizeof(struct atmel_isi), GFP_KERNEL); -+ if(!isi){ -+ ret = -ENOMEM; -+ dev_err(&pdev->dev, "can't allocate interface!\n"); -+ goto err_alloc_isi; -+ } -+ -+ isi->pclk = pclk; -+ isi->hclk = hclk; -+ -+ /* Round up buffer sizes to the next page if needed */ -+ video_buffer_size = PAGE_ALIGN(video_buffer_size); -+ capture_buffer_size = PAGE_ALIGN(capture_buffer_size); -+ -+ spin_lock_init(&isi->lock); -+ mutex_init(&isi->mutex); -+ init_waitqueue_head(&isi->capture_wq); -+ -+ /* Initialize v4l2 capture device */ -+ isi->cdev.fops = &avr32_isi_capture_fops; -+ strcpy(isi->cdev.name, "atmel_isi_capture"); -+ isi->cdev.type = VFL_TYPE_GRABBER; -+ isi->cdev.type2 = VID_TYPE_CAPTURE; -+ isi->cdev.minor = -1; -+ isi->cdev.release =avr32_isi_capture_release; -+ isi->cdev.vidioc_querycap = avr32_isi_capture_querycap; -+ isi->cdev.vidioc_enum_fmt_cap = avr32_isi_capture_enum_fmt_cap; -+ isi->cdev.vidioc_try_fmt_cap = avr32_isi_capture_try_fmt_cap; -+ isi->cdev.vidioc_g_fmt_cap = avr32_isi_capture_g_fmt_cap; -+ isi->cdev.vidioc_s_fmt_cap = avr32_isi_capture_s_fmt_cap; -+ isi->cdev.vidioc_enum_input = avr32_isi_capture_enum_input; -+ isi->cdev.vidioc_g_input = avr32_isi_capture_g_input; -+ isi->cdev.vidioc_s_input = avr32_isi_capture_s_input; -+#ifdef DEBUG -+ isi->cdev.debug = V4L2_DEBUG_IOCTL | V4L2_DEBUG_IOCTL_ARG; -+#endif -+ -+ /* Initialize v4l2 streaming device */ -+ isi->vdev.fops = &avr32_isi_streaming_fops; -+ strcpy(isi->vdev.name, "atmel-isi"); -+ isi->vdev.type = VFL_TYPE_GRABBER; -+ isi->vdev.type2 = VID_TYPE_CAPTURE; -+ isi->vdev.minor = -1; -+ isi->vdev.release = avr32_isi_stream_release; -+#ifdef DEBUG -+ isi->vdev.debug = V4L2_DEBUG_IOCTL | V4L2_DEBUG_IOCTL_ARG; -+#endif -+ -+ isi->vdev.vidioc_querycap = avr32_isi_querycap; -+ isi->vdev.vidioc_enum_fmt_cap = avr32_isi_enum_fmt_cap; -+ isi->vdev.vidioc_try_fmt_cap = avr32_isi_try_fmt_cap; -+ isi->vdev.vidioc_g_fmt_cap = avr32_isi_g_fmt_cap; -+ isi->vdev.vidioc_s_fmt_cap = avr32_isi_s_fmt_cap; -+ isi->vdev.vidioc_enum_input = avr32_isi_enum_input; -+ isi->vdev.vidioc_g_input = avr32_isi_g_input; -+ isi->vdev.vidioc_s_input = avr32_isi_s_input; -+ isi->vdev.vidioc_queryctrl = avr32_isi_queryctrl; -+ isi->vdev.vidioc_g_ctrl = avr32_isi_g_ctrl; -+ isi->vdev.vidioc_s_ctrl = avr32_isi_s_ctrl; -+ isi->vdev.vidioc_querybuf = avr32_isi_querybuf; -+ isi->vdev.vidioc_reqbufs = avr32_isi_reqbufs; -+ isi->vdev.vidioc_qbuf = avr32_isi_qbuf; -+ isi->vdev.vidioc_dqbuf = avr32_isi_dqbuf; -+ isi->vdev.vidioc_streamon = avr32_isi_streamon; -+ isi->vdev.vidioc_streamoff = avr32_isi_streamoff; -+ -+ isi->regs = ioremap(regs->start, regs->end - regs->start + 1); -+ if (!isi->regs) { -+ ret = -ENOMEM; -+ goto err_ioremap; -+ } -+ -+ irq = platform_get_irq(pdev,0); -+ ret = request_irq(irq, isi_interrupt, 0, "isi", isi); -+ if (ret) { -+ dev_err(&pdev->dev, "unable to request irq %d\n", irq); -+ goto err_req_irq; -+ } -+ isi->irq = irq; -+ -+ /* Allocate ISI capture buffer */ -+ isi->capture_buf = dma_alloc_coherent(&pdev->dev, -+ capture_buffer_size, -+ &isi->capture_phys, -+ GFP_KERNEL); -+ if (!isi->capture_buf) { -+ ret = -ENOMEM; -+ dev_err(&pdev->dev, "failed to allocate capture buffer\n"); -+ goto err_alloc_cbuf; -+ } -+ -+ /* Allocate and initialize video buffers */ -+ for(i=0;i < video_buffers; i++){ -+ memset(&isi->video_buffer[i], 0, sizeof(struct frame_buffer)); -+ isi->video_buffer[i].frame_buffer = -+ dma_alloc_coherent(&pdev->dev, -+ video_buffer_size, -+ (dma_addr_t *) -+ &(isi->video_buffer[i].fb_desc.fb_address), -+ GFP_KERNEL); -+ if(!isi->video_buffer[i].frame_buffer){ -+ ret = -ENOMEM; -+ dev_err(&pdev->dev, -+ "failed to allocate video buffer\n"); -+ goto err_alloc_vbuf; -+ } -+ -+ isi->video_buffer[i].bytes_used = video_bytes_used; -+ isi->video_buffer[i].status = FRAME_UNUSED; -+ isi->video_buffer[i].index = i; -+ -+#ifdef DEBUG -+ /* Put some color into the buffers */ -+ /* -+ memset(isi->video_buffer[i].frame_buffer, (i*4)%0xFF, -+ video_buffer_size); -+ */ -+#endif -+ } -+ /* set up frame buffer descriptor list for ISI module*/ -+ /* FIXME -+ isi->fbd_list_start = dma_map_single(&pdev->dev, -+ &isi->video_buffer[0].fb_desc, -+ sizeof(struct fbd), -+ DMA_NONE); -+ */ -+ isi->fbd_list_start = __pa(&isi->video_buffer[0].fb_desc); -+ for(i=0; i < (video_buffers - 1); i++){ -+ isi->video_buffer[i].fb_desc.next_fbd_address = -+ /* -+ dma_map_single(&pdev->dev, -+ &isi->video_buffer[i+1].fb_desc, -+ sizeof(struct fbd), -+ DMA_NONE);*/ -+ __pa(&isi->video_buffer[i+1]); -+ } -+ /* FIXME -+ * isi->video_buffer[i].fb_desc.next_fbd_address = -+ * isi->fbd_list_start; -+ */ -+ isi->video_buffer[i].fb_desc.next_fbd_address = -+ __pa(&isi->video_buffer[0]); -+ -+#ifdef DEBUG -+ for(i=0;i < video_buffers; i++){ -+ pr_debug("atmel_isi: fbd at %08lx video buffer at \ -+phys addr %08lx \n", __pa(&isi->video_buffer[i]), -+ (unsigned long) isi->video_buffer[i].fb_desc.fb_address); -+ } -+#endif -+ dev_info(&pdev->dev, -+ "capture buffer: %d bytes at %p (phys 0x%08x)\n", -+ capture_buffer_size, isi->capture_buf, -+ isi->capture_phys); -+ -+ spin_lock_init(&isi->grabq_lock); -+ isi->grabq = kfifo_alloc(sizeof(int) * video_buffers, GFP_KERNEL, -+ &isi->grabq_lock); -+ if(IS_ERR(isi->grabq)){ -+ dev_err(&pdev->dev, "fifo allocation failed\n"); -+ goto err_fifo_alloc1; -+ } -+ spin_lock_init(&isi->doneq_lock); -+ isi->doneq = kfifo_alloc(sizeof(int) * video_buffers, GFP_KERNEL, -+ &isi->doneq_lock); -+ if(IS_ERR(isi->doneq)){ -+ dev_err(&pdev->dev, "fifo allocation failed\n"); -+ goto err_fifo_alloc2; -+ } -+ -+ isi_writel(isi, CR1, ISI_BIT(DIS)); -+ -+ ret = video_register_device(&isi->cdev, VFL_TYPE_GRABBER, -1); -+ if(ret) -+ goto err_register1; -+ -+ ret = video_register_device(&isi->vdev, VFL_TYPE_GRABBER, -1); -+ if (ret) -+ goto err_register2; -+ -+ platform_set_drvdata(pdev, isi); -+ -+ dev_info(&pdev->dev, "Atmel ISI V4L2 device at 0x%08lx\n", -+ (unsigned long)regs->start); -+ -+ return 0; -+ -+err_register2: -+ video_unregister_device(&isi->cdev); -+err_register1: -+ kfifo_free(isi->doneq); -+err_fifo_alloc2: -+ kfifo_free(isi->grabq); -+err_fifo_alloc1: -+err_alloc_vbuf: -+ while(i--) -+ dma_free_coherent(&pdev->dev, video_buffer_size, -+ isi->video_buffer[i].frame_buffer, -+ isi->video_buffer[i].fb_desc.fb_address); -+ dma_free_coherent(&pdev->dev, capture_buffer_size, -+ isi->capture_buf, -+ isi->capture_phys); -+err_alloc_cbuf: -+ free_irq(isi->irq, isi); -+err_req_irq: -+ iounmap(isi->regs); -+err_ioremap: -+ kfree(isi); -+err_alloc_isi: -+ clk_disable(hclk); -+ clk_disable(pclk); -+ clk_put(hclk); -+err_hclk: -+ clk_put(pclk); -+ -+ return ret; -+ -+} -+ -+static struct platform_driver avr32_isi_driver = { -+ .probe = avr32_isi_probe, -+ .remove = __exit_p(avr32_isi_remove), -+ .driver = { -+ .name = "atmel_isi", -+ .owner = THIS_MODULE, -+ }, -+}; -+ -+static int __init avr32_isi_init(void) -+{ -+ return platform_driver_probe(&avr32_isi_driver, &avr32_isi_probe); -+ -+/*FIXME return platform_driver_register(&avr32_isi_driver);*/ -+} -+ -+ -+static void __exit avr32_isi_exit(void) -+{ -+ platform_driver_unregister(&avr32_isi_driver); -+} -+ -+ -+module_init(avr32_isi_init); -+module_exit(avr32_isi_exit); -+ -+MODULE_AUTHOR("Lars Häring <lharing@atmel.com>"); -+MODULE_DESCRIPTION("The V4L2 driver for AVR32 Linux"); -+MODULE_LICENSE("GPL"); -+MODULE_SUPPORTED_DEVICE("video"); -diff --git a/drivers/media/video/atmel-isi.h b/drivers/media/video/atmel-isi.h -new file mode 100644 -index 0000000..2aa3c14 ---- /dev/null -+++ b/drivers/media/video/atmel-isi.h -@@ -0,0 +1,252 @@ -+/* -+ * Register definitions for the Atmel Image Sensor Interface. -+ * -+ * Copyright (C) 2006 Atmel Corporation -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 as -+ * published by the Free Software Foundation. -+ */ -+#ifndef __ASM_AVR32_ISI_H__ -+#define __ASM_AVR32_ISI_H__ -+ -+#include <linux/videodev2.h> -+ -+/* ISI register offsets */ -+#define ISI_CR1 0x0000 -+#define ISI_CR2 0x0004 -+#define ISI_SR 0x0008 -+#define ISI_IER 0x000c -+#define ISI_IDR 0x0010 -+#define ISI_IMR 0x0014 -+#define ISI_PSIZE 0x0020 -+#define ISI_PDECF 0x0024 -+#define ISI_PPFBD 0x0028 -+#define ISI_CDBA 0x002c -+#define ISI_Y2R_SET0 0x0030 -+#define ISI_Y2R_SET1 0x0034 -+#define ISI_R2Y_SET0 0x0038 -+#define ISI_R2Y_SET1 0x003c -+#define ISI_R2Y_SET2 0x0040 -+ -+/* Bitfields in CR1 */ -+#define ISI_RST_OFFSET 0 -+#define ISI_RST_SIZE 1 -+#define ISI_DIS_OFFSET 1 -+#define ISI_DIS_SIZE 1 -+#define ISI_HSYNC_POL_OFFSET 2 -+#define ISI_HSYNC_POL_SIZE 1 -+#define ISI_VSYNC_POL_OFFSET 3 -+#define ISI_VSYNC_POL_SIZE 1 -+#define ISI_PIXCLK_POL_OFFSET 4 -+#define ISI_PIXCLK_POL_SIZE 1 -+#define ISI_EMB_SYNC_OFFSET 6 -+#define ISI_EMB_SYNC_SIZE 1 -+#define ISI_CRC_SYNC_OFFSET 7 -+#define ISI_CRC_SYNC_SIZE 1 -+#define ISI_FRATE_OFFSET 8 -+#define ISI_FRATE_SIZE 3 -+#define ISI_FULL_OFFSET 12 -+#define ISI_FULL_SIZE 1 -+#define ISI_THMASK_OFFSET 13 -+#define ISI_THMASK_SIZE 2 -+#define ISI_CODEC_ON_OFFSET 15 -+#define ISI_CODEC_ON_SIZE 1 -+#define ISI_SLD_OFFSET 16 -+#define ISI_SLD_SIZE 8 -+#define ISI_SFD_OFFSET 24 -+#define ISI_SFD_SIZE 8 -+ -+/* Bitfields in CR2 */ -+#define ISI_IM_VSIZE_OFFSET 0 -+#define ISI_IM_VSIZE_SIZE 11 -+#define ISI_GS_MODE_OFFSET 11 -+#define ISI_GS_MODE_SIZE 1 -+#define ISI_RGB_MODE_OFFSET 12 -+#define ISI_RGB_MODE_SIZE 1 -+#define ISI_GRAYSCALE_OFFSET 13 -+#define ISI_GRAYSCALE_SIZE 1 -+#define ISI_RGB_SWAP_OFFSET 14 -+#define ISI_RGB_SWAP_SIZE 1 -+#define ISI_COL_SPACE_OFFSET 15 -+#define ISI_COL_SPACE_SIZE 1 -+#define ISI_IM_HSIZE_OFFSET 16 -+#define ISI_IM_HSIZE_SIZE 11 -+#define ISI_YCC_SWAP_OFFSET 28 -+#define ISI_YCC_SWAP_SIZE 2 -+#define ISI_RGB_CFG_OFFSET 30 -+#define ISI_RGB_CFG_SIZE 2 -+ -+/* Bitfields in SR */ -+#define ISI_CDC_STATUS_OFFSET 3 -+#define ISI_CDC_STATUS_SIZE 1 -+ -+/* Bitfields in SR/IER/IDR/IMR */ -+#define ISI_SOF_OFFSET 0 -+#define ISI_SOF_SIZE 1 -+#define ISI_SOFTRST_OFFSET 2 -+#define ISI_SOFTRST_SIZE 1 -+#define ISI_CRC_ERR_OFFSET 4 -+#define ISI_CRC_ERR_SIZE 1 -+#define ISI_FO_C_OVF_OFFSET 5 -+#define ISI_FO_C_OVF_SIZE 1 -+#define ISI_FO_P_OVF_OFFSET 6 -+#define ISI_FO_P_OVF_SIZE 1 -+#define ISI_FO_P_EMP_OFFSET 7 -+#define ISI_FO_P_EMP_SIZE 1 -+#define ISI_FO_C_EMP_OFFSET 8 -+#define ISI_FO_C_EMP_SIZE 1 -+#define ISI_FR_OVR_OFFSET 9 -+#define ISI_FR_OVR_SIZE 1 -+ -+/* Bitfields in PSIZE */ -+#define ISI_PREV_VSIZE_OFFSET 0 -+#define ISI_PREV_VSIZE_SIZE 10 -+#define ISI_PREV_HSIZE_OFFSET 16 -+#define ISI_PREV_HSIZE_SIZE 10 -+ -+/* Bitfields in PCDEF */ -+#define ISI_DEC_FACTOR_OFFSET 0 -+#define ISI_DEC_FACTOR_SIZE 8 -+ -+/* Bitfields in PPFBD */ -+#define ISI_PREV_FBD_ADDR_OFFSET 0 -+#define ISI_PREV_FBD_ADDR_SIZE 32 -+ -+/* Bitfields in CDBA */ -+#define ISI_CODEC_DMA_ADDR_OFFSET 0 -+#define ISI_CODEC_DMA_ADDR_SIZE 32 -+ -+/* Bitfields in Y2R_SET0 */ -+#define ISI_Y2R_SET0_C3_OFFSET 24 -+#define ISI_Y2R_SET0_C3_SIZE 8 -+ -+/* Bitfields in Y2R_SET1 */ -+#define ISI_Y2R_SET1_C4_OFFSET 0 -+#define ISI_Y2R_SET1_C4_SIZE 9 -+#define ISI_YOFF_OFFSET 12 -+#define ISI_YOFF_SIZE 1 -+#define ISI_CROFF_OFFSET 13 -+#define ISI_CROFF_SIZE 1 -+#define ISI_CBOFF_OFFSET 14 -+#define ISI_CBOFF_SIZE 1 -+ -+/* Bitfields in R2Y_SET0 */ -+#define ISI_C0_OFFSET 0 -+#define ISI_C0_SIZE 8 -+#define ISI_C1_OFFSET 8 -+#define ISI_C1_SIZE 8 -+#define ISI_C2_OFFSET 16 -+#define ISI_C2_SIZE 8 -+#define ISI_ROFF_OFFSET 24 -+#define ISI_ROFF_SIZE 1 -+ -+/* Bitfields in R2Y_SET1 */ -+#define ISI_R2Y_SET1_C3_OFFSET 0 -+#define ISI_R2Y_SET1_C3_SIZE 8 -+#define ISI_R2Y_SET1_C4_OFFSET 8 -+#define ISI_R2Y_SET1_C4_SIZE 8 -+#define ISI_C5_OFFSET 16 -+#define ISI_C5_SIZE 8 -+#define ISI_GOFF_OFFSET 24 -+#define ISI_GOFF_SIZE 1 -+ -+/* Bitfields in R2Y_SET2 */ -+#define ISI_C6_OFFSET 0 -+#define ISI_C6_SIZE 8 -+#define ISI_C7_OFFSET 8 -+#define ISI_C7_SIZE 8 -+#define ISI_C8_OFFSET 16 -+#define ISI_C8_SIZE 8 -+#define ISI_BOFF_OFFSET 24 -+#define ISI_BOFF_SIZE 1 -+ -+/* Constants for FRATE */ -+#define ISI_FRATE_CAPTURE_ALL 0 -+ -+/* Constants for YCC_SWAP */ -+#define ISI_YCC_SWAP_DEFAULT 0 -+#define ISI_YCC_SWAP_MODE_1 1 -+#define ISI_YCC_SWAP_MODE_2 2 -+#define ISI_YCC_SWAP_MODE_3 3 -+ -+/* Constants for RGB_CFG */ -+#define ISI_RGB_CFG_DEFAULT 0 -+#define ISI_RGB_CFG_MODE_1 1 -+#define ISI_RGB_CFG_MODE_2 2 -+#define ISI_RGB_CFG_MODE_3 3 -+ -+/* Bit manipulation macros */ -+#define ISI_BIT(name) \ -+ (1 << ISI_##name##_OFFSET) -+#define ISI_BF(name,value) \ -+ (((value) & ((1 << ISI_##name##_SIZE) - 1)) \ -+ << ISI_##name##_OFFSET) -+#define ISI_BFEXT(name,value) \ -+ (((value) >> ISI_##name##_OFFSET) \ -+ & ((1 << ISI_##name##_SIZE) - 1)) -+#define ISI_BFINS(name,value,old) \ -+ (((old) & ~(((1 << ISI_##name##_SIZE) - 1) \ -+ << ISI_##name##_OFFSET))\ -+ | ISI_BF(name,value)) -+ -+/* Register access macros */ -+#define isi_readl(port,reg) \ -+ __raw_readl((port)->regs + ISI_##reg) -+#define isi_writel(port,reg,value) \ -+ __raw_writel((value), (port)->regs + ISI_##reg) -+ -+#define ATMEL_V4L2_VID_FLAGS ( V4L2_CAP_VIDEO_OUTPUT ) -+ -+struct atmel_isi; -+ -+enum atmel_isi_pixfmt { -+ ATMEL_ISI_PIXFMT_GREY, /* Greyscale */ -+ ATMEL_ISI_PIXFMT_CbYCrY, -+ ATMEL_ISI_PIXFMT_CrYCbY, -+ ATMEL_ISI_PIXFMT_YCbYCr, -+ ATMEL_ISI_PIXFMT_YCrYCb, -+ ATMEL_ISI_PIXFMT_RGB24, -+ ATMEL_ISI_PIXFMT_BGR24, -+ ATMEL_ISI_PIXFMT_RGB16, -+ ATMEL_ISI_PIXFMT_BGR16, -+ ATMEL_ISI_PIXFMT_GRB16, /* G[2:0] R[4:0]/B[4:0] G[5:3] */ -+ ATMEL_ISI_PIXFMT_GBR16, /* G[2:0] B[4:0]/R[4:0] G[5:3] */ -+ ATMEL_ISI_PIXFMT_RGB24_REV, -+ ATMEL_ISI_PIXFMT_BGR24_REV, -+ ATMEL_ISI_PIXFMT_RGB16_REV, -+ ATMEL_ISI_PIXFMT_BGR16_REV, -+ ATMEL_ISI_PIXFMT_GRB16_REV, /* G[2:0] R[4:0]/B[4:0] G[5:3] */ -+ ATMEL_ISI_PIXFMT_GBR16_REV, /* G[2:0] B[4:0]/R[4:0] G[5:3] */ -+}; -+ -+struct atmel_isi_format { -+ struct v4l2_pix_format pix; -+ enum atmel_isi_pixfmt input_format; -+}; -+ -+struct atmel_isi_camera { -+ const char *name; -+ struct module *owner; -+ struct list_head list; -+ unsigned int hsync_act_low:1; -+ unsigned int vsync_act_low:1; -+ unsigned int pclk_act_falling:1; -+ unsigned int has_emb_sync:1; -+ /* ISI supports up to 17 formats */ -+ unsigned int pixelformats[17]; -+ int (*get_format)(struct atmel_isi_camera *cam, -+ struct atmel_isi_format *fmt); -+ int (*set_format)(struct atmel_isi_camera *cam, -+ struct atmel_isi_format *fmt); -+ int (*start_capture)(struct atmel_isi_camera *cam); -+ int (*stop_capture)(struct atmel_isi_camera *cam); -+ struct atmel_isi *isi; -+}; -+ -+extern int atmel_isi_register_camera(struct atmel_isi_camera *cam); -+extern void atmel_isi_unregister_camera(struct atmel_isi_camera *cam); -+ -+ -+#endif /* __ASM_AVR32_ISI_H__ */ -+ -diff --git a/drivers/media/video/Kconfig b/drivers/media/video/Kconfig -index 7558484..a8cdf42 100644 ---- a/drivers/media/video/Kconfig -+++ b/drivers/media/video/Kconfig -@@ -13,6 +13,20 @@ menuconfig VIDEO_CAPTURE_DRIVERS - - if VIDEO_CAPTURE_DRIVERS && VIDEO_DEV - -+config VIDEO_AVR32_ISI -+ tristate "AVR32 video support" -+ depends on VIDEO_DEV -+ ---help--- -+ This module makes the AVR32 Image Sensor Interface available -+ -+config VIDEO_MT9M112 -+ tristate "Micron MT9M112 camera" -+ default n -+ depends on VIDEO_AVR32_ISI && I2C -+ ---help--- -+ This will add support for the Micron MT9M112 camera. -+ as a v4l2 device. -+ - config VIDEO_ADV_DEBUG - bool "Enable advanced debug functionality" - default n -diff --git a/drivers/media/video/Makefile b/drivers/media/video/Makefile -index 78e38d0..3156969 100644 ---- a/drivers/media/video/Makefile -+++ b/drivers/media/video/Makefile -@@ -77,7 +77,8 @@ obj-$(CONFIG_VIDEO_HEXIUM_ORION) += hexium_orion.o - obj-$(CONFIG_VIDEO_HEXIUM_GEMINI) += hexium_gemini.o - obj-$(CONFIG_VIDEO_DPC) += dpc7146.o - obj-$(CONFIG_TUNER_3036) += tuner-3036.o - obj-$(CONFIG_VIDEO_AVR32_ISI) += atmel-isi.o -+obj-$(CONFIG_VIDEO_MT9M112) += tm13m3.o - - obj-$(CONFIG_VIDEO_TUNER) += tuner.o - obj-$(CONFIG_VIDEO_BUF) += video-buf.o -diff --git a/drivers/media/video/tm13m3.c b/drivers/media/video/tm13m3.c -new file mode 100644 -index 0000000..42f0fd3 ---- /dev/null -+++ b/drivers/media/video/tm13m3.c -@@ -0,0 +1,631 @@ -+/* -+ * Micron Mt9M112 camera driver. -+ * -+ * Copyright (C) 2005-2007 Atmel Corporation -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 as -+ * published by the Free Software Foundation. -+ */ -+//#define DEBUG -+ -+#include <linux/clk.h> -+#include <linux/module.h> -+#include <linux/init.h> -+#include <linux/interrupt.h> -+#include <linux/io.h> -+#include <linux/device.h> -+#include <linux/list.h> -+#include <linux/delay.h> -+#include <linux/i2c.h> -+ -+#include <linux/err.h> -+#include <asm/gpio.h> -+#include <asm/arch/board.h> -+#include <asm/arch/at32ap700x.h> -+ -+#include "atmel-isi.h" -+ -+/* camera standby pin */ -+#define CAM_STANDBY GPIO_PIN_PA(9) -+/* camera reset pin */ -+#define CAM_RESET GPIO_PIN_PA(8) -+ -+/*! Maximum number of pixels in a row */ -+#define TM13M3_MAX_WIDTH 1280 -+/*! Maximum number of rows */ -+#define TM13M3_MAX_HEIGHT 1024 -+ -+/*! Clock for image sensor CLKIN signal */ -+static char mclk_name[32] = "gclk0"; -+/*! Parent clock of gclk0 -+ * Either osc0 or pll0 -+ * We use osc0 with 20MHz quarz. -+ */ -+static char mclk_parent_name[32] = "osc0"; -+ -+static struct clk *mclk; -+static struct clk *mclk_parent; -+module_param_string(mclk, mclk_name, sizeof(mclk_name), 0644); -+MODULE_PARM_DESC(mclk, "Name of the clock used as camera clock input"); -+ -+module_param_string(mclk_parent, mclk_parent_name, -+ sizeof(mclk_parent_name), 0644); -+MODULE_PARM_DESC(mclk, "Name of mclk parent clock"); -+ -+ -+/* Register adresses */ -+#define CHIP_VERSION 0x0 -+#define PROGRAM_CONTROL 0x2CC -+#define READ_MODE_CONTEXT_B 0x20 -+#define CONTEXT_CONTROL 0xC8 -+#define COLUMN_WIDTH 0x4 -+#define HORIZONTAL_OUTPUT_SIZE_B 0x1A1 -+#define VERTICAL_OUTPUT_SIZE_B 0x1A4 -+#define ROW_WIDTH 0x3 -+#define PAGE_MAP 0xF0 -+#define OUTPUT_FORMAT_CONTROL_A 0x13A -+#define HORIZONTAL_ZOOM 0x1A6 -+#define VERTICAL_ZOOM 0x1A9 -+#define PLL_CONTROL_1 0x66 -+#define PLL_CONTROL_2 0x67 -+#define CLOCK_CONTROL 0x65 -+ -+/* Chip ID stored in CHIP_VERSION register */ -+#define MT9M112_CHIP_ID 0x148C -+/* I2C address of camera module */ -+#define I2C_TM13M3 0x5D -+ -+static unsigned short normal_i2c[] = { -+ I2C_TM13M3, -+ I2C_CLIENT_END -+}; -+I2C_CLIENT_INSMOD; -+ -+#ifdef CONFIG_DEBUG_FS -+struct reg_dbg { -+ struct tm13m3 *is; -+ struct dentry *dentry; -+ unsigned int offset; -+}; -+#endif -+ -+struct tm13m3 { -+ struct mutex mutex; -+ u16 current_page; -+ u32 current_format; -+ u16 pll_avr_ctrl; -+ struct clk *mclk; -+ struct i2c_client client; -+ struct atmel_isi_camera cam; -+#ifdef CONFIG_DEBUG_FS -+ struct dentry *debugfs_root; -+ struct reg_dbg debugfs_reg[37]; -+#endif -+}; -+ -+ -+#define to_tm13m3(cam) container_of(cam, struct tm13m3, cam) -+ -+static struct i2c_driver tm13m3_driver; -+ -+static int tm13m3_write_16(struct tm13m3 *is, u16 reg, u16 value) -+{ -+ int ret = 0; -+ u16 register_page = 0; -+ -+ register_page = reg >> 8; -+ -+ if ((register_page != is->current_page) -+ && (reg != PAGE_MAP)){ -+ -+ if( 0 <= (ret = i2c_smbus_write_word_data(&is->client, PAGE_MAP, cpu_to_le16(register_page)))) -+ is->current_page = register_page; -+ } -+ -+ if(ret >= 0){ -+ ret = i2c_smbus_write_word_data(&is->client, (u8) reg, cpu_to_le16(value)); -+ } -+ return ret; -+} -+ -+static int tm13m3_read_16(struct tm13m3 *is, u16 reg) -+{ -+ int ret = 0; -+ u16 register_page = 0; -+ -+ register_page = reg >> 8; -+ -+ if ((register_page != is->current_page) -+ && (reg != PAGE_MAP)){ -+ -+ if( 0 <= (ret = i2c_smbus_write_word_data(&is->client, PAGE_MAP, cpu_to_le16(register_page)))) -+ is->current_page = register_page; -+ } -+ -+if(ret >= 0){ -+ ret = i2c_smbus_read_word_data(&is->client, (u8) reg); -+ } -+ -+ if (ret < 0) -+ return -EIO; -+ -+ return le16_to_cpu(ret); -+} -+ -+#ifdef CONFIG_DEBUG_FS -+#include <linux/debugfs.h> -+#include <linux/uaccess.h> -+ -+struct tm13m3_reg { -+ u16 address; -+ const char *name; -+}; -+ -+static struct tm13m3_reg tm13m3_registers[38] = { -+ { .address = CHIP_VERSION, .name = "chip_version"}, -+ { .address = 0x1, .name = "row_start"}, -+ { .address = 0x2, .name = "column_start"}, -+ { .address = 0x3, .name = "row_width"}, -+ { .address = 0x4, .name = "column_width"}, -+ { .address = 0x5, .name = "horizontal_blanking_b"}, -+ { .address = 0x6, .name = "vertical_blanking_b"}, -+ { .address = 0x7, .name = "horizontal_blanking_a"}, -+ { .address = 0x8, .name = "vertical_blanking_a"}, -+ { .address = 0x0D, .name = "reset"}, -+ { .address = 0x20, .name = "read_mode_context_b"}, -+ { .address = 0x21, .name = "read_mode_context_a"}, -+ { .address = 0x22, .name = "dark_col_row"}, -+ { .address = 0x65, .name = "clock_control"}, -+ { .address = 0x66, .name = "pll_control_1"}, -+ { .address = 0x67, .name = "pll_control_2"}, -+ { .address = 0xC8, .name = "context_control"}, -+ { .address = 0x106, .name = "mode_control"}, -+ { .address = 0x108, .name = "format_control"}, -+ { .address = 0x13A, .name = "output_format_control_a"}, -+ { .address = 0x148, .name = "test_pattern_generator"}, -+ { .address = 0x19B, .name = "output_format_control_b"}, -+ { .address = 0x1A1, .name = "horizontal_output_size_b"}, -+ { .address = 0x1A4, .name = "vertical_output_size_b"}, -+ { .address = 0x1A5, .name = "horizontal_pan"}, -+ { .address = 0x1A6, .name = "horizontal_zoom"}, -+ { .address = 0x1A7, .name = "horizontal_output_size_a"}, -+ { .address = 0x1A8, .name = "vertical_pan"}, -+ { .address = 0x1A9, .name = "vertical_zoom"}, -+ { .address = 0x1AA, .name = "vertical_output_size_a"}, -+ { .address = 240, .name = "page_map"}, -+ { .address = 0x2C8, .name = "global_context_control"}, -+ { .address = 0x2CB, .name = "program_advance"}, -+ { .address = 0x2CC, .name = "program_control"}, -+ { .address = 0x2D2, .name = "default_program_conf"}, -+ { .address = 0x2D3, .name = "user_global_context_control"}, -+ { .address = (0x100 | 0), .name = "module_id"}, -+ { .address = (0x200 | 2), .name = "mode_control"}, -+}; -+ -+static u64 reg_dbg_get(void *data) -+{ -+ struct reg_dbg *reg = data; -+ int ret = 0; -+ -+ mutex_lock(®->is->mutex); -+ ret = tm13m3_read_16(reg->is, tm13m3_registers[reg->offset].address); -+ mutex_unlock(®->is->mutex); -+ -+ if (ret < 0) { -+ printk("%s: failed to read reg 0x%02x: %d\n", -+ reg->is->cam.name, -+ tm13m3_registers[reg->offset].address, ret); -+ return ~0ULL; -+ } -+ return ret; -+} -+ -+static void reg_dbg_set(void *data, u64 val) -+{ -+ struct reg_dbg *reg = data; -+ int ret = 0; -+ -+ mutex_lock(®->is->mutex); -+ ret = tm13m3_write_16(reg->is, tm13m3_registers[reg->offset].address, (u16) val); -+ mutex_unlock(®->is->mutex); -+ -+ if (ret < 0){ -+ printk("%s: failed to write reg 0x%02x: %d\n", -+ reg->is->cam.name, -+ tm13m3_registers[reg->offset].address, ret); -+ } -+} -+DEFINE_SIMPLE_ATTRIBUTE(reg_dbg_fops, reg_dbg_get, reg_dbg_set, "%04llx\n"); -+ -+static void tm13m3_init_debugfs(struct tm13m3 *is) -+{ -+ struct dentry *root, *reg; -+ unsigned int i; -+ -+ root = debugfs_create_dir(is->cam.name, NULL); -+ if (IS_ERR(root) || !root) -+ goto err_root; -+ is->debugfs_root = root; -+ -+ for (i = 0; i < ARRAY_SIZE(is->debugfs_reg); i++) { -+ if (!tm13m3_registers[i].name) -+ continue; -+ -+ is->debugfs_reg[i].is = is; -+ is->debugfs_reg[i].offset = i; -+ -+ reg = debugfs_create_file(tm13m3_registers[i].name, S_IRUGO | S_IWUSR, -+ root, &is->debugfs_reg[i], -+ ®_dbg_fops); -+ if (!reg) -+ goto err_reg; -+ is->debugfs_reg[i].dentry = reg; -+ } -+ -+ return; -+ -+err_reg: -+ while (i--) -+ debugfs_remove(is->debugfs_reg[i].dentry); -+ debugfs_remove(root); -+err_root: -+ is->debugfs_root = NULL; -+ printk(KERN_ERR "%s: failed to initialize debugfs\n", -+ is->cam.name); -+} -+ -+static void tm13m3_cleanup_debugfs(struct tm13m3 *is) -+{ -+ unsigned int i; -+ -+ if (is->debugfs_root) { -+ for (i = 0; i < ARRAY_SIZE(is->debugfs_reg); i++) -+ debugfs_remove(is->debugfs_reg[i].dentry); -+ debugfs_remove(is->debugfs_root); -+ } -+} -+#else -+static inline void tm13m3_init_debugfs(struct tm13m3 *is) -+{ -+ -+} -+ -+static inline void tm13m3_cleanup_debugfs(struct tm13m3 *is) -+{ -+ -+} -+#endif /* CONFIG_DEBUG_FS */ -+ -+static int tm13m3_get_format(struct atmel_isi_camera *cam, -+ struct atmel_isi_format *fmt) -+{ -+ struct tm13m3 *is = to_tm13m3(cam); -+ int ret = 0; -+ -+ fmt->pix.colorspace = V4L2_COLORSPACE_SMPTE170M; -+ fmt->input_format = ATMEL_ISI_PIXFMT_CbYCrY; -+ fmt->input_format = is->current_format; -+ -+ fmt->pix.width = 320; -+ fmt->pix.height = 240; -+ -+ return ret; -+} -+ -+static int tm13m3_set_format(struct atmel_isi_camera *cam, -+ struct atmel_isi_format *fmt) -+{ -+ struct tm13m3 *is = to_tm13m3(cam); -+ int ret = 0; -+ -+ fmt->pix.colorspace = V4L2_COLORSPACE_SMPTE170M; -+/* -+ switch(fmt->input_format){ -+ case ATMEL_ISI_PIXFMT_CbYCrY: -+ is->current_format = ATMEL_ISI_PIXFMT_CbYCrY; -+ break; -+ case ATMEL_ISI_PIXFMT_YCbYCr: -+ is->current_format = ATMEL_ISI_PIXFMT_YCbYCr; -+ break; -+ case ATMEL_ISI_PIXFMT_CrYCbY: -+ is->current_format = ATMEL_ISI_PIXFMT_CrYCbY; -+ break; -+ case ATMEL_ISI_PIXFMT_YCrYCb: -+ is->current_format = ATMEL_ISI_PIXFMT_YCrYCb; -+ break; -+ default: -+ // force a valid format -+ fmt->input_format = ATMEL_ISI_PIXFMT_CbYCrY; -+ is->current_format = ATMEL_ISI_PIXFMT_CbYCrY; -+ pr_debug("%s: Not supported format, forcing default format\n", -+ cam->name); -+ break; -+ } -+*/ -+ fmt->input_format = ATMEL_ISI_PIXFMT_CrYCbY; -+ is->current_format = ATMEL_ISI_PIXFMT_CrYCbY; -+ -+ /* adjust picture width and height */ -+ if (fmt->pix.width > TM13M3_MAX_WIDTH) -+ fmt->pix.width = TM13M3_MAX_WIDTH; -+ if (fmt->pix.height > TM13M3_MAX_HEIGHT) -+ fmt->pix.height = TM13M3_MAX_HEIGHT; -+ -+ //tm13m3_write_16(is, COLUMN_WIDTH, fmt->pix.width); -+ //tm13m3_write_16(is, ROW_WIDTH, fmt->pix.height); -+ //tm13m3_write_16(is, HORIZONTAL_ZOOM, fmt->pix.width); -+ //tm13m3_write_16(is, VERTICAL_ZOOM, fmt->pix.height); -+ -+ //tm13m3_write_16(is, HORIZONTAL_OUTPUT_SIZE_B, fmt->pix.width); -+ //tm13m3_write_16(is, VERTICAL_OUTPUT_SIZE_B, fmt->pix.height); -+ -+ /* FIXME Set context output width needed ??*/ -+ -+ pr_debug("%s: set_format %ux%u\n", cam->name, -+ fmt->pix.width, fmt->pix.height); -+ return ret; -+} -+ -+static void tm13m3_reset_soft(struct tm13m3 *is) -+{ -+ tm13m3_write_16(is, 0x0D, 0x0001); -+ /*FIXME test if toggling is really needed */ -+ tm13m3_write_16(is, 0x0D, 0x0000); -+} -+ -+static void tm13m3_reset_hardware(struct tm13m3 *is) -+{ -+ gpio_set_value(CAM_RESET, 0); -+ //FIXME : set correct reset interval usleep(); -+ gpio_set_value(CAM_RESET, 1); -+} -+ -+static int tm13m3_start_capture(struct atmel_isi_camera *cam) -+{ -+ struct tm13m3 *is = to_tm13m3(cam); -+ int ret = 0; -+ -+ return ret; -+} -+ -+static int tm13m3_stop_capture(struct atmel_isi_camera *cam) -+{ -+ struct tm13m3 *is = to_tm13m3(cam); -+ int ret = 0; -+ -+ -+ return ret; -+} -+ -+static int tm13m3_init_hardware(struct tm13m3 *is) -+{ -+ int chip_id; -+ -+ tm13m3_reset_hardware(is); -+ /* set register page to reset value*/ -+ is->current_page = 0; -+ is->current_format = ATMEL_ISI_PIXFMT_CbYCrY; -+ -+ pr_debug("tm13m3: Init sensor\n"); -+ /* Try to identify the camera */ -+ chip_id = tm13m3_read_16(is, CHIP_VERSION); -+ if (chip_id < 0) -+ return -EIO; -+ -+ if (chip_id != MT9M112_CHIP_ID) { -+ printk(KERN_ERR "%s: Unknown chip ID 0x%04x\n", -+ is->cam.name, chip_id); -+ return -ENODEV; -+ } -+#if 0 -+ /* Configure pll for 36,8 MHz with CLKIN = 20MHz -+ * fout = fclkin * M * 1 /( 2* (N+1) * (P+1)) -+ */ -+ /* Set P = 2 */ -+ tm13m3_write_16(is, PLL_CONTROL_2, 0x0502); -+ /* M = 22, N = 1*/ -+ tm13m3_write_16(is, PLL_CONTROL_1, 0x1601); -+ /* wake up pll*/ -+ tm13m3_write_16(is, CLOCK_CONTROL, 0x8000); -+ /* wait until pll has stabilized */ -+ mdelay(1); -+ /* set pll as master clock*/ -+ tm13m3_write_16(is, CLOCK_CONTROL, 0x0000); -+ -+#endif -+ /* Set semi-auto mode program mode*/ -+ tm13m3_write_16(is, PROGRAM_CONTROL, 0x0010); -+ /* set context B read mode */ -+ tm13m3_write_16(is, READ_MODE_CONTEXT_B, 0x0100); -+ /* switch to read+resize context B */ -+ tm13m3_write_16(is, CONTEXT_CONTROL, 0x0408); -+ /* set ITU-R BT.656 codes */ -+ tm13m3_write_16(is, OUTPUT_FORMAT_CONTROL_A, 0x0A00); -+ /* set sensor image size */ -+ tm13m3_write_16(is, HORIZONTAL_ZOOM, 320); -+ tm13m3_write_16(is, VERTICAL_ZOOM, 240); -+ tm13m3_write_16(is, HORIZONTAL_OUTPUT_SIZE_B, 320); -+ tm13m3_write_16(is, VERTICAL_OUTPUT_SIZE_B, 240); -+ tm13m3_write_16(is, COLUMN_WIDTH, 320); -+ tm13m3_write_16(is, ROW_WIDTH, 240); -+ return 0; -+} -+static int tm13m3_detect_client(struct i2c_adapter *adapter, -+ int address, int kind) -+{ -+ struct i2c_client *client; -+ struct tm13m3 *is; -+ int ret; -+ -+ pr_debug("tm13m3: detecting client on address 0x%x\n", address); -+ -+ /* Check if the adapter supports the needed features */ -+ if (!i2c_check_functionality(adapter, -+ (I2C_FUNC_SMBUS_READ_BYTE_DATA -+ | I2C_FUNC_SMBUS_WRITE_BYTE_DATA -+ | I2C_FUNC_SMBUS_READ_WORD_DATA -+ | I2C_FUNC_SMBUS_WRITE_WORD_DATA))) -+ return 0; -+ -+ is = kzalloc(sizeof(struct tm13m3), GFP_KERNEL); -+ if (!is) -+ return -ENOMEM; -+ -+ client = &is->client; -+ client->addr = address; -+ client->adapter = adapter; -+ client->driver = &tm13m3_driver; -+ strcpy(client->name, "tm13m3"); -+ -+ is->cam.name = client->name; -+ is->cam.hsync_act_low = 0; -+ is->cam.vsync_act_low = 0; -+ is->cam.pclk_act_falling = 0; -+ /* no SAV/EAV sync -> HSYNC and VSYNC used */ -+ /*is->cam.has_emb_sync = 0;*/ -+ is->cam.has_emb_sync = 1; -+ -+ is->cam.get_format = tm13m3_get_format; -+ is->cam.set_format = tm13m3_set_format; -+ is->cam.start_capture = tm13m3_start_capture; -+ is->cam.stop_capture = tm13m3_stop_capture; -+ -+ mutex_init(&is->mutex); -+ -+ is->mclk = clk_get(NULL, mclk_name); -+ if (IS_ERR(is->mclk)) { -+ ret = PTR_ERR(is->mclk); -+ goto err_clk; -+ } -+ clk_enable(is->mclk); -+ -+ ret = i2c_attach_client(client); -+ if (ret) -+ goto err_attach; -+ -+ i2c_set_clientdata(client, is); -+ -+ ret = tm13m3_init_hardware(is); -+ if (ret) -+ goto err_init_hw; -+ -+ /* We're up and running. Notify the ISI driver */ -+ ret = atmel_isi_register_camera(&is->cam); -+ if (ret) -+ goto err_register; -+ -+ printk(KERN_INFO "TM13M3 Image Sensor at %s:0x%02x\n", -+ adapter->name, address); -+ -+ tm13m3_init_debugfs(is); -+ -+ return 0; -+ -+err_register: -+err_init_hw: -+// at76_reset_hardware(is); -+ i2c_detach_client(client); -+err_attach: -+ clk_disable(is->mclk); -+ clk_put(is->mclk); -+err_clk: -+ kfree(is); -+ return ret; -+} -+ -+static int tm13m3_attach_adapter(struct i2c_adapter *adapter) -+{ -+ pr_debug("tm13m3: starting probe for adapter %s (%u)\n", -+ adapter->name, adapter->id); -+ return i2c_probe(adapter, &addr_data, &tm13m3_detect_client); -+} -+ -+static int tm13m3_detach_client(struct i2c_client *client) -+{ -+ struct tm13m3 *is = i2c_get_clientdata(client); -+ int ret; -+ -+ tm13m3_cleanup_debugfs(is); -+ atmel_isi_unregister_camera(&is->cam); -+ -+ tm13m3_reset_hardware(is); -+ -+ ret = i2c_detach_client(client); -+ if (ret) -+ return ret; -+ -+ clk_disable(is->mclk); -+ clk_put(is->mclk); -+ kfree(is); -+ -+ return 0; -+} -+ -+static struct i2c_driver tm13m3_driver = { -+ .driver = { -+ .name = "tm13m3", -+ }, -+ .id = I2C_DRIVERID_TM13M3, -+ .attach_adapter = &tm13m3_attach_adapter, -+ .detach_client = &tm13m3_detach_client, -+}; -+ -+static int __init tm13m3_init(void) -+{ -+ /* -+ * Set up the master clock, if available. If clk_get() fails, -+ * this hopefully means that the board generates a suitable -+ * master clock some other way, which is fine by us. -+ * -+ * We need to do this before probing the i2c bus, as the -+ * camera won't ack any messages when it doesn't have a clock. -+ */ -+ mclk_parent = clk_get(NULL, mclk_parent_name); -+ if (!IS_ERR(mclk_parent)) -+ clk_enable(mclk_parent); -+ else { -+ mclk_parent = NULL; -+ pr_debug("tm13m3: No parent clock available\n"); -+ } -+ -+ mclk = clk_get(NULL, mclk_name); -+ if (!IS_ERR(mclk)) { -+ if (mclk_parent) -+ clk_set_parent(mclk, mclk_parent); -+ -+ clk_set_rate(mclk, 27000000); -+ clk_enable(mclk); -+ } else { -+ mclk = NULL; -+ pr_debug("tm13m3: No clock set\n"); -+ } -+ -+ gpio_direction_output(CAM_STANDBY, 0); -+ /* Reset sequence */ -+ gpio_direction_output(CAM_RESET, 0); -+ udelay(4); -+ gpio_set_value(CAM_RESET, 1); -+ -+ return i2c_add_driver(&tm13m3_driver); -+ -+} -+module_init(tm13m3_init); -+ -+static void __exit tm13m3_exit(void) -+{ -+ if (mclk) { -+ clk_disable(mclk); -+ clk_put(mclk); -+ } -+ if (mclk_parent) { -+ clk_disable(mclk_parent); -+ clk_put(mclk_parent); -+ } -+ i2c_del_driver(&tm13m3_driver); -+} -+module_exit(tm13m3_exit); -+ -+MODULE_DESCRIPTION("Atmel Image Sensor Interface Driver"); -+MODULE_AUTHOR("Lars Häring <lharing@atmel.com>"); -+MODULE_LICENSE("GPL"); ->From dc4286f6020df0bf791228cdfe7d4ea58e2f46ef Mon Sep 17 00:00:00 2001 -From: Haavard Skinnemoen <hskinnemoen@atmel.com> -Date: Wed, 17 Jan 2007 13:47:40 +0100 -Subject: [PATCH] AP7000: Add platform_device for ISI - -Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com> ---- - arch/avr32/mach-at32ap/at32ap700x.c | 47 +++++++++++++++++++++++++++++++++ - include/asm-avr32/arch-at32ap/board.h | 1 + - 2 files changed, 48 insertions(+), 0 deletions(-) - -diff --git a/arch/avr32/mach-at32ap/at32ap700x.c b/arch/avr32/mach-at32ap/at32ap700x.c -index 1130c8a..4184296 100644 ---- a/arch/avr32/mach-at32ap/at32ap700x.c -+++ b/arch/avr32/mach-at32ap/at32ap700x.c -@@ -1396,6 +1396,51 @@ at32_add_device_abdac(unsigned int id) - } - - /* -------------------------------------------------------------------- -+ * ISI -+ * -------------------------------------------------------------------- */ -+static struct resource atmel_isi0_resource[] = { -+ PBMEM(0xfff02c00), -+ IRQ(30), -+}; -+DEFINE_DEV(atmel_isi, 0); -+DEV_CLK(hclk, atmel_isi0, hsb, 5); -+DEV_CLK(pclk, atmel_isi0, pbb, 11); -+ -+struct platform_device *__init -+at32_add_device_isi(unsigned int id) -+{ -+ struct platform_device *pdev; -+ -+ switch (id) { -+ case 0: -+ pdev = &atmel_isi0_device; -+ select_peripheral(PB(0), PERIPH_A, 0); /* DATA0 */ -+ select_peripheral(PB(1), PERIPH_A, 0); /* DATA1 */ -+ select_peripheral(PB(2), PERIPH_A, 0); /* DATA2 */ -+ select_peripheral(PB(3), PERIPH_A, 0); /* DATA3 */ -+ select_peripheral(PB(4), PERIPH_A, 0); /* DATA4 */ -+ select_peripheral(PB(5), PERIPH_A, 0); /* DATA5 */ -+ select_peripheral(PB(6), PERIPH_A, 0); /* DATA6 */ -+ select_peripheral(PB(7), PERIPH_A, 0); /* DATA7 */ -+ select_peripheral(PB(11), PERIPH_B, 0); /* DATA8 */ -+ select_peripheral(PB(12), PERIPH_B, 0); /* DATA9 */ -+ select_peripheral(PB(13), PERIPH_B, 0); /* DATA10 */ -+ select_peripheral(PB(14), PERIPH_B, 0); /* DATA11 */ -+ select_peripheral(PB(8), PERIPH_A, 0); /* HSYNC */ -+ select_peripheral(PB(9), PERIPH_A, 0); /* VSYNC */ -+ select_peripheral(PB(10), PERIPH_A, 0); /* PCLK */ -+ break; -+ -+ default: -+ return NULL; -+ } -+ -+ platform_device_register(pdev); -+ -+ return pdev; -+} -+ -+/* -------------------------------------------------------------------- - * GCLK - * -------------------------------------------------------------------- */ - static struct clk gclk0 = { -@@ -1493,6 +1538,8 @@ struct clk *at32_clock_list[] = { - &gclk2, - &gclk3, - &gclk4, -+ &atmel_isi0_hclk, -+ &atmel_isi0_pclk, - }; - unsigned int at32_nr_clocks = ARRAY_SIZE(at32_clock_list); - -diff --git a/include/asm-avr32/arch-at32ap/board.h b/include/asm-avr32/arch-at32ap/board.h -index 9b36eb8..931f5af 100644 ---- a/include/asm-avr32/arch-at32ap/board.h -+++ b/include/asm-avr32/arch-at32ap/board.h -@@ -55,6 +55,7 @@ at32_add_device_lcdc(unsigned int id, struct atmel_lcdfb_info *data, - - struct platform_device *at32_add_device_ac97c(unsigned int id); - struct platform_device *at32_add_device_abdac(unsigned int id); -+struct platform_device *at32_add_device_isi(unsigned int id); - - /* depending on what's hooked up, not all SSC pins will be used */ - #define ATMEL_SSC_TK 0x01 --- -1.5.2.3 - ->From 6bac229e6999ce8e761baf97975fc5db774721fa Mon Sep 17 00:00:00 2001 -From: Haavard Skinnemoen <hskinnemoen@atmel.com> -Date: Wed, 21 Feb 2007 15:35:44 +0100 -Subject: [PATCH] NGW100: Wire up the ISI - -Since the NGW100 doesn't actually have a camera on board, this patch -merely serves as an example on how you might wire up the ISI on a -board that does have a camera. ---- - arch/avr32/boards/atngw100/setup.c | 5 +++++ - 1 files changed, 5 insertions(+), 0 deletions(-) - -diff --git a/arch/avr32/boards/atngw100/setup.c b/arch/avr32/boards/atngw100/setup.c -index d649974..6ca98bb 100644 ---- a/arch/avr32/boards/atngw100/setup.c -+++ b/arch/avr32/boards/atngw100/setup.c -@@ -178,6 +178,11 @@ static int __init atngw100_init(void) - at32_add_device_twi(0); - #endif - -+ at32_add_device_isi(0); -+ -+ /* Master clock for the camera (GCLK0) */ -+ at32_select_periph(GPIO_PIN_PA(30), GPIO_PERIPH_A, 0); -+ - return 0; - } - postcore_initcall(atngw100_init); --- -1.5.2.3 diff --git a/target/device/Atmel/arch-avr32/kernel-patches-2.6.24/linux-2.6.24-600-avr32-mmc.patch b/target/device/Atmel/arch-avr32/kernel-patches-2.6.24/linux-2.6.24-600-avr32-mmc.patch deleted file mode 100644 index a7654b5c6..000000000 --- a/target/device/Atmel/arch-avr32/kernel-patches-2.6.24/linux-2.6.24-600-avr32-mmc.patch +++ /dev/null @@ -1,255 +0,0 @@ -diff --git a/drivers/mmc/host/atmel-mci.c b/drivers/mmc/host/atmel-mci.c -index eeac479..7913cd8 100644 ---- a/drivers/mmc/host/atmel-mci.c -+++ b/drivers/mmc/host/atmel-mci.c -@@ -39,7 +39,6 @@ enum { - EVENT_STOP_COMPLETE, - EVENT_DMA_COMPLETE, - EVENT_DMA_ERROR, -- EVENT_CARD_DETECT, - }; - - struct atmel_mci_dma { -@@ -70,6 +69,9 @@ struct atmel_mci { - int detect_pin; - int wp_pin; - -+ /* For detect pin debouncing */ -+ struct timer_list detect_timer; -+ - unsigned long bus_hz; - unsigned long mapbase; - struct clk *mck; -@@ -108,8 +110,6 @@ MODULE_PARM_DESC(fmax, "Max frequency in Hz of the MMC bus clock"); - test_bit(EVENT_DMA_COMPLETE, &host->completed_events) - #define mci_dma_error_is_complete(host) \ - test_bit(EVENT_DMA_ERROR, &host->completed_events) --#define mci_card_detect_is_complete(host) \ -- test_bit(EVENT_CARD_DETECT, &host->completed_events) - - /* Test and clear bit macros for pending events */ - #define mci_clear_cmd_is_pending(host) \ -@@ -124,8 +124,6 @@ MODULE_PARM_DESC(fmax, "Max frequency in Hz of the MMC bus clock"); - test_and_clear_bit(EVENT_STOP_COMPLETE, &host->pending_events) - #define mci_clear_dma_error_is_pending(host) \ - test_and_clear_bit(EVENT_DMA_ERROR, &host->pending_events) --#define mci_clear_card_detect_is_pending(host) \ -- test_and_clear_bit(EVENT_CARD_DETECT, &host->pending_events) - - /* Test and set bit macros for completed events */ - #define mci_set_cmd_is_completed(host) \ -@@ -140,8 +138,6 @@ MODULE_PARM_DESC(fmax, "Max frequency in Hz of the MMC bus clock"); - test_and_set_bit(EVENT_STOP_COMPLETE, &host->completed_events) - #define mci_set_dma_error_is_completed(host) \ - test_and_set_bit(EVENT_DMA_ERROR, &host->completed_events) --#define mci_set_card_detect_is_completed(host) \ -- test_and_set_bit(EVENT_CARD_DETECT, &host->completed_events) - - /* Set bit macros for completed events */ - #define mci_set_cmd_complete(host) \ -@@ -158,8 +154,6 @@ MODULE_PARM_DESC(fmax, "Max frequency in Hz of the MMC bus clock"); - set_bit(EVENT_DMA_COMPLETE, &host->completed_events) - #define mci_set_dma_error_complete(host) \ - set_bit(EVENT_DMA_ERROR, &host->completed_events) --#define mci_set_card_detect_complete(host) \ -- set_bit(EVENT_CARD_DETECT, &host->completed_events) - - /* Set bit macros for pending events */ - #define mci_set_cmd_pending(host) \ -@@ -174,8 +168,6 @@ MODULE_PARM_DESC(fmax, "Max frequency in Hz of the MMC bus clock"); - set_bit(EVENT_STOP_COMPLETE, &host->pending_events) - #define mci_set_dma_error_pending(host) \ - set_bit(EVENT_DMA_ERROR, &host->pending_events) --#define mci_set_card_detect_pending(host) \ -- set_bit(EVENT_CARD_DETECT, &host->pending_events) - - /* Clear bit macros for pending events */ - #define mci_clear_cmd_pending(host) \ -@@ -190,8 +182,6 @@ MODULE_PARM_DESC(fmax, "Max frequency in Hz of the MMC bus clock"); - clear_bit(EVENT_STOP_COMPLETE, &host->pending_events) - #define mci_clear_dma_error_pending(host) \ - clear_bit(EVENT_DMA_ERROR, &host->pending_events) --#define mci_clear_card_detect_pending(host) \ -- clear_bit(EVENT_CARD_DETECT, &host->pending_events) - - - #ifdef CONFIG_DEBUG_FS -@@ -560,6 +550,21 @@ static void atmci_request(struct mmc_host *mmc, struct mmc_request *mrq) - mci_readl(host, IMR)); - - WARN_ON(host->mrq != NULL); -+ -+ /* -+ * We may "know" the card is gone even though there's still an -+ * electrical connection. If so, we really need to communicate -+ * this to the MMC core since there won't be any more -+ * interrupts as the card is completely removed. Otherwise, -+ * the MMC core might believe the card is still there even -+ * though the card was just removed very slowly. -+ */ -+ if (!host->present) { -+ mrq->cmd->error = -ENOMEDIUM; -+ mmc_request_done(mmc, mrq); -+ return; -+ } -+ - host->mrq = mrq; - host->pending_events = 0; - host->completed_events = 0; -@@ -729,6 +734,61 @@ static void atmci_command_complete(struct atmel_mci *host, - } - } - -+static void atmci_detect_change(unsigned long data) -+{ -+ struct atmel_mci *host = (struct atmel_mci *)data; -+ struct mmc_request *mrq = host->mrq; -+ int present; -+ -+ /* -+ * atmci_remove() sets detect_pin to -1 before freeing the -+ * interrupt. We must not re-enable the interrupt if it has -+ * been freed. -+ */ -+ smp_rmb(); -+ if (host->detect_pin < 0) -+ return; -+ -+ enable_irq(gpio_to_irq(host->detect_pin)); -+ present = !gpio_get_value(host->detect_pin); -+ -+ dev_vdbg(&host->pdev->dev, "detect change: %d (was %d)\n", -+ present, host->present); -+ -+ if (present != host->present) { -+ dev_dbg(&host->mmc->class_dev, "card %s\n", -+ present ? "inserted" : "removed"); -+ host->present = present; -+ -+ /* Reset controller if card is gone */ -+ if (!present) { -+ mci_writel(host, CR, MCI_BIT(SWRST)); -+ mci_writel(host, IDR, ~0UL); -+ mci_writel(host, CR, MCI_BIT(MCIEN)); -+ } -+ -+ /* Clean up queue if present */ -+ if (mrq) { -+ if (!mci_cmd_is_complete(host)) -+ mrq->cmd->error = -ENOMEDIUM; -+ if (mrq->data && !mci_data_is_complete(host) -+ && !mci_data_error_is_complete(host)) { -+ dma_stop_request(host->dma.req.req.dmac, -+ host->dma.req.req.channel); -+ host->data->error = -ENOMEDIUM; -+ atmci_data_complete(host, host->data); -+ } -+ if (mrq->stop && !mci_stop_is_complete(host)) -+ mrq->stop->error = -ENOMEDIUM; -+ -+ host->cmd = NULL; -+ atmci_request_end(host->mmc, mrq); -+ } -+ -+ mmc_detect_change(host->mmc, 0); -+ } -+} -+ - static void atmci_tasklet_func(unsigned long priv) - { - struct mmc_host *mmc = (struct mmc_host *)priv; -@@ -806,33 +866,6 @@ static void atmci_tasklet_func(unsigned long priv) - data->bytes_xfered = data->blocks * data->blksz; - atmci_data_complete(host, data); - } -- if (mci_clear_card_detect_is_pending(host)) { -- /* Reset controller if card is gone */ -- if (!host->present) { -- mci_writel(host, CR, MCI_BIT(SWRST)); -- mci_writel(host, IDR, ~0UL); -- mci_writel(host, CR, MCI_BIT(MCIEN)); -- } -- -- /* Clean up queue if present */ -- if (mrq) { -- if (!mci_cmd_is_complete(host)) -- mrq->cmd->error = -ETIMEDOUT; -- if (mrq->data && !mci_data_is_complete(host) -- && !mci_data_error_is_complete(host)) { -- dma_stop_request(host->dma.req.req.dmac, -- host->dma.req.req.channel); -- host->data->error = -ETIMEDOUT; -- atmci_data_complete(host, data); -- } -- if (mrq->stop && !mci_stop_is_complete(host)) -- mrq->stop->error = -ETIMEDOUT; -- -- host->cmd = NULL; -- atmci_request_end(mmc, mrq); -- } -- mmc_detect_change(host->mmc, msecs_to_jiffies(100)); -- } - } - - static void atmci_cmd_interrupt(struct mmc_host *mmc, u32 status) -@@ -957,20 +990,19 @@ static irqreturn_t atmci_interrupt(int irq, void *dev_id) - return IRQ_HANDLED; - } - --static irqreturn_t atmci_detect_change(int irq, void *dev_id) -+static irqreturn_t atmci_detect_interrupt(int irq, void *dev_id) - { - struct mmc_host *mmc = dev_id; - struct atmel_mci *host = mmc_priv(mmc); - -- int present = !gpio_get_value(irq_to_gpio(irq)); -+ /* -+ * Disable interrupts until the pin has stabilized and check -+ * the state then. Use mod_timer() since we may be in the -+ * middle of the timer routine when this interrupt triggers. -+ */ -+ disable_irq_nosync(irq); -+ mod_timer(&host->detect_timer, jiffies + msecs_to_jiffies(20)); - -- if (present != host->present) { -- dev_dbg(&mmc->class_dev, "card %s\n", -- present ? "inserted" : "removed"); -- host->present = present; -- mci_set_card_detect_pending(host); -- tasklet_schedule(&host->tasklet); -- } - return IRQ_HANDLED; - } - -@@ -1079,8 +1111,11 @@ static int __devinit atmci_probe(struct platform_device *pdev) - mmc_add_host(mmc); - - if (host->detect_pin >= 0) { -+ setup_timer(&host->detect_timer, atmci_detect_change, -+ (unsigned long)host); -+ - ret = request_irq(gpio_to_irq(host->detect_pin), -- atmci_detect_change, -+ atmci_detect_interrupt, - IRQF_TRIGGER_FALLING | IRQF_TRIGGER_RISING, - DRIVER_NAME, mmc); - if (ret) { -@@ -1125,9 +1160,16 @@ static int __devexit atmci_remove(struct platform_device *pdev) - atmci_cleanup_debugfs(host); - - if (host->detect_pin >= 0) { -- free_irq(gpio_to_irq(host->detect_pin), host->mmc); -+ int pin = host->detect_pin; -+ -+ /* Make sure our timer doesn't enable the interrupt */ -+ host->detect_pin = -1; -+ smp_wmb(); -+ -+ free_irq(gpio_to_irq(pin), host->mmc); -+ del_timer_sync(&host->detect_timer); - cancel_delayed_work(&host->mmc->detect); -- gpio_free(host->detect_pin); -+ gpio_free(pin); - } - - mmc_remove_host(host->mmc); diff --git a/target/device/Atmel/arch-avr32/kernel-patches-2.6.24/linux-2.6.24-avr32-ac97-reset.patch.cond b/target/device/Atmel/arch-avr32/kernel-patches-2.6.24/linux-2.6.24-avr32-ac97-reset.patch.cond deleted file mode 100644 index eed5f2814..000000000 --- a/target/device/Atmel/arch-avr32/kernel-patches-2.6.24/linux-2.6.24-avr32-ac97-reset.patch.cond +++ /dev/null @@ -1,289 +0,0 @@ -diff --git a/sound/avr32/ac97c.c b/sound/avr32/ac97c.c -index 0ec0b1c..3a58375 100644 ---- a/sound/avr32/ac97c.c -+++ b/sound/avr32/ac97c.c -@@ -25,6 +25,8 @@ - #include <sound/ac97_codec.h> - #include <sound/memalloc.h> - -+#include <asm/gpio.h> -+#include <asm/arch/board.h> - #include <asm/dma-controller.h> - - #include "ac97c.h" -@@ -37,6 +39,7 @@ struct atmel_ac97_dma_info { - struct dma_request_cyclic req_rx; - unsigned short rx_periph_id; - unsigned short tx_periph_id; -+ unsigned short controller; - }; - - struct atmel_ac97 { -@@ -51,6 +54,7 @@ struct atmel_ac97 { - struct snd_ac97_bus *ac97_bus; - int opened; - int period; -+ int reset_pin; - u64 cur_format; - unsigned int cur_rate; - struct clk *mck; -@@ -692,6 +696,12 @@ timed_out: - - static void snd_atmel_ac97_reset(struct atmel_ac97 *chip) - { -+ if (chip->reset_pin >= 0) { -+ gpio_set_value(chip->reset_pin, 0); -+ udelay(5); -+ gpio_set_value(chip->reset_pin, 1); -+ } -+ - ac97c_writel(chip, MR, AC97C_MR_WRST); - mdelay(1); - ac97c_writel(chip, MR, AC97C_MR_ENA); -@@ -727,6 +737,7 @@ static int __devinit snd_atmel_ac97_create(struct snd_card *card, - .read = snd_atmel_ac97_read, - }; - struct atmel_ac97 *chip = get_chip(card); -+ struct ac97c_platform_data *pdata; - struct resource *regs; - struct clk *mck; - int err; -@@ -735,6 +746,29 @@ static int __devinit snd_atmel_ac97_create(struct snd_card *card, - if (!regs) - return -ENXIO; - -+ pdata = pdev->dev.platform_data; -+ if (pdata) { -+ chip->reset_pin = pdata->reset_pin; -+ -+ if (chip->reset_pin >= 0) { -+ if (gpio_request(chip->reset_pin, -+ chip->card->shortname)) { -+ dev_dbg(&pdev->dev, -+ "ac97: reset pin " -+ "not available\n"); -+ chip->reset_pin = -1; -+ } else { -+ gpio_direction_output(chip->reset_pin, 1); -+ } -+ } -+ -+ chip->dma.rx_periph_id = pdata->dma_rx_periph_id; -+ chip->dma.tx_periph_id = pdata->dma_tx_periph_id; -+ chip->dma.controller = pdata->dma_controller_id; -+ } else { -+ return -ENXIO; -+ } -+ - mck = clk_get(&pdev->dev, "pclk"); - if (IS_ERR(mck)) - return PTR_ERR(mck); -@@ -789,23 +823,19 @@ static int __devinit snd_atmel_ac97_probe(struct platform_device *pdev) - if (err) - goto out_free_card; - -- /* TODO: Get this information from the platform device */ -- chip->dma.req_tx.req.dmac = find_dma_controller(0); -+ chip->dma.req_tx.req.dmac = find_dma_controller(chip->dma.controller); - if (!chip->dma.req_tx.req.dmac) { - dev_dbg(&chip->pdev->dev, "DMA controller for TX missing\n"); - err = -ENODEV; - goto out_free_card; - } -- chip->dma.req_rx.req.dmac = find_dma_controller(0); -+ chip->dma.req_rx.req.dmac = find_dma_controller(chip->dma.controller); - if (!chip->dma.req_rx.req.dmac) { - dev_dbg(&chip->pdev->dev, "DMA controller for RX missing\n"); - err = -ENODEV; - goto out_free_card; - } - -- chip->dma.rx_periph_id = 3; -- chip->dma.tx_periph_id = 4; -- - ch = dma_alloc_channel(chip->dma.req_tx.req.dmac); - if (ch < 0) { - dev_dbg(&chip->pdev->dev, --- -1.5.2.5 -diff --git a/arch/avr32/mach-at32ap/at32ap700x.c b/arch/avr32/mach-at32ap/at32ap700x.c -index 06795d0..58f3841 100644 ---- a/arch/avr32/mach-at32ap/at32ap700x.c -+++ b/arch/avr32/mach-at32ap/at32ap700x.c -@@ -1552,12 +1552,15 @@ static struct clk atmel_ac97c0_pclk = { - .index = 10, - }; - --struct platform_device *__init at32_add_device_ac97c(unsigned int id) -+struct platform_device *__init -+at32_add_device_ac97c(unsigned int id, struct ac97c_platform_data *data) - { - struct platform_device *pdev; - - if (id != 0) - return NULL; -+ if (!data) -+ return NULL; - - pdev = platform_device_alloc("atmel_ac97c", id); - if (!pdev) -@@ -1567,10 +1570,17 @@ struct platform_device *__init at32_add_device_ac97c(unsigned int id) - ARRAY_SIZE(atmel_ac97c0_resource))) - goto err_add_resources; - -- select_peripheral(PB(20), PERIPH_B, 0); /* SYNC */ -- select_peripheral(PB(21), PERIPH_B, 0); /* SDO */ -- select_peripheral(PB(22), PERIPH_B, 0); /* SDI */ -- select_peripheral(PB(23), PERIPH_B, 0); /* SCLK */ -+ if (platform_device_add_data(pdev, data, -+ sizeof(struct ac97c_platform_data))) -+ goto err_add_resources; -+ -+ select_peripheral(PB(20), PERIPH_B, 0); /* SDO */ -+ select_peripheral(PB(21), PERIPH_B, 0); /* SYNC */ -+ select_peripheral(PB(22), PERIPH_B, 0); /* SCLK */ -+ select_peripheral(PB(23), PERIPH_B, 0); /* SDI */ -+ -+ if (data->reset_pin != GPIO_PIN_NONE) -+ at32_select_gpio(data->reset_pin, 0); - - atmel_ac97c0_pclk.dev = &pdev->dev; - -diff --git a/include/asm-avr32/arch-at32ap/board.h b/include/asm-avr32/arch-at32ap/board.h -index 8816b66..0386a0e 100644 ---- a/include/asm-avr32/arch-at32ap/board.h -+++ b/include/asm-avr32/arch-at32ap/board.h -@@ -76,7 +76,16 @@ struct mci_platform_data { - }; - struct platform_device * - at32_add_device_mci(unsigned int id, struct mci_platform_data *data); --struct platform_device *at32_add_device_ac97c(unsigned int id); -+ -+struct ac97c_platform_data { -+ unsigned short dma_rx_periph_id; -+ unsigned short dma_tx_periph_id; -+ unsigned short dma_controller_id; -+ int reset_pin; -+}; -+struct platform_device * -+at32_add_device_ac97c(unsigned int id, struct ac97c_platform_data *data); -+ - struct platform_device *at32_add_device_abdac(unsigned int id); - - struct cf_platform_data { --- -1.5.2.5 -diff --git a/arch/avr32/boards/atstk1000/atstk1002.c b/arch/avr32/boards/atstk1000/atstk1002.c -index 90436fa..eba6f89 100644 ---- a/arch/avr32/boards/atstk1000/atstk1002.c -+++ b/arch/avr32/boards/atstk1000/atstk1002.c -@@ -151,6 +151,15 @@ static void __init set_hw_addr(struct platform_device *pdev) - clk_put(pclk); - } - -+#ifdef CONFIG_BOARD_ATSTK100X_ENABLE_AC97 -+static struct ac97c_platform_data __initdata ac97c0_data = { -+ .dma_rx_periph_id = 3, -+ .dma_tx_periph_id = 4, -+ .dma_controller_id = 0, -+ .reset_pin = GPIO_PIN_NONE, -+}; -+#endif -+ - #ifdef CONFIG_BOARD_ATSTK1000_EXTDAC - static void __init atstk1002_setup_extdac(void) - { -@@ -253,7 +262,7 @@ static int __init atstk1002_init(void) - #endif - at32_add_device_usba(0, NULL); - #ifdef CONFIG_BOARD_ATSTK100X_ENABLE_AC97 -- at32_add_device_ac97c(0); -+ at32_add_device_ac97c(0, &ac97c0_data); - #else - at32_add_device_abdac(0); - #endif -diff --git a/arch/avr32/boards/atstk1000/atstk1003.c b/arch/avr32/boards/atstk1000/atstk1003.c -index 768d204..2564e3c 100644 ---- a/arch/avr32/boards/atstk1000/atstk1003.c -+++ b/arch/avr32/boards/atstk1000/atstk1003.c -@@ -72,6 +72,15 @@ static struct cf_platform_data __initdata cf0_data = { - .cs = 4, - }; - -+#ifdef CONFIG_BOARD_ATSTK100X_ENABLE_AC97 -+static struct ac97c_platform_data __initdata ac97c0_data = { -+ .dma_rx_periph_id = 3, -+ .dma_tx_periph_id = 4, -+ .dma_controller_id = 0, -+ .reset_pin = GPIO_PIN_NONE, -+}; -+#endif -+ - #ifdef CONFIG_BOARD_ATSTK1000_EXTDAC - static void __init atstk1003_setup_extdac(void) - { -@@ -164,7 +173,7 @@ static int __init atstk1003_init(void) - #endif - at32_add_device_usba(0, NULL); - #ifdef CONFIG_BOARD_ATSTK100X_ENABLE_AC97 -- at32_add_device_ac97c(0); -+ at32_add_device_ac97c(0, &ac97c0_data); - #else - at32_add_device_abdac(0); - #endif -diff --git a/arch/avr32/boards/atstk1000/atstk1004.c b/arch/avr32/boards/atstk1000/atstk1004.c -index 96015dd..3c25a6f 100644 ---- a/arch/avr32/boards/atstk1000/atstk1004.c -+++ b/arch/avr32/boards/atstk1000/atstk1004.c -@@ -64,6 +64,15 @@ static struct spi_board_info spi1_board_info[] __initdata = { { - } }; - #endif - -+#ifdef CONFIG_BOARD_ATSTK100X_ENABLE_AC97 -+static struct ac97c_platform_data __initdata ac97c0_data = { -+ .dma_rx_periph_id = 3, -+ .dma_tx_periph_id = 4, -+ .dma_controller_id = 0, -+ .reset_pin = GPIO_PIN_NONE, -+}; -+#endif -+ - #ifdef CONFIG_BOARD_ATSTK1000_EXTDAC - static void __init atstk1004_setup_extdac(void) - { -@@ -136,7 +145,7 @@ static int __init atstk1004_init(void) - fbmem_start, fbmem_size); - at32_add_device_usba(0, NULL); - #ifdef CONFIG_BOARD_ATSTK100X_ENABLE_AC97 -- at32_add_device_ac97c(0); -+ at32_add_device_ac97c(0, &ac97c0_data); - #else - at32_add_device_abdac(0); - #endif --- -1.5.2.5 ---- a/arch/avr32/boards/atngw100/setup.c 2008-02-26 12:27:37.000000000 -0500 -+++ b/arch/avr32/boards/atngw100/setup.c 2008-02-26 12:26:08.000000000 -0500 -@@ -201,6 +201,13 @@ static struct platform_device i2c_gpio_d - }; - #endif - -+static struct ac97c_platform_data __initdata ac97c0_data = { -+ .dma_rx_periph_id = 3, -+ .dma_tx_periph_id = 4, -+ .dma_controller_id = 0, -+ .reset_pin = GPIO_PIN_NONE, // change to whatever pin you want, i.e. GPIO_PIN_PB(18) -+}; -+ - static int __init atngw100_init(void) - { - unsigned i; -@@ -222,7 +229,7 @@ static int __init atngw100_init(void) - at32_add_device_spi(0, spi0_board_info, ARRAY_SIZE(spi0_board_info)); - at32_add_device_mci(0, &mci0_data); - at32_add_device_usba(0, NULL); -- at32_add_device_ac97c(0); -+ at32_add_device_ac97c(0, &ac97c0_data); - - for (i = 0; i < ARRAY_SIZE(ngw_leds); i++) { - at32_select_gpio(ngw_leds[i].gpio, diff --git a/target/device/Atmel/arch-avr32/kernel-patches-2.6.24/linux-2.6.24-avr32-psif-2.patch.cond b/target/device/Atmel/arch-avr32/kernel-patches-2.6.24/linux-2.6.24-avr32-psif-2.patch.cond deleted file mode 100644 index 4f9d652a5..000000000 --- a/target/device/Atmel/arch-avr32/kernel-patches-2.6.24/linux-2.6.24-avr32-psif-2.patch.cond +++ /dev/null @@ -1,671 +0,0 @@ -diff --git a/drivers/input/serio/Kconfig b/drivers/input/serio/Kconfig -index b88569e..2df47ed 100644 ---- a/drivers/input/serio/Kconfig -+++ b/drivers/input/serio/Kconfig -@@ -88,6 +88,17 @@ config SERIO_RPCKBD - To compile this driver as a module, choose M here: the - module will be called rpckbd. - -+config SERIO_AT32PSIF -+ tristate "AVR32 PSIF PS/2 keyboard and mouse controller" -+ depends on AVR32 -+ default n -+ help -+ Say Y here if you want to use the PSIF peripheral on AVR32 devices -+ and connect a PS/2 keyboard and/or mouse to it. -+ -+ To compile this driver as a module, choose M here: the module will -+ be called at32psif. -+ - config SERIO_AMBAKMI - tristate "AMBA KMI keyboard controller" - depends on ARM_AMBA -diff --git a/drivers/input/serio/Makefile b/drivers/input/serio/Makefile -index 4155197..38b8868 100644 ---- a/drivers/input/serio/Makefile -+++ b/drivers/input/serio/Makefile -@@ -12,6 +12,7 @@ obj-$(CONFIG_SERIO_CT82C710) += ct82c710.o - obj-$(CONFIG_SERIO_RPCKBD) += rpckbd.o - obj-$(CONFIG_SERIO_SA1111) += sa1111ps2.o - obj-$(CONFIG_SERIO_AMBAKMI) += ambakmi.o -+obj-$(CONFIG_SERIO_AT32PSIF) += at32psif.o - obj-$(CONFIG_SERIO_Q40KBD) += q40kbd.o - obj-$(CONFIG_SERIO_GSCPS2) += gscps2.o - obj-$(CONFIG_HP_SDC) += hp_sdc.o -diff --git a/drivers/input/serio/at32psif.c b/drivers/input/serio/at32psif.c -new file mode 100644 -index 0000000..228ab15 ---- /dev/null -+++ b/drivers/input/serio/at32psif.c -@@ -0,0 +1,342 @@ -+/* -+ * Copyright (C) 2007 Atmel Corporation -+ * -+ * Driver for the AT32AP700X PS/2 controller (PSIF). -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 as published -+ * by the Free Software Foundation. -+ */ -+ -+#include <linux/kernel.h> -+#include <linux/module.h> -+#include <linux/device.h> -+#include <linux/init.h> -+#include <linux/serio.h> -+#include <linux/interrupt.h> -+#include <linux/err.h> -+#include <linux/io.h> -+#include <linux/clk.h> -+#include <linux/platform_device.h> -+#include <linux/delay.h> -+ -+#include "at32psif.h" -+ -+#define PSIF_BUF_SIZE 16 -+ -+#define ring_is_empty(_psif) (_psif->head == _psif->tail) -+#define ring_next_head(_psif) ((_psif->head + 1) & (PSIF_BUF_SIZE - 1)) -+#define ring_next_tail(_psif) ((_psif->tail + 1) & (PSIF_BUF_SIZE - 1)) -+ -+struct psif { -+ struct platform_device *pdev; -+ struct clk *pclk; -+ struct serio *io; -+ void __iomem *regs; -+ unsigned int irq; -+ unsigned int open; -+ /* Prevent concurrent writes to circular buffer. */ -+ spinlock_t lock; -+ unsigned int head; -+ unsigned int tail; -+ unsigned char buffer[PSIF_BUF_SIZE]; -+}; -+ -+static irqreturn_t psif_interrupt(int irq, void *_ptr) -+{ -+ struct psif *psif = _ptr; -+ int retval = IRQ_NONE; -+ unsigned int io_flags = 0; -+ unsigned long lock_flags; -+ unsigned long status; -+ -+ status = psif_readl(psif, SR); -+ -+ if (status & PSIF_BIT(RXRDY)) { -+ unsigned char val = (unsigned char) psif_readl(psif, RHR); -+ -+ if (status & PSIF_BIT(PARITY)) -+ io_flags |= SERIO_PARITY; -+ if (status & PSIF_BIT(OVRUN)) -+ dev_err(&psif->pdev->dev, "overrun read error\n"); -+ -+ /* TODO: why do we have to wait? Are we too fast for serio? */ -+ udelay(100); -+ -+ serio_interrupt(psif->io, val, io_flags); -+ -+ retval = IRQ_HANDLED; -+ } -+ -+ spin_lock_irqsave(&psif->lock, lock_flags); -+ -+ if (status & PSIF_BIT(TXEMPTY)) { -+ if (status & PSIF_BIT(NACK)) -+ dev_err(&psif->pdev->dev, "NACK error\n"); -+ if (ring_is_empty(psif)) { -+ psif_writel(psif, IDR, PSIF_BIT(TXEMPTY)); -+ } else { -+ psif_writel(psif, THR, psif->buffer[psif->tail]); -+ psif->tail = ring_next_tail(psif); -+ } -+ -+ retval = IRQ_HANDLED; -+ } -+ -+ spin_unlock_irqrestore(&psif->lock, lock_flags); -+ -+ return retval; -+} -+ -+static int psif_write(struct serio *io, unsigned char val) -+{ -+ struct psif *psif = io->port_data; -+ unsigned long flags; -+ unsigned int head; -+ -+ spin_lock_irqsave(&psif->lock, flags); -+ -+ /* Write directly if TX is ready. */ -+ if (psif_readl(psif, SR) & PSIF_BIT(TXEMPTY)) { -+ psif_writel(psif, THR, val); -+ } else { -+ head = ring_next_head(psif); -+ -+ if (head != psif->tail) { -+ psif->buffer[psif->head] = val; -+ psif->head = head; -+ } else { -+ dev_err(&psif->pdev->dev, "underrun write error\n"); -+ } -+ -+ /* Make sure TXEMPTY interrupt is enabled. */ -+ psif_writel(psif, IER, PSIF_BIT(TXEMPTY)); -+ } -+ -+ spin_unlock_irqrestore(&psif->lock, flags); -+ -+ return 0; -+} -+ -+static int psif_open(struct serio *io) -+{ -+ struct psif *psif = io->port_data; -+ int retval; -+ -+ retval = clk_enable(psif->pclk); -+ if (retval) -+ goto out; -+ -+ psif_writel(psif, CR, PSIF_BIT(CR_TXEN) | PSIF_BIT(CR_RXEN)); -+ psif_writel(psif, IER, PSIF_BIT(RXRDY)); -+ -+ psif->open = 1; -+out: -+ return retval; -+} -+ -+static void psif_close(struct serio *io) -+{ -+ struct psif *psif = io->port_data; -+ -+ psif->open = 0; -+ -+ psif_writel(psif, IDR, ~0UL); -+ psif_writel(psif, CR, PSIF_BIT(CR_TXDIS) | PSIF_BIT(CR_RXDIS)); -+ -+ clk_disable(psif->pclk); -+} -+ -+static void psif_set_prescaler(struct psif *psif) -+{ -+ unsigned long prscv; -+ unsigned long rate = clk_get_rate(psif->pclk); -+ -+ /* PRSCV = Pulse length (100 uS) * PSIF module frequency. */ -+ prscv = 100 * (rate / 1000000); -+ -+ if (prscv > ((1<<PSIF_PSR_PRSCV_SIZE) - 1)) { -+ prscv = (1<<PSIF_PSR_PRSCV_SIZE) - 1; -+ dev_dbg(&psif->pdev->dev, "pclk too fast, " -+ "prescaler set to max\n"); -+ } -+ -+ clk_enable(psif->pclk); -+ psif_writel(psif, PSR, prscv); -+ clk_disable(psif->pclk); -+} -+ -+static int __init psif_probe(struct platform_device *pdev) -+{ -+ struct resource *regs; -+ struct psif *psif; -+ struct serio *io; -+ struct clk *pclk; -+ int irq; -+ int ret; -+ -+ psif = kzalloc(sizeof(struct psif), GFP_KERNEL); -+ if (!psif) { -+ dev_dbg(&pdev->dev, "out of memory\n"); -+ ret = -ENOMEM; -+ goto out; -+ } -+ psif->pdev = pdev; -+ -+ io = kzalloc(sizeof(struct serio), GFP_KERNEL); -+ if (!io) { -+ dev_dbg(&pdev->dev, "out of memory\n"); -+ ret = -ENOMEM; -+ goto out_free_psif; -+ } -+ psif->io = io; -+ -+ regs = platform_get_resource(pdev, IORESOURCE_MEM, 0); -+ if (!regs) { -+ dev_dbg(&pdev->dev, "no mmio resources defined\n"); -+ ret = -ENOMEM; -+ goto out_free_io; -+ } -+ -+ psif->regs = ioremap(regs->start, regs->end - regs->start + 1); -+ if (!psif->regs) { -+ ret = -ENOMEM; -+ dev_dbg(&pdev->dev, "could not map I/O memory\n"); -+ goto out_free_io; -+ } -+ -+ pclk = clk_get(&pdev->dev, "pclk"); -+ if (IS_ERR(pclk)) { -+ dev_dbg(&pdev->dev, "could not get peripheral clock\n"); -+ ret = PTR_ERR(pclk); -+ goto out_iounmap; -+ } -+ psif->pclk = pclk; -+ -+ /* Reset the PSIF to enter at a known state. */ -+ ret = clk_enable(pclk); -+ if (ret) { -+ dev_dbg(&pdev->dev, "could not enable pclk\n"); -+ goto out_put_clk; -+ } -+ psif_writel(psif, CR, PSIF_BIT(CR_SWRST)); -+ clk_disable(pclk); -+ -+ irq = platform_get_irq(pdev, 0); -+ if (irq < 0) { -+ dev_dbg(&pdev->dev, "could not get irq\n"); -+ ret = -ENXIO; -+ goto out_put_clk; -+ } -+ ret = request_irq(irq, psif_interrupt, IRQF_SHARED, "at32psif", psif); -+ if (ret) { -+ dev_dbg(&pdev->dev, "could not request irq %d\n", irq); -+ goto out_put_clk; -+ } -+ psif->irq = irq; -+ -+ io->id.type = SERIO_8042; -+ io->write = psif_write; -+ io->open = psif_open; -+ io->close = psif_close; -+ strlcpy(io->name, pdev->dev.bus_id, sizeof(io->name)); -+ strlcpy(io->phys, pdev->dev.bus_id, sizeof(io->phys)); -+ io->port_data = psif; -+ io->dev.parent = &pdev->dev; -+ -+ psif_set_prescaler(psif); -+ -+ spin_lock_init(&psif->lock); -+ serio_register_port(psif->io); -+ platform_set_drvdata(pdev, psif); -+ -+ dev_info(&pdev->dev, "Atmel AVR32 PSIF PS/2 driver on 0x%08x irq %d\n", -+ (int)psif->regs, psif->irq); -+ -+ return 0; -+ -+out_put_clk: -+ clk_put(psif->pclk); -+out_iounmap: -+ iounmap(psif->regs); -+out_free_io: -+ kfree(io); -+out_free_psif: -+ kfree(psif); -+out: -+ return ret; -+} -+ -+static int __exit psif_remove(struct platform_device *pdev) -+{ -+ struct psif *psif = platform_get_drvdata(pdev); -+ -+ psif_writel(psif, IDR, ~0UL); -+ psif_writel(psif, CR, PSIF_BIT(CR_TXDIS) | PSIF_BIT(CR_RXDIS)); -+ -+ serio_unregister_port(psif->io); -+ iounmap(psif->regs); -+ free_irq(psif->irq, psif); -+ clk_put(psif->pclk); -+ kfree(psif); -+ -+ platform_set_drvdata(pdev, NULL); -+ -+ return 0; -+} -+ -+#ifdef CONFIG_PM -+static int psif_suspend(struct platform_device *pdev, pm_message_t state) -+{ -+ struct psif *psif = platform_get_drvdata(pdev); -+ -+ if (psif->open) { -+ psif_writel(psif, CR, PSIF_BIT(CR_RXDIS) | PSIF_BIT(CR_TXDIS)); -+ clk_disable(psif->pclk); -+ } -+ -+ return 0; -+} -+ -+static int psif_resume(struct platform_device *pdev) -+{ -+ struct psif *psif = platform_get_drvdata(pdev); -+ -+ if (psif->open) { -+ clk_enable(psif->pclk); -+ psif_set_prescaler(psif); -+ psif_writel(psif, CR, PSIF_BIT(CR_RXEN) | PSIF_BIT(CR_TXEN)); -+ } -+ -+ return 0; -+} -+#else -+#define psif_suspend NULL -+#define psif_resume NULL -+#endif -+ -+static struct platform_driver psif_driver = { -+ .remove = __exit_p(psif_remove), -+ .driver = { -+ .name = "atmel_psif", -+ }, -+ .suspend = psif_suspend, -+ .resume = psif_resume, -+}; -+ -+static int __init psif_init(void) -+{ -+ return platform_driver_probe(&psif_driver, psif_probe); -+} -+ -+static void __exit psif_exit(void) -+{ -+ platform_driver_unregister(&psif_driver); -+} -+ -+module_init(psif_init); -+module_exit(psif_exit); -+ -+MODULE_AUTHOR("Hans-Christian Egtvedt <hcegtvedt@atmel.com>"); -+MODULE_DESCRIPTION("Atmel AVR32 PSIF PS/2 driver"); -+MODULE_LICENSE("GPL"); -diff --git a/drivers/input/serio/at32psif.h b/drivers/input/serio/at32psif.h -new file mode 100644 -index 0000000..b0cc5e4 ---- /dev/null -+++ b/drivers/input/serio/at32psif.h -@@ -0,0 +1,82 @@ -+/* -+ * Copyright (C) 2007 Atmel Corporation -+ * -+ * Driver for the AT32AP700X PS/2 controller (PSIF). -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 as published -+ * by the Free Software Foundation. -+ */ -+ -+#ifndef _AT32PSIF_H -+#define _AT32PSIF_H -+ -+/* PSIF register offsets */ -+#define PSIF_CR 0x00 -+#define PSIF_RHR 0x04 -+#define PSIF_THR 0x08 -+#define PSIF_SR 0x10 -+#define PSIF_IER 0x14 -+#define PSIF_IDR 0x18 -+#define PSIF_IMR 0x1c -+#define PSIF_PSR 0x20 -+ -+/* Bitfields in control register. */ -+#define PSIF_CR_RXDIS_OFFSET 1 -+#define PSIF_CR_RXDIS_SIZE 1 -+#define PSIF_CR_RXEN_OFFSET 0 -+#define PSIF_CR_RXEN_SIZE 1 -+#define PSIF_CR_SWRST_OFFSET 15 -+#define PSIF_CR_SWRST_SIZE 1 -+#define PSIF_CR_TXDIS_OFFSET 9 -+#define PSIF_CR_TXDIS_SIZE 1 -+#define PSIF_CR_TXEN_OFFSET 8 -+#define PSIF_CR_TXEN_SIZE 1 -+ -+/* Bitfields in interrupt disable, enable, mask and status register. */ -+#define PSIF_NACK_OFFSET 8 -+#define PSIF_NACK_SIZE 1 -+#define PSIF_OVRUN_OFFSET 5 -+#define PSIF_OVRUN_SIZE 1 -+#define PSIF_PARITY_OFFSET 9 -+#define PSIF_PARITY_SIZE 1 -+#define PSIF_RXRDY_OFFSET 4 -+#define PSIF_RXRDY_SIZE 1 -+#define PSIF_TXEMPTY_OFFSET 1 -+#define PSIF_TXEMPTY_SIZE 1 -+#define PSIF_TXRDY_OFFSET 0 -+#define PSIF_TXRDY_SIZE 1 -+ -+/* Bitfields in prescale register. */ -+#define PSIF_PSR_PRSCV_OFFSET 0 -+#define PSIF_PSR_PRSCV_SIZE 13 -+ -+/* Bitfields in receive hold register. */ -+#define PSIF_RHR_RXDATA_OFFSET 0 -+#define PSIF_RHR_RXDATA_SIZE 8 -+ -+/* Bitfields in transmit hold register. */ -+#define PSIF_THR_TXDATA_OFFSET 0 -+#define PSIF_THR_TXDATA_SIZE 8 -+ -+/* Bit manipulation macros */ -+#define PSIF_BIT(name) \ -+ (1 << PSIF_##name##_OFFSET) -+#define PSIF_BF(name, value) \ -+ (((value) & ((1 << PSIF_##name##_SIZE) - 1)) \ -+ << PSIF_##name##_OFFSET) -+#define PSIF_BFEXT(name, value)\ -+ (((value) >> PSIF_##name##_OFFSET) \ -+ & ((1 << PSIF_##name##_SIZE) - 1)) -+#define PSIF_BFINS(name, value, old) \ -+ (((old) & ~(((1 << PSIF_##name##_SIZE) - 1) \ -+ << PSIF_##name##_OFFSET)) \ -+ | PSIF_BF(name, value)) -+ -+/* Register access macros */ -+#define psif_readl(port, reg) \ -+ __raw_readl((port)->regs + PSIF_##reg) -+#define psif_writel(port, reg, value) \ -+ __raw_writel((value), (port)->regs + PSIF_##reg) -+ -+#endif /* _AT32PSIF_H */ -diff --git a/arch/avr32/boards/atstk1000/Kconfig b/arch/avr32/boards/atstk1000/Kconfig -index 56a8d8e..e125205 100644 ---- a/arch/avr32/boards/atstk1000/Kconfig -+++ b/arch/avr32/boards/atstk1000/Kconfig -@@ -145,4 +145,17 @@ config BOARD_ATSTK1000_CF_DETECT_PIN - - The default is 0x3e, which is pin 30 on PIOB, aka GPIO15. - -+config BOARD_ATSTK100X_ENABLE_PSIF -+ bool "Enable PSIF peripheral (PS/2 support)" -+ default n -+ help -+ Select this if you want to use the PSIF peripheral to hook up PS/2 -+ devices to your STK1000. This will require a hardware modification to -+ work correctly, since PS/2 devices require 5 volt power and signals, -+ while the STK1000 only provides 3.3 volt. -+ -+ Say N if you have not modified the hardware to boost the voltage, say -+ Y if you have level convertion hardware or a PS/2 device capable of -+ operating on 3.3 volt. -+ - endif # stk 1000 -diff --git a/arch/avr32/boards/atstk1000/atstk1002.c b/arch/avr32/boards/atstk1000/atstk1002.c -index f19f54d..2ba37d5 100644 ---- a/arch/avr32/boards/atstk1000/atstk1002.c -+++ b/arch/avr32/boards/atstk1000/atstk1002.c -@@ -261,6 +261,10 @@ static int __init atstk1002_init(void) - at32_add_device_ssc(0, ATMEL_SSC_TX); - #endif - at32_add_device_cf(0, 2, &cf0_data); -+#ifdef CONFIG_BOARD_ATSTK100X_ENABLE_PSIF -+ at32_add_device_psif(0); -+ at32_add_device_psif(1); -+#endif - - atstk1000_setup_j2_leds(); - atstk1002_setup_extdac(); -diff --git a/arch/avr32/boards/atstk1000/atstk1003.c b/arch/avr32/boards/atstk1000/atstk1003.c -index 768d204..2cc0bbc 100644 ---- a/arch/avr32/boards/atstk1000/atstk1003.c -+++ b/arch/avr32/boards/atstk1000/atstk1003.c -@@ -172,6 +172,10 @@ static int __init atstk1003_init(void) - at32_add_device_ssc(0, ATMEL_SSC_TX); - #endif - at32_add_device_cf(0, 2, &cf0_data); -+#ifdef CONFIG_BOARD_ATSTK100X_ENABLE_PSIF -+ at32_add_device_psif(0); -+ at32_add_device_psif(1); -+#endif - - atstk1000_setup_j2_leds(); - atstk1003_setup_extdac(); -diff --git a/arch/avr32/boards/atstk1000/atstk1004.c b/arch/avr32/boards/atstk1000/atstk1004.c -index 96015dd..9e8c293 100644 ---- a/arch/avr32/boards/atstk1000/atstk1004.c -+++ b/arch/avr32/boards/atstk1000/atstk1004.c -@@ -143,6 +143,10 @@ static int __init atstk1004_init(void) - #ifndef CONFIG_BOARD_ATSTK100X_SW3_CUSTOM - at32_add_device_ssc(0, ATMEL_SSC_TX); - #endif -+#ifdef CONFIG_BOARD_ATSTK100X_ENABLE_PSIF -+ at32_add_device_psif(0); -+ at32_add_device_psif(1); -+#endif - - atstk1000_setup_j2_leds(); - atstk1004_setup_extdac(); -diff --git a/arch/avr32/mach-at32ap/at32ap700x.c b/arch/avr32/mach-at32ap/at32ap700x.c -index 3300944..cfec920 100644 ---- a/arch/avr32/mach-at32ap/at32ap700x.c -+++ b/arch/avr32/mach-at32ap/at32ap700x.c -@@ -679,6 +679,81 @@ void __init at32_add_system_devices(void) - } - - /* -------------------------------------------------------------------- -+ * PSIF -+ * -------------------------------------------------------------------- */ -+static struct resource atmel_psif0_resource[] __initdata = { -+ { -+ .start = 0xffe03c00, -+ .end = 0xffe03cff, -+ .flags = IORESOURCE_MEM, -+ }, -+ IRQ(18), -+}; -+static struct clk atmel_psif0_pclk = { -+ .name = "pclk", -+ .parent = &pba_clk, -+ .mode = pba_clk_mode, -+ .get_rate = pba_clk_get_rate, -+ .index = 15, -+}; -+ -+static struct resource atmel_psif1_resource[] __initdata = { -+ { -+ .start = 0xffe03d00, -+ .end = 0xffe03dff, -+ .flags = IORESOURCE_MEM, -+ }, -+ IRQ(18), -+}; -+static struct clk atmel_psif1_pclk = { -+ .name = "pclk", -+ .parent = &pba_clk, -+ .mode = pba_clk_mode, -+ .get_rate = pba_clk_get_rate, -+ .index = 15, -+}; -+ -+struct platform_device *__init at32_add_device_psif(unsigned int id) -+{ -+ struct platform_device *pdev; -+ -+ if (!(id == 0 || id == 1)) -+ return NULL; -+ -+ pdev = platform_device_alloc("atmel_psif", id); -+ if (!pdev) -+ return NULL; -+ -+ switch (id) { -+ case 0: -+ if (platform_device_add_resources(pdev, atmel_psif0_resource, -+ ARRAY_SIZE(atmel_psif0_resource))) -+ goto err_add_resources; -+ atmel_psif0_pclk.dev = &pdev->dev; -+ select_peripheral(PA(8), PERIPH_A, 0); /* CLOCK */ -+ select_peripheral(PA(9), PERIPH_A, 0); /* DATA */ -+ break; -+ case 1: -+ if (platform_device_add_resources(pdev, atmel_psif1_resource, -+ ARRAY_SIZE(atmel_psif1_resource))) -+ goto err_add_resources; -+ atmel_psif1_pclk.dev = &pdev->dev; -+ select_peripheral(PB(11), PERIPH_A, 0); /* CLOCK */ -+ select_peripheral(PB(12), PERIPH_A, 0); /* DATA */ -+ break; -+ default: -+ return NULL; -+ } -+ -+ platform_device_add(pdev); -+ return pdev; -+ -+err_add_resources: -+ platform_device_put(pdev); -+ return NULL; -+} -+ -+/* -------------------------------------------------------------------- - * USART - * -------------------------------------------------------------------- */ - -@@ -1712,6 +1787,8 @@ struct clk *at32_clock_list[] = { - &pio3_mck, - &pio4_mck, - &at32_systc0_pclk, -+ &atmel_psif0_pclk, -+ &atmel_psif1_pclk, - &atmel_usart0_usart, - &atmel_usart1_usart, - &atmel_usart2_usart, -diff --git a/include/asm-avr32/arch-at32ap/board.h b/include/asm-avr32/arch-at32ap/board.h -index 1a6e02c..19cfec7 100644 ---- a/include/asm-avr32/arch-at32ap/board.h -+++ b/include/asm-avr32/arch-at32ap/board.h -@@ -93,4 +93,7 @@ struct platform_device * - at32_add_device_cf(unsigned int id, unsigned int extint, - struct cf_platform_data *data); - -+struct platform_device * -+at32_add_device_psif(unsigned int id); -+ - #endif /* __ASM_ARCH_BOARD_H */ -diff --git a/drivers/char/keyboard.c b/drivers/char/keyboard.c -index d95f316..20a7193 100644 ---- a/drivers/char/keyboard.c -+++ b/drivers/char/keyboard.c -@@ -1000,7 +1000,8 @@ DECLARE_TASKLET_DISABLED(keyboard_tasklet, kbd_bh, 0); - #if defined(CONFIG_X86) || defined(CONFIG_IA64) || defined(CONFIG_ALPHA) ||\ - defined(CONFIG_MIPS) || defined(CONFIG_PPC) || defined(CONFIG_SPARC) ||\ - defined(CONFIG_PARISC) || defined(CONFIG_SUPERH) ||\ -- (defined(CONFIG_ARM) && defined(CONFIG_KEYBOARD_ATKBD) && !defined(CONFIG_ARCH_RPC)) -+ (defined(CONFIG_ARM) && defined(CONFIG_KEYBOARD_ATKBD) && !defined(CONFIG_ARCH_RPC)) ||\ -+ defined(CONFIG_AVR32) - - #define HW_RAW(dev) (test_bit(EV_MSC, dev->evbit) && test_bit(MSC_RAW, dev->mscbit) &&\ - ((dev)->id.bustype == BUS_I8042) && ((dev)->id.vendor == 0x0001) && ((dev)->id.product == 0x0001)) -diff --git a/arch/avr32/boards/atngw100/setup.c b/arch/avr32/boards/atngw100/setup.c ---- a/arch/avr32/boards/atngw100/setup.c 2008-01-31 13:38:32.000000000 -0500 -+++ b/arch/avr32/boards/atngw100/setup.c 2008-01-31 13:44:09.000000000 -0500 -@@ -224,6 +224,9 @@ static int __init atngw100_init(void) - at32_add_device_usba(0, NULL); - at32_add_device_ac97c(0); - -+ at32_add_device_psif(0); -+ at32_add_device_psif(1); -+ - for (i = 0; i < ARRAY_SIZE(ngw_leds); i++) { - at32_select_gpio(ngw_leds[i].gpio, - AT32_GPIOF_OUTPUT | AT32_GPIOF_HIGH); diff --git a/target/device/Atmel/arch-avr32/kernel-patches-2.6.25.10/linux-2.6.25.10-no-localversion.patch b/target/device/Atmel/arch-avr32/kernel-patches-2.6.25.10/linux-2.6.25.10-no-localversion.patch deleted file mode 100644 index 6d36d6d6b..000000000 --- a/target/device/Atmel/arch-avr32/kernel-patches-2.6.25.10/linux-2.6.25.10-no-localversion.patch +++ /dev/null @@ -1,5 +0,0 @@ -diff -urN linux-2.6.25.10-0rig/localversion-atmel linux-2.6.25.10/localversion-atmel ---- linux-2.6.25.10-0rig/localversion-atmel 2008-07-10 16:57:33.000000000 +0200 -+++ linux-2.6.25.10/localversion-atmel 1970-01-01 01:00:00.000000000 +0100 -@@ -1 +0,0 @@ --.atmel.2 diff --git a/target/device/Atmel/arch-avr32/kernel-patches-2.6.25.10/linux-2.6.25.10.atmel.2.patch.bz2 b/target/device/Atmel/arch-avr32/kernel-patches-2.6.25.10/linux-2.6.25.10.atmel.2.patch.bz2 Binary files differdeleted file mode 100644 index 2e11e59b8..000000000 --- a/target/device/Atmel/arch-avr32/kernel-patches-2.6.25.10/linux-2.6.25.10.atmel.2.patch.bz2 +++ /dev/null |