From 167c1a6185ec3113f7ca8df9696f5bba139d31ae Mon Sep 17 00:00:00 2001 From: Ulf Samuelsson Date: Sun, 19 Aug 2007 22:43:50 +0000 Subject: Delete avr32 specific patch and introduced merged at91/avr32 patch --- .../linux-2.6.22.1-001-at91+avr32.patch | 24575 +++++++++++++++++++ .../linux-2.6.22.1-005-atags-support.patch | 122 + 2 files changed, 24697 insertions(+) create mode 100644 target/device/Atmel/linux/kernel-patches-2.6.22.1/linux-2.6.22.1-001-at91+avr32.patch create mode 100644 target/device/Atmel/linux/kernel-patches-2.6.22.1/linux-2.6.22.1-005-atags-support.patch (limited to 'target/device/Atmel/linux') diff --git a/target/device/Atmel/linux/kernel-patches-2.6.22.1/linux-2.6.22.1-001-at91+avr32.patch b/target/device/Atmel/linux/kernel-patches-2.6.22.1/linux-2.6.22.1-001-at91+avr32.patch new file mode 100644 index 000000000..adc8189a6 --- /dev/null +++ b/target/device/Atmel/linux/kernel-patches-2.6.22.1/linux-2.6.22.1-001-at91+avr32.patch @@ -0,0 +1,24575 @@ +Index: linux-2.6.22.1/include/asm-arm/arch-at91/at91sam9260_matrix.h +=================================================================== +--- linux-2.6.22.1/include/asm-arm/arch-at91/at91sam9260_matrix.h (revision 1) ++++ linux-2.6.22.1/include/asm-arm/arch-at91/at91sam9260_matrix.h (arbetskopia) +@@ -67,7 +67,7 @@ + #define AT91_MATRIX_CS4A (1 << 4) /* Chip Select 4 Assignment */ + #define AT91_MATRIX_CS4A_SMC (0 << 4) + #define AT91_MATRIX_CS4A_SMC_CF1 (1 << 4) +-#define AT91_MATRIX_CS5A (1 << 5 ) /* Chip Select 5 Assignment */ ++#define AT91_MATRIX_CS5A (1 << 5) /* Chip Select 5 Assignment */ + #define AT91_MATRIX_CS5A_SMC (0 << 5) + #define AT91_MATRIX_CS5A_SMC_CF2 (1 << 5) + #define AT91_MATRIX_DBPUC (1 << 8) /* Data Bus Pull-up Configuration */ +Index: linux-2.6.22.1/include/asm-arm/arch-at91/ics1523.h +=================================================================== +--- linux-2.6.22.1/include/asm-arm/arch-at91/ics1523.h (revision 0) ++++ linux-2.6.22.1/include/asm-arm/arch-at91/ics1523.h (revision 0) +@@ -0,0 +1,154 @@ ++//*---------------------------------------------------------------------------- ++//* ATMEL Microcontroller Software Support - ROUSSET - ++//*---------------------------------------------------------------------------- ++//* The software is delivered "AS IS" without warranty or condition of any ++//* kind, either express, implied or statutory. This includes without ++//* limitation any warranty or condition with respect to merchantability or ++//* fitness for any particular purpose, or against the infringements of ++//* intellectual property rights of others. ++//*---------------------------------------------------------------------------- ++//* File Name : ics1523.h ++//* Object : Clock Generator Prototyping File. ++//* ++//* 1.0 08/28/02 ED : Creation ++//* 1.2 13/01/03 FB : Update on lib V3 ++//*---------------------------------------------------------------------------- ++ ++#ifndef ics1523_h ++#define ics1523_h ++ ++/*-------------------------------------------*/ ++/* ICS1523 TWI Serial Clock Definition */ ++/*-------------------------------------------*/ ++ ++#define ICS_MIN_CLOCK 100 /* Min Frequency Access Clock KHz */ ++#define ICS_MAX_CLOCK 400 /* Max Frequency Access Clock KHz */ ++#define ICS_TRANSFER_RATE ICS_MAX_CLOCK /* Transfer speed to apply */ ++ ++#define ICS_WRITE_CLK_PNB 30 /* TWCK Clock Periods required to write */ ++#define ICS_READ_CLK_PNB 40 /* TWCK Clock Periods required to read */ ++ ++/*-------------------------------------------*/ ++/* ICS1523 Write Operation Definition */ ++/*-------------------------------------------*/ ++ ++#define ICS1523_ACCESS_OK 0 /* OK */ ++#define ICS1523_ACCESS_ERROR -1 /* NOK */ ++ ++/*-------------------------------------------*/ ++/* ICS1523 Device Addresses Definition */ ++/*-------------------------------------------*/ ++ ++#define ICS_ADDR 0x26 /* Device Address */ ++ ++/*--------------------------------------------------*/ ++/* ICS1523 Registers Internal Addresses Definition */ ++/*--------------------------------------------------*/ ++ ++#define ICS_ICR 0x0 /* Input Control Register */ ++#define ICS_LCR 0x1 /* Loop Control Register */ ++#define ICS_FD0 0x2 /* PLL FeedBack Divider LSBs */ ++#define ICS_FD1 0x3 /* PLL FeedBack Divider MSBs */ ++#define ICS_DPAO 0x4 /* Dynamic Phase Aligner Offset */ ++#define ICS_DPAC 0x5 /* Dynamic Phase Aligner Resolution */ ++#define ICS_OE 0x6 /* Output Enables Register */ ++#define ICS_OD 0x7 /* Osc Divider Register */ ++#define ICS_SWRST 0x8 /* DPA & PLL Reset Register */ ++#define ICS_VID 0x10 /* Chip Version Register */ ++#define ICS_RID 0x11 /* Chip Revision Register */ ++#define ICS_SR 0x12 /* Status Register */ ++ ++/*------------------------------------------------------*/ ++/* ICS1523 Input Control Register Bits Definition */ ++/*------------------------------------------------------*/ ++ ++#define ICS_PDEN 0x1 /* Phase Detector Enable */ ++#define ICS_PDPOL 0x2 /* Phase Detector Enable Polarity */ ++#define ICS_REFPOL 0x4 /* External Reference Polarity */ ++#define ICS_FBKPOL 0x8 /* External Feedback Polarity */ ++#define ICS_FBKSEL 0x10 /* External Feedback Select */ ++#define ICS_FUNCSEL 0x20 /* Function Out Select */ ++#define ICS_ENPLS 0x40 /* Enable PLL Lock/Ref Status Output */ ++#define ICS_ENDLS 0x80 /* Enable DPA Lock/Ref Status Output */ ++ ++/*-----------------------------------------------------*/ ++/* ICS1523 Loop Control Register Bits Definition */ ++/*-----------------------------------------------------*/ ++ ++#define ICS_PFD 0x7 /* Phase Detector Gain */ ++#define ICS_PSD 0x30 /* Post-Scaler Divider */ ++ ++/*----------------------------------------------------*/ ++/* ICS1523 PLL FeedBack Divider LSBs Definition */ ++/*----------------------------------------------------*/ ++ ++#define ICS_FBDL 0xFF /* PLL FeedBack Divider LSBs */ ++ ++/*----------------------------------------------------*/ ++/* ICS1523 PLL FeedBack Divider MSBs Definition */ ++/*----------------------------------------------------*/ ++ ++#define ICS_FBDM 0xF /* PLL FeedBack Divider MSBs */ ++ ++/*------------------------------------------------------------*/ ++/* ICS1523 Dynamic Phase Aligner Offset Bits Definition */ ++/*------------------------------------------------------------*/ ++ ++#define ICS_DPAOS 0x2F /* Dynamic Phase Aligner Offset */ ++#define ICS_FILSEL 0x80 /* Loop Filter Select */ ++ ++/*----------------------------------------------------------------*/ ++/* ICS1523 Dynamic Phase Aligner Resolution Bits Definition */ ++/*----------------------------------------------------------------*/ ++ ++#define ICS_DPARES 0x3 /* Dynamic Phase Aligner Resolution */ ++#define ICS_MMREV 0xFC /* Metal Mask Revision Number */ ++ ++/*-------------------------------------------------------*/ ++/* ICS1523 Output Enables Register Bits Definition */ ++/*-------------------------------------------------------*/ ++ ++#define ICS_OEPCK 0x1 /* Output Enable for PECL PCLK Outputs */ ++#define ICS_OETCK 0x2 /* Output Enable for STTL CLK Output */ ++#define ICS_OEP2 0x4 /* Output Enable for PECL CLK/2 Outputs */ ++#define ICS_OET2 0x8 /* Output Enable for STTL CLK/2 Output */ ++#define ICS_OEF 0x10 /* Output Enable for STTL FUNC Output */ ++#define ICS_CLK2INV 0x20 /* CLK/2 Invert */ ++#define ICS_OSCL 0xC0 /* SSTL Clock Scaler */ ++ ++/*----------------------------------------------------*/ ++/* ICS1523 Osc Divider Register Bits Definition */ ++/*----------------------------------------------------*/ ++ ++#define ICS_OSCDIV 0x7F /* Oscillator Divider Modulus */ ++#define ICS_INSEL 0x80 /* Input Select */ ++ ++/*---------------------------------------------------*/ ++/* ICS1523 DPA & PLL Reset Register Definition */ ++/*---------------------------------------------------*/ ++ ++#define ICS_DPAR 0x0A /* DPA Reset Command */ ++#define ICS_PLLR 0x50 /* PLL Reset Command */ ++ ++/*------------------------------------------------*/ ++/* ICS1523 Chip Version Register Definition */ ++/*------------------------------------------------*/ ++ ++#define ICS_CHIPV 0xFF /* Chip Version */ ++ ++/*-------------------------------------------------*/ ++/* ICS1523 Chip Revision Register Definition */ ++/*-------------------------------------------------*/ ++ ++#define ICS_CHIPR 0xFF /* Chip Revision */ ++ ++/*------------------------------------------*/ ++/* ICS1523 Status Register Definition */ ++/*------------------------------------------*/ ++ ++#define ICS_DPALOCK 0x1 /* DPA Lock Status */ ++#define ICS_PLLLOCK 0x2 /* PLL Lock Status */ ++ ++int at91_ics1523_init(void); ++ ++#endif /* ics1523_h */ +Index: linux-2.6.22.1/include/asm-arm/arch-at91/spi.h +=================================================================== +--- linux-2.6.22.1/include/asm-arm/arch-at91/spi.h (revision 0) ++++ linux-2.6.22.1/include/asm-arm/arch-at91/spi.h (revision 0) +@@ -0,0 +1,54 @@ ++/* ++ * Serial Peripheral Interface (SPI) driver for the Atmel AT91RM9200 ++ * ++ * (c) SAN People (Pty) Ltd ++ * ++ * This program is free software; you can redistribute it and/or ++ * modify it under the terms of the GNU General Public License ++ * as published by the Free Software Foundation; either version ++ * 2 of the License, or (at your option) any later version. ++ */ ++ ++#ifndef AT91_LEGACY_SPI_H ++#define AT91_LEGACY_SPI_H ++ ++#define SPI_MAJOR 153 /* registered device number */ ++ ++#define DEFAULT_SPI_CLK 6000000 ++ ++ ++/* Maximum number of buffers in a single SPI transfer. ++ * DataFlash uses maximum of 2 ++ * spidev interface supports up to 8. ++ */ ++#define MAX_SPI_TRANSFERS 8 ++#define NR_SPI_DEVICES 4 /* number of devices on SPI bus */ ++ ++/* ++ * Describes the buffers for a SPI transfer. ++ * A transmit & receive buffer must be specified for each transfer ++ */ ++struct spi_transfer_list { ++ void* tx[MAX_SPI_TRANSFERS]; /* transmit */ ++ int txlen[MAX_SPI_TRANSFERS]; ++ void* rx[MAX_SPI_TRANSFERS]; /* receive */ ++ int rxlen[MAX_SPI_TRANSFERS]; ++ int nr_transfers; /* number of transfers */ ++ int curr; /* current transfer */ ++}; ++ ++struct spi_local { ++ unsigned int pcs; /* Peripheral Chip Select value */ ++ ++ struct spi_transfer_list *xfers; /* current transfer list */ ++ dma_addr_t tx, rx; /* DMA address for current transfer */ ++ dma_addr_t txnext, rxnext; /* DMA address for next transfer */ ++}; ++ ++ ++/* Exported functions */ ++extern void spi_access_bus(short device); ++extern void spi_release_bus(short device); ++extern int spi_transfer(struct spi_transfer_list* list); ++ ++#endif +Index: linux-2.6.22.1/include/asm-arm/arch-at91/at91_mci.h +=================================================================== +--- linux-2.6.22.1/include/asm-arm/arch-at91/at91_mci.h (revision 1) ++++ linux-2.6.22.1/include/asm-arm/arch-at91/at91_mci.h (arbetskopia) +@@ -26,6 +26,9 @@ + #define AT91_MCI_MR 0x04 /* Mode Register */ + #define AT91_MCI_CLKDIV (0xff << 0) /* Clock Divider */ + #define AT91_MCI_PWSDIV (7 << 8) /* Power Saving Divider */ ++#define AT91_MCI_RDPROOF (1 << 11) /* Read Proof Enable [SAM926[03] only] */ ++#define AT91_MCI_WRPROOF (1 << 12) /* Write Proof Enable [SAM926[03] only] */ ++#define AT91_MCI_PDCFBYTE (1 << 13) /* PDC Force Byte Transfer [SAM926[03] only] */ + #define AT91_MCI_PDCPADV (1 << 14) /* PDC Padding Value */ + #define AT91_MCI_PDCMODE (1 << 15) /* PDC-orientated Mode */ + #define AT91_MCI_BLKLEN (0xfff << 18) /* Data Block Length */ +Index: linux-2.6.22.1/include/asm-arm/arch-at91/at91_pmc.h +=================================================================== +--- linux-2.6.22.1/include/asm-arm/arch-at91/at91_pmc.h (revision 1) ++++ linux-2.6.22.1/include/asm-arm/arch-at91/at91_pmc.h (arbetskopia) +@@ -37,7 +37,9 @@ + #define AT91_PMC_PCDR (AT91_PMC + 0x14) /* Peripheral Clock Disable Register */ + #define AT91_PMC_PCSR (AT91_PMC + 0x18) /* Peripheral Clock Status Register */ + +-#define AT91_CKGR_MOR (AT91_PMC + 0x20) /* Main Oscillator Register */ ++#define AT91_CKGR_UCKR (AT91_PMC + 0x1C) /* UTMI Clock Register [SAM9RL only] */ ++ ++#define AT91_CKGR_MOR (AT91_PMC + 0x20) /* Main Oscillator Register [not on SAM9RL] */ + #define AT91_PMC_MOSCEN (1 << 0) /* Main Oscillator Enable */ + #define AT91_PMC_OSCBYPASS (1 << 1) /* Oscillator Bypass [AT91SAM926x only] */ + #define AT91_PMC_OSCOUNT (0xff << 8) /* Main Oscillator Start-up Time */ +Index: linux-2.6.22.1/include/asm-arm/arch-at91/board.h +=================================================================== +--- linux-2.6.22.1/include/asm-arm/arch-at91/board.h (revision 1) ++++ linux-2.6.22.1/include/asm-arm/arch-at91/board.h (arbetskopia) +@@ -64,6 +64,7 @@ + + /* Ethernet (EMAC & MACB) */ + struct at91_eth_data { ++ u32 phy_mask; + u8 phy_irq_pin; /* PHY IRQ */ + u8 is_rmii; /* using RMII interface? */ + }; +@@ -124,9 +125,21 @@ + }; + extern void __init at91_add_device_ac97(struct atmel_ac97_data *data); + ++ /* ISI */ ++extern void __init at91_add_device_isi(void); ++ + /* LEDs */ + extern u8 at91_leds_cpu; + extern u8 at91_leds_timer; + extern void __init at91_init_leds(u8 cpu_led, u8 timer_led); + ++struct at91_gpio_led { ++ u8 index; /* index of LED */ ++ char* name; /* name of LED */ ++ u8 gpio; /* AT91_PIN_xx */ ++ u8 flags; /* 1=active-high */ ++ char* trigger; /* default trigger */ ++}; ++extern void __init at91_gpio_leds(struct at91_gpio_led *leds, int nr); ++ + #endif +Index: linux-2.6.22.1/include/linux/spi/at73c213.h +=================================================================== +--- linux-2.6.22.1/include/linux/spi/at73c213.h (revision 0) ++++ linux-2.6.22.1/include/linux/spi/at73c213.h (revision 0) +@@ -0,0 +1,25 @@ ++/* ++ * Board-specific data used to set up AT73c213 audio DAC driver. ++ */ ++ ++#ifndef __LINUX_SPI_AT73C213_H ++#define __LINUX_SPI_AT73C213_H ++ ++/** ++ * at73c213_board_info - how the external DAC is wired to the device. ++ * ++ * @ssc_id: SSC platform_driver id the DAC shall use to stream the audio. ++ * @dac_clk: the external clock used to provide master clock to the DAC. ++ * @shortname: a short discription for the DAC, seen by userspace tools. ++ * ++ * This struct contains the configuration of the hardware connection to the ++ * external DAC. The DAC needs a master clock and a I2S audio stream. It also ++ * provides a name which is used to identify it in userspace tools. ++ */ ++struct at73c213_board_info { ++ int ssc_id; ++ struct clk *dac_clk; ++ char shortname[32]; ++}; ++ ++#endif /* __LINUX_SPI_AT73C213_H */ +Index: linux-2.6.22.1/include/linux/leds.h +=================================================================== +--- linux-2.6.22.1/include/linux/leds.h (revision 1) ++++ linux-2.6.22.1/include/linux/leds.h (arbetskopia) +@@ -110,4 +110,18 @@ + #define ledtrig_ide_activity() do {} while(0) + #endif + ++/* For the leds-gpio driver */ ++struct gpio_led { ++ const char *name; ++ char *default_trigger; ++ unsigned gpio; ++ u8 active_low; ++}; ++ ++struct gpio_led_platform_data { ++ int num_leds; ++ struct gpio_led *leds; ++}; ++ ++ + #endif /* __LINUX_LEDS_H_INCLUDED */ +Index: linux-2.6.22.1/include/linux/clk.h +=================================================================== +--- linux-2.6.22.1/include/linux/clk.h (revision 1) ++++ linux-2.6.22.1/include/linux/clk.h (arbetskopia) +@@ -121,4 +121,24 @@ + */ + struct clk *clk_get_parent(struct clk *clk); + ++/** ++ * clk_must_disable - report whether a clock's users must disable it ++ * @clk: one node in the clock tree ++ * ++ * This routine returns true only if the upcoming system state requires ++ * disabling the specified clock. ++ * ++ * It's common for platform power states to constrain certain clocks (and ++ * their descendants) to be unavailable, while other states allow that ++ * clock to be active. A platform's power states often include an "all on" ++ * mode; system wide sleep states like "standby" or "suspend-to-RAM"; and ++ * operating states which sacrifice functionality for lower power usage. ++ * ++ * The constraint value is commonly tested in device driver suspend(), to ++ * leave clocks active if they are needed for features like wakeup events. ++ * On platforms that support reduced functionality operating states, the ++ * constraint may also need to be tested during resume() and probe() calls. ++ */ ++int clk_must_disable(struct clk *clk); ++ + #endif +Index: linux-2.6.22.1/include/linux/usb/Kbuild +=================================================================== +--- linux-2.6.22.1/include/linux/usb/Kbuild (revision 1) ++++ linux-2.6.22.1/include/linux/usb/Kbuild (arbetskopia) +@@ -1,5 +1,6 @@ + unifdef-y += audio.h + unifdef-y += cdc.h + unifdef-y += ch9.h ++unifdef-y += gadgetfs.h + unifdef-y += midi.h + +Index: linux-2.6.22.1/include/linux/usb/gadgetfs.h +=================================================================== +--- linux-2.6.22.1/include/linux/usb/gadgetfs.h (revision 0) ++++ linux-2.6.22.1/include/linux/usb/gadgetfs.h (revision 0) +@@ -0,0 +1,81 @@ ++#ifndef __LINUX_USB_GADGETFS_H ++#define __LINUX_USB_GADGETFS_H ++ ++#include ++#include ++ ++#include ++ ++/* ++ * Filesystem based user-mode API to USB Gadget controller hardware ++ * ++ * Other than ep0 operations, most things are done by read() and write() ++ * on endpoint files found in one directory. They are configured by ++ * writing descriptors, and then may be used for normal stream style ++ * i/o requests. When ep0 is configured, the device can enumerate; ++ * when it's closed, the device disconnects from usb. Operations on ++ * ep0 require ioctl() operations. ++ * ++ * Configuration and device descriptors get written to /dev/gadget/$CHIP, ++ * which may then be used to read usb_gadgetfs_event structs. The driver ++ * may activate endpoints as it handles SET_CONFIGURATION setup events, ++ * or earlier; writing endpoint descriptors to /dev/gadget/$ENDPOINT ++ * then performing data transfers by reading or writing. ++ */ ++ ++/* ++ * Events are delivered on the ep0 file descriptor, when the user mode driver ++ * reads from this file descriptor after writing the descriptors. Don't ++ * stop polling this descriptor. ++ */ ++ ++enum usb_gadgetfs_event_type { ++ GADGETFS_NOP = 0, ++ ++ GADGETFS_CONNECT, ++ GADGETFS_DISCONNECT, ++ GADGETFS_SETUP, ++ GADGETFS_SUSPEND, ++ // and likely more ! ++}; ++ ++/* NOTE: this structure must stay the same size and layout on ++ * both 32-bit and 64-bit kernels. ++ */ ++struct usb_gadgetfs_event { ++ union { ++ // NOP, DISCONNECT, SUSPEND: nothing ++ // ... some hardware can't report disconnection ++ ++ // CONNECT: just the speed ++ enum usb_device_speed speed; ++ ++ // SETUP: packet; DATA phase i/o precedes next event ++ // (setup.bmRequestType & USB_DIR_IN) flags direction ++ // ... includes SET_CONFIGURATION, SET_INTERFACE ++ struct usb_ctrlrequest setup; ++ } u; ++ enum usb_gadgetfs_event_type type; ++}; ++ ++ ++/* endpoint ioctls */ ++ ++/* IN transfers may be reported to the gadget driver as complete ++ * when the fifo is loaded, before the host reads the data; ++ * OUT transfers may be reported to the host's "client" driver as ++ * complete when they're sitting in the FIFO unread. ++ * THIS returns how many bytes are "unclaimed" in the endpoint fifo ++ * (needed for precise fault handling, when the hardware allows it) ++ */ ++#define GADGETFS_FIFO_STATUS _IO('g',1) ++ ++/* discards any unclaimed data in the fifo. */ ++#define GADGETFS_FIFO_FLUSH _IO('g',2) ++ ++/* resets endpoint halt+toggle; used to implement set_interface. ++ * some hardware (like pxa2xx) can't support this. ++ */ ++#define GADGETFS_CLEAR_HALT _IO('g',3) ++ ++#endif /* __LINUX_USB_GADGETFS_H */ +Index: linux-2.6.22.1/include/linux/usb_gadgetfs.h +=================================================================== +--- linux-2.6.22.1/include/linux/usb_gadgetfs.h (revision 1) ++++ linux-2.6.22.1/include/linux/usb_gadgetfs.h (arbetskopia) +@@ -1,75 +0,0 @@ +- +-#include +-#include +- +-#include +- +-/* +- * Filesystem based user-mode API to USB Gadget controller hardware +- * +- * Almost everything can be done with only read and write operations, +- * on endpoint files found in one directory. They are configured by +- * writing descriptors, and then may be used for normal stream style +- * i/o requests. When ep0 is configured, the device can enumerate; +- * when it's closed, the device disconnects from usb. +- * +- * Configuration and device descriptors get written to /dev/gadget/$CHIP, +- * which may then be used to read usb_gadgetfs_event structs. The driver +- * may activate endpoints as it handles SET_CONFIGURATION setup events, +- * or earlier; writing endpoint descriptors to /dev/gadget/$ENDPOINT +- * then performing data transfers by reading or writing. +- */ +- +-/* +- * Events are delivered on the ep0 file descriptor, if the user mode driver +- * reads from this file descriptor after writing the descriptors. Don't +- * stop polling this descriptor, if you write that kind of driver. +- */ +- +-enum usb_gadgetfs_event_type { +- GADGETFS_NOP = 0, +- +- GADGETFS_CONNECT, +- GADGETFS_DISCONNECT, +- GADGETFS_SETUP, +- GADGETFS_SUSPEND, +- // and likely more ! +-}; +- +-struct usb_gadgetfs_event { +- enum usb_gadgetfs_event_type type; +- union { +- // NOP, DISCONNECT, SUSPEND: nothing +- // ... some hardware can't report disconnection +- +- // CONNECT: just the speed +- enum usb_device_speed speed; +- +- // SETUP: packet; DATA phase i/o precedes next event +- // (setup.bmRequestType & USB_DIR_IN) flags direction +- // ... includes SET_CONFIGURATION, SET_INTERFACE +- struct usb_ctrlrequest setup; +- } u; +-}; +- +- +-/* endpoint ioctls */ +- +-/* IN transfers may be reported to the gadget driver as complete +- * when the fifo is loaded, before the host reads the data; +- * OUT transfers may be reported to the host's "client" driver as +- * complete when they're sitting in the FIFO unread. +- * THIS returns how many bytes are "unclaimed" in the endpoint fifo +- * (needed for precise fault handling, when the hardware allows it) +- */ +-#define GADGETFS_FIFO_STATUS _IO('g',1) +- +-/* discards any unclaimed data in the fifo. */ +-#define GADGETFS_FIFO_FLUSH _IO('g',2) +- +-/* resets endpoint halt+toggle; used to implement set_interface. +- * some hardware (like pxa2xx) can't support this. +- */ +-#define GADGETFS_CLEAR_HALT _IO('g',3) +- +- +Index: linux-2.6.22.1/include/linux/atmel-ssc.h +=================================================================== +--- linux-2.6.22.1/include/linux/atmel-ssc.h (revision 0) ++++ linux-2.6.22.1/include/linux/atmel-ssc.h (revision 0) +@@ -0,0 +1,312 @@ ++#ifndef __INCLUDE_ATMEL_SSC_H ++#define __INCLUDE_ATMEL_SSC_H ++ ++#include ++#include ++ ++struct ssc_device { ++ struct list_head list; ++ void __iomem *regs; ++ struct platform_device *pdev; ++ struct clk *clk; ++ int user; ++ int irq; ++}; ++ ++struct ssc_device * __must_check ssc_request(unsigned int ssc_num); ++void ssc_free(struct ssc_device *ssc); ++ ++/* SSC register offsets */ ++ ++/* SSC Control Register */ ++#define SSC_CR 0x00000000 ++#define SSC_CR_RXDIS_SIZE 1 ++#define SSC_CR_RXDIS_OFFSET 1 ++#define SSC_CR_RXEN_SIZE 1 ++#define SSC_CR_RXEN_OFFSET 0 ++#define SSC_CR_SWRST_SIZE 1 ++#define SSC_CR_SWRST_OFFSET 15 ++#define SSC_CR_TXDIS_SIZE 1 ++#define SSC_CR_TXDIS_OFFSET 9 ++#define SSC_CR_TXEN_SIZE 1 ++#define SSC_CR_TXEN_OFFSET 8 ++ ++/* SSC Clock Mode Register */ ++#define SSC_CMR 0x00000004 ++#define SSC_CMR_DIV_SIZE 12 ++#define SSC_CMR_DIV_OFFSET 0 ++ ++/* SSC Receive Clock Mode Register */ ++#define SSC_RCMR 0x00000010 ++#define SSC_RCMR_CKG_SIZE 2 ++#define SSC_RCMR_CKG_OFFSET 6 ++#define SSC_RCMR_CKI_SIZE 1 ++#define SSC_RCMR_CKI_OFFSET 5 ++#define SSC_RCMR_CKO_SIZE 3 ++#define SSC_RCMR_CKO_OFFSET 2 ++#define SSC_RCMR_CKS_SIZE 2 ++#define SSC_RCMR_CKS_OFFSET 0 ++#define SSC_RCMR_PERIOD_SIZE 8 ++#define SSC_RCMR_PERIOD_OFFSET 24 ++#define SSC_RCMR_START_SIZE 4 ++#define SSC_RCMR_START_OFFSET 8 ++#define SSC_RCMR_STOP_SIZE 1 ++#define SSC_RCMR_STOP_OFFSET 12 ++#define SSC_RCMR_STTDLY_SIZE 8 ++#define SSC_RCMR_STTDLY_OFFSET 16 ++ ++/* SSC Receive Frame Mode Register */ ++#define SSC_RFMR 0x00000014 ++#define SSC_RFMR_DATLEN_SIZE 5 ++#define SSC_RFMR_DATLEN_OFFSET 0 ++#define SSC_RFMR_DATNB_SIZE 4 ++#define SSC_RFMR_DATNB_OFFSET 8 ++#define SSC_RFMR_FSEDGE_SIZE 1 ++#define SSC_RFMR_FSEDGE_OFFSET 24 ++#define SSC_RFMR_FSLEN_SIZE 4 ++#define SSC_RFMR_FSLEN_OFFSET 16 ++#define SSC_RFMR_FSOS_SIZE 4 ++#define SSC_RFMR_FSOS_OFFSET 20 ++#define SSC_RFMR_LOOP_SIZE 1 ++#define SSC_RFMR_LOOP_OFFSET 5 ++#define SSC_RFMR_MSBF_SIZE 1 ++#define SSC_RFMR_MSBF_OFFSET 7 ++ ++/* SSC Transmit Clock Mode Register */ ++#define SSC_TCMR 0x00000018 ++#define SSC_TCMR_CKG_SIZE 2 ++#define SSC_TCMR_CKG_OFFSET 6 ++#define SSC_TCMR_CKI_SIZE 1 ++#define SSC_TCMR_CKI_OFFSET 5 ++#define SSC_TCMR_CKO_SIZE 3 ++#define SSC_TCMR_CKO_OFFSET 2 ++#define SSC_TCMR_CKS_SIZE 2 ++#define SSC_TCMR_CKS_OFFSET 0 ++#define SSC_TCMR_PERIOD_SIZE 8 ++#define SSC_TCMR_PERIOD_OFFSET 24 ++#define SSC_TCMR_START_SIZE 4 ++#define SSC_TCMR_START_OFFSET 8 ++#define SSC_TCMR_STTDLY_SIZE 8 ++#define SSC_TCMR_STTDLY_OFFSET 16 ++ ++/* SSC Transmit Frame Mode Register */ ++#define SSC_TFMR 0x0000001c ++#define SSC_TFMR_DATDEF_SIZE 1 ++#define SSC_TFMR_DATDEF_OFFSET 5 ++#define SSC_TFMR_DATLEN_SIZE 5 ++#define SSC_TFMR_DATLEN_OFFSET 0 ++#define SSC_TFMR_DATNB_SIZE 4 ++#define SSC_TFMR_DATNB_OFFSET 8 ++#define SSC_TFMR_FSDEN_SIZE 1 ++#define SSC_TFMR_FSDEN_OFFSET 23 ++#define SSC_TFMR_FSEDGE_SIZE 1 ++#define SSC_TFMR_FSEDGE_OFFSET 24 ++#define SSC_TFMR_FSLEN_SIZE 4 ++#define SSC_TFMR_FSLEN_OFFSET 16 ++#define SSC_TFMR_FSOS_SIZE 3 ++#define SSC_TFMR_FSOS_OFFSET 20 ++#define SSC_TFMR_MSBF_SIZE 1 ++#define SSC_TFMR_MSBF_OFFSET 7 ++ ++/* SSC Receive Hold Register */ ++#define SSC_RHR 0x00000020 ++#define SSC_RHR_RDAT_SIZE 32 ++#define SSC_RHR_RDAT_OFFSET 0 ++ ++/* SSC Transmit Hold Register */ ++#define SSC_THR 0x00000024 ++#define SSC_THR_TDAT_SIZE 32 ++#define SSC_THR_TDAT_OFFSET 0 ++ ++/* SSC Receive Sync. Holding Register */ ++#define SSC_RSHR 0x00000030 ++#define SSC_RSHR_RSDAT_SIZE 16 ++#define SSC_RSHR_RSDAT_OFFSET 0 ++ ++/* SSC Transmit Sync. Holding Register */ ++#define SSC_TSHR 0x00000034 ++#define SSC_TSHR_TSDAT_SIZE 16 ++#define SSC_TSHR_RSDAT_OFFSET 0 ++ ++/* SSC Receive Compare 0 Register */ ++#define SSC_RC0R 0x00000038 ++#define SSC_RC0R_CP0_SIZE 16 ++#define SSC_RC0R_CP0_OFFSET 0 ++ ++/* SSC Receive Compare 1 Register */ ++#define SSC_RC1R 0x0000003c ++#define SSC_RC1R_CP1_SIZE 16 ++#define SSC_RC1R_CP1_OFFSET 0 ++ ++/* SSC Status Register */ ++#define SSC_SR 0x00000040 ++#define SSC_SR_CP0_SIZE 1 ++#define SSC_SR_CP0_OFFSET 8 ++#define SSC_SR_CP1_SIZE 1 ++#define SSC_SR_CP1_OFFSET 9 ++#define SSC_SR_ENDRX_SIZE 1 ++#define SSC_SR_ENDRX_OFFSET 6 ++#define SSC_SR_ENDTX_SIZE 1 ++#define SSC_SR_ENDTX_OFFSET 2 ++#define SSC_SR_OVRUN_SIZE 1 ++#define SSC_SR_OVRUN_OFFSET 5 ++#define SSC_SR_RXBUFF_SIZE 1 ++#define SSC_SR_RXBUFF_OFFSET 7 ++#define SSC_SR_RXEN_SIZE 1 ++#define SSC_SR_RXEN_OFFSET 17 ++#define SSC_SR_RXRDY_SIZE 1 ++#define SSC_SR_RXRDY_OFFSET 4 ++#define SSC_SR_RXSYN_SIZE 1 ++#define SSC_SR_RXSYN_OFFSET 11 ++#define SSC_SR_TXBUFE_SIZE 1 ++#define SSC_SR_TXBUFE_OFFSET 3 ++#define SSC_SR_TXEMPTY_SIZE 1 ++#define SSC_SR_TXEMPTY_OFFSET 1 ++#define SSC_SR_TXEN_SIZE 1 ++#define SSC_SR_TXEN_OFFSET 16 ++#define SSC_SR_TXRDY_SIZE 1 ++#define SSC_SR_TXRDY_OFFSET 0 ++#define SSC_SR_TXSYN_SIZE 1 ++#define SSC_SR_TXSYN_OFFSET 10 ++ ++/* SSC Interrupt Enable Register */ ++#define SSC_IER 0x00000044 ++#define SSC_IER_CP0_SIZE 1 ++#define SSC_IER_CP0_OFFSET 8 ++#define SSC_IER_CP1_SIZE 1 ++#define SSC_IER_CP1_OFFSET 9 ++#define SSC_IER_ENDRX_SIZE 1 ++#define SSC_IER_ENDRX_OFFSET 6 ++#define SSC_IER_ENDTX_SIZE 1 ++#define SSC_IER_ENDTX_OFFSET 2 ++#define SSC_IER_OVRUN_SIZE 1 ++#define SSC_IER_OVRUN_OFFSET 5 ++#define SSC_IER_RXBUFF_SIZE 1 ++#define SSC_IER_RXBUFF_OFFSET 7 ++#define SSC_IER_RXRDY_SIZE 1 ++#define SSC_IER_RXRDY_OFFSET 4 ++#define SSC_IER_RXSYN_SIZE 1 ++#define SSC_IER_RXSYN_OFFSET 11 ++#define SSC_IER_TXBUFE_SIZE 1 ++#define SSC_IER_TXBUFE_OFFSET 3 ++#define SSC_IER_TXEMPTY_SIZE 1 ++#define SSC_IER_TXEMPTY_OFFSET 1 ++#define SSC_IER_TXRDY_SIZE 1 ++#define SSC_IER_TXRDY_OFFSET 0 ++#define SSC_IER_TXSYN_SIZE 1 ++#define SSC_IER_TXSYN_OFFSET 10 ++ ++/* SSC Interrupt Disable Register */ ++#define SSC_IDR 0x00000048 ++#define SSC_IDR_CP0_SIZE 1 ++#define SSC_IDR_CP0_OFFSET 8 ++#define SSC_IDR_CP1_SIZE 1 ++#define SSC_IDR_CP1_OFFSET 9 ++#define SSC_IDR_ENDRX_SIZE 1 ++#define SSC_IDR_ENDRX_OFFSET 6 ++#define SSC_IDR_ENDTX_SIZE 1 ++#define SSC_IDR_ENDTX_OFFSET 2 ++#define SSC_IDR_OVRUN_SIZE 1 ++#define SSC_IDR_OVRUN_OFFSET 5 ++#define SSC_IDR_RXBUFF_SIZE 1 ++#define SSC_IDR_RXBUFF_OFFSET 7 ++#define SSC_IDR_RXRDY_SIZE 1 ++#define SSC_IDR_RXRDY_OFFSET 4 ++#define SSC_IDR_RXSYN_SIZE 1 ++#define SSC_IDR_RXSYN_OFFSET 11 ++#define SSC_IDR_TXBUFE_SIZE 1 ++#define SSC_IDR_TXBUFE_OFFSET 3 ++#define SSC_IDR_TXEMPTY_SIZE 1 ++#define SSC_IDR_TXEMPTY_OFFSET 1 ++#define SSC_IDR_TXRDY_SIZE 1 ++#define SSC_IDR_TXRDY_OFFSET 0 ++#define SSC_IDR_TXSYN_SIZE 1 ++#define SSC_IDR_TXSYN_OFFSET 10 ++ ++/* SSC Interrupt Mask Register */ ++#define SSC_IMR 0x0000004c ++#define SSC_IMR_CP0_SIZE 1 ++#define SSC_IMR_CP0_OFFSET 8 ++#define SSC_IMR_CP1_SIZE 1 ++#define SSC_IMR_CP1_OFFSET 9 ++#define SSC_IMR_ENDRX_SIZE 1 ++#define SSC_IMR_ENDRX_OFFSET 6 ++#define SSC_IMR_ENDTX_SIZE 1 ++#define SSC_IMR_ENDTX_OFFSET 2 ++#define SSC_IMR_OVRUN_SIZE 1 ++#define SSC_IMR_OVRUN_OFFSET 5 ++#define SSC_IMR_RXBUFF_SIZE 1 ++#define SSC_IMR_RXBUFF_OFFSET 7 ++#define SSC_IMR_RXRDY_SIZE 1 ++#define SSC_IMR_RXRDY_OFFSET 4 ++#define SSC_IMR_RXSYN_SIZE 1 ++#define SSC_IMR_RXSYN_OFFSET 11 ++#define SSC_IMR_TXBUFE_SIZE 1 ++#define SSC_IMR_TXBUFE_OFFSET 3 ++#define SSC_IMR_TXEMPTY_SIZE 1 ++#define SSC_IMR_TXEMPTY_OFFSET 1 ++#define SSC_IMR_TXRDY_SIZE 1 ++#define SSC_IMR_TXRDY_OFFSET 0 ++#define SSC_IMR_TXSYN_SIZE 1 ++#define SSC_IMR_TXSYN_OFFSET 10 ++ ++/* SSC PDC Receive Pointer Register */ ++#define SSC_PDC_RPR 0x00000100 ++ ++/* SSC PDC Receive Counter Register */ ++#define SSC_PDC_RCR 0x00000104 ++ ++/* SSC PDC Transmit Pointer Register */ ++#define SSC_PDC_TPR 0x00000108 ++ ++/* SSC PDC Receive Next Pointer Register */ ++#define SSC_PDC_RNPR 0x00000110 ++ ++/* SSC PDC Receive Next Counter Register */ ++#define SSC_PDC_RNCR 0x00000114 ++ ++/* SSC PDC Transmit Counter Register */ ++#define SSC_PDC_TCR 0x0000010c ++ ++/* SSC PDC Transmit Next Pointer Register */ ++#define SSC_PDC_TNPR 0x00000118 ++ ++/* SSC PDC Transmit Next Counter Register */ ++#define SSC_PDC_TNCR 0x0000011c ++ ++/* SSC PDC Transfer Control Register */ ++#define SSC_PDC_PTCR 0x00000120 ++#define SSC_PDC_PTCR_RXTDIS_SIZE 1 ++#define SSC_PDC_PTCR_RXTDIS_OFFSET 1 ++#define SSC_PDC_PTCR_RXTEN_SIZE 1 ++#define SSC_PDC_PTCR_RXTEN_OFFSET 0 ++#define SSC_PDC_PTCR_TXTDIS_SIZE 1 ++#define SSC_PDC_PTCR_TXTDIS_OFFSET 9 ++#define SSC_PDC_PTCR_TXTEN_SIZE 1 ++#define SSC_PDC_PTCR_TXTEN_OFFSET 8 ++ ++/* SSC PDC Transfer Status Register */ ++#define SSC_PDC_PTSR 0x00000124 ++#define SSC_PDC_PTSR_RXTEN_SIZE 1 ++#define SSC_PDC_PTSR_RXTEN_OFFSET 0 ++#define SSC_PDC_PTSR_TXTEN_SIZE 1 ++#define SSC_PDC_PTSR_TXTEN_OFFSET 8 ++ ++/* Bit manipulation macros */ ++#define SSC_BIT(name) \ ++ (1 << SSC_##name##_OFFSET) ++#define SSC_BF(name, value) \ ++ (((value) & ((1 << SSC_##name##_SIZE) - 1)) \ ++ << SSC_##name##_OFFSET) ++#define SSC_BFEXT(name, value) \ ++ (((value) >> SSC_##name##_OFFSET) \ ++ & ((1 << SSC_##name##_SIZE) - 1)) ++#define SSC_BFINS(name, value, old) \ ++ (((old) & ~(((1 << SSC_##name##_SIZE) - 1) \ ++ << SSC_##name##_OFFSET)) | SSC_BF(name, value)) ++ ++/* Register access macros */ ++#define ssc_readl(base, reg) __raw_readl(base + SSC_##reg) ++#define ssc_writel(base, reg, value) __raw_writel((value), base + SSC_##reg) ++ ++#endif /* __INCLUDE_ATMEL_SSC_H */ +Index: linux-2.6.22.1/include/linux/gpio_mouse.h +=================================================================== +--- linux-2.6.22.1/include/linux/gpio_mouse.h (revision 0) ++++ linux-2.6.22.1/include/linux/gpio_mouse.h (revision 0) +@@ -0,0 +1,61 @@ ++/* ++ * Driver for simulating a mouse on GPIO lines. ++ * ++ * Copyright (C) 2007 Atmel Corporation ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation. ++ */ ++ ++#ifndef _GPIO_MOUSE_H ++#define _GPIO_MOUSE_H ++ ++#define GPIO_MOUSE_POLARITY_ACT_HIGH 0x00 ++#define GPIO_MOUSE_POLARITY_ACT_LOW 0x01 ++ ++#define GPIO_MOUSE_PIN_UP 0 ++#define GPIO_MOUSE_PIN_DOWN 1 ++#define GPIO_MOUSE_PIN_LEFT 2 ++#define GPIO_MOUSE_PIN_RIGHT 3 ++#define GPIO_MOUSE_PIN_BLEFT 4 ++#define GPIO_MOUSE_PIN_BMIDDLE 5 ++#define GPIO_MOUSE_PIN_BRIGHT 6 ++#define GPIO_MOUSE_PIN_MAX 7 ++ ++/** ++ * struct gpio_mouse_platform_data ++ * @scan_ms: integer in ms specifying the scan periode. ++ * @polarity: Pin polarity, active high or low. ++ * @up: GPIO line for up value. ++ * @down: GPIO line for down value. ++ * @left: GPIO line for left value. ++ * @right: GPIO line for right value. ++ * @bleft: GPIO line for left button. ++ * @bmiddle: GPIO line for middle button. ++ * @bright: GPIO line for right button. ++ * ++ * This struct must be added to the platform_device in the board code. ++ * It is used by the gpio_mouse driver to setup GPIO lines and to ++ * calculate mouse movement. ++ */ ++struct gpio_mouse_platform_data { ++ int scan_ms; ++ int polarity; ++ ++ union { ++ struct { ++ int up; ++ int down; ++ int left; ++ int right; ++ ++ int bleft; ++ int bmiddle; ++ int bright; ++ }; ++ int pins[GPIO_MOUSE_PIN_MAX]; ++ }; ++}; ++ ++#endif /* _GPIO_MOUSE_H */ +Index: linux-2.6.22.1/include/linux/i2c-id.h +=================================================================== +--- linux-2.6.22.1/include/linux/i2c-id.h (revision 1) ++++ linux-2.6.22.1/include/linux/i2c-id.h (arbetskopia) +@@ -203,6 +203,7 @@ + + /* --- PCA 9564 based algorithms */ + #define I2C_HW_A_ISA 0x1a0000 /* generic ISA Bus interface card */ ++#define I2C_HW_A_PLAT 0x1a0001 /* generic platform_bus interface */ + + /* --- ACPI Embedded controller algorithms */ + #define I2C_HW_ACPI_EC 0x1f0000 +Index: linux-2.6.22.1/include/asm-avr32/unaligned.h +=================================================================== +--- linux-2.6.22.1/include/asm-avr32/unaligned.h (revision 1) ++++ linux-2.6.22.1/include/asm-avr32/unaligned.h (arbetskopia) +@@ -7,19 +7,10 @@ + * words, but halfwords must be halfword-aligned, and doublewords must + * be word-aligned. + * +- * TODO: Make all this CPU-specific and optimize. ++ * However, swapped word loads must be word-aligned so we can't ++ * optimize word loads in general. + */ + +-#include ++#include + +-/* Use memmove here, so gcc does not insert a __builtin_memcpy. */ +- +-#define get_unaligned(ptr) \ +- ({ __typeof__(*(ptr)) __tmp; memmove(&__tmp, (ptr), sizeof(*(ptr))); __tmp; }) +- +-#define put_unaligned(val, ptr) \ +- ({ __typeof__(*(ptr)) __tmp = (val); \ +- memmove((ptr), &__tmp, sizeof(*(ptr))); \ +- (void)0; }) +- + #endif /* __ASM_AVR32_UNALIGNED_H */ +Index: linux-2.6.22.1/include/asm-avr32/atomic.h +=================================================================== +--- linux-2.6.22.1/include/asm-avr32/atomic.h (revision 1) ++++ linux-2.6.22.1/include/asm-avr32/atomic.h (arbetskopia) +@@ -101,7 +101,7 @@ + " mov %1, 1\n" + "1:" + : "=&r"(tmp), "=&r"(result), "=o"(v->counter) +- : "m"(v->counter), "rKs21"(a), "rKs21"(u) ++ : "m"(v->counter), "rKs21"(a), "rKs21"(u), "1"(result) + : "cc", "memory"); + + return result; +@@ -137,7 +137,7 @@ + " mov %1, 1\n" + "1:" + : "=&r"(tmp), "=&r"(result), "=o"(v->counter) +- : "m"(v->counter), "r"(a), "ir"(u) ++ : "m"(v->counter), "r"(a), "ir"(u), "1"(result) + : "cc", "memory"); + } + +Index: linux-2.6.22.1/include/asm-avr32/dma-controller.h +=================================================================== +--- linux-2.6.22.1/include/asm-avr32/dma-controller.h (revision 0) ++++ linux-2.6.22.1/include/asm-avr32/dma-controller.h (revision 0) +@@ -0,0 +1,166 @@ ++/* ++ * Copyright (C) 2005-2006 Atmel Corporation ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation. ++ */ ++#ifndef __ASM_AVR32_DMA_CONTROLLER_H ++#define __ASM_AVR32_DMA_CONTROLLER_H ++ ++#include ++ ++#define DMA_DIR_MEM_TO_MEM 0x0000 ++#define DMA_DIR_MEM_TO_PERIPH 0x0001 ++#define DMA_DIR_PERIPH_TO_MEM 0x0002 ++#define DMA_DIR_PERIPH_TO_PERIPH 0x0003 ++ ++#define DMA_WIDTH_8BIT 0 ++#define DMA_WIDTH_16BIT 1 ++#define DMA_WIDTH_32BIT 2 ++ ++struct dma_request { ++ struct dma_controller *dmac; ++ struct list_head list; ++ ++ unsigned short channel; ++ ++ void (*xfer_complete)(struct dma_request *req); ++ void (*block_complete)(struct dma_request *req); ++ void (*error)(struct dma_request *req); ++}; ++ ++struct dma_request_sg { ++ struct dma_request req; ++ ++ int nr_sg; ++ struct scatterlist *sg; ++ unsigned long block_size; ++ unsigned int nr_blocks; ++ ++ dma_addr_t data_reg; ++ unsigned short periph_id; ++ ++ unsigned char direction; ++ unsigned char width; ++}; ++#define to_dma_request_sg(_req) \ ++ container_of(_req, struct dma_request_sg, req) ++ ++struct dma_request_cyclic { ++ struct dma_request req; ++ ++ int periods; ++ unsigned long buffer_size; ++ ++ dma_addr_t buffer_start; ++ dma_addr_t data_reg; ++ ++ unsigned short periph_id; ++ unsigned char direction; ++ unsigned char width; ++ ++ void *dev_id; ++}; ++#define to_dma_request_cyclic(_req) \ ++ container_of(_req, struct dma_request_cyclic, req) ++ ++struct dma_request_memcpy { ++ struct dma_request req; ++ ++ dma_addr_t src_addr; ++ unsigned int src_width; ++ unsigned int src_stride; ++ ++ dma_addr_t dst_addr; ++ unsigned int dst_width; ++ unsigned int dst_stride; ++ ++ size_t length; ++ ++ unsigned short src_reverse:1; ++ unsigned short dst_reverse:1; ++}; ++#define to_dma_request_memcpy(_req) \ ++ container_of(_req, struct dma_request_memcpy, req) ++ ++struct dma_controller { ++ struct list_head list; ++ int id; ++ struct device *dev; ++ ++ int (*alloc_channel)(struct dma_controller *dmac); ++ void (*release_channel)(struct dma_controller *dmac, ++ int channel); ++ int (*prepare_request_sg)(struct dma_controller *dmac, ++ struct dma_request_sg *req); ++ int (*prepare_request_cyclic)(struct dma_controller *dmac, ++ struct dma_request_cyclic *req); ++ int (*prepare_request_memcpy)(struct dma_controller *dmac, ++ struct dma_request_memcpy *req); ++ int (*start_request)(struct dma_controller *dmac, ++ unsigned int channel); ++ int (*stop_request)(struct dma_controller *dmac, ++ unsigned int channel); ++ dma_addr_t (*get_current_pos)(struct dma_controller *dmac, ++ unsigned int channel); ++}; ++ ++static inline int ++dma_alloc_channel(struct dma_controller *dmac) ++{ ++ return dmac->alloc_channel(dmac); ++} ++ ++static inline void ++dma_release_channel(struct dma_controller *dmac, int chan) ++{ ++ dmac->release_channel(dmac, chan); ++} ++ ++static inline int ++dma_prepare_request_sg(struct dma_controller *dmac, ++ struct dma_request_sg *req) ++{ ++ return dmac->prepare_request_sg(dmac, req); ++} ++ ++static inline int ++dma_prepare_request_cyclic(struct dma_controller *dmac, ++ struct dma_request_cyclic *req) ++{ ++ return dmac->prepare_request_cyclic(dmac, req); ++} ++ ++static inline int ++dma_prepare_request_memcpy(struct dma_controller *dmac, ++ struct dma_request_memcpy *req) ++{ ++ return dmac->prepare_request_memcpy(dmac, req); ++} ++ ++static inline int ++dma_start_request(struct dma_controller *dmac, ++ unsigned int channel) ++{ ++ return dmac->start_request(dmac, channel); ++} ++ ++static inline int ++dma_stop_request(struct dma_controller *dmac, ++ unsigned int channel) ++{ ++ return dmac->stop_request(dmac, channel); ++} ++ ++static inline dma_addr_t ++dma_get_current_pos(struct dma_controller *dmac, ++ unsigned int channel) ++{ ++ return dmac->get_current_pos(dmac, channel); ++} ++ ++extern int register_dma_controller(struct dma_controller *dmac); ++extern struct dma_controller *find_dma_controller(int id); ++ ++#endif /* __ASM_AVR32_DMA_CONTROLLER_H */ +Index: linux-2.6.22.1/include/asm-avr32/arch-at32ap/portmux.h +=================================================================== +--- linux-2.6.22.1/include/asm-avr32/arch-at32ap/portmux.h (revision 1) ++++ linux-2.6.22.1/include/asm-avr32/arch-at32ap/portmux.h (arbetskopia) +@@ -25,4 +25,16 @@ + void at32_select_gpio(unsigned int pin, unsigned long flags); + void at32_reserve_pin(unsigned int pin); + ++#ifdef CONFIG_GPIO_DEV ++ ++/* Gang allocators and accessors; used by the GPIO /dev driver */ ++int at32_gpio_port_is_valid(unsigned int port); ++int at32_select_gpio_pins(unsigned int port, u32 pins, u32 oe_mask); ++void at32_deselect_pins(unsigned int port, u32 pins); ++ ++u32 at32_gpio_get_value_multiple(unsigned int port, u32 pins); ++void at32_gpio_set_value_multiple(unsigned int port, u32 value, u32 mask); ++ ++#endif /* CONFIG_GPIO_DEV */ ++ + #endif /* __ASM_ARCH_PORTMUX_H__ */ +Index: linux-2.6.22.1/include/asm-avr32/arch-at32ap/board.h +=================================================================== +--- linux-2.6.22.1/include/asm-avr32/arch-at32ap/board.h (revision 1) ++++ linux-2.6.22.1/include/asm-avr32/arch-at32ap/board.h (arbetskopia) +@@ -6,6 +6,8 @@ + + #include + ++#define GPIO_PIN_NONE (-1) ++ + /* Add basic devices: system manager, interrupt controller, portmuxes, etc. */ + void at32_add_system_devices(void); + +@@ -21,6 +23,7 @@ + struct platform_device *at32_add_device_usart(unsigned int id); + + struct eth_platform_data { ++ u32 phy_mask; + u8 is_rmii; + }; + struct platform_device * +@@ -30,9 +33,41 @@ + struct platform_device * + at32_add_device_spi(unsigned int id, struct spi_board_info *b, unsigned int n); + ++struct platform_device *at32_add_device_twi(unsigned int id); ++ ++struct mci_platform_data { ++ int detect_pin; ++ int wp_pin; ++}; ++struct platform_device * ++at32_add_device_mci(unsigned int id, struct mci_platform_data *data); ++ ++struct usba_platform_data { ++ int vbus_pin; ++}; ++struct platform_device * ++at32_add_device_usba(unsigned int id, struct usba_platform_data *data); ++ + struct atmel_lcdfb_info; + struct platform_device * + at32_add_device_lcdc(unsigned int id, struct atmel_lcdfb_info *data, + unsigned long fbmem_start, unsigned long fbmem_len); + ++struct platform_device *at32_add_device_ac97c(unsigned int id); ++struct platform_device *at32_add_device_abdac(unsigned int id); ++ ++/* depending on what's hooked up, not all SSC pins will be used */ ++#define ATMEL_SSC_TK 0x01 ++#define ATMEL_SSC_TF 0x02 ++#define ATMEL_SSC_TD 0x04 ++#define ATMEL_SSC_TX (ATMEL_SSC_TK | ATMEL_SSC_TF | ATMEL_SSC_TD) ++ ++#define ATMEL_SSC_RK 0x10 ++#define ATMEL_SSC_RF 0x20 ++#define ATMEL_SSC_RD 0x40 ++#define ATMEL_SSC_RX (ATMEL_SSC_RK | ATMEL_SSC_RF | ATMEL_SSC_RD) ++ ++struct platform_device * ++at32_add_device_ssc(unsigned int id, unsigned int flags); ++ + #endif /* __ASM_ARCH_BOARD_H */ +Index: linux-2.6.22.1/scripts/checkstack.pl +=================================================================== +--- linux-2.6.22.1/scripts/checkstack.pl (revision 1) ++++ linux-2.6.22.1/scripts/checkstack.pl (arbetskopia) +@@ -12,6 +12,7 @@ + # sh64 port by Paul Mundt + # Random bits by Matt Mackall + # M68k port by Geert Uytterhoeven and Andreas Schwab ++# AVR32 port by Haavard Skinnemoen + # + # Usage: + # objdump -d vmlinux | stackcheck.pl [arch] +@@ -37,6 +38,10 @@ + if ($arch eq 'arm') { + #c0008ffc: e24dd064 sub sp, sp, #100 ; 0x64 + $re = qr/.*sub.*sp, sp, #(([0-9]{2}|[3-9])[0-9]{2})/o; ++ } elsif ($arch eq 'avr32') { ++ #8000008a: 20 1d sub sp,4 ++ #80000ca8: fa cd 05 b0 sub sp,sp,1456 ++ $re = qr/^.*sub.*sp.*,([0-9]{1,8})/o; + } elsif ($arch =~ /^i[3456]86$/) { + #c0105234: 81 ec ac 05 00 00 sub $0x5ac,%esp + $re = qr/^.*[as][du][db] \$(0x$x{1,8}),\%esp$/o; +Index: linux-2.6.22.1/sound/Kconfig +=================================================================== +--- linux-2.6.22.1/sound/Kconfig (revision 1) ++++ linux-2.6.22.1/sound/Kconfig (arbetskopia) +@@ -63,9 +63,13 @@ + + source "sound/arm/Kconfig" + ++if SPI ++source "sound/spi/Kconfig" ++endif ++ + source "sound/mips/Kconfig" + +-# the following will depend on the order of config. ++# tee following will depend on the order of config. + # here assuming USB is defined before ALSA + source "sound/usb/Kconfig" + +Index: linux-2.6.22.1/sound/soc/at91/eti_b1_wm8731.c +=================================================================== +--- linux-2.6.22.1/sound/soc/at91/eti_b1_wm8731.c (revision 1) ++++ linux-2.6.22.1/sound/soc/at91/eti_b1_wm8731.c (arbetskopia) +@@ -34,8 +34,7 @@ + #include + #include + +-#include +-#include ++#include + #include + + #include "../codecs/wm8731.h" +@@ -48,13 +47,6 @@ + #define DBG(x...) + #endif + +-#define AT91_PIO_TF1 (1 << (AT91_PIN_PB6 - PIN_BASE) % 32) +-#define AT91_PIO_TK1 (1 << (AT91_PIN_PB7 - PIN_BASE) % 32) +-#define AT91_PIO_TD1 (1 << (AT91_PIN_PB8 - PIN_BASE) % 32) +-#define AT91_PIO_RD1 (1 << (AT91_PIN_PB9 - PIN_BASE) % 32) +-#define AT91_PIO_RK1 (1 << (AT91_PIN_PB10 - PIN_BASE) % 32) +-#define AT91_PIO_RF1 (1 << (AT91_PIN_PB11 - PIN_BASE) % 32) +- + static struct clk *pck1_clk; + static struct clk *pllb_clk; + +@@ -277,7 +269,6 @@ + static int __init eti_b1_init(void) + { + int ret; +- u32 ssc_pio_lines; + struct at91_ssc_periph *ssc = eti_b1_dai.cpu_dai->private_data; + + if (!request_mem_region(AT91RM9200_BASE_SSC1, SZ_16K, "soc-audio")) { +@@ -311,20 +302,13 @@ + goto fail_io_unmap; + } + +- ssc_pio_lines = AT91_PIO_TF1 | AT91_PIO_TK1 | AT91_PIO_TD1 +- | AT91_PIO_RD1 /* | AT91_PIO_RK1 */ | AT91_PIO_RF1; ++ at91_set_A_periph(AT91_PIN_PB6, 0); /* TF1 */ ++ at91_set_A_periph(AT91_PIN_PB7, 0); /* TK1 */ ++ at91_set_A_periph(AT91_PIN_PB8, 0); /* TD1 */ ++ at91_set_A_periph(AT91_PIN_PB9, 0); /* RD1 */ ++/* at91_set_A_periph(AT91_PIN_PB10, 0);*/ /* RK1 */ ++ at91_set_A_periph(AT91_PIN_PB11, 0); /* RF1 */ + +- /* Reset all PIO registers and assign lines to peripheral A */ +- at91_sys_write(AT91_PIOB + PIO_PDR, ssc_pio_lines); +- at91_sys_write(AT91_PIOB + PIO_ODR, ssc_pio_lines); +- at91_sys_write(AT91_PIOB + PIO_IFDR, ssc_pio_lines); +- at91_sys_write(AT91_PIOB + PIO_CODR, ssc_pio_lines); +- at91_sys_write(AT91_PIOB + PIO_IDR, ssc_pio_lines); +- at91_sys_write(AT91_PIOB + PIO_MDDR, ssc_pio_lines); +- at91_sys_write(AT91_PIOB + PIO_PUDR, ssc_pio_lines); +- at91_sys_write(AT91_PIOB + PIO_ASR, ssc_pio_lines); +- at91_sys_write(AT91_PIOB + PIO_OWDR, ssc_pio_lines); +- + /* + * Set PCK1 parent to PLLB and its rate to 12 Mhz. + */ +Index: linux-2.6.22.1/sound/spi/Kconfig +=================================================================== +--- linux-2.6.22.1/sound/spi/Kconfig (revision 0) ++++ linux-2.6.22.1/sound/spi/Kconfig (revision 0) +@@ -0,0 +1,31 @@ ++#SPI drivers ++ ++menu "SPI devices" ++ depends on SND != n ++ ++config SND_AT73C213 ++ tristate "Atmel AT73C213 DAC driver" ++ depends on ATMEL_SSC ++ select SND_PCM ++ help ++ Say Y here if you want to use the Atmel AT73C213 external DAC. This ++ DAC can be found on Atmel development boards. ++ ++ This driver requires the Atmel SSC driver for sound sink, a ++ peripheral found on most AT91 and AVR32 microprocessors. ++ ++ To compile this driver as a module, choose M here: the module will be ++ called snd-at73c213. ++ ++config SND_AT73C213_TARGET_BITRATE ++ int "Target bitrate for AT73C213" ++ depends on SND_AT73C213 ++ default "48000" ++ range 8000 50000 ++ help ++ Sets the target bitrate for the bitrate calculator in the driver. ++ Limited by hardware to be between 8000 Hz and 50000 Hz. ++ ++ Set to 48000 Hz by default. ++ ++endmenu +Index: linux-2.6.22.1/sound/spi/at73c213.c +=================================================================== +--- linux-2.6.22.1/sound/spi/at73c213.c (revision 0) ++++ linux-2.6.22.1/sound/spi/at73c213.c (revision 0) +@@ -0,0 +1,1121 @@ ++/* ++ * Driver for AT73C213 16-bit stereo DAC connected to Atmel SSC ++ * ++ * Copyright (C) 2006-2007 Atmel Norway ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 as published by ++ * the Free Software Foundation. ++ */ ++ ++/*#define DEBUG*/ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include ++#include ++#include ++#include ++#include ++ ++#include ++ ++#include ++#include ++ ++#include "at73c213.h" ++ ++#define BITRATE_MIN 8000 /* Hardware limit? */ ++#define BITRATE_TARGET CONFIG_SND_AT73C213_TARGET_BITRATE ++#define BITRATE_MAX 50000 /* Hardware limit. */ ++ ++/* Initial (hardware reset) AT73C213 register values. */ ++static u8 snd_at73c213_original_image[18] = ++{ ++ 0x00, /* 00 - CTRL */ ++ 0x05, /* 01 - LLIG */ ++ 0x05, /* 02 - RLIG */ ++ 0x08, /* 03 - LPMG */ ++ 0x08, /* 04 - RPMG */ ++ 0x00, /* 05 - LLOG */ ++ 0x00, /* 06 - RLOG */ ++ 0x22, /* 07 - OLC */ ++ 0x09, /* 08 - MC */ ++ 0x00, /* 09 - CSFC */ ++ 0x00, /* 0A - MISC */ ++ 0x00, /* 0B - */ ++ 0x00, /* 0C - PRECH */ ++ 0x05, /* 0D - AUXG */ ++ 0x00, /* 0E - */ ++ 0x00, /* 0F - */ ++ 0x00, /* 10 - RST */ ++ 0x00, /* 11 - PA_CTRL */ ++}; ++ ++struct snd_at73c213 { ++ struct snd_card *card; ++ struct snd_pcm *pcm; ++ struct snd_pcm_substream *substream; ++ struct at73c213_board_info *board; ++ int irq; ++ int period; ++ unsigned long bitrate; ++ struct clk *bitclk; ++ struct ssc_device *ssc; ++ struct spi_device *spi; ++ u8 spi_wbuffer[2]; ++ u8 spi_rbuffer[2]; ++ /* Image of the SPI registers in AT73C213. */ ++ u8 reg_image[18]; ++ /* Protect registers against concurrent access. */ ++ spinlock_t lock; ++}; ++ ++#define get_chip(card) ((struct snd_at73c213 *)card->private_data) ++ ++static int ++snd_at73c213_write_reg(struct snd_at73c213 *chip, u8 reg, u8 val) ++{ ++ struct spi_message msg; ++ struct spi_transfer msg_xfer = { ++ .len = 2, ++ .cs_change = 0, ++ }; ++ int retval; ++ ++ spi_message_init(&msg); ++ ++ chip->spi_wbuffer[0] = reg; ++ chip->spi_wbuffer[1] = val; ++ ++ msg_xfer.tx_buf = chip->spi_wbuffer; ++ msg_xfer.rx_buf = chip->spi_rbuffer; ++ spi_message_add_tail(&msg_xfer, &msg); ++ ++ retval = spi_sync(chip->spi, &msg); ++ ++ if (!retval) ++ chip->reg_image[reg] = val; ++ ++ return retval; ++} ++ ++static struct snd_pcm_hardware snd_at73c213_playback_hw = { ++ .info = SNDRV_PCM_INFO_INTERLEAVED | ++ SNDRV_PCM_INFO_BLOCK_TRANSFER, ++ .formats = SNDRV_PCM_FMTBIT_S16_BE, ++ .rates = SNDRV_PCM_RATE_CONTINUOUS, ++ .rate_min = 8000, /* Replaced by chip->bitrate later. */ ++ .rate_max = 50000, /* Replaced by chip->bitrate later. */ ++ .channels_min = 2, ++ .channels_max = 2, ++ .buffer_bytes_max = 64 * 1024 - 1, ++ .period_bytes_min = 512, ++ .period_bytes_max = 64 * 1024 - 1, ++ .periods_min = 4, ++ .periods_max = 1024, ++}; ++ ++/* ++ * Calculate and set bitrate and divisions. ++ */ ++static int snd_at73c213_set_bitrate(struct snd_at73c213 *chip) ++{ ++ unsigned long ssc_rate = clk_get_rate(chip->ssc->clk); ++ unsigned long dac_rate_new, ssc_div, status; ++ unsigned long ssc_div_max, ssc_div_min; ++ int max_tries; ++ ++ /* ++ * We connect two clocks here, picking divisors so the I2S clocks ++ * out data at the same rate the DAC clocks it in ... and as close ++ * as practical to the desired target rate. ++ * ++ * The DAC master clock (MCLK) is programmable, and is either 256 ++ * or (not here) 384 times the I2S output clock (BCLK). ++ */ ++ ++ /* SSC clock / (bitrate * stereo * 16-bit). */ ++ ssc_div = ssc_rate / (BITRATE_TARGET * 2 * 16); ++ ssc_div_min = ssc_rate / (BITRATE_MAX * 2 * 16); ++ ssc_div_max = ssc_rate / (BITRATE_MIN * 2 * 16); ++ max_tries = (ssc_div_max - ssc_div_min) / 2; ++ ++ if (max_tries < 1) ++ max_tries = 1; ++ ++ /* ssc_div must be a power of 2. */ ++ ssc_div = (ssc_div + 1) & ~1UL; ++ ++ if ((ssc_rate / (ssc_div * 2 * 16)) < BITRATE_MIN) { ++ ssc_div -= 2; ++ if ((ssc_rate / (ssc_div * 2 * 16)) > BITRATE_MAX) ++ return -ENXIO; ++ } ++ ++ /* Search for a possible bitrate. */ ++ do { ++ /* SSC clock / (ssc divider * 16-bit * stereo). */ ++ if ((ssc_rate / (ssc_div * 2 * 16)) < BITRATE_MIN) ++ return -ENXIO; ++ ++ /* 256 / (2 * 16) = 8 */ ++ dac_rate_new = 8 * (ssc_rate / ssc_div); ++ ++ status = clk_round_rate(chip->board->dac_clk, dac_rate_new); ++ if (status < 0) ++ return status; ++ ++ /* Ignore difference smaller than 256 Hz. */ ++ if ((status/256) == (dac_rate_new/256)) ++ goto set_rate; ++ ++ ssc_div += 2; ++ } while (--max_tries); ++ ++ /* Not able to find a valid bitrate. */ ++ return -ENXIO; ++ ++set_rate: ++ status = clk_set_rate(chip->board->dac_clk, status); ++ if (status < 0) ++ return status; ++ ++ /* Set divider in SSC device. */ ++ ssc_writel(chip->ssc->regs, CMR, ssc_div/2); ++ ++ /* SSC clock / (ssc divider * 16-bit * stereo). */ ++ chip->bitrate = ssc_rate / (ssc_div * 16 * 2); ++ ++ dev_info(&chip->spi->dev, ++ "at73c213: supported bitrate is %lu (%lu divider)\n", ++ chip->bitrate, ssc_div); ++ ++ return 0; ++} ++ ++static int snd_at73c213_pcm_open(struct snd_pcm_substream *substream) ++{ ++ struct snd_at73c213 *chip = snd_pcm_substream_chip(substream); ++ struct snd_pcm_runtime *runtime = substream->runtime; ++ ++ snd_at73c213_playback_hw.rate_min = chip->bitrate; ++ snd_at73c213_playback_hw.rate_max = chip->bitrate; ++ runtime->hw = snd_at73c213_playback_hw; ++ chip->substream = substream; ++ ++ return 0; ++} ++ ++static int snd_at73c213_pcm_close(struct snd_pcm_substream *substream) ++{ ++ struct snd_at73c213 *chip = snd_pcm_substream_chip(substream); ++ chip->substream = NULL; ++ return 0; ++} ++ ++static int snd_at73c213_pcm_hw_params(struct snd_pcm_substream *substream, ++ struct snd_pcm_hw_params *hw_params) ++{ ++ return snd_pcm_lib_malloc_pages(substream, ++ params_buffer_bytes(hw_params)); ++} ++ ++static int snd_at73c213_pcm_hw_free(struct snd_pcm_substream *substream) ++{ ++ return snd_pcm_lib_free_pages(substream); ++} ++ ++static int snd_at73c213_pcm_prepare(struct snd_pcm_substream *substream) ++{ ++ struct snd_at73c213 *chip = snd_pcm_substream_chip(substream); ++ struct snd_pcm_runtime *runtime = substream->runtime; ++ int block_size; ++ ++ block_size = frames_to_bytes(runtime, runtime->period_size); ++ ++ chip->period = 0; ++ ++ ssc_writel(chip->ssc->regs, PDC_TPR, ++ (long)runtime->dma_addr); ++ ssc_writel(chip->ssc->regs, PDC_TCR, runtime->period_size * 2); ++ ssc_writel(chip->ssc->regs, PDC_TNPR, ++ (long)runtime->dma_addr + block_size); ++ ssc_writel(chip->ssc->regs, PDC_TNCR, runtime->period_size * 2); ++ ++ return 0; ++} ++ ++static int snd_at73c213_pcm_trigger(struct snd_pcm_substream *substream, ++ int cmd) ++{ ++ struct snd_at73c213 *chip = snd_pcm_substream_chip(substream); ++ int retval = 0; ++ ++ spin_lock(&chip->lock); ++ ++ switch (cmd) { ++ case SNDRV_PCM_TRIGGER_START: ++ ssc_writel(chip->ssc->regs, IER, SSC_BIT(IER_ENDTX)); ++ ssc_writel(chip->ssc->regs, PDC_PTCR, SSC_BIT(PDC_PTCR_TXTEN)); ++ break; ++ case SNDRV_PCM_TRIGGER_STOP: ++ ssc_writel(chip->ssc->regs, PDC_PTCR, SSC_BIT(PDC_PTCR_TXTDIS)); ++ ssc_writel(chip->ssc->regs, IDR, SSC_BIT(IDR_ENDTX)); ++ break; ++ default: ++ dev_dbg(&chip->spi->dev, "spurious command %x\n", cmd); ++ retval = -EINVAL; ++ break; ++ } ++ ++ spin_unlock(&chip->lock); ++ ++ return retval; ++} ++ ++static snd_pcm_uframes_t ++snd_at73c213_pcm_pointer(struct snd_pcm_substream *substream) ++{ ++ struct snd_at73c213 *chip = snd_pcm_substream_chip(substream); ++ struct snd_pcm_runtime *runtime = substream->runtime; ++ snd_pcm_uframes_t pos; ++ unsigned long bytes; ++ ++ bytes = ssc_readl(chip->ssc->regs, PDC_TPR) ++ - (unsigned long)runtime->dma_addr; ++ ++ pos = bytes_to_frames(runtime, bytes); ++ if (pos >= runtime->buffer_size) ++ pos -= runtime->buffer_size; ++ ++ return pos; ++} ++ ++static struct snd_pcm_ops at73c213_playback_ops = { ++ .open = snd_at73c213_pcm_open, ++ .close = snd_at73c213_pcm_close, ++ .ioctl = snd_pcm_lib_ioctl, ++ .hw_params = snd_at73c213_pcm_hw_params, ++ .hw_free = snd_at73c213_pcm_hw_free, ++ .prepare = snd_at73c213_pcm_prepare, ++ .trigger = snd_at73c213_pcm_trigger, ++ .pointer = snd_at73c213_pcm_pointer, ++}; ++ ++static void snd_at73c213_pcm_free(struct snd_pcm *pcm) ++{ ++ struct snd_at73c213 *chip = snd_pcm_chip(pcm); ++ if (chip->pcm) { ++ snd_pcm_lib_preallocate_free_for_all(chip->pcm); ++ chip->pcm = NULL; ++ } ++} ++ ++static int __devinit snd_at73c213_pcm_new(struct snd_at73c213 *chip, int device) ++{ ++ struct snd_pcm *pcm; ++ int retval; ++ ++ retval = snd_pcm_new(chip->card, chip->card->shortname, ++ device, 1, 0, &pcm); ++ if (retval < 0) ++ goto out; ++ ++ pcm->private_data = chip; ++ pcm->private_free = snd_at73c213_pcm_free; ++ pcm->info_flags = SNDRV_PCM_INFO_BLOCK_TRANSFER; ++ strcpy(pcm->name, "at73c213"); ++ chip->pcm = pcm; ++ ++ snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &at73c213_playback_ops); ++ ++ retval = snd_pcm_lib_preallocate_pages_for_all(chip->pcm, ++ SNDRV_DMA_TYPE_DEV, &chip->ssc->pdev->dev, ++ 64 * 1024, 64 * 1024); ++out: ++ return retval; ++} ++ ++static irqreturn_t snd_at73c213_interrupt(int irq, void *dev_id) ++{ ++ struct snd_at73c213 *chip = dev_id; ++ struct snd_pcm_runtime *runtime = chip->substream->runtime; ++ u32 status; ++ int offset; ++ int block_size; ++ int next_period; ++ int retval = IRQ_NONE; ++ ++ spin_lock(&chip->lock); ++ ++ block_size = frames_to_bytes(runtime, runtime->period_size); ++ status = ssc_readl(chip->ssc->regs, IMR); ++ ++ if (status & SSC_BIT(IMR_ENDTX)) { ++ chip->period++; ++ if (chip->period == runtime->periods) ++ chip->period = 0; ++ next_period = chip->period + 1; ++ if (next_period == runtime->periods) ++ next_period = 0; ++ ++ offset = block_size * next_period; ++ ++ ssc_writel(chip->ssc->regs, PDC_TNPR, ++ (long)runtime->dma_addr + offset); ++ ssc_writel(chip->ssc->regs, PDC_TNCR, runtime->period_size * 2); ++ retval = IRQ_HANDLED; ++ } ++ ++ ssc_readl(chip->ssc->regs, IMR); ++ spin_unlock(&chip->lock); ++ ++ if (status & SSC_BIT(IMR_ENDTX)) ++ snd_pcm_period_elapsed(chip->substream); ++ ++ return retval; ++} ++ ++/* ++ * Mixer functions. ++ */ ++static int snd_at73c213_mono_get(struct snd_kcontrol *kcontrol, ++ struct snd_ctl_elem_value *ucontrol) ++{ ++ struct snd_at73c213 *chip = snd_kcontrol_chip(kcontrol); ++ int reg = kcontrol->private_value & 0xff; ++ int shift = (kcontrol->private_value >> 8) & 0xff; ++ int mask = (kcontrol->private_value >> 16) & 0xff; ++ int invert = (kcontrol->private_value >> 24) & 0xff; ++ ++ spin_lock_irq(&chip->lock); ++ ++ ucontrol->value.integer.value[0] = (chip->reg_image[reg] >> shift) & mask; ++ ++ if (invert) ++ ucontrol->value.integer.value[0] = ++ (mask - ucontrol->value.integer.value[0]); ++ ++ spin_unlock_irq(&chip->lock); ++ ++ return 0; ++} ++ ++static int snd_at73c213_mono_put(struct snd_kcontrol *kcontrol, ++ struct snd_ctl_elem_value *ucontrol) ++{ ++ struct snd_at73c213 *chip = snd_kcontrol_chip(kcontrol); ++ int reg = kcontrol->private_value & 0xff; ++ int shift = (kcontrol->private_value >> 8) & 0xff; ++ int mask = (kcontrol->private_value >> 16) & 0xff; ++ int invert = (kcontrol->private_value >> 24) & 0xff; ++ int change, retval; ++ unsigned short val; ++ ++ val = (ucontrol->value.integer.value[0] & mask); ++ if (invert) ++ val = mask - val; ++ val <<= shift; ++ ++ spin_lock_irq(&chip->lock); ++ ++ val = (chip->reg_image[reg] & ~(mask << shift)) | val; ++ change = val != chip->reg_image[reg]; ++ retval = snd_at73c213_write_reg(chip, reg, val); ++ ++ spin_unlock_irq(&chip->lock); ++ ++ if (retval) ++ return retval; ++ ++ return change; ++} ++ ++static int snd_at73c213_stereo_info(struct snd_kcontrol *kcontrol, ++ struct snd_ctl_elem_info *uinfo) ++{ ++ int mask = (kcontrol->private_value >> 24) & 0xff; ++ ++ if (mask == 1) ++ uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN; ++ else ++ uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; ++ ++ uinfo->count = 2; ++ uinfo->value.integer.min = 0; ++ uinfo->value.integer.max = mask; ++ ++ return 0; ++} ++ ++static int snd_at73c213_stereo_get(struct snd_kcontrol *kcontrol, ++ struct snd_ctl_elem_value *ucontrol) ++{ ++ struct snd_at73c213 *chip = snd_kcontrol_chip(kcontrol); ++ int left_reg = kcontrol->private_value & 0xff; ++ int right_reg = (kcontrol->private_value >> 8) & 0xff; ++ int shift_left = (kcontrol->private_value >> 16) & 0x07; ++ int shift_right = (kcontrol->private_value >> 19) & 0x07; ++ int mask = (kcontrol->private_value >> 24) & 0xff; ++ int invert = (kcontrol->private_value >> 22) & 1; ++ ++ spin_lock_irq(&chip->lock); ++ ++ ucontrol->value.integer.value[0] = ++ (chip->reg_image[left_reg] >> shift_left) & mask; ++ ucontrol->value.integer.value[1] = ++ (chip->reg_image[right_reg] >> shift_right) & mask; ++ ++ if (invert) { ++ ucontrol->value.integer.value[0] = ++ (mask - ucontrol->value.integer.value[0]); ++ ucontrol->value.integer.value[1] = ++ (mask - ucontrol->value.integer.value[1]); ++ } ++ ++ spin_unlock_irq(&chip->lock); ++ ++ return 0; ++} ++ ++static int snd_at73c213_stereo_put(struct snd_kcontrol *kcontrol, ++ struct snd_ctl_elem_value *ucontrol) ++{ ++ struct snd_at73c213 *chip = snd_kcontrol_chip(kcontrol); ++ int left_reg = kcontrol->private_value & 0xff; ++ int right_reg = (kcontrol->private_value >> 8) & 0xff; ++ int shift_left = (kcontrol->private_value >> 16) & 0x07; ++ int shift_right = (kcontrol->private_value >> 19) & 0x07; ++ int mask = (kcontrol->private_value >> 24) & 0xff; ++ int invert = (kcontrol->private_value >> 22) & 1; ++ int change, retval; ++ unsigned short val1, val2; ++ ++ val1 = ucontrol->value.integer.value[0] & mask; ++ val2 = ucontrol->value.integer.value[1] & mask; ++ if (invert) { ++ val1 = mask - val1; ++ val2 = mask - val2; ++ } ++ val1 <<= shift_left; ++ val2 <<= shift_right; ++ ++ spin_lock_irq(&chip->lock); ++ ++ val1 = (chip->reg_image[left_reg] & ~(mask << shift_left)) | val1; ++ val2 = (chip->reg_image[right_reg] & ~(mask << shift_right)) | val2; ++ change = val1 != chip->reg_image[left_reg] ++ || val2 != chip->reg_image[right_reg]; ++ retval = snd_at73c213_write_reg(chip, left_reg, val1); ++ if (retval) { ++ spin_unlock_irq(&chip->lock); ++ goto out; ++ } ++ retval = snd_at73c213_write_reg(chip, right_reg, val2); ++ if (retval) { ++ spin_unlock_irq(&chip->lock); ++ goto out; ++ } ++ ++ spin_unlock_irq(&chip->lock); ++ ++ return change; ++ ++out: ++ return retval; ++} ++ ++static int snd_at73c213_mono_switch_info(struct snd_kcontrol *kcontrol, ++ struct snd_ctl_elem_info *uinfo) ++{ ++ uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN; ++ uinfo->count = 1; ++ uinfo->value.integer.min = 0; ++ uinfo->value.integer.max = 1; ++ ++ return 0; ++} ++ ++static int snd_at73c213_mono_switch_get(struct snd_kcontrol *kcontrol, ++ struct snd_ctl_elem_value *ucontrol) ++{ ++ struct snd_at73c213 *chip = snd_kcontrol_chip(kcontrol); ++ int reg = kcontrol->private_value & 0xff; ++ int shift = (kcontrol->private_value >> 8) & 0xff; ++ int invert = (kcontrol->private_value >> 24) & 0xff; ++ ++ spin_lock_irq(&chip->lock); ++ ++ ucontrol->value.integer.value[0] = (chip->reg_image[reg] >> shift) & 0x01; ++ ++ if (invert) ++ ucontrol->value.integer.value[0] = ++ (0x01 - ucontrol->value.integer.value[0]); ++ ++ spin_unlock_irq(&chip->lock); ++ ++ return 0; ++} ++ ++static int snd_at73c213_mono_switch_put(struct snd_kcontrol *kcontrol, ++ struct snd_ctl_elem_value *ucontrol) ++{ ++ struct snd_at73c213 *chip = snd_kcontrol_chip(kcontrol); ++ int reg = kcontrol->private_value & 0xff; ++ int shift = (kcontrol->private_value >> 8) & 0xff; ++ int mask = (kcontrol->private_value >> 16) & 0xff; ++ int invert = (kcontrol->private_value >> 24) & 0xff; ++ int change, retval; ++ unsigned short val; ++ ++ if (ucontrol->value.integer.value[0]) ++ val = mask; ++ else ++ val = 0; ++ ++ if (invert) ++ val = mask - val; ++ val <<= shift; ++ ++ spin_lock_irq(&chip->lock); ++ ++ val |= (chip->reg_image[reg] & ~(mask << shift)); ++ change = val != chip->reg_image[reg]; ++ ++ retval = snd_at73c213_write_reg(chip, reg, val); ++ ++ spin_unlock_irq(&chip->lock); ++ ++ if (retval) ++ return retval; ++ ++ return change; ++} ++ ++static int snd_at73c213_pa_volume_info(struct snd_kcontrol *kcontrol, ++ struct snd_ctl_elem_info *uinfo) ++{ ++ uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; ++ uinfo->count = 1; ++ uinfo->value.integer.min = 0; ++ uinfo->value.integer.max = ((kcontrol->private_value >> 16) & 0xff) - 1; ++ ++ return 0; ++} ++ ++static int snd_at73c213_line_capture_volume_info( ++ struct snd_kcontrol *kcontrol, ++ struct snd_ctl_elem_info *uinfo) ++{ ++ uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; ++ uinfo->count = 2; ++ /* When inverted will give values 0x10001 => 0. */ ++ uinfo->value.integer.min = 14; ++ uinfo->value.integer.max = 31; ++ ++ return 0; ++} ++ ++static int snd_at73c213_aux_capture_volume_info( ++ struct snd_kcontrol *kcontrol, ++ struct snd_ctl_elem_info *uinfo) ++{ ++ uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; ++ uinfo->count = 1; ++ /* When inverted will give values 0x10001 => 0. */ ++ uinfo->value.integer.min = 14; ++ uinfo->value.integer.max = 31; ++ ++ return 0; ++} ++ ++#define AT73C213_MONO_SWITCH(xname, xindex, reg, shift, mask, invert) \ ++{ \ ++ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \ ++ .name = xname, \ ++ .index = xindex, \ ++ .info = snd_at73c213_mono_switch_info, \ ++ .get = snd_at73c213_mono_switch_get, \ ++ .put = snd_at73c213_mono_switch_put, \ ++ .private_value = (reg | (shift << 8) | (mask << 16) | (invert << 24)) \ ++} ++ ++#define AT73C213_STEREO(xname, xindex, left_reg, right_reg, shift_left, shift_right, mask, invert) \ ++{ \ ++ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \ ++ .name = xname, \ ++ .index = xindex, \ ++ .info = snd_at73c213_stereo_info, \ ++ .get = snd_at73c213_stereo_get, \ ++ .put = snd_at73c213_stereo_put, \ ++ .private_value = (left_reg | (right_reg << 8) \ ++ | (shift_left << 16) | (shift_right << 19) \ ++ | (mask << 24) | (invert << 22)) \ ++} ++ ++static struct snd_kcontrol_new snd_at73c213_controls[] __devinitdata = { ++AT73C213_STEREO("Master Playback Volume", 0, DAC_LMPG, DAC_RMPG, 0, 0, 0x1f, 1), ++AT73C213_STEREO("Master Playback Switch", 0, DAC_LMPG, DAC_RMPG, 5, 5, 1, 1), ++AT73C213_STEREO("PCM Playback Volume", 0, DAC_LLOG, DAC_RLOG, 0, 0, 0x1f, 1), ++AT73C213_STEREO("PCM Playback Switch", 0, DAC_LLOG, DAC_RLOG, 5, 5, 1, 1), ++AT73C213_MONO_SWITCH("Mono PA Playback Switch", 0, DAC_CTRL, DAC_CTRL_ONPADRV, 0x01, 0), ++{ ++ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, ++ .name = "PA Playback Volume", ++ .index = 0, ++ .info = snd_at73c213_pa_volume_info, ++ .get = snd_at73c213_mono_get, ++ .put = snd_at73c213_mono_put, ++ .private_value = PA_CTRL | (PA_CTRL_APAGAIN << 8) | (0x0f << 16) | (1 << 24), ++}, ++AT73C213_MONO_SWITCH("PA High Gain Playback Switch", 0, PA_CTRL, PA_CTRL_APALP, 0x01, 1), ++AT73C213_MONO_SWITCH("PA Playback Switch", 0, PA_CTRL, PA_CTRL_APAON, 0x01, 0), ++{ ++ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, ++ .name = "Aux Capture Volume", ++ .index = 0, ++ .info = snd_at73c213_aux_capture_volume_info, ++ .get = snd_at73c213_mono_get, ++ .put = snd_at73c213_mono_put, ++ .private_value = DAC_AUXG | (0 << 8) | (0x1f << 16) | (1 << 24), ++}, ++AT73C213_MONO_SWITCH("Aux Capture Switch", 0, DAC_CTRL, DAC_CTRL_ONAUXIN, 0x01, 0), ++{ ++ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, ++ .name = "Line Capture Volume", ++ .index = 0, ++ .info = snd_at73c213_line_capture_volume_info, ++ .get = snd_at73c213_stereo_get, ++ .put = snd_at73c213_stereo_put, ++ .private_value = DAC_LLIG | (DAC_RLIG << 8) | (0 << 16) | (0 << 19) ++ | (0x1f << 24) | (1 << 22), ++}, ++AT73C213_MONO_SWITCH("Line Capture Switch", 0, DAC_CTRL, 0, 0x03, 0), ++}; ++ ++static int __devinit snd_at73c213_mixer(struct snd_at73c213 *chip) ++{ ++ struct snd_card *card; ++ int errval, idx; ++ ++ if (chip == NULL || chip->pcm == NULL) ++ return -EINVAL; ++ ++ card = chip->card; ++ ++ strcpy(card->mixername, chip->pcm->name); ++ ++ for (idx = 0; idx < ARRAY_SIZE(snd_at73c213_controls); idx++) { ++ errval = snd_ctl_add(card, ++ snd_ctl_new1(&snd_at73c213_controls[idx], ++ chip)); ++ if (errval < 0) ++ goto cleanup; ++ } ++ ++ return 0; ++ ++cleanup: ++ for (idx = 1; idx < ARRAY_SIZE(snd_at73c213_controls) + 1; idx++) { ++ struct snd_kcontrol *kctl; ++ kctl = snd_ctl_find_numid(card, idx); ++ if (kctl) ++ snd_ctl_remove(card, kctl); ++ } ++ return errval; ++} ++ ++/* ++ * Device functions ++ */ ++static int snd_at73c213_ssc_init(struct snd_at73c213 *chip) ++{ ++ /* ++ * Continuous clock output. ++ * Starts on falling TF. ++ * Delay 1 cycle (1 bit). ++ * Periode is 16 bit (16 - 1). ++ */ ++ ssc_writel(chip->ssc->regs, TCMR, ++ SSC_BF(TCMR_CKO, 1) ++ | SSC_BF(TCMR_START, 4) ++ | SSC_BF(TCMR_STTDLY, 1) ++ | SSC_BF(TCMR_PERIOD, 16 - 1)); ++ /* ++ * Data length is 16 bit (16 - 1). ++ * Transmit MSB first. ++ * Transmit 2 words each transfer. ++ * Frame sync length is 16 bit (16 - 1). ++ * Frame starts on negative pulse. ++ */ ++ ssc_writel(chip->ssc->regs, TFMR, ++ SSC_BF(TFMR_DATLEN, 16 - 1) ++ | SSC_BIT(TFMR_MSBF) ++ | SSC_BF(TFMR_DATNB, 1) ++ | SSC_BF(TFMR_FSLEN, 16 - 1) ++ | SSC_BF(TFMR_FSOS, 1)); ++ ++ return 0; ++} ++ ++static int snd_at73c213_chip_init(struct snd_at73c213 *chip) ++{ ++ int retval; ++ unsigned char dac_ctrl = 0; ++ ++ retval = snd_at73c213_set_bitrate(chip); ++ if (retval) ++ goto out; ++ ++ /* Enable DAC master clock. */ ++ clk_enable(chip->board->dac_clk); ++ ++ /* Initialize at73c213 on SPI bus. */ ++ retval = snd_at73c213_write_reg(chip, DAC_RST, 0x04); ++ if (retval) ++ goto out_clk; ++ msleep(1); ++ retval = snd_at73c213_write_reg(chip, DAC_RST, 0x03); ++ if (retval) ++ goto out_clk; ++ ++ /* Precharge everything. */ ++ retval = snd_at73c213_write_reg(chip, DAC_PRECH, 0xff); ++ if (retval) ++ goto out_clk; ++ retval = snd_at73c213_write_reg(chip, PA_CTRL, (1<ssc->regs, CR, SSC_BIT(CR_TXEN)); ++ ++ goto out; ++ ++out_clk: ++ clk_disable(chip->board->dac_clk); ++out: ++ return retval; ++} ++ ++static int snd_at73c213_dev_free(struct snd_device *device) ++{ ++ struct snd_at73c213 *chip = device->device_data; ++ ++ ssc_writel(chip->ssc->regs, CR, SSC_BIT(CR_TXDIS)); ++ if (chip->irq >= 0) { ++ free_irq(chip->irq, chip); ++ chip->irq = -1; ++ } ++ ++ return 0; ++} ++ ++static int __devinit snd_at73c213_dev_init(struct snd_card *card, ++ struct spi_device *spi) ++{ ++ static struct snd_device_ops ops = { ++ .dev_free = snd_at73c213_dev_free, ++ }; ++ struct snd_at73c213 *chip = get_chip(card); ++ int irq, retval; ++ ++ irq = chip->ssc->irq; ++ if (irq < 0) ++ return irq; ++ ++ spin_lock_init(&chip->lock); ++ chip->card = card; ++ chip->irq = -1; ++ ++ retval = request_irq(irq, snd_at73c213_interrupt, 0, "at73c213", chip); ++ if (retval) { ++ dev_dbg(&chip->spi->dev, "unable to request irq %d\n", irq); ++ goto out; ++ } ++ chip->irq = irq; ++ ++ memcpy(&chip->reg_image, &snd_at73c213_original_image, ++ sizeof(snd_at73c213_original_image)); ++ ++ retval = snd_at73c213_ssc_init(chip); ++ if (retval) ++ goto out_irq; ++ ++ retval = snd_at73c213_chip_init(chip); ++ if (retval) ++ goto out_irq; ++ ++ retval = snd_at73c213_pcm_new(chip, 0); ++ if (retval) ++ goto out_irq; ++ ++ retval = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops); ++ if (retval) ++ goto out_irq; ++ ++ retval = snd_at73c213_mixer(chip); ++ if (retval) ++ goto out_snd_dev; ++ ++ snd_card_set_dev(card, &spi->dev); ++ ++ goto out; ++ ++out_snd_dev: ++ snd_device_free(card, chip); ++out_irq: ++ free_irq(chip->irq, chip); ++ chip->irq = -1; ++out: ++ return retval; ++} ++ ++static int snd_at73c213_probe(struct spi_device *spi) ++{ ++ struct snd_card *card; ++ struct snd_at73c213 *chip; ++ struct at73c213_board_info *board; ++ int retval; ++ char id[16]; ++ ++ board = spi->dev.platform_data; ++ if (!board) { ++ dev_dbg(&spi->dev, "no platform_data\n"); ++ return -ENXIO; ++ } ++ ++ if (!board->dac_clk) { ++ dev_dbg(&spi->dev, "no DAC clk\n"); ++ return -ENXIO; ++ } ++ ++ if (IS_ERR(board->dac_clk)) { ++ dev_dbg(&spi->dev, "no DAC clk\n"); ++ return PTR_ERR(board->dac_clk); ++ } ++ ++ retval = -ENOMEM; ++ ++ /* Allocate "card" using some unused identifiers. */ ++ snprintf(id, sizeof id, "at73c213_%d", board->ssc_id); ++ card = snd_card_new(-1, id, THIS_MODULE, sizeof(struct snd_at73c213)); ++ if (!card) ++ goto out; ++ ++ chip = card->private_data; ++ chip->spi = spi; ++ chip->board = board; ++ ++ chip->ssc = ssc_request(board->ssc_id); ++ if (IS_ERR(chip->ssc)) { ++ dev_dbg(&spi->dev, "could not get ssc%d device\n", ++ board->ssc_id); ++ retval = PTR_ERR(chip->ssc); ++ goto out_card; ++ } ++ ++ retval = snd_at73c213_dev_init(card, spi); ++ if (retval) ++ goto out_ssc; ++ ++ strcpy(card->driver, "at73c213"); ++ strcpy(card->shortname, board->shortname); ++ sprintf(card->longname, "%s on irq %d", card->shortname, chip->irq); ++ ++ retval = snd_card_register(card); ++ if (retval) ++ goto out_ssc; ++ ++ dev_set_drvdata(&spi->dev, card); ++ ++ goto out; ++ ++out_ssc: ++ ssc_free(chip->ssc); ++out_card: ++ snd_card_free(card); ++out: ++ return retval; ++} ++ ++static int __devexit snd_at73c213_remove(struct spi_device *spi) ++{ ++ struct snd_card *card = dev_get_drvdata(&spi->dev); ++ struct snd_at73c213 *chip = card->private_data; ++ int retval; ++ ++ /* Stop playback. */ ++ ssc_writel(chip->ssc->regs, CR, SSC_BIT(CR_TXDIS)); ++ ++ /* Mute sound. */ ++ retval = snd_at73c213_write_reg(chip, DAC_LMPG, 0x3f); ++ if (retval) ++ goto out; ++ retval = snd_at73c213_write_reg(chip, DAC_RMPG, 0x3f); ++ if (retval) ++ goto out; ++ retval = snd_at73c213_write_reg(chip, DAC_LLOG, 0x3f); ++ if (retval) ++ goto out; ++ retval = snd_at73c213_write_reg(chip, DAC_RLOG, 0x3f); ++ if (retval) ++ goto out; ++ retval = snd_at73c213_write_reg(chip, DAC_LLIG, 0x11); ++ if (retval) ++ goto out; ++ retval = snd_at73c213_write_reg(chip, DAC_RLIG, 0x11); ++ if (retval) ++ goto out; ++ retval = snd_at73c213_write_reg(chip, DAC_AUXG, 0x11); ++ if (retval) ++ goto out; ++ ++ /* Turn off PA. */ ++ retval = snd_at73c213_write_reg(chip, PA_CTRL, (chip->reg_image[PA_CTRL]|0x0f)); ++ if (retval) ++ goto out; ++ msleep(10); ++ retval = snd_at73c213_write_reg(chip, PA_CTRL, (1<board->dac_clk); ++ ++ ssc_free(chip->ssc); ++ snd_card_free(card); ++ dev_set_drvdata(&spi->dev, NULL); ++ ++ return 0; ++} ++ ++#ifdef CONFIG_PM ++static int snd_at73c213_suspend(struct spi_device *spi, pm_message_t msg) ++{ ++ struct snd_card *card = dev_get_drvdata(&spi->dev); ++ struct snd_at73c213 *chip = card->private_data; ++ ++ ssc_writel(chip->ssc->regs, CR, SSC_BIT(CR_TXDIS)); ++ clk_disable(chip->board->dac_clk); ++ ++ return 0; ++} ++ ++static int snd_at73c213_resume(struct spi_device *spi) ++{ ++ struct snd_card *card = dev_get_drvdata(&spi->dev); ++ struct snd_at73c213 *chip = card->private_data; ++ ++ clk_enable(chip->board->dac_clk); ++ ssc_writel(chip->ssc->regs, CR, SSC_BIT(CR_TXEN)); ++ ++ return 0; ++} ++#else ++#define snd_at73c213_suspend NULL ++#define snd_at73c213_resume NULL ++#endif ++ ++static struct spi_driver at73c213_driver = { ++ .driver = { ++ .name = "at73c213", ++ }, ++ .probe = snd_at73c213_probe, ++ .suspend = snd_at73c213_suspend, ++ .resume = snd_at73c213_resume, ++ .remove = __devexit_p(snd_at73c213_remove), ++}; ++ ++static int __init at73c213_init(void) ++{ ++ return spi_register_driver(&at73c213_driver); ++} ++module_init(at73c213_init); ++ ++static void __exit at73c213_exit(void) ++{ ++ spi_unregister_driver(&at73c213_driver); ++} ++module_exit(at73c213_exit); ++ ++MODULE_AUTHOR("Hans-Christian Egtvedt "); ++MODULE_DESCRIPTION("Sound driver for AT73C213 with Atmel SSC"); ++MODULE_LICENSE("GPL"); +Index: linux-2.6.22.1/sound/spi/Makefile +=================================================================== +--- linux-2.6.22.1/sound/spi/Makefile (revision 0) ++++ linux-2.6.22.1/sound/spi/Makefile (revision 0) +@@ -0,0 +1,5 @@ ++# Makefile for SPI drivers ++ ++snd-at73c213-objs := at73c213.o ++ ++obj-$(CONFIG_SND_AT73C213) += snd-at73c213.o +Index: linux-2.6.22.1/sound/spi/at73c213.h +=================================================================== +--- linux-2.6.22.1/sound/spi/at73c213.h (revision 0) ++++ linux-2.6.22.1/sound/spi/at73c213.h (revision 0) +@@ -0,0 +1,119 @@ ++/* ++ * Driver for the AT73C213 16-bit stereo DAC on Atmel ATSTK1000 ++ * ++ * Copyright (C) 2006 - 2007 Atmel Corporation ++ * ++ * This program is free software; you can redistribute it and/or ++ * modify it under the terms of the GNU General Public License as ++ * published by the Free Software Foundation; either version 2 of the ++ * License, or (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, but ++ * WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++ * General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not, write to the Free Software ++ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA ++ * 02111-1307, USA. ++ * ++ * The full GNU General Public License is included in this ++ * distribution in the file called COPYING. ++ */ ++ ++#ifndef _SND_AT73C213_H ++#define _SND_AT73C213_H ++ ++/* DAC control register */ ++#define DAC_CTRL 0x00 ++#define DAC_CTRL_ONPADRV 7 ++#define DAC_CTRL_ONAUXIN 6 ++#define DAC_CTRL_ONDACR 5 ++#define DAC_CTRL_ONDACL 4 ++#define DAC_CTRL_ONLNOR 3 ++#define DAC_CTRL_ONLNOL 2 ++#define DAC_CTRL_ONLNIR 1 ++#define DAC_CTRL_ONLNIL 0 ++ ++/* DAC left line in gain register */ ++#define DAC_LLIG 0x01 ++#define DAC_LLIG_LLIG 0 ++ ++/* DAC right line in gain register */ ++#define DAC_RLIG 0x02 ++#define DAC_RLIG_RLIG 0 ++ ++/* DAC Left Master Playback Gain Register */ ++#define DAC_LMPG 0x03 ++#define DAC_LMPG_LMPG 0 ++ ++/* DAC Right Master Playback Gain Register */ ++#define DAC_RMPG 0x04 ++#define DAC_RMPG_RMPG 0 ++ ++/* DAC Left Line Out Gain Register */ ++#define DAC_LLOG 0x05 ++#define DAC_LLOG_LLOG 0 ++ ++/* DAC Right Line Out Gain Register */ ++#define DAC_RLOG 0x06 ++#define DAC_RLOG_RLOG 0 ++ ++/* DAC Output Level Control Register */ ++#define DAC_OLC 0x07 ++#define DAC_OLC_RSHORT 7 ++#define DAC_OLC_ROLC 4 ++#define DAC_OLC_LSHORT 3 ++#define DAC_OLC_LOLC 0 ++ ++/* DAC Mixer Control Register */ ++#define DAC_MC 0x08 ++#define DAC_MC_INVR 5 ++#define DAC_MC_INVL 4 ++#define DAC_MC_RMSMIN2 3 ++#define DAC_MC_RMSMIN1 2 ++#define DAC_MC_LMSMIN2 1 ++#define DAC_MC_LMSMIN1 0 ++ ++/* DAC Clock and Sampling Frequency Control Register */ ++#define DAC_CSFC 0x09 ++#define DAC_CSFC_OVRSEL 4 ++ ++/* DAC Miscellaneous Register */ ++#define DAC_MISC 0x0A ++#define DAC_MISC_VCMCAPSEL 7 ++#define DAC_MISC_DINTSEL 4 ++#define DAC_MISC_DITHEN 3 ++#define DAC_MISC_DEEMPEN 2 ++#define DAC_MISC_NBITS 0 ++ ++/* DAC Precharge Control Register */ ++#define DAC_PRECH 0x0C ++#define DAC_PRECH_PRCHGPDRV 7 ++#define DAC_PRECH_PRCHGAUX1 6 ++#define DAC_PRECH_PRCHGLNOR 5 ++#define DAC_PRECH_PRCHGLNOL 4 ++#define DAC_PRECH_PRCHGLNIR 3 ++#define DAC_PRECH_PRCHGLNIL 2 ++#define DAC_PRECH_PRCHG 1 ++#define DAC_PRECH_ONMSTR 0 ++ ++/* DAC Auxiliary Input Gain Control Register */ ++#define DAC_AUXG 0x0D ++#define DAC_AUXG_AUXG 0 ++ ++/* DAC Reset Register */ ++#define DAC_RST 0x10 ++#define DAC_RST_RESMASK 2 ++#define DAC_RST_RESFILZ 1 ++#define DAC_RST_RSTZ 0 ++ ++/* Power Amplifier Control Register */ ++#define PA_CTRL 0x11 ++#define PA_CTRL_APAON 6 ++#define PA_CTRL_APAPRECH 5 ++#define PA_CTRL_APALP 4 ++#define PA_CTRL_APAGAIN 0 ++ ++#endif /* _SND_AT73C213_H */ +Index: linux-2.6.22.1/sound/Makefile +=================================================================== +--- linux-2.6.22.1/sound/Makefile (revision 1) ++++ linux-2.6.22.1/sound/Makefile (arbetskopia) +@@ -5,7 +5,8 @@ + obj-$(CONFIG_SOUND_PRIME) += sound_firmware.o + obj-$(CONFIG_SOUND_PRIME) += oss/ + obj-$(CONFIG_DMASOUND) += oss/ +-obj-$(CONFIG_SND) += core/ i2c/ drivers/ isa/ pci/ ppc/ arm/ synth/ usb/ sparc/ parisc/ pcmcia/ mips/ soc/ ++obj-$(CONFIG_SND) += core/ i2c/ drivers/ isa/ pci/ ppc/ arm/ synth/ usb/ \ ++ sparc/ spi/ parisc/ pcmcia/ mips/ soc/ + obj-$(CONFIG_SND_AOA) += aoa/ + + # This one must be compilable even if sound is configured out +Index: linux-2.6.22.1/init/do_mounts.c +=================================================================== +--- linux-2.6.22.1/init/do_mounts.c (revision 1) ++++ linux-2.6.22.1/init/do_mounts.c (arbetskopia) +@@ -25,6 +25,7 @@ + int root_mountflags = MS_RDONLY | MS_SILENT; + char * __initdata root_device_name; + static char __initdata saved_root_name[64]; ++int __initdata root_wait; + + dev_t ROOT_DEV; + +@@ -216,6 +217,14 @@ + + __setup("root=", root_dev_setup); + ++static int __init rootwait_setup(char *line) ++{ ++ root_wait = simple_strtol(line,NULL,0); ++ return 1; ++} ++ ++__setup("rootwait=", rootwait_setup); ++ + static char * __initdata root_mount_data; + static int __init root_data_setup(char *str) + { +@@ -438,11 +447,24 @@ + root_device_name += 5; + } + +- is_floppy = MAJOR(ROOT_DEV) == FLOPPY_MAJOR; +- + if (initrd_load()) + goto out; + ++ /* wait for any asynchronous scanning to complete */ ++ if ((ROOT_DEV == 0) && root_wait) { ++ printk(KERN_INFO "Waiting for root device %s...\n", ++ saved_root_name); ++ do { ++ while (driver_probe_done() != 0) ++ msleep(100); ++ ROOT_DEV = name_to_dev_t(saved_root_name); ++ if (ROOT_DEV == 0) ++ msleep(100); ++ } while (ROOT_DEV == 0); ++ } ++ ++ is_floppy = MAJOR(ROOT_DEV) == FLOPPY_MAJOR; ++ + if (is_floppy && rd_doload && rd_load_disk(0)) + ROOT_DEV = Root_RAM0; + +Index: linux-2.6.22.1/MAINTAINERS +=================================================================== +--- linux-2.6.22.1/MAINTAINERS (revision 1) ++++ linux-2.6.22.1/MAINTAINERS (arbetskopia) +@@ -674,6 +674,13 @@ + M: hskinnemoen@atmel.com + S: Supported + ++ATMEL USBA UDC DRIVER ++P: Haavard Skinnemoen ++M: hskinnemoen@atmel.com ++L: kernel@avr32linux.org ++W: http://avr32linux.org/twiki/bin/view/Main/AtmelUsbDeviceDriver ++S: Supported ++ + ATMEL WIRELESS DRIVER + P: Simon Kelley + M: simon@thekelleys.org.uk +Index: linux-2.6.22.1/arch/arm/boot/compressed/head-at91rm9200.S +=================================================================== +--- linux-2.6.22.1/arch/arm/boot/compressed/head-at91rm9200.S (revision 1) ++++ linux-2.6.22.1/arch/arm/boot/compressed/head-at91rm9200.S (arbetskopia) +@@ -73,6 +73,12 @@ + cmp r7, r3 + beq 99f + ++ @ Promwad Chub : 1181 ++ mov r3, #(MACH_TYPE_CHUB & 0xff) ++ orr r3, r3, #(MACH_TYPE_CHUB & 0xff00) ++ cmp r7, r3 ++ beq 99f ++ + @ Unknown board, use the AT91RM9200DK board + @ mov r7, #MACH_TYPE_AT91RM9200 + mov r7, #(MACH_TYPE_AT91RM9200DK & 0xff) +Index: linux-2.6.22.1/arch/arm/mach-at91/board-kb9202.c +=================================================================== +--- linux-2.6.22.1/arch/arm/mach-at91/board-kb9202.c (revision 1) ++++ linux-2.6.22.1/arch/arm/mach-at91/board-kb9202.c (arbetskopia) +@@ -37,6 +37,8 @@ + #include + #include + ++#include ++ + #include "generic.h" + + +@@ -111,6 +113,48 @@ + .partition_info = nand_partitions, + }; + ++ ++#if defined(CONFIG_FB_S1D15605) ++#warning "Rather pass reset pin via platform_data" ++static struct resource kb9202_lcd_resources[] = { ++ [0] = { ++ .start = AT91_CHIPSELECT_2, ++ .end = AT91_CHIPSELECT_2 + 0x200FF, ++ .flags = IORESOURCE_MEM ++ }, ++ [1] = { /* reset pin */ ++ .start = AT91_PIN_PC22, ++ .end = AT91_PIN_PC22, ++ .flags = IORESOURCE_MEM ++ }, ++}; ++ ++static struct platform_device kb9202_lcd_device = { ++ .name = "s1d15605fb", ++ .id = 0, ++ .num_resources = ARRAY_SIZE(kb9202_lcd_resources), ++ .resource = kb9202_lcd_resources, ++}; ++ ++static void __init kb9202_add_device_lcd(void) ++{ ++ /* In case the boot loader did not set the chip select mode and timing */ ++ at91_sys_write(AT91_SMC_CSR(2), ++ AT91_SMC_WSEN | AT91_SMC_NWS_(18) | AT91_SMC_TDF_(1) | AT91_SMC_DBW_8 | ++ AT91_SMC_RWSETUP_(1) | AT91_SMC_RWHOLD_(1)); ++ ++ /* Backlight pin = output, off */ ++ at91_set_gpio_output(AT91_PIN_PC23, 0); ++ ++ /* Reset pin = output, in reset */ ++ at91_set_gpio_output(AT91_PIN_PC22, 0); ++ ++ platform_device_register(&kb9202_lcd_device); ++} ++#else ++static void __init kb9202_add_device_lcd(void) {} ++#endif ++ + static void __init kb9202_board_init(void) + { + /* Serial */ +@@ -129,6 +173,8 @@ + at91_add_device_spi(NULL, 0); + /* NAND */ + at91_add_device_nand(&kb9202_nand_data); ++ /* LCD */ ++ kb9202_add_device_lcd(); + } + + MACHINE_START(KB9200, "KB920x") +Index: linux-2.6.22.1/arch/arm/mach-at91/Kconfig +=================================================================== +--- linux-2.6.22.1/arch/arm/mach-at91/Kconfig (revision 1) ++++ linux-2.6.22.1/arch/arm/mach-at91/Kconfig (arbetskopia) +@@ -97,6 +97,12 @@ + help + Select this if you are using Sperry-Sun's KAFA board. + ++config MACH_CHUB ++ bool "Promwad Chub board" ++ depends on ARCH_AT91RM9200 ++ help ++ Select this if you are using Promwad's Chub board. ++ + endif + + # ---------------------------------------------------------- +@@ -121,6 +127,13 @@ + Select this if you are using Atmel's AT91SAM9260-EK or AT91SAM9XE Evaluation Kit + + ++config MACH_CAM60 ++ bool "KwikByte CAM60 board" ++ depends on ARCH_AT91SAM9260 ++ help ++ Select this if you are using KwikByte's CAM60 board based on the Atmel AT91SAM9260. ++ ++ + endif + + # ---------------------------------------------------------- +@@ -184,6 +197,20 @@ + On AT91SAM926x boards both types of NAND flash can be present + (8 and 16 bit data bus width). + ++config CSB300_WAKE_SW0 ++ bool "CSB300 SW0 irq0 wakeup" ++ depends on MACH_CSB337 && PM ++ help ++ If you have a CSB300 connected to your CSB337, this lets ++ SW0 serve as a wakeup button. It uses IRQ0. ++ ++config CSB300_WAKE_SW1 ++ bool "CSB300 SW1 gpio wakeup" ++ depends on MACH_CSB337 && PM ++ help ++ If you have a CSB300 connected to your CSB337, this lets ++ SW1 serve as a wakeup button. It uses GPIO. ++ + # ---------------------------------------------------------- + + comment "AT91 Feature Selections" +@@ -194,6 +221,20 @@ + Select this if you need to program one or more of the PCK0..PCK3 + programmable clock outputs. + ++config ATMEL_TCLIB ++ bool "Timer/Counter Library" ++ help ++ Select this if you want a library to allocate the Timer/Counter ++ blocks found on many Atmel processors. This facilitates using ++ these modules despite processor differences. ++ ++config AT91_SLOW_CLOCK ++ bool "Suspend-to-RAM uses slow clock mode (EXPERIMENTAL)" ++ depends on PM && EXPERIMENTAL ++ help ++ Select this if you wish to put the CPU into slow clock mode ++ while in the "Suspend to RAM" state, to save more power. ++ + endmenu + + endif +Index: linux-2.6.22.1/arch/arm/mach-at91/at91sam9260.c +=================================================================== +--- linux-2.6.22.1/arch/arm/mach-at91/at91sam9260.c (revision 1) ++++ linux-2.6.22.1/arch/arm/mach-at91/at91sam9260.c (arbetskopia) +@@ -269,6 +269,33 @@ + + + /* -------------------------------------------------------------------- ++ * Timer/Counter library initialization ++ * -------------------------------------------------------------------- */ ++#ifdef CONFIG_ATMEL_TCLIB ++ ++#include "tclib.h" ++ ++static struct atmel_tcblock at91sam9260_tcblocks[] = { ++ [0] = { ++ .physaddr = AT91SAM9260_BASE_TCB0, ++ .irq = { AT91SAM9260_ID_TC0, AT91SAM9260_ID_TC1, AT91SAM9260_ID_TC2 }, ++ .clk = { &tc0_clk, &tc1_clk, &tc2_clk }, ++ }, ++ [1] = { ++ .physaddr = AT91SAM9260_BASE_TCB1, ++ .irq = { AT91SAM9260_ID_TC3, AT91SAM9260_ID_TC4, AT91SAM9260_ID_TC5 }, ++ .clk = { &tc3_clk, &tc4_clk, &tc5_clk }, ++ }, ++}; ++ ++#define at91sam9260_tc_init() atmel_tc_init(at91sam9260_tcblocks, ARRAY_SIZE(at91sam9260_tcblocks)) ++ ++#else ++#define at91sam9260_tc_init() do {} while(0) ++#endif ++ ++ ++/* -------------------------------------------------------------------- + * AT91SAM9260 processor initialization + * -------------------------------------------------------------------- */ + +@@ -315,6 +342,9 @@ + + /* Register GPIO subsystem */ + at91_gpio_init(at91sam9260_gpio, 3); ++ ++ /* Initialize the Timer/Counter blocks */ ++ at91sam9260_tc_init(); + } + + /* -------------------------------------------------------------------- +@@ -327,30 +357,30 @@ + static unsigned int at91sam9260_default_irq_priority[NR_AIC_IRQS] __initdata = { + 7, /* Advanced Interrupt Controller */ + 7, /* System Peripherals */ +- 0, /* Parallel IO Controller A */ +- 0, /* Parallel IO Controller B */ +- 0, /* Parallel IO Controller C */ ++ 1, /* Parallel IO Controller A */ ++ 1, /* Parallel IO Controller B */ ++ 1, /* Parallel IO Controller C */ + 0, /* Analog-to-Digital Converter */ +- 6, /* USART 0 */ +- 6, /* USART 1 */ +- 6, /* USART 2 */ ++ 5, /* USART 0 */ ++ 5, /* USART 1 */ ++ 5, /* USART 2 */ + 0, /* Multimedia Card Interface */ +- 4, /* USB Device Port */ +- 0, /* Two-Wire Interface */ +- 6, /* Serial Peripheral Interface 0 */ +- 6, /* Serial Peripheral Interface 1 */ ++ 2, /* USB Device Port */ ++ 6, /* Two-Wire Interface */ ++ 5, /* Serial Peripheral Interface 0 */ ++ 5, /* Serial Peripheral Interface 1 */ + 5, /* Serial Synchronous Controller */ + 0, + 0, + 0, /* Timer Counter 0 */ + 0, /* Timer Counter 1 */ + 0, /* Timer Counter 2 */ +- 3, /* USB Host port */ ++ 2, /* USB Host port */ + 3, /* Ethernet */ + 0, /* Image Sensor Interface */ +- 6, /* USART 3 */ +- 6, /* USART 4 */ +- 6, /* USART 5 */ ++ 5, /* USART 3 */ ++ 5, /* USART 4 */ ++ 5, /* USART 5 */ + 0, /* Timer Counter 3 */ + 0, /* Timer Counter 4 */ + 0, /* Timer Counter 5 */ +Index: linux-2.6.22.1/arch/arm/mach-at91/at91sam9261.c +=================================================================== +--- linux-2.6.22.1/arch/arm/mach-at91/at91sam9261.c (revision 1) ++++ linux-2.6.22.1/arch/arm/mach-at91/at91sam9261.c (arbetskopia) +@@ -247,6 +247,28 @@ + + + /* -------------------------------------------------------------------- ++ * Timer/Counter library initialization ++ * -------------------------------------------------------------------- */ ++#ifdef CONFIG_ATMEL_TCLIB ++ ++#include "tclib.h" ++ ++static struct atmel_tcblock at91sam9261_tcblocks[] = { ++ [0] = { ++ .physaddr = AT91SAM9261_BASE_TCB0, ++ .irq = { AT91SAM9261_ID_TC0, AT91SAM9261_ID_TC1, AT91SAM9261_ID_TC2 }, ++ .clk = { &tc0_clk, &tc1_clk, &tc2_clk }, ++ } ++}; ++ ++#define at91sam9261_tc_init() atmel_tc_init(at91sam9261_tcblocks, ARRAY_SIZE(at91sam9261_tcblocks)) ++ ++#else ++#define at91sam9261_tc_init() do {} while(0) ++#endif ++ ++ ++/* -------------------------------------------------------------------- + * AT91SAM9261 processor initialization + * -------------------------------------------------------------------- */ + +@@ -267,6 +289,9 @@ + + /* Register GPIO subsystem */ + at91_gpio_init(at91sam9261_gpio, 3); ++ ++ /* Initialize the Timer/Counter blocks */ ++ at91sam9261_tc_init(); + } + + /* -------------------------------------------------------------------- +@@ -279,25 +304,25 @@ + static unsigned int at91sam9261_default_irq_priority[NR_AIC_IRQS] __initdata = { + 7, /* Advanced Interrupt Controller */ + 7, /* System Peripherals */ +- 0, /* Parallel IO Controller A */ +- 0, /* Parallel IO Controller B */ +- 0, /* Parallel IO Controller C */ ++ 1, /* Parallel IO Controller A */ ++ 1, /* Parallel IO Controller B */ ++ 1, /* Parallel IO Controller C */ + 0, +- 6, /* USART 0 */ +- 6, /* USART 1 */ +- 6, /* USART 2 */ ++ 5, /* USART 0 */ ++ 5, /* USART 1 */ ++ 5, /* USART 2 */ + 0, /* Multimedia Card Interface */ +- 4, /* USB Device Port */ +- 0, /* Two-Wire Interface */ +- 6, /* Serial Peripheral Interface 0 */ +- 6, /* Serial Peripheral Interface 1 */ +- 5, /* Serial Synchronous Controller 0 */ +- 5, /* Serial Synchronous Controller 1 */ +- 5, /* Serial Synchronous Controller 2 */ ++ 2, /* USB Device Port */ ++ 6, /* Two-Wire Interface */ ++ 5, /* Serial Peripheral Interface 0 */ ++ 5, /* Serial Peripheral Interface 1 */ ++ 4, /* Serial Synchronous Controller 0 */ ++ 4, /* Serial Synchronous Controller 1 */ ++ 4, /* Serial Synchronous Controller 2 */ + 0, /* Timer Counter 0 */ + 0, /* Timer Counter 1 */ + 0, /* Timer Counter 2 */ +- 3, /* USB Host port */ ++ 2, /* USB Host port */ + 3, /* LCD Controller */ + 0, + 0, +Index: linux-2.6.22.1/arch/arm/mach-at91/at91sam9260_devices.c +=================================================================== +--- linux-2.6.22.1/arch/arm/mach-at91/at91sam9260_devices.c (revision 1) ++++ linux-2.6.22.1/arch/arm/mach-at91/at91sam9260_devices.c (arbetskopia) +@@ -524,6 +524,32 @@ + #endif + + ++#if defined(CONFIG_NEW_LEDS) ++ ++static struct platform_device at91_leds = { ++ .name = "at91_leds", ++ .id = -1, ++}; ++ ++void __init at91_gpio_leds(struct at91_gpio_led *leds, int nr) ++{ ++ if (!nr) ++ return; ++ ++ at91_leds.dev.platform_data = leds; ++ ++ for ( ; nr; nr--, leds++) { ++ leds->index = nr; /* first record stores number of leds */ ++ at91_set_gpio_output(leds->gpio, (leds->flags & 1) == 0); ++ } ++ ++ platform_device_register(&at91_leds); ++} ++#else ++void __init at91_gpio_leds(struct at91_gpio_led *leds, int nr) {} ++#endif ++ ++ + /* -------------------------------------------------------------------- + * UART + * -------------------------------------------------------------------- */ +Index: linux-2.6.22.1/arch/arm/mach-at91/at91sam9261_devices.c +=================================================================== +--- linux-2.6.22.1/arch/arm/mach-at91/at91sam9261_devices.c (revision 1) ++++ linux-2.6.22.1/arch/arm/mach-at91/at91sam9261_devices.c (arbetskopia) +@@ -14,7 +14,10 @@ + #include + + #include ++#include + ++#include