summaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorBrian Paul <brian.paul@tungstengraphics.com>2008-09-19 09:36:29 -0600
committerBrian Paul <brian.paul@tungstengraphics.com>2008-09-19 09:36:29 -0600
commit0838b702750d85b0284a97be211fa379e9f8d8d8 (patch)
tree8a66c1118d914384bb85ae5a2720372aca4b5e49
parentd310c52c7f6dd586673e848712f5977a03ff1438 (diff)
cell: change spe_complement() to take a src and dst reg, like other instructions
-rw-r--r--src/gallium/auxiliary/rtasm/rtasm_ppc_spe.c14
-rw-r--r--src/gallium/auxiliary/rtasm/rtasm_ppc_spe.h4
-rw-r--r--src/gallium/drivers/cell/ppu/cell_gen_fp.c4
-rw-r--r--src/gallium/drivers/cell/ppu/cell_gen_fragment.c4
4 files changed, 14 insertions, 12 deletions
diff --git a/src/gallium/auxiliary/rtasm/rtasm_ppc_spe.c b/src/gallium/auxiliary/rtasm/rtasm_ppc_spe.c
index f60bfba3f5..85280f680a 100644
--- a/src/gallium/auxiliary/rtasm/rtasm_ppc_spe.c
+++ b/src/gallium/auxiliary/rtasm/rtasm_ppc_spe.c
@@ -623,9 +623,9 @@ spe_splat(struct spe_function *p, unsigned rT, unsigned rA)
void
-spe_complement(struct spe_function *p, unsigned rT)
+spe_complement(struct spe_function *p, unsigned rT, unsigned rA)
{
- spe_nor(p, rT, rT, rT);
+ spe_nor(p, rT, rA, rA);
}
@@ -667,7 +667,8 @@ spe_splat_word(struct spe_function *p, unsigned rT, unsigned rA, int word)
}
}
-/* For each 32-bit float element of rA and rB, choose the smaller of the
+/**
+ * For each 32-bit float element of rA and rB, choose the smaller of the
* two, compositing them into the rT register.
*
* The Float Compare Greater Than (fcgt) instruction will put 1s into
@@ -683,7 +684,7 @@ spe_splat_word(struct spe_function *p, unsigned rT, unsigned rA, int word)
* like "x = min(x, a)", we always allocate a new register to be safe.
*/
void
-spe_float_min(struct spe_function *p, unsigned int rT, unsigned int rA, unsigned int rB)
+spe_float_min(struct spe_function *p, unsigned rT, unsigned rA, unsigned rB)
{
unsigned int compare_reg = spe_allocate_available_register(p);
spe_fcgt(p, compare_reg, rA, rB);
@@ -691,7 +692,8 @@ spe_float_min(struct spe_function *p, unsigned int rT, unsigned int rA, unsigned
spe_release_register(p, compare_reg);
}
-/* For each 32-bit float element of rA and rB, choose the greater of the
+/**
+ * For each 32-bit float element of rA and rB, choose the greater of the
* two, compositing them into the rT register.
*
* The logic is similar to that of spe_float_min() above; the only
@@ -699,7 +701,7 @@ spe_float_min(struct spe_function *p, unsigned int rT, unsigned int rA, unsigned
* so that the larger of the two is selected instead of the smaller.
*/
void
-spe_float_max(struct spe_function *p, unsigned int rT, unsigned int rA, unsigned int rB)
+spe_float_max(struct spe_function *p, unsigned rT, unsigned rA, unsigned rB)
{
unsigned int compare_reg = spe_allocate_available_register(p);
spe_fcgt(p, compare_reg, rA, rB);
diff --git a/src/gallium/auxiliary/rtasm/rtasm_ppc_spe.h b/src/gallium/auxiliary/rtasm/rtasm_ppc_spe.h
index 09400b3fb2..8a0d70fdac 100644
--- a/src/gallium/auxiliary/rtasm/rtasm_ppc_spe.h
+++ b/src/gallium/auxiliary/rtasm/rtasm_ppc_spe.h
@@ -310,9 +310,9 @@ spe_load_uint(struct spe_function *p, unsigned rT, unsigned int ui);
extern void
spe_splat(struct spe_function *p, unsigned rT, unsigned rA);
-/** Complement/invert all bits in rT. */
+/** rT = complement_all_bits(rA). */
extern void
-spe_complement(struct spe_function *p, unsigned rT);
+spe_complement(struct spe_function *p, unsigned rT, unsigned rA);
/** rT = rA. */
extern void
diff --git a/src/gallium/drivers/cell/ppu/cell_gen_fp.c b/src/gallium/drivers/cell/ppu/cell_gen_fp.c
index 6f2b89c695..d835aae255 100644
--- a/src/gallium/drivers/cell/ppu/cell_gen_fp.c
+++ b/src/gallium/drivers/cell/ppu/cell_gen_fp.c
@@ -924,7 +924,7 @@ emit_IF(struct codegen *gen, const struct tgsi_full_instruction *inst)
/* tmp = (s1_reg == 0) */
spe_ceqi(gen->f, tmp_reg, s1_reg, 0);
/* tmp = !tmp */
- spe_complement(gen->f, tmp_reg);
+ spe_complement(gen->f, tmp_reg, tmp_reg);
/* exec_mask = exec_mask & tmp */
spe_and(gen->f, exec_reg, exec_reg, tmp_reg);
@@ -944,7 +944,7 @@ emit_ELSE(struct codegen *gen, const struct tgsi_full_instruction *inst)
spe_comment(gen->f, -4, "ELSE:");
/* exec_mask = !exec_mask */
- spe_complement(gen->f, exec_reg);
+ spe_complement(gen->f, exec_reg, exec_reg);
return true;
}
diff --git a/src/gallium/drivers/cell/ppu/cell_gen_fragment.c b/src/gallium/drivers/cell/ppu/cell_gen_fragment.c
index 899d8423b2..06a9fa102f 100644
--- a/src/gallium/drivers/cell/ppu/cell_gen_fragment.c
+++ b/src/gallium/drivers/cell/ppu/cell_gen_fragment.c
@@ -920,7 +920,7 @@ gen_logicop(const struct pipe_blend_state *blend,
spe_andc(f, fragRGBA_reg, fbRGBA_reg, fragRGBA_reg);
break;
case PIPE_LOGICOP_COPY_INVERTED: /* ~s */
- spe_complement(f, fragRGBA_reg);
+ spe_complement(f, fragRGBA_reg, fragRGBA_reg);
break;
case PIPE_LOGICOP_AND_REVERSE: /* s & ~d */
/* andc R, A, B computes R = A & ~B */
@@ -941,7 +941,7 @@ gen_logicop(const struct pipe_blend_state *blend,
break;
case PIPE_LOGICOP_EQUIV: /* ~(s ^ d) */
spe_xor(f, fragRGBA_reg, fragRGBA_reg, fbRGBA_reg);
- spe_complement(f, fragRGBA_reg);
+ spe_complement(f, fragRGBA_reg, fragRGBA_reg);
break;
case PIPE_LOGICOP_NOOP: /* d */
spe_move(f, fragRGBA_reg, fbRGBA_reg);