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authorMichel Dänzer <michel@daenzer.net>2004-01-24 12:35:13 +0000
committerMichel Dänzer <michel@daenzer.net>2004-01-24 12:35:13 +0000
commit78bb0803cf722ad5273fc495791eb573bf8b4d21 (patch)
treeb9f81bddcf53d483366cd684d4978f37d6bd6114
parent4d859f73fce9918381c65da55f046a7c605c9e65 (diff)
Fix hardware ROP state handling (Roland Scheidegger)
-rw-r--r--src/mesa/drivers/dri/r200/r200_state.c6
-rw-r--r--src/mesa/drivers/dri/radeon/radeon_state.c6
2 files changed, 6 insertions, 6 deletions
diff --git a/src/mesa/drivers/dri/r200/r200_state.c b/src/mesa/drivers/dri/r200/r200_state.c
index 94d5163599..2326c75dbd 100644
--- a/src/mesa/drivers/dri/r200/r200_state.c
+++ b/src/mesa/drivers/dri/r200/r200_state.c
@@ -137,7 +137,7 @@ static void r200BlendEquation( GLcontext *ctx, GLenum mode )
R200_STATECHANGE( rmesa, ctx );
rmesa->hw.ctx.cmd[CTX_RB3D_BLENDCNTL] = b;
- if ( ctx->Color.ColorLogicOpEnabled ) {
+ if ( ctx->Color._LogicOpEnabled ) {
rmesa->hw.ctx.cmd[CTX_RB3D_CNTL] |= R200_ROP_ENABLE;
} else {
rmesa->hw.ctx.cmd[CTX_RB3D_CNTL] &= ~R200_ROP_ENABLE;
@@ -1706,7 +1706,7 @@ static void r200Enable( GLcontext *ctx, GLenum cap, GLboolean state )
} else {
rmesa->hw.ctx.cmd[CTX_RB3D_CNTL] &= ~R200_ALPHA_BLEND_ENABLE;
}
- if ( ctx->Color.ColorLogicOpEnabled ) {
+ if ( ctx->Color._LogicOpEnabled ) {
rmesa->hw.ctx.cmd[CTX_RB3D_CNTL] |= R200_ROP_ENABLE;
} else {
rmesa->hw.ctx.cmd[CTX_RB3D_CNTL] &= ~R200_ROP_ENABLE;
@@ -1829,7 +1829,7 @@ static void r200Enable( GLcontext *ctx, GLenum cap, GLboolean state )
case GL_COLOR_LOGIC_OP:
R200_STATECHANGE( rmesa, ctx );
- if ( state ) {
+ if ( ctx->Color._LogicOpEnabled ) {
rmesa->hw.ctx.cmd[CTX_RB3D_CNTL] |= R200_ROP_ENABLE;
} else {
rmesa->hw.ctx.cmd[CTX_RB3D_CNTL] &= ~R200_ROP_ENABLE;
diff --git a/src/mesa/drivers/dri/radeon/radeon_state.c b/src/mesa/drivers/dri/radeon/radeon_state.c
index 3ffff9cc93..74e918fd00 100644
--- a/src/mesa/drivers/dri/radeon/radeon_state.c
+++ b/src/mesa/drivers/dri/radeon/radeon_state.c
@@ -130,7 +130,7 @@ static void radeonBlendEquation( GLcontext *ctx, GLenum mode )
if ( !fallback ) {
RADEON_STATECHANGE( rmesa, ctx );
rmesa->hw.ctx.cmd[CTX_RB3D_BLENDCNTL] = b;
- if ( ctx->Color.ColorLogicOpEnabled ) {
+ if ( ctx->Color._LogicOpEnabled ) {
rmesa->hw.ctx.cmd[CTX_RB3D_CNTL] |= RADEON_ROP_ENABLE;
} else {
rmesa->hw.ctx.cmd[CTX_RB3D_CNTL] &= ~RADEON_ROP_ENABLE;
@@ -1684,7 +1684,7 @@ static void radeonEnable( GLcontext *ctx, GLenum cap, GLboolean state )
} else {
rmesa->hw.ctx.cmd[CTX_RB3D_CNTL] &= ~RADEON_ALPHA_BLEND_ENABLE;
}
- if ( ctx->Color.ColorLogicOpEnabled ) {
+ if ( ctx->Color._LogicOpEnabled ) {
rmesa->hw.ctx.cmd[CTX_RB3D_CNTL] |= RADEON_ROP_ENABLE;
} else {
rmesa->hw.ctx.cmd[CTX_RB3D_CNTL] &= ~RADEON_ROP_ENABLE;
@@ -1822,7 +1822,7 @@ static void radeonEnable( GLcontext *ctx, GLenum cap, GLboolean state )
case GL_COLOR_LOGIC_OP:
RADEON_STATECHANGE( rmesa, ctx );
- if ( state ) {
+ if ( ctx->Color._LogicOpEnabled ) {
rmesa->hw.ctx.cmd[CTX_RB3D_CNTL] |= RADEON_ROP_ENABLE;
} else {
rmesa->hw.ctx.cmd[CTX_RB3D_CNTL] &= ~RADEON_ROP_ENABLE;