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authorBrian <brian@i915.localnet.net>2007-07-31 13:03:18 -0600
committerBrian <brian@i915.localnet.net>2007-07-31 13:03:18 -0600
commit973985b7ef19cd69c6bd5b85cd22e953d21aa8ae (patch)
treef67855a1efb51dfc81fa5db6454aa4fce848f830
parentf0b4d9cb24506d637a2e8ed06626277726afb321 (diff)
simplify clear.x1,y2,x2,y2 setup
-rw-r--r--src/mesa/drivers/dri/i915tex/intel_buffers.c16
1 files changed, 4 insertions, 12 deletions
diff --git a/src/mesa/drivers/dri/i915tex/intel_buffers.c b/src/mesa/drivers/dri/i915tex/intel_buffers.c
index 72c7b5ae45..8944145afa 100644
--- a/src/mesa/drivers/dri/i915tex/intel_buffers.c
+++ b/src/mesa/drivers/dri/i915tex/intel_buffers.c
@@ -308,22 +308,14 @@ intelClearWithTris(struct intel_context *intel, GLbitfield mask)
LOCK_HARDWARE(intel);
if (intel->numClipRects) {
- GLint cx, cy, cw, ch;
GLuint buf;
intel->vtbl.install_meta_state(intel);
- /* Get clear bounds after locking */
- cx = fb->_Xmin;
- cy = fb->_Ymin;
- ch = fb->_Ymax - cx;
- cw = fb->_Xmax - cy;
-
- /* note: regardless of 'all', cx, cy, cw, ch are now correct */
- clear.x1 = cx;
- clear.y1 = cy;
- clear.x2 = cx + cw;
- clear.y2 = cy + ch;
+ clear.x1 = fb->_Xmin;
+ clear.y1 = fb->_Ymin;
+ clear.x2 = fb->_Xmax;
+ clear.y2 = fb->_Ymax;
/* Back and stencil cliprects are the same. Try and do both
* buffers at once: