diff options
author | Ben Skeggs <skeggsb@gmail.com> | 2007-11-18 21:47:18 +1100 |
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committer | Ben Skeggs <skeggsb@gmail.com> | 2007-11-18 21:47:18 +1100 |
commit | a1d622190f2e7dba578d693845277d6f32504b09 (patch) | |
tree | 219ceb5b219182bb235734e7fc088aa9259bfef6 | |
parent | 3ab26c864cb8401e919de01772c419b0299811fb (diff) |
nv40: support TXP again
-rw-r--r-- | src/mesa/pipe/nv40/nv40_fragprog.c | 11 |
1 files changed, 5 insertions, 6 deletions
diff --git a/src/mesa/pipe/nv40/nv40_fragprog.c b/src/mesa/pipe/nv40/nv40_fragprog.c index 48b783eebe..3be1314347 100644 --- a/src/mesa/pipe/nv40/nv40_fragprog.c +++ b/src/mesa/pipe/nv40/nv40_fragprog.c @@ -446,16 +446,15 @@ nv40_fragprog_parse_instruction(struct nv40_fpc *fpc, arith(fpc, sat, ADD, dst, mask, src[0], neg(src[1]), none); break; case TGSI_OPCODE_TEX: - tex(fpc, sat, TEX, unit, dst, mask, src[0], none, none); + if (finst->FullSrcRegisters[0].SrcRegisterExtSwz.ExtDivide == + TGSI_EXTSWIZZLE_W) { + tex(fpc, sat, TXP, unit, dst, mask, src[0], none, none); + } else + tex(fpc, sat, TEX, unit, dst, mask, src[0], none, none); break; case TGSI_OPCODE_TXB: tex(fpc, sat, TXB, unit, dst, mask, src[0], none, none); break; -#if 0 /* XXX: reimplement on top of TEX */ - case TGSI_OPCODE_TXP: - tex(fpc, sat, TXP, unit, dst, mask, src[0], none, none); - break; -#endif case TGSI_OPCODE_XPD: tmp = temp(fpc); arith(fpc, 0, MUL, tmp, mask, |