r600g: pull r600_draw struct out into header

we need this for future buffer rework, it also makes the vtbl easier

4 files changed, 73 insertions, 72 deletions

diff --git a/src/gallium/drivers/r600/eg_hw_states.c b/src/gallium/drivers/r600/eg_hw_states.c
index 621e36e1bb..684a9a3eed 100644
--- a/src/gallium/drivers/r600/eg_hw_states.c
+++ b/src/gallium/drivers/r600/eg_hw_states.c
@@ -880,40 +880,41 @@ static int eg_vs_resource(struct r600_context *rctx, int id, struct r600_resourc
 	return radeon_state_pm4(vs_resource);
 }
 
-static int eg_draw_vgt_init(struct r600_context *rctx, struct radeon_state *draw,
-			    struct r600_resource *rbuffer,
-			    uint32_t count, int vgt_draw_initiator)
+static int eg_draw_vgt_init(struct r600_draw *draw,
+			    int vgt_draw_initiator)
 {
+	struct r600_context *rctx = r600_context(draw->ctx);
 	struct r600_screen *rscreen = rctx->screen;
-	
-	radeon_state_init(draw, rscreen->rw, R600_STATE_DRAW, 0, 0);
-	draw->states[EG_DRAW__VGT_NUM_INDICES] = count;
-	draw->states[EG_DRAW__VGT_DRAW_INITIATOR] = vgt_draw_initiator;
+	struct r600_resource *rbuffer = (struct r600_resource *)draw->index_buffer;
+	radeon_state_init(&draw->draw, rscreen->rw, R600_STATE_DRAW, 0, 0);
+	draw->draw.states[EG_DRAW__VGT_NUM_INDICES] = draw->count;
+	draw->draw.states[EG_DRAW__VGT_DRAW_INITIATOR] = vgt_draw_initiator;
 	if (rbuffer) {
-		draw->bo[0] = radeon_bo_incref(rscreen->rw, rbuffer->bo);
-		draw->placement[0] = RADEON_GEM_DOMAIN_GTT;
-		draw->placement[1] = RADEON_GEM_DOMAIN_GTT;
-		draw->nbo = 1;
+		draw->draw.bo[0] = radeon_bo_incref(rscreen->rw, rbuffer->bo);
+		draw->draw.placement[0] = RADEON_GEM_DOMAIN_GTT;
+		draw->draw.placement[1] = RADEON_GEM_DOMAIN_GTT;
+		draw->draw.nbo = 1;
 	}
-	return radeon_state_pm4(draw);
+	return radeon_state_pm4(&draw->draw);
 }
 
-static int eg_draw_vgt_prim(struct r600_context *rctx, struct radeon_state *vgt,
-			    uint32_t prim, uint32_t start, uint32_t vgt_dma_index_type)
+static int eg_draw_vgt_prim(struct r600_draw *draw,
+			    uint32_t prim, uint32_t vgt_dma_index_type)
 {
+	struct r600_context *rctx = r600_context(draw->ctx);
 	struct r600_screen *rscreen = rctx->screen;
-	radeon_state_init(vgt, rscreen->rw, R600_STATE_VGT, 0, 0);
-	vgt->states[EG_VGT__VGT_PRIMITIVE_TYPE] = prim;
-	vgt->states[EG_VGT__VGT_MAX_VTX_INDX] = 0x00FFFFFF;
-	vgt->states[EG_VGT__VGT_MIN_VTX_INDX] = 0x00000000;
-	vgt->states[EG_VGT__VGT_INDX_OFFSET] = start;
-	vgt->states[EG_VGT__VGT_DMA_INDEX_TYPE] = vgt_dma_index_type;
-	vgt->states[EG_VGT__VGT_PRIMITIVEID_EN] = 0x00000000;
-	vgt->states[EG_VGT__VGT_DMA_NUM_INSTANCES] = 0x00000001;
-	vgt->states[EG_VGT__VGT_MULTI_PRIM_IB_RESET_EN] = 0x00000000;
-	vgt->states[EG_VGT__VGT_INSTANCE_STEP_RATE_0] = 0x00000000;
-	vgt->states[EG_VGT__VGT_INSTANCE_STEP_RATE_1] = 0x00000000;
-	return radeon_state_pm4(vgt);
+	radeon_state_init(&draw->vgt, rscreen->rw, R600_STATE_VGT, 0, 0);
+	draw->vgt.states[EG_VGT__VGT_PRIMITIVE_TYPE] = prim;
+	draw->vgt.states[EG_VGT__VGT_MAX_VTX_INDX] = 0x00FFFFFF;
+	draw->vgt.states[EG_VGT__VGT_MIN_VTX_INDX] = 0x00000000;
+	draw->vgt.states[EG_VGT__VGT_INDX_OFFSET] = draw->start;
+	draw->vgt.states[EG_VGT__VGT_DMA_INDEX_TYPE] = vgt_dma_index_type;
+	draw->vgt.states[EG_VGT__VGT_PRIMITIVEID_EN] = 0x00000000;
+	draw->vgt.states[EG_VGT__VGT_DMA_NUM_INSTANCES] = 0x00000001;
+	draw->vgt.states[EG_VGT__VGT_MULTI_PRIM_IB_RESET_EN] = 0x00000000;
+	draw->vgt.states[EG_VGT__VGT_INSTANCE_STEP_RATE_0] = 0x00000000;
+	draw->vgt.states[EG_VGT__VGT_INSTANCE_STEP_RATE_1] = 0x00000000;
+	return radeon_state_pm4(&draw->vgt);
 }
 
 
diff --git a/src/gallium/drivers/r600/r600_context.h b/src/gallium/drivers/r600/r600_context.h
index 58f6d0232b..7366810de2 100644
--- a/src/gallium/drivers/r600/r600_context.h
+++ b/src/gallium/drivers/r600/r600_context.h
@@ -114,6 +114,17 @@ struct r600_vertex_element
 	struct pipe_vertex_element	elements[32];
 };
 
+struct r600_draw {
+	struct pipe_context	*ctx;
+	struct radeon_state	draw;
+	struct radeon_state	vgt;
+	unsigned		mode;
+	unsigned		start;
+	unsigned		count;
+	unsigned		index_size;
+	struct pipe_resource	*index_buffer;
+};
+
 struct r600_context_hw_states {
 	struct radeon_state	rasterizer;
 	struct radeon_state	scissor;
@@ -162,11 +173,10 @@ struct r600_context_hw_state_vtbl {
 	void (*cb_cntl)(struct r600_context *rctx, struct radeon_state *rstate);
 	int (*vs_resource)(struct r600_context *rctx, int id, struct r600_resource *rbuffer, uint32_t offset,
 			   uint32_t stride, uint32_t format);
-	int (*vgt_init)(struct r600_context *rctx, struct radeon_state *draw,
-			struct r600_resource *rbuffer,
-			uint32_t count, int vgt_draw_initiator);
-	int (*vgt_prim)(struct r600_context *rctx, struct radeon_state *vgt,
-			uint32_t prim, uint32_t start, uint32_t vgt_dma_index_type);
+	int (*vgt_init)(struct r600_draw *draw,
+			int vgt_draw_initiator);
+	int (*vgt_prim)(struct r600_draw *draw,
+			uint32_t prim, uint32_t vgt_dma_index_type);
 
 	int (*ps_shader)(struct r600_context *rctx, struct r600_context_state *rshader,
 			 struct radeon_state *state);
diff --git a/src/gallium/drivers/r600/r600_draw.c b/src/gallium/drivers/r600/r600_draw.c
index f24f30f6ff..81ba584fbd 100644
--- a/src/gallium/drivers/r600/r600_draw.c
+++ b/src/gallium/drivers/r600/r600_draw.c
@@ -37,17 +37,6 @@
 #include "r600_resource.h"
 #include "r600_state_inlines.h"
 
-struct r600_draw {
-	struct pipe_context	*ctx;
-	struct radeon_state	draw;
-	struct radeon_state	vgt;
-	unsigned		mode;
-	unsigned		start;
-	unsigned		count;
-	unsigned		index_size;
-	struct pipe_resource	*index_buffer;
-};
-
 static int r600_draw_common(struct r600_draw *draw)
 {
 	struct r600_context *rctx = r600_context(draw->ctx);
@@ -110,11 +99,10 @@ static int r600_draw_common(struct r600_draw *draw)
 	}
 	rctx->vs_nresource = rctx->vertex_elements->count;
 	/* FIXME start need to change winsys */
-	rctx->vtbl->vgt_init(rctx, &draw->draw, (struct r600_resource *)draw->index_buffer,
-			     draw->count, vgt_draw_initiator);
+	rctx->vtbl->vgt_init(draw, vgt_draw_initiator);
 	radeon_draw_bind(&rctx->draw, &draw->draw);
 
-	rctx->vtbl->vgt_prim(rctx, &draw->vgt, prim, draw->start, vgt_dma_index_type);
+	rctx->vtbl->vgt_prim(draw, prim, vgt_dma_index_type);
 	radeon_draw_bind(&rctx->draw, &draw->vgt);
 
 	r = radeon_ctx_set_draw(&rctx->ctx, &rctx->draw);
diff --git a/src/gallium/drivers/r600/r600_hw_states.c b/src/gallium/drivers/r600/r600_hw_states.c
index de9491d406..b3ae6de06d 100644
--- a/src/gallium/drivers/r600/r600_hw_states.c
+++ b/src/gallium/drivers/r600/r600_hw_states.c
@@ -888,41 +888,43 @@ static int r600_vs_resource(struct r600_context *rctx, int id, struct r600_resou
 	return radeon_state_pm4(vs_resource);
 }
 
-static int r600_draw_vgt_init(struct r600_context *rctx, struct radeon_state *draw,
-			      struct r600_resource *rbuffer,
-			      uint32_t count, int vgt_draw_initiator)
+static int r600_draw_vgt_init(struct r600_draw *draw,
+			      int vgt_draw_initiator)
 {
+	struct r600_context *rctx = r600_context(draw->ctx);
 	struct r600_screen *rscreen = rctx->screen;
-	
-	radeon_state_init(draw, rscreen->rw, R600_STATE_DRAW, 0, 0);
-	draw->states[R600_DRAW__VGT_NUM_INDICES] = count;
-	draw->states[R600_DRAW__VGT_DRAW_INITIATOR] = vgt_draw_initiator;
+	struct r600_resource *rbuffer = (struct r600_resource *)draw->index_buffer;
+	radeon_state_init(&draw->draw, rscreen->rw, R600_STATE_DRAW, 0, 0);
+	draw->draw.states[R600_DRAW__VGT_NUM_INDICES] = draw->count;
+	draw->draw.states[R600_DRAW__VGT_DRAW_INITIATOR] = vgt_draw_initiator;
+
 	if (rbuffer) {
-		draw->bo[0] = radeon_bo_incref(rscreen->rw, rbuffer->bo);
-		draw->placement[0] = RADEON_GEM_DOMAIN_GTT;
-		draw->placement[1] = RADEON_GEM_DOMAIN_GTT;
-		draw->nbo = 1;
+		draw->draw.bo[0] = radeon_bo_incref(rscreen->rw, rbuffer->bo);
+		draw->draw.placement[0] = RADEON_GEM_DOMAIN_GTT;
+		draw->draw.placement[1] = RADEON_GEM_DOMAIN_GTT;
+		draw->draw.nbo = 1;
 	}
-	return radeon_state_pm4(draw);
+	return radeon_state_pm4(&draw->draw);
 }
 
-static int r600_draw_vgt_prim(struct r600_context *rctx, struct radeon_state *vgt,
-			      uint32_t prim, uint32_t start, uint32_t vgt_dma_index_type)
+static int r600_draw_vgt_prim(struct r600_draw *draw,
+			      uint32_t prim, uint32_t vgt_dma_index_type)
 {
+	struct r600_context *rctx = r600_context(draw->ctx);
 	struct r600_screen *rscreen = rctx->screen;
-	radeon_state_init(vgt, rscreen->rw, R600_STATE_VGT, 0, 0);
-	vgt->states[R600_VGT__VGT_PRIMITIVE_TYPE] = prim;
-	vgt->states[R600_VGT__VGT_MAX_VTX_INDX] = 0x00FFFFFF;
-	vgt->states[R600_VGT__VGT_MIN_VTX_INDX] = 0x00000000;
-	vgt->states[R600_VGT__VGT_INDX_OFFSET] = start;
-	vgt->states[R600_VGT__VGT_MULTI_PRIM_IB_RESET_INDX] = 0x00000000;
-	vgt->states[R600_VGT__VGT_DMA_INDEX_TYPE] = vgt_dma_index_type;
-	vgt->states[R600_VGT__VGT_PRIMITIVEID_EN] = 0x00000000;
-	vgt->states[R600_VGT__VGT_DMA_NUM_INSTANCES] = 0x00000001;
-	vgt->states[R600_VGT__VGT_MULTI_PRIM_IB_RESET_EN] = 0x00000000;
-	vgt->states[R600_VGT__VGT_INSTANCE_STEP_RATE_0] = 0x00000000;
-	vgt->states[R600_VGT__VGT_INSTANCE_STEP_RATE_1] = 0x00000000;
-	return radeon_state_pm4(vgt);
+	radeon_state_init(&draw->vgt, rscreen->rw, R600_STATE_VGT, 0, 0);
+	draw->vgt.states[R600_VGT__VGT_PRIMITIVE_TYPE] = prim;
+	draw->vgt.states[R600_VGT__VGT_MAX_VTX_INDX] = 0x00FFFFFF;
+	draw->vgt.states[R600_VGT__VGT_MIN_VTX_INDX] = 0x00000000;
+	draw->vgt.states[R600_VGT__VGT_INDX_OFFSET] = draw->start;
+	draw->vgt.states[R600_VGT__VGT_MULTI_PRIM_IB_RESET_INDX] = 0x00000000;
+	draw->vgt.states[R600_VGT__VGT_DMA_INDEX_TYPE] = vgt_dma_index_type;
+	draw->vgt.states[R600_VGT__VGT_PRIMITIVEID_EN] = 0x00000000;
+	draw->vgt.states[R600_VGT__VGT_DMA_NUM_INSTANCES] = 0x00000001;
+	draw->vgt.states[R600_VGT__VGT_MULTI_PRIM_IB_RESET_EN] = 0x00000000;
+	draw->vgt.states[R600_VGT__VGT_INSTANCE_STEP_RATE_0] = 0x00000000;
+	draw->vgt.states[R600_VGT__VGT_INSTANCE_STEP_RATE_1] = 0x00000000;
+	return radeon_state_pm4(&draw->vgt);
 }
 
 static int r600_ps_shader(struct r600_context *rctx, struct r600_context_state *rpshader,