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authorCorbin Simpson <MostAwesomeDude@gmail.com>2009-05-17 21:10:07 -0700
committerCorbin Simpson <MostAwesomeDude@gmail.com>2009-05-17 21:10:07 -0700
commit06a7b798f2261a7faaede71946e4489979840713 (patch)
tree89bc4ab45aa9a1c2b425ba30674880f1f5910364
parent572d7d1358b60c93ec4f1f28151bb0e708a9df17 (diff)
r300-gallium: Add half-right COS and SIN.
HW trig does a premultiply by 2pi, where Mesa does another premultiply by pi. This is a problem.
-rw-r--r--src/gallium/drivers/r300/r300_state_shader.c9
1 files changed, 9 insertions, 0 deletions
diff --git a/src/gallium/drivers/r300/r300_state_shader.c b/src/gallium/drivers/r300/r300_state_shader.c
index 7257638dbe..0871aed2b4 100644
--- a/src/gallium/drivers/r300/r300_state_shader.c
+++ b/src/gallium/drivers/r300/r300_state_shader.c
@@ -208,10 +208,12 @@ static INLINE uint32_t r300_alpha_op(unsigned op)
static INLINE uint32_t r500_rgba_op(unsigned op)
{
switch (op) {
+ case TGSI_OPCODE_COS:
case TGSI_OPCODE_EX2:
case TGSI_OPCODE_LG2:
case TGSI_OPCODE_RCP:
case TGSI_OPCODE_RSQ:
+ case TGSI_OPCODE_SIN:
return R500_ALU_RGBA_OP_SOP;
case TGSI_OPCODE_FRC:
return R500_ALU_RGBA_OP_FRC;
@@ -238,6 +240,8 @@ static INLINE uint32_t r500_rgba_op(unsigned op)
static INLINE uint32_t r500_alpha_op(unsigned op)
{
switch (op) {
+ case TGSI_OPCODE_COS:
+ return R500_ALPHA_OP_COS;
case TGSI_OPCODE_EX2:
return R500_ALPHA_OP_EX2;
case TGSI_OPCODE_LG2:
@@ -248,6 +252,8 @@ static INLINE uint32_t r500_alpha_op(unsigned op)
return R500_ALPHA_OP_RSQ;
case TGSI_OPCODE_FRC:
return R500_ALPHA_OP_FRC;
+ case TGSI_OPCODE_SIN:
+ return R500_ALPHA_OP_SIN;
case TGSI_OPCODE_DP3:
case TGSI_OPCODE_DP4:
case TGSI_OPCODE_DPH:
@@ -460,6 +466,9 @@ static void r500_fs_instruction(struct r500_fragment_shader* fs,
* AMD/ATI names for opcodes, please, as it facilitates using the
* documentation. */
switch (inst->Instruction.Opcode) {
+ /* XXX trig needs extra prep */
+ case TGSI_OPCODE_COS:
+ case TGSI_OPCODE_SIN:
/* The simple scalar ops. */
case TGSI_OPCODE_EX2:
case TGSI_OPCODE_LG2: