diff options
| author | Oliver McFadden <z3ro.geek@gmail.com> | 2007-05-09 13:55:14 +0000 | 
|---|---|---|
| committer | Oliver McFadden <z3ro.geek@gmail.com> | 2007-05-09 13:55:14 +0000 | 
| commit | 32c8d002d02194241f4b64234f5dcd6652a1f58d (patch) | |
| tree | 957f8a0b6f2325c8cc0bb21cdd3abd0a8a674641 | |
| parent | c9b87b8ad880755fb522cf4abd6d2499022312cf (diff) | |
r300: Indented r300_context.[ch].
| -rw-r--r-- | src/mesa/drivers/dri/r300/r300_context.c | 116 | ||||
| -rw-r--r-- | src/mesa/drivers/dri/r300/r300_context.h | 193 | 
2 files changed, 164 insertions, 145 deletions
| diff --git a/src/mesa/drivers/dri/r300/r300_context.c b/src/mesa/drivers/dri/r300/r300_context.c index dd348e223c..4092ebe010 100644 --- a/src/mesa/drivers/dri/r300/r300_context.c +++ b/src/mesa/drivers/dri/r300/r300_context.c @@ -70,8 +70,8 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.  #include "xmlpool.h"		/* for symbolic values of enum-type options */  /* hw_tcl_on derives from future_hw_tcl_on when its safe to change it. */ -int future_hw_tcl_on=1; -int hw_tcl_on=1; +int future_hw_tcl_on = 1; +int hw_tcl_on = 1;  #define need_GL_EXT_stencil_two_side  #define need_GL_ARB_multisample @@ -88,6 +88,7 @@ int hw_tcl_on=1;  #include "extension_helper.h"  const struct dri_extension card_extensions[] = { +  /* *INDENT-OFF* */    {"GL_ARB_multisample",		GL_ARB_multisample_functions},    {"GL_ARB_multitexture",		NULL},    {"GL_ARB_texture_border_clamp",	NULL}, @@ -126,6 +127,7 @@ const struct dri_extension card_extensions[] = {    {"GL_NV_vertex_program",		GL_NV_vertex_program_functions},    {"GL_SGIS_generate_mipmap",		NULL},    {NULL,				NULL} +  /* *INDENT-ON* */  };  extern struct tnl_pipeline_stage _r300_render_stage; @@ -164,7 +166,6 @@ static const struct tnl_pipeline_stage *r300_pipeline[] = {  	0,  }; -  /* Create the device specific rendering context.   */  GLboolean r300CreateContext(const __GLcontextModes * glVisual, @@ -183,7 +184,7 @@ GLboolean r300CreateContext(const __GLcontextModes * glVisual,  	assert(screen);  	/* Allocate the R300 context */ -	r300 = (r300ContextPtr)CALLOC(sizeof(*r300)); +	r300 = (r300ContextPtr) CALLOC(sizeof(*r300));  	if (!r300)  		return GL_FALSE; @@ -219,13 +220,15 @@ GLboolean r300CreateContext(const __GLcontextModes * glVisual,  	}  #endif  	if (!radeonInitContext(&r300->radeon, &functions, -			       glVisual, driContextPriv, sharedContextPrivate)) { +			       glVisual, driContextPriv, +			       sharedContextPrivate)) {  		FREE(r300);  		return GL_FALSE;  	}  	/* Init r300 context data */ -	r300->dma.buf0_address = r300->radeon.radeonScreen->buffers->list[0].address; +	r300->dma.buf0_address = +	    r300->radeon.radeonScreen->buffers->list[0].address;  	(void)memset(r300->texture_heaps, 0, sizeof(r300->texture_heaps));  	make_empty_list(&r300->swapped); @@ -233,6 +236,7 @@ GLboolean r300CreateContext(const __GLcontextModes * glVisual,  	r300->nr_heaps = 1 /* screen->numTexHeaps */ ;  	assert(r300->nr_heaps < RADEON_NR_TEX_HEAPS);  	for (i = 0; i < r300->nr_heaps; i++) { +		/* *INDENT-OFF* */  		r300->texture_heaps[i] = driCreateTextureHeap(i, r300,  							       screen->  							       texSize[i], 12, @@ -248,9 +252,10 @@ GLboolean r300CreateContext(const __GLcontextModes * glVisual,  							       (destroy_texture_object_t  								*)  							       r300DestroyTexObj); +		/* *INDENT-ON* */  	}  	r300->texture_depth = driQueryOptioni(&r300->radeon.optionCache, -					       "texture_depth"); +					      "texture_depth");  	if (r300->texture_depth == DRI_CONF_TEXTURE_DEPTH_FB)  		r300->texture_depth = (screen->cpp == 4) ?  		    DRI_CONF_TEXTURE_DEPTH_32 : DRI_CONF_TEXTURE_DEPTH_16; @@ -262,12 +267,13 @@ GLboolean r300CreateContext(const __GLcontextModes * glVisual,  	ctx = r300->radeon.glCtx; -	ctx->Const.MaxTextureImageUnits = driQueryOptioni(&r300->radeon.optionCache, -						     "texture_image_units"); -	ctx->Const.MaxTextureCoordUnits = driQueryOptioni(&r300->radeon.optionCache, -						     "texture_coord_units"); -	ctx->Const.MaxTextureUnits = MIN2(ctx->Const.MaxTextureImageUnits, -					  ctx->Const.MaxTextureCoordUnits); +	ctx->Const.MaxTextureImageUnits = +	    driQueryOptioni(&r300->radeon.optionCache, "texture_image_units"); +	ctx->Const.MaxTextureCoordUnits = +	    driQueryOptioni(&r300->radeon.optionCache, "texture_coord_units"); +	ctx->Const.MaxTextureUnits = +	    MIN2(ctx->Const.MaxTextureImageUnits, +		 ctx->Const.MaxTextureCoordUnits);  	ctx->Const.MaxTextureMaxAnisotropy = 16.0;  	ctx->Const.MinPointSize = 1.0; @@ -283,7 +289,8 @@ GLboolean r300CreateContext(const __GLcontextModes * glVisual,  #ifdef USER_BUFFERS  	/* Needs further modifications */  #if 0 -	ctx->Const.MaxArrayLockSize = (/*512*/RADEON_BUFFER_SIZE*16*1024) / (4*4); +	ctx->Const.MaxArrayLockSize = +	    ( /*512 */ RADEON_BUFFER_SIZE * 16 * 1024) / (4 * 4);  #endif  #endif @@ -313,39 +320,48 @@ GLboolean r300CreateContext(const __GLcontextModes * glVisual,  	_tnl_allow_vertex_fog(ctx, GL_TRUE);  	/* currently bogus data */ -	ctx->Const.VertexProgram.MaxInstructions=VSF_MAX_FRAGMENT_LENGTH/4; -	ctx->Const.VertexProgram.MaxNativeInstructions=VSF_MAX_FRAGMENT_LENGTH/4; -	ctx->Const.VertexProgram.MaxNativeAttribs=16; /* r420 */ -	ctx->Const.VertexProgram.MaxTemps=32; -	ctx->Const.VertexProgram.MaxNativeTemps=/*VSF_MAX_FRAGMENT_TEMPS*/32; -	ctx->Const.VertexProgram.MaxNativeParameters=256; /* r420 */ -	ctx->Const.VertexProgram.MaxNativeAddressRegs=1; +	ctx->Const.VertexProgram.MaxInstructions = VSF_MAX_FRAGMENT_LENGTH / 4; +	ctx->Const.VertexProgram.MaxNativeInstructions = +	    VSF_MAX_FRAGMENT_LENGTH / 4; +	ctx->Const.VertexProgram.MaxNativeAttribs = 16;	/* r420 */ +	ctx->Const.VertexProgram.MaxTemps = 32; +	ctx->Const.VertexProgram.MaxNativeTemps = +	    /*VSF_MAX_FRAGMENT_TEMPS */ 32; +	ctx->Const.VertexProgram.MaxNativeParameters = 256;	/* r420 */ +	ctx->Const.VertexProgram.MaxNativeAddressRegs = 1;  	ctx->Const.FragmentProgram.MaxNativeTemps = PFS_NUM_TEMP_REGS; -	ctx->Const.FragmentProgram.MaxNativeAttribs = 11; /* copy i915... */ +	ctx->Const.FragmentProgram.MaxNativeAttribs = 11;	/* copy i915... */  	ctx->Const.FragmentProgram.MaxNativeParameters = PFS_NUM_CONST_REGS;  	ctx->Const.FragmentProgram.MaxNativeAluInstructions = PFS_MAX_ALU_INST;  	ctx->Const.FragmentProgram.MaxNativeTexInstructions = PFS_MAX_TEX_INST; -	ctx->Const.FragmentProgram.MaxNativeInstructions = PFS_MAX_ALU_INST+PFS_MAX_TEX_INST; -	ctx->Const.FragmentProgram.MaxNativeTexIndirections = PFS_MAX_TEX_INDIRECT; -	ctx->Const.FragmentProgram.MaxNativeAddressRegs = 0; /* and these are?? */ +	ctx->Const.FragmentProgram.MaxNativeInstructions = +	    PFS_MAX_ALU_INST + PFS_MAX_TEX_INST; +	ctx->Const.FragmentProgram.MaxNativeTexIndirections = +	    PFS_MAX_TEX_INDIRECT; +	ctx->Const.FragmentProgram.MaxNativeAddressRegs = 0;	/* and these are?? */  	_tnl_ProgramCacheInit(ctx);  	ctx->FragmentProgram._MaintainTexEnvProgram = GL_TRUE;  	driInitExtensions(ctx, card_extensions, GL_TRUE); -	if (driQueryOptionb(&r300->radeon.optionCache, "disable_stencil_two_side")) -           _mesa_disable_extension(ctx, "GL_EXT_stencil_two_side"); +	if (driQueryOptionb +	    (&r300->radeon.optionCache, "disable_stencil_two_side")) +		_mesa_disable_extension(ctx, "GL_EXT_stencil_two_side"); -	if (r300->radeon.glCtx->Mesa_DXTn && !driQueryOptionb (&r300->radeon.optionCache, "disable_s3tc")) { -	  _mesa_enable_extension( ctx, "GL_EXT_texture_compression_s3tc" ); -	  _mesa_enable_extension( ctx, "GL_S3_s3tc" ); -	} -	else if (driQueryOptionb (&r300->radeon.optionCache, "force_s3tc_enable")) { -	  _mesa_enable_extension( ctx, "GL_EXT_texture_compression_s3tc" ); +	if (r300->radeon.glCtx->Mesa_DXTn +	    && !driQueryOptionb(&r300->radeon.optionCache, "disable_s3tc")) { +		_mesa_enable_extension(ctx, "GL_EXT_texture_compression_s3tc"); +		_mesa_enable_extension(ctx, "GL_S3_s3tc"); +	} else +	    if (driQueryOptionb(&r300->radeon.optionCache, "force_s3tc_enable")) +	{ +		_mesa_enable_extension(ctx, "GL_EXT_texture_compression_s3tc");  	} -	r300->disable_lowimpact_fallback = driQueryOptionb(&r300->radeon.optionCache, "disable_lowimpact_fallback"); +	r300->disable_lowimpact_fallback = +	    driQueryOptionb(&r300->radeon.optionCache, +			    "disable_lowimpact_fallback");  	radeonInitSpanFuncs(ctx);  	r300InitCmdBuf(r300); @@ -367,10 +383,12 @@ GLboolean r300CreateContext(const __GLcontextModes * glVisual,  	if (tcl_mode == DRI_CONF_TCL_SW ||  	    !(r300->radeon.radeonScreen->chip_flags & RADEON_CHIPSET_TCL)) {  		if (r300->radeon.radeonScreen->chip_flags & RADEON_CHIPSET_TCL) { -			r300->radeon.radeonScreen->chip_flags &= ~RADEON_CHIPSET_TCL; +			r300->radeon.radeonScreen->chip_flags &= +			    ~RADEON_CHIPSET_TCL;  			fprintf(stderr, "Disabling HW TCL support\n");  		} -		TCL_FALLBACK(r300->radeon.glCtx, RADEON_TCL_FALLBACK_TCL_DISABLE, 1); +		TCL_FALLBACK(r300->radeon.glCtx, +			     RADEON_TCL_FALLBACK_TCL_DISABLE, 1);  	}  	return GL_TRUE; @@ -378,7 +396,7 @@ GLboolean r300CreateContext(const __GLcontextModes * glVisual,  static void r300FreeGartAllocations(r300ContextPtr r300)  { -	int i, ret, tries=0, done_age, in_use=0; +	int i, ret, tries = 0, done_age, in_use = 0;  	drm_radeon_mem_free_t memfree;  	memfree.region = RADEON_MEM_REGION_GART; @@ -398,7 +416,7 @@ static void r300FreeGartAllocations(r300ContextPtr r300)  	if (in_use)  		r300FlushCmdBuf(r300, __FUNCTION__); -	done_age = radeonGetAge((radeonContextPtr)r300); +	done_age = radeonGetAge((radeonContextPtr) r300);  	for (i = r300->rmm->u_last; i > 0; i--) {  		if (r300->rmm->u_list[i].ptr == NULL) { @@ -413,19 +431,20 @@ static void r300FreeGartAllocations(r300ContextPtr r300)  		assert(r300->rmm->u_list[i].h_pending == 0);  		tries = 0; -		while(r300->rmm->u_list[i].age > done_age && tries++ < 1000) { +		while (r300->rmm->u_list[i].age > done_age && tries++ < 1000) {  			usleep(10); -			done_age = radeonGetAge((radeonContextPtr)r300); +			done_age = radeonGetAge((radeonContextPtr) r300);  		}  		if (tries >= 1000) {  			WARN_ONCE("Failed to idle region!");  		}  		memfree.region_offset = (char *)r300->rmm->u_list[i].ptr - -			(char *)r300->radeon.radeonScreen->gartTextures.map; +		    (char *)r300->radeon.radeonScreen->gartTextures.map;  		ret = drmCommandWrite(r300->radeon.radeonScreen->driScreen->fd, -				DRM_RADEON_FREE, &memfree, sizeof(memfree)); +				      DRM_RADEON_FREE, &memfree, +				      sizeof(memfree));  		if (ret) {  			fprintf(stderr, "Failed to free at %p\nret = %s\n",  				r300->rmm->u_list[i].ptr, strerror(-ret)); @@ -439,14 +458,15 @@ static void r300FreeGartAllocations(r300ContextPtr r300)  				LOCK_HARDWARE(&(r300->radeon));  				ret = mmFreeMem(r300->rmm->u_list[i].fb);  				UNLOCK_HARDWARE(&(r300->radeon)); -				if (ret) fprintf(stderr, "failed to free!\n"); +				if (ret) +					fprintf(stderr, "failed to free!\n");  				r300->rmm->u_list[i].fb = NULL;  			}  			r300->rmm->u_list[i].ref_count = 0;  		}  	} -    r300->rmm->u_head = i; -#endif /* USER_BUFFERS */ +	r300->rmm->u_head = i; +#endif				/* USER_BUFFERS */  }  /* Destroy the device specific context. @@ -474,7 +494,8 @@ void r300DestroyContext(__DRIcontextPrivate * driContextPriv)  	if (r300) {  		GLboolean release_texture_heaps; -		release_texture_heaps = (r300->radeon.glCtx->Shared->RefCount == 1); +		release_texture_heaps = +		    (r300->radeon.glCtx->Shared->RefCount == 1);  		_swsetup_DestroyContext(r300->radeon.glCtx);  		_tnl_ProgramCacheDestroy(r300->radeon.glCtx);  		_tnl_DestroyContext(r300->radeon.glCtx); @@ -482,7 +503,8 @@ void r300DestroyContext(__DRIcontextPrivate * driContextPriv)  		_swrast_DestroyContext(r300->radeon.glCtx);  		if (r300->dma.current.buf) { -			r300ReleaseDmaRegion(r300, &r300->dma.current, __FUNCTION__ ); +			r300ReleaseDmaRegion(r300, &r300->dma.current, +					     __FUNCTION__);  #ifndef USER_BUFFERS  			r300FlushCmdBuf(r300, __FUNCTION__);  #endif diff --git a/src/mesa/drivers/dri/r300/r300_context.h b/src/mesa/drivers/dri/r300/r300_context.h index 0473bc23be..4cc3352ab0 100644 --- a/src/mesa/drivers/dri/r300/r300_context.h +++ b/src/mesa/drivers/dri/r300/r300_context.h @@ -97,13 +97,15 @@ typedef struct r300_context *r300ContextPtr;  static __inline__ uint32_t r300PackFloat32(float fl)  { -	union { float fl; uint32_t u; } u; +	union { +		float fl; +		uint32_t u; +	} u;  	u.fl = fl;  	return u.u;  } -  /************ DMA BUFFERS **************/  /* Need refcounting on dma buffers: @@ -128,10 +130,10 @@ struct r300_dma_region {  	char *address;		/* == buf->address */  	int start, end, ptr;	/* offsets from start of buf */ -    int aos_offset;     /* address in GART memory */ -    int aos_stride;     /* distance between elements, in dwords */ -    int aos_size;       /* number of components (1-4) */ -    int aos_reg;        /* VAP register assignment */ +	int aos_offset;		/* address in GART memory */ +	int aos_stride;		/* distance between elements, in dwords */ +	int aos_size;		/* number of components (1-4) */ +	int aos_reg;		/* VAP register assignment */  };  struct r300_dma { @@ -173,16 +175,15 @@ struct r300_tex_obj {  	drm_radeon_tex_image_t image[6][RADEON_MAX_TEXTURE_LEVELS];  	/* Six, for the cube faces */ - -	GLuint pitch; /* this isn't sent to hardware just used in calculations */ +	GLuint pitch;		/* this isn't sent to hardware just used in calculations */  	/* hardware register values */  	/* Note that R200 has 8 registers per texture and R300 only 7 */  	GLuint filter;  	GLuint filter_1;  	GLuint pitch_reg; -	GLuint size;	/* npot only */ +	GLuint size;		/* npot only */  	GLuint format; -	GLuint offset;	/* Image location in the card's address space. +	GLuint offset;		/* Image location in the card's address space.  				   All cube faces follow. */  	GLuint unknown4;  	GLuint unknown5; @@ -196,10 +197,9 @@ struct r300_tex_obj {  	GLuint pp_cubic_faces;	/* cube face 1,2,3,4 log2 sizes */  	GLuint format_x; -  	GLboolean border_fallback; -	GLuint tile_bits; /* hw texture tile bits used on this texture */ +	GLuint tile_bits;	/* hw texture tile bits used on this texture */  };  struct r300_texture_env_state { @@ -208,7 +208,6 @@ struct r300_texture_env_state {  	GLenum envMode;  }; -  /* The blit width for texture uploads   */  #define R300_BLIT_WIDTH_BYTES 1024 @@ -216,7 +215,7 @@ struct r300_texture_env_state {  struct r300_texture_state {  	struct r300_texture_env_state unit[R300_MAX_TEXTURE_UNITS]; -	int tc_count; /* number of incoming texture coordinates from VAP */ +	int tc_count;		/* number of incoming texture coordinates from VAP */  };  /** @@ -228,16 +227,15 @@ struct r300_texture_state {   */  struct r300_state_atom {  	struct r300_state_atom *next, *prev; -	const char* name;	/* for debug */ +	const char *name;	/* for debug */  	int cmd_size;		/* maximum size in dwords */  	GLuint idx;		/* index in an array (e.g. textures) */ -	uint32_t* cmd; +	uint32_t *cmd;  	GLboolean dirty; -	int (*check)(r300ContextPtr, struct r300_state_atom* atom); +	int (*check) (r300ContextPtr, struct r300_state_atom * atom);  }; -  #define R300_VPT_CMD_0		0  #define R300_VPT_XSCALE		1  #define R300_VPT_XOFFSET	2 @@ -247,7 +245,7 @@ struct r300_state_atom {  #define R300_VPT_ZOFFSET	6  #define R300_VPT_CMDSIZE	7 -#define R300_VIR_CMD_0		0 /* vir is variable size (at least 1) */ +#define R300_VIR_CMD_0		0	/* vir is variable size (at least 1) */  #define R300_VIR_CNTL_0		1  #define R300_VIR_CNTL_1		2  #define R300_VIR_CNTL_2		3 @@ -268,7 +266,6 @@ struct r300_state_atom {  #define R300_VOF_CNTL_1		2  #define R300_VOF_CMDSIZE	3 -  #define R300_PVS_CMD_0		0  #define R300_PVS_CNTL_1		1  #define R300_PVS_CNTL_2		2 @@ -318,7 +315,7 @@ struct r300_state_atom {  #define R300_RI_INTERP_7	8  #define R300_RI_CMDSIZE		9 -#define R300_RR_CMD_0		0 /* rr is variable size (at least 1) */ +#define R300_RR_CMD_0		0	/* rr is variable size (at least 1) */  #define R300_RR_ROUTE_0		1  #define R300_RR_ROUTE_1		2  #define R300_RR_ROUTE_2		3 @@ -400,11 +397,11 @@ struct r300_state_atom {  #define R300_VPI_CMD_0		0  #define R300_VPI_INSTR_0	1 -#define R300_VPI_CMDSIZE	1025 /* 256 16 byte instructions */ +#define R300_VPI_CMDSIZE	1025	/* 256 16 byte instructions */  #define R300_VPP_CMD_0		0  #define R300_VPP_PARAM_0	1 -#define R300_VPP_CMDSIZE	1025 /* 256 4-component parameters */ +#define R300_VPP_CMDSIZE	1025	/* 256 4-component parameters */  #define R300_VPS_CMD_0		0  #define R300_VPS_ZERO_0		1 @@ -426,54 +423,54 @@ struct r300_state_atom {  struct r300_hw_state {  	struct r300_state_atom atomlist; -	GLboolean	is_dirty; -	GLboolean	all_dirty; -	int		max_state_size;	/* in dwords */ +	GLboolean is_dirty; +	GLboolean all_dirty; +	int max_state_size;	/* in dwords */  	struct r300_state_atom vpt;	/* viewport (1D98) */  	struct r300_state_atom vap_cntl; -	struct r300_state_atom vof;     /* VAP output format register 0x2090 */ +	struct r300_state_atom vof;	/* VAP output format register 0x2090 */  	struct r300_state_atom vte;	/* (20B0) */  	struct r300_state_atom unk2134;	/* (2134) */  	struct r300_state_atom vap_cntl_status;  	struct r300_state_atom vir[2];	/* vap input route (2150/21E0) */  	struct r300_state_atom vic;	/* vap input control (2180) */ -	struct r300_state_atom unk21DC; /* (21DC) */ -	struct r300_state_atom unk221C; /* (221C) */ -	struct r300_state_atom unk2220; /* (2220) */ -	struct r300_state_atom unk2288; /* (2288) */ +	struct r300_state_atom unk21DC;	/* (21DC) */ +	struct r300_state_atom unk221C;	/* (221C) */ +	struct r300_state_atom unk2220;	/* (2220) */ +	struct r300_state_atom unk2288;	/* (2288) */  	struct r300_state_atom pvs;	/* pvs_cntl (22D0) */ -	struct r300_state_atom gb_enable; /* (4008) */ -	struct r300_state_atom gb_misc; /* Multisampling position shifts ? (4010) */ -	struct r300_state_atom unk4200; /* (4200) */ -	struct r300_state_atom unk4214; /* (4214) */ +	struct r300_state_atom gb_enable;	/* (4008) */ +	struct r300_state_atom gb_misc;	/* Multisampling position shifts ? (4010) */ +	struct r300_state_atom unk4200;	/* (4200) */ +	struct r300_state_atom unk4214;	/* (4214) */  	struct r300_state_atom ps;	/* pointsize (421C) */ -	struct r300_state_atom unk4230; /* (4230) */ +	struct r300_state_atom unk4230;	/* (4230) */  	struct r300_state_atom lcntl;	/* line control */ -	struct r300_state_atom unk4260; /* (4260) */ +	struct r300_state_atom unk4260;	/* (4260) */  	struct r300_state_atom shade;  	struct r300_state_atom polygon_mode;  	struct r300_state_atom fogp;	/* fog parameters (4294) */ -	struct r300_state_atom unk429C; /* (429C) */ +	struct r300_state_atom unk429C;	/* (429C) */  	struct r300_state_atom zbias_cntl;  	struct r300_state_atom zbs;	/* zbias (42A4) */  	struct r300_state_atom occlusion_cntl;  	struct r300_state_atom cul;	/* cull cntl (42B8) */ -	struct r300_state_atom unk42C0; /* (42C0) */ +	struct r300_state_atom unk42C0;	/* (42C0) */  	struct r300_state_atom rc;	/* rs control (4300) */  	struct r300_state_atom ri;	/* rs interpolators (4310) */  	struct r300_state_atom rr;	/* rs route (4330) */  	struct r300_state_atom unk43A4;	/* (43A4) */  	struct r300_state_atom unk43E8;	/* (43E8) */  	struct r300_state_atom fp;	/* fragment program cntl + nodes (4600) */ -	struct r300_state_atom fpt;     /* texi - (4620) */ +	struct r300_state_atom fpt;	/* texi - (4620) */  	struct r300_state_atom unk46A4;	/* (46A4) */  	struct r300_state_atom fpi[4];	/* fp instructions (46C0/47C0/48C0/49C0) */  	struct r300_state_atom fogs;	/* fog state (4BC0) */  	struct r300_state_atom fogc;	/* fog color (4BC8) */  	struct r300_state_atom at;	/* alpha test (4BD4) */  	struct r300_state_atom unk4BD8;	/* (4BD8) */ -	struct r300_state_atom fpp;     /* 0x4C00 and following */ +	struct r300_state_atom fpp;	/* 0x4C00 and following */  	struct r300_state_atom unk4E00;	/* (4E00) */  	struct r300_state_atom bld;	/* blending (4E04) */  	struct r300_state_atom cmk;	/* colormask (4E0C) */ @@ -493,11 +490,11 @@ struct r300_hw_state {  	struct r300_state_atom vpi;	/* vp instructions */  	struct r300_state_atom vpp;	/* vp parameters */  	struct r300_state_atom vps;	/* vertex point size (?) */ -		/* 8 texture units */ -		/* the state is grouped by function and not by -		   texture unit. This makes single unit updates -		   really awkward - we are much better off -		   updating the whole thing at once */ +	/* 8 texture units */ +	/* the state is grouped by function and not by +	   texture unit. This makes single unit updates +	   really awkward - we are much better off +	   updating the whole thing at once */  	struct {  		struct r300_state_atom filter;  		struct r300_state_atom filter_1; @@ -507,11 +504,10 @@ struct r300_hw_state {  		struct r300_state_atom offset;  		struct r300_state_atom chroma_key;  		struct r300_state_atom border_color; -		} tex; +	} tex;  	struct r300_state_atom txe;	/* tex enable (4104) */  }; -  /**   * This structure holds the command buffer while it is being constructed.   * @@ -520,13 +516,12 @@ struct r300_hw_state {   * otherwise.   */  struct r300_cmdbuf { -	int		size;		/* DWORDs allocated for buffer */ -	uint32_t*	cmd_buf; -	int		count_used;	/* DWORDs filled so far */ -	int		count_reemit;	/* size of re-emission batch */ +	int size;		/* DWORDs allocated for buffer */ +	uint32_t *cmd_buf; +	int count_used;		/* DWORDs filled so far */ +	int count_reemit;	/* size of re-emission batch */  }; -  /**   * State cache   */ @@ -558,9 +553,9 @@ struct r300_vertex_shader_fragment {  	union {  		GLuint d[VSF_MAX_FRAGMENT_LENGTH];  		float f[VSF_MAX_FRAGMENT_LENGTH]; -		VERTEX_SHADER_INSTRUCTION i[VSF_MAX_FRAGMENT_LENGTH/4]; -		} body; -	}; +		VERTEX_SHADER_INSTRUCTION i[VSF_MAX_FRAGMENT_LENGTH / 4]; +	} body; +};  #define VSF_DEST_PROGRAM	0x0  #define VSF_DEST_MATRIX0	0x200 @@ -578,15 +573,15 @@ struct r300_vertex_shader_state {  	struct r300_vertex_shader_fragment unknown2;  	int program_start; -	int unknown_ptr1;  /* pointer within program space */ +	int unknown_ptr1;	/* pointer within program space */  	int program_end;  	int param_offset;  	int param_count; -	int unknown_ptr2;  /* pointer within program space */ -	int unknown_ptr3;  /* pointer within program space */ -	}; +	int unknown_ptr2;	/* pointer within program space */ +	int unknown_ptr3;	/* pointer within program space */ +};  extern int hw_tcl_on; @@ -596,7 +591,6 @@ extern int hw_tcl_on;  /* Should but doesnt work */  //#define CURRENT_VERTEX_SHADER(ctx) (R300_CONTEXT(ctx)->curr_vp) -  /* r300_vertex_shader_state and r300_vertex_program should probably be merged together someday.   * Keeping them them seperate for now should ensure fixed pipeline keeps functioning properly.   */ @@ -614,7 +608,7 @@ struct r300_vertex_program {  	struct r300_vertex_shader_fragment program;  	int pos_end; -	int num_temporaries; /* Number of temp vars used by program */ +	int num_temporaries;	/* Number of temp vars used by program */  	int wpos_idx;  	int inputs[VERT_ATTRIB_MAX];  	int outputs[VERT_RESULT_MAX]; @@ -624,7 +618,7 @@ struct r300_vertex_program {  };  struct r300_vertex_program_cont { -	struct gl_vertex_program mesa_program; /* Must be first */ +	struct gl_vertex_program mesa_program;	/* Must be first */  	struct r300_vertex_shader_fragment params;  	struct r300_vertex_program *progs;  }; @@ -637,8 +631,8 @@ struct r300_vertex_program_cont {  /* Mapping Mesa registers to R300 temporaries */  struct reg_acc { -       int reg;        /* Assigned hw temp */ -       unsigned int refcount; /* Number of uses by mesa program */ +	int reg;		/* Assigned hw temp */ +	unsigned int refcount;	/* Number of uses by mesa program */  };  /** @@ -669,7 +663,6 @@ struct reg_lifetime {  	int scalar_lastread;  }; -  /**   * Store usage information about an ALU instruction slot during the   * compilation of a fragment program. @@ -695,7 +688,7 @@ struct r300_pfs_compile_slot {   * Store information during compilation of fragment programs.   */  struct r300_pfs_compile_state { -	int nrslots;       /* number of ALU slots used so far */ +	int nrslots;		/* number of ALU slots used so far */  	/* Track which (parts of) slots are already filled with instructions */  	struct r300_pfs_compile_slot slot[PFS_MAX_ALU_INST]; @@ -706,7 +699,7 @@ struct r300_pfs_compile_state {  	/* Used to map Mesa's inputs/temps onto hardware temps */  	int temp_in_use;  	struct reg_acc temps[PFS_NUM_TEMP_REGS]; -	struct reg_acc inputs[32]; /* don't actually need 32... */ +	struct reg_acc inputs[32];	/* don't actually need 32... */  	/* Track usage of hardware temps, for register allocation,  	 * indirection detection, etc. */ @@ -762,7 +755,7 @@ struct r300_fragment_program {  	 * gl_program_parameter_list::ParameterValues, or a pointer to a  	 * global constant (e.g. for sin/cos-approximation)  	 */ -	const GLfloat* constant[PFS_NUM_CONST_REGS]; +	const GLfloat *constant[PFS_NUM_CONST_REGS];  	int const_nr;  	int max_temp_idx; @@ -792,12 +785,12 @@ struct radeon_vertex_buffer {  	int Count;  	void *Elts;  	int elt_size; -	int elt_min, elt_max; /* debug */ +	int elt_min, elt_max;	/* debug */  	struct dt AttribPtr[VERT_ATTRIB_MAX]; -	const struct _mesa_prim  *Primitive; -	GLuint      PrimitiveCount; +	const struct _mesa_prim *Primitive; +	GLuint PrimitiveCount;  	GLint LockFirst;  	GLsizei LockCount;  	int lock_uptodate; @@ -805,16 +798,16 @@ struct radeon_vertex_buffer {  struct r300_aos_rec {  	GLuint offset; -	int element_size; /* in dwords */ -	int stride;       /* distance between elements, in dwords */ +	int element_size;	/* in dwords */ +	int stride;		/* distance between elements, in dwords */  	int format; -	int ncomponents; /* number of components - between 1 and 4, inclusive */ +	int ncomponents;	/* number of components - between 1 and 4, inclusive */ -	int reg; /* which register they are assigned to. */ +	int reg;		/* which register they are assigned to. */ -	}; +};  struct r300_state {  	struct r300_depthbuffer_state depth; @@ -829,12 +822,12 @@ struct r300_state {  	GLuint *Elts;  	struct r300_dma_region elt_dma; -	DECLARE_RENDERINPUTS(render_inputs_bitset); /* actual render inputs that R300 was configured for. -				 They are the same as tnl->render_inputs for fixed pipeline */ +	 DECLARE_RENDERINPUTS(render_inputs_bitset);	/* actual render inputs that R300 was configured for. +							   They are the same as tnl->render_inputs for fixed pipeline */  	struct { -		int transform_offset;  /* Transform matrix offset, -1 if none */ -		} vap_param;  /* vertex processor parameter allocation - tells where to write parameters */ +		int transform_offset;	/* Transform matrix offset, -1 if none */ +	} vap_param;		/* vertex processor parameter allocation - tells where to write parameters */  	struct r300_stencilbuffer_state stencil; @@ -848,7 +841,7 @@ struct r300_state {   * R300 context structure.   */  struct r300_context { -	struct radeon_context radeon; /* parent class, must be first */ +	struct radeon_context radeon;	/* parent class, must be first */  	struct r300_hw_state hw;  	struct r300_cmdbuf cmdbuf; @@ -892,18 +885,17 @@ struct r300_buffer_object {  #define R300_CONTEXT(ctx)		((r300ContextPtr)(ctx->DriverCtx)) -static __inline GLuint r300PackColor( GLuint cpp, -					GLubyte r, GLubyte g, -					GLubyte b, GLubyte a ) +static __inline GLuint r300PackColor(GLuint cpp, +				     GLubyte r, GLubyte g, GLubyte b, GLubyte a)  { -   switch ( cpp ) { -   case 2: -      return PACK_COLOR_565( r, g, b ); -   case 4: -      return PACK_COLOR_8888( r, g, b, a ); -   default: -      return 0; -   } +	switch (cpp) { +	case 2: +		return PACK_COLOR_565(r, g, b); +	case 4: +		return PACK_COLOR_8888(r, g, b, a); +	default: +		return 0; +	}  }  extern void r300DestroyContext(__DRIcontextPrivate * driContextPriv);  extern GLboolean r300CreateContext(const __GLcontextModes * glVisual, @@ -914,11 +906,16 @@ extern int r300_get_num_verts(r300ContextPtr rmesa, int num_verts, int prim);  extern void r300_select_vertex_shader(r300ContextPtr r300);  extern void r300InitShaderFuncs(struct dd_function_table *functions); -extern int r300VertexProgUpdateParams(GLcontext *ctx, struct r300_vertex_program_cont *vp, float *dst); -extern int r300Fallback(GLcontext *ctx); +extern int r300VertexProgUpdateParams(GLcontext * ctx, +				      struct r300_vertex_program_cont *vp, +				      float *dst); +extern int r300Fallback(GLcontext * ctx); -extern void radeon_vb_to_rvb(r300ContextPtr rmesa, struct radeon_vertex_buffer *rvb, struct vertex_buffer *vb); -extern GLboolean r300_run_vb_render(GLcontext *ctx, struct tnl_pipeline_stage *stage); +extern void radeon_vb_to_rvb(r300ContextPtr rmesa, +			     struct radeon_vertex_buffer *rvb, +			     struct vertex_buffer *vb); +extern GLboolean r300_run_vb_render(GLcontext * ctx, +				    struct tnl_pipeline_stage *stage);  #ifdef RADEON_VTXFMT_A  extern void radeon_init_vtxfmt_a(r300ContextPtr rmesa); @@ -926,7 +923,7 @@ extern void radeon_init_vtxfmt_a(r300ContextPtr rmesa);  #ifdef HW_VBOS  extern void r300InitVBOFuncs(struct dd_function_table *functions); -extern void r300EvictVBOs(GLcontext *ctx, int amount); +extern void r300EvictVBOs(GLcontext * ctx, int amount);  #endif  #define RADEON_D_CAPTURE 0 | 
