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authorMichel Dänzer <michel@tungstengraphics.com>2007-03-09 17:52:29 +0100
committerMichel Dänzer <michel@tungstengraphics.com>2007-03-09 17:52:29 +0100
commit36b4e25da34691dffd6b147c8cf3d2598ec11ac7 (patch)
treeec3c6a7352d736da7a494dc25f779a8aed3e3ff9
parent81536789d2d2d92c687e9037cbb6f86b633ef839 (diff)
i915tex: Sync pages between pipes immediately again.
This should be safe now that we no longer use the MI_WAIT_FOR_EVENT instruction incorrectly and should also work correctly with applications that render to the front buffer.
-rw-r--r--src/mesa/drivers/dri/i915tex/intel_buffers.c14
1 files changed, 12 insertions, 2 deletions
diff --git a/src/mesa/drivers/dri/i915tex/intel_buffers.c b/src/mesa/drivers/dri/i915tex/intel_buffers.c
index 35236edc0c..174f3c6351 100644
--- a/src/mesa/drivers/dri/i915tex/intel_buffers.c
+++ b/src/mesa/drivers/dri/i915tex/intel_buffers.c
@@ -257,6 +257,8 @@ intelWindowMoved(struct intel_context *intel)
if (pf_pipes == 0x3 && pf_pipes != intel_fb->pf_pipes &&
(intel->sarea->pf_current_page & 0x3) !=
(((intel->sarea->pf_current_page) >> 2) & 0x3)) {
+ drm_i915_flip_t flip;
+
if (intel_fb->pf_current_page ==
(intel->sarea->pf_current_page & 0x3)) {
/* XXX: This is ugly, but emitting two flips 'in a row' can cause
@@ -265,13 +267,21 @@ intelWindowMoved(struct intel_context *intel)
intel->sarea->pf_current_page =
intel->sarea->pf_current_page & 0x3;
intel->sarea->pf_current_page |=
- intel->sarea->pf_current_page << 2;
+ ((intel_fb->pf_current_page + intel_fb->pf_num_pages - 1) %
+ intel_fb->pf_num_pages) << 2;
+
+ flip.pipes = 0x2;
} else {
intel->sarea->pf_current_page =
intel->sarea->pf_current_page & (0x3 << 2);
intel->sarea->pf_current_page |=
- intel->sarea->pf_current_page >> 2;
+ (intel_fb->pf_current_page + intel_fb->pf_num_pages - 1) %
+ intel_fb->pf_num_pages;
+
+ flip.pipes = 0x1;
}
+
+ drmCommandWrite(intel->driFd, DRM_I915_FLIP, &flip, sizeof(flip));
}
intel_fb->pf_pipes = pf_pipes;