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authorBrian <brian@yutani.localnet.net>2006-12-14 15:47:08 -0700
committerBrian <brian@yutani.localnet.net>2006-12-14 15:47:08 -0700
commit464b82b1e690b5ab690bd1673251e5b4edf69a62 (patch)
tree91a37b9190bfb9d4617124ffd857a20b35473dc2
parent865f88afc0d59d886fb2ad50429e584ecf17fa81 (diff)
Move some code from prog_print.c to prog_instruction.c
-rw-r--r--src/mesa/shader/prog_instruction.c112
-rw-r--r--src/mesa/shader/prog_print.c112
2 files changed, 112 insertions, 112 deletions
diff --git a/src/mesa/shader/prog_instruction.c b/src/mesa/shader/prog_instruction.c
index f4dae76de0..bebc3ecb69 100644
--- a/src/mesa/shader/prog_instruction.c
+++ b/src/mesa/shader/prog_instruction.c
@@ -97,3 +97,115 @@ _mesa_realloc_instructions(struct prog_instruction *oldInst,
}
+
+/**
+ * Basic info about each instruction
+ */
+struct instruction_info
+{
+ gl_inst_opcode Opcode;
+ const char *Name;
+ GLuint NumSrcRegs;
+};
+
+/**
+ * Instruction info
+ * \note Opcode should equal array index!
+ */
+static const struct instruction_info InstInfo[MAX_OPCODE] = {
+ { OPCODE_NOP, "NOP", 0 },
+ { OPCODE_ABS, "ABS", 1 },
+ { OPCODE_ADD, "ADD", 2 },
+ { OPCODE_ARA, "ARA", 1 },
+ { OPCODE_ARL, "ARL", 1 },
+ { OPCODE_ARL_NV, "ARL", 1 },
+ { OPCODE_ARR, "ARL", 1 },
+ { OPCODE_BRA, "BRA", 0 },
+ { OPCODE_CAL, "CAL", 0 },
+ { OPCODE_CMP, "CMP", 3 },
+ { OPCODE_COS, "COS", 1 },
+ { OPCODE_DDX, "DDX", 1 },
+ { OPCODE_DDY, "DDY", 1 },
+ { OPCODE_DP3, "DP3", 2 },
+ { OPCODE_DP4, "DP4", 2 },
+ { OPCODE_DPH, "DPH", 2 },
+ { OPCODE_DST, "DST", 2 },
+ { OPCODE_END, "END", 0 },
+ { OPCODE_EX2, "EX2", 1 },
+ { OPCODE_EXP, "EXP", 1 },
+ { OPCODE_FLR, "FLR", 1 },
+ { OPCODE_FRC, "FRC", 1 },
+ { OPCODE_KIL, "KIL", 1 },
+ { OPCODE_KIL_NV, "KIL", 0 },
+ { OPCODE_LG2, "LG2", 1 },
+ { OPCODE_LIT, "LIT", 1 },
+ { OPCODE_LOG, "LOG", 1 },
+ { OPCODE_LRP, "LRP", 3 },
+ { OPCODE_MAD, "MAD", 3 },
+ { OPCODE_MAX, "MAX", 2 },
+ { OPCODE_MIN, "MIN", 2 },
+ { OPCODE_MOV, "MOV", 1 },
+ { OPCODE_MUL, "MUL", 2 },
+ { OPCODE_PK2H, "PK2H", 1 },
+ { OPCODE_PK2US, "PK2US", 1 },
+ { OPCODE_PK4B, "PK4B", 1 },
+ { OPCODE_PK4UB, "PK4UB", 1 },
+ { OPCODE_POW, "POW", 2 },
+ { OPCODE_POPA, "POPA", 0 },
+ { OPCODE_PRINT, "PRINT", 1 },
+ { OPCODE_PUSHA, "PUSHA", 0 },
+ { OPCODE_RCC, "RCC", 1 },
+ { OPCODE_RCP, "RCP", 1 },
+ { OPCODE_RET, "RET", 0 },
+ { OPCODE_RFL, "RFL", 1 },
+ { OPCODE_RSQ, "RSQ", 1 },
+ { OPCODE_SCS, "SCS", 1 },
+ { OPCODE_SEQ, "SEQ", 2 },
+ { OPCODE_SFL, "SFL", 0 },
+ { OPCODE_SGE, "SGE", 2 },
+ { OPCODE_SGT, "SGT", 2 },
+ { OPCODE_SIN, "SIN", 1 },
+ { OPCODE_SLE, "SLE", 2 },
+ { OPCODE_SLT, "SLT", 2 },
+ { OPCODE_SNE, "SNE", 2 },
+ { OPCODE_SSG, "SSG", 1 },
+ { OPCODE_STR, "STR", 0 },
+ { OPCODE_SUB, "SUB", 2 },
+ { OPCODE_SWZ, "SWZ", 1 },
+ { OPCODE_TEX, "TEX", 1 },
+ { OPCODE_TXB, "TXB", 1 },
+ { OPCODE_TXD, "TXD", 3 },
+ { OPCODE_TXL, "TXL", 1 },
+ { OPCODE_TXP, "TXP", 1 },
+ { OPCODE_TXP_NV, "TXP", 1 },
+ { OPCODE_UP2H, "UP2H", 1 },
+ { OPCODE_UP2US, "UP2US", 1 },
+ { OPCODE_UP4B, "UP4B", 1 },
+ { OPCODE_UP4UB, "UP4UB", 1 },
+ { OPCODE_X2D, "X2D", 3 },
+ { OPCODE_XPD, "XPD", 2 }
+};
+
+
+/**
+ * Return the number of src registers for the given instruction/opcode.
+ */
+GLuint
+_mesa_num_inst_src_regs(gl_inst_opcode opcode)
+{
+ ASSERT(opcode == InstInfo[opcode].Opcode);
+ ASSERT(OPCODE_XPD == InstInfo[OPCODE_XPD].Opcode);
+ return InstInfo[opcode].NumSrcRegs;
+}
+
+
+/**
+ * Return string name for given program opcode.
+ */
+const char *
+_mesa_opcode_string(gl_inst_opcode opcode)
+{
+ ASSERT(opcode < MAX_OPCODE);
+ return InstInfo[opcode].Name;
+}
+
diff --git a/src/mesa/shader/prog_print.c b/src/mesa/shader/prog_print.c
index eded71bbae..1453c3bb88 100644
--- a/src/mesa/shader/prog_print.c
+++ b/src/mesa/shader/prog_print.c
@@ -39,118 +39,6 @@
#include "prog_statevars.h"
-
-/**
- * Basic info about each instruction
- */
-struct instruction_info
-{
- gl_inst_opcode Opcode;
- const char *Name;
- GLuint NumSrcRegs;
-};
-
-/**
- * Instruction info
- * \note Opcode should equal array index!
- */
-static const struct instruction_info InstInfo[MAX_OPCODE] = {
- { OPCODE_NOP, "NOP", 0 },
- { OPCODE_ABS, "ABS", 1 },
- { OPCODE_ADD, "ADD", 2 },
- { OPCODE_ARA, "ARA", 1 },
- { OPCODE_ARL, "ARL", 1 },
- { OPCODE_ARL_NV, "ARL", 1 },
- { OPCODE_ARR, "ARL", 1 },
- { OPCODE_BRA, "BRA", 0 },
- { OPCODE_CAL, "CAL", 0 },
- { OPCODE_CMP, "CMP", 3 },
- { OPCODE_COS, "COS", 1 },
- { OPCODE_DDX, "DDX", 1 },
- { OPCODE_DDY, "DDY", 1 },
- { OPCODE_DP3, "DP3", 2 },
- { OPCODE_DP4, "DP4", 2 },
- { OPCODE_DPH, "DPH", 2 },
- { OPCODE_DST, "DST", 2 },
- { OPCODE_END, "END", 0 },
- { OPCODE_EX2, "EX2", 1 },
- { OPCODE_EXP, "EXP", 1 },
- { OPCODE_FLR, "FLR", 1 },
- { OPCODE_FRC, "FRC", 1 },
- { OPCODE_KIL, "KIL", 1 },
- { OPCODE_KIL_NV, "KIL", 0 },
- { OPCODE_LG2, "LG2", 1 },
- { OPCODE_LIT, "LIT", 1 },
- { OPCODE_LOG, "LOG", 1 },
- { OPCODE_LRP, "LRP", 3 },
- { OPCODE_MAD, "MAD", 3 },
- { OPCODE_MAX, "MAX", 2 },
- { OPCODE_MIN, "MIN", 2 },
- { OPCODE_MOV, "MOV", 1 },
- { OPCODE_MUL, "MUL", 2 },
- { OPCODE_PK2H, "PK2H", 1 },
- { OPCODE_PK2US, "PK2US", 1 },
- { OPCODE_PK4B, "PK4B", 1 },
- { OPCODE_PK4UB, "PK4UB", 1 },
- { OPCODE_POW, "POW", 2 },
- { OPCODE_POPA, "POPA", 0 },
- { OPCODE_PRINT, "PRINT", 1 },
- { OPCODE_PUSHA, "PUSHA", 0 },
- { OPCODE_RCC, "RCC", 1 },
- { OPCODE_RCP, "RCP", 1 },
- { OPCODE_RET, "RET", 0 },
- { OPCODE_RFL, "RFL", 1 },
- { OPCODE_RSQ, "RSQ", 1 },
- { OPCODE_SCS, "SCS", 1 },
- { OPCODE_SEQ, "SEQ", 2 },
- { OPCODE_SFL, "SFL", 0 },
- { OPCODE_SGE, "SGE", 2 },
- { OPCODE_SGT, "SGT", 2 },
- { OPCODE_SIN, "SIN", 1 },
- { OPCODE_SLE, "SLE", 2 },
- { OPCODE_SLT, "SLT", 2 },
- { OPCODE_SNE, "SNE", 2 },
- { OPCODE_SSG, "SSG", 1 },
- { OPCODE_STR, "STR", 0 },
- { OPCODE_SUB, "SUB", 2 },
- { OPCODE_SWZ, "SWZ", 1 },
- { OPCODE_TEX, "TEX", 1 },
- { OPCODE_TXB, "TXB", 1 },
- { OPCODE_TXD, "TXD", 3 },
- { OPCODE_TXL, "TXL", 1 },
- { OPCODE_TXP, "TXP", 1 },
- { OPCODE_TXP_NV, "TXP", 1 },
- { OPCODE_UP2H, "UP2H", 1 },
- { OPCODE_UP2US, "UP2US", 1 },
- { OPCODE_UP4B, "UP4B", 1 },
- { OPCODE_UP4UB, "UP4UB", 1 },
- { OPCODE_X2D, "X2D", 3 },
- { OPCODE_XPD, "XPD", 2 }
-};
-
-
-/**
- * Return the number of src registers for the given instruction/opcode.
- */
-GLuint
-_mesa_num_inst_src_regs(gl_inst_opcode opcode)
-{
- ASSERT(opcode == InstInfo[opcode].Opcode);
- ASSERT(OPCODE_XPD == InstInfo[OPCODE_XPD].Opcode);
- return InstInfo[opcode].NumSrcRegs;
-}
-
-
-/**
- * Return string name for given program opcode.
- */
-const char *
-_mesa_opcode_string(gl_inst_opcode opcode)
-{
- ASSERT(opcode < MAX_OPCODE);
- return InstInfo[opcode].Name;
-}
-
/**
* Return string name for given program/register file.
*/