diff options
author | Michel Dänzer <michel@tungstengraphics.com> | 2007-03-09 20:00:13 +0100 |
---|---|---|
committer | Michel Dänzer <michel@tungstengraphics.com> | 2007-03-09 20:00:13 +0100 |
commit | 6e0878becfbf211e5bbd141cd3441dfbdb206cc8 (patch) | |
tree | a7fc1957afc98b4bec58833fc96e8ecee95c7f45 | |
parent | bb0760ca4f1759eb3c237045f464da4ad60eef83 (diff) |
i915tex: Wait for pending scheduled flips before switching vsync pipe.
This avoids hangs when the vblank sequence numbers are not in sync between
pipes, in particular when they run at different refresh rates.
-rw-r--r-- | src/mesa/drivers/dri/i915tex/intel_buffers.c | 19 |
1 files changed, 19 insertions, 0 deletions
diff --git a/src/mesa/drivers/dri/i915tex/intel_buffers.c b/src/mesa/drivers/dri/i915tex/intel_buffers.c index 174f3c6351..164395719c 100644 --- a/src/mesa/drivers/dri/i915tex/intel_buffers.c +++ b/src/mesa/drivers/dri/i915tex/intel_buffers.c @@ -300,8 +300,27 @@ intelWindowMoved(struct intel_context *intel) } if (flags != intel_fb->vblank_flags) { + drmVBlank vbl; + int i; + + vbl.request.type = DRM_VBLANK_ABSOLUTE; + + if ( intel_fb->vblank_flags & VBLANK_FLAG_SECONDARY ) { + vbl.request.type |= DRM_VBLANK_SECONDARY; + } + + for (i = 0; i < intel_fb->pf_num_pages; i++) { + vbl.request.sequence = intel_fb->color_rb[i]->vbl_pending; + drmWaitVBlank(intel->driFd, &vbl); + } + intel_fb->vblank_flags = flags; driGetCurrentVBlank(dPriv, intel_fb->vblank_flags, &intel_fb->vbl_seq); + intel_fb->vbl_waited = intel_fb->vbl_seq; + + for (i = 0; i < intel_fb->pf_num_pages; i++) { + intel_fb->color_rb[i]->vbl_pending = intel_fb->vbl_waited; + } } } else { intel_fb->vblank_flags &= ~VBLANK_FLAG_SECONDARY; |