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authorBen Skeggs <skeggsb@gmail.com>2008-02-16 02:42:06 +1100
committerBen Skeggs <skeggsb@gmail.com>2008-02-16 02:42:06 +1100
commit6e3e5ba3bb25183efafcf78d6794fc50236c2835 (patch)
tree15ab0d571a95c0f8e7c55b842f832af9aae3efc2
parente82eabaf5e6cb91984476a991ec24e8105989dc4 (diff)
nv40: over-zealous s/
-rw-r--r--src/mesa/pipe/nv40/nv40_vbo.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/mesa/pipe/nv40/nv40_vbo.c b/src/mesa/pipe/nv40/nv40_vbo.c
index a18d0f9b25..6b1ac65b49 100644
--- a/src/mesa/pipe/nv40/nv40_vbo.c
+++ b/src/mesa/pipe/nv40/nv40_vbo.c
@@ -296,7 +296,7 @@ nv40_draw_elements_u32(struct nv40_context *nv40, void *ib,
}
static boolean
-nv40_draw_elements_INLINE(struct pipe_context *pipe,
+nv40_draw_elements_inline(struct pipe_context *pipe,
struct pipe_buffer *ib, unsigned ib_size,
unsigned mode, unsigned start, unsigned count)
{
@@ -410,7 +410,7 @@ nv40_draw_elements(struct pipe_context *pipe,
* to be support on any chipset for 8-bit indices.
*/
if (nv40->hw->curie->grclass == NV44TCL || indexSize == 1) {
- nv40_draw_elements_INLINE(pipe, indexBuffer, indexSize,
+ nv40_draw_elements_inline(pipe, indexBuffer, indexSize,
mode, start, count);
} else {
nv40_draw_elements_vbo(pipe, indexBuffer, indexSize,