nv30, nv40: non-trivially unify nv[34]0_fragprog.c

The files are mostly the same except:
1. On NV40, some TGSI instructions are emulated with several hardware ones
2. Some instructions such as DDX/DDY, and STR were missing from nv30
3. NV40 has more sophisticated register management

nv30 now supports all instructions and uses the nv40 register management.

11 files changed, 99 insertions, 981 deletions

diff --git a/src/gallium/drivers/nv30/Makefile b/src/gallium/drivers/nv30/Makefile
index b5728a34f8..196cc9a1ef 100644
--- a/src/gallium/drivers/nv30/Makefile
+++ b/src/gallium/drivers/nv30/Makefile
@@ -6,7 +6,6 @@ LIBNAME = nv30
 C_SOURCES = \
 	nv30_context.c \
 	nv30_draw.c \
-	nv30_fragprog.c \
 	nv30_fragtex.c \
 	nv30_screen.c \
 	nv30_state.c \
diff --git a/src/gallium/drivers/nv30/nv30_context.h b/src/gallium/drivers/nv30/nv30_context.h
index c203425cc9..7840318363 100644
--- a/src/gallium/drivers/nv30/nv30_context.h
+++ b/src/gallium/drivers/nv30/nv30_context.h
@@ -12,15 +12,10 @@ extern struct draw_stage *nv30_draw_render_stage(struct nvfx_context *nvfx);
 extern void nv30_vertprog_destroy(struct nvfx_context *,
 				  struct nvfx_vertex_program *);
 
-/* nv30_fragprog.c */
-extern void nv30_fragprog_destroy(struct nvfx_context *,
-				  struct nvfx_fragment_program *);
-
 /* nv30_fragtex.c */
 extern void nv30_fragtex_bind(struct nvfx_context *);
 
 /* nv30_state.c and friends */
-extern struct nvfx_state_entry nv30_state_fragprog;
 extern struct nvfx_state_entry nv30_state_vertprog;
 extern struct nvfx_state_entry nv30_state_fragtex;
 extern struct nvfx_state_entry nv30_state_vbo;
diff --git a/src/gallium/drivers/nv30/nv30_fragprog.c b/src/gallium/drivers/nv30/nv30_fragprog.c
deleted file mode 100644
index 4ce16b8f0e..0000000000
--- a/src/gallium/drivers/nv30/nv30_fragprog.c
+++ /dev/null
@@ -1,903 +0,0 @@
-#include "pipe/p_context.h"
-#include "pipe/p_defines.h"
-#include "pipe/p_state.h"
-#include "util/u_inlines.h"
-
-#include "pipe/p_shader_tokens.h"
-#include "tgsi/tgsi_dump.h"
-#include "tgsi/tgsi_parse.h"
-#include "tgsi/tgsi_util.h"
-
-#include "nv30_context.h"
-
-#define SWZ_X 0
-#define SWZ_Y 1
-#define SWZ_Z 2
-#define SWZ_W 3
-#define MASK_X 1
-#define MASK_Y 2
-#define MASK_Z 4
-#define MASK_W 8
-#define MASK_ALL (MASK_X|MASK_Y|MASK_Z|MASK_W)
-#define DEF_SCALE NVFX_FP_OP_DST_SCALE_1X
-#define DEF_CTEST NVFX_FP_OP_COND_TR
-#include "nvfx_shader.h"
-
-#define swz(s,x,y,z,w) nvfx_sr_swz((s), SWZ_##x, SWZ_##y, SWZ_##z, SWZ_##w)
-#define neg(s) nvfx_sr_neg((s))
-#define abs(s) nvfx_sr_abs((s))
-#define scale(s,v) nvfx_sr_scale((s), NVFX_FP_OP_DST_SCALE_##v)
-
-#define MAX_CONSTS 128
-#define MAX_IMM 32
-struct nv30_fpc {
-	struct nvfx_fragment_program *fp;
-
-	uint attrib_map[PIPE_MAX_SHADER_INPUTS];
-
-	int high_temp;
-	int temp_temp_count;
-	int num_regs;
-
-	uint depth_id;
-	uint colour_id;
-
-	unsigned inst_offset;
-
-	struct {
-		int pipe;
-		float vals[4];
-	} consts[MAX_CONSTS];
-	int nr_consts;
-
-	struct nvfx_sreg imm[MAX_IMM];
-	unsigned nr_imm;
-};
-
-static INLINE struct nvfx_sreg
-temp(struct nv30_fpc *fpc)
-{
-	int idx;
-
-	idx  = fpc->temp_temp_count++;
-	idx += fpc->high_temp + 1;
-	return nvfx_sr(NVFXSR_TEMP, idx);
-}
-
-static INLINE struct nvfx_sreg
-constant(struct nv30_fpc *fpc, int pipe, float vals[4])
-{
-	int idx;
-
-	if (fpc->nr_consts == MAX_CONSTS)
-		assert(0);
-	idx = fpc->nr_consts++;
-
-	fpc->consts[idx].pipe = pipe;
-	if (pipe == -1)
-		memcpy(fpc->consts[idx].vals, vals, 4 * sizeof(float));
-	return nvfx_sr(NVFXSR_CONST, idx);
-}
-
-#define arith(cc,s,o,d,m,s0,s1,s2) \
-	nv30_fp_arith((cc), (s), NVFX_FP_OP_OPCODE_##o, \
-			(d), (m), (s0), (s1), (s2))
-#define tex(cc,s,o,u,d,m,s0,s1,s2) \
-	nv30_fp_tex((cc), (s), NVFX_FP_OP_OPCODE_##o, (u), \
-		    (d), (m), (s0), none, none)
-
-static void
-grow_insns(struct nv30_fpc *fpc, int size)
-{
-	struct nvfx_fragment_program *fp = fpc->fp;
-
-	fp->insn_len += size;
-	fp->insn = realloc(fp->insn, sizeof(uint32_t) * fp->insn_len);
-}
-
-static void
-emit_src(struct nv30_fpc *fpc, int pos, struct nvfx_sreg src)
-{
-	struct nvfx_fragment_program *fp = fpc->fp;
-	uint32_t *hw = &fp->insn[fpc->inst_offset];
-	uint32_t sr = 0;
-
-	switch (src.type) {
-	case NVFXSR_INPUT:
-		sr |= (NVFX_FP_REG_TYPE_INPUT << NVFX_FP_REG_TYPE_SHIFT);
-		hw[0] |= (src.index << NVFX_FP_OP_INPUT_SRC_SHIFT);
-		break;
-	case NVFXSR_OUTPUT:
-		sr |= NVFX_FP_REG_SRC_HALF;
-		/* fall-through */
-	case NVFXSR_TEMP:
-		sr |= (NVFX_FP_REG_TYPE_TEMP << NVFX_FP_REG_TYPE_SHIFT);
-		sr |= (src.index << NVFX_FP_REG_SRC_SHIFT);
-		break;
-	case NVFXSR_CONST:
-		grow_insns(fpc, 4);
-		hw = &fp->insn[fpc->inst_offset];
-		if (fpc->consts[src.index].pipe >= 0) {
-			struct nvfx_fragment_program_data *fpd;
-
-			fp->consts = realloc(fp->consts, ++fp->nr_consts *
-					     sizeof(*fpd));
-			fpd = &fp->consts[fp->nr_consts - 1];
-			fpd->offset = fpc->inst_offset + 4;
-			fpd->index = fpc->consts[src.index].pipe;
-			memset(&fp->insn[fpd->offset], 0, sizeof(uint32_t) * 4);
-		} else {
-			memcpy(&fp->insn[fpc->inst_offset + 4],
-				fpc->consts[src.index].vals,
-				sizeof(uint32_t) * 4);
-		}
-
-		sr |= (NVFX_FP_REG_TYPE_CONST << NVFX_FP_REG_TYPE_SHIFT);
-		break;
-	case NVFXSR_NONE:
-		sr |= (NVFX_FP_REG_TYPE_INPUT << NVFX_FP_REG_TYPE_SHIFT);
-		break;
-	default:
-		assert(0);
-	}
-
-	if (src.negate)
-		sr |= NVFX_FP_REG_NEGATE;
-
-	if (src.abs)
-		hw[1] |= (1 << (29 + pos));
-
-	sr |= ((src.swz[0] << NVFX_FP_REG_SWZ_X_SHIFT) |
-	       (src.swz[1] << NVFX_FP_REG_SWZ_Y_SHIFT) |
-	       (src.swz[2] << NVFX_FP_REG_SWZ_Z_SHIFT) |
-	       (src.swz[3] << NVFX_FP_REG_SWZ_W_SHIFT));
-
-	hw[pos + 1] |= sr;
-}
-
-static void
-emit_dst(struct nv30_fpc *fpc, struct nvfx_sreg dst)
-{
-	struct nvfx_fragment_program *fp = fpc->fp;
-	uint32_t *hw = &fp->insn[fpc->inst_offset];
-
-	switch (dst.type) {
-	case NVFXSR_TEMP:
-		if (fpc->num_regs < (dst.index + 1))
-			fpc->num_regs = dst.index + 1;
-		break;
-	case NVFXSR_OUTPUT:
-		if (dst.index == 1) {
-			fp->fp_control |= 0xe;
-		} else {
-			hw[0] |= NVFX_FP_OP_OUT_REG_HALF;
-		}
-		break;
-	case NVFXSR_NONE:
-		hw[0] |= (1 << 30);
-		break;
-	default:
-		assert(0);
-	}
-
-	hw[0] |= (dst.index << NVFX_FP_OP_OUT_REG_SHIFT);
-}
-
-static void
-nv30_fp_arith(struct nv30_fpc *fpc, int sat, int op,
-	      struct nvfx_sreg dst, int mask,
-	      struct nvfx_sreg s0, struct nvfx_sreg s1, struct nvfx_sreg s2)
-{
-	struct nvfx_fragment_program *fp = fpc->fp;
-	uint32_t *hw;
-
-	fpc->inst_offset = fp->insn_len;
-	grow_insns(fpc, 4);
-	hw = &fp->insn[fpc->inst_offset];
-	memset(hw, 0, sizeof(uint32_t) * 4);
-
-	if (op == NVFX_FP_OP_OPCODE_KIL)
-		fp->fp_control |= NV34TCL_FP_CONTROL_USES_KIL;
-	hw[0] |= (op << NVFX_FP_OP_OPCODE_SHIFT);
-	hw[0] |= (mask << NVFX_FP_OP_OUTMASK_SHIFT);
-	hw[2] |= (dst.dst_scale << NVFX_FP_OP_DST_SCALE_SHIFT);
-
-	if (sat)
-		hw[0] |= NVFX_FP_OP_OUT_SAT;
-
-	if (dst.cc_update)
-		hw[0] |= NVFX_FP_OP_COND_WRITE_ENABLE;
-	hw[1] |= (dst.cc_test << NVFX_FP_OP_COND_SHIFT);
-	hw[1] |= ((dst.cc_swz[0] << NVFX_FP_OP_COND_SWZ_X_SHIFT) |
-		  (dst.cc_swz[1] << NVFX_FP_OP_COND_SWZ_Y_SHIFT) |
-		  (dst.cc_swz[2] << NVFX_FP_OP_COND_SWZ_Z_SHIFT) |
-		  (dst.cc_swz[3] << NVFX_FP_OP_COND_SWZ_W_SHIFT));
-
-	emit_dst(fpc, dst);
-	emit_src(fpc, 0, s0);
-	emit_src(fpc, 1, s1);
-	emit_src(fpc, 2, s2);
-}
-
-static void
-nv30_fp_tex(struct nv30_fpc *fpc, int sat, int op, int unit,
-	    struct nvfx_sreg dst, int mask,
-	    struct nvfx_sreg s0, struct nvfx_sreg s1, struct nvfx_sreg s2)
-{
-	struct nvfx_fragment_program *fp = fpc->fp;
-
-	nv30_fp_arith(fpc, sat, op, dst, mask, s0, s1, s2);
-
-	fp->insn[fpc->inst_offset] |= (unit << NVFX_FP_OP_TEX_UNIT_SHIFT);
-	fp->samplers |= (1 << unit);
-}
-
-static INLINE struct nvfx_sreg
-tgsi_src(struct nv30_fpc *fpc, const struct tgsi_full_src_register *fsrc)
-{
-	struct nvfx_sreg src;
-
-	switch (fsrc->Register.File) {
-	case TGSI_FILE_INPUT:
-		src = nvfx_sr(NVFXSR_INPUT,
-			      fpc->attrib_map[fsrc->Register.Index]);
-		break;
-	case TGSI_FILE_CONSTANT:
-		src = constant(fpc, fsrc->Register.Index, NULL);
-		break;
-	case TGSI_FILE_IMMEDIATE:
-		assert(fsrc->Register.Index < fpc->nr_imm);
-		src = fpc->imm[fsrc->Register.Index];
-		break;
-	case TGSI_FILE_TEMPORARY:
-		src = nvfx_sr(NVFXSR_TEMP, fsrc->Register.Index + 1);
-		if (fpc->high_temp < src.index)
-			fpc->high_temp = src.index;
-		break;
-	/* This is clearly insane, but gallium hands us shaders like this.
-	 * Luckily fragprog results are just temp regs..
-	 */
-	case TGSI_FILE_OUTPUT:
-		if (fsrc->Register.Index == fpc->colour_id)
-			return nvfx_sr(NVFXSR_OUTPUT, 0);
-		else
-			return nvfx_sr(NVFXSR_OUTPUT, 1);
-		break;
-	default:
-		NOUVEAU_ERR("bad src file\n");
-		break;
-	}
-
-	src.abs = fsrc->Register.Absolute;
-	src.negate = fsrc->Register.Negate;
-	src.swz[0] = fsrc->Register.SwizzleX;
-	src.swz[1] = fsrc->Register.SwizzleY;
-	src.swz[2] = fsrc->Register.SwizzleZ;
-	src.swz[3] = fsrc->Register.SwizzleW;
-	return src;
-}
-
-static INLINE struct nvfx_sreg
-tgsi_dst(struct nv30_fpc *fpc, const struct tgsi_full_dst_register *fdst) {
-	int idx;
-
-	switch (fdst->Register.File) {
-	case TGSI_FILE_OUTPUT:
-		if (fdst->Register.Index == fpc->colour_id)
-			return nvfx_sr(NVFXSR_OUTPUT, 0);
-		else
-			return nvfx_sr(NVFXSR_OUTPUT, 1);
-		break;
-	case TGSI_FILE_TEMPORARY:
-		idx = fdst->Register.Index + 1;
-		if (fpc->high_temp < idx)
-			fpc->high_temp = idx;
-		return nvfx_sr(NVFXSR_TEMP, idx);
-	case TGSI_FILE_NULL:
-		return nvfx_sr(NVFXSR_NONE, 0);
-	default:
-		NOUVEAU_ERR("bad dst file %d\n", fdst->Register.File);
-		return nvfx_sr(NVFXSR_NONE, 0);
-	}
-}
-
-static INLINE int
-tgsi_mask(uint tgsi)
-{
-	int mask = 0;
-
-	if (tgsi & TGSI_WRITEMASK_X) mask |= MASK_X;
-	if (tgsi & TGSI_WRITEMASK_Y) mask |= MASK_Y;
-	if (tgsi & TGSI_WRITEMASK_Z) mask |= MASK_Z;
-	if (tgsi & TGSI_WRITEMASK_W) mask |= MASK_W;
-	return mask;
-}
-
-static boolean
-src_native_swz(struct nv30_fpc *fpc, const struct tgsi_full_src_register *fsrc,
-	       struct nvfx_sreg *src)
-{
-	const struct nvfx_sreg none = nvfx_sr(NVFXSR_NONE, 0);
-	struct nvfx_sreg tgsi = tgsi_src(fpc, fsrc);
-	uint mask = 0;
-	uint c;
-
-	for (c = 0; c < 4; c++) {
-		switch (tgsi_util_get_full_src_register_swizzle(fsrc, c)) {
-		case TGSI_SWIZZLE_X:
-		case TGSI_SWIZZLE_Y:
-		case TGSI_SWIZZLE_Z:
-		case TGSI_SWIZZLE_W:
-			mask |= (1 << c);
-			break;
-		default:
-			assert(0);
-		}
-	}
-
-	if (mask == MASK_ALL)
-		return TRUE;
-
-	*src = temp(fpc);
-
-	if (mask)
-		arith(fpc, 0, MOV, *src, mask, tgsi, none, none);
-
-	return FALSE;
-}
-
-static boolean
-nv30_fragprog_parse_instruction(struct nv30_fpc *fpc,
-				const struct tgsi_full_instruction *finst)
-{
-	const struct nvfx_sreg none = nvfx_sr(NVFXSR_NONE, 0);
-	struct nvfx_sreg src[3], dst, tmp;
-	int mask, sat, unit = 0;
-	int ai = -1, ci = -1;
-	int i;
-
-	if (finst->Instruction.Opcode == TGSI_OPCODE_END)
-		return TRUE;
-
-	fpc->temp_temp_count = 0;
-	for (i = 0; i < finst->Instruction.NumSrcRegs; i++) {
-		const struct tgsi_full_src_register *fsrc;
-
-		fsrc = &finst->Src[i];
-		if (fsrc->Register.File == TGSI_FILE_TEMPORARY) {
-			src[i] = tgsi_src(fpc, fsrc);
-		}
-	}
-
-	for (i = 0; i < finst->Instruction.NumSrcRegs; i++) {
-		const struct tgsi_full_src_register *fsrc;
-
-		fsrc = &finst->Src[i];
-
-		switch (fsrc->Register.File) {
-		case TGSI_FILE_INPUT:
-		case TGSI_FILE_CONSTANT:
-		case TGSI_FILE_TEMPORARY:
-			if (!src_native_swz(fpc, fsrc, &src[i]))
-				continue;
-			break;
-		default:
-			break;
-		}
-
-		switch (fsrc->Register.File) {
-		case TGSI_FILE_INPUT:
-			if (ai == -1 || ai == fsrc->Register.Index) {
-				ai = fsrc->Register.Index;
-				src[i] = tgsi_src(fpc, fsrc);
-			} else {
-				NOUVEAU_MSG("extra src attr %d\n",
-					 fsrc->Register.Index);
-				src[i] = temp(fpc);
-				arith(fpc, 0, MOV, src[i], MASK_ALL,
-				      tgsi_src(fpc, fsrc), none, none);
-			}
-			break;
-		case TGSI_FILE_CONSTANT:
-		case TGSI_FILE_IMMEDIATE:
-			if (ci == -1 || ci == fsrc->Register.Index) {
-				ci = fsrc->Register.Index;
-				src[i] = tgsi_src(fpc, fsrc);
-			} else {
-				src[i] = temp(fpc);
-				arith(fpc, 0, MOV, src[i], MASK_ALL,
-				      tgsi_src(fpc, fsrc), none, none);
-			}
-			break;
-		case TGSI_FILE_TEMPORARY:
-			/* handled above */
-			break;
-		case TGSI_FILE_SAMPLER:
-			unit = fsrc->Register.Index;
-			break;
-		case TGSI_FILE_OUTPUT:
-			break;
-		default:
-			NOUVEAU_ERR("bad src file\n");
-			return FALSE;
-		}
-	}
-
-	dst  = tgsi_dst(fpc, &finst->Dst[0]);
-	mask = tgsi_mask(finst->Dst[0].Register.WriteMask);
-	sat  = (finst->Instruction.Saturate == TGSI_SAT_ZERO_ONE);
-
-	switch (finst->Instruction.Opcode) {
-	case TGSI_OPCODE_ABS:
-		arith(fpc, sat, MOV, dst, mask, abs(src[0]), none, none);
-		break;
-	case TGSI_OPCODE_ADD:
-		arith(fpc, sat, ADD, dst, mask, src[0], src[1], none);
-		break;
-	case TGSI_OPCODE_CMP:
-		tmp = nvfx_sr(NVFXSR_NONE, 0);
-		tmp.cc_update = 1;
-		arith(fpc, 0, MOV, tmp, 0xf, src[0], none, none);
-		dst.cc_test = NVFX_VP_INST_COND_GE;
-		arith(fpc, sat, MOV, dst, mask, src[2], none, none);
-		dst.cc_test = NVFX_VP_INST_COND_LT;
-		arith(fpc, sat, MOV, dst, mask, src[1], none, none);
-		break;
-	case TGSI_OPCODE_COS:
-		arith(fpc, sat, COS, dst, mask, src[0], none, none);
-		break;
-	case TGSI_OPCODE_DP3:
-		arith(fpc, sat, DP3, dst, mask, src[0], src[1], none);
-		break;
-	case TGSI_OPCODE_DP4:
-		arith(fpc, sat, DP4, dst, mask, src[0], src[1], none);
-		break;
-	case TGSI_OPCODE_DPH:
-		tmp = temp(fpc);
-		arith(fpc, 0, DP3, tmp, MASK_X, src[0], src[1], none);
-		arith(fpc, sat, ADD, dst, mask, swz(tmp, X, X, X, X),
-		      swz(src[1], W, W, W, W), none);
-		break;
-	case TGSI_OPCODE_DST:
-		arith(fpc, sat, DST, dst, mask, src[0], src[1], none);
-		break;
-	case TGSI_OPCODE_EX2:
-		arith(fpc, sat, EX2, dst, mask, src[0], none, none);
-		break;
-	case TGSI_OPCODE_FLR:
-		arith(fpc, sat, FLR, dst, mask, src[0], none, none);
-		break;
-	case TGSI_OPCODE_FRC:
-		arith(fpc, sat, FRC, dst, mask, src[0], none, none);
-		break;
-	case TGSI_OPCODE_KILP:
-		arith(fpc, 0, KIL, none, 0, none, none, none);
-		break;
-	case TGSI_OPCODE_KIL:
-		dst = nvfx_sr(NVFXSR_NONE, 0);
-		dst.cc_update = 1;
-		arith(fpc, 0, MOV, dst, MASK_ALL, src[0], none, none);
-		dst.cc_update = 0; dst.cc_test = NVFX_FP_OP_COND_LT;
-		arith(fpc, 0, KIL, dst, 0, none, none, none);
-		break;
-	case TGSI_OPCODE_LG2:
-		arith(fpc, sat, LG2, dst, mask, src[0], none, none);
-		break;
-//	case TGSI_OPCODE_LIT:
-	case TGSI_OPCODE_LRP:
-		arith(fpc, sat, LRP_NV30, dst, mask, src[0], src[1], src[2]);
-		break;
-	case TGSI_OPCODE_MAD:
-		arith(fpc, sat, MAD, dst, mask, src[0], src[1], src[2]);
-		break;
-	case TGSI_OPCODE_MAX:
-		arith(fpc, sat, MAX, dst, mask, src[0], src[1], none);
-		break;
-	case TGSI_OPCODE_MIN:
-		arith(fpc, sat, MIN, dst, mask, src[0], src[1], none);
-		break;
-	case TGSI_OPCODE_MOV:
-		arith(fpc, sat, MOV, dst, mask, src[0], none, none);
-		break;
-	case TGSI_OPCODE_MUL:
-		arith(fpc, sat, MUL, dst, mask, src[0], src[1], none);
-		break;
-	case TGSI_OPCODE_POW:
-		arith(fpc, sat, POW_NV30, dst, mask, src[0], src[1], none);
-		break;
-	case TGSI_OPCODE_RCP:
-		arith(fpc, sat, RCP, dst, mask, src[0], none, none);
-		break;
-	case TGSI_OPCODE_RET:
-		assert(0);
-		break;
-	case TGSI_OPCODE_RFL:
-		arith(fpc, 0, RFL_NV30, dst, mask, src[0], src[1], none);
-		break;
-	case TGSI_OPCODE_RSQ:
-		arith(fpc, sat, RSQ_NV30, dst, mask, abs(swz(src[0], X, X, X, X)), none, none);
-		break;
-	case TGSI_OPCODE_SCS:
-		/* avoid overwriting the source */
-		if(src[0].swz[SWZ_X] != SWZ_X)
-		{
-			if (mask & MASK_X) {
-				arith(fpc, sat, COS, dst, MASK_X,
-				      swz(src[0], X, X, X, X), none, none);
-			}
-			if (mask & MASK_Y) {
-				arith(fpc, sat, SIN, dst, MASK_Y,
-				      swz(src[0], X, X, X, X), none, none);
-			}
-		}
-		else
-		{
-			if (mask & MASK_Y) {
-				arith(fpc, sat, SIN, dst, MASK_Y,
-				      swz(src[0], X, X, X, X), none, none);
-			}
-			if (mask & MASK_X) {
-				arith(fpc, sat, COS, dst, MASK_X,
-				      swz(src[0], X, X, X, X), none, none);
-			}
-		}
-		break;
-	case TGSI_OPCODE_SIN:
-		arith(fpc, sat, SIN, dst, mask, src[0], none, none);
-		break;
-	case TGSI_OPCODE_SGE:
-		arith(fpc, sat, SGE, dst, mask, src[0], src[1], none);
-		break;
-	case TGSI_OPCODE_SGT:
-		arith(fpc, sat, SGT, dst, mask, src[0], src[1], none);
-		break;
-	case TGSI_OPCODE_SLT:
-		arith(fpc, sat, SLT, dst, mask, src[0], src[1], none);
-		break;
-	case TGSI_OPCODE_SUB:
-		arith(fpc, sat, ADD, dst, mask, src[0], neg(src[1]), none);
-		break;
-	case TGSI_OPCODE_TEX:
-		tex(fpc, sat, TEX, unit, dst, mask, src[0], none, none);
-		break;
-	case TGSI_OPCODE_TXB:
-		tex(fpc, sat, TXB, unit, dst, mask, src[0], none, none);
-		break;
-	case TGSI_OPCODE_TXP:
-		tex(fpc, sat, TXP, unit, dst, mask, src[0], none, none);
-		break;
-	case TGSI_OPCODE_XPD:
-		tmp = temp(fpc);
-		arith(fpc, 0, MUL, tmp, mask,
-		      swz(src[0], Z, X, Y, Y), swz(src[1], Y, Z, X, X), none);
-		arith(fpc, sat, MAD, dst, (mask & ~MASK_W),
-		      swz(src[0], Y, Z, X, X), swz(src[1], Z, X, Y, Y),
-		      neg(tmp));
-		break;
-	default:
-		NOUVEAU_ERR("invalid opcode %d\n", finst->Instruction.Opcode);
-		return FALSE;
-	}
-
-	return TRUE;
-}
-
-static boolean
-nv30_fragprog_parse_decl_attrib(struct nv30_fpc *fpc,
-				const struct tgsi_full_declaration *fdec)
-{
-	int hw;
-
-	switch (fdec->Semantic.Name) {
-	case TGSI_SEMANTIC_POSITION:
-		hw = NVFX_FP_OP_INPUT_SRC_POSITION;
-		break;
-	case TGSI_SEMANTIC_COLOR:
-		if (fdec->Semantic.Index == 0) {
-			hw = NVFX_FP_OP_INPUT_SRC_COL0;
-		} else
-		if (fdec->Semantic.Index == 1) {
-			hw = NVFX_FP_OP_INPUT_SRC_COL1;
-		} else {
-			NOUVEAU_ERR("bad colour semantic index\n");
-			return FALSE;
-		}
-		break;
-	case TGSI_SEMANTIC_FOG:
-		hw = NVFX_FP_OP_INPUT_SRC_FOGC;
-		break;
-	case TGSI_SEMANTIC_GENERIC:
-		if (fdec->Semantic.Index <= 7) {
-			hw = NVFX_FP_OP_INPUT_SRC_TC(fdec->Semantic.
-						     Index);
-		} else {
-			NOUVEAU_ERR("bad generic semantic index\n");
-			return FALSE;
-		}
-		break;
-	default:
-		NOUVEAU_ERR("bad input semantic\n");
-		return FALSE;
-	}
-
-	fpc->attrib_map[fdec->Range.First] = hw;
-	return TRUE;
-}
-
-static boolean
-nv30_fragprog_parse_decl_output(struct nv30_fpc *fpc,
-				const struct tgsi_full_declaration *fdec)
-{
-	switch (fdec->Semantic.Name) {
-	case TGSI_SEMANTIC_POSITION:
-		fpc->depth_id = fdec->Range.First;
-		break;
-	case TGSI_SEMANTIC_COLOR:
-		fpc->colour_id = fdec->Range.First;
-		break;
-	default:
-		NOUVEAU_ERR("bad output semantic\n");
-		return FALSE;
-	}
-
-	return TRUE;
-}
-
-static boolean
-nv30_fragprog_prepare(struct nv30_fpc *fpc)
-{
-	struct tgsi_parse_context p;
-	/*int high_temp = -1, i;*/
-
-	tgsi_parse_init(&p, fpc->fp->pipe.tokens);
-	while (!tgsi_parse_end_of_tokens(&p)) {
-		const union tgsi_full_token *tok = &p.FullToken;
-
-		tgsi_parse_token(&p);
-		switch(tok->Token.Type) {
-		case TGSI_TOKEN_TYPE_DECLARATION:
-		{
-			const struct tgsi_full_declaration *fdec;
-			fdec = &p.FullToken.FullDeclaration;
-			switch (fdec->Declaration.File) {
-			case TGSI_FILE_INPUT:
-				if (!nv30_fragprog_parse_decl_attrib(fpc, fdec))
-					goto out_err;
-				break;
-			case TGSI_FILE_OUTPUT:
-				if (!nv30_fragprog_parse_decl_output(fpc, fdec))
-					goto out_err;
-				break;
-			/*case TGSI_FILE_TEMPORARY:
-				if (fdec->Range.Last > high_temp) {
-					high_temp =
-						fdec->Range.Last;
-				}
-				break;*/
-			default:
-				break;
-			}
-		}
-			break;
-		case TGSI_TOKEN_TYPE_IMMEDIATE:
-		{
-			struct tgsi_full_immediate *imm;
-			float vals[4];
-
-			imm = &p.FullToken.FullImmediate;
-			assert(imm->Immediate.DataType == TGSI_IMM_FLOAT32);
-			assert(fpc->nr_imm < MAX_IMM);
-
-			vals[0] = imm->u[0].Float;
-			vals[1] = imm->u[1].Float;
-			vals[2] = imm->u[2].Float;
-			vals[3] = imm->u[3].Float;
-			fpc->imm[fpc->nr_imm++] = constant(fpc, -1, vals);
-		}
-			break;
-		default:
-			break;
-		}
-	}
-	tgsi_parse_free(&p);
-
-	/*if (++high_temp) {
-		fpc->r_temp = CALLOC(high_temp, sizeof(struct nvfx_sreg));
-		for (i = 0; i < high_temp; i++)
-			fpc->r_temp[i] = temp(fpc);
-		fpc->r_temps_discard = 0;
-	}*/
-
-	return TRUE;
-
-out_err:
-	/*if (fpc->r_temp)
-		FREE(fpc->r_temp);*/
-	tgsi_parse_free(&p);
-	return FALSE;
-}
-
-static void
-nv30_fragprog_translate(struct nvfx_context *nvfx,
-			struct nvfx_fragment_program *fp)
-{
-	struct tgsi_parse_context parse;
-	struct nv30_fpc *fpc = NULL;
-
-	tgsi_dump(fp->pipe.tokens,0);
-
-	fpc = CALLOC(1, sizeof(struct nv30_fpc));
-	if (!fpc)
-		return;
-	fpc->fp = fp;
-	fpc->high_temp = -1;
-	fpc->num_regs = 2;
-
-	if (!nv30_fragprog_prepare(fpc)) {
-		FREE(fpc);
-		return;
-	}
-
-	tgsi_parse_init(&parse, fp->pipe.tokens);
-
-	while (!tgsi_parse_end_of_tokens(&parse)) {
-		tgsi_parse_token(&parse);
-
-		switch (parse.FullToken.Token.Type) {
-		case TGSI_TOKEN_TYPE_INSTRUCTION:
-		{
-			const struct tgsi_full_instruction *finst;
-
-			finst = &parse.FullToken.FullInstruction;
-			if (!nv30_fragprog_parse_instruction(fpc, finst))
-				goto out_err;
-		}
-			break;
-		default:
-			break;
-		}
-	}
-
-	fp->fp_control |= (fpc->num_regs-1)/2;
-
-	/* Terminate final instruction */
-	fp->insn[fpc->inst_offset] |= 0x00000001;
-
-	/* Append NOP + END instruction, may or may not be necessary. */
-	fpc->inst_offset = fp->insn_len;
-	grow_insns(fpc, 4);
-	fp->insn[fpc->inst_offset + 0] = 0x00000001;
-	fp->insn[fpc->inst_offset + 1] = 0x00000000;
-	fp->insn[fpc->inst_offset + 2] = 0x00000000;
-	fp->insn[fpc->inst_offset + 3] = 0x00000000;
-
-	fp->translated = TRUE;
-out_err:
-	tgsi_parse_free(&parse);
-	FREE(fpc);
-}
-
-static void
-nv30_fragprog_upload(struct nvfx_context *nvfx,
-		     struct nvfx_fragment_program *fp)
-{
-	struct pipe_screen *pscreen = nvfx->pipe.screen;
-	const uint32_t le = 1;
-	uint32_t *map;
-	int i;
-
-	map = pipe_buffer_map(pscreen, fp->buffer, PIPE_BUFFER_USAGE_CPU_WRITE);
-
-#if 0
-	for (i = 0; i < fp->insn_len; i++) {
-		fflush(stdout); fflush(stderr);
-		NOUVEAU_ERR("%d 0x%08x\n", i, fp->insn[i]);
-		fflush(stdout); fflush(stderr);
-	}
-#endif
-
-	if ((*(const uint8_t *)&le)) {
-		for (i = 0; i < fp->insn_len; i++) {
-			map[i] = fp->insn[i];
-		}
-	} else {
-		/* Weird swapping for big-endian chips */
-		for (i = 0; i < fp->insn_len; i++) {
-			map[i] = ((fp->insn[i] & 0xffff) << 16) |
-				  ((fp->insn[i] >> 16) & 0xffff);
-		}
-	}
-
-	pipe_buffer_unmap(pscreen, fp->buffer);
-}
-
-static boolean
-nv30_fragprog_validate(struct nvfx_context *nvfx)
-{
-	struct nvfx_fragment_program *fp = nvfx->fragprog;
-	struct pipe_buffer *constbuf =
-		nvfx->constbuf[PIPE_SHADER_FRAGMENT];
-	struct pipe_screen *pscreen = nvfx->pipe.screen;
-	struct nouveau_stateobj *so;
-	boolean new_consts = FALSE;
-	int i;
-
-	if (fp->translated)
-		goto update_constants;
-
-	/*nvfx->fallback_swrast &= ~NVFX_NEW_FRAGPROG;*/
-	nv30_fragprog_translate(nvfx, fp);
-	if (!fp->translated) {
-		/*nvfx->fallback_swrast |= NVFX_NEW_FRAGPROG;*/
-		return FALSE;
-	}
-
-	fp->buffer = pscreen->buffer_create(pscreen, 0x100, 0, fp->insn_len * 4);
-	nv30_fragprog_upload(nvfx, fp);
-
-	so = so_new(4, 4, 1);
-	so_method(so, nvfx->screen->eng3d, NV34TCL_FP_ACTIVE_PROGRAM, 1);
-	so_reloc (so, nouveau_bo(fp->buffer), 0, NOUVEAU_BO_VRAM |
-		      NOUVEAU_BO_GART | NOUVEAU_BO_RD | NOUVEAU_BO_LOW |
-		      NOUVEAU_BO_OR, NV34TCL_FP_ACTIVE_PROGRAM_DMA0,
-		      NV34TCL_FP_ACTIVE_PROGRAM_DMA1);
-	so_method(so, nvfx->screen->eng3d, NV34TCL_FP_CONTROL, 1);
-	so_data  (so, fp->fp_control);
-	so_method(so, nvfx->screen->eng3d, NV34TCL_FP_REG_CONTROL, 1);
-	so_data  (so, (1<<16)|0x4);
-	so_method(so, nvfx->screen->eng3d, NV34TCL_TX_UNITS_ENABLE, 1);
-	so_data  (so, fp->samplers);
-	so_ref(so, &fp->so);
-	so_ref(NULL, &so);
-
-update_constants:
-	if (fp->nr_consts) {
-		float *map;
-
-		map = pipe_buffer_map(pscreen, constbuf,
-				      PIPE_BUFFER_USAGE_CPU_READ);
-		for (i = 0; i < fp->nr_consts; i++) {
-			struct nvfx_fragment_program_data *fpd = &fp->consts[i];
-			uint32_t *p = &fp->insn[fpd->offset];
-			uint32_t *cb = (uint32_t *)&map[fpd->index * 4];
-
-			if (!memcmp(p, cb, 4 * sizeof(float)))
-				continue;
-			memcpy(p, cb, 4 * sizeof(float));
-			new_consts = TRUE;
-		}
-		pipe_buffer_unmap(pscreen, constbuf);
-
-		if (new_consts)
-			nv30_fragprog_upload(nvfx, fp);
-	}
-
-	if (new_consts || fp->so != nvfx->state.hw[NVFX_STATE_FRAGPROG]) {
-		so_ref(fp->so, &nvfx->state.hw[NVFX_STATE_FRAGPROG]);
-		return TRUE;
-	}
-
-	return FALSE;
-}
-
-void
-nv30_fragprog_destroy(struct nvfx_context *nvfx,
-		      struct nvfx_fragment_program *fp)
-{
-	if (fp->buffer)
-		pipe_buffer_reference(&fp->buffer, NULL);
-
-	if (fp->so)
-		so_ref(NULL, &fp->so);
-
-	if (fp->insn_len)
-		FREE(fp->insn);
-}
-
-struct nvfx_state_entry nv30_state_fragprog = {
-	.validate = nv30_fragprog_validate,
-	.dirty = {
-		.pipe = NVFX_NEW_FRAGPROG,
-		.hw = NVFX_STATE_FRAGPROG
-	}
-};
diff --git a/src/gallium/drivers/nv30/nv30_state.c b/src/gallium/drivers/nv30/nv30_state.c
index 5263f894f2..92a4089b31 100644
--- a/src/gallium/drivers/nv30/nv30_state.c
+++ b/src/gallium/drivers/nv30/nv30_state.c
@@ -567,7 +567,7 @@ nv30_fp_state_delete(struct pipe_context *pipe, void *hwcso)
 	struct nvfx_context *nvfx = nvfx_context(pipe);
 	struct nvfx_fragment_program *fp = hwcso;
 
-	nv30_fragprog_destroy(nvfx, fp);
+	nvfx_fragprog_destroy(nvfx, fp);
 	FREE((void*)fp->pipe.tokens);
 	FREE(fp);
 }
diff --git a/src/gallium/drivers/nv40/Makefile b/src/gallium/drivers/nv40/Makefile
index f78e81ac4b..f3ff376dfd 100644
--- a/src/gallium/drivers/nv40/Makefile
+++ b/src/gallium/drivers/nv40/Makefile
@@ -6,7 +6,6 @@ LIBNAME = nv40
 C_SOURCES = \
 	nv40_context.c \
 	nv40_draw.c \
-	nv40_fragprog.c \
 	nv40_fragtex.c \
 	nv40_screen.c \
 	nv40_state.c \
diff --git a/src/gallium/drivers/nv40/nv40_context.h b/src/gallium/drivers/nv40/nv40_context.h
index 3840134ce6..4cd56af8f7 100644
--- a/src/gallium/drivers/nv40/nv40_context.h
+++ b/src/gallium/drivers/nv40/nv40_context.h
@@ -16,15 +16,10 @@ extern void nv40_draw_elements_swtnl(struct pipe_context *pipe,
 extern void nv40_vertprog_destroy(struct nvfx_context *,
 				  struct nvfx_vertex_program *);
 
-/* nv40_fragprog.c */
-extern void nv40_fragprog_destroy(struct nvfx_context *,
-				  struct nvfx_fragment_program *);
-
 /* nv40_fragtex.c */
 extern void nv40_fragtex_bind(struct nvfx_context *);
 
 /* nv40_state.c and friends */
-extern struct nvfx_state_entry nv40_state_fragprog;
 extern struct nvfx_state_entry nv40_state_vertprog;
 extern struct nvfx_state_entry nv40_state_fragtex;
 extern struct nvfx_state_entry nv40_state_vbo;
diff --git a/src/gallium/drivers/nv40/nv40_state.c b/src/gallium/drivers/nv40/nv40_state.c
index a205342ac5..1f4b9777d4 100644
--- a/src/gallium/drivers/nv40/nv40_state.c
+++ b/src/gallium/drivers/nv40/nv40_state.c
@@ -577,7 +577,7 @@ nv40_fp_state_delete(struct pipe_context *pipe, void *hwcso)
 	struct nvfx_context *nvfx = nvfx_context(pipe);
 	struct nvfx_fragment_program *fp = hwcso;
 
-	nv40_fragprog_destroy(nvfx, fp);
+	nvfx_fragprog_destroy(nvfx, fp);
 	FREE((void*)fp->pipe.tokens);
 	FREE(fp);
 }
diff --git a/src/gallium/drivers/nvfx/Makefile b/src/gallium/drivers/nvfx/Makefile
index 2f80681e5c..f8c10a249b 100644
--- a/src/gallium/drivers/nvfx/Makefile
+++ b/src/gallium/drivers/nvfx/Makefile
@@ -5,10 +5,11 @@ LIBNAME = nvfx
 
 C_SOURCES = \
 	nvfx_clear.c \
-	nvfx_state_emit.c \
+	nvfx_fragprog.c \
 	nvfx_miptree.c \
 	nvfx_query.c \
 	nvfx_state_blend.c \
+        nvfx_state_emit.c \
 	nvfx_state_fb.c \
 	nvfx_state_rasterizer.c \
 	nvfx_state_scissor.c \
diff --git a/src/gallium/drivers/nvfx/nvfx_context.h b/src/gallium/drivers/nvfx/nvfx_context.h
index 28daa1d2e7..0a7a0f1252 100644
--- a/src/gallium/drivers/nvfx/nvfx_context.h
+++ b/src/gallium/drivers/nvfx/nvfx_context.h
@@ -183,6 +183,7 @@ struct nvfx_state_entry {
 
 extern struct nvfx_state_entry nvfx_state_blend;
 extern struct nvfx_state_entry nvfx_state_blend_colour;
+extern struct nvfx_state_entry nvfx_state_fragprog;
 extern struct nvfx_state_entry nvfx_state_framebuffer;
 extern struct nvfx_state_entry nvfx_state_rasterizer;
 extern struct nvfx_state_entry nvfx_state_scissor;
@@ -198,6 +199,10 @@ extern void nvfx_init_surface_functions(struct nvfx_context *nvfx);
 extern void nvfx_clear(struct pipe_context *pipe, unsigned buffers,
 		       const float *rgba, double depth, unsigned stencil);
 
+/* nvfx_fragprog.c */
+extern void nvfx_fragprog_destroy(struct nvfx_context *,
+				    struct nvfx_fragment_program *);
+
 /* nvfx_state_emit.c */
 extern void nvfx_state_flush_notify(struct nouveau_channel *chan);
 extern boolean nvfx_state_validate(struct nvfx_context *nvfx);
diff --git a/src/gallium/drivers/nv40/nv40_fragprog.c b/src/gallium/drivers/nvfx/nvfx_fragprog.c
index e044f367a0..ecc193877b 100644
--- a/src/gallium/drivers/nv40/nv40_fragprog.c
+++ b/src/gallium/drivers/nvfx/nvfx_fragprog.c
@@ -7,7 +7,7 @@
 #include "tgsi/tgsi_parse.h"
 #include "tgsi/tgsi_util.h"
 
-#include "nv40_context.h"
+#include "nvfx_context.h"
 
 #define SWZ_X 0
 #define SWZ_Y 1
@@ -29,7 +29,7 @@
 
 #define MAX_CONSTS 128
 #define MAX_IMM 32
-struct nv40_fpc {
+struct nvfx_fpc {
 	struct nvfx_fragment_program *fp;
 
 	uint attrib_map[PIPE_MAX_SHADER_INPUTS];
@@ -55,7 +55,7 @@ struct nv40_fpc {
 };
 
 static INLINE struct nvfx_sreg
-temp(struct nv40_fpc *fpc)
+temp(struct nvfx_fpc *fpc)
 {
 	int idx = ffs(~fpc->r_temps) - 1;
 
@@ -71,14 +71,14 @@ temp(struct nv40_fpc *fpc)
 }
 
 static INLINE void
-release_temps(struct nv40_fpc *fpc)
+release_temps(struct nvfx_fpc *fpc)
 {
 	fpc->r_temps &= ~fpc->r_temps_discard;
 	fpc->r_temps_discard = 0;
 }
 
 static INLINE struct nvfx_sreg
-constant(struct nv40_fpc *fpc, int pipe, float vals[4])
+constant(struct nvfx_fpc *fpc, int pipe, float vals[4])
 {
 	int idx;
 
@@ -93,14 +93,14 @@ constant(struct nv40_fpc *fpc, int pipe, float vals[4])
 }
 
 #define arith(cc,s,o,d,m,s0,s1,s2) \
-	nv40_fp_arith((cc), (s), NVFX_FP_OP_OPCODE_##o, \
+	nvfx_fp_arith((cc), (s), NVFX_FP_OP_OPCODE_##o, \
 			(d), (m), (s0), (s1), (s2))
 #define tex(cc,s,o,u,d,m,s0,s1,s2) \
-	nv40_fp_tex((cc), (s), NVFX_FP_OP_OPCODE_##o, (u), \
+	nvfx_fp_tex((cc), (s), NVFX_FP_OP_OPCODE_##o, (u), \
 		    (d), (m), (s0), none, none)
 
 static void
-grow_insns(struct nv40_fpc *fpc, int size)
+grow_insns(struct nvfx_fpc *fpc, int size)
 {
 	struct nvfx_fragment_program *fp = fpc->fp;
 
@@ -109,7 +109,7 @@ grow_insns(struct nv40_fpc *fpc, int size)
 }
 
 static void
-emit_src(struct nv40_fpc *fpc, int pos, struct nvfx_sreg src)
+emit_src(struct nvfx_fpc *fpc, int pos, struct nvfx_sreg src)
 {
 	struct nvfx_fragment_program *fp = fpc->fp;
 	uint32_t *hw = &fp->insn[fpc->inst_offset];
@@ -173,7 +173,7 @@ emit_src(struct nv40_fpc *fpc, int pos, struct nvfx_sreg src)
 }
 
 static void
-emit_dst(struct nv40_fpc *fpc, struct nvfx_sreg dst)
+emit_dst(struct nvfx_fpc *fpc, struct nvfx_sreg dst)
 {
 	struct nvfx_fragment_program *fp = fpc->fp;
 	uint32_t *hw = &fp->insn[fpc->inst_offset];
@@ -201,7 +201,7 @@ emit_dst(struct nv40_fpc *fpc, struct nvfx_sreg dst)
 }
 
 static void
-nv40_fp_arith(struct nv40_fpc *fpc, int sat, int op,
+nvfx_fp_arith(struct nvfx_fpc *fpc, int sat, int op,
 	      struct nvfx_sreg dst, int mask,
 	      struct nvfx_sreg s0, struct nvfx_sreg s1, struct nvfx_sreg s2)
 {
@@ -215,7 +215,7 @@ nv40_fp_arith(struct nv40_fpc *fpc, int sat, int op,
 	memset(hw, 0, sizeof(uint32_t) * 4);
 
 	if (op == NVFX_FP_OP_OPCODE_KIL)
-		fp->fp_control |= NV40TCL_FP_CONTROL_KIL;
+		fp->fp_control |= NV34TCL_FP_CONTROL_USES_KIL;
 	hw[0] |= (op << NVFX_FP_OP_OPCODE_SHIFT);
 	hw[0] |= (mask << NVFX_FP_OP_OUTMASK_SHIFT);
 	hw[2] |= (dst.dst_scale << NVFX_FP_OP_DST_SCALE_SHIFT);
@@ -238,20 +238,20 @@ nv40_fp_arith(struct nv40_fpc *fpc, int sat, int op,
 }
 
 static void
-nv40_fp_tex(struct nv40_fpc *fpc, int sat, int op, int unit,
+nvfx_fp_tex(struct nvfx_fpc *fpc, int sat, int op, int unit,
 	    struct nvfx_sreg dst, int mask,
 	    struct nvfx_sreg s0, struct nvfx_sreg s1, struct nvfx_sreg s2)
 {
 	struct nvfx_fragment_program *fp = fpc->fp;
 
-	nv40_fp_arith(fpc, sat, op, dst, mask, s0, s1, s2);
+	nvfx_fp_arith(fpc, sat, op, dst, mask, s0, s1, s2);
 
 	fp->insn[fpc->inst_offset] |= (unit << NVFX_FP_OP_TEX_UNIT_SHIFT);
 	fp->samplers |= (1 << unit);
 }
 
 static INLINE struct nvfx_sreg
-tgsi_src(struct nv40_fpc *fpc, const struct tgsi_full_src_register *fsrc)
+tgsi_src(struct nvfx_fpc *fpc, const struct tgsi_full_src_register *fsrc)
 {
 	struct nvfx_sreg src;
 
@@ -289,7 +289,7 @@ tgsi_src(struct nv40_fpc *fpc, const struct tgsi_full_src_register *fsrc)
 }
 
 static INLINE struct nvfx_sreg
-tgsi_dst(struct nv40_fpc *fpc, const struct tgsi_full_dst_register *fdst) {
+tgsi_dst(struct nvfx_fpc *fpc, const struct tgsi_full_dst_register *fdst) {
 	switch (fdst->Register.File) {
 	case TGSI_FILE_OUTPUT:
 		return fpc->r_result[fdst->Register.Index];
@@ -316,7 +316,7 @@ tgsi_mask(uint tgsi)
 }
 
 static boolean
-src_native_swz(struct nv40_fpc *fpc, const struct tgsi_full_src_register *fsrc,
+src_native_swz(struct nvfx_fpc *fpc, const struct tgsi_full_src_register *fsrc,
 	       struct nvfx_sreg *src)
 {
 	const struct nvfx_sreg none = nvfx_sr(NVFXSR_NONE, 0);
@@ -349,7 +349,7 @@ src_native_swz(struct nv40_fpc *fpc, const struct tgsi_full_src_register *fsrc,
 }
 
 static boolean
-nv40_fragprog_parse_instruction(struct nv40_fpc *fpc,
+nvfx_fragprog_parse_instruction(struct nvfx_context* nvfx, struct nvfx_fpc *fpc,
 				const struct tgsi_full_instruction *finst)
 {
 	const struct nvfx_sreg none = nvfx_sr(NVFXSR_NONE, 0);
@@ -523,9 +523,13 @@ nv40_fragprog_parse_instruction(struct nv40_fpc *fpc,
 		break;
 //	case TGSI_OPCODE_LIT:
 	case TGSI_OPCODE_LRP:
-		tmp = temp(fpc);
-		arith(fpc, 0, MAD, tmp, mask, neg(src[0]), src[2], src[2]);
-		arith(fpc, sat, MAD, dst, mask, src[0], src[1], tmp);
+		if(!nvfx->is_nv4x)
+			arith(fpc, sat, LRP_NV30, dst, mask, src[0], src[1], src[2]);
+		else {
+			tmp = temp(fpc);
+			arith(fpc, 0, MAD, tmp, mask, neg(src[0]), src[2], src[2]);
+			arith(fpc, sat, MAD, dst, mask, src[0], src[1], tmp);
+		}
 		break;
 	case TGSI_OPCODE_MAD:
 		arith(fpc, sat, MAD, dst, mask, src[0], src[1], src[2]);
@@ -543,13 +547,17 @@ nv40_fragprog_parse_instruction(struct nv40_fpc *fpc,
 		arith(fpc, sat, MUL, dst, mask, src[0], src[1], none);
 		break;
 	case TGSI_OPCODE_POW:
-		tmp = temp(fpc);
-		arith(fpc, 0, LG2, tmp, MASK_X,
-		      swz(src[0], X, X, X, X), none, none);
-		arith(fpc, 0, MUL, tmp, MASK_X, swz(tmp, X, X, X, X),
-		      swz(src[1], X, X, X, X), none);
-		arith(fpc, sat, EX2, dst, mask,
-		      swz(tmp, X, X, X, X), none, none);
+		if(!nvfx->is_nv4x)
+			arith(fpc, sat, POW_NV30, dst, mask, src[0], src[1], none);
+		else {
+			tmp = temp(fpc);
+			arith(fpc, 0, LG2, tmp, MASK_X,
+			      swz(src[0], X, X, X, X), none, none);
+			arith(fpc, 0, MUL, tmp, MASK_X, swz(tmp, X, X, X, X),
+			      swz(src[1], X, X, X, X), none);
+			arith(fpc, sat, EX2, dst, mask,
+			      swz(tmp, X, X, X, X), none, none);
+		}
 		break;
 	case TGSI_OPCODE_RCP:
 		arith(fpc, sat, RCP, dst, mask, src[0], none, none);
@@ -558,20 +566,28 @@ nv40_fragprog_parse_instruction(struct nv40_fpc *fpc,
 		assert(0);
 		break;
 	case TGSI_OPCODE_RFL:
-		tmp = temp(fpc);
-		arith(fpc, 0, DP3, tmp, MASK_X, src[0], src[0], none);
-		arith(fpc, 0, DP3, tmp, MASK_Y, src[0], src[1], none);
-		arith(fpc, 0, DIV, scale(tmp, 2X), MASK_Z,
-		      swz(tmp, Y, Y, Y, Y), swz(tmp, X, X, X, X), none);
-		arith(fpc, sat, MAD, dst, mask,
-		      swz(tmp, Z, Z, Z, Z), src[0], neg(src[1]));
+		if(!nvfx->is_nv4x)
+			arith(fpc, 0, RFL_NV30, dst, mask, src[0], src[1], none);
+		else {
+			tmp = temp(fpc);
+			arith(fpc, 0, DP3, tmp, MASK_X, src[0], src[0], none);
+			arith(fpc, 0, DP3, tmp, MASK_Y, src[0], src[1], none);
+			arith(fpc, 0, DIV, scale(tmp, 2X), MASK_Z,
+			      swz(tmp, Y, Y, Y, Y), swz(tmp, X, X, X, X), none);
+			arith(fpc, sat, MAD, dst, mask,
+			      swz(tmp, Z, Z, Z, Z), src[0], neg(src[1]));
+		}
 		break;
 	case TGSI_OPCODE_RSQ:
-		tmp = temp(fpc);
-		arith(fpc, 0, LG2, scale(tmp, INV_2X), MASK_X,
-		      abs(swz(src[0], X, X, X, X)), none, none);
-		arith(fpc, sat, EX2, dst, mask,
-		      neg(swz(tmp, X, X, X, X)), none, none);
+		if(!nvfx->is_nv4x)
+			arith(fpc, sat, RSQ_NV30, dst, mask, abs(swz(src[0], X, X, X, X)), none, none);
+		else {
+			tmp = temp(fpc);
+			arith(fpc, 0, LG2, scale(tmp, INV_2X), MASK_X,
+			      abs(swz(src[0], X, X, X, X)), none, none);
+			arith(fpc, sat, EX2, dst, mask,
+			      neg(swz(tmp, X, X, X, X)), none, none);
+		}
 		break;
 	case TGSI_OPCODE_SCS:
 		/* avoid overwriting the source */
@@ -655,7 +671,7 @@ nv40_fragprog_parse_instruction(struct nv40_fpc *fpc,
 }
 
 static boolean
-nv40_fragprog_parse_decl_attrib(struct nv40_fpc *fpc,
+nvfx_fragprog_parse_decl_attrib(struct nvfx_context* nvfx, struct nvfx_fpc *fpc,
 				const struct tgsi_full_declaration *fdec)
 {
 	int hw;
@@ -697,7 +713,7 @@ nv40_fragprog_parse_decl_attrib(struct nv40_fpc *fpc,
 }
 
 static boolean
-nv40_fragprog_parse_decl_output(struct nv40_fpc *fpc,
+nvfx_fragprog_parse_decl_output(struct nvfx_context* nvfx, struct nvfx_fpc *fpc,
 				const struct tgsi_full_declaration *fdec)
 {
 	unsigned idx = fdec->Range.First;
@@ -708,12 +724,14 @@ nv40_fragprog_parse_decl_output(struct nv40_fpc *fpc,
 		hw = 1;
 		break;
 	case TGSI_SEMANTIC_COLOR:
+		hw = ~0;
 		switch (fdec->Semantic.Index) {
 		case 0: hw = 0; break;
 		case 1: hw = 2; break;
 		case 2: hw = 3; break;
 		case 3: hw = 4; break;
-		default:
+		}
+		if(hw > ((nvfx->is_nv4x) ? 4 : 2)) {
 			NOUVEAU_ERR("bad rcol index\n");
 			return FALSE;
 		}
@@ -729,7 +747,7 @@ nv40_fragprog_parse_decl_output(struct nv40_fpc *fpc,
 }
 
 static boolean
-nv40_fragprog_prepare(struct nv40_fpc *fpc)
+nvfx_fragprog_prepare(struct nvfx_context* nvfx, struct nvfx_fpc *fpc)
 {
 	struct tgsi_parse_context p;
 	int high_temp = -1, i;
@@ -746,11 +764,11 @@ nv40_fragprog_prepare(struct nv40_fpc *fpc)
 			fdec = &p.FullToken.FullDeclaration;
 			switch (fdec->Declaration.File) {
 			case TGSI_FILE_INPUT:
-				if (!nv40_fragprog_parse_decl_attrib(fpc, fdec))
+				if (!nvfx_fragprog_parse_decl_attrib(nvfx, fpc, fdec))
 					goto out_err;
 				break;
 			case TGSI_FILE_OUTPUT:
-				if (!nv40_fragprog_parse_decl_output(fpc, fdec))
+				if (!nvfx_fragprog_parse_decl_output(nvfx, fpc, fdec))
 					goto out_err;
 				break;
 			case TGSI_FILE_TEMPORARY:
@@ -803,19 +821,19 @@ out_err:
 }
 
 static void
-nv40_fragprog_translate(struct nvfx_context *nvfx,
+nvfx_fragprog_translate(struct nvfx_context *nvfx,
 			struct nvfx_fragment_program *fp)
 {
 	struct tgsi_parse_context parse;
-	struct nv40_fpc *fpc = NULL;
+	struct nvfx_fpc *fpc = NULL;
 
-	fpc = CALLOC(1, sizeof(struct nv40_fpc));
+	fpc = CALLOC(1, sizeof(struct nvfx_fpc));
 	if (!fpc)
 		return;
 	fpc->fp = fp;
 	fpc->num_regs = 2;
 
-	if (!nv40_fragprog_prepare(fpc)) {
+	if (!nvfx_fragprog_prepare(nvfx, fpc)) {
 		FREE(fpc);
 		return;
 	}
@@ -831,7 +849,7 @@ nv40_fragprog_translate(struct nvfx_context *nvfx,
 			const struct tgsi_full_instruction *finst;
 
 			finst = &parse.FullToken.FullInstruction;
-			if (!nv40_fragprog_parse_instruction(fpc, finst))
+			if (!nvfx_fragprog_parse_instruction(nvfx, fpc, finst))
 				goto out_err;
 		}
 			break;
@@ -840,7 +858,10 @@ nv40_fragprog_translate(struct nvfx_context *nvfx,
 		}
 	}
 
-	fp->fp_control |= fpc->num_regs << NV40TCL_FP_CONTROL_TEMP_COUNT_SHIFT;
+	if(!nvfx->is_nv4x)
+		fp->fp_control |= (fpc->num_regs-1)/2;
+	else
+		fp->fp_control |= fpc->num_regs << NV40TCL_FP_CONTROL_TEMP_COUNT_SHIFT;
 
 	/* Terminate final instruction */
 	fp->insn[fpc->inst_offset] |= 0x00000001;
@@ -862,7 +883,7 @@ out_err:
 }
 
 static void
-nv40_fragprog_upload(struct nvfx_context *nvfx,
+nvfx_fragprog_upload(struct nvfx_context *nvfx,
 		     struct nvfx_fragment_program *fp)
 {
 	struct pipe_screen *pscreen = nvfx->pipe.screen;
@@ -896,7 +917,7 @@ nv40_fragprog_upload(struct nvfx_context *nvfx,
 }
 
 static boolean
-nv40_fragprog_validate(struct nvfx_context *nvfx)
+nvfx_fragprog_validate(struct nvfx_context *nvfx)
 {
 	struct nvfx_fragment_program *fp = nvfx->fragprog;
 	struct pipe_buffer *constbuf =
@@ -910,16 +931,16 @@ nv40_fragprog_validate(struct nvfx_context *nvfx)
 		goto update_constants;
 
 	nvfx->fallback_swrast &= ~NVFX_NEW_FRAGPROG;
-	nv40_fragprog_translate(nvfx, fp);
+	nvfx_fragprog_translate(nvfx, fp);
 	if (!fp->translated) {
 		nvfx->fallback_swrast |= NVFX_NEW_FRAGPROG;
 		return FALSE;
 	}
 
 	fp->buffer = pscreen->buffer_create(pscreen, 0x100, 0, fp->insn_len * 4);
-	nv40_fragprog_upload(nvfx, fp);
+	nvfx_fragprog_upload(nvfx, fp);
 
-	so = so_new(2, 2, 1);
+	so = so_new(4, 4, 1);
 	so_method(so, nvfx->screen->eng3d, NV34TCL_FP_ACTIVE_PROGRAM, 1);
 	so_reloc (so, nouveau_bo(fp->buffer), 0, NOUVEAU_BO_VRAM |
 		      NOUVEAU_BO_GART | NOUVEAU_BO_RD | NOUVEAU_BO_LOW |
@@ -927,6 +948,13 @@ nv40_fragprog_validate(struct nvfx_context *nvfx)
 		      NV34TCL_FP_ACTIVE_PROGRAM_DMA1);
 	so_method(so, nvfx->screen->eng3d, NV34TCL_FP_CONTROL, 1);
 	so_data  (so, fp->fp_control);
+	if(!nvfx->is_nv4x) {
+		so_method(so, nvfx->screen->eng3d, NV34TCL_FP_REG_CONTROL, 1);
+		so_data  (so, (1<<16)|0x4);
+		so_method(so, nvfx->screen->eng3d, NV34TCL_TX_UNITS_ENABLE, 1);
+		so_data  (so, fp->samplers);
+	}
+
 	so_ref(so, &fp->so);
 	so_ref(NULL, &so);
 
@@ -949,7 +977,7 @@ update_constants:
 		pipe_buffer_unmap(pscreen, constbuf);
 
 		if (new_consts)
-			nv40_fragprog_upload(nvfx, fp);
+			nvfx_fragprog_upload(nvfx, fp);
 	}
 
 	if (new_consts || fp->so != nvfx->state.hw[NVFX_STATE_FRAGPROG]) {
@@ -961,7 +989,7 @@ update_constants:
 }
 
 void
-nv40_fragprog_destroy(struct nvfx_context *nvfx,
+nvfx_fragprog_destroy(struct nvfx_context *nvfx,
 		      struct nvfx_fragment_program *fp)
 {
 	if (fp->buffer)
@@ -974,11 +1002,10 @@ nv40_fragprog_destroy(struct nvfx_context *nvfx,
 		FREE(fp->insn);
 }
 
-struct nvfx_state_entry nv40_state_fragprog = {
-	.validate = nv40_fragprog_validate,
+struct nvfx_state_entry nvfx_state_fragprog = {
+	.validate = nvfx_fragprog_validate,
 	.dirty = {
 		.pipe = NVFX_NEW_FRAGPROG,
 		.hw = NVFX_STATE_FRAGPROG
 	}
 };
-
diff --git a/src/gallium/drivers/nvfx/nvfx_state_emit.c b/src/gallium/drivers/nvfx/nvfx_state_emit.c
index d3088e4211..d6fbc5d8dc 100644
--- a/src/gallium/drivers/nvfx/nvfx_state_emit.c
+++ b/src/gallium/drivers/nvfx/nvfx_state_emit.c
@@ -9,7 +9,7 @@ static struct nvfx_state_entry *name##_render_states[] = { \
 	&nvfx_state_rasterizer, \
 	&nvfx_state_scissor, \
 	&nvfx_state_stipple, \
-	&nvxx##_state_fragprog, \
+	&nvfx_state_fragprog, \
 	&nvxx##_state_fragtex, \
 	&nvxx##_state_vertprog, \
 	&nvfx_state_blend, \