diff options
| author | Zhenyu Wang <zhenyuw@linux.intel.com> | 2010-09-28 14:54:26 +0800 |
|---|---|---|
| committer | Zhenyu Wang <zhenyuw@linux.intel.com> | 2010-09-28 15:58:20 +0800 |
| commit | c5a3b25bb954db49dcb5e7737018979782d2edba (patch) | |
| tree | 0c1d61ed45c98173dd16cdcdf8a667ea8e657a75 | |
| parent | 9c39a9fcb2c76897e9b5aff68ce197a411c4e25c (diff) | |
i965: fix jump count on sandybridge
Jump count is for 64bit long each, so one instruction requires 2
like on Ironlake.
| -rw-r--r-- | src/mesa/drivers/dri/i965/brw_eu_emit.c | 10 |
1 files changed, 6 insertions, 4 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_eu_emit.c b/src/mesa/drivers/dri/i965/brw_eu_emit.c index 1d3f19759d..38ac3be8df 100644 --- a/src/mesa/drivers/dri/i965/brw_eu_emit.c +++ b/src/mesa/drivers/dri/i965/brw_eu_emit.c @@ -819,7 +819,9 @@ struct brw_instruction *brw_ELSE(struct brw_compile *p, struct brw_instruction *insn; GLuint br = 1; - if (intel->gen == 5) + /* jump count is for 64bit data chunk each, so one 128bit + instruction requires 2 chunks. */ + if (intel->gen >= 5) br = 2; if (p->single_program_flow) { @@ -861,7 +863,7 @@ void brw_ENDIF(struct brw_compile *p, struct intel_context *intel = &p->brw->intel; GLuint br = 1; - if (intel->gen == 5) + if (intel->gen >= 5) br = 2; if (p->single_program_flow) { @@ -978,7 +980,7 @@ struct brw_instruction *brw_WHILE(struct brw_compile *p, struct brw_instruction *insn; GLuint br = 1; - if (intel->gen == 5) + if (intel->gen >= 5) br = 2; if (p->single_program_flow) @@ -1022,7 +1024,7 @@ void brw_land_fwd_jump(struct brw_compile *p, struct brw_instruction *landing = &p->store[p->nr_insn]; GLuint jmpi = 1; - if (intel->gen == 5) + if (intel->gen >= 5) jmpi = 2; assert(jmp_insn->header.opcode == BRW_OPCODE_JMPI); |