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authorBrian Paul <brianp@vmware.com>2009-10-22 12:26:17 -0600
committerBrian Paul <brianp@vmware.com>2009-10-22 12:26:17 -0600
commiteb1b8ed1484f0cc792c5237114b54d5fa53164cc (patch)
tree744efe91321d35e10d6d620752b8c0a1cb0b2f6c
parent82ffc5884c29a8d4eb70fde15f27cace4732a4bb (diff)
radeon: fix some renderbuffer format bugs
-rw-r--r--src/mesa/drivers/dri/radeon/radeon_fbo.c8
-rw-r--r--src/mesa/drivers/dri/radeon/radeon_span.c6
2 files changed, 7 insertions, 7 deletions
diff --git a/src/mesa/drivers/dri/radeon/radeon_fbo.c b/src/mesa/drivers/dri/radeon/radeon_fbo.c
index 21007d85c3..096ded23fb 100644
--- a/src/mesa/drivers/dri/radeon/radeon_fbo.c
+++ b/src/mesa/drivers/dri/radeon/radeon_fbo.c
@@ -280,14 +280,14 @@ radeon_create_renderbuffer(GLenum format, __DRIdrawablePrivate *driDrawPriv)
rrb->base._BaseFormat = GL_DEPTH_COMPONENT;
break;
case GL_DEPTH_COMPONENT24:
- rrb->base.Format = MESA_FORMAT_Z32;
- rrb->base.DataType = GL_UNSIGNED_INT;
- rrb->base._BaseFormat = GL_DEPTH_COMPONENT;
+ rrb->base.Format = MESA_FORMAT_S8_Z24;
+ rrb->base.DataType = GL_UNSIGNED_INT_24_8_EXT;
+ rrb->base._BaseFormat = GL_DEPTH_STENCIL;
break;
case GL_DEPTH24_STENCIL8_EXT:
rrb->base.Format = MESA_FORMAT_S8_Z24;
rrb->base.DataType = GL_UNSIGNED_INT_24_8_EXT;
- rrb->base._BaseFormat = GL_STENCIL_INDEX;
+ rrb->base._BaseFormat = GL_DEPTH_STENCIL;
break;
default:
fprintf(stderr, "%s: Unknown format 0x%04x\n", __FUNCTION__, format);
diff --git a/src/mesa/drivers/dri/radeon/radeon_span.c b/src/mesa/drivers/dri/radeon/radeon_span.c
index 9cdcde1eb0..2add8c3eb7 100644
--- a/src/mesa/drivers/dri/radeon/radeon_span.c
+++ b/src/mesa/drivers/dri/radeon/radeon_span.c
@@ -848,9 +848,9 @@ static void radeonSetSpanFunctions(struct radeon_renderbuffer *rrb)
{
if (rrb->base.Format == MESA_FORMAT_RGB565) {
radeonInitPointers_RGB565(&rrb->base);
- } else if (rrb->base.Format == MESA_FORMAT_RGBA8888) { /* XXX */
+ } else if (rrb->base.Format == MESA_FORMAT_XRGB8888) {
radeonInitPointers_xRGB8888(&rrb->base);
- } else if (rrb->base.Format == MESA_FORMAT_RGBA8888) {
+ } else if (rrb->base.Format == MESA_FORMAT_ARGB8888) {
radeonInitPointers_ARGB8888(&rrb->base);
} else if (rrb->base.Format == MESA_FORMAT_ARGB4444) {
radeonInitPointers_ARGB4444(&rrb->base);
@@ -858,7 +858,7 @@ static void radeonSetSpanFunctions(struct radeon_renderbuffer *rrb)
radeonInitPointers_ARGB1555(&rrb->base);
} else if (rrb->base.Format == MESA_FORMAT_Z16) {
radeonInitDepthPointers_z16(&rrb->base);
- } else if (rrb->base.Format == GL_DEPTH_COMPONENT32) { /* XXX */
+ } else if (rrb->base.Format == MESA_FORMAT_X8_Z24) {
radeonInitDepthPointers_z24(&rrb->base);
} else if (rrb->base.Format == MESA_FORMAT_S8_Z24) {
radeonInitDepthPointers_s8_z24(&rrb->base);