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authorLuca Barbieri <luca@luca-barbieri.com>2010-02-23 08:55:38 -0800
committerJosé Fonseca <jfonseca@vmware.com>2010-02-23 19:50:24 +0000
commitc36b912e09a12b60d26fd1ebe0939b457514d800 (patch)
tree2dc68ab306264e7ed104e24a571992014d4323de /src/gallium/auxiliary/pipebuffer
parent9f4f87893b4d3555204a1a66d108f8f9185e3d14 (diff)
pipebuffer: fix inverted signalled checking
A return of 0 means the fence is signalled. Signed-off-by: José Fonseca <jfonseca@vmware.com>
Diffstat (limited to 'src/gallium/auxiliary/pipebuffer')
-rw-r--r--src/gallium/auxiliary/pipebuffer/pb_buffer_fenced.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/gallium/auxiliary/pipebuffer/pb_buffer_fenced.c b/src/gallium/auxiliary/pipebuffer/pb_buffer_fenced.c
index 95eb5f6563..d97f749b6e 100644
--- a/src/gallium/auxiliary/pipebuffer/pb_buffer_fenced.c
+++ b/src/gallium/auxiliary/pipebuffer/pb_buffer_fenced.c
@@ -696,7 +696,7 @@ fenced_buffer_map(struct pb_buffer *buf,
* Don't wait for the GPU to finish accessing it, if blocking is forbidden.
*/
if((flags & PIPE_BUFFER_USAGE_DONTBLOCK) &&
- ops->fence_signalled(ops, fenced_buf->fence, 0) == 0) {
+ ops->fence_signalled(ops, fenced_buf->fence, 0) != 0) {
goto done;
}