Merge branch 'gallium-0.1' into gallium-0.2

A first attempt at moving gallium onto a branch directly off master...

It will be interesting to see how much work this takes to get running.

Have resolved the conflicts semi-arbitarily, not compiled or tested.

Conflicts:

	.gitignore
	Makefile
	configs/config.mgw
	configs/darwin
	configs/darwin-x86ppc
	configs/default
	configs/freebsd-dri
	configs/linux-dri
	configs/linux-dri-xcb
	configs/linux-fbdev
	configs/linux-static
	configs/linux-x86-64-static
	configs/linux-x86-static
	doxygen/Makefile
	include/GL/gl.h
	progs/demos/Makefile
	progs/demos/descrip.mms
	progs/demos/texenv.c
	progs/egl/.gitignore
	progs/egl/Makefile
	progs/glsl/.gitignore
	progs/glsl/Makefile
	progs/glsl/convolutions.c
	progs/samples/Makefile.mgw
	progs/tests/.gitignore
	progs/trivial/.gitignore
	progs/trivial/point-param.c
	progs/trivial/tri.c
	progs/xdemos/.gitignore
	progs/xdemos/glthreads.c
	src/egl/drivers/demo/Makefile
	src/egl/drivers/dri/Makefile
	src/egl/main/Makefile
	src/glu/Makefile
	src/glu/sgi/Makefile
	src/glu/sgi/Makefile.mgw
	src/glut/glx/Makefile.mgw
	src/glut/os2/WarpWin.cpp
	src/glut/os2/glut_cindex.cpp
	src/glut/os2/glut_gamemode.cpp
	src/glut/os2/glut_win.cpp
	src/glut/os2/glut_winmisc.cpp
	src/glut/os2/os2_glx.cpp
	src/glut/os2/os2_menu.cpp
	src/glut/os2/os2_winproc.cpp
	src/glw/Makefile
	src/glx/x11/dri_glx.c
	src/glx/x11/glxext.c
	src/mesa/Makefile
	src/mesa/Makefile.mgw
	src/mesa/descrip.mms
	src/mesa/drivers/beos/Makefile
	src/mesa/drivers/common/descrip.mms
	src/mesa/drivers/common/driverfuncs.c
	src/mesa/drivers/directfb/Makefile
	src/mesa/drivers/dri/Makefile.template
	src/mesa/drivers/dri/common/dri_bufmgr.c
	src/mesa/drivers/dri/common/dri_bufmgr.h
	src/mesa/drivers/dri/common/dri_util.c
	src/mesa/drivers/dri/common/extension_helper.h
	src/mesa/drivers/dri/common/mmio.h
	src/mesa/drivers/dri/common/utils.c
	src/mesa/drivers/dri/common/utils.h
	src/mesa/drivers/dri/glcore/Makefile
	src/mesa/drivers/dri/i810/i810screen.c
	src/mesa/drivers/dri/i915/intel_ioctl.c
	src/mesa/drivers/dri/i915/intel_ioctl.h
	src/mesa/drivers/dri/i915/intel_screen.c
	src/mesa/drivers/dri/i915/server/i830_common.h
	src/mesa/drivers/dri/i915/server/i830_dri.h
	src/mesa/drivers/dri/i965/intel_screen.c
	src/mesa/drivers/dri/i965/server/i830_common.h
	src/mesa/drivers/dri/i965/server/i830_dri.h
	src/mesa/drivers/dri/mach64/mach64_screen.c
	src/mesa/drivers/dri/nouveau/nouveau_context.h
	src/mesa/drivers/dri/nouveau/nouveau_fifo.c
	src/mesa/drivers/dri/nouveau/nouveau_fifo.h
	src/mesa/drivers/dri/nouveau/nouveau_screen.c
	src/mesa/drivers/dri/nouveau/nouveau_screen.h
	src/mesa/drivers/dri/r128/r128_tex.h
	src/mesa/drivers/dri/savage/savageioctl.h
	src/mesa/drivers/fbdev/Makefile
	src/mesa/drivers/osmesa/Makefile
	src/mesa/drivers/osmesa/descrip.mms
	src/mesa/drivers/x11/Makefile
	src/mesa/drivers/x11/descrip.mms
	src/mesa/drivers/x11/xm_dd.c
	src/mesa/glapi/glapi.c
	src/mesa/glapi/glthread.c
	src/mesa/main/api_validate.c
	src/mesa/main/attrib.c
	src/mesa/main/bufferobj.c
	src/mesa/main/bufferobj.h
	src/mesa/main/buffers.c
	src/mesa/main/config.h
	src/mesa/main/context.c
	src/mesa/main/descrip.mms
	src/mesa/main/drawpix.c
	src/mesa/main/enums.c
	src/mesa/main/fbobject.c
	src/mesa/main/glheader.h
	src/mesa/main/imports.c
	src/mesa/main/mipmap.c
	src/mesa/main/mm.c
	src/mesa/main/mm.h
	src/mesa/main/mtypes.h
	src/mesa/main/points.c
	src/mesa/main/sources
	src/mesa/main/state.c
	src/mesa/main/texcompress_fxt1.c
	src/mesa/main/texenvprogram.c
	src/mesa/main/texobj.c
	src/mesa/main/texstate.c
	src/mesa/main/texstore.c
	src/mesa/math/descrip.mms
	src/mesa/shader/arbprogram.c
	src/mesa/shader/descrip.mms
	src/mesa/shader/prog_execute.c
	src/mesa/shader/prog_statevars.c
	src/mesa/shader/prog_statevars.h
	src/mesa/shader/prog_uniform.c
	src/mesa/shader/program.c
	src/mesa/shader/program.h
	src/mesa/shader/shader_api.c
	src/mesa/shader/slang/descrip.mms
	src/mesa/shader/slang/library/slang_vertex_builtin_gc.h
	src/mesa/sources
	src/mesa/swrast/descrip.mms
	src/mesa/swrast/s_drawpix.c
	src/mesa/swrast/s_fragprog.c
	src/mesa/swrast/s_readpix.c
	src/mesa/swrast/s_span.c
	src/mesa/swrast_setup/descrip.mms
	src/mesa/tnl/descrip.mms
	src/mesa/tnl/t_context.h
	src/mesa/tnl/t_vp_build.c
	src/mesa/tnl/tnl.h
	src/mesa/vbo/descrip.mms
	src/mesa/vbo/vbo_context.c
	src/mesa/vbo/vbo_exec_array.c
	src/mesa/x86-64/xform4.S
	src/mesa/x86/rtasm/x86sse.c
	src/mesa/x86/rtasm/x86sse.h
	windows/VC6/progs/glut/glut.dsp
	windows/VC7/mesa/gdi/gdi.vcproj
	windows/VC7/mesa/glu/glu.vcproj
	windows/VC7/mesa/mesa.sln
	windows/VC7/mesa/mesa/mesa.vcproj
	windows/VC7/mesa/osmesa/osmesa.vcproj
	windows/VC7/progs/glut/glut.vcproj
	windows/VC8/mesa/gdi/gdi.vcproj
	windows/VC8/mesa/glu/glu.vcproj
	windows/VC8/mesa/mesa.sln
	windows/VC8/mesa/mesa/mesa.vcproj
	windows/VC8/progs/glut/glut.vcproj

1 files changed, 186 insertions, 0 deletions

diff --git a/src/gallium/drivers/i965simple/brw_urb.c b/src/gallium/drivers/i965simple/brw_urb.c
new file mode 100644
index 0000000000..101a4367b9
--- /dev/null
+++ b/src/gallium/drivers/i965simple/brw_urb.c
@@ -0,0 +1,186 @@
+/*
+ Copyright (C) Intel Corp.  2006.  All Rights Reserved.
+ Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to
+ develop this 3D driver.
+
+ Permission is hereby granted, free of charge, to any person obtaining
+ a copy of this software and associated documentation files (the
+ "Software"), to deal in the Software without restriction, including
+ without limitation the rights to use, copy, modify, merge, publish,
+ distribute, sublicense, and/or sell copies of the Software, and to
+ permit persons to whom the Software is furnished to do so, subject to
+ the following conditions:
+
+ The above copyright notice and this permission notice (including the
+ next paragraph) shall be included in all copies or substantial
+ portions of the Software.
+
+ THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
+ LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
+ OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
+ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+
+ **********************************************************************/
+ /*
+  * Authors:
+  *   Keith Whitwell <keith@tungstengraphics.com>
+  */
+
+
+#include "brw_context.h"
+//#include "brw_state.h"
+#include "brw_batch.h"
+#include "brw_defines.h"
+
+#define VS 0
+#define GS 1
+#define CLP 2
+#define SF 3
+#define CS 4
+
+/* XXX: Are the min_entry_size numbers useful?
+ * XXX: Verify min_nr_entries, esp for VS.
+ * XXX: Verify SF min_entry_size.
+ */
+static const struct {
+   unsigned min_nr_entries;
+   unsigned preferred_nr_entries;
+   unsigned min_entry_size;
+   unsigned max_entry_size;
+} limits[CS+1] = {
+   { 8, 32, 1, 5 },			/* vs */
+   { 4, 8,  1, 5 },			/* gs */
+   { 6, 8,  1, 5 },			/* clp */
+   { 1, 8,  1, 12 },		        /* sf */
+   { 1, 4,  1, 32 }			/* cs */
+};
+
+
+static boolean check_urb_layout( struct brw_context *brw )
+{
+   brw->urb.vs_start = 0;
+   brw->urb.gs_start = brw->urb.nr_vs_entries * brw->urb.vsize;
+   brw->urb.clip_start = brw->urb.gs_start + brw->urb.nr_gs_entries * brw->urb.vsize;
+   brw->urb.sf_start = brw->urb.clip_start + brw->urb.nr_clip_entries * brw->urb.vsize;
+   brw->urb.cs_start = brw->urb.sf_start + brw->urb.nr_sf_entries * brw->urb.sfsize;
+
+   return brw->urb.cs_start + brw->urb.nr_cs_entries * brw->urb.csize <= 256;
+}
+
+/* Most minimal update, forces re-emit of URB fence packet after GS
+ * unit turned on/off.
+ */
+static void recalculate_urb_fence( struct brw_context *brw )
+{
+   unsigned csize = brw->curbe.total_size;
+   unsigned vsize = brw->vs.prog_data->urb_entry_size;
+   unsigned sfsize = brw->sf.prog_data->urb_entry_size;
+
+   if (csize < limits[CS].min_entry_size)
+      csize = limits[CS].min_entry_size;
+
+   if (vsize < limits[VS].min_entry_size)
+      vsize = limits[VS].min_entry_size;
+
+   if (sfsize < limits[SF].min_entry_size)
+      sfsize = limits[SF].min_entry_size;
+
+   if (brw->urb.vsize < vsize ||
+       brw->urb.sfsize < sfsize ||
+       brw->urb.csize < csize ||
+       (brw->urb.constrained && (brw->urb.vsize > brw->urb.vsize ||
+				 brw->urb.sfsize > brw->urb.sfsize ||
+				 brw->urb.csize > brw->urb.csize))) {
+
+
+      brw->urb.csize = csize;
+      brw->urb.sfsize = sfsize;
+      brw->urb.vsize = vsize;
+
+      brw->urb.nr_vs_entries = limits[VS].preferred_nr_entries;
+      brw->urb.nr_gs_entries = limits[GS].preferred_nr_entries;
+      brw->urb.nr_clip_entries = limits[CLP].preferred_nr_entries;
+      brw->urb.nr_sf_entries = limits[SF].preferred_nr_entries;
+      brw->urb.nr_cs_entries = limits[CS].preferred_nr_entries;
+
+      if (!check_urb_layout(brw)) {
+	 brw->urb.nr_vs_entries = limits[VS].min_nr_entries;
+	 brw->urb.nr_gs_entries = limits[GS].min_nr_entries;
+	 brw->urb.nr_clip_entries = limits[CLP].min_nr_entries;
+	 brw->urb.nr_sf_entries = limits[SF].min_nr_entries;
+	 brw->urb.nr_cs_entries = limits[CS].min_nr_entries;
+
+	 brw->urb.constrained = 1;
+
+	 if (!check_urb_layout(brw)) {
+	    /* This is impossible, given the maximal sizes of urb
+	     * entries and the values for minimum nr of entries
+	     * provided above.
+	     */
+	    debug_printf("couldn't calculate URB layout!\n");
+	    exit(1);
+	 }
+
+	 if (BRW_DEBUG & (DEBUG_URB|DEBUG_FALLBACKS))
+	    debug_printf("URB CONSTRAINED\n");
+      }
+      else
+	 brw->urb.constrained = 0;
+
+      if (BRW_DEBUG & DEBUG_URB)
+	 debug_printf("URB fence: %d ..VS.. %d ..GS.. %d ..CLP.. %d ..SF.. %d ..CS.. %d\n",
+		      brw->urb.vs_start,
+		      brw->urb.gs_start,
+		      brw->urb.clip_start,
+		      brw->urb.sf_start,
+		      brw->urb.cs_start,
+		      256);
+
+      brw->state.dirty.brw |= BRW_NEW_URB_FENCE;
+   }
+}
+
+
+const struct brw_tracked_state brw_recalculate_urb_fence = {
+   .dirty = {
+      .brw = BRW_NEW_CURBE_OFFSETS,
+      .cache = (CACHE_NEW_VS_PROG |
+		CACHE_NEW_SF_PROG)
+   },
+   .update = recalculate_urb_fence
+};
+
+
+
+
+
+void brw_upload_urb_fence(struct brw_context *brw)
+{
+   struct brw_urb_fence uf;
+   memset(&uf, 0, sizeof(uf));
+
+   uf.header.opcode = CMD_URB_FENCE;
+   uf.header.length = sizeof(uf)/4-2;
+   uf.header.vs_realloc = 1;
+   uf.header.gs_realloc = 1;
+   uf.header.clp_realloc = 1;
+   uf.header.sf_realloc = 1;
+   uf.header.vfe_realloc = 1;
+   uf.header.cs_realloc = 1;
+
+   /* The ordering below is correct, not the layout in the
+    * instruction.
+    *
+    * There are 256 urb reg pairs in total.
+    */
+   uf.bits0.vs_fence  = brw->urb.gs_start;
+   uf.bits0.gs_fence  = brw->urb.clip_start;
+   uf.bits0.clp_fence = brw->urb.sf_start;
+   uf.bits1.sf_fence  = brw->urb.cs_start;
+   uf.bits1.cs_fence  = 256;
+
+   BRW_BATCH_STRUCT(brw, &uf);
+}