r600g: always perform texture perspective divide + fix blending

quake3 engine seems to run fine at this point (ioquake)

Signed-off-by: Jerome Glisse <jglisse@redhat.com>

1 files changed, 60 insertions, 61 deletions

diff --git a/src/gallium/drivers/r600/r600_shader.c b/src/gallium/drivers/r600/r600_shader.c
index 43b3e40fad..8da102cde0 100644
--- a/src/gallium/drivers/r600/r600_shader.c
+++ b/src/gallium/drivers/r600/r600_shader.c
@@ -963,68 +963,66 @@ static int tgsi_tex(struct r600_shader_ctx *ctx)
 	src_gpr = ctx->file_offset[inst->Src[0].Register.File] + inst->Src[0].Register.Index;
 
 	/* Add perspective divide */
-	if (ctx->inst_info->tgsi_opcode == TGSI_OPCODE_TXP) {
-		memset(&alu, 0, sizeof(struct r600_bc_alu));
-		alu.inst = V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_RECIP_IEEE;
-		alu.src[0].sel = src_gpr;
-		alu.src[0].chan = tgsi_chan(&inst->Src[0], 3);
-		alu.dst.sel = ctx->temp_reg;
-		alu.dst.chan = 3;
-		alu.last = 1;
-		alu.dst.write = 1;
-		r = r600_bc_add_alu(ctx->bc, &alu);
-		if (r)
-			return r;
+	memset(&alu, 0, sizeof(struct r600_bc_alu));
+	alu.inst = V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_RECIP_IEEE;
+	alu.src[0].sel = src_gpr;
+	alu.src[0].chan = tgsi_chan(&inst->Src[0], 3);
+	alu.dst.sel = ctx->temp_reg;
+	alu.dst.chan = 3;
+	alu.last = 1;
+	alu.dst.write = 1;
+	r = r600_bc_add_alu(ctx->bc, &alu);
+	if (r)
+		return r;
 
-		memset(&alu, 0, sizeof(struct r600_bc_alu));
-		alu.inst = V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MUL;
-		alu.src[0].sel = ctx->temp_reg;
-		alu.src[0].chan = 3;
-		alu.src[1].sel = src_gpr;
-		alu.src[1].chan = tgsi_chan(&inst->Src[0], 0);
-		alu.dst.sel = ctx->temp_reg;
-		alu.dst.chan = 0;
-		alu.dst.write = 1;
-		r = r600_bc_add_alu(ctx->bc, &alu);
-		if (r)
-			return r;
-		memset(&alu, 0, sizeof(struct r600_bc_alu));
-		alu.inst = V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MUL;
-		alu.src[0].sel = ctx->temp_reg;
-		alu.src[0].chan = 3;
-		alu.src[1].sel = src_gpr;
-		alu.src[1].chan = tgsi_chan(&inst->Src[0], 1);
-		alu.dst.sel = ctx->temp_reg;
-		alu.dst.chan = 1;
-		alu.dst.write = 1;
-		r = r600_bc_add_alu(ctx->bc, &alu);
-		if (r)
-			return r;
-		memset(&alu, 0, sizeof(struct r600_bc_alu));
-		alu.inst = V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MUL;
-		alu.src[0].sel = ctx->temp_reg;
-		alu.src[0].chan = 3;
-		alu.src[1].sel = src_gpr;
-		alu.src[1].chan = tgsi_chan(&inst->Src[0], 2);
-		alu.dst.sel = ctx->temp_reg;
-		alu.dst.chan = 2;
-		alu.dst.write = 1;
-		r = r600_bc_add_alu(ctx->bc, &alu);
-		if (r)
-			return r;
-		memset(&alu, 0, sizeof(struct r600_bc_alu));
-		alu.inst = V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MOV;
-		alu.src[0].sel = 249;
-		alu.src[0].chan = 0;
-		alu.dst.sel = ctx->temp_reg;
-		alu.dst.chan = 3;
-		alu.last = 1;
-		alu.dst.write = 1;
-		r = r600_bc_add_alu(ctx->bc, &alu);
-		if (r)
-			return r;
-		src_gpr = ctx->temp_reg;
-	}
+	memset(&alu, 0, sizeof(struct r600_bc_alu));
+	alu.inst = V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MUL;
+	alu.src[0].sel = ctx->temp_reg;
+	alu.src[0].chan = 3;
+	alu.src[1].sel = src_gpr;
+	alu.src[1].chan = tgsi_chan(&inst->Src[0], 0);
+	alu.dst.sel = ctx->temp_reg;
+	alu.dst.chan = 0;
+	alu.dst.write = 1;
+	r = r600_bc_add_alu(ctx->bc, &alu);
+	if (r)
+		return r;
+	memset(&alu, 0, sizeof(struct r600_bc_alu));
+	alu.inst = V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MUL;
+	alu.src[0].sel = ctx->temp_reg;
+	alu.src[0].chan = 3;
+	alu.src[1].sel = src_gpr;
+	alu.src[1].chan = tgsi_chan(&inst->Src[0], 1);
+	alu.dst.sel = ctx->temp_reg;
+	alu.dst.chan = 1;
+	alu.dst.write = 1;
+	r = r600_bc_add_alu(ctx->bc, &alu);
+	if (r)
+		return r;
+	memset(&alu, 0, sizeof(struct r600_bc_alu));
+	alu.inst = V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MUL;
+	alu.src[0].sel = ctx->temp_reg;
+	alu.src[0].chan = 3;
+	alu.src[1].sel = src_gpr;
+	alu.src[1].chan = tgsi_chan(&inst->Src[0], 2);
+	alu.dst.sel = ctx->temp_reg;
+	alu.dst.chan = 2;
+	alu.dst.write = 1;
+	r = r600_bc_add_alu(ctx->bc, &alu);
+	if (r)
+		return r;
+	memset(&alu, 0, sizeof(struct r600_bc_alu));
+	alu.inst = V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MOV;
+	alu.src[0].sel = 249;
+	alu.src[0].chan = 0;
+	alu.dst.sel = ctx->temp_reg;
+	alu.dst.chan = 3;
+	alu.last = 1;
+	alu.dst.write = 1;
+	r = r600_bc_add_alu(ctx->bc, &alu);
+	if (r)
+		return r;
+	src_gpr = ctx->temp_reg;
 
 	/* TODO use temp if src_gpr is not a temporary reg (File != TEMPORARY) */
 	memset(&tex, 0, sizeof(struct r600_bc_tex));
@@ -1041,6 +1039,7 @@ static int tgsi_tex(struct r600_shader_ctx *ctx)
 	tex.src_sel_y = 1;
 	tex.src_sel_z = 2;
 	tex.src_sel_w = 3;
+
 	if (inst->Texture.Texture != TGSI_TEXTURE_RECT) {
 		tex.coord_type_x = 1;
 		tex.coord_type_y = 1;