diff options
| author | Zack Rusin <zackr@vmware.com> | 2009-10-24 01:05:40 -0400 |
|---|---|---|
| committer | Zack Rusin <zackr@vmware.com> | 2009-10-26 08:15:48 -0400 |
| commit | a9f8baf00b264a9b370ecb611334af3063674ce5 (patch) | |
| tree | 487fcef2fb9805db33c913b1c53bd9d6d070509d /src/gallium/state_trackers/xorg/xorg_exa_tgsi.c | |
| parent | 6b8ce4cc4f9acdd9227e26a812dd911f45b623a5 (diff) | |
st/xorg: add yuv vertex shader
plus some general fixes
Diffstat (limited to 'src/gallium/state_trackers/xorg/xorg_exa_tgsi.c')
| -rw-r--r-- | src/gallium/state_trackers/xorg/xorg_exa_tgsi.c | 15 |
1 files changed, 15 insertions, 0 deletions
diff --git a/src/gallium/state_trackers/xorg/xorg_exa_tgsi.c b/src/gallium/state_trackers/xorg/xorg_exa_tgsi.c index 9503891701..7cb11dc42b 100644 --- a/src/gallium/state_trackers/xorg/xorg_exa_tgsi.c +++ b/src/gallium/state_trackers/xorg/xorg_exa_tgsi.c @@ -236,6 +236,7 @@ create_vs(struct pipe_context *pipe, boolean is_fill = vs_traits & VS_FILL; boolean is_composite = vs_traits & VS_COMPOSITE; boolean has_mask = vs_traits & VS_MASK; + boolean is_yuv = vs_traits & VS_YUV; unsigned input_slot = 0; ureg = ureg_create(TGSI_PROCESSOR_VERTEX); @@ -254,6 +255,20 @@ create_vs(struct pipe_context *pipe, const0, const1); ureg_MOV(ureg, dst, src); + if (is_yuv) { + src = ureg_DECL_vs_input(ureg, input_slot++); + dst = ureg_DECL_output(ureg, TGSI_SEMANTIC_GENERIC, 0); + ureg_MOV(ureg, dst, src); + + src = ureg_DECL_vs_input(ureg, input_slot++); + dst = ureg_DECL_output(ureg, TGSI_SEMANTIC_GENERIC, 1); + ureg_MOV(ureg, dst, src); + + src = ureg_DECL_vs_input(ureg, input_slot++); + dst = ureg_DECL_output(ureg, TGSI_SEMANTIC_GENERIC, 2); + ureg_MOV(ureg, dst, src); + } + if (is_composite) { src = ureg_DECL_vs_input(ureg, input_slot++); dst = ureg_DECL_output(ureg, TGSI_SEMANTIC_GENERIC, 0); |