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authorRoland Scheidegger <sroland@vmware.com>2009-04-22 17:37:18 +0200
committerRoland Scheidegger <sroland@vmware.com>2009-04-22 17:38:06 +0200
commit50853be894aa3edd1e9271f7d625f319209e340f (patch)
tree9ec361fae781d3968f436e075326df73752f2a52 /src/mesa/drivers/dri/i915/i915_context.c
parent7843243deedd66b0c94c8874e732ed7e8c6617ff (diff)
intel: fix max anisotropy supported
i915 actually supports up to 4 (according to header file - not tested), i965 up to 16 (code already handled this but slightly broken), so don't use 2 for all chips, even though angular dependency is very high.
Diffstat (limited to 'src/mesa/drivers/dri/i915/i915_context.c')
-rw-r--r--src/mesa/drivers/dri/i915/i915_context.c2
1 files changed, 2 insertions, 0 deletions
diff --git a/src/mesa/drivers/dri/i915/i915_context.c b/src/mesa/drivers/dri/i915/i915_context.c
index fdd2cf6109..1f9f363df9 100644
--- a/src/mesa/drivers/dri/i915/i915_context.c
+++ b/src/mesa/drivers/dri/i915/i915_context.c
@@ -145,6 +145,8 @@ i915CreateContext(const __GLcontextModes * mesaVis,
ctx->Const.MaxTextureRectSize = (1 << 11);
ctx->Const.MaxTextureUnits = I915_TEX_UNITS;
+ ctx->Const.MaxTextureMaxAnisotropy = 4.0;
+
/* GL_ARB_fragment_program limits - don't think Mesa actually
* validates programs against these, and in any case one ARB
* instruction can translate to more than one HW instruction, so