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authorDave Airlie <airlied@linux.ie>2008-08-24 17:52:40 +1000
committerDave Airlie <airlied@linux.ie>2008-08-24 17:52:40 +1000
commit7c81124d7c4a4d1da9f48cbf7e82ab1a3a970a7a (patch)
tree832251b8ecfc3282c1748187350ceb0e3a5cdc9f /src/mesa/drivers/dri/i915/i915_vtbl.c
parenta35002c1673a1a37ec79b237dda7e8f6b9c9962a (diff)
Revert "Merge branch 'drm-gem'"
This reverts commit 53675e5c05c0598b7ea206d5c27dbcae786a2c03. Conflicts: src/mesa/drivers/dri/i965/brw_wm_surface_state.c
Diffstat (limited to 'src/mesa/drivers/dri/i915/i915_vtbl.c')
-rw-r--r--src/mesa/drivers/dri/i915/i915_vtbl.c40
1 files changed, 17 insertions, 23 deletions
diff --git a/src/mesa/drivers/dri/i915/i915_vtbl.c b/src/mesa/drivers/dri/i915/i915_vtbl.c
index 19f2206285..135bfaa265 100644
--- a/src/mesa/drivers/dri/i915/i915_vtbl.c
+++ b/src/mesa/drivers/dri/i915/i915_vtbl.c
@@ -39,7 +39,6 @@
#include "intel_batchbuffer.h"
#include "intel_tex.h"
#include "intel_regions.h"
-#include "intel_tris.h"
#include "i915_reg.h"
#include "i915_context.h"
@@ -297,9 +296,9 @@ i915_emit_state(struct intel_context *intel)
{
struct i915_context *i915 = i915_context(&intel->ctx);
struct i915_hw_state *state = i915->current;
- int i, count, aper_count;
+ int i;
+ int ret, count;
GLuint dirty;
- dri_bo *aper_array[3 + I915_TEX_UNITS];
GET_CURRENT_CONTEXT(ctx);
BATCH_LOCALS;
@@ -314,32 +313,28 @@ i915_emit_state(struct intel_context *intel)
* Set the space as LOOP_CLIPRECTS now, since that's what our primitives
* will be emitted under.
*/
- intel_batchbuffer_require_space(intel->batch,
- get_state_size(state) + INTEL_PRIM_EMIT_SIZE,
+ intel_batchbuffer_require_space(intel->batch, get_state_size(state) + 8,
LOOP_CLIPRECTS);
count = 0;
again:
- aper_count = 0;
dirty = get_dirty(state);
- aper_array[aper_count++] = intel->batch->buf;
+ ret = 0;
if (dirty & I915_UPLOAD_BUFFERS) {
- aper_array[aper_count++] = state->draw_region->buffer;
- if (state->depth_region)
- aper_array[aper_count++] = state->depth_region->buffer;
+ ret |= dri_bufmgr_check_aperture_space(state->draw_region->buffer);
+ if (state->depth_region)
+ ret |= dri_bufmgr_check_aperture_space(state->depth_region->buffer);
}
if (dirty & I915_UPLOAD_TEX_ALL) {
- for (i = 0; i < I915_TEX_UNITS; i++) {
- if (dirty & I915_UPLOAD_TEX(i)) {
- if (state->tex_buffer[i]) {
- aper_array[aper_count++] = state->tex_buffer[i];
- }
- }
- }
+ for (i = 0; i < I915_TEX_UNITS; i++)
+ if (dirty & I915_UPLOAD_TEX(i)) {
+ if (state->tex_buffer[i]) {
+ ret |= dri_bufmgr_check_aperture_space(state->tex_buffer[i]);
+ }
+ }
}
-
- if (dri_bufmgr_check_aperture_space(aper_array, aper_count)) {
+ if (ret) {
if (count == 0) {
count++;
intel_batchbuffer_flush(intel->batch);
@@ -382,14 +377,14 @@ i915_emit_state(struct intel_context *intel)
OUT_BATCH(state->Buffer[I915_DESTREG_CBUFADDR0]);
OUT_BATCH(state->Buffer[I915_DESTREG_CBUFADDR1]);
OUT_RELOC(state->draw_region->buffer,
- I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER,
+ DRM_BO_FLAG_MEM_TT | DRM_BO_FLAG_WRITE,
state->draw_region->draw_offset);
if (state->depth_region) {
OUT_BATCH(state->Buffer[I915_DESTREG_DBUFADDR0]);
OUT_BATCH(state->Buffer[I915_DESTREG_DBUFADDR1]);
OUT_RELOC(state->depth_region->buffer,
- I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER,
+ DRM_BO_FLAG_MEM_TT | DRM_BO_FLAG_WRITE,
state->depth_region->draw_offset);
}
@@ -432,7 +427,7 @@ i915_emit_state(struct intel_context *intel)
if (state->tex_buffer[i]) {
OUT_RELOC(state->tex_buffer[i],
- I915_GEM_DOMAIN_SAMPLER, 0,
+ DRM_BO_FLAG_MEM_TT | DRM_BO_FLAG_READ,
state->tex_offset[i]);
}
else if (state == &i915->meta) {
@@ -634,5 +629,4 @@ i915InitVtbl(struct i915_context *i915)
i915->intel.vtbl.flush_cmd = i915_flush_cmd;
i915->intel.vtbl.assert_not_dirty = i915_assert_not_dirty;
i915->intel.vtbl.note_unlock = i915_note_unlock;
- i915->intel.vtbl.finish_batch = intel_finish_vb;
}