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authorEric Anholt <eric@anholt.net>2009-12-16 15:50:40 -0800
committerEric Anholt <eric@anholt.net>2009-12-22 14:20:27 -0800
commitf67748038935e609aa85450b20d550b4813c9429 (patch)
tree34895335381f089cce20314342cd790d17e7b9f3 /src/mesa/drivers/dri/i915/i915_vtbl.c
parentcb3810dd19760797e699c47929f655b829c4d339 (diff)
intel: Replace some gen3 IS_* checks with context structure usage.
Shaves 400 bytes or so from i915_dri.so.
Diffstat (limited to 'src/mesa/drivers/dri/i915/i915_vtbl.c')
-rw-r--r--src/mesa/drivers/dri/i915/i915_vtbl.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/mesa/drivers/dri/i915/i915_vtbl.c b/src/mesa/drivers/dri/i915/i915_vtbl.c
index ba6be9796e..9f7635a953 100644
--- a/src/mesa/drivers/dri/i915/i915_vtbl.c
+++ b/src/mesa/drivers/dri/i915/i915_vtbl.c
@@ -611,7 +611,7 @@ i915_state_draw_region(struct intel_context *intel,
* the value of this bit, the pipeline needs to be MI_FLUSHed. And it
* can only be set when a depth buffer is already defined.
*/
- if (IS_945(intel->intelScreen->deviceID) && intel->use_early_z &&
+ if (intel->is_945 && intel->use_early_z &&
depth_region->tiling != I915_TILING_NONE)
value |= CLASSIC_EARLY_DEPTH;