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authorEric Anholt <eric@anholt.net>2007-11-16 16:43:45 -0800
committerEric Anholt <eric@anholt.net>2007-11-16 17:29:30 -0800
commitf00a64999c197e6a96e65fd00f64224a6f22c9fa (patch)
tree48c1171ce1b7a7eaa1396ac61069819f5b5c4be2 /src/mesa/drivers/dri/i915/intel_pixel_draw.c
parent9b461d4d029497dd6f71e60220849e1b66bb8cf5 (diff)
[intel] Add 965 support to shared intel_blit.c
This requires that regions grow a marker of whether they are tiled or not, because fence (surface) registers are ignored by the 965 2D engine.
Diffstat (limited to 'src/mesa/drivers/dri/i915/intel_pixel_draw.c')
-rw-r--r--src/mesa/drivers/dri/i915/intel_pixel_draw.c6
1 files changed, 2 insertions, 4 deletions
diff --git a/src/mesa/drivers/dri/i915/intel_pixel_draw.c b/src/mesa/drivers/dri/i915/intel_pixel_draw.c
index afb586b4a3..8349f4c748 100644
--- a/src/mesa/drivers/dri/i915/intel_pixel_draw.c
+++ b/src/mesa/drivers/dri/i915/intel_pixel_draw.c
@@ -312,10 +312,8 @@ do_blit_drawpixels(GLcontext * ctx,
intelEmitCopyBlit(intel,
dest->cpp,
- rowLength,
- src_buffer, src_offset,
- dest->pitch,
- dest->buffer, 0,
+ rowLength, src_buffer, src_offset, GL_FALSE,
+ dest->pitch, dest->buffer, 0, dest->tiled,
rect.x1 - dest_rect.x1,
rect.y2 - dest_rect.y2,
rect.x1,