Merge branch 'i915-unification'

This branch replaces the DRM pool interface used by i915tex with a "dri_bufmgr"
interface in dri/common which may be set up to use either TTM or traditional
static memory management according to what is available.  The i915tex TTM
code now requires an updated DDX which provides proper buffer objects for the
static front/back/depth, instead of using fake buffers.  The driver is now
built as i915_dri.so, and should replace the old i915 driver shortly.

29 files changed, 476 insertions, 881 deletions

diff --git a/src/mesa/drivers/dri/i915tex/Makefile b/src/mesa/drivers/dri/i915tex/Makefile
index ed8483a028..d3d0bd570c 100644
--- a/src/mesa/drivers/dri/i915tex/Makefile
+++ b/src/mesa/drivers/dri/i915tex/Makefile
@@ -2,7 +2,7 @@
 TOP = ../../../../..
 include $(TOP)/configs/current
 
-LIBNAME = i915tex_dri.so
+LIBNAME = i915_dri.so
 
 MINIGLX_SOURCES = server/intel_dri.c
 
@@ -52,8 +52,7 @@ DRIVER_SOURCES = \
 	intel_state.c \
 	intel_tris.c \
 	intel_fbo.c \
-	intel_depthstencil.c \
-	intel_batchpool.c
+	intel_depthstencil.c
 
 C_SOURCES = \
 	$(COMMON_SOURCES) \
diff --git a/src/mesa/drivers/dri/i915tex/i830_context.h b/src/mesa/drivers/dri/i915tex/i830_context.h
index 3d754103c0..9397fa45b5 100644
--- a/src/mesa/drivers/dri/i915tex/i830_context.h
+++ b/src/mesa/drivers/dri/i915tex/i830_context.h
@@ -114,10 +114,10 @@ struct i830_hw_state
    struct intel_region *depth_region;
 
    /* Regions aren't actually that appropriate here as the memory may
-    * be from a PBO or FBO.  Just use the buffer id.  Will have to do
-    * this for draw and depth for FBO's...
+    * be from a PBO or FBO.  Will have to do this for draw and depth for
+    * FBO's...
     */
-   struct _DriBufferObject *tex_buffer[I830_TEX_UNITS];
+   dri_bo *tex_buffer[I830_TEX_UNITS];
    GLuint tex_offset[I830_TEX_UNITS];
 
    GLuint emitted;              /* I810_UPLOAD_* */
diff --git a/src/mesa/drivers/dri/i915tex/i830_metaops.c b/src/mesa/drivers/dri/i915tex/i830_metaops.c
index f76646d89d..13e4ab3aac 100644
--- a/src/mesa/drivers/dri/i915tex/i830_metaops.c
+++ b/src/mesa/drivers/dri/i915tex/i830_metaops.c
@@ -238,7 +238,7 @@ set_texture_blend_replace(struct intel_context *intel)
  */
 static GLboolean
 set_tex_rect_source(struct intel_context *intel,
-                    struct _DriBufferObject *buffer,
+                    dri_bo *buffer,
                     GLuint offset,
                     GLuint pitch, GLuint height, GLenum format, GLenum type)
 {
diff --git a/src/mesa/drivers/dri/i915tex/i830_texstate.c b/src/mesa/drivers/dri/i915tex/i830_texstate.c
index 0d3f053226..7613b9d2a6 100644
--- a/src/mesa/drivers/dri/i915tex/i830_texstate.c
+++ b/src/mesa/drivers/dri/i915tex/i830_texstate.c
@@ -124,7 +124,7 @@ i830_update_tex_unit(struct intel_context *intel, GLuint unit, GLuint ss3)
    /*We need to refcount these. */
 
    if (i830->state.tex_buffer[unit] != NULL) {
-       driBOUnReference(i830->state.tex_buffer[unit]);
+       dri_bo_unreference(i830->state.tex_buffer[unit]);
        i830->state.tex_buffer[unit] = NULL;
    }
 
@@ -155,8 +155,8 @@ i830_update_tex_unit(struct intel_context *intel, GLuint unit, GLuint ss3)
 
       pitch = intelObj->pitchOverride;
    } else {
-      i830->state.tex_buffer[unit] = driBOReference(intelObj->mt->region->
-						    buffer);
+      dri_bo_reference(intelObj->mt->region->buffer);
+      i830->state.tex_buffer[unit] = intelObj->mt->region->buffer;
       i830->state.tex_offset[unit] = intel_miptree_image_offset(intelObj->mt,
 								0, intelObj->
 								firstLevel);
@@ -324,7 +324,7 @@ i830UpdateTextureState(struct intel_context *intel)
             I830_ACTIVESTATE(i830, I830_UPLOAD_TEX(i), GL_FALSE);
 
 	 if (i830->state.tex_buffer[i] != NULL) {
-	    driBOUnReference(i830->state.tex_buffer[i]);
+	    dri_bo_unreference(i830->state.tex_buffer[i]);
 	    i830->state.tex_buffer[i] = NULL;
 	 }
          break;
diff --git a/src/mesa/drivers/dri/i915tex/i830_vtbl.c b/src/mesa/drivers/dri/i915tex/i830_vtbl.c
index b2a1ba0ce3..eecff2729f 100644
--- a/src/mesa/drivers/dri/i915tex/i830_vtbl.c
+++ b/src/mesa/drivers/dri/i915tex/i830_vtbl.c
@@ -456,7 +456,6 @@ i830_emit_state(struct intel_context *intel)
       OUT_BATCH(state->Buffer[I830_DESTREG_CBUFADDR1]);
       OUT_RELOC(state->draw_region->buffer,
                 DRM_BO_FLAG_MEM_TT | DRM_BO_FLAG_WRITE,
-                DRM_BO_MASK_MEM | DRM_BO_FLAG_WRITE,
                 state->draw_region->draw_offset);
 
       if (state->depth_region) {
@@ -464,7 +463,6 @@ i830_emit_state(struct intel_context *intel)
          OUT_BATCH(state->Buffer[I830_DESTREG_DBUFADDR1]);
          OUT_RELOC(state->depth_region->buffer,
                    DRM_BO_FLAG_MEM_TT | DRM_BO_FLAG_WRITE,
-                   DRM_BO_MASK_MEM | DRM_BO_FLAG_WRITE,
                    state->depth_region->draw_offset);
       }
 
@@ -492,7 +490,6 @@ i830_emit_state(struct intel_context *intel)
          if (state->tex_buffer[i]) {
             OUT_RELOC(state->tex_buffer[i],
                       DRM_BO_FLAG_MEM_TT | DRM_BO_FLAG_READ,
-                      DRM_BO_MASK_MEM | DRM_BO_FLAG_READ,
                       state->tex_offset[i] | TM0S0_USE_FENCE);
          }
 	 else if (state == &i830->meta) {
@@ -529,7 +526,7 @@ i830_destroy_context(struct intel_context *intel)
 
    for (i = 0; i < I830_TEX_UNITS; i++) {
       if (i830->state.tex_buffer[i] != NULL) {
-	 driBOUnReference(i830->state.tex_buffer[i]);
+	 dri_bo_unreference(i830->state.tex_buffer[i]);
 	 i830->state.tex_buffer[i] = NULL;
       }
    }
diff --git a/src/mesa/drivers/dri/i915tex/i915_context.h b/src/mesa/drivers/dri/i915tex/i915_context.h
index 3a41d66c14..0be2b3cc8b 100644
--- a/src/mesa/drivers/dri/i915tex/i915_context.h
+++ b/src/mesa/drivers/dri/i915tex/i915_context.h
@@ -219,10 +219,10 @@ struct i915_hw_state
 /*    struct intel_region *tex_region[I915_TEX_UNITS]; */
 
    /* Regions aren't actually that appropriate here as the memory may
-    * be from a PBO or FBO.  Just use the buffer id.  Will have to do
-    * this for draw and depth for FBO's...
+    * be from a PBO or FBO.  Will have to do this for draw and depth for
+    * FBO's...
     */
-   struct _DriBufferObject *tex_buffer[I915_TEX_UNITS];
+   dri_bo *tex_buffer[I915_TEX_UNITS];
    GLuint tex_offset[I915_TEX_UNITS];
 
 
diff --git a/src/mesa/drivers/dri/i915tex/i915_metaops.c b/src/mesa/drivers/dri/i915tex/i915_metaops.c
index 397ff75b6f..a739bd6581 100644
--- a/src/mesa/drivers/dri/i915tex/i915_metaops.c
+++ b/src/mesa/drivers/dri/i915tex/i915_metaops.c
@@ -326,7 +326,7 @@ meta_texture_blend_replace(struct intel_context *intel)
  */
 static GLboolean
 meta_tex_rect_source(struct intel_context *intel,
-                     struct _DriBufferObject *buffer,
+                     dri_bo *buffer,
                      GLuint offset,
                      GLuint pitch, GLuint height, GLenum format, GLenum type)
 {
diff --git a/src/mesa/drivers/dri/i915tex/i915_texstate.c b/src/mesa/drivers/dri/i915tex/i915_texstate.c
index 3d68187cf8..09684e87b4 100644
--- a/src/mesa/drivers/dri/i915tex/i915_texstate.c
+++ b/src/mesa/drivers/dri/i915tex/i915_texstate.c
@@ -129,7 +129,7 @@ i915_update_tex_unit(struct intel_context *intel, GLuint unit, GLuint ss3)
    /*We need to refcount these. */
 
    if (i915->state.tex_buffer[unit] != NULL) {
-       driBOUnReference(i915->state.tex_buffer[unit]);
+       dri_bo_unreference(i915->state.tex_buffer[unit]);
        i915->state.tex_buffer[unit] = NULL;
    }
 
@@ -160,8 +160,8 @@ i915_update_tex_unit(struct intel_context *intel, GLuint unit, GLuint ss3)
 
       pitch = intelObj->pitchOverride;
    } else {
-      i915->state.tex_buffer[unit] = driBOReference(intelObj->mt->region->
-						    buffer);
+      dri_bo_reference(intelObj->mt->region->buffer);
+      i915->state.tex_buffer[unit] = intelObj->mt->region->buffer;
       i915->state.tex_offset[unit] =  intel_miptree_image_offset(intelObj->mt,
 								 0, intelObj->
 								 firstLevel);
@@ -343,7 +343,7 @@ i915UpdateTextureState(struct intel_context *intel)
                I915_ACTIVESTATE(i915, I915_UPLOAD_TEX(i), GL_FALSE);
 
 	    if (i915->state.tex_buffer[i] != NULL) {
-	       driBOUnReference(i915->state.tex_buffer[i]);
+	       dri_bo_unreference(i915->state.tex_buffer[i]);
 	       i915->state.tex_buffer[i] = NULL;
 	    }
 
diff --git a/src/mesa/drivers/dri/i915tex/i915_vtbl.c b/src/mesa/drivers/dri/i915tex/i915_vtbl.c
index 1d651a40d7..35757e17eb 100644
--- a/src/mesa/drivers/dri/i915tex/i915_vtbl.c
+++ b/src/mesa/drivers/dri/i915tex/i915_vtbl.c
@@ -337,7 +337,6 @@ i915_emit_state(struct intel_context *intel)
       OUT_BATCH(state->Buffer[I915_DESTREG_CBUFADDR1]);
       OUT_RELOC(state->draw_region->buffer,
                 DRM_BO_FLAG_MEM_TT | DRM_BO_FLAG_WRITE,
-                DRM_BO_MASK_MEM | DRM_BO_FLAG_WRITE,
                 state->draw_region->draw_offset);
 
       if (state->depth_region) {
@@ -345,7 +344,6 @@ i915_emit_state(struct intel_context *intel)
          OUT_BATCH(state->Buffer[I915_DESTREG_DBUFADDR1]);
          OUT_RELOC(state->depth_region->buffer,
                    DRM_BO_FLAG_MEM_TT | DRM_BO_FLAG_WRITE,
-                   DRM_BO_MASK_MEM | DRM_BO_FLAG_WRITE,
                    state->depth_region->draw_offset);
       }
 
@@ -389,7 +387,6 @@ i915_emit_state(struct intel_context *intel)
             if (state->tex_buffer[i]) {
                OUT_RELOC(state->tex_buffer[i],
                          DRM_BO_FLAG_MEM_TT | DRM_BO_FLAG_READ,
-                         DRM_BO_MASK_MEM | DRM_BO_FLAG_READ,
                          state->tex_offset[i]);
             }
             else if (state == &i915->meta) {
@@ -445,7 +442,7 @@ i915_destroy_context(struct intel_context *intel)
 
    for (i = 0; i < I915_TEX_UNITS; i++) {
       if (i915->state.tex_buffer[i] != NULL) {
-	 driBOUnReference(i915->state.tex_buffer[i]);
+	 dri_bo_unreference(i915->state.tex_buffer[i]);
 	 i915->state.tex_buffer[i] = NULL;
       }
    }
diff --git a/src/mesa/drivers/dri/i915tex/intel_batchbuffer.c b/src/mesa/drivers/dri/i915tex/intel_batchbuffer.c
index c740c3d7f6..8ee48b5a68 100644
--- a/src/mesa/drivers/dri/i915tex/intel_batchbuffer.c
+++ b/src/mesa/drivers/dri/i915tex/intel_batchbuffer.c
@@ -71,62 +71,31 @@
 void
 intel_batchbuffer_reset(struct intel_batchbuffer *batch)
 {
+   struct intel_context *intel = batch->intel;
 
-   int i;
-
-   /*
-    * Get a new, free batchbuffer.
-    */
-
-   batch->size =  batch->intel->intelScreen->maxBatchSize;
-   driBOData(batch->buffer, batch->size, NULL, 0);
-
-   driBOResetList(&batch->list);
-
-   /*
-    * Unreference buffers previously on the relocation list.
-    */
-
-   for (i = 0; i < batch->nr_relocs; i++) {
-      struct buffer_reloc *r = &batch->reloc[i];
-      driBOUnReference(r->buf);
+   if (batch->buf != NULL) {
+      dri_bo_unreference(batch->buf);
+      batch->buf = NULL;
    }
 
-   batch->list_count = 0;
-   batch->nr_relocs = 0;
-   batch->flags = 0;
-
-   /*
-    * We don't refcount the batchbuffer itself since we can't destroy it
-    * while it's on the list.
-    */
-
-
-   driBOAddListItem(&batch->list, batch->buffer,
-                    DRM_BO_FLAG_MEM_TT | DRM_BO_FLAG_EXE,
-                    DRM_BO_MASK_MEM | DRM_BO_FLAG_EXE);
-
-
-   batch->map = driBOMap(batch->buffer, DRM_BO_FLAG_WRITE, 0);
+   batch->buf = dri_bo_alloc(intel->intelScreen->bufmgr, "batchbuffer",
+			     intel->intelScreen->maxBatchSize, 4096,
+			     DRM_BO_FLAG_MEM_TT);
+   dri_bo_map(batch->buf, GL_TRUE);
+   batch->map = batch->buf->virtual;
+   batch->size = intel->intelScreen->maxBatchSize;
    batch->ptr = batch->map;
 }
 
-/*======================================================================
- * Public functions
- */
 struct intel_batchbuffer *
 intel_batchbuffer_alloc(struct intel_context *intel)
 {
    struct intel_batchbuffer *batch = calloc(sizeof(*batch), 1);
 
    batch->intel = intel;
-
-   driGenBuffers(intel->intelScreen->batchPool, "batchbuffer", 1,
-                 &batch->buffer, 4096,
-                 DRM_BO_FLAG_MEM_TT | DRM_BO_FLAG_EXE, 0);
    batch->last_fence = NULL;
-   driBOCreateList(20, &batch->list);
    intel_batchbuffer_reset(batch);
+
    return batch;
 }
 
@@ -134,20 +103,27 @@ void
 intel_batchbuffer_free(struct intel_batchbuffer *batch)
 {
    if (batch->last_fence) {
-      driFenceFinish(batch->last_fence,
-      DRM_FENCE_TYPE_EXE | DRM_I915_FENCE_TYPE_RW, GL_FALSE);
-      driFenceUnReference(batch->last_fence);
+      dri_fence_wait(batch->last_fence);
+      dri_fence_unreference(batch->last_fence);
       batch->last_fence = NULL;
    }
    if (batch->map) {
-      driBOUnmap(batch->buffer);
+      dri_bo_unmap(batch->buf);
       batch->map = NULL;
    }
-   driBOUnReference(batch->buffer);
-   batch->buffer = NULL;
+   dri_bo_unreference(batch->buf);
+   batch->buf = NULL;
    free(batch);
 }
 
+static int
+relocation_sort(const void *a_in, const void *b_in) {
+   const struct buffer_reloc *a = a_in, *b = b_in;
+
+   return (intptr_t)a->buf < (intptr_t)b->buf ? -1 : 1;
+}
+
+
 /* TODO: Push this whole function into bufmgr.
  */
 static void
@@ -158,30 +134,68 @@ do_flush_locked(struct intel_batchbuffer *batch,
    GLuint *ptr;
    GLuint i;
    struct intel_context *intel = batch->intel;
-   unsigned fenceFlags;
-   struct _DriFenceObject *fo;
+   dri_fence *fo;
+   GLboolean performed_rendering = GL_FALSE;
 
-   driBOValidateList(batch->intel->driFd, &batch->list);
+   assert(batch->buf->virtual != NULL);
+   ptr = batch->buf->virtual;
 
-   /* Apply the relocations.  This nasty map indicates to me that the
-    * whole task should be done internally by the memory manager, and
-    * that dma buffers probably need to be pinned within agp space.
+   /* Sort our relocation list in terms of referenced buffer pointer.
+    * This lets us uniquely validate the buffers with the sum of all the flags,
+    * while avoiding O(n^2) on number of relocations.
     */
-   ptr = (GLuint *) driBOMap(batch->buffer, DRM_BO_FLAG_WRITE,
-                             DRM_BO_HINT_ALLOW_UNFENCED_MAP);
-
+   qsort(batch->reloc, batch->nr_relocs, sizeof(batch->reloc[0]),
+	 relocation_sort);
 
+   /* Perform the necessary validations of buffers, and enter the relocations
+    * in the batchbuffer.
+    */
    for (i = 0; i < batch->nr_relocs; i++) {
       struct buffer_reloc *r = &batch->reloc[i];
 
-      ptr[r->offset / 4] = driBOOffset(r->buf) + r->delta;
+      if (r->validate_flags & DRM_BO_FLAG_WRITE)
+	 performed_rendering = GL_TRUE;
+
+      /* If this is the first time we've seen this buffer in the relocation
+       * list, figure out our flags and validate it.
+       */
+      if (i == 0 || batch->reloc[i - 1].buf != r->buf) {
+	 uint32_t validate_flags;
+	 int j, ret;
+
+	 /* Accumulate the flags we need for validating this buffer. */
+	 validate_flags = r->validate_flags;
+	 for (j = i + 1; j < batch->nr_relocs; j++) {
+	    if (batch->reloc[j].buf != r->buf)
+	       break;
+	    validate_flags |= batch->reloc[j].validate_flags;
+	 }
+
+	 /* Validate.  If we fail, fence to clear the unfenced list and bail
+	  * out.
+	  */
+	 ret = dri_bo_validate(r->buf, validate_flags);
+	 if (ret != 0) {
+	    dri_bo_unmap(batch->buf);
+	    fo = dri_fence_validated(intel->intelScreen->bufmgr,
+				     "batchbuffer failure fence", GL_TRUE);
+	    dri_fence_unreference(fo);
+	    goto done;
+	 }
+      }
+      ptr[r->offset / 4] = r->buf->offset + r->delta;
+      dri_bo_unreference(r->buf);
    }
 
-   if (INTEL_DEBUG & DEBUG_BATCH)
-      intel_decode(ptr, used / 4, 0);
-
-   driBOUnmap(batch->buffer);
+   dri_bo_unmap(batch->buf);
    batch->map = NULL;
+   batch->ptr = NULL;
+
+   dri_bo_validate(batch->buf, DRM_BO_FLAG_MEM_TT | DRM_BO_FLAG_EXE);
+
+   batch->list_count = 0;
+   batch->nr_relocs = 0;
+   batch->flags = 0;
 
    /* Throw away non-effective packets.  Won't work once we have
     * hardware contexts which would preserve statechanges beyond a
@@ -190,55 +204,49 @@ do_flush_locked(struct intel_batchbuffer *batch,
 
    if (!(intel->numClipRects == 0 && !ignore_cliprects)) {
       intel_batch_ioctl(batch->intel,
-                        driBOOffset(batch->buffer),
+                        batch->buf->offset,
                         used, ignore_cliprects, allow_unlock);
    }
 
-
-   /*
-    * Kernel fencing. The flags tells the kernel that we've 
-    * programmed an MI_FLUSH.
+   /* Associate a fence with the validated buffers, and note that we included
+    * a flush at the end.
     */
-   
-   fenceFlags = DRM_I915_FENCE_FLAG_FLUSHED;
-   fo = driFenceBuffers(batch->intel->driFd,
-			"Batch fence", fenceFlags);
-
-   /*
-    * User space fencing.
-    */
-
-   driBOFence(batch->buffer, fo);
-
-   if (driFenceType(fo) == DRM_FENCE_TYPE_EXE) {
+   fo = dri_fence_validated(intel->intelScreen->bufmgr,
+			    "Batch fence", GL_TRUE);
 
-     /*
-      * Oops. We only validated a batch buffer. This means we
-      * didn't do any proper rendering. Discard this fence object.
-      */
-
-      driFenceUnReference(fo);
-   } else {
-      driFenceUnReference(batch->last_fence);
+   if (performed_rendering) {
+      dri_fence_unreference(batch->last_fence);
       batch->last_fence = fo;
-      for (i = 0; i < batch->nr_relocs; i++) {
-	struct buffer_reloc *r = &batch->reloc[i];
-	driBOFence(r->buf, fo);
-      }
+   } else {
+     /* If we didn't validate any buffers for writing by the card, we don't
+      * need to track the fence for glFinish().
+      */
+      dri_fence_unreference(fo);
    }
 
    if (intel->numClipRects == 0 && !ignore_cliprects) {
       if (allow_unlock) {
+	 /* If we are not doing any actual user-visible rendering,
+	  * do a sched_yield to keep the app from pegging the cpu while
+	  * achieving nothing.
+	  */
          UNLOCK_HARDWARE(intel);
          sched_yield();
          LOCK_HARDWARE(intel);
       }
       intel->vtbl.lost_hardware(intel);
    }
+
+done:
+   if (INTEL_DEBUG & DEBUG_BATCH) {
+      dri_bo_map(batch->buf, GL_FALSE);
+      intel_decode(ptr, used / 4, batch->buf->offset);
+      dri_bo_unmap(batch->buf);
+   }
 }
 
 
-struct _DriFenceObject *
+void
 intel_batchbuffer_flush(struct intel_batchbuffer *batch)
 {
    struct intel_context *intel = batch->intel;
@@ -246,7 +254,7 @@ intel_batchbuffer_flush(struct intel_batchbuffer *batch)
    GLboolean was_locked = intel->locked;
 
    if (used == 0)
-      return batch->last_fence;
+      return;
 
    /* Add the MI_BATCH_BUFFER_END.  Always add an MI_FLUSH - this is a
     * performance drain that we would like to avoid.
@@ -263,10 +271,6 @@ intel_batchbuffer_flush(struct intel_batchbuffer *batch)
       used += 8;
    }
 
-   driBOUnmap(batch->buffer);
-   batch->ptr = NULL;
-   batch->map = NULL;
-
    /* TODO: Just pass the relocation list and dma buffer up to the
     * kernel.
     */
@@ -282,16 +286,14 @@ intel_batchbuffer_flush(struct intel_batchbuffer *batch)
    /* Reset the buffer:
     */
    intel_batchbuffer_reset(batch);
-   return batch->last_fence;
 }
 
 void
 intel_batchbuffer_finish(struct intel_batchbuffer *batch)
 {
-   struct _DriFenceObject *fence = intel_batchbuffer_flush(batch);
-   driFenceReference(fence);
-   driFenceFinish(fence, 3, GL_FALSE);
-   driFenceUnReference(fence);
+   intel_batchbuffer_flush(batch);
+   if (batch->last_fence != NULL)
+      dri_fence_wait(batch->last_fence);
 }
 
 
@@ -299,20 +301,18 @@ intel_batchbuffer_finish(struct intel_batchbuffer *batch)
  */
 GLboolean
 intel_batchbuffer_emit_reloc(struct intel_batchbuffer *batch,
-                             struct _DriBufferObject *buffer,
-                             GLuint flags, GLuint mask, GLuint delta)
+                             dri_bo *buffer,
+                             GLuint flags, GLuint delta)
 {
-   assert(batch->nr_relocs < MAX_RELOCS);
+   struct buffer_reloc *r = &batch->reloc[batch->nr_relocs++];
 
-   driBOAddListItem(&batch->list, buffer, flags, mask);
+   assert(batch->nr_relocs <= MAX_RELOCS);
 
-   {
-      struct buffer_reloc *r = &batch->reloc[batch->nr_relocs++];
-      driBOReference(buffer);
-      r->buf = buffer;
-      r->offset = batch->ptr - batch->map;
-      r->delta = delta;
-   }
+   dri_bo_reference(buffer);
+   r->buf = buffer;
+   r->offset = batch->ptr - batch->map;
+   r->delta = delta;
+   r->validate_flags = flags;
 
    batch->ptr += 4;
    return GL_TRUE;
diff --git a/src/mesa/drivers/dri/i915tex/intel_batchbuffer.h b/src/mesa/drivers/dri/i915tex/intel_batchbuffer.h
index 212f130101..850a91e1c9 100644
--- a/src/mesa/drivers/dri/i915tex/intel_batchbuffer.h
+++ b/src/mesa/drivers/dri/i915tex/intel_batchbuffer.h
@@ -16,18 +16,18 @@ struct intel_context;
 
 struct buffer_reloc
 {
-   struct _DriBufferObject *buf;
+   dri_bo *buf;
    GLuint offset;
    GLuint delta;                /* not needed? */
+   GLuint validate_flags;
 };
 
 struct intel_batchbuffer
 {
-   struct bufmgr *bm;
    struct intel_context *intel;
 
-   struct _DriBufferObject *buffer;
-   struct _DriFenceObject *last_fence;
+   dri_bo *buf;
+   dri_fence *last_fence;
    GLuint flags;
 
    drmBOList list;
@@ -48,8 +48,7 @@ void intel_batchbuffer_free(struct intel_batchbuffer *batch);
 
 void intel_batchbuffer_finish(struct intel_batchbuffer *batch);
 
-struct _DriFenceObject *intel_batchbuffer_flush(struct intel_batchbuffer
-                                                *batch);
+void intel_batchbuffer_flush(struct intel_batchbuffer *batch);
 
 void intel_batchbuffer_reset(struct intel_batchbuffer *batch);
 
@@ -65,9 +64,8 @@ void intel_batchbuffer_release_space(struct intel_batchbuffer *batch,
                                      GLuint bytes);
 
 GLboolean intel_batchbuffer_emit_reloc(struct intel_batchbuffer *batch,
-                                       struct _DriBufferObject *buffer,
-                                       GLuint flags,
-                                       GLuint mask, GLuint offset);
+                                       dri_bo *buffer,
+                                       GLuint flags, GLuint offset);
 
 /* Inline functions - might actually be better off with these
  * non-inlined.  Certainly better off switching all command packets to
@@ -113,9 +111,9 @@ intel_batchbuffer_require_space(struct intel_batchbuffer *batch,
 
 #define OUT_BATCH(d)  intel_batchbuffer_emit_dword(intel->batch, d)
 
-#define OUT_RELOC(buf,flags,mask,delta) do { 				\
-   assert((delta) >= 0);							\
-   intel_batchbuffer_emit_reloc(intel->batch, buf, flags, mask, delta);	\
+#define OUT_RELOC(buf, flags, delta) do { 				\
+   assert((delta) >= 0);						\
+   intel_batchbuffer_emit_reloc(intel->batch, buf, flags, delta);	\
 } while (0)
 
 #define ADVANCE_BATCH() do { } while(0)
diff --git a/src/mesa/drivers/dri/i915tex/intel_batchpool.c b/src/mesa/drivers/dri/i915tex/intel_batchpool.c
deleted file mode 100644
index 2503b8a62a..0000000000
--- a/src/mesa/drivers/dri/i915tex/intel_batchpool.c
+++ /dev/null
@@ -1,418 +0,0 @@
-/**************************************************************************
- * 
- * Copyright 2006 Tungsten Graphics, Inc., Bismarck, ND., USA
- * All Rights Reserved.
- * 
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the
- * "Software"), to deal in the Software without restriction, including
- * without limitation the rights to use, copy, modify, merge, publish,
- * distribute, sub license, and/or sell copies of the Software, and to
- * permit persons to whom the Software is furnished to do so, subject to
- * the following conditions:
- * 
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
- * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
- * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR 
- * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE 
- * USE OR OTHER DEALINGS IN THE SOFTWARE.
- *
- * The above copyright notice and this permission notice (including the
- * next paragraph) shall be included in all copies or substantial portions
- * of the Software.
- * 
- * 
- **************************************************************************/
-/*
- * Authors: Thomas Hellström <thomas-at-tungstengraphics-dot-com>
- */
-
-#include <xf86drm.h>
-#include <stdlib.h>
-#include <errno.h>
-#include "imports.h"
-#include "glthread.h"
-#include "dri_bufpool.h"
-#include "dri_bufmgr.h"
-#include "intel_screen.h"
-
-typedef struct
-{
-   drmMMListHead head;
-   struct _BPool *parent;
-   struct _DriFenceObject *fence;
-   unsigned long start;
-   int unfenced;
-   int mapped;
-} BBuf;
-
-typedef struct _BPool
-{
-   _glthread_Mutex mutex;
-   unsigned long bufSize;
-   unsigned poolSize;
-   unsigned numFree;
-   unsigned numTot;
-   unsigned numDelayed;
-   unsigned checkDelayed;
-   drmMMListHead free;
-   drmMMListHead delayed;
-   drmMMListHead head;
-   drmBO kernelBO;
-   void *virtual;
-   BBuf *bufs;
-} BPool;
-
-
-static BPool *
-createBPool(int fd, unsigned long bufSize, unsigned numBufs, unsigned flags,
-            unsigned checkDelayed)
-{
-   BPool *p = (BPool *) malloc(sizeof(*p));
-   BBuf *buf;
-   int i;
-
-   if (!p)
-      return NULL;
-
-   p->bufs = (BBuf *) malloc(numBufs * sizeof(*p->bufs));
-   if (!p->bufs) {
-      free(p);
-      return NULL;
-   }
-
-   DRMINITLISTHEAD(&p->free);
-   DRMINITLISTHEAD(&p->head);
-   DRMINITLISTHEAD(&p->delayed);
-
-   p->numTot = numBufs;
-   p->numFree = numBufs;
-   p->bufSize = bufSize;
-   p->numDelayed = 0;
-   p->checkDelayed = checkDelayed;
-
-   _glthread_INIT_MUTEX(p->mutex);
-
-   if (drmBOCreate(fd, 0, numBufs * bufSize, 0, NULL, drm_bo_type_dc,
-                   flags, DRM_BO_HINT_DONT_FENCE, &p->kernelBO)) {
-      free(p->bufs);
-      free(p);
-      return NULL;
-   }
-   if (drmBOMap(fd, &p->kernelBO, DRM_BO_FLAG_READ | DRM_BO_FLAG_WRITE, 0,
-                &p->virtual)) {
-      drmBODestroy(fd, &p->kernelBO);
-      free(p->bufs);
-      free(p);
-      return NULL;
-   }
-
-   /*
-    * We unmap the buffer so that we can validate it later. Note that this is
-    * just a synchronizing operation. The buffer will have a virtual mapping
-    * until it is destroyed.
-    */
-
-   drmBOUnmap(fd, &p->kernelBO);
-
-   buf = p->bufs;
-   for (i = 0; i < numBufs; ++i) {
-      buf->parent = p;
-      buf->fence = NULL;
-      buf->start = i * bufSize;
-      buf->mapped = 0;
-      buf->unfenced = 0;
-      DRMLISTADDTAIL(&buf->head, &p->free);
-      buf++;
-   }
-
-   return p;
-}
-
-
-static void
-pool_checkFree(BPool * p, int wait)
-{
-   drmMMListHead *list, *prev;
-   BBuf *buf;
-   int signaled = 0;
-   int i;
-
-   list = p->delayed.next;
-
-   if (p->numDelayed > 3) {
-      for (i = 0; i < p->numDelayed; i += 3) {
-         list = list->next;
-      }
-   }
-
-   prev = list->prev;
-   for (; list != &p->delayed; list = prev, prev = list->prev) {
-
-      buf = DRMLISTENTRY(BBuf, list, head);
-
-      if (!signaled) {
-         if (wait) {
-            driFenceFinish(buf->fence, DRM_FENCE_TYPE_EXE, 1);
-            signaled = 1;
-         }
-         else {
-            signaled = driFenceSignaled(buf->fence, DRM_FENCE_TYPE_EXE);
-         }
-      }
-
-      if (!signaled)
-         break;
-
-      driFenceUnReference(buf->fence);
-      buf->fence = NULL;
-      DRMLISTDEL(list);
-      p->numDelayed--;
-      DRMLISTADD(list, &p->free);
-      p->numFree++;
-   }
-}
-
-static void *
-pool_create(struct _DriBufferPool *pool,
-            unsigned long size, unsigned flags, unsigned hint,
-            unsigned alignment)
-{
-   BPool *p = (BPool *) pool->data;
-
-   drmMMListHead *item;
-
-   if (alignment && (alignment != 4096))
-      return NULL;
-
-   _glthread_LOCK_MUTEX(p->mutex);
-
-   if (p->numFree == 0)
-      pool_checkFree(p, GL_TRUE);
-
-   if (p->numFree == 0) {
-      fprintf(stderr, "Out of fixed size buffer objects\n");
-      BM_CKFATAL(-ENOMEM);
-   }
-
-   item = p->free.next;
-
-   if (item == &p->free) {
-      fprintf(stderr, "Fixed size buffer pool corruption\n");
-   }
-
-   DRMLISTDEL(item);
-   --p->numFree;
-
-   _glthread_UNLOCK_MUTEX(p->mutex);
-   return (void *) DRMLISTENTRY(BBuf, item, head);
-}
-
-
-static int
-pool_destroy(struct _DriBufferPool *pool, void *private)
-{
-   BBuf *buf = (BBuf *) private;
-   BPool *p = buf->parent;
-
-   _glthread_LOCK_MUTEX(p->mutex);
-
-   if (buf->fence) {
-      DRMLISTADDTAIL(&buf->head, &p->delayed);
-      p->numDelayed++;
-   }
-   else {
-      buf->unfenced = 0;
-      DRMLISTADD(&buf->head, &p->free);
-      p->numFree++;
-   }
-
-   if ((p->numDelayed % p->checkDelayed) == 0)
-      pool_checkFree(p, 0);
-
-   _glthread_UNLOCK_MUTEX(p->mutex);
-   return 0;
-}
-
-
-static int
-pool_map(struct _DriBufferPool *pool, void *private, unsigned flags,
-         int hint, void **virtual)
-{
-
-   BBuf *buf = (BBuf *) private;
-   BPool *p = buf->parent;
-
-   _glthread_LOCK_MUTEX(p->mutex);
-
-   /*
-    * Currently Mesa doesn't have any condition variables to resolve this
-    * cleanly in a multithreading environment.
-    * We bail out instead.
-    */
-
-   if (buf->mapped) {
-      fprintf(stderr, "Trying to map already mapped buffer object\n");
-      BM_CKFATAL(-EINVAL);
-   }
-
-#if 0
-   if (buf->unfenced && !(hint & DRM_BO_HINT_ALLOW_UNFENCED_MAP)) {
-      fprintf(stderr, "Trying to map an unfenced buffer object 0x%08x"
-              " 0x%08x %d\n", hint, flags, buf->start);
-      BM_CKFATAL(-EINVAL);
-   }
-
-#endif
-
-   if (buf->fence) {
-      _glthread_UNLOCK_MUTEX(p->mutex);
-      return -EBUSY;
-   }
-
-   buf->mapped = GL_TRUE;
-   *virtual = (unsigned char *) p->virtual + buf->start;
-   _glthread_UNLOCK_MUTEX(p->mutex);
-   return 0;
-}
-
-static int
-pool_waitIdle(struct _DriBufferPool *pool, void *private, int lazy)
-{
-   BBuf *buf = (BBuf *) private;
-   driFenceFinish(buf->fence, 0, lazy);
-   return 0;
-}
-
-static int
-pool_unmap(struct _DriBufferPool *pool, void *private)
-{
-   BBuf *buf = (BBuf *) private;
-
-   buf->mapped = 0;
-   return 0;
-}
-
-static unsigned long
-pool_offset(struct _DriBufferPool *pool, void *private)
-{
-   BBuf *buf = (BBuf *) private;
-   BPool *p = buf->parent;
-
-   return p->kernelBO.offset + buf->start;
-}
-
-static unsigned
-pool_flags(struct _DriBufferPool *pool, void *private)
-{
-   BPool *p = (BPool *) pool->data;
-
-   return p->kernelBO.flags;
-}
-
-static unsigned long
-pool_size(struct _DriBufferPool *pool, void *private)
-{
-   BPool *p = (BPool *) pool->data;
-
-   return p->bufSize;
-}
-
-
-static int
-pool_fence(struct _DriBufferPool *pool, void *private,
-           struct _DriFenceObject *fence)
-{
-   BBuf *buf = (BBuf *) private;
-   BPool *p = buf->parent;
-
-   _glthread_LOCK_MUTEX(p->mutex);
-   if (buf->fence) {
-      driFenceUnReference(buf->fence);
-   }
-   buf->fence = fence;
-   buf->unfenced = 0;
-   driFenceReference(buf->fence);
-   _glthread_UNLOCK_MUTEX(p->mutex);
-
-   return 0;
-}
-
-static drmBO *
-pool_kernel(struct _DriBufferPool *pool, void *private)
-{
-   BBuf *buf = (BBuf *) private;
-   BPool *p = buf->parent;
-
-   return &p->kernelBO;
-}
-
-static int
-pool_validate(struct _DriBufferPool *pool, void *private)
-{
-   BBuf *buf = (BBuf *) private;
-   BPool *p = buf->parent;
-   _glthread_LOCK_MUTEX(p->mutex);
-   buf->unfenced = GL_TRUE;
-   _glthread_UNLOCK_MUTEX(p->mutex);
-   return 0;
-}
-
-static void
-pool_takedown(struct _DriBufferPool *pool)
-{
-   BPool *p = (BPool *) pool->data;
-
-   /*
-    * Wait on outstanding fences. 
-    */
-
-   _glthread_LOCK_MUTEX(p->mutex);
-   while ((p->numFree < p->numTot) && p->numDelayed) {
-      _glthread_UNLOCK_MUTEX(p->mutex);
-      sched_yield();
-      pool_checkFree(p, GL_TRUE);
-      _glthread_LOCK_MUTEX(p->mutex);
-   }
-
-   drmBODestroy(pool->fd, &p->kernelBO);
-   free(p->bufs);
-   _glthread_UNLOCK_MUTEX(p->mutex);
-   free(p);
-   free(pool);
-}
-
-
-struct _DriBufferPool *
-driBatchPoolInit(int fd, unsigned flags,
-                 unsigned long bufSize,
-                 unsigned numBufs, unsigned checkDelayed)
-{
-   struct _DriBufferPool *pool;
-
-   pool = (struct _DriBufferPool *) malloc(sizeof(*pool));
-   if (!pool)
-      return NULL;
-
-   pool->data = createBPool(fd, bufSize, numBufs, flags, checkDelayed);
-   if (!pool->data)
-      return NULL;
-
-   pool->fd = fd;
-   pool->map = &pool_map;
-   pool->unmap = &pool_unmap;
-   pool->destroy = &pool_destroy;
-   pool->offset = &pool_offset;
-   pool->flags = &pool_flags;
-   pool->size = &pool_size;
-   pool->create = &pool_create;
-   pool->fence = &pool_fence;
-   pool->kernel = &pool_kernel;
-   pool->validate = &pool_validate;
-   pool->waitIdle = &pool_waitIdle;
-   pool->setstatic = NULL;
-   pool->takeDown = &pool_takedown;
-   return pool;
-}
diff --git a/src/mesa/drivers/dri/i915tex/intel_blit.c b/src/mesa/drivers/dri/i915tex/intel_blit.c
index dbe4ba2ac5..5d97f08434 100644
--- a/src/mesa/drivers/dri/i915tex/intel_blit.c
+++ b/src/mesa/drivers/dri/i915tex/intel_blit.c
@@ -67,8 +67,8 @@ intelCopyBuffer(const __DRIdrawablePrivate * dPriv,
    intelScreen = intel->intelScreen;
 
    if (intel->last_swap_fence) {
-      driFenceFinish(intel->last_swap_fence, DRM_FENCE_TYPE_EXE, GL_TRUE);
-      driFenceUnReference(intel->last_swap_fence);
+      dri_fence_wait(intel->last_swap_fence);
+      dri_fence_unreference(intel->last_swap_fence);
       intel->last_swap_fence = NULL;
    }
    intel->last_swap_fence = intel->first_swap_fence;
@@ -140,19 +140,20 @@ intelCopyBuffer(const __DRIdrawablePrivate * dPriv,
 	 OUT_BATCH((pbox->y2 << 16) | pbox->x2);
 
 	 OUT_RELOC(frontRegion->buffer, DRM_BO_FLAG_MEM_TT | DRM_BO_FLAG_WRITE,
-		   DRM_BO_MASK_MEM | DRM_BO_FLAG_WRITE, 0);
+		   0);
 	 OUT_BATCH((pbox->y1 << 16) | pbox->x1);
 	 OUT_BATCH(BR13 & 0xffff);
 	 OUT_RELOC(backRegion->buffer, DRM_BO_FLAG_MEM_TT | DRM_BO_FLAG_READ,
-		   DRM_BO_MASK_MEM | DRM_BO_FLAG_READ, 0);
+		   0);
 
 	 ADVANCE_BATCH();
       }
 
       if (intel->first_swap_fence)
-	 driFenceUnReference(intel->first_swap_fence);
-      intel->first_swap_fence = intel_batchbuffer_flush(intel->batch);
-      driFenceReference(intel->first_swap_fence);
+	 dri_fence_unreference(intel->first_swap_fence);
+      intel_batchbuffer_flush(intel->batch);
+      intel->first_swap_fence = intel->batch->last_fence;
+      dri_fence_reference(intel->first_swap_fence);
    }
 
    UNLOCK_HARDWARE(intel);
@@ -165,7 +166,7 @@ void
 intelEmitFillBlit(struct intel_context *intel,
                   GLuint cpp,
                   GLshort dst_pitch,
-                  struct _DriBufferObject *dst_buffer,
+                  dri_bo *dst_buffer,
                   GLuint dst_offset,
                   GLshort x, GLshort y, GLshort w, GLshort h, GLuint color)
 {
@@ -199,8 +200,7 @@ intelEmitFillBlit(struct intel_context *intel,
    OUT_BATCH(BR13);
    OUT_BATCH((y << 16) | x);
    OUT_BATCH(((y + h) << 16) | (x + w));
-   OUT_RELOC(dst_buffer, DRM_BO_FLAG_MEM_TT | DRM_BO_FLAG_WRITE,
-             DRM_BO_MASK_MEM | DRM_BO_FLAG_WRITE, dst_offset);
+   OUT_RELOC(dst_buffer, DRM_BO_FLAG_MEM_TT | DRM_BO_FLAG_WRITE, dst_offset);
    OUT_BATCH(color);
    ADVANCE_BATCH();
 }
@@ -236,10 +236,10 @@ void
 intelEmitCopyBlit(struct intel_context *intel,
                   GLuint cpp,
                   GLshort src_pitch,
-                  struct _DriBufferObject *src_buffer,
+                  dri_bo *src_buffer,
                   GLuint src_offset,
                   GLshort dst_pitch,
-                  struct _DriBufferObject *dst_buffer,
+                  dri_bo *dst_buffer,
                   GLuint dst_offset,
                   GLshort src_x, GLshort src_y,
                   GLshort dst_x, GLshort dst_y, 
@@ -297,12 +297,10 @@ intelEmitCopyBlit(struct intel_context *intel,
       OUT_BATCH(BR13);
       OUT_BATCH((dst_y << 16) | dst_x);
       OUT_BATCH((dst_y2 << 16) | dst_x2);
-      OUT_RELOC(dst_buffer, DRM_BO_FLAG_MEM_TT | DRM_BO_FLAG_WRITE,
-                DRM_BO_MASK_MEM | DRM_BO_FLAG_WRITE, dst_offset);
+      OUT_RELOC(dst_buffer, DRM_BO_FLAG_MEM_TT | DRM_BO_FLAG_WRITE, dst_offset);
       OUT_BATCH((src_y << 16) | src_x);
       OUT_BATCH(((GLint) src_pitch & 0xffff));
-      OUT_RELOC(src_buffer, DRM_BO_FLAG_MEM_TT | DRM_BO_FLAG_READ,
-                DRM_BO_MASK_MEM | DRM_BO_FLAG_READ, src_offset);
+      OUT_RELOC(src_buffer, DRM_BO_FLAG_MEM_TT | DRM_BO_FLAG_READ, src_offset);
       ADVANCE_BATCH();
    }
    else {
@@ -312,12 +310,10 @@ intelEmitCopyBlit(struct intel_context *intel,
       OUT_BATCH((0 << 16) | dst_x);
       OUT_BATCH((h << 16) | dst_x2);
       OUT_RELOC(dst_buffer, DRM_BO_FLAG_MEM_TT | DRM_BO_FLAG_WRITE,
-                DRM_BO_MASK_MEM | DRM_BO_FLAG_WRITE,
                 dst_offset + dst_y * dst_pitch);
       OUT_BATCH((0 << 16) | src_x);
       OUT_BATCH(((GLint) src_pitch & 0xffff));
       OUT_RELOC(src_buffer, DRM_BO_FLAG_MEM_TT | DRM_BO_FLAG_READ,
-                DRM_BO_MASK_MEM | DRM_BO_FLAG_READ,
                 src_offset + src_y * src_pitch);
       ADVANCE_BATCH();
    }
@@ -420,7 +416,7 @@ intelClearWithBlit(GLcontext * ctx, GLbitfield mask)
                /* OK, clear this renderbuffer */
                struct intel_region *irb_region =
 		  intel_get_rb_region(fb, buf);
-               struct _DriBufferObject *write_buffer =
+               dri_bo *write_buffer =
                   intel_region_buffer(intel->intelScreen, irb_region,
                                       all ? INTEL_WRITE_FULL :
                                       INTEL_WRITE_PART);
@@ -483,7 +479,6 @@ intelClearWithBlit(GLcontext * ctx, GLbitfield mask)
                OUT_BATCH((b.y1 << 16) | b.x1);
                OUT_BATCH((b.y2 << 16) | b.x2);
                OUT_RELOC(write_buffer, DRM_BO_FLAG_MEM_TT | DRM_BO_FLAG_WRITE,
-                         DRM_BO_MASK_MEM | DRM_BO_FLAG_WRITE,
                          irb_region->draw_offset);
                OUT_BATCH(clearVal);
                ADVANCE_BATCH();
diff --git a/src/mesa/drivers/dri/i915tex/intel_blit.h b/src/mesa/drivers/dri/i915tex/intel_blit.h
index e7bc280f58..a66af86359 100644
--- a/src/mesa/drivers/dri/i915tex/intel_blit.h
+++ b/src/mesa/drivers/dri/i915tex/intel_blit.h
@@ -40,10 +40,10 @@ extern void intelClearWithBlit(GLcontext * ctx, GLbitfield mask);
 extern void intelEmitCopyBlit(struct intel_context *intel,
                               GLuint cpp,
                               GLshort src_pitch,
-                              struct _DriBufferObject *src_buffer,
+                              dri_bo *src_buffer,
                               GLuint src_offset,
                               GLshort dst_pitch,
-                              struct _DriBufferObject *dst_buffer,
+                              dri_bo *dst_buffer,
                               GLuint dst_offset,
                               GLshort srcx, GLshort srcy,
                               GLshort dstx, GLshort dsty,
@@ -53,7 +53,7 @@ extern void intelEmitCopyBlit(struct intel_context *intel,
 extern void intelEmitFillBlit(struct intel_context *intel,
                               GLuint cpp,
                               GLshort dst_pitch,
-                              struct _DriBufferObject *dst_buffer,
+                              dri_bo *dst_buffer,
                               GLuint dst_offset,
                               GLshort x, GLshort y,
                               GLshort w, GLshort h, GLuint color);
diff --git a/src/mesa/drivers/dri/i915tex/intel_buffer_objects.c b/src/mesa/drivers/dri/i915tex/intel_buffer_objects.c
index 91c45ad95b..3c73c402d9 100644
--- a/src/mesa/drivers/dri/i915tex/intel_buffer_objects.c
+++ b/src/mesa/drivers/dri/i915tex/intel_buffer_objects.c
@@ -35,6 +35,16 @@
 #include "intel_regions.h"
 #include "dri_bufmgr.h"
 
+/** Allocates a new dri_bo to store the data for the buffer object. */
+static void
+intel_bufferobj_alloc_buffer(struct intel_context *intel,
+			     struct intel_buffer_object *intel_obj)
+{
+   intel_obj->buffer = dri_bo_alloc(intel->intelScreen->bufmgr, "bufferobj",
+				    intel_obj->Base.Size, 64,
+				    DRM_BO_FLAG_MEM_TT);
+}
+
 /**
  * There is some duplication between mesa's bufferobjects and our
  * bufmgr buffers.  Both have an integer handle and a hashtable to
@@ -44,21 +54,15 @@
 static struct gl_buffer_object *
 intel_bufferobj_alloc(GLcontext * ctx, GLuint name, GLenum target)
 {
-   struct intel_context *intel = intel_context(ctx);
    struct intel_buffer_object *obj = CALLOC_STRUCT(intel_buffer_object);
 
    _mesa_initialize_buffer_object(&obj->Base, name, target);
 
-   driGenBuffers(intel->intelScreen->regionPool,
-                 "bufferobj", 1, &obj->buffer, 64,
-		 DRM_BO_FLAG_MEM_LOCAL |
-		 DRM_BO_FLAG_READ | DRM_BO_FLAG_WRITE,
-		 0);
+   obj->buffer = NULL;
 
    return &obj->Base;
 }
 
-
 /* Break the COW tie to the region.  The region gets to keep the data.
  */
 void
@@ -68,17 +72,9 @@ intel_bufferobj_release_region(struct intel_context *intel,
    assert(intel_obj->region->buffer == intel_obj->buffer);
    intel_obj->region->pbo = NULL;
    intel_obj->region = NULL;
-   driBOUnReference(intel_obj->buffer);
-   intel_obj->buffer = NULL;
 
-   /* This leads to a large number of buffer deletion/creation events.
-    * Currently the drm doesn't like that:
-    */
-   driGenBuffers(intel->intelScreen->regionPool,
-                 "buffer object", 1, &intel_obj->buffer, 64, 0, 0);
-   LOCK_HARDWARE(intel);
-   driBOData(intel_obj->buffer, intel_obj->Base.Size, NULL, 0);
-   UNLOCK_HARDWARE(intel);
+   dri_bo_unreference(intel_obj->buffer);
+   intel_obj->buffer = NULL;
 }
 
 /* Break the COW tie to the region.  Both the pbo and the region end
@@ -109,7 +105,7 @@ intel_bufferobj_free(GLcontext * ctx, struct gl_buffer_object *obj)
       intel_bufferobj_release_region(intel, intel_obj);
    }
    else if (intel_obj->buffer) {
-      driDeleteBuffers(1, &intel_obj->buffer);
+      dri_bo_unreference(intel_obj->buffer);
    }
 
    _mesa_free(intel_obj);
@@ -139,9 +135,15 @@ intel_bufferobj_data(GLcontext * ctx,
    if (intel_obj->region)
       intel_bufferobj_release_region(intel, intel_obj);
 
-   LOCK_HARDWARE(intel);
-   driBOData(intel_obj->buffer, size, data, 0);
-   UNLOCK_HARDWARE(intel);
+   if (intel_obj->buffer != NULL && intel_obj->buffer->size != size) {
+      dri_bo_unreference(intel_obj->buffer);
+      intel_obj->buffer = NULL;
+   }
+
+   intel_bufferobj_alloc_buffer(intel, intel_obj);
+
+   if (data != NULL)
+      dri_bo_subdata(intel_obj->buffer, 0, size, data);
 }
 
 
@@ -166,7 +168,7 @@ intel_bufferobj_subdata(GLcontext * ctx,
    if (intel_obj->region)
       intel_bufferobj_cow(intel, intel_obj);
 
-   driBOSubData(intel_obj->buffer, offset, size, data);
+   dri_bo_subdata(intel_obj->buffer, offset, size, data);
 }
 
 
@@ -183,7 +185,7 @@ intel_bufferobj_get_subdata(GLcontext * ctx,
    struct intel_buffer_object *intel_obj = intel_buffer_object(obj);
 
    assert(intel_obj);
-   driBOGetSubData(intel_obj->buffer, offset, size, data);
+   dri_bo_get_subdata(intel_obj->buffer, offset, size, data);
 }
 
 
@@ -206,8 +208,13 @@ intel_bufferobj_map(GLcontext * ctx,
    if (intel_obj->region)
       intel_bufferobj_cow(intel, intel_obj);
 
-   obj->Pointer = driBOMap(intel_obj->buffer,
-                           DRM_BO_FLAG_READ | DRM_BO_FLAG_WRITE, 0);
+   if (intel_obj->buffer == NULL) {
+      obj->Pointer = NULL;
+      return NULL;
+   }
+
+   dri_bo_map(intel_obj->buffer, GL_TRUE);
+   obj->Pointer = intel_obj->buffer->virtual;
    return obj->Pointer;
 }
 
@@ -222,21 +229,25 @@ intel_bufferobj_unmap(GLcontext * ctx,
    struct intel_buffer_object *intel_obj = intel_buffer_object(obj);
 
    assert(intel_obj);
-   assert(obj->Pointer);
-   driBOUnmap(intel_obj->buffer);
-   obj->Pointer = NULL;
+   if (intel_obj->buffer != NULL) {
+      assert(obj->Pointer);
+      dri_bo_unmap(intel_obj->buffer);
+      obj->Pointer = NULL;
+   }
    return GL_TRUE;
 }
 
-struct _DriBufferObject *
+dri_bo *
 intel_bufferobj_buffer(struct intel_context *intel,
                        struct intel_buffer_object *intel_obj, GLuint flag)
 {
    if (intel_obj->region) {
       if (flag == INTEL_WRITE_PART)
          intel_bufferobj_cow(intel, intel_obj);
-      else if (flag == INTEL_WRITE_FULL)
+      else if (flag == INTEL_WRITE_FULL) {
          intel_bufferobj_release_region(intel, intel_obj);
+	 intel_bufferobj_alloc_buffer(intel, intel_obj);
+      }
    }
 
    return intel_obj->buffer;
diff --git a/src/mesa/drivers/dri/i915tex/intel_buffer_objects.h b/src/mesa/drivers/dri/i915tex/intel_buffer_objects.h
index afe9b2f7cf..db579a8ae4 100644
--- a/src/mesa/drivers/dri/i915tex/intel_buffer_objects.h
+++ b/src/mesa/drivers/dri/i915tex/intel_buffer_objects.h
@@ -41,7 +41,7 @@ struct gl_buffer_object;
 struct intel_buffer_object
 {
    struct gl_buffer_object Base;
-   struct _DriBufferObject *buffer;     /* the low-level buffer manager's buffer handle */
+   dri_bo *buffer;     /* the low-level buffer manager's buffer handle */
 
    struct intel_region *region; /* Is there a zero-copy texture
                                    associated with this (pixel)
@@ -51,9 +51,9 @@ struct intel_buffer_object
 
 /* Get the bm buffer associated with a GL bufferobject:
  */
-struct _DriBufferObject *intel_bufferobj_buffer(struct intel_context *intel,
-                                                struct intel_buffer_object
-                                                *obj, GLuint flag);
+dri_bo *intel_bufferobj_buffer(struct intel_context *intel,
+			       struct intel_buffer_object
+			       *obj, GLuint flag);
 
 /* Hook the bufferobject implementation into mesa: 
  */
diff --git a/src/mesa/drivers/dri/i915tex/intel_context.c b/src/mesa/drivers/dri/i915tex/intel_context.c
index 40ea756412..16fbe38e64 100644
--- a/src/mesa/drivers/dri/i915tex/intel_context.c
+++ b/src/mesa/drivers/dri/i915tex/intel_context.c
@@ -59,6 +59,7 @@
 #include "intel_regions.h"
 #include "intel_buffer_objects.h"
 #include "intel_fbo.h"
+#include "intel_decode.h"
 
 #include "drirenderbuffer.h"
 #include "vblank.h"
@@ -176,7 +177,6 @@ const struct dri_extension card_extensions[] = {
    {"GL_ARB_texture_mirrored_repeat", NULL},
    {"GL_ARB_texture_rectangle", NULL},
    {"GL_ARB_vertex_buffer_object", GL_ARB_vertex_buffer_object_functions},
-   {"GL_ARB_pixel_buffer_object", NULL},
    {"GL_ARB_vertex_program", GL_ARB_vertex_program_functions},
    {"GL_ARB_window_pos", GL_ARB_window_pos_functions},
    {"GL_EXT_blend_color", GL_EXT_blend_color_functions},
@@ -187,7 +187,6 @@ const struct dri_extension card_extensions[] = {
    {"GL_EXT_blend_subtract", NULL},
    {"GL_EXT_cull_vertex", GL_EXT_cull_vertex_functions},
    {"GL_EXT_fog_coord", GL_EXT_fog_coord_functions},
-   {"GL_EXT_framebuffer_object", GL_EXT_framebuffer_object_functions},
    {"GL_EXT_multi_draw_arrays", GL_EXT_multi_draw_arrays_functions},
 #if 1                           /* XXX FBO temporary? */
    {"GL_EXT_packed_depth_stencil", NULL},
@@ -210,6 +209,12 @@ const struct dri_extension card_extensions[] = {
    {NULL, NULL}
 };
 
+const struct dri_extension ttm_extensions[] = {
+   {"GL_EXT_framebuffer_object", GL_EXT_framebuffer_object_functions},
+   {"GL_ARB_pixel_buffer_object", NULL},
+   {NULL, NULL}
+};
+
 extern const struct tnl_pipeline_stage _intel_render_stage;
 
 static const struct tnl_pipeline_stage *intel_pipeline[] = {
@@ -314,9 +319,8 @@ intelFinish(GLcontext * ctx)
    struct intel_context *intel = intel_context(ctx);
    intelFlush(ctx);
    if (intel->batch->last_fence) {
-      driFenceFinish(intel->batch->last_fence,
-                     0, GL_FALSE);
-      driFenceUnReference(intel->batch->last_fence);
+      dri_fence_wait(intel->batch->last_fence);
+      dri_fence_unreference(intel->batch->last_fence);
       intel->batch->last_fence = NULL;
    }
    intelCheckFrontRotate(ctx);
@@ -358,15 +362,7 @@ intelInitContext(struct intel_context *intel,
    drmI830Sarea *saPriv = (drmI830Sarea *)
       (((GLubyte *) sPriv->pSAREA) + intelScreen->sarea_priv_offset);
    int fthrottle_mode;
-   GLboolean havePools;
 
-   DRM_LIGHT_LOCK(sPriv->fd, &sPriv->pSAREA->lock, driContextPriv->hHWContext);
-   havePools = intelCreatePools(intelScreen);
-   DRM_UNLOCK(sPriv->fd, &sPriv->pSAREA->lock, driContextPriv->hHWContext);
-
-   if (!havePools)
-      return GL_FALSE;
-     
    if (!_mesa_initialize_context(&intel->ctx,
                                  mesaVis, shareCtx,
                                  functions, (void *) intel))
@@ -460,7 +456,6 @@ intelInitContext(struct intel_context *intel,
    intel->RenderIndex = ~0;
 
    fthrottle_mode = driQueryOptioni(&intel->optionCache, "fthrottle_mode");
-   intel->iw.irq_seq = -1;
    intel->irqsEmitted = 0;
 
    intel->do_irqs = (intel->intelScreen->irq_active &&
@@ -477,6 +472,9 @@ intelInitContext(struct intel_context *intel,
 /* 		      GL_TRUE, */
                      GL_FALSE);
 
+   if (intelScreen->ttm)
+      driInitExtensions(ctx, ttm_extensions, GL_FALSE);
+
 
    intel->batch = intel_batchbuffer_alloc(intel);
    intel->last_swap_fence = NULL;
@@ -533,13 +531,13 @@ intelDestroyContext(__DRIcontextPrivate * driContextPriv)
       intel_batchbuffer_free(intel->batch);
 
       if (intel->last_swap_fence) {
-	 driFenceFinish(intel->last_swap_fence, DRM_FENCE_TYPE_EXE, GL_TRUE);
-	 driFenceUnReference(intel->last_swap_fence);
+	 dri_fence_wait(intel->last_swap_fence);
+	 dri_fence_unreference(intel->last_swap_fence);
 	 intel->last_swap_fence = NULL;
       }
       if (intel->first_swap_fence) {
-	 driFenceFinish(intel->first_swap_fence, DRM_FENCE_TYPE_EXE, GL_TRUE);
-	 driFenceUnReference(intel->first_swap_fence);
+	 dri_fence_wait(intel->first_swap_fence);
+	 dri_fence_unreference(intel->first_swap_fence);
 	 intel->first_swap_fence = NULL;
       }
 
@@ -671,6 +669,18 @@ intelContendedLock(struct intel_context *intel, GLuint flags)
    if (dPriv)
       DRI_VALIDATE_DRAWABLE_INFO(sPriv, dPriv);
 
+   /* If the last consumer of the texture memory wasn't us, notify the fake
+    * bufmgr and record the new owner.  We should have the memory shared
+    * between contexts of a single fake bufmgr, but this will at least make
+    * things correct for now.
+    */
+   if (!intel->intelScreen->ttm && sarea->texAge != intel->hHWContext) {
+      sarea->texAge = intel->hHWContext;
+      dri_bufmgr_fake_contended_lock_take(intel->intelScreen->bufmgr);
+      if (INTEL_DEBUG & DEBUG_BATCH)
+	 intel_decode_context_reset();
+   }
+
    if (sarea->width != intelScreen->width ||
        sarea->height != intelScreen->height ||
        sarea->rotation != intelScreen->current_rotation) {
diff --git a/src/mesa/drivers/dri/i915tex/intel_context.h b/src/mesa/drivers/dri/i915tex/intel_context.h
index 3bb34796b1..1e9ccd5cdc 100644
--- a/src/mesa/drivers/dri/i915tex/intel_context.h
+++ b/src/mesa/drivers/dri/i915tex/intel_context.h
@@ -50,7 +50,6 @@
 
 struct intel_region;
 struct intel_context;
-struct _DriBufferObject;
 
 typedef void (*intel_tri_func) (struct intel_context *, intelVertex *,
                                 intelVertex *, intelVertex *);
@@ -169,12 +168,12 @@ struct intel_context
 
       void (*meta_import_pixel_state) (struct intel_context * intel);
 
-        GLboolean(*meta_tex_rect_source) (struct intel_context * intel,
-                                          struct _DriBufferObject * buffer,
-                                          GLuint offset,
-                                          GLuint pitch,
-                                          GLuint height,
-                                          GLenum format, GLenum type);
+      GLboolean(*meta_tex_rect_source) (struct intel_context * intel,
+					dri_bo * buffer,
+					GLuint offset,
+					GLuint pitch,
+					GLuint height,
+					GLenum format, GLenum type);
       void (*rotate_window) (struct intel_context * intel,
                              __DRIdrawablePrivate * dPriv, GLuint srcBuf);
 
@@ -186,8 +185,8 @@ struct intel_context
    GLuint Fallback;
    GLuint NewGLState;
 
-   struct _DriFenceObject *last_swap_fence;
-   struct _DriFenceObject *first_swap_fence;
+   dri_fence *last_swap_fence;
+   dri_fence *first_swap_fence;
 
    struct intel_batchbuffer *batch;
 
@@ -221,11 +220,6 @@ struct intel_context
    GLboolean hw_stipple;
    GLboolean strict_conformance;
 
-   /* AGP memory buffer manager:
-    */
-   struct bufmgr *bm;
-
-
    /* State for intelvb.c and inteltris.c.
     */
    GLuint RenderIndex;
@@ -261,7 +255,6 @@ struct intel_context
    GLuint do_usleeps;
    int do_irqs;
    GLuint irqsEmitted;
-   drm_i915_irq_wait_t iw;
 
    drm_context_t hHWContext;
    drmLock *driHwLock;
diff --git a/src/mesa/drivers/dri/i915tex/intel_decode.c b/src/mesa/drivers/dri/i915tex/intel_decode.c
index 6fc02c999c..bf3387b28e 100644
--- a/src/mesa/drivers/dri/i915tex/intel_decode.c
+++ b/src/mesa/drivers/dri/i915tex/intel_decode.c
@@ -824,7 +824,7 @@ intel_decode(uint32_t *data, int count, uint32_t hw_offset)
     return failures;
 }
 
-void intel_disasm_context_reset()
+void intel_decode_context_reset()
 {
     saved_s2_set = 0;
     saved_s4_set = 1;
diff --git a/src/mesa/drivers/dri/i915tex/intel_ioctl.c b/src/mesa/drivers/dri/i915tex/intel_ioctl.c
index 3250c6b3a9..6e76737c78 100644
--- a/src/mesa/drivers/dri/i915tex/intel_ioctl.c
+++ b/src/mesa/drivers/dri/i915tex/intel_ioctl.c
@@ -45,18 +45,15 @@
 #define FILE_DEBUG_FLAG DEBUG_IOCTL
 
 int
-intelEmitIrqLocked(struct intel_context *intel)
+intelEmitIrqLocked(intelScreenPrivate *intelScreen)
 {
    drmI830IrqEmit ie;
    int ret, seq;
 
-   assert(((*(int *) intel->driHwLock) & ~DRM_LOCK_CONT) ==
-          (DRM_LOCK_HELD | intel->hHWContext));
-
    ie.irq_seq = &seq;
 
-   ret = drmCommandWriteRead(intel->driFd, DRM_I830_IRQ_EMIT,
-                             &ie, sizeof(ie));
+   ret = drmCommandWriteRead(intelScreen->driScrnPriv->fd,
+			     DRM_I830_IRQ_EMIT, &ie, sizeof(ie));
    if (ret) {
       fprintf(stderr, "%s: drmI830IrqEmit: %d\n", __FUNCTION__, ret);
       exit(1);
@@ -68,18 +65,18 @@ intelEmitIrqLocked(struct intel_context *intel)
 }
 
 void
-intelWaitIrq(struct intel_context *intel, int seq)
+intelWaitIrq(intelScreenPrivate *intelScreen, int seq)
 {
+   drm_i915_irq_wait_t iw;
    int ret;
 
    DBG("%s %d\n", __FUNCTION__, seq);
 
-   intel->iw.irq_seq = seq;
+   iw.irq_seq = seq;
 
    do {
-      ret =
-         drmCommandWrite(intel->driFd, DRM_I830_IRQ_WAIT, &intel->iw,
-                         sizeof(intel->iw));
+      ret = drmCommandWrite(intelScreen->driScrnPriv->fd,
+			    DRM_I830_IRQ_WAIT, &iw, sizeof(iw));
    } while (ret == -EAGAIN || ret == -EINTR);
 
    if (ret) {
diff --git a/src/mesa/drivers/dri/i915tex/intel_ioctl.h b/src/mesa/drivers/dri/i915tex/intel_ioctl.h
index e8d07de893..7a5b175ed1 100644
--- a/src/mesa/drivers/dri/i915tex/intel_ioctl.h
+++ b/src/mesa/drivers/dri/i915tex/intel_ioctl.h
@@ -30,8 +30,8 @@
 
 #include "intel_context.h"
 
-void intelWaitIrq(struct intel_context *intel, int seq);
-int intelEmitIrqLocked(struct intel_context *intel);
+void intelWaitIrq(intelScreenPrivate *intelScreen, int seq);
+int intelEmitIrqLocked(intelScreenPrivate *intelScreen);
 
 void intel_batch_ioctl(struct intel_context *intel,
                        GLuint start_offset,
diff --git a/src/mesa/drivers/dri/i915tex/intel_pixel_draw.c b/src/mesa/drivers/dri/i915tex/intel_pixel_draw.c
index e4e57cb3a7..afb586b4a3 100644
--- a/src/mesa/drivers/dri/i915tex/intel_pixel_draw.c
+++ b/src/mesa/drivers/dri/i915tex/intel_pixel_draw.c
@@ -217,7 +217,7 @@ do_blit_drawpixels(GLcontext * ctx,
    struct intel_buffer_object *src = intel_buffer_object(unpack->BufferObj);
    GLuint src_offset;
    GLuint rowLength;
-   struct _DriFenceObject *fence = NULL;
+   dri_fence *fence = NULL;
 
    if (INTEL_DEBUG & DEBUG_PIXEL)
       _mesa_printf("%s\n", __FUNCTION__);
@@ -298,8 +298,7 @@ do_blit_drawpixels(GLcontext * ctx,
       drm_clip_rect_t *box = dPriv->pClipRects;
       drm_clip_rect_t rect;
       drm_clip_rect_t dest_rect;
-      struct _DriBufferObject *src_buffer =
-         intel_bufferobj_buffer(intel, src, INTEL_READ);
+      dri_bo *src_buffer = intel_bufferobj_buffer(intel, src, INTEL_READ);
       int i;
 
       dest_rect.x1 = dPriv->x + x;
@@ -324,14 +323,15 @@ do_blit_drawpixels(GLcontext * ctx,
 			   ctx->Color.ColorLogicOpEnabled ?
 			   ctx->Color.LogicOp : GL_COPY);
       }
-      fence = intel_batchbuffer_flush(intel->batch);
-      driFenceReference(fence);
+      intel_batchbuffer_flush(intel->batch);
+      fence = intel->batch->last_fence;
+      dri_fence_reference(fence);
    }
    UNLOCK_HARDWARE(intel);
 
    if (fence) {
-      driFenceFinish(fence, DRM_FENCE_TYPE_EXE | DRM_I915_FENCE_TYPE_RW, GL_FALSE);
-      driFenceUnReference(fence);
+      dri_fence_wait(fence);
+      dri_fence_unreference(fence);
    }
 
    if (INTEL_DEBUG & DEBUG_PIXEL)
diff --git a/src/mesa/drivers/dri/i915tex/intel_pixel_read.c b/src/mesa/drivers/dri/i915tex/intel_pixel_read.c
index 24e49ae066..a22844926c 100644
--- a/src/mesa/drivers/dri/i915tex/intel_pixel_read.c
+++ b/src/mesa/drivers/dri/i915tex/intel_pixel_read.c
@@ -173,7 +173,7 @@ do_blit_readpixels(GLcontext * ctx,
    struct intel_buffer_object *dst = intel_buffer_object(pack->BufferObj);
    GLuint dst_offset;
    GLuint rowLength;
-   struct _DriFenceObject *fence = NULL;
+   dri_fence *fence = NULL;
 
    if (INTEL_DEBUG & DEBUG_PIXEL)
       _mesa_printf("%s\n", __FUNCTION__);
@@ -241,9 +241,9 @@ do_blit_readpixels(GLcontext * ctx,
       GLboolean all = (width * height * src->cpp == dst->Base.Size &&
                        x == 0 && dst_offset == 0);
 
-      struct _DriBufferObject *dst_buffer =
-         intel_bufferobj_buffer(intel, dst, all ? INTEL_WRITE_FULL :
-                                INTEL_WRITE_PART);
+      dri_bo *dst_buffer = intel_bufferobj_buffer(intel, dst,
+						  all ? INTEL_WRITE_FULL :
+						  INTEL_WRITE_PART);
       __DRIdrawablePrivate *dPriv = intel->driDrawable;
       int nbox = dPriv->numClipRects;
       drm_clip_rect_t *box = dPriv->pClipRects;
@@ -275,16 +275,16 @@ do_blit_readpixels(GLcontext * ctx,
 			   GL_COPY);
       }
 
-      fence = intel_batchbuffer_flush(intel->batch);
-      driFenceReference(fence);
+      intel_batchbuffer_flush(intel->batch);
+      fence = intel->batch->last_fence;
+      dri_fence_reference(fence);
 
    }
    UNLOCK_HARDWARE(intel);
 
    if (fence) {
-      driFenceFinish(fence, DRM_FENCE_TYPE_EXE | DRM_I915_FENCE_TYPE_RW, 
-		     GL_FALSE);
-      driFenceUnReference(fence);
+      dri_fence_wait(fence);
+      dri_fence_unreference(fence);
    }
 
    if (INTEL_DEBUG & DEBUG_PIXEL)
diff --git a/src/mesa/drivers/dri/i915tex/intel_regions.c b/src/mesa/drivers/dri/i915tex/intel_regions.c
index 7d19bd07d3..4eac859a13 100644
--- a/src/mesa/drivers/dri/i915tex/intel_regions.c
+++ b/src/mesa/drivers/dri/i915tex/intel_regions.c
@@ -52,8 +52,17 @@ void
 intel_region_idle(intelScreenPrivate *intelScreen, struct intel_region *region)
 {
    DBG("%s\n", __FUNCTION__);
-   if (region && region->buffer)
-      driBOWaitIdle(region->buffer, GL_FALSE);
+   /* XXX: Using this function is likely bogus -- it ought to only have been
+    * used before a map, anyway, but leave this cheap implementation of it
+    * for now.
+    */
+   if (region && region->buffer) {
+      /* Mapping it for read will ensure that any acceleration to the region
+       * would have landed already.
+       */
+      dri_bo_map(region->buffer, GL_TRUE);
+      dri_bo_unmap(region->buffer);
+   }
 }
 
 /* XXX: Thread safety?
@@ -66,8 +75,8 @@ intel_region_map(intelScreenPrivate *intelScreen, struct intel_region *region)
       if (region->pbo)
          intel_region_cow(intelScreen, region);
 
-      region->map = driBOMap(region->buffer,
-                             DRM_BO_FLAG_READ | DRM_BO_FLAG_WRITE, 0);
+      dri_bo_map(region->buffer, GL_TRUE);
+      region->map = region->buffer->virtual;
    }
 
    return region->map;
@@ -78,19 +87,16 @@ intel_region_unmap(intelScreenPrivate *intelScreen, struct intel_region *region)
 {
    DBG("%s\n", __FUNCTION__);
    if (!--region->map_refcount) {
-      driBOUnmap(region->buffer);
+      dri_bo_unmap(region->buffer);
       region->map = NULL;
    }
 }
 
-#undef TEST_CACHED_TEXTURES
-
 struct intel_region *
 intel_region_alloc(intelScreenPrivate *intelScreen,
                    GLuint cpp, GLuint pitch, GLuint height)
 {
    struct intel_region *region = calloc(sizeof(*region), 1);
-   struct intel_context *intel = intelScreenContext(intelScreen);
 
    DBG("%s\n", __FUNCTION__);
 
@@ -99,18 +105,8 @@ intel_region_alloc(intelScreenPrivate *intelScreen,
    region->height = height;     /* needed? */
    region->refcount = 1;
 
-   driGenBuffers(intelScreen->regionPool,
-                 "region", 1, &region->buffer, 64,
-#ifdef TEST_CACHED_TEXTURES		 
-		 DRM_BO_FLAG_MEM_TT | DRM_BO_FLAG_BIND_CACHED |
-		 DRM_BO_FLAG_READ | DRM_BO_FLAG_WRITE, 
-#else
-		 0,
-#endif
-		 0);
-   LOCK_HARDWARE(intel);
-   driBOData(region->buffer, pitch * cpp * height, NULL, 0);
-   UNLOCK_HARDWARE(intel);
+   region->buffer = dri_bo_alloc(intelScreen->bufmgr, "region",
+				 pitch * cpp * height, 64, DRM_BO_FLAG_MEM_TT);
    return region;
 }
 
@@ -141,7 +137,7 @@ intel_region_release(struct intel_region **region)
       if ((*region)->pbo)
 	 (*region)->pbo->region = NULL;
       (*region)->pbo = NULL;
-      driBOUnReference((*region)->buffer);
+      dri_bo_unreference((*region)->buffer);
       free(*region);
    }
    *region = NULL;
@@ -151,6 +147,7 @@ intel_region_release(struct intel_region **region)
 struct intel_region *
 intel_region_create_static(intelScreenPrivate *intelScreen,
                            GLuint mem_type,
+			   unsigned int bo_handle,
                            GLuint offset,
                            void *virtual,
                            GLuint cpp, GLuint pitch, GLuint height)
@@ -163,16 +160,18 @@ intel_region_create_static(intelScreenPrivate *intelScreen,
    region->height = height;     /* needed? */
    region->refcount = 1;
 
-   /*
-    * We use a "shared" buffer type to indicate buffers created and
-    * shared by others.
-    */
-
-   driGenBuffers(intelScreen->staticPool, "static region", 1,
-                 &region->buffer, 64,
-                 DRM_BO_FLAG_MEM_TT | DRM_BO_FLAG_NO_MOVE |
-                 DRM_BO_FLAG_READ | DRM_BO_FLAG_WRITE, 0);
-   driBOSetStatic(region->buffer, offset, pitch * cpp * height, virtual, 0);
+   if (intelScreen->ttm) {
+      assert(bo_handle != -1);
+      region->buffer = dri_ttm_bo_create_from_handle(intelScreen->bufmgr,
+						     "static region",
+						     bo_handle);
+   } else {
+      region->buffer = dri_bo_alloc_static(intelScreen->bufmgr,
+					   "static region",
+					   offset, pitch * cpp * height,
+					   virtual,
+					   DRM_BO_FLAG_MEM_TT);
+   }
 
    return region;
 }
@@ -183,6 +182,7 @@ void
 intel_region_update_static(intelScreenPrivate *intelScreen,
 			   struct intel_region *region,
                            GLuint mem_type,
+			   unsigned int bo_handle,
                            GLuint offset,
                            void *virtual,
                            GLuint cpp, GLuint pitch, GLuint height)
@@ -198,13 +198,19 @@ intel_region_update_static(intelScreenPrivate *intelScreen,
     * shared by others.
     */
 
-   driDeleteBuffers(1, &region->buffer);
-   driGenBuffers(intelScreen->staticPool, "static region", 1,
-                 &region->buffer, 64,
-                 DRM_BO_FLAG_MEM_TT | DRM_BO_FLAG_NO_MOVE |
-                 DRM_BO_FLAG_READ | DRM_BO_FLAG_WRITE, 0);
-   driBOSetStatic(region->buffer, offset, pitch * cpp * height, virtual, 0);
-
+   dri_bo_unreference(region->buffer);
+   if (intelScreen->ttm) {
+      assert(bo_handle != -1);
+      region->buffer = dri_ttm_bo_create_from_handle(intelScreen->bufmgr,
+						     "static region",
+						     bo_handle);
+   } else {
+      region->buffer = dri_bo_alloc_static(intelScreen->bufmgr,
+					   "static region",
+					   offset, pitch * cpp * height,
+					   virtual,
+					   DRM_BO_FLAG_MEM_TT);
+   }
 }
 
 
@@ -379,37 +385,33 @@ intel_region_attach_pbo(intelScreenPrivate *intelScreen,
    }
 
    if (region->buffer) {
-      driDeleteBuffers(1, &region->buffer);
+      dri_bo_unreference(region->buffer);
       region->buffer = NULL;
    }
 
    region->pbo = pbo;
    region->pbo->region = region;
-   region->buffer = driBOReference(pbo->buffer);
+   dri_bo_reference(pbo->buffer);
+   region->buffer = pbo->buffer;
 }
 
 
-/* Break the COW tie to the pbo.  The pbo gets to keep the data.
+/* Break the COW tie to the pbo and allocate a new buffer.
+ * The pbo gets to keep the data.
  */
 void
 intel_region_release_pbo(intelScreenPrivate *intelScreen,
                          struct intel_region *region)
 {
-   struct intel_context *intel = intelScreenContext(intelScreen);
-
    assert(region->buffer == region->pbo->buffer);
    region->pbo->region = NULL;
    region->pbo = NULL;
-   driBOUnReference(region->buffer);
+   dri_bo_unreference(region->buffer);
    region->buffer = NULL;
 
-   driGenBuffers(intelScreen->regionPool,
-                 "region", 1, &region->buffer, 64, 0, 0);
-   
-   LOCK_HARDWARE(intel);
-   driBOData(region->buffer,
-             region->cpp * region->pitch * region->height, NULL, 0);
-   UNLOCK_HARDWARE(intel);
+   region->buffer = dri_bo_alloc(intelScreen->bufmgr, "region",
+				 region->pitch * region->cpp * region->height,
+				 64, DRM_BO_FLAG_MEM_TT);
 }
 
 /* Break the COW tie to the pbo.  Both the pbo and the region end up
@@ -465,7 +467,7 @@ intel_region_cow(intelScreenPrivate *intelScreen, struct intel_region *region)
    }
 }
 
-struct _DriBufferObject *
+dri_bo *
 intel_region_buffer(intelScreenPrivate *intelScreen,
                     struct intel_region *region, GLuint flag)
 {
diff --git a/src/mesa/drivers/dri/i915tex/intel_regions.h b/src/mesa/drivers/dri/i915tex/intel_regions.h
index d938c107a4..42d7b17711 100644
--- a/src/mesa/drivers/dri/i915tex/intel_regions.h
+++ b/src/mesa/drivers/dri/i915tex/intel_regions.h
@@ -44,7 +44,7 @@ struct intel_buffer_object;
  */
 struct intel_region
 {
-   struct _DriBufferObject *buffer;   /**< buffer manager's buffer ID */
+   dri_bo *buffer;  /**< buffer manager's buffer */
    GLuint refcount; /**< Reference count for region */
    GLuint cpp;      /**< bytes per pixel */
    GLuint pitch;    /**< in pixels */
@@ -73,6 +73,7 @@ void intel_region_release(struct intel_region **ib);
 extern struct intel_region 
 *intel_region_create_static(intelScreenPrivate *intelScreen,
 			    GLuint mem_type,
+			    unsigned int bo_handle,
 			    GLuint offset,
 			    void *virtual,
 			    GLuint cpp,
@@ -81,6 +82,7 @@ extern void
 intel_region_update_static(intelScreenPrivate *intelScreen,
 			   struct intel_region *region,
 			   GLuint mem_type,
+			   unsigned int bo_handle,
 			   GLuint offset,
 			   void *virtual,
 			   GLuint cpp, GLuint pitch, GLuint height);
@@ -134,8 +136,8 @@ void intel_region_release_pbo(intelScreenPrivate *intelScreen,
 void intel_region_cow(intelScreenPrivate *intelScreen,
                       struct intel_region *region);
 
-struct _DriBufferObject *intel_region_buffer(intelScreenPrivate *intelScreen,
-                                             struct intel_region *region,
-                                             GLuint flag);
+dri_bo *intel_region_buffer(intelScreenPrivate *intelScreen,
+			    struct intel_region *region,
+			    GLuint flag);
 
 #endif
diff --git a/src/mesa/drivers/dri/i915tex/intel_screen.c b/src/mesa/drivers/dri/i915tex/intel_screen.c
index 2acdead63d..2721a90094 100644
--- a/src/mesa/drivers/dri/i915tex/intel_screen.c
+++ b/src/mesa/drivers/dri/i915tex/intel_screen.c
@@ -46,7 +46,7 @@
 #include "intel_fbo.h"
 
 #include "i830_dri.h"
-#include "dri_bufpool.h"
+#include "dri_bufmgr.h"
 #include "intel_regions.h"
 #include "intel_batchbuffer.h"
 
@@ -120,16 +120,18 @@ intelMapScreenRegions(__DRIscreenPrivate * sPriv)
       return GL_FALSE;
    }
 
-#if 0
-   _mesa_printf("TEX 0x%08x ", intelScreen->tex.handle);
-   if (drmMap(sPriv->fd,
-              intelScreen->tex.handle,
-              intelScreen->tex.size,
-              (drmAddress *) & intelScreen->tex.map) != 0) {
-      intelUnmapScreenRegions(intelScreen);
-      return GL_FALSE;
+   if (0)
+      _mesa_printf("TEX 0x%08x ", intelScreen->tex.handle);
+   if (intelScreen->tex.size != 0) {
+      if (drmMap(sPriv->fd,
+		 intelScreen->tex.handle,
+		 intelScreen->tex.size,
+		 (drmAddress *) & intelScreen->tex.map) != 0) {
+	 intelUnmapScreenRegions(intelScreen);
+	 return GL_FALSE;
+      }
    }
-#endif
+
    if (0)
       printf("Mappings:  front: %p  back: %p  third: %p  depth: %p  tex: %p\n",
              intelScreen->front.map,
@@ -138,22 +140,56 @@ intelMapScreenRegions(__DRIscreenPrivate * sPriv)
    return GL_TRUE;
 }
 
+/** Driver-specific fence emit implementation for the fake memory manager. */
+static unsigned int
+intel_fence_emit(void *private)
+{
+   intelScreenPrivate *intelScreen = (intelScreenPrivate *)private;
+   unsigned int fence;
+
+   /* XXX: Need to emit a flush, if we haven't already (at least with the
+    * current batchbuffer implementation, we have).
+    */
+
+   fence = intelEmitIrqLocked(intelScreen);
+
+   return fence;
+}
+
+/** Driver-specific fence wait implementation for the fake memory manager. */
+static int
+intel_fence_wait(void *private, unsigned int cookie)
+{
+   intelScreenPrivate *intelScreen = (intelScreenPrivate *)private;
+
+   intelWaitIrq(intelScreen, cookie);
+
+   return 0;
+}
 
 static struct intel_region *
 intel_recreate_static(intelScreenPrivate *intelScreen,
 		      struct intel_region *region,
-		      GLuint mem_type,
-		      GLuint offset,
-		      void *virtual,
-		      GLuint cpp, GLuint pitch, GLuint height)
+		      intelRegion *region_desc,
+		      GLuint mem_type)
 {
   if (region) {
-    intel_region_update_static(intelScreen, region, mem_type, offset,
-			       virtual, cpp, pitch, height);
+    intel_region_update_static(intelScreen, region, mem_type,
+			       region_desc->bo_handle, region_desc->offset,
+			       region_desc->map, intelScreen->cpp,
+			       region_desc->pitch / intelScreen->cpp,
+			       intelScreen->height);
   } else {
-    region = intel_region_create_static(intelScreen, mem_type, offset,
-					virtual, cpp, pitch, height);
+    region = intel_region_create_static(intelScreen, mem_type,
+					region_desc->bo_handle,
+					region_desc->offset,
+					region_desc->map, intelScreen->cpp,
+					region_desc->pitch / intelScreen->cpp,
+					intelScreen->height);
   }
+
+  assert(region->buffer != NULL);
+
   return region;
 }
     
@@ -175,57 +211,42 @@ intel_recreate_static_regions(intelScreenPrivate *intelScreen)
    intelScreen->front_region =
       intel_recreate_static(intelScreen,
 			    intelScreen->front_region,
-			    DRM_BO_FLAG_MEM_TT,
-			    intelScreen->front.offset,
-			    intelScreen->front.map,
-			    intelScreen->cpp,
-			    intelScreen->front.pitch / intelScreen->cpp,
-			    intelScreen->height);
-
-   intelScreen->rotated_region =
-      intel_recreate_static(intelScreen,
-			    intelScreen->rotated_region,
-			    DRM_BO_FLAG_MEM_TT,
-			    intelScreen->rotated.offset,
-			    intelScreen->rotated.map,
-			    intelScreen->cpp,
-			    intelScreen->rotated.pitch /
-			    intelScreen->cpp, intelScreen->height);
+			    &intelScreen->front,
+			    DRM_BO_FLAG_MEM_TT);
 
+   /* The rotated region is only used for old DDXes that didn't handle rotation
+\    * on their own.
+    */
+   if (intelScreen->driScrnPriv->ddxMinor < 8) {
+      intelScreen->rotated_region =
+	 intel_recreate_static(intelScreen,
+			       intelScreen->rotated_region,
+			       &intelScreen->rotated,
+			       DRM_BO_FLAG_MEM_TT);
+   }
 
    intelScreen->back_region =
       intel_recreate_static(intelScreen,
 			    intelScreen->back_region,
-			    DRM_BO_FLAG_MEM_TT,
-			    intelScreen->back.offset,
-			    intelScreen->back.map,
-			    intelScreen->cpp,
-			    intelScreen->back.pitch / intelScreen->cpp,
-			    intelScreen->height);
+			    &intelScreen->back,
+			    DRM_BO_FLAG_MEM_TT);
 
    if (intelScreen->third.handle) {
       intelScreen->third_region =
 	 intel_recreate_static(intelScreen,
 			       intelScreen->third_region,
-			       DRM_BO_FLAG_MEM_TT,
-			       intelScreen->third.offset,
-			       intelScreen->third.map,
-			       intelScreen->cpp,
-			       intelScreen->third.pitch / intelScreen->cpp,
-			       intelScreen->height);
+			       &intelScreen->third,
+			       DRM_BO_FLAG_MEM_TT);
    }
 
-   /* Still assuming front.cpp == depth.cpp
+   /* Still assumes front.cpp == depth.cpp.  We can kill this when we move to
+    * private buffers.
     */
    intelScreen->depth_region =
       intel_recreate_static(intelScreen,
 			    intelScreen->depth_region,
-			    DRM_BO_FLAG_MEM_TT,
-			    intelScreen->depth.offset,
-			    intelScreen->depth.map,
-			    intelScreen->cpp,
-			    intelScreen->depth.pitch / intelScreen->cpp,
-			    intelScreen->height);
+			    &intelScreen->depth,
+			    DRM_BO_FLAG_MEM_TT);
 }
 
 /**
@@ -368,6 +389,18 @@ intelUpdateScreenFromSAREA(intelScreenPrivate * intelScreen,
    intelScreen->depth.handle = sarea->depth_handle;
    intelScreen->depth.size = sarea->depth_size;
 
+   if (intelScreen->driScrnPriv->ddxMinor >= 9) {
+      intelScreen->front.bo_handle = sarea->front_bo_handle;
+      intelScreen->back.bo_handle = sarea->back_bo_handle;
+      intelScreen->third.bo_handle = sarea->third_bo_handle;
+      intelScreen->depth.bo_handle = sarea->depth_bo_handle;
+   } else {
+      intelScreen->front.bo_handle = -1;
+      intelScreen->back.bo_handle = -1;
+      intelScreen->third.bo_handle = -1;
+      intelScreen->depth.bo_handle = -1;
+   }
+
    intelScreen->tex.offset = sarea->tex_offset;
    intelScreen->logTextureGranularity = sarea->log_tex_granularity;
    intelScreen->tex.handle = sarea->tex_handle;
@@ -386,45 +419,6 @@ intelUpdateScreenFromSAREA(intelScreenPrivate * intelScreen,
       intelPrintSAREA(sarea);
 }
 
-GLboolean
-intelCreatePools(intelScreenPrivate *intelScreen)
-{
-   unsigned batchPoolSize = 1024*1024;
-   __DRIscreenPrivate * sPriv = intelScreen->driScrnPriv;
-
-   if (intelScreen->havePools)
-      return GL_TRUE;
-
-   batchPoolSize /= intelScreen->maxBatchSize;
-   intelScreen->regionPool = driDRMPoolInit(sPriv->fd);
-
-   if (!intelScreen->regionPool)
-      return GL_FALSE;
-
-   intelScreen->staticPool = driDRMStaticPoolInit(sPriv->fd);
-
-   if (!intelScreen->staticPool)
-      return GL_FALSE;
-
-   intelScreen->texPool = intelScreen->regionPool;
-
-   intelScreen->batchPool = driBatchPoolInit(sPriv->fd,
-                                             DRM_BO_FLAG_EXE |
-                                             DRM_BO_FLAG_MEM_TT |
-                                             DRM_BO_FLAG_MEM_LOCAL,
-                                             intelScreen->maxBatchSize, 
-					     batchPoolSize, 5);
-   if (!intelScreen->batchPool) {
-      fprintf(stderr, "Failed to initialize batch pool - possible incorrect agpgart installed\n");
-      return GL_FALSE;
-   }
-   
-   intel_recreate_static_regions(intelScreen);
-   intelScreen->havePools = GL_TRUE;
-
-   return GL_TRUE;
-}
-
 
 static GLboolean
 intelInitDriver(__DRIscreenPrivate * sPriv)
@@ -460,10 +454,11 @@ intelInitDriver(__DRIscreenPrivate * sPriv)
    sarea = (drmI830Sarea *)
       (((GLubyte *) sPriv->pSAREA) + intelScreen->sarea_priv_offset);
 
-   intelScreen->maxBatchSize = BATCH_SZ;
    intelScreen->deviceID = gDRIPriv->deviceID;
    if (intelScreen->deviceID == PCI_CHIP_I865_G)
       intelScreen->maxBatchSize = 4096;
+   else
+      intelScreen->maxBatchSize = BATCH_SZ;
 
    intelScreen->mem = gDRIPriv->mem;
    intelScreen->cpp = gDRIPriv->cpp;
@@ -489,24 +484,6 @@ intelInitDriver(__DRIscreenPrivate * sPriv)
       return GL_FALSE;
    }
 
-#if 0
-
-   /*
-    * FIXME: Remove this code and its references.
-    */
-
-   intelScreen->tex.offset = gDRIPriv->textureOffset;
-   intelScreen->logTextureGranularity = gDRIPriv->logTextureGranularity;
-   intelScreen->tex.handle = gDRIPriv->textures;
-   intelScreen->tex.size = gDRIPriv->textureSize;
-
-#else
-   intelScreen->tex.offset = 0;
-   intelScreen->logTextureGranularity = 0;
-   intelScreen->tex.handle = 0;
-   intelScreen->tex.size = 0;
-#endif
-
    intelScreen->sarea_priv_offset = gDRIPriv->sarea_priv_offset;
 
    if (0)
@@ -554,6 +531,39 @@ intelInitDriver(__DRIscreenPrivate * sPriv)
       (*glx_enable_extension) (psc, "GLX_SGI_make_current_read");
    }
 
+   /* If we've got a new enough DDX that's initializing TTM and giving us
+    * object handles for the shared buffers, use that.
+    */
+   intelScreen->ttm = GL_FALSE;
+   if (getenv("INTEL_NO_TTM") == NULL &&
+       intelScreen->driScrnPriv->ddxMinor >= 9 &&
+       intelScreen->front.bo_handle != -1) {
+      intelScreen->bufmgr = dri_bufmgr_ttm_init(sPriv->fd,
+						DRM_FENCE_TYPE_EXE,
+						DRM_FENCE_TYPE_EXE |
+						DRM_I915_FENCE_TYPE_RW);
+      if (intelScreen->bufmgr != NULL)
+	 intelScreen->ttm = GL_TRUE;
+   }
+   /* Otherwise, use the classic buffer manager. */
+   if (intelScreen->bufmgr == NULL) {
+      if (intelScreen->tex.size == 0) {
+	 fprintf(stderr, "[%s:%u] Error initializing buffer manager.\n",
+		 __func__, __LINE__);
+	 return GL_FALSE;
+      }
+      fprintf(stderr, "[%s:%u] Failed to init TTM buffer manager, falling back"
+	      " to classic.\n", __func__, __LINE__);
+      intelScreen->bufmgr = dri_bufmgr_fake_init(intelScreen->tex.offset,
+						 intelScreen->tex.map,
+						 intelScreen->tex.size,
+						 intel_fence_emit,
+						 intel_fence_wait,
+						 intelScreen);
+   }
+
+   intel_recreate_static_regions(intelScreen);
+
    return GL_TRUE;
 }
 
@@ -565,11 +575,7 @@ intelDestroyScreen(__DRIscreenPrivate * sPriv)
 
    intelUnmapScreenRegions(intelScreen);
 
-   if (intelScreen->havePools) {
-      driPoolTakeDown(intelScreen->regionPool);
-      driPoolTakeDown(intelScreen->staticPool);
-      driPoolTakeDown(intelScreen->batchPool);
-   }
+   dri_bufmgr_destroy(intelScreen->bufmgr);
    FREE(intelScreen);
    sPriv->private = NULL;
 }
@@ -896,7 +902,7 @@ __driCreateNewScreen_20050727(__DRInativeDisplay * dpy, int scrn,
    __DRIscreenPrivate *psp;
    static const __DRIversion ddx_expected = { 1, 5, 0 };
    static const __DRIversion dri_expected = { 4, 0, 0 };
-   static const __DRIversion drm_expected = { 1, 7, 0 };
+   static const __DRIversion drm_expected = { 1, 5, 0 };
 
    dri_interface = interface;
 
diff --git a/src/mesa/drivers/dri/i915tex/intel_screen.h b/src/mesa/drivers/dri/i915tex/intel_screen.h
index bac43aaddd..aa0ef2c509 100644
--- a/src/mesa/drivers/dri/i915tex/intel_screen.h
+++ b/src/mesa/drivers/dri/i915tex/intel_screen.h
@@ -33,7 +33,7 @@
 #include "intel_rotate.h"
 #include "i830_common.h"
 #include "xmlconfig.h"
-#include "dri_bufpool.h"
+#include "dri_bufmgr.h"
 
 /* XXX: change name or eliminate to avoid conflict with "struct
  * intel_region"!!!
@@ -45,6 +45,7 @@ typedef struct
    char *map;                   /* memory map */
    int offset;                  /* from start of video mem, in bytes */
    int pitch;                   /* row stride, in bytes */
+   unsigned int bo_handle;	/* buffer object id if available, or -1 */
 } intelRegion;
 
 typedef struct
@@ -90,12 +91,15 @@ typedef struct
    * Configuration cache with default values for all contexts
    */
    driOptionCache optionCache;
-   struct _DriBufferPool *batchPool;
-   struct _DriBufferPool *texPool;
-   struct _DriBufferPool *regionPool;
-   struct _DriBufferPool *staticPool;
+
+   dri_bufmgr *bufmgr;
    unsigned int maxBatchSize;
-   GLboolean havePools;
+
+   /**
+    * This value indicates that the kernel memory manager is being used
+    * instead of the fake client-side memory manager.
+    */
+   GLboolean ttm;
 } intelScreenPrivate;
 
 
@@ -122,16 +126,9 @@ extern void intelSwapBuffers(__DRIdrawablePrivate * dPriv);
 extern void
 intelCopySubBuffer(__DRIdrawablePrivate * dPriv, int x, int y, int w, int h);
 
-extern struct _DriBufferPool *driBatchPoolInit(int fd, unsigned flags,
-                                               unsigned long bufSize,
-                                               unsigned numBufs,
-                                               unsigned checkDelayed);
-
 extern struct intel_context *intelScreenContext(intelScreenPrivate *intelScreen);
 
 extern void
 intelUpdateScreenRotation(__DRIscreenPrivate * sPriv, drmI830Sarea * sarea);
-extern GLboolean
-intelCreatePools(intelScreenPrivate *intelScreen);
 
 #endif
diff --git a/src/mesa/drivers/dri/i915tex/intel_tex_image.c b/src/mesa/drivers/dri/i915tex/intel_tex_image.c
index f790b1e6f7..197cf35ebe 100644
--- a/src/mesa/drivers/dri/i915tex/intel_tex_image.c
+++ b/src/mesa/drivers/dri/i915tex/intel_tex_image.c
@@ -221,11 +221,10 @@ try_pbo_upload(struct intel_context *intel,
    intelFlush(&intel->ctx);
    LOCK_HARDWARE(intel);
    {
-      struct _DriBufferObject *src_buffer =
-         intel_bufferobj_buffer(intel, pbo, INTEL_READ);
-      struct _DriBufferObject *dst_buffer =
-         intel_region_buffer(intel->intelScreen, intelImage->mt->region,
-                             INTEL_WRITE_FULL);
+      dri_bo *src_buffer = intel_bufferobj_buffer(intel, pbo, INTEL_READ);
+      dri_bo *dst_buffer = intel_region_buffer(intel->intelScreen,
+					       intelImage->mt->region,
+					       INTEL_WRITE_FULL);
 
 
       intelEmitCopyBlit(intel,
diff --git a/src/mesa/drivers/dri/i915tex/server/i830_common.h b/src/mesa/drivers/dri/i915tex/server/i830_common.h
index 8735f93d14..a877f3c2f4 100644
--- a/src/mesa/drivers/dri/i915tex/server/i830_common.h
+++ b/src/mesa/drivers/dri/i915tex/server/i830_common.h
@@ -85,6 +85,7 @@ typedef struct {
         int last_enqueue;	/* last time a buffer was enqueued */
 	int last_dispatch;	/* age of the most recently dispatched buffer */
 	int ctxOwner;		/* last context to upload state */
+	/** Last context that used the buffer manager. */
 	int texAge;
         int pf_enabled;		/* is pageflipping allowed? */
         int pf_active;               
@@ -135,6 +136,15 @@ typedef struct {
 	int third_offset;
 	int third_size;
 	unsigned int third_tiled;
+
+	/* buffer object handles for the static buffers.  May change
+	 * over the lifetime of the client, though it doesn't in our current
+	 * implementation.
+	 */
+	unsigned int front_bo_handle;
+	unsigned int back_bo_handle;
+	unsigned int third_bo_handle;
+	unsigned int depth_bo_handle;
 } drmI830Sarea;
 
 /* Flags for perf_boxes