summaryrefslogtreecommitdiff
path: root/src/mesa/drivers/dri/i965/brw_clip.c
diff options
context:
space:
mode:
authorZhenyu Wang <zhenyuw@linux.intel.com>2010-04-19 15:51:50 +0800
committerZhenyu Wang <zhenyuw@linux.intel.com>2010-04-21 10:11:02 +0800
commitcdcef6cbf4dd80047819e9098e34a3b98bd502a4 (patch)
tree712387517536e90d712c9851fc467ccbcf55a8ca /src/mesa/drivers/dri/i965/brw_clip.c
parent9e258fc2bd6f2b9950606a0a92bb92c8959d9efd (diff)
intel: Clean up chipset name and gen num for Ironlake
Rename old IGDNG to Ironlake, and set 'gen' number for Ironlake as 5, so tracking the features with generation num instead of special is_ironlake flag. Reviewed-by: Eric Anholt <eric@anholt.net> Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
Diffstat (limited to 'src/mesa/drivers/dri/i965/brw_clip.c')
-rw-r--r--src/mesa/drivers/dri/i965/brw_clip.c6
1 files changed, 3 insertions, 3 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_clip.c b/src/mesa/drivers/dri/i965/brw_clip.c
index d3275c7a89..029a16500b 100644
--- a/src/mesa/drivers/dri/i965/brw_clip.c
+++ b/src/mesa/drivers/dri/i965/brw_clip.c
@@ -72,7 +72,7 @@ static void compile_clip_prog( struct brw_context *brw,
*/
c.header_position_offset = ATTR_SIZE;
- if (intel->is_ironlake)
+ if (intel->gen == 5)
delta = 3 * REG_SIZE;
else
delta = REG_SIZE;
@@ -85,7 +85,7 @@ static void compile_clip_prog( struct brw_context *brw,
c.nr_attrs = brw_count_bits(c.key.attrs);
- if (intel->is_ironlake)
+ if (intel->gen == 5)
c.nr_regs = (c.nr_attrs + 1) / 2 + 3; /* are vertices packed, or reg-aligned? */
else
c.nr_regs = (c.nr_attrs + 1) / 2 + 1; /* are vertices packed, or reg-aligned? */
@@ -162,7 +162,7 @@ static void upload_clip_prog(struct brw_context *brw)
/* _NEW_TRANSFORM */
key.nr_userclip = brw_count_bits(ctx->Transform.ClipPlanesEnabled);
- if (intel->is_ironlake)
+ if (intel->gen == 5)
key.clip_mode = BRW_CLIPMODE_KERNEL_CLIP;
else
key.clip_mode = BRW_CLIPMODE_NORMAL;