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author | Roland Scheidegger <sroland@vmware.com> | 2009-08-04 00:21:07 +0200 |
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committer | Roland Scheidegger <sroland@vmware.com> | 2009-08-04 00:21:07 +0200 |
commit | 50c736589ee0edbedf9ac434e883483b82b3030a (patch) | |
tree | e8cbb9bfcc636c155461307fd8e2d99ce44053c4 /src/mesa/drivers/dri/i965/brw_context.h | |
parent | 4221e81b2489c4c91092ef49bba181a1bed216c8 (diff) |
radeon: more fixes for compressed textures
- fix not respecting required hardware stride with compressedTexImage -
this fixes #22615.
- make sure correct stride is used in various places
- fix stored miptree never matching with a TexImage call with compressed
texture
- don't always store data with compressedtexsubimage at offset 0,
and actually use the supplied pixel data... (untested)
- make sure rows for compressed texture handling are rounded up not down
Note that trying to access stored compressed textures in hardware miptrees
from core mesa (get_compressed_teximage, swrast fallbacks) can't work correctly,
since RowStride isn't really set to anything useful, plus some places (at least
get_compressed_teximage) assume this data has native stride and no padding.
Diffstat (limited to 'src/mesa/drivers/dri/i965/brw_context.h')
0 files changed, 0 insertions, 0 deletions