diff options
author | Brian Paul <brianp@vmware.com> | 2009-04-14 11:08:42 -0600 |
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committer | Brian Paul <brianp@vmware.com> | 2009-04-14 11:08:42 -0600 |
commit | cafea7528052624c8d3e4cd1c5b26a61bf04d1d0 (patch) | |
tree | 114d80c8261fc80eb615c70095d76f8f84d53baa /src/mesa/drivers/dri/i965/brw_eu_emit.c | |
parent | 43c7ffaea635f949fd4803c4f594cf53e4b98f24 (diff) |
i965: checkpoint commit: VS constant buffers
Hook up a constant buffer, binding table, etc for the VS unit.
This will allow using large constant buffers with vertex shaders.
The new code is disabled at this time (use_const_buffer=FALSE).
Diffstat (limited to 'src/mesa/drivers/dri/i965/brw_eu_emit.c')
-rw-r--r-- | src/mesa/drivers/dri/i965/brw_eu_emit.c | 66 |
1 files changed, 63 insertions, 3 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_eu_emit.c b/src/mesa/drivers/dri/i965/brw_eu_emit.c index ec4d7fa76f..bb7ea5c049 100644 --- a/src/mesa/drivers/dri/i965/brw_eu_emit.c +++ b/src/mesa/drivers/dri/i965/brw_eu_emit.c @@ -952,7 +952,7 @@ void brw_dp_READ_16( struct brw_compile *p, /** * Read a float[4] vector from the data port Data Cache (const buffer). - * Scratch offset should be a multiple of 16. + * Location (in buffer) should be a multiple of 16. * Used for fetching shader constants. * If relAddr is true, we'll do an indirect fetch using the address register. */ @@ -960,7 +960,7 @@ void brw_dp_READ_4( struct brw_compile *p, struct brw_reg dest, GLuint msg_reg_nr, GLboolean relAddr, - GLuint scratch_offset, + GLuint location, GLuint bind_table_index ) { { @@ -971,7 +971,7 @@ void brw_dp_READ_4( struct brw_compile *p, /* set message header global offset field (reg 0, element 2) */ brw_MOV(p, retype(brw_vec1_grf(0, 2), BRW_REGISTER_TYPE_UD), - brw_imm_d(scratch_offset)); + brw_imm_d(location)); brw_pop_insn_state(p); } @@ -1001,6 +1001,66 @@ void brw_dp_READ_4( struct brw_compile *p, } +/* XXX this function is temporary - merge with brw_dp_READ_4() above. */ +void brw_dp_READ_4_vs(struct brw_compile *p, + struct brw_reg dest, + struct brw_reg src, + GLuint msg_reg_nr, + GLboolean relAddr, + GLuint location, + GLuint bind_table_index) +{ + { + brw_push_insn_state(p); + brw_set_compression_control(p, BRW_COMPRESSION_NONE); + brw_set_mask_control(p, BRW_MASK_DISABLE); + + /*src.nr = 0;*/ + + /* set message header global offset field (reg 0, element 2) */ + brw_MOV(p, +#if 1 + retype(brw_vec1_grf(0, 2), BRW_REGISTER_TYPE_UD), +#elif 0 + retype(brw_vec1_grf(src.nr, 2), BRW_REGISTER_TYPE_UD), +#endif + brw_imm_d(location)); + + brw_pop_insn_state(p); + } + + { + struct brw_instruction *insn = next_insn(p, BRW_OPCODE_SEND); + + insn->header.predicate_control = BRW_PREDICATE_NONE; + insn->header.compression_control = BRW_COMPRESSION_NONE; + insn->header.destreg__conditonalmod = msg_reg_nr; + insn->header.mask_control = BRW_MASK_DISABLE; + + /* cast dest to a uword[8] vector */ + // dest = retype(vec8(dest), BRW_REGISTER_TYPE_UW); + + brw_set_dest(insn, dest); +#if 1 + brw_set_src0(insn, retype(brw_vec8_grf(0, 0), BRW_REGISTER_TYPE_UW)); +#elif 0 + brw_set_src0(insn, retype(brw_vec8_grf(src.nr, 0), BRW_REGISTER_TYPE_UW)); +#endif + + printf("vs const read msg, location %u, msg_reg_nr %d\n", location, msg_reg_nr); + brw_set_dp_read_message(insn, + bind_table_index, + 0, /* msg_control (0 means 1 Oword) */ + BRW_DATAPORT_READ_MESSAGE_OWORD_BLOCK_READ, /* msg_type */ + 0, /* source cache = data cache */ + 1, /* msg_length */ + 1, /* response_length (1 Oword) */ + 0); /* eot */ + } +} + + + void brw_fb_WRITE(struct brw_compile *p, struct brw_reg dest, GLuint msg_reg_nr, |