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authorXiang, Haihao <haihao.xiang@intel.com>2008-10-24 16:05:48 +0800
committerXiang, Haihao <haihao.xiang@intel.com>2008-10-24 16:05:48 +0800
commitec8076264ea2390d4cb749be5c88bbf2bf5d4847 (patch)
tree4ac78155617e1dd252ccdd0b7579f5e9e1edacf0 /src/mesa/drivers/dri/i965/brw_misc_state.c
parentf657c8191128c500c2aa7204009154a1182e2abd (diff)
i965: don't emit state when dri_bufmgr_check_aperture_space fails.
This ensures there is an unfilled batchbuffer used for emitting states again. Partial fix for #17964.
Diffstat (limited to 'src/mesa/drivers/dri/i965/brw_misc_state.c')
-rw-r--r--src/mesa/drivers/dri/i965/brw_misc_state.c12
1 files changed, 9 insertions, 3 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_misc_state.c b/src/mesa/drivers/dri/i965/brw_misc_state.c
index 487c638ce2..afa8694ebb 100644
--- a/src/mesa/drivers/dri/i965/brw_misc_state.c
+++ b/src/mesa/drivers/dri/i965/brw_misc_state.c
@@ -86,8 +86,10 @@ static void upload_binding_table_pointers(struct brw_context *brw)
brw->wm.bind_bo,
};
- if (dri_bufmgr_check_aperture_space(aper_array, ARRAY_SIZE(aper_array)))
+ if (dri_bufmgr_check_aperture_space(aper_array, ARRAY_SIZE(aper_array))) {
intel_batchbuffer_flush(intel->batch);
+ return;
+ }
BEGIN_BATCH(6, IGNORE_CLIPRECTS);
OUT_BATCH(CMD_BINDING_TABLE_PTRS << 16 | (6 - 2));
@@ -152,8 +154,10 @@ static void upload_psp_urb_cbs(struct brw_context *brw )
brw->cc.state_bo,
};
- if (dri_bufmgr_check_aperture_space(aper_array, ARRAY_SIZE(aper_array)))
+ if (dri_bufmgr_check_aperture_space(aper_array, ARRAY_SIZE(aper_array))) {
intel_batchbuffer_flush(intel->batch);
+ return;
+ }
upload_pipelined_state_pointers(brw);
brw_upload_urb_fence(brw);
@@ -216,8 +220,10 @@ static void emit_depthbuffer(struct brw_context *brw)
return;
}
- if (dri_bufmgr_check_aperture_space(aper_array, ARRAY_SIZE(aper_array)))
+ if (dri_bufmgr_check_aperture_space(aper_array, ARRAY_SIZE(aper_array))) {
intel_batchbuffer_flush(intel->batch);
+ return;
+ }
BEGIN_BATCH(len, IGNORE_CLIPRECTS);
OUT_BATCH(CMD_DEPTH_BUFFER << 16 | (len - 2));