i965: Handle URB_FENCE erratum for Broadwater

There is a silicon bug which causes unpredictable behaviour if the
URB_FENCE command should cross a cache-line boundary. Pad before the
command to avoid such occurrences. As this command only applies to
gen4/5, do the fixup unconditionally as the specs do not actually state
for which chip it was fixed (and the cost is negligible)...

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>

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