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authorBrian Paul <brianp@vmware.com>2009-02-20 13:50:27 -0700
committerBrian Paul <brianp@vmware.com>2009-02-20 13:50:27 -0700
commite0d907308150b4863cc4f24543e70e14207e966a (patch)
treed4e1b9772c6454be2277520668de24b206527703 /src/mesa/drivers/dri/i965/brw_wm.h
parent773e9d47651149158e58916616235b26904c3665 (diff)
i965: use the new prog_instruction::TexShadow field
GLSL shadow() sampler calls are properly propogated down to the driver now. The glean glsl1 shadow() tests work (except for the alpha channel).
Diffstat (limited to 'src/mesa/drivers/dri/i965/brw_wm.h')
-rw-r--r--src/mesa/drivers/dri/i965/brw_wm.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_wm.h b/src/mesa/drivers/dri/i965/brw_wm.h
index 582031f5f6..6b945913b9 100644
--- a/src/mesa/drivers/dri/i965/brw_wm.h
+++ b/src/mesa/drivers/dri/i965/brw_wm.h
@@ -143,6 +143,7 @@ struct brw_wm_instruction {
GLuint writemask:4;
GLuint tex_unit:4; /* texture unit for TEX, TXD, TXP instructions */
GLuint tex_idx:3; /* TEXTURE_1D,2D,3D,CUBE,RECT_INDEX source target */
+ GLuint tex_shadow:1; /* do shadow comparison? */
GLuint eot:1; /* End of thread indicator for FB_WRITE*/
GLuint target:10; /* target binding table index for FB_WRITE*/
};