diff options
| author | Eric Anholt <eric@anholt.net> | 2010-10-19 09:25:51 -0700 |
|---|---|---|
| committer | Eric Anholt <eric@anholt.net> | 2010-10-21 15:21:01 -0700 |
| commit | 99b2c8570ea6f46c6564681631f0e0750a0641cc (patch) | |
| tree | e97f3681a726300e127aba8d3261e3978358a071 /src/mesa/drivers/dri/i965/brw_wm_emit.c | |
| parent | 7a3f113e79f983222ecc95c33655a8c9354fcfad (diff) | |
i965: Add support for register spilling.
It can be tested with if (0) replaced with if (1) to force spilling for all
virtual GRFs. Some simple tests work, but large texturing tests fail.
Diffstat (limited to 'src/mesa/drivers/dri/i965/brw_wm_emit.c')
| -rw-r--r-- | src/mesa/drivers/dri/i965/brw_wm_emit.c | 8 |
1 files changed, 2 insertions, 6 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_wm_emit.c b/src/mesa/drivers/dri/i965/brw_wm_emit.c index cb71c665b4..88bc64e5dd 100644 --- a/src/mesa/drivers/dri/i965/brw_wm_emit.c +++ b/src/mesa/drivers/dri/i965/brw_wm_emit.c @@ -1576,9 +1576,7 @@ static void emit_spill( struct brw_wm_compile *c, mov (1) r0.2<1>:d 0x00000080:d { Align1 NoMask } send (16) null.0<1>:uw m1 r0.0<8;8,1>:uw 0x053003ff:ud { Align1 } */ - brw_dp_WRITE_16(p, - retype(vec16(brw_vec8_grf(0, 0)), BRW_REGISTER_TYPE_UW), - slot); + brw_oword_block_write(p, brw_message_reg(1), 2, slot); } @@ -1603,9 +1601,7 @@ static void emit_unspill( struct brw_wm_compile *c, send (16) r110.0<1>:uw m1 r0.0<8;8,1>:uw 0x041243ff:ud { Align1 } */ - brw_dp_READ_16(p, - retype(vec16(reg), BRW_REGISTER_TYPE_UW), - slot); + brw_oword_block_read(p, vec16(reg), brw_message_reg(1), 2, slot); } |