i965: Also use the SIMD8 FB writes for SIMD8 mode on non-SNB.

1 files changed, 10 insertions, 11 deletions

diff --git a/src/mesa/drivers/dri/i965/brw_wm_emit.c b/src/mesa/drivers/dri/i965/brw_wm_emit.c
index 78de2ceda9..5c07108eb8 100644
--- a/src/mesa/drivers/dri/i965/brw_wm_emit.c
+++ b/src/mesa/drivers/dri/i965/brw_wm_emit.c
@@ -1255,6 +1255,7 @@ static void fire_fb_write( struct brw_wm_compile *c,
    /* Send framebuffer write message: */
 /*  send (16) null.0<1>:uw m0               r0.0<8;8,1>:uw   0x85a04000:ud    { Align1 EOT } */
    brw_fb_WRITE(p,
+		c->dispatch_width,
 		dst,
 		base_reg,
 		retype(brw_vec8_grf(0, 0), BRW_REGISTER_TYPE_UW),
@@ -1376,17 +1377,10 @@ void emit_fb_write(struct brw_wm_compile *c,
    }
    /* skip over the regs populated above:
     */
-   if (intel->gen < 6) {
-      nr += 8; /* XXX: always uses SIMD16 write currently. */
-   } else {
-      if (c->dispatch_width == 16)
-	 nr += 8;
-      else
-	 nr += 4;
-
-      /* Subtract off the message header, since we send headerless. */
-      nr -= 2;
-   }
+   if (c->dispatch_width == 16)
+      nr += 8;
+   else
+      nr += 4;
 
    brw_pop_insn_state(p);
 
@@ -1420,6 +1414,11 @@ void emit_fb_write(struct brw_wm_compile *c,
       nr += 2;
    }
 
+   if (intel->gen >= 6) {
+      /* Subtract off the message header, since we send headerless. */
+      nr -= 2;
+   }
+
    if (!c->key.runtime_check_aads_emit) {
       if (c->key.aa_dest_stencil_reg)
 	 emit_aa(c, arg1, 2);