diff options
author | Nicolai Hähnle <nhaehnle@gmail.com> | 2009-09-06 13:15:04 +0200 |
---|---|---|
committer | Nicolai Hähnle <nhaehnle@gmail.com> | 2009-09-06 13:15:04 +0200 |
commit | f02f63997ce65530788a6dfcb28f11790a14d938 (patch) | |
tree | fc6aedb5256bfb84eb170cb82addd2b6605510f8 /src/mesa/drivers/dri/i965 | |
parent | e95e76e1255a3ad0ce604271301d090337b2e82b (diff) | |
parent | 9778731732b4753e79a1b786c65325a52392411d (diff) |
Merge branch 'master' into r300-compiler
Conflicts:
src/gallium/drivers/r300/r300_tgsi_to_rc.c
Diffstat (limited to 'src/mesa/drivers/dri/i965')
-rw-r--r-- | src/mesa/drivers/dri/i965/Makefile | 1 | ||||
-rw-r--r-- | src/mesa/drivers/dri/i965/brw_context.c | 2 | ||||
-rw-r--r-- | src/mesa/drivers/dri/i965/brw_gs_state.c | 5 | ||||
-rw-r--r-- | src/mesa/drivers/dri/i965/brw_misc_state.c | 1 | ||||
-rw-r--r-- | src/mesa/drivers/dri/i965/brw_structs.h | 4 | ||||
-rw-r--r-- | src/mesa/drivers/dri/i965/brw_vs_emit.c | 2 | ||||
-rw-r--r-- | src/mesa/drivers/dri/i965/brw_wm_emit.c | 18 | ||||
-rw-r--r-- | src/mesa/drivers/dri/i965/brw_wm_pass1.c | 1 | ||||
l--------- | src/mesa/drivers/dri/i965/intel_syncobj.c | 1 |
9 files changed, 29 insertions, 6 deletions
diff --git a/src/mesa/drivers/dri/i965/Makefile b/src/mesa/drivers/dri/i965/Makefile index 128afb5686..6e9a9a29a3 100644 --- a/src/mesa/drivers/dri/i965/Makefile +++ b/src/mesa/drivers/dri/i965/Makefile @@ -26,6 +26,7 @@ DRIVER_SOURCES = \ intel_pixel_read.c \ intel_state.c \ intel_swapbuffers.c \ + intel_syncobj.c \ intel_tex.c \ intel_tex_copy.c \ intel_tex_format.c \ diff --git a/src/mesa/drivers/dri/i965/brw_context.c b/src/mesa/drivers/dri/i965/brw_context.c index e76e9fdcc8..3c5b848319 100644 --- a/src/mesa/drivers/dri/i965/brw_context.c +++ b/src/mesa/drivers/dri/i965/brw_context.c @@ -167,8 +167,6 @@ GLboolean brwCreateContext( const __GLcontextModes *mesaVis, brw_draw_init( brw ); - vbo_use_buffer_objects(ctx); - return GL_TRUE; } diff --git a/src/mesa/drivers/dri/i965/brw_gs_state.c b/src/mesa/drivers/dri/i965/brw_gs_state.c index a761c03153..ed9d2ffe60 100644 --- a/src/mesa/drivers/dri/i965/brw_gs_state.c +++ b/src/mesa/drivers/dri/i965/brw_gs_state.c @@ -93,7 +93,10 @@ gs_unit_create_from_key(struct brw_context *brw, struct brw_gs_unit_key *key) gs.thread4.nr_urb_entries = key->nr_urb_entries; gs.thread4.urb_entry_allocation_size = key->urb_size - 1; - gs.thread4.max_threads = 0; /* Hardware requirement */ + if (key->nr_urb_entries >= 8) + gs.thread4.max_threads = 1; + else + gs.thread4.max_threads = 0; if (BRW_IS_IGDNG(brw)) gs.thread4.rendering_enable = 1; diff --git a/src/mesa/drivers/dri/i965/brw_misc_state.c b/src/mesa/drivers/dri/i965/brw_misc_state.c index 85a7706404..ea71857548 100644 --- a/src/mesa/drivers/dri/i965/brw_misc_state.c +++ b/src/mesa/drivers/dri/i965/brw_misc_state.c @@ -172,6 +172,7 @@ static void prepare_psp_urb_cbs(struct brw_context *brw) brw_add_validated_bo(brw, brw->vs.state_bo); brw_add_validated_bo(brw, brw->gs.state_bo); brw_add_validated_bo(brw, brw->clip.state_bo); + brw_add_validated_bo(brw, brw->sf.state_bo); brw_add_validated_bo(brw, brw->wm.state_bo); brw_add_validated_bo(brw, brw->cc.state_bo); } diff --git a/src/mesa/drivers/dri/i965/brw_structs.h b/src/mesa/drivers/dri/i965/brw_structs.h index a6de09207b..66d4127271 100644 --- a/src/mesa/drivers/dri/i965/brw_structs.h +++ b/src/mesa/drivers/dri/i965/brw_structs.h @@ -442,8 +442,8 @@ struct brw_urb_fence { GLuint sf_fence:10; GLuint vf_fence:10; - GLuint cs_fence:10; - GLuint pad:2; + GLuint cs_fence:11; + GLuint pad:1; } bits1; }; diff --git a/src/mesa/drivers/dri/i965/brw_vs_emit.c b/src/mesa/drivers/dri/i965/brw_vs_emit.c index 108e19cdbc..584fdbdfc3 100644 --- a/src/mesa/drivers/dri/i965/brw_vs_emit.c +++ b/src/mesa/drivers/dri/i965/brw_vs_emit.c @@ -1208,7 +1208,7 @@ static void emit_vertex_write( struct brw_vs_compile *c) MIN2(c->nr_outputs + 1 + len_vertext_header, (BRW_MAX_MRF-1)), /* msg len */ 0, /* response len */ eot, /* eot */ - 1, /* writes complete */ + eot, /* writes complete */ 0, /* urb destination offset */ BRW_URB_SWIZZLE_INTERLEAVE); diff --git a/src/mesa/drivers/dri/i965/brw_wm_emit.c b/src/mesa/drivers/dri/i965/brw_wm_emit.c index 268f7965c0..981864323e 100644 --- a/src/mesa/drivers/dri/i965/brw_wm_emit.c +++ b/src/mesa/drivers/dri/i965/brw_wm_emit.c @@ -908,6 +908,20 @@ static void emit_kil( struct brw_wm_compile *c, } } +/* KIL_NV kills the pixels that are currently executing, not based on a test + * of the arguments. + */ +static void emit_kil_nv( struct brw_wm_compile *c ) +{ + struct brw_compile *p = &c->func; + struct brw_reg r0uw = retype(brw_vec1_grf(0, 0), BRW_REGISTER_TYPE_UW); + + brw_push_insn_state(p); + brw_set_mask_control(p, BRW_MASK_DISABLE); + brw_NOT(p, c->emit_mask_reg, brw_mask_reg(1)); //IMASK + brw_AND(p, r0uw, c->emit_mask_reg, r0uw); + brw_pop_insn_state(p); +} static void fire_fb_write( struct brw_wm_compile *c, GLuint base_reg, @@ -1387,6 +1401,10 @@ void brw_wm_emit( struct brw_wm_compile *c ) emit_kil(c, args[0]); break; + case OPCODE_KIL_NV: + emit_kil_nv(c); + break; + default: _mesa_printf("Unsupported opcode %i (%s) in fragment shader\n", inst->opcode, inst->opcode < MAX_OPCODE ? diff --git a/src/mesa/drivers/dri/i965/brw_wm_pass1.c b/src/mesa/drivers/dri/i965/brw_wm_pass1.c index 3436a24717..9c68bfd78b 100644 --- a/src/mesa/drivers/dri/i965/brw_wm_pass1.c +++ b/src/mesa/drivers/dri/i965/brw_wm_pass1.c @@ -270,6 +270,7 @@ void brw_wm_pass1( struct brw_wm_compile *c ) case OPCODE_DST: case WM_FRONTFACING: + case OPCODE_KIL_NV: default: break; } diff --git a/src/mesa/drivers/dri/i965/intel_syncobj.c b/src/mesa/drivers/dri/i965/intel_syncobj.c new file mode 120000 index 0000000000..0b2e56ab24 --- /dev/null +++ b/src/mesa/drivers/dri/i965/intel_syncobj.c @@ -0,0 +1 @@ +../intel/intel_syncobj.c
\ No newline at end of file |