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| author | Eric Anholt <eric@anholt.net> | 2008-07-01 15:09:24 -0700 |
|---|---|---|
| committer | Eric Anholt <eric@anholt.net> | 2008-07-01 16:14:08 -0700 |
| commit | e74f54793e45dd2e36474f6fc527456647f32efd (patch) | |
| tree | 6c84ade0bf15ba5b7d7d76536adf84c61fa215c2 /src/mesa/drivers/dri/intel/intel_screen.h | |
| parent | f059a3302260075e9cfd35649dc3877726291d8d (diff) | |
intel-gem: Move bit 6 x tiling swizzle to a driconf option, and add new mode.
It turns out that it's not just deviceID dependent, and there's some additional
undefined factor that determines the bit 6 swizzling. It's now controllable
with swizzle_mode=[012] until we get a response on how to automatically detect.
Diffstat (limited to 'src/mesa/drivers/dri/intel/intel_screen.h')
0 files changed, 0 insertions, 0 deletions